1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
139 static void ppc_previous (int);
140 static void ppc_pdata (int);
141 static void ppc_ydata (int);
142 static void ppc_reldata (int);
143 static void ppc_rdata (int);
144 static void ppc_ualong (int);
145 static void ppc_znop (int);
146 static void ppc_pe_comm (int);
147 static void ppc_pe_section (int);
148 static void ppc_pe_function (int);
149 static void ppc_pe_tocd (int);
152 /* Generic assembler global variables which must be defined by all
156 /* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160 static const char ppc_solaris_comment_chars[] = "#!";
161 static const char ppc_eabi_comment_chars[] = "#";
163 #ifdef TARGET_SOLARIS_COMMENT
164 const char *ppc_comment_chars = ppc_solaris_comment_chars;
166 const char *ppc_comment_chars = ppc_eabi_comment_chars;
169 const char comment_chars[] = "#";
172 /* Characters which start a comment at the beginning of a line. */
173 const char line_comment_chars[] = "#";
175 /* Characters which may be used to separate multiple commands on a
177 const char line_separator_chars[] = ";";
179 /* Characters which are used to indicate an exponent in a floating
181 const char EXP_CHARS[] = "eE";
183 /* Characters which mean that a number is a floating point constant,
185 const char FLT_CHARS[] = "dD";
187 /* Anything that can start an operand needs to be mentioned here,
188 to stop the input scrubber eating whitespace. */
189 const char ppc_symbol_chars[] = "%[";
191 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192 int ppc_cie_data_alignment;
194 /* The dwarf2 minimum instruction length. */
195 int ppc_dwarf2_line_min_insn_length;
197 /* More than this number of nops in an alignment op gets a branch
199 unsigned long nop_limit = 4;
201 /* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
203 ppc_cpu_t ppc_cpu = 0;
204 ppc_cpu_t sticky = 0;
206 /* Value for ELF e_flags EF_PPC64_ABI. */
207 unsigned int ppc_abiversion = 0;
209 /* Flags set on encountering toc relocs. */
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
215 /* Warn on emitting data to code sections. */
217 unsigned long last_insn;
221 /* The target specific pseudo-ops which we support. */
223 const pseudo_typeS md_pseudo_table[] =
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
238 { "bi", ppc_biei, 0 },
240 { "csect", ppc_csect, 0 },
241 { "dwsect", ppc_dwsect, 0 },
242 { "data", ppc_section, 'd' },
246 { "ei", ppc_biei, 1 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
251 { "ref", ppc_ref, 0 },
252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
258 { "llong", ppc_xcoff_cons, 3 },
259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
265 { "llong", cons, 8 },
266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
269 { "localentry", ppc_elf_localentry, 0 },
270 { "abiversion", ppc_elf_abiversion, 0 },
274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
289 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
291 { "machine", ppc_machine, 0 },
298 /* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
302 /* Structure to hold information about predefined registers. */
309 /* List of registers that are pre-defined:
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
336 dsisr has the value 18
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
342 The table is sorted. Suitable for searching by a binary search. */
344 static const struct pd_reg pre_defined_registers[] =
346 { "cr.0", 0 }, /* Condition Registers */
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
370 { "f.0", 0 }, /* Floating point registers */
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
504 /* Quantization registers used with pair single instructions. */
522 { "lr", 8 }, /* Link Register */
526 { "r.0", 0 }, /* General Purpose Registers */
559 { "r.sp", 1 }, /* Stack Pointer */
561 { "r.toc", 2 }, /* Pointer to the table of contents */
563 { "r0", 0 }, /* More general purpose registers */
596 { "rtoc", 2 }, /* Table of contents */
598 { "sdr1", 25 }, /* Storage Description Register 1 */
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 int middle, low, high;
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
828 return regs[middle].value;
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS *expressionP)
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
860 else if (!reg_names_p || !ISALPHA (name[0]))
863 c = get_symbol_name (&name);
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
869 /* Look to see if it's in the register table. */
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
875 /* Make the rest nice. */
876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
886 /* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
890 /* Whether to do the special parsing. */
891 static bfd_boolean cr_operand;
893 /* Names to recognize in a condition code. This table is sorted. */
894 static const struct pd_reg cr_names[] =
911 /* Parsing function. This returns non-zero if it recognized an
915 ppc_parse_name (const char *name, expressionS *exp)
924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
929 exp->X_op = O_constant;
930 exp->X_add_number = val;
935 /* Local variables. */
937 /* Whether to target xcoff64/elf64. */
938 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
940 /* Opcode hash table. */
941 static struct hash_control *ppc_hash;
943 /* Macro hash table. */
944 static struct hash_control *ppc_macro_hash;
947 /* What type of shared library support to use. */
948 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
950 /* Flags to set in the elf header. */
951 static flagword ppc_flags = 0;
953 /* Whether this is Solaris or not. */
954 #ifdef TARGET_SOLARIS_COMMENT
955 #define SOLARIS_P TRUE
957 #define SOLARIS_P FALSE
960 static bfd_boolean msolaris = SOLARIS_P;
965 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
971 /* Next subsegment to allocate within the .text segment. */
972 static subsegT ppc_text_subsegment = 2;
974 /* Linked list of csects in the text section. */
975 static symbolS *ppc_text_csects;
977 /* Next subsegment to allocate within the .data segment. */
978 static subsegT ppc_data_subsegment = 2;
980 /* Linked list of csects in the data section. */
981 static symbolS *ppc_data_csects;
983 /* The current csect. */
984 static symbolS *ppc_current_csect;
986 /* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991 static symbolS *ppc_toc_csect;
993 /* The first frag in the TOC subsegment. */
994 static fragS *ppc_toc_frag;
996 /* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998 static fragS *ppc_after_toc_frag;
1000 /* The current static block. */
1001 static symbolS *ppc_current_block;
1003 /* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006 static asection *ppc_coff_debug_section;
1008 /* Structure to set the length field of the dwarf sections. */
1009 struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1013 /* The subsection number. */
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1020 static struct dw_section {
1021 /* Corresponding section. */
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1030 #endif /* OBJ_XCOFF */
1034 /* Various sections that we need for PE coff support. */
1035 static segT ydata_section;
1036 static segT pdata_section;
1037 static segT reldata_section;
1038 static segT rdata_section;
1039 static segT tocdata_section;
1041 /* The current section and the previous section. See ppc_previous. */
1042 static segT ppc_previous_section;
1043 static segT ppc_current_section;
1048 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1049 #define PPC_APUINFO_ISEL 0x40
1050 #define PPC_APUINFO_PMR 0x41
1051 #define PPC_APUINFO_RFMCI 0x42
1052 #define PPC_APUINFO_CACHELCK 0x43
1053 #define PPC_APUINFO_SPE 0x100
1054 #define PPC_APUINFO_EFS 0x101
1055 #define PPC_APUINFO_BRLOCK 0x102
1056 #define PPC_APUINFO_VLE 0x104
1059 * We keep a list of APUinfo
1061 unsigned long *ppc_apuinfo_list;
1062 unsigned int ppc_apuinfo_num;
1063 unsigned int ppc_apuinfo_num_alloc;
1064 #endif /* OBJ_ELF */
1067 const char *const md_shortopts = "b:l:usm:K:VQ:";
1069 const char *const md_shortopts = "um:";
1071 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1072 const struct option md_longopts[] = {
1073 {"nops", required_argument, NULL, OPTION_NOPS},
1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1076 {NULL, no_argument, NULL, 0}
1078 const size_t md_longopts_size = sizeof (md_longopts);
1081 md_parse_option (int c, const char *arg)
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1094 /* Solaris as takes -le (presumably for little endian). For completeness
1095 sake, recognize -be also. */
1096 if (strcmp (arg, "e") == 0)
1098 target_big_endian = 0;
1099 set_target_endian = 1;
1100 if (ppc_cpu & PPC_OPCODE_VLE)
1101 as_bad (_("the use of -mvle requires big endian."));
1109 if (strcmp (arg, "e") == 0)
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1120 /* Recognize -K PIC. */
1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1134 if (strcmp (arg, "64") == 0)
1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
1141 as_fatal (_("%s unsupported"), "-a64");
1144 else if (strcmp (arg, "32") == 0)
1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1155 if (strcmp (arg, "vle") == 0)
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1160 as_bad (_("the use of -mvle requires -a32."));
1164 else if (strcmp (arg, "regnames") == 0)
1167 else if (strcmp (arg, "no-regnames") == 0)
1168 reg_names_p = FALSE;
1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
1173 else if (strcmp (arg, "relocatable") == 0)
1175 shlib = SHLIB_MRELOCATABLE;
1176 ppc_flags |= EF_PPC_RELOCATABLE;
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1181 shlib = SHLIB_MRELOCATABLE;
1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1185 /* -memb, set embedded bit. */
1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1189 /* -mlittle/-mbig set the endianness. */
1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
1193 target_big_endian = 0;
1194 set_target_endian = 1;
1195 if (ppc_cpu & PPC_OPCODE_VLE)
1196 as_bad (_("the use of -mvle requires big endian."));
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1205 else if (strcmp (arg, "solaris") == 0)
1208 ppc_comment_chars = ppc_solaris_comment_chars;
1211 else if (strcmp (arg, "no-solaris") == 0)
1214 ppc_comment_chars = ppc_eabi_comment_chars;
1219 as_bad (_("invalid switch -m%s"), arg);
1225 /* -V: SVR4 argument to print version ID. */
1227 print_version_id ();
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1248 nop_limit = strtoul (optarg, &end, 0);
1250 as_bad (_("--nops needs a numeric argument"));
1265 md_show_usage (FILE *stream)
1267 fprintf (stream, _("\
1269 -a32 generate ELF32/XCOFF32\n\
1270 -a64 generate ELF64/XCOFF64\n\
1272 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273 -mpwr generate code for POWER (RIOS1)\n\
1274 -m601 generate code for PowerPC 601\n\
1275 -mppc, -mppc32, -m603, -m604\n\
1276 generate code for PowerPC 603/604\n\
1277 -m403 generate code for PowerPC 403\n\
1278 -m405 generate code for PowerPC 405\n\
1279 -m440 generate code for PowerPC 440\n\
1280 -m464 generate code for PowerPC 464\n\
1281 -m476 generate code for PowerPC 476\n\
1282 -m7400, -m7410, -m7450, -m7455\n\
1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284 -m750cl generate code for PowerPC 750cl\n\
1285 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1286 fprintf (stream, _("\
1287 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289 -mbooke generate code for 32-bit PowerPC BookE\n\
1290 -ma2 generate code for A2 architecture\n\
1291 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1292 -mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1295 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1296 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1297 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1298 -mcell generate code for Cell Broadband Engine architecture\n\
1299 -mcom generate code Power/PowerPC common instructions\n\
1300 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1301 fprintf (stream, _("\
1302 -maltivec generate code for AltiVec\n\
1303 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1304 -mhtm generate code for Hardware Transactional Memory\n\
1305 -me300 generate code for PowerPC e300 family\n\
1306 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1307 -me500mc, generate code for Freescale e500mc core complex\n\
1308 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1309 -me5500, generate code for Freescale e5500 core complex\n\
1310 -me6500, generate code for Freescale e6500 core complex\n\
1311 -mspe generate code for Motorola SPE instructions\n\
1312 -mvle generate code for Freescale VLE instructions\n\
1313 -mtitan generate code for AppliedMicro Titan core complex\n\
1314 -mregnames Allow symbolic names for registers\n\
1315 -mno-regnames Do not allow symbolic names for registers\n"));
1317 fprintf (stream, _("\
1318 -mrelocatable support for GCC's -mrelocatble option\n\
1319 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1320 -memb set PPC_EMB bit in ELF flags\n\
1321 -mlittle, -mlittle-endian, -le\n\
1322 generate code for a little endian machine\n\
1323 -mbig, -mbig-endian, -be\n\
1324 generate code for a big endian machine\n\
1325 -msolaris generate code for Solaris\n\
1326 -mno-solaris do not generate code for Solaris\n\
1327 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1328 -V print assembler version number\n\
1329 -Qy, -Qn ignored\n"));
1331 fprintf (stream, _("\
1332 -nops=count when aligning, more than COUNT nops uses a branch\n\
1333 -ppc476-workaround warn if emitting data to code sections\n"));
1336 /* Set ppc_cpu if it is not already set. */
1341 const char *default_os = TARGET_OS;
1342 const char *default_cpu = TARGET_CPU;
1344 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1347 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1348 else if (strncmp (default_os, "aix", 3) == 0
1349 && default_os[3] >= '4' && default_os[3] <= '9')
1350 ppc_cpu |= PPC_OPCODE_COMMON;
1351 else if (strncmp (default_os, "aix3", 4) == 0)
1352 ppc_cpu |= PPC_OPCODE_POWER;
1353 else if (strcmp (default_cpu, "rs6000") == 0)
1354 ppc_cpu |= PPC_OPCODE_POWER;
1355 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1356 ppc_cpu |= PPC_OPCODE_PPC;
1358 as_fatal (_("unknown default cpu = %s, os = %s"),
1359 default_cpu, default_os);
1363 /* Figure out the BFD architecture to use. This function and ppc_mach
1364 are called well before md_begin, when the output file is opened. */
1366 enum bfd_architecture
1369 const char *default_cpu = TARGET_CPU;
1372 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1375 return bfd_arch_powerpc;
1376 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1377 return bfd_arch_rs6000;
1378 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1380 if (strcmp (default_cpu, "rs6000") == 0)
1381 return bfd_arch_rs6000;
1382 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1383 return bfd_arch_powerpc;
1386 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1387 return bfd_arch_unknown;
1394 return bfd_mach_ppc64;
1395 else if (ppc_arch () == bfd_arch_rs6000)
1396 return bfd_mach_rs6k;
1397 else if (ppc_cpu & PPC_OPCODE_TITAN)
1398 return bfd_mach_ppc_titan;
1399 else if (ppc_cpu & PPC_OPCODE_VLE)
1400 return bfd_mach_ppc_vle;
1402 return bfd_mach_ppc;
1406 ppc_target_format (void)
1410 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1412 return "xcoff-powermac";
1415 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1417 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1423 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1424 # elif defined (TE_VXWORKS)
1425 return "elf32-powerpc-vxworks";
1427 return (target_big_endian
1428 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1429 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1434 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1435 Return TRUE if there's a problem, otherwise FALSE. */
1438 insn_validate (const struct powerpc_opcode *op)
1440 const unsigned char *o;
1441 unsigned long omask = op->mask;
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1446 as_bad (_("mask trims opcode bits for %s"), op->name);
1450 /* The operands must not overlap the opcode or each other. */
1451 for (o = op->operands; *o; ++o)
1453 if (*o >= num_powerpc_operands)
1455 as_bad (_("operand index error for %s"), op->name);
1460 const struct powerpc_operand *operand = &powerpc_operands[*o];
1461 if (operand->shift != (int) PPC_OPSHIFT_INV)
1465 if (operand->shift >= 0)
1466 mask = operand->bitm << operand->shift;
1468 mask = operand->bitm >> -operand->shift;
1471 as_bad (_("operand %d overlap in %s"),
1472 (int) (o - op->operands), op->name);
1482 /* Insert opcodes and macros into hash tables. Called at startup and
1483 for .machine pseudo. */
1486 ppc_setup_opcodes (void)
1488 const struct powerpc_opcode *op;
1489 const struct powerpc_opcode *op_end;
1490 const struct powerpc_macro *macro;
1491 const struct powerpc_macro *macro_end;
1492 bfd_boolean bad_insn = FALSE;
1494 if (ppc_hash != NULL)
1495 hash_die (ppc_hash);
1496 if (ppc_macro_hash != NULL)
1497 hash_die (ppc_macro_hash);
1499 /* Insert the opcodes into a hash table. */
1500 ppc_hash = hash_new ();
1502 if (ENABLE_CHECKING)
1506 /* An index into powerpc_operands is stored in struct fix
1507 fx_pcrel_adjust which is 8 bits wide. */
1508 gas_assert (num_powerpc_operands < 256);
1510 /* Check operand masks. Code here and in the disassembler assumes
1511 all the 1's in the mask are contiguous. */
1512 for (i = 0; i < num_powerpc_operands; ++i)
1514 unsigned long mask = powerpc_operands[i].bitm;
1515 unsigned long right_bit;
1518 right_bit = mask & -mask;
1520 right_bit = mask & -mask;
1521 if (mask != right_bit)
1523 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1526 for (j = i + 1; j < num_powerpc_operands; ++j)
1527 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1528 sizeof (powerpc_operands[0])) == 0)
1530 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1537 op_end = powerpc_opcodes + powerpc_num_opcodes;
1538 for (op = powerpc_opcodes; op < op_end; op++)
1540 if (ENABLE_CHECKING)
1542 if (op != powerpc_opcodes)
1544 int old_opcode = PPC_OP (op[-1].opcode);
1545 int new_opcode = PPC_OP (op[0].opcode);
1547 #ifdef PRINT_OPCODE_TABLE
1548 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1549 op->name, (unsigned int) (op - powerpc_opcodes),
1550 (unsigned int) new_opcode, (unsigned int) op->opcode,
1551 (unsigned int) op->mask, (unsigned long long) op->flags);
1554 /* The major opcodes had better be sorted. Code in the
1555 disassembler assumes the insns are sorted according to
1557 if (new_opcode < old_opcode)
1559 as_bad (_("major opcode is not sorted for %s"),
1564 bad_insn |= insn_validate (op);
1567 if ((ppc_cpu & op->flags) != 0
1568 && !(ppc_cpu & op->deprecated))
1572 retval = hash_insert (ppc_hash, op->name, (void *) op);
1575 as_bad (_("duplicate instruction %s"),
1582 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1583 for (op = powerpc_opcodes; op < op_end; op++)
1584 hash_insert (ppc_hash, op->name, (void *) op);
1586 op_end = vle_opcodes + vle_num_opcodes;
1587 for (op = vle_opcodes; op < op_end; op++)
1589 if (ENABLE_CHECKING)
1591 if (op != vle_opcodes)
1593 unsigned old_seg, new_seg;
1595 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1596 old_seg = VLE_OP_TO_SEG (old_seg);
1597 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1598 new_seg = VLE_OP_TO_SEG (new_seg);
1600 #ifdef PRINT_OPCODE_TABLE
1601 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1602 op->name, (unsigned int) (op - powerpc_opcodes),
1603 (unsigned int) new_seg, (unsigned int) op->opcode,
1604 (unsigned int) op->mask, (unsigned long long) op->flags);
1606 /* The major opcodes had better be sorted. Code in the
1607 disassembler assumes the insns are sorted according to
1609 if (new_seg < old_seg)
1611 as_bad (_("major opcode is not sorted for %s"),
1617 bad_insn |= insn_validate (op);
1620 if ((ppc_cpu & op->flags) != 0
1621 && !(ppc_cpu & op->deprecated))
1625 retval = hash_insert (ppc_hash, op->name, (void *) op);
1628 as_bad (_("duplicate instruction %s"),
1635 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1636 for (op = vle_opcodes; op < op_end; op++)
1637 hash_insert (ppc_hash, op->name, (void *) op);
1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1650 if (retval != (const char *) NULL)
1652 as_bad (_("duplicate macro %s"), macro->name);
1662 /* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1680 ppc_setup_opcodes ();
1682 /* Tell the main code what the endianness is if it is not overridden
1684 if (!set_target_endian)
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1696 ppc_text_csects = symbol_make ("dummy\001");
1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1698 ppc_data_csects = symbol_make ("dummy\001");
1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1704 ppc_current_section = text_section;
1705 ppc_previous_section = 0;
1714 if (ppc_apuinfo_list == NULL)
1717 /* Ok, so write the section info out. We have this layout:
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
1736 /* Create the .PPC.EMB.apuinfo section. */
1737 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1738 bfd_set_section_flags (stdoutput,
1740 SEC_HAS_CONTENTS | SEC_READONLY);
1743 md_number_to_chars (p, (valueT) 8, 4);
1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1752 strcpy (p, "APUinfo");
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1760 frag_align (2, 0, 0);
1762 /* We probably can't restore the current segment, for there likely
1765 subseg_set (seg, subseg);
1770 /* Insert an operand value into an instruction. */
1772 static unsigned long
1773 ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1780 long min, max, right;
1782 max = operand->bitm;
1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1788 /* Extend the allowed range for addis to [-65536, 65535].
1789 Similarly for some VLE high part insns. For 64-bit it
1790 would be good to disable this for signed fields since the
1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
1796 Use the same extended range for cmpli, to allow at least
1798 min = ~max & -right;
1800 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1802 max = (max >> 1) & -right;
1803 min = ~max & -right;
1806 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1809 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1818 /* Some people write constants with the sign extension done by
1819 hand but only up to 32 bits. This shouldn't really be valid,
1820 but, to permit this code to assemble on a 64-bit host, we
1821 sign extend the 32-bit value to 64 bits if so doing makes the
1824 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1825 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1826 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1827 val = val - 0x80000000 - 0x80000000;
1829 /* Similarly, people write expressions like ~(1<<15), and expect
1830 this to be OK for a 32-bit unsigned value. */
1832 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1833 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1834 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1835 val = val + 0x80000000 + 0x80000000;
1839 || (val & (right - 1)) != 0)
1840 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1843 if (operand->insert)
1848 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1849 if (errmsg != (const char *) NULL)
1850 as_bad_where (file, line, "%s", errmsg);
1852 else if (operand->shift >= 0)
1853 insn |= ((long) val & operand->bitm) << operand->shift;
1855 insn |= ((long) val & operand->bitm) >> -operand->shift;
1862 /* Parse @got, etc. and return the desired relocation. */
1863 static bfd_reloc_code_real_type
1864 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1868 unsigned int length : 8;
1869 unsigned int valid32 : 1;
1870 unsigned int valid64 : 1;
1879 const struct map_bfd *ptr;
1881 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1882 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1883 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1885 static const struct map_bfd mapping[] = {
1886 MAP ("l", BFD_RELOC_LO16),
1887 MAP ("h", BFD_RELOC_HI16),
1888 MAP ("ha", BFD_RELOC_HI16_S),
1889 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1890 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1891 MAP ("got", BFD_RELOC_16_GOTOFF),
1892 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1893 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1894 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1895 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1896 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1897 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1898 MAP ("copy", BFD_RELOC_PPC_COPY),
1899 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1900 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1901 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1902 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1903 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1904 MAP ("tls", BFD_RELOC_PPC_TLS),
1905 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1906 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1907 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1908 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1909 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1910 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1911 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1912 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1913 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1914 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1915 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1916 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1917 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1918 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1919 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1920 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1921 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1922 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1923 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1924 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1925 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1926 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1927 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1928 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1929 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1930 MAP32 ("fixup", BFD_RELOC_CTOR),
1931 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1933 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1935 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1936 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1937 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1938 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1939 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1940 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1941 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1942 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1943 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1944 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1945 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1946 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1947 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1948 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1949 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1950 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1951 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1952 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1953 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1954 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1955 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1956 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1957 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1958 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1959 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1960 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1961 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1962 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1963 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1964 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1965 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1966 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1967 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1968 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1969 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1970 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1971 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1972 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1973 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1974 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1975 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
1976 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1977 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1978 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1979 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1980 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1981 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1982 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
1986 return BFD_RELOC_NONE;
1988 for (ch = *str, str2 = ident;
1989 (str2 < ident + sizeof (ident) - 1
1990 && (ISALNUM (ch) || ch == '@'));
1993 *str2++ = TOLOWER (ch);
2000 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2001 if (ch == ptr->string[0]
2002 && len == ptr->length
2003 && memcmp (ident, ptr->string, ptr->length) == 0
2004 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2006 int reloc = ptr->reloc;
2008 if (!ppc_obj64 && exp_p->X_add_number != 0)
2012 case BFD_RELOC_16_GOTOFF:
2013 case BFD_RELOC_LO16_GOTOFF:
2014 case BFD_RELOC_HI16_GOTOFF:
2015 case BFD_RELOC_HI16_S_GOTOFF:
2016 as_warn (_("identifier+constant@got means "
2017 "identifier@got+constant"));
2020 case BFD_RELOC_PPC_GOT_TLSGD16:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2023 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2024 case BFD_RELOC_PPC_GOT_TLSLD16:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2027 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2028 case BFD_RELOC_PPC_GOT_DTPREL16:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2031 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2032 case BFD_RELOC_PPC_GOT_TPREL16:
2033 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2035 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2036 as_bad (_("symbol+offset not supported for got tls"));
2041 /* Now check for identifier@suffix+constant. */
2042 if (*str == '-' || *str == '+')
2044 char *orig_line = input_line_pointer;
2045 expressionS new_exp;
2047 input_line_pointer = str;
2048 expression (&new_exp);
2049 if (new_exp.X_op == O_constant)
2051 exp_p->X_add_number += new_exp.X_add_number;
2052 str = input_line_pointer;
2055 if (&input_line_pointer != str_p)
2056 input_line_pointer = orig_line;
2060 if (reloc == (int) BFD_RELOC_PPC64_TOC
2061 && exp_p->X_op == O_symbol
2062 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2064 /* Change the symbol so that the dummy .TOC. symbol can be
2065 omitted from the object file. */
2066 exp_p->X_add_symbol = &abs_symbol;
2069 return (bfd_reloc_code_real_type) reloc;
2072 return BFD_RELOC_NONE;
2075 /* Support @got, etc. on constants emitted via .short, .int etc. */
2077 bfd_reloc_code_real_type
2078 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2081 if (nbytes >= 2 && *input_line_pointer == '@')
2082 return ppc_elf_suffix (&input_line_pointer, exp);
2083 return BFD_RELOC_NONE;
2086 /* Warn when emitting data to code sections, unless we are emitting
2087 a relocation that ld --ppc476-workaround uses to recognise data
2088 *and* there was an unconditional branch prior to the data. */
2091 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2092 unsigned int nbytes, fixS *fix)
2095 && (now_seg->flags & SEC_CODE) != 0
2098 || !(fix->fx_r_type == BFD_RELOC_32
2099 || fix->fx_r_type == BFD_RELOC_CTOR
2100 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2101 || !(last_seg == now_seg && last_subseg == now_subseg)
2102 || !((last_insn & (0x3f << 26)) == (18u << 26)
2103 || ((last_insn & (0x3f << 26)) == (16u << 26)
2104 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2105 || ((last_insn & (0x3f << 26)) == (19u << 26)
2106 && (last_insn & (0x3ff << 1)) == (16u << 1)
2107 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2109 /* Flag that we've warned. */
2113 as_warn (_("data in executable section"));
2117 /* Solaris pseduo op to change to the .rodata section. */
2119 ppc_elf_rdata (int xxx)
2121 char *save_line = input_line_pointer;
2122 static char section[] = ".rodata\n";
2124 /* Just pretend this is .section .rodata */
2125 input_line_pointer = section;
2126 obj_elf_section (xxx);
2128 input_line_pointer = save_line;
2131 /* Pseudo op to make file scope bss items. */
2133 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2146 c = get_symbol_name (&name);
2148 /* Just after name is now '\0'. */
2149 p = input_line_pointer;
2151 SKIP_WHITESPACE_AFTER_NAME ();
2152 if (*input_line_pointer != ',')
2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2155 ignore_rest_of_line ();
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2176 as_warn (_("ignoring bad alignment"));
2182 symbolP = symbol_find_or_make (name);
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2200 ignore_rest_of_line ();
2206 old_subsec = now_subseg;
2209 /* Convert to a power of 2 alignment. */
2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2213 as_bad (_("common alignment not a power of 2"));
2214 ignore_rest_of_line ();
2221 record_alignment (bss_section, align2);
2222 subseg_set (bss_section, 1);
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2237 /* Pseudo op to set symbol local entry point. */
2239 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2242 char c = get_symbol_name (&name);
2247 elf_symbol_type *elfsym;
2249 p = input_line_pointer;
2251 SKIP_WHITESPACE_AFTER_NAME ();
2252 if (*input_line_pointer != ',')
2255 as_bad (_("expected comma after name `%s' in .localentry directive"),
2258 ignore_rest_of_line ();
2261 input_line_pointer++;
2263 if (exp.X_op == O_absent)
2265 as_bad (_("missing expression in .localentry directive"));
2266 exp.X_op = O_constant;
2267 exp.X_add_number = 0;
2270 sym = symbol_find_or_make (name);
2273 if (resolve_expression (&exp)
2274 && exp.X_op == O_constant)
2276 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2278 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2279 as_bad (_(".localentry expression for `%s' "
2280 "is not a valid power of 2"), S_GET_NAME (sym));
2283 bfdsym = symbol_get_bfdsym (sym);
2284 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2285 gas_assert (elfsym);
2286 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2287 elfsym->internal_elf_sym.st_other |= encoded;
2288 if (ppc_abiversion == 0)
2293 as_bad (_(".localentry expression for `%s' "
2294 "does not evaluate to a constant"), S_GET_NAME (sym));
2296 demand_empty_rest_of_line ();
2299 /* Pseudo op to set ABI version. */
2301 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2306 if (exp.X_op == O_absent)
2308 as_bad (_("missing expression in .abiversion directive"));
2309 exp.X_op = O_constant;
2310 exp.X_add_number = 0;
2313 if (resolve_expression (&exp)
2314 && exp.X_op == O_constant)
2315 ppc_abiversion = exp.X_add_number;
2317 as_bad (_(".abiversion expression does not evaluate to a constant"));
2318 demand_empty_rest_of_line ();
2321 /* Set ABI version in output file. */
2325 if (ppc_obj64 && ppc_abiversion != 0)
2327 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2328 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2332 /* Validate any relocations emitted for -mrelocatable, possibly adding
2333 fixups for word relocations in writable segments, so we can adjust
2336 ppc_elf_validate_fix (fixS *fixp, segT seg)
2338 if (fixp->fx_done || fixp->fx_pcrel)
2347 case SHLIB_MRELOCATABLE:
2348 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2352 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2355 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2356 && (seg->flags & SEC_LOAD) != 0
2357 && strcmp (segment_name (seg), ".got2") != 0
2358 && strcmp (segment_name (seg), ".dtors") != 0
2359 && strcmp (segment_name (seg), ".ctors") != 0
2360 && strcmp (segment_name (seg), ".fixup") != 0
2361 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2362 && strcmp (segment_name (seg), ".eh_frame") != 0
2363 && strcmp (segment_name (seg), ".ex_shared") != 0)
2365 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2366 || fixp->fx_r_type != BFD_RELOC_CTOR)
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
2369 _("relocation cannot be done when using -mrelocatable"));
2376 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2377 function descriptor sym if the corresponding code sym is used. */
2380 ppc_frob_file_before_adjust (void)
2388 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2394 name = S_GET_NAME (symp);
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2402 dotname = concat (".", name, (char *) NULL);
2403 dotsym = symbol_find_noref (dotname, 1);
2405 if (dotsym != NULL && (symbol_used_p (dotsym)
2406 || symbol_used_in_reloc_p (dotsym)))
2407 symbol_mark_used (symp);
2411 toc = bfd_get_section_by_name (stdoutput, ".toc");
2413 && toc_reloc_types != has_large_toc_reloc
2414 && bfd_section_size (stdoutput, toc) > 0x10000)
2415 as_warn (_("TOC section size exceeds 64k"));
2418 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2419 emitted. Other uses of .TOC. will cause the symbol to be marked
2420 with BSF_KEEP in md_apply_fix. */
2423 ppc_elf_adjust_symtab (void)
2428 symp = symbol_find (".TOC.");
2431 asymbol *bsym = symbol_get_bfdsym (symp);
2432 if ((bsym->flags & BSF_KEEP) == 0)
2433 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2437 #endif /* OBJ_ELF */
2442 * Summary of parse_toc_entry.
2444 * in: Input_line_pointer points to the '[' in one of:
2446 * [toc] [tocv] [toc32] [toc64]
2448 * Anything else is an error of one kind or another.
2451 * return value: success or failure
2452 * toc_kind: kind of toc reference
2453 * input_line_pointer:
2454 * success: first char after the ']'
2455 * failure: unchanged
2459 * [toc] - rv == success, toc_kind = default_toc
2460 * [tocv] - rv == success, toc_kind = data_in_toc
2461 * [toc32] - rv == success, toc_kind = must_be_32
2462 * [toc64] - rv == success, toc_kind = must_be_64
2466 enum toc_size_qualifier
2468 default_toc, /* The toc cell constructed should be the system default size */
2469 data_in_toc, /* This is a direct reference to a toc cell */
2470 must_be_32, /* The toc cell constructed must be 32 bits wide */
2471 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2480 enum toc_size_qualifier t;
2482 /* Save the input_line_pointer. */
2483 start = input_line_pointer;
2485 /* Skip over the '[' , and whitespace. */
2486 ++input_line_pointer;
2489 /* Find the spelling of the operand. */
2490 c = get_symbol_name (&toc_spec);
2492 if (strcmp (toc_spec, "toc") == 0)
2496 else if (strcmp (toc_spec, "tocv") == 0)
2500 else if (strcmp (toc_spec, "toc32") == 0)
2504 else if (strcmp (toc_spec, "toc64") == 0)
2510 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2511 *input_line_pointer = c;
2512 input_line_pointer = start;
2516 /* Now find the ']'. */
2517 *input_line_pointer = c;
2519 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2520 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2524 as_bad (_("syntax error: expected `]', found `%c'"), c);
2525 input_line_pointer = start;
2534 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2535 /* See whether a symbol is in the TOC section. */
2538 ppc_is_toc_sym (symbolS *sym)
2541 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2542 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2545 const char *sname = segment_name (S_GET_SEGMENT (sym));
2547 return strcmp (sname, ".toc") == 0;
2549 return strcmp (sname, ".got") == 0;
2552 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2556 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2558 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2562 /* Check we don't already exist. */
2563 for (i = 0; i < ppc_apuinfo_num; i++)
2564 if (ppc_apuinfo_list[i] == APUID (apu, version))
2567 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2569 if (ppc_apuinfo_num_alloc == 0)
2571 ppc_apuinfo_num_alloc = 4;
2572 ppc_apuinfo_list = (unsigned long *)
2573 xmalloc (sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2577 ppc_apuinfo_num_alloc += 4;
2578 ppc_apuinfo_list = (unsigned long *) xrealloc (ppc_apuinfo_list,
2579 sizeof (unsigned long) * ppc_apuinfo_num_alloc);
2582 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2588 /* We need to keep a list of fixups. We can't simply generate them as
2589 we go, because that would require us to first create the frag, and
2590 that would screw up references to ``.''. */
2596 bfd_reloc_code_real_type reloc;
2599 #define MAX_INSN_FIXUPS (5)
2602 #define E_OR2I_INSN 0x7000C000
2603 #define E_AND2I_DOT_INSN 0x7000C800
2604 #define E_OR2IS_INSN 0x7000D000
2605 #define E_LIS_INSN 0x7000E000
2606 #define E_AND2IS_DOT_INSN 0x7000E800
2609 #define E_ADD2I_DOT_INSN 0x70008800
2610 #define E_ADD2IS_INSN 0x70009000
2611 #define E_CMP16I_INSN 0x70009800
2612 #define E_MULL2I_INSN 0x7000A000
2613 #define E_CMPL16I_INSN 0x7000A800
2614 #define E_CMPH16I_INSN 0x7000B000
2615 #define E_CMPHL16I_INSN 0x7000B800
2617 /* This routine is called for each instruction to be assembled. */
2620 md_assemble (char *str)
2623 const struct powerpc_opcode *opcode;
2625 const unsigned char *opindex_ptr;
2629 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2634 unsigned int insn_length;
2636 /* Get the opcode. */
2637 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2642 /* Look up the opcode in the hash table. */
2643 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2644 if (opcode == (const struct powerpc_opcode *) NULL)
2646 const struct powerpc_macro *macro;
2648 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2649 if (macro == (const struct powerpc_macro *) NULL)
2650 as_bad (_("unrecognized opcode: `%s'"), str);
2652 ppc_macro (s, macro);
2657 insn = opcode->opcode;
2660 while (ISSPACE (*str))
2663 /* PowerPC operands are just expressions. The only real issue is
2664 that a few operand types are optional. All cases which might use
2665 an optional operand separate the operands only with commas (in some
2666 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2667 have optional operands). Most instructions with optional operands
2668 have only one. Those that have more than one optional operand can
2669 take either all their operands or none. So, before we start seriously
2670 parsing the operands, we check to see if we have optional operands,
2671 and if we do, we count the number of commas to see which operands
2672 have been omitted. */
2674 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2676 const struct powerpc_operand *operand;
2678 operand = &powerpc_operands[*opindex_ptr];
2679 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2681 unsigned int opcount;
2682 unsigned int num_operands_expected;
2684 /* There is an optional operand. Count the number of
2685 commas in the input line. */
2692 while ((s = strchr (s, ',')) != (char *) NULL)
2699 /* Compute the number of expected operands.
2700 Do not count fake operands. */
2701 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2702 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2703 ++ num_operands_expected;
2705 /* If there are fewer operands in the line then are called
2706 for by the instruction, we want to skip the optional
2708 if (opcount < num_operands_expected)
2715 /* Gather the operands. */
2719 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2721 const struct powerpc_operand *operand;
2727 if (next_opindex == 0)
2728 operand = &powerpc_operands[*opindex_ptr];
2731 operand = &powerpc_operands[next_opindex];
2736 /* If this is a fake operand, then we do not expect anything
2738 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2740 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2741 if (errmsg != (const char *) NULL)
2742 as_bad ("%s", errmsg);
2746 /* If this is an optional operand, and we are skipping it, just
2748 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2751 long val = ppc_optional_operand_value (operand);
2752 if (operand->insert)
2754 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2755 if (errmsg != (const char *) NULL)
2756 as_bad ("%s", errmsg);
2758 else if (operand->shift >= 0)
2759 insn |= ((long) val & operand->bitm) << operand->shift;
2761 insn |= ((long) val & operand->bitm) >> -operand->shift;
2763 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2764 next_opindex = *opindex_ptr + 1;
2768 /* Gather the operand. */
2769 hold = input_line_pointer;
2770 input_line_pointer = str;
2773 if (*input_line_pointer == '[')
2775 /* We are expecting something like the second argument here:
2777 * lwz r4,[toc].GS.0.static_int(rtoc)
2778 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2779 * The argument following the `]' must be a symbol name, and the
2780 * register must be the toc register: 'rtoc' or '2'
2782 * The effect is to 0 as the displacement field
2783 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2784 * the appropriate variation) reloc against it based on the symbol.
2785 * The linker will build the toc, and insert the resolved toc offset.
2788 * o The size of the toc entry is currently assumed to be
2789 * 32 bits. This should not be assumed to be a hard coded
2791 * o In an effort to cope with a change from 32 to 64 bits,
2792 * there are also toc entries that are specified to be
2793 * either 32 or 64 bits:
2794 * lwz r4,[toc32].GS.0.static_int(rtoc)
2795 * lwz r4,[toc64].GS.0.static_int(rtoc)
2796 * These demand toc entries of the specified size, and the
2797 * instruction probably requires it.
2801 enum toc_size_qualifier toc_kind;
2802 bfd_reloc_code_real_type toc_reloc;
2804 /* Go parse off the [tocXX] part. */
2805 valid_toc = parse_toc_entry (&toc_kind);
2809 ignore_rest_of_line ();
2813 /* Now get the symbol following the ']'. */
2819 /* In this case, we may not have seen the symbol yet,
2820 since it is allowed to appear on a .extern or .globl
2821 or just be a label in the .data section. */
2822 toc_reloc = BFD_RELOC_PPC_TOC16;
2825 /* 1. The symbol must be defined and either in the toc
2826 section, or a global.
2827 2. The reloc generated must have the TOCDEFN flag set
2828 in upper bit mess of the reloc type.
2829 FIXME: It's a little confusing what the tocv
2830 qualifier can be used for. At the very least, I've
2831 seen three uses, only one of which I'm sure I can
2833 if (ex.X_op == O_symbol)
2835 gas_assert (ex.X_add_symbol != NULL);
2836 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2839 as_bad (_("[tocv] symbol is not a toc symbol"));
2843 toc_reloc = BFD_RELOC_PPC_TOC16;
2846 /* FIXME: these next two specifically specify 32/64 bit
2847 toc entries. We don't support them today. Is this
2848 the right way to say that? */
2849 toc_reloc = BFD_RELOC_NONE;
2850 as_bad (_("unimplemented toc32 expression modifier"));
2853 /* FIXME: see above. */
2854 toc_reloc = BFD_RELOC_NONE;
2855 as_bad (_("unimplemented toc64 expression modifier"));
2859 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2865 /* We need to generate a fixup for this expression. */
2866 if (fc >= MAX_INSN_FIXUPS)
2867 as_fatal (_("too many fixups"));
2869 fixups[fc].reloc = toc_reloc;
2870 fixups[fc].exp = ex;
2871 fixups[fc].opindex = *opindex_ptr;
2874 /* Ok. We've set up the fixup for the instruction. Now make it
2875 look like the constant 0 was found here. */
2877 ex.X_op = O_constant;
2878 ex.X_add_number = 0;
2879 ex.X_add_symbol = NULL;
2880 ex.X_op_symbol = NULL;
2887 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2888 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2889 || !register_name (&ex))
2891 char save_lex = lex_type['%'];
2893 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2894 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2897 lex_type['%'] |= LEX_BEGIN_NAME;
2901 lex_type['%'] = save_lex;
2905 str = input_line_pointer;
2906 input_line_pointer = hold;
2908 if (ex.X_op == O_illegal)
2909 as_bad (_("illegal operand"));
2910 else if (ex.X_op == O_absent)
2911 as_bad (_("missing operand"));
2912 else if (ex.X_op == O_register)
2914 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2915 ppc_cpu, (char *) NULL, 0);
2917 else if (ex.X_op == O_constant)
2920 /* Allow @HA, @L, @H on constants. */
2921 bfd_reloc_code_real_type reloc;
2922 char *orig_str = str;
2924 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
2931 case BFD_RELOC_LO16:
2932 ex.X_add_number &= 0xffff;
2933 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2934 ex.X_add_number = SEX16 (ex.X_add_number);
2937 case BFD_RELOC_HI16:
2938 if (REPORT_OVERFLOW_HI && ppc_obj64)
2940 /* PowerPC64 @h is tested for overflow. */
2941 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2942 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2944 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2946 = ((addressT) ex.X_add_number ^ sign) - sign;
2952 case BFD_RELOC_PPC64_ADDR16_HIGH:
2953 ex.X_add_number = PPC_HI (ex.X_add_number);
2954 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2955 ex.X_add_number = SEX16 (ex.X_add_number);
2958 case BFD_RELOC_HI16_S:
2959 if (REPORT_OVERFLOW_HI && ppc_obj64)
2961 /* PowerPC64 @ha is tested for overflow. */
2963 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2964 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2966 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2968 = ((addressT) ex.X_add_number ^ sign) - sign;
2974 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2975 ex.X_add_number = PPC_HA (ex.X_add_number);
2976 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2977 ex.X_add_number = SEX16 (ex.X_add_number);
2980 case BFD_RELOC_PPC64_HIGHER:
2981 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2982 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2983 ex.X_add_number = SEX16 (ex.X_add_number);
2986 case BFD_RELOC_PPC64_HIGHER_S:
2987 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2988 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2989 ex.X_add_number = SEX16 (ex.X_add_number);
2992 case BFD_RELOC_PPC64_HIGHEST:
2993 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2994 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2995 ex.X_add_number = SEX16 (ex.X_add_number);
2998 case BFD_RELOC_PPC64_HIGHEST_S:
2999 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3000 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3001 ex.X_add_number = SEX16 (ex.X_add_number);
3004 #endif /* OBJ_ELF */
3005 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3006 ppc_cpu, (char *) NULL, 0);
3010 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3012 if (ex.X_op == O_symbol && str[0] == '(')
3014 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3015 if (sym_name[0] == '.')
3018 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3020 expressionS tls_exp;
3022 hold = input_line_pointer;
3023 input_line_pointer = str + 1;
3024 expression (&tls_exp);
3025 if (tls_exp.X_op == O_symbol)
3027 reloc = BFD_RELOC_NONE;
3028 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3030 reloc = BFD_RELOC_PPC_TLSGD;
3031 input_line_pointer += 7;
3033 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3035 reloc = BFD_RELOC_PPC_TLSLD;
3036 input_line_pointer += 7;
3038 if (reloc != BFD_RELOC_NONE)
3041 str = input_line_pointer;
3043 if (fc >= MAX_INSN_FIXUPS)
3044 as_fatal (_("too many fixups"));
3045 fixups[fc].exp = tls_exp;
3046 fixups[fc].opindex = *opindex_ptr;
3047 fixups[fc].reloc = reloc;
3051 input_line_pointer = hold;
3055 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3057 /* Some TLS tweaks. */
3063 case BFD_RELOC_PPC_TLS:
3064 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3065 as_bad (_("@tls may not be used with \"%s\" operands"),
3067 else if (operand->shift != 11)
3068 as_bad (_("@tls may only be used in last operand"));
3070 insn = ppc_insert_operand (insn, operand,
3072 ppc_cpu, (char *) NULL, 0);
3075 /* We'll only use the 32 (or 64) bit form of these relocations
3076 in constants. Instructions get the 16 bit form. */
3077 case BFD_RELOC_PPC_DTPREL:
3078 reloc = BFD_RELOC_PPC_DTPREL16;
3080 case BFD_RELOC_PPC_TPREL:
3081 reloc = BFD_RELOC_PPC_TPREL16;
3086 if (opcode->opcode == (19 << 26) + (2 << 1)
3087 && reloc == BFD_RELOC_HI16_S)
3088 reloc = BFD_RELOC_PPC_REL16DX_HA;
3090 /* If VLE-mode convert LO/HI/HA relocations. */
3091 if (opcode->flags & PPC_OPCODE_VLE)
3093 int tmp_insn = insn & opcode->mask;
3095 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3096 || tmp_insn == E_AND2I_DOT_INSN
3097 || tmp_insn == E_OR2IS_INSN
3098 || tmp_insn == E_LIS_INSN
3099 || tmp_insn == E_AND2IS_DOT_INSN);
3102 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3103 || tmp_insn == E_ADD2IS_INSN
3104 || tmp_insn == E_CMP16I_INSN
3105 || tmp_insn == E_MULL2I_INSN
3106 || tmp_insn == E_CMPL16I_INSN
3107 || tmp_insn == E_CMPH16I_INSN
3108 || tmp_insn == E_CMPHL16I_INSN);
3115 case BFD_RELOC_PPC_EMB_SDA21:
3116 reloc = BFD_RELOC_PPC_VLE_SDA21;
3119 case BFD_RELOC_LO16:
3121 reloc = BFD_RELOC_PPC_VLE_LO16D;
3122 else if (use_a_reloc)
3123 reloc = BFD_RELOC_PPC_VLE_LO16A;
3126 case BFD_RELOC_HI16:
3128 reloc = BFD_RELOC_PPC_VLE_HI16D;
3129 else if (use_a_reloc)
3130 reloc = BFD_RELOC_PPC_VLE_HI16A;
3133 case BFD_RELOC_HI16_S:
3135 reloc = BFD_RELOC_PPC_VLE_HA16D;
3136 else if (use_a_reloc)
3137 reloc = BFD_RELOC_PPC_VLE_HA16A;
3140 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3142 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3145 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3147 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3150 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3152 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3157 #endif /* OBJ_ELF */
3159 if (reloc != BFD_RELOC_NONE)
3161 /* Determine a BFD reloc value based on the operand information.
3162 We are only prepared to turn a few of the operands into
3164 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3165 | PPC_OPERAND_ABSOLUTE)) != 0
3166 && operand->bitm == 0x3fffffc
3167 && operand->shift == 0)
3168 reloc = BFD_RELOC_PPC_B26;
3169 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3170 | PPC_OPERAND_ABSOLUTE)) != 0
3171 && operand->bitm == 0xfffc
3172 && operand->shift == 0)
3173 reloc = BFD_RELOC_PPC_B16;
3174 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3175 && operand->bitm == 0x1fe
3176 && operand->shift == -1)
3177 reloc = BFD_RELOC_PPC_VLE_REL8;
3178 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3179 && operand->bitm == 0xfffe
3180 && operand->shift == 0)
3181 reloc = BFD_RELOC_PPC_VLE_REL15;
3182 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3183 && operand->bitm == 0x1fffffe
3184 && operand->shift == 0)
3185 reloc = BFD_RELOC_PPC_VLE_REL24;
3186 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3187 && (operand->bitm & 0xfff0) == 0xfff0
3188 && operand->shift == 0)
3190 reloc = BFD_RELOC_16;
3191 #if defined OBJ_XCOFF || defined OBJ_ELF
3192 /* Note: the symbol may be not yet defined. */
3193 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3194 && ppc_is_toc_sym (ex.X_add_symbol))
3196 reloc = BFD_RELOC_PPC_TOC16;
3198 as_warn (_("assuming %s on symbol"),
3199 ppc_obj64 ? "@toc" : "@xgot");
3205 /* For the absolute forms of branches, convert the PC
3206 relative form back into the absolute. */
3207 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3211 case BFD_RELOC_PPC_B26:
3212 reloc = BFD_RELOC_PPC_BA26;
3214 case BFD_RELOC_PPC_B16:
3215 reloc = BFD_RELOC_PPC_BA16;
3218 case BFD_RELOC_PPC_B16_BRTAKEN:
3219 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3221 case BFD_RELOC_PPC_B16_BRNTAKEN:
3222 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3233 case BFD_RELOC_PPC_TOC16:
3234 toc_reloc_types |= has_small_toc_reloc;
3236 case BFD_RELOC_PPC64_TOC16_LO:
3237 case BFD_RELOC_PPC64_TOC16_HI:
3238 case BFD_RELOC_PPC64_TOC16_HA:
3239 toc_reloc_types |= has_large_toc_reloc;
3246 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3251 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3253 case BFD_RELOC_LO16:
3254 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3256 case BFD_RELOC_16_GOTOFF:
3257 reloc = BFD_RELOC_PPC64_GOT16_DS;
3259 case BFD_RELOC_LO16_GOTOFF:
3260 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3262 case BFD_RELOC_LO16_PLTOFF:
3263 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3265 case BFD_RELOC_16_BASEREL:
3266 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3268 case BFD_RELOC_LO16_BASEREL:
3269 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3271 case BFD_RELOC_PPC_TOC16:
3272 reloc = BFD_RELOC_PPC64_TOC16_DS;
3274 case BFD_RELOC_PPC64_TOC16_LO:
3275 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3277 case BFD_RELOC_PPC64_PLTGOT16:
3278 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3280 case BFD_RELOC_PPC64_PLTGOT16_LO:
3281 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3283 case BFD_RELOC_PPC_DTPREL16:
3284 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3286 case BFD_RELOC_PPC_DTPREL16_LO:
3287 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3289 case BFD_RELOC_PPC_TPREL16:
3290 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3292 case BFD_RELOC_PPC_TPREL16_LO:
3293 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3295 case BFD_RELOC_PPC_GOT_DTPREL16:
3296 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3297 case BFD_RELOC_PPC_GOT_TPREL16:
3298 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3301 as_bad (_("unsupported relocation for DS offset field"));
3307 /* We need to generate a fixup for this expression. */
3308 if (fc >= MAX_INSN_FIXUPS)
3309 as_fatal (_("too many fixups"));
3310 fixups[fc].exp = ex;
3311 fixups[fc].opindex = *opindex_ptr;
3312 fixups[fc].reloc = reloc;
3320 /* If expecting more operands, then we want to see "),". */
3321 if (*str == endc && opindex_ptr[1] != 0)
3325 while (ISSPACE (*str));
3329 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3337 /* The call to expression should have advanced str past any
3340 && (endc != ',' || *str != '\0'))
3343 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3345 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3353 while (ISSPACE (*str))
3357 as_bad (_("junk at end of line: `%s'"), str);
3360 /* Do we need/want an APUinfo section? */
3361 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3364 /* These are all version "1". */
3365 if (opcode->flags & PPC_OPCODE_SPE)
3366 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3367 if (opcode->flags & PPC_OPCODE_ISEL)
3368 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3369 if (opcode->flags & PPC_OPCODE_EFS)
3370 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3371 if (opcode->flags & PPC_OPCODE_BRLOCK)
3372 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3373 if (opcode->flags & PPC_OPCODE_PMR)
3374 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3375 if (opcode->flags & PPC_OPCODE_CACHELCK)
3376 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3377 if (opcode->flags & PPC_OPCODE_RFMCI)
3378 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3379 /* Only set the VLE flag if the instruction has been pulled via
3380 the VLE instruction set. This way the flag is guaranteed to
3381 be set for VLE-only instructions or for VLE-only processors,
3382 however it'll remain clear for dual-mode instructions on
3383 dual-mode and, more importantly, standard-mode processors. */
3384 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3385 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3389 /* Write out the instruction. */
3390 /* Differentiate between two and four byte insns. */
3391 if (ppc_mach () == bfd_mach_ppc_vle)
3393 if (PPC_OP_SE_VLE (insn))
3397 addr_mod = frag_now_fix () & 1;
3402 addr_mod = frag_now_fix () & 3;
3404 /* All instructions can start on a 2 byte boundary for VLE. */
3405 f = frag_more (insn_length);
3406 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3408 if (ppc_mach() == bfd_mach_ppc_vle)
3409 as_bad (_("instruction address is not a multiple of 2"));
3411 as_bad (_("instruction address is not a multiple of 4"));
3413 frag_now->insn_addr = addr_mod;
3414 frag_now->has_code = 1;
3415 md_number_to_chars (f, insn, insn_length);
3418 last_subseg = now_subseg;
3421 dwarf2_emit_insn (insn_length);
3424 /* Create any fixups. */
3425 for (i = 0; i < fc; i++)
3428 if (fixups[i].reloc != BFD_RELOC_NONE)
3430 reloc_howto_type *reloc_howto;
3434 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3438 size = bfd_get_reloc_size (reloc_howto);
3439 offset = target_big_endian ? (insn_length - size) : 0;
3441 fixP = fix_new_exp (frag_now,
3442 f - frag_now->fr_literal + offset,
3445 reloc_howto->pc_relative,
3450 const struct powerpc_operand *operand;
3452 operand = &powerpc_operands[fixups[i].opindex];
3453 fixP = fix_new_exp (frag_now,
3454 f - frag_now->fr_literal,
3457 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3460 fixP->fx_pcrel_adjust = fixups[i].opindex;
3464 /* Handle a macro. Gather all the operands, transform them as
3465 described by the macro, and call md_assemble recursively. All the
3466 operands are separated by commas; we don't accept parentheses
3467 around operands here. */
3470 ppc_macro (char *str, const struct powerpc_macro *macro)
3481 /* Gather the users operands into the operands array. */
3486 if (count >= sizeof operands / sizeof operands[0])
3488 operands[count++] = s;
3489 s = strchr (s, ',');
3490 if (s == (char *) NULL)
3495 if (count != macro->operands)
3497 as_bad (_("wrong number of operands"));
3501 /* Work out how large the string must be (the size is unbounded
3502 because it includes user input). */
3504 format = macro->format;
3505 while (*format != '\0')
3514 arg = strtol (format + 1, &send, 10);
3515 know (send != format && arg < count);
3516 len += strlen (operands[arg]);
3521 /* Put the string together. */
3522 complete = s = (char *) xmalloc (len + 1);
3523 format = macro->format;
3524 while (*format != '\0')
3530 arg = strtol (format + 1, &send, 10);
3531 strcpy (s, operands[arg]);
3538 /* Assemble the constructed instruction. */
3539 md_assemble (complete);
3544 /* For ELF, add support for SHT_ORDERED. */
3547 ppc_section_type (char *str, size_t len)
3549 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3556 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3558 if (type == SHT_ORDERED)
3559 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3563 #endif /* OBJ_ELF */
3566 /* Pseudo-op handling. */
3568 /* The .byte pseudo-op. This is similar to the normal .byte
3569 pseudo-op, but it can also take a single ASCII string. */
3572 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3576 if (*input_line_pointer != '\"')
3582 /* Gather characters. A real double quote is doubled. Unusual
3583 characters are not permitted. */
3584 ++input_line_pointer;
3589 c = *input_line_pointer++;
3593 if (*input_line_pointer != '\"')
3595 ++input_line_pointer;
3598 FRAG_APPEND_1_CHAR (c);
3602 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3603 as_warn (_("data in executable section"));
3604 demand_empty_rest_of_line ();
3609 /* XCOFF specific pseudo-op handling. */
3611 /* This is set if we are creating a .stabx symbol, since we don't want
3612 to handle symbol suffixes for such symbols. */
3613 static bfd_boolean ppc_stab_symbol;
3615 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3616 symbols in the .bss segment as though they were local common
3617 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3618 aligns .comm and .lcomm to 4 bytes. */
3621 ppc_comm (int lcomm)
3623 asection *current_seg = now_seg;
3624 subsegT current_subseg = now_subseg;
3630 symbolS *lcomm_sym = NULL;
3634 endc = get_symbol_name (&name);
3635 end_name = input_line_pointer;
3636 (void) restore_line_pointer (endc);
3638 if (*input_line_pointer != ',')
3640 as_bad (_("missing size"));
3641 ignore_rest_of_line ();
3644 ++input_line_pointer;
3646 size = get_absolute_expression ();
3649 as_bad (_("negative size"));
3650 ignore_rest_of_line ();
3656 /* The third argument to .comm is the alignment. */
3657 if (*input_line_pointer != ',')
3661 ++input_line_pointer;
3662 align = get_absolute_expression ();
3665 as_warn (_("ignoring bad alignment"));
3675 /* The third argument to .lcomm appears to be the real local
3676 common symbol to create. References to the symbol named in
3677 the first argument are turned into references to the third
3679 if (*input_line_pointer != ',')
3681 as_bad (_("missing real symbol name"));
3682 ignore_rest_of_line ();
3685 ++input_line_pointer;
3687 lcomm_endc = get_symbol_name (&lcomm_name);
3689 lcomm_sym = symbol_find_or_make (lcomm_name);
3691 (void) restore_line_pointer (lcomm_endc);
3693 /* The fourth argument to .lcomm is the alignment. */
3694 if (*input_line_pointer != ',')
3703 ++input_line_pointer;
3704 align = get_absolute_expression ();
3707 as_warn (_("ignoring bad alignment"));
3714 sym = symbol_find_or_make (name);
3717 if (S_IS_DEFINED (sym)
3718 || S_GET_VALUE (sym) != 0)
3720 as_bad (_("attempt to redefine symbol"));
3721 ignore_rest_of_line ();
3725 record_alignment (bss_section, align);
3728 || ! S_IS_DEFINED (lcomm_sym))
3737 S_SET_EXTERNAL (sym);
3741 symbol_get_tc (lcomm_sym)->output = 1;
3742 def_sym = lcomm_sym;
3746 subseg_set (bss_section, 1);
3747 frag_align (align, 0, 0);
3749 symbol_set_frag (def_sym, frag_now);
3750 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3751 def_size, (char *) NULL);
3753 S_SET_SEGMENT (def_sym, bss_section);
3754 symbol_get_tc (def_sym)->align = align;
3758 /* Align the size of lcomm_sym. */
3759 symbol_get_frag (lcomm_sym)->fr_offset =
3760 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3761 &~ ((1 << align) - 1));
3762 if (align > symbol_get_tc (lcomm_sym)->align)
3763 symbol_get_tc (lcomm_sym)->align = align;
3768 /* Make sym an offset from lcomm_sym. */
3769 S_SET_SEGMENT (sym, bss_section);
3770 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3771 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3772 symbol_get_frag (lcomm_sym)->fr_offset += size;
3775 subseg_set (current_seg, current_subseg);
3777 demand_empty_rest_of_line ();
3780 /* The .csect pseudo-op. This switches us into a different
3781 subsegment. The first argument is a symbol whose value is the
3782 start of the .csect. In COFF, csect symbols get special aux
3783 entries defined by the x_csect field of union internal_auxent. The
3784 optional second argument is the alignment (the default is 2). */
3787 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3794 endc = get_symbol_name (&name);
3796 sym = symbol_find_or_make (name);
3798 (void) restore_line_pointer (endc);
3800 if (S_GET_NAME (sym)[0] == '\0')
3802 /* An unnamed csect is assumed to be [PR]. */
3803 symbol_get_tc (sym)->symbol_class = XMC_PR;
3807 if (*input_line_pointer == ',')
3809 ++input_line_pointer;
3810 align = get_absolute_expression ();
3813 ppc_change_csect (sym, align);
3815 demand_empty_rest_of_line ();
3818 /* Change to a different csect. */
3821 ppc_change_csect (symbolS *sym, offsetT align)
3823 if (S_IS_DEFINED (sym))
3824 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3834 /* This is a new csect. We need to look at the symbol class to
3835 figure out whether it should go in the text section or the
3839 switch (symbol_get_tc (sym)->symbol_class)
3849 S_SET_SEGMENT (sym, text_section);
3850 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3851 ++ppc_text_subsegment;
3852 list_ptr = &ppc_text_csects;
3862 if (ppc_toc_csect != NULL
3863 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3864 == ppc_data_subsegment))
3866 S_SET_SEGMENT (sym, data_section);
3867 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3868 ++ppc_data_subsegment;
3869 list_ptr = &ppc_data_csects;
3875 /* We set the obstack chunk size to a small value before
3876 changing subsegments, so that we don't use a lot of memory
3877 space for what may be a small section. */
3878 hold_chunksize = chunksize;
3881 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3882 symbol_get_tc (sym)->subseg);
3884 chunksize = hold_chunksize;
3887 ppc_after_toc_frag = frag_now;
3889 record_alignment (sec, align);
3891 frag_align_code (align, 0);
3893 frag_align (align, 0, 0);
3895 symbol_set_frag (sym, frag_now);
3896 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3898 symbol_get_tc (sym)->align = align;
3899 symbol_get_tc (sym)->output = 1;
3900 symbol_get_tc (sym)->within = sym;
3902 for (list = *list_ptr;
3903 symbol_get_tc (list)->next != (symbolS *) NULL;
3904 list = symbol_get_tc (list)->next)
3906 symbol_get_tc (list)->next = sym;
3908 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3909 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3913 ppc_current_csect = sym;
3917 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3921 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3923 sec = subseg_new (dw->name, subseg);
3924 oldflags = bfd_get_section_flags (stdoutput, sec);
3925 if (oldflags == SEC_NO_FLAGS)
3927 /* Just created section. */
3928 gas_assert (dw_sections[idx].sect == NULL);
3930 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3931 bfd_set_section_alignment (stdoutput, sec, 0);
3932 dw_sections[idx].sect = sec;
3935 /* Not anymore in a csect. */
3936 ppc_current_csect = NULL;
3939 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3940 .dwsect flag [, opt-label ]
3944 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3948 const struct xcoff_dwsect_name *dw;
3949 struct dw_subsection *subseg;
3950 struct dw_section *dws;
3954 flag = get_absolute_expression ();
3956 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3957 if (xcoff_dwsect_names[i].flag == flag)
3959 dw = &xcoff_dwsect_names[i];
3963 /* Parse opt-label. */
3964 if (*input_line_pointer == ',')
3969 ++input_line_pointer;
3971 c = get_symbol_name (&label);
3972 opt_label = symbol_find_or_make (label);
3973 (void) restore_line_pointer (c);
3978 demand_empty_rest_of_line ();
3980 /* Return now in case of unknown subsection. */
3983 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3988 /* Find the subsection. */
3989 dws = &dw_sections[i];
3991 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3993 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3994 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3996 as_bad (_("label %s was not defined in this dwarf section"),
3997 S_GET_NAME (opt_label));
3998 subseg = dws->anon_subseg;
4002 subseg = symbol_get_tc (opt_label)->u.dw;
4007 /* Switch to the subsection. */
4008 ppc_change_debug_section (i, subseg->subseg);
4012 /* Create a new dw subsection. */
4013 subseg = (struct dw_subsection *)
4014 xmalloc (sizeof (struct dw_subsection));
4016 if (opt_label == NULL)
4018 /* The anonymous one. */
4020 subseg->link = NULL;
4021 dws->anon_subseg = subseg;
4026 if (dws->list_subseg != NULL)
4027 subseg->subseg = dws->list_subseg->subseg + 1;
4031 subseg->link = dws->list_subseg;
4032 dws->list_subseg = subseg;
4033 symbol_get_tc (opt_label)->u.dw = subseg;
4036 ppc_change_debug_section (i, subseg->subseg);
4040 /* Add the length field. */
4041 expressionS *exp = &subseg->end_exp;
4044 if (opt_label != NULL)
4045 symbol_set_value_now (opt_label);
4047 /* Add the length field. Note that according to the AIX assembler
4048 manual, the size of the length field is 4 for powerpc32 but
4049 12 for powerpc64. */
4052 /* Write the 64bit marker. */
4053 md_number_to_chars (frag_more (4), -1, 4);
4056 exp->X_op = O_subtract;
4057 exp->X_op_symbol = symbol_temp_new_now ();
4058 exp->X_add_symbol = symbol_temp_make ();
4060 sz = ppc_obj64 ? 8 : 4;
4061 exp->X_add_number = -sz;
4062 emit_expr (exp, sz);
4067 /* This function handles the .text and .data pseudo-ops. These
4068 pseudo-ops aren't really used by XCOFF; we implement them for the
4069 convenience of people who aren't used to XCOFF. */
4072 ppc_section (int type)
4079 else if (type == 'd')
4084 sym = symbol_find_or_make (name);
4086 ppc_change_csect (sym, 2);
4088 demand_empty_rest_of_line ();
4091 /* This function handles the .section pseudo-op. This is mostly to
4092 give an error, since XCOFF only supports .text, .data and .bss, but
4093 we do permit the user to name the text or data section. */
4096 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4099 const char *real_name;
4103 c = get_symbol_name (&user_name);
4105 if (strcmp (user_name, ".text") == 0)
4106 real_name = ".text[PR]";
4107 else if (strcmp (user_name, ".data") == 0)
4108 real_name = ".data[RW]";
4111 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4112 (void) restore_line_pointer (c);
4113 ignore_rest_of_line ();
4117 (void) restore_line_pointer (c);
4119 sym = symbol_find_or_make (real_name);
4121 ppc_change_csect (sym, 2);
4123 demand_empty_rest_of_line ();
4126 /* The .extern pseudo-op. We create an undefined symbol. */
4129 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4134 endc = get_symbol_name (&name);
4136 (void) symbol_find_or_make (name);
4138 (void) restore_line_pointer (endc);
4140 demand_empty_rest_of_line ();
4143 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4146 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4152 endc = get_symbol_name (&name);
4154 sym = symbol_find_or_make (name);
4156 (void) restore_line_pointer (endc);
4158 symbol_get_tc (sym)->output = 1;
4160 demand_empty_rest_of_line ();
4163 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4164 relocations at the beginning of the current csect.
4166 (In principle, there's no reason why the relocations _have_ to be at
4167 the beginning. Anywhere in the csect would do. However, inserting
4168 at the beginning is what the native assmebler does, and it helps to
4169 deal with cases where the .ref statements follow the section contents.)
4171 ??? .refs don't work for empty .csects. However, the native assembler
4172 doesn't report an error in this case, and neither yet do we. */
4175 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4180 if (ppc_current_csect == NULL)
4182 as_bad (_(".ref outside .csect"));
4183 ignore_rest_of_line ();
4189 c = get_symbol_name (&name);
4191 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4192 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4194 *input_line_pointer = c;
4195 SKIP_WHITESPACE_AFTER_NAME ();
4196 c = *input_line_pointer;
4199 input_line_pointer++;
4201 if (is_end_of_line[(unsigned char) *input_line_pointer])
4203 as_bad (_("missing symbol name"));
4204 ignore_rest_of_line ();
4211 demand_empty_rest_of_line ();
4214 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4215 although I don't know why it bothers. */
4218 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4225 endc = get_symbol_name (&name);
4227 sym = symbol_find_or_make (name);
4229 (void) restore_line_pointer (endc);
4231 if (*input_line_pointer != ',')
4233 as_bad (_("missing rename string"));
4234 ignore_rest_of_line ();
4237 ++input_line_pointer;
4239 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4241 demand_empty_rest_of_line ();
4244 /* The .stabx pseudo-op. This is similar to a normal .stabs
4245 pseudo-op, but slightly different. A sample is
4246 .stabx "main:F-1",.main,142,0
4247 The first argument is the symbol name to create. The second is the
4248 value, and the third is the storage class. The fourth seems to be
4249 always zero, and I am assuming it is the type. */
4252 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4259 name = demand_copy_C_string (&len);
4261 if (*input_line_pointer != ',')
4263 as_bad (_("missing value"));
4266 ++input_line_pointer;
4268 ppc_stab_symbol = TRUE;
4269 sym = symbol_make (name);
4270 ppc_stab_symbol = FALSE;
4272 symbol_get_tc (sym)->real_name = name;
4274 (void) expression (&exp);
4281 as_bad (_("illegal .stabx expression; zero assumed"));
4282 exp.X_add_number = 0;
4285 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4286 symbol_set_frag (sym, &zero_address_frag);
4290 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4291 symbol_set_value_expression (sym, &exp);
4295 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4296 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4301 /* The value is some complex expression. This will probably
4302 fail at some later point, but this is probably the right
4303 thing to do here. */
4304 symbol_set_value_expression (sym, &exp);
4308 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4309 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4311 if (*input_line_pointer != ',')
4313 as_bad (_("missing class"));
4316 ++input_line_pointer;
4318 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4320 if (*input_line_pointer != ',')
4322 as_bad (_("missing type"));
4325 ++input_line_pointer;
4327 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4329 symbol_get_tc (sym)->output = 1;
4331 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4336 .stabx "z",arrays_,133,0
4339 .comm arrays_,13768,3
4341 resolve_symbol_value will copy the exp's "within" into sym's when the
4342 offset is 0. Since this seems to be corner case problem,
4343 only do the correction for storage class C_STSYM. A better solution
4344 would be to have the tc field updated in ppc_symbol_new_hook. */
4346 if (exp.X_op == O_symbol)
4348 if (ppc_current_block == NULL)
4349 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4351 symbol_get_tc (sym)->within = ppc_current_block;
4352 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4356 if (exp.X_op != O_symbol
4357 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4358 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4359 ppc_frob_label (sym);
4362 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4363 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4364 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4365 symbol_get_tc (ppc_current_csect)->within = sym;
4368 demand_empty_rest_of_line ();
4371 /* The .function pseudo-op. This takes several arguments. The first
4372 argument seems to be the external name of the symbol. The second
4373 argument seems to be the label for the start of the function. gcc
4374 uses the same name for both. I have no idea what the third and
4375 fourth arguments are meant to be. The optional fifth argument is
4376 an expression for the size of the function. In COFF this symbol
4377 gets an aux entry like that used for a csect. */
4380 ppc_function (int ignore ATTRIBUTE_UNUSED)
4388 endc = get_symbol_name (&name);
4390 /* Ignore any [PR] suffix. */
4391 name = ppc_canonicalize_symbol_name (name);
4392 s = strchr (name, '[');
4393 if (s != (char *) NULL
4394 && strcmp (s + 1, "PR]") == 0)
4397 ext_sym = symbol_find_or_make (name);
4399 (void) restore_line_pointer (endc);
4401 if (*input_line_pointer != ',')
4403 as_bad (_("missing symbol name"));
4404 ignore_rest_of_line ();
4407 ++input_line_pointer;
4409 endc = get_symbol_name (&name);
4411 lab_sym = symbol_find_or_make (name);
4413 (void) restore_line_pointer (endc);
4415 if (ext_sym != lab_sym)
4419 exp.X_op = O_symbol;
4420 exp.X_add_symbol = lab_sym;
4421 exp.X_op_symbol = NULL;
4422 exp.X_add_number = 0;
4424 symbol_set_value_expression (ext_sym, &exp);
4427 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4428 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4429 symbol_get_tc (ext_sym)->output = 1;
4431 if (*input_line_pointer == ',')
4435 /* Ignore the third argument. */
4436 ++input_line_pointer;
4438 if (*input_line_pointer == ',')
4440 /* Ignore the fourth argument. */
4441 ++input_line_pointer;
4443 if (*input_line_pointer == ',')
4445 /* The fifth argument is the function size. */
4446 ++input_line_pointer;
4447 symbol_get_tc (ext_sym)->u.size = symbol_new
4448 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4449 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4454 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4455 SF_SET_FUNCTION (ext_sym);
4456 SF_SET_PROCESS (ext_sym);
4457 coff_add_linesym (ext_sym);
4459 demand_empty_rest_of_line ();
4462 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4463 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4464 with the correct line number */
4466 static symbolS *saved_bi_sym = 0;
4469 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4473 sym = symbol_make (".bf");
4474 S_SET_SEGMENT (sym, text_section);
4475 symbol_set_frag (sym, frag_now);
4476 S_SET_VALUE (sym, frag_now_fix ());
4477 S_SET_STORAGE_CLASS (sym, C_FCN);
4479 coff_line_base = get_absolute_expression ();
4481 S_SET_NUMBER_AUXILIARY (sym, 1);
4482 SA_SET_SYM_LNNO (sym, coff_line_base);
4484 /* Line number for bi. */
4487 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4492 symbol_get_tc (sym)->output = 1;
4494 ppc_frob_label (sym);
4496 demand_empty_rest_of_line ();
4499 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4500 ".ef", except that the line number is absolute, not relative to the
4501 most recent ".bf" symbol. */
4504 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4508 sym = symbol_make (".ef");
4509 S_SET_SEGMENT (sym, text_section);
4510 symbol_set_frag (sym, frag_now);
4511 S_SET_VALUE (sym, frag_now_fix ());
4512 S_SET_STORAGE_CLASS (sym, C_FCN);
4513 S_SET_NUMBER_AUXILIARY (sym, 1);
4514 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4515 symbol_get_tc (sym)->output = 1;
4517 ppc_frob_label (sym);
4519 demand_empty_rest_of_line ();
4522 /* The .bi and .ei pseudo-ops. These take a string argument and
4523 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4524 the symbol list. The value of .bi will be know when the next .bf
4530 static symbolS *last_biei;
4537 name = demand_copy_C_string (&len);
4539 /* The value of these symbols is actually file offset. Here we set
4540 the value to the index into the line number entries. In
4541 ppc_frob_symbols we set the fix_line field, which will cause BFD
4542 to do the right thing. */
4544 sym = symbol_make (name);
4545 /* obj-coff.c currently only handles line numbers correctly in the
4547 S_SET_SEGMENT (sym, text_section);
4548 S_SET_VALUE (sym, coff_n_line_nos);
4549 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4551 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4552 symbol_get_tc (sym)->output = 1;
4560 for (look = last_biei ? last_biei : symbol_rootP;
4561 (look != (symbolS *) NULL
4562 && (S_GET_STORAGE_CLASS (look) == C_FILE
4563 || S_GET_STORAGE_CLASS (look) == C_BINCL
4564 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4565 look = symbol_next (look))
4567 if (look != (symbolS *) NULL)
4569 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4570 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4574 demand_empty_rest_of_line ();
4577 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4578 There is one argument, which is a csect symbol. The value of the
4579 .bs symbol is the index of this csect symbol. */
4582 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4589 if (ppc_current_block != NULL)
4590 as_bad (_("nested .bs blocks"));
4592 endc = get_symbol_name (&name);
4594 csect = symbol_find_or_make (name);
4596 (void) restore_line_pointer (endc);
4598 sym = symbol_make (".bs");
4599 S_SET_SEGMENT (sym, now_seg);
4600 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4601 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4602 symbol_get_tc (sym)->output = 1;
4604 symbol_get_tc (sym)->within = csect;
4606 ppc_frob_label (sym);
4608 ppc_current_block = sym;
4610 demand_empty_rest_of_line ();
4613 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4616 ppc_es (int ignore ATTRIBUTE_UNUSED)
4620 if (ppc_current_block == NULL)
4621 as_bad (_(".es without preceding .bs"));
4623 sym = symbol_make (".es");
4624 S_SET_SEGMENT (sym, now_seg);
4625 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4626 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4627 symbol_get_tc (sym)->output = 1;
4629 ppc_frob_label (sym);
4631 ppc_current_block = NULL;
4633 demand_empty_rest_of_line ();
4636 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4640 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4644 sym = symbol_make (".bb");
4645 S_SET_SEGMENT (sym, text_section);
4646 symbol_set_frag (sym, frag_now);
4647 S_SET_VALUE (sym, frag_now_fix ());
4648 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4650 S_SET_NUMBER_AUXILIARY (sym, 1);
4651 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4653 symbol_get_tc (sym)->output = 1;
4655 SF_SET_PROCESS (sym);
4657 ppc_frob_label (sym);
4659 demand_empty_rest_of_line ();
4662 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4666 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4670 sym = symbol_make (".eb");
4671 S_SET_SEGMENT (sym, text_section);
4672 symbol_set_frag (sym, frag_now);
4673 S_SET_VALUE (sym, frag_now_fix ());
4674 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4675 S_SET_NUMBER_AUXILIARY (sym, 1);
4676 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4677 symbol_get_tc (sym)->output = 1;
4679 SF_SET_PROCESS (sym);
4681 ppc_frob_label (sym);
4683 demand_empty_rest_of_line ();
4686 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4690 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4696 name = demand_copy_C_string (&len);
4697 sym = symbol_make (name);
4698 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4699 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4700 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4701 S_SET_VALUE (sym, 0);
4702 symbol_get_tc (sym)->output = 1;
4704 ppc_frob_label (sym);
4706 demand_empty_rest_of_line ();
4709 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4712 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4716 sym = symbol_make (".ec");
4717 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4718 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4719 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4720 S_SET_VALUE (sym, 0);
4721 symbol_get_tc (sym)->output = 1;
4723 ppc_frob_label (sym);
4725 demand_empty_rest_of_line ();
4728 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4731 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4733 if (ppc_toc_csect != (symbolS *) NULL)
4734 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4741 subseg = ppc_data_subsegment;
4742 ++ppc_data_subsegment;
4744 subseg_new (segment_name (data_section), subseg);
4745 ppc_toc_frag = frag_now;
4747 sym = symbol_find_or_make ("TOC[TC0]");
4748 symbol_set_frag (sym, frag_now);
4749 S_SET_SEGMENT (sym, data_section);
4750 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4751 symbol_get_tc (sym)->subseg = subseg;
4752 symbol_get_tc (sym)->output = 1;
4753 symbol_get_tc (sym)->within = sym;
4755 ppc_toc_csect = sym;
4757 for (list = ppc_data_csects;
4758 symbol_get_tc (list)->next != (symbolS *) NULL;
4759 list = symbol_get_tc (list)->next)
4761 symbol_get_tc (list)->next = sym;
4763 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4764 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4768 ppc_current_csect = ppc_toc_csect;
4770 demand_empty_rest_of_line ();
4773 /* The AIX assembler automatically aligns the operands of a .long or
4774 .short pseudo-op, and we want to be compatible. */
4777 ppc_xcoff_cons (int log_size)
4779 frag_align (log_size, 0, 0);
4780 record_alignment (now_seg, log_size);
4781 cons (1 << log_size);
4785 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4790 (void) expression (&exp);
4792 if (exp.X_op != O_constant)
4794 as_bad (_("non-constant byte count"));
4798 byte_count = exp.X_add_number;
4800 if (*input_line_pointer != ',')
4802 as_bad (_("missing value"));
4806 ++input_line_pointer;
4811 ppc_xcoff_end (void)
4815 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4817 struct dw_section *dws = &dw_sections[i];
4818 struct dw_subsection *dwss;
4820 if (dws->anon_subseg)
4822 dwss = dws->anon_subseg;
4823 dwss->link = dws->list_subseg;
4826 dwss = dws->list_subseg;
4828 for (; dwss != NULL; dwss = dwss->link)
4829 if (dwss->end_exp.X_add_symbol != NULL)
4831 subseg_set (dws->sect, dwss->subseg);
4832 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4837 #endif /* OBJ_XCOFF */
4838 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4840 /* The .tc pseudo-op. This is used when generating either XCOFF or
4841 ELF. This takes two or more arguments.
4843 When generating XCOFF output, the first argument is the name to
4844 give to this location in the toc; this will be a symbol with class
4845 TC. The rest of the arguments are N-byte values to actually put at
4846 this location in the TOC; often there is just one more argument, a
4847 relocatable symbol reference. The size of the value to store
4848 depends on target word size. A 32-bit target uses 4-byte values, a
4849 64-bit target uses 8-byte values.
4851 When not generating XCOFF output, the arguments are the same, but
4852 the first argument is simply ignored. */
4855 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4859 /* Define the TOC symbol name. */
4865 if (ppc_toc_csect == (symbolS *) NULL
4866 || ppc_toc_csect != ppc_current_csect)
4868 as_bad (_(".tc not in .toc section"));
4869 ignore_rest_of_line ();
4873 endc = get_symbol_name (&name);
4875 sym = symbol_find_or_make (name);
4877 (void) restore_line_pointer (endc);
4879 if (S_IS_DEFINED (sym))
4883 label = symbol_get_tc (ppc_current_csect)->within;
4884 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4886 as_bad (_(".tc with no label"));
4887 ignore_rest_of_line ();
4891 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4892 symbol_set_frag (label, symbol_get_frag (sym));
4893 S_SET_VALUE (label, S_GET_VALUE (sym));
4895 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4896 ++input_line_pointer;
4901 S_SET_SEGMENT (sym, now_seg);
4902 symbol_set_frag (sym, frag_now);
4903 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4904 symbol_get_tc (sym)->symbol_class = XMC_TC;
4905 symbol_get_tc (sym)->output = 1;
4907 ppc_frob_label (sym);
4910 #endif /* OBJ_XCOFF */
4914 /* Skip the TOC symbol name. */
4915 while (is_part_of_name (*input_line_pointer)
4916 || *input_line_pointer == ' '
4917 || *input_line_pointer == '['
4918 || *input_line_pointer == ']'
4919 || *input_line_pointer == '{'
4920 || *input_line_pointer == '}')
4921 ++input_line_pointer;
4923 /* Align to a four/eight byte boundary. */
4924 align = ppc_obj64 ? 3 : 2;
4925 frag_align (align, 0, 0);
4926 record_alignment (now_seg, align);
4927 #endif /* OBJ_ELF */
4929 if (*input_line_pointer != ',')
4930 demand_empty_rest_of_line ();
4933 ++input_line_pointer;
4934 cons (ppc_obj64 ? 8 : 4);
4938 /* Pseudo-op .machine. */
4941 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4945 #define MAX_HISTORY 100
4946 static ppc_cpu_t *cpu_history;
4947 static int curr_hist;
4951 c = get_symbol_name (&cpu_string);
4952 cpu_string = xstrdup (cpu_string);
4953 (void) restore_line_pointer (c);
4955 if (cpu_string != NULL)
4957 ppc_cpu_t old_cpu = ppc_cpu;
4961 for (p = cpu_string; *p != 0; p++)
4964 if (strcmp (cpu_string, "push") == 0)
4966 if (cpu_history == NULL)
4967 cpu_history = xmalloc (MAX_HISTORY * sizeof (*cpu_history));
4969 if (curr_hist >= MAX_HISTORY)
4970 as_bad (_(".machine stack overflow"));
4972 cpu_history[curr_hist++] = ppc_cpu;
4974 else if (strcmp (cpu_string, "pop") == 0)
4977 as_bad (_(".machine stack underflow"));
4979 ppc_cpu = cpu_history[--curr_hist];
4981 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4984 as_bad (_("invalid machine `%s'"), cpu_string);
4986 if (ppc_cpu != old_cpu)
4987 ppc_setup_opcodes ();
4990 demand_empty_rest_of_line ();
4992 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4996 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4998 /* Set the current section. */
5000 ppc_set_current_section (segT new)
5002 ppc_previous_section = ppc_current_section;
5003 ppc_current_section = new;
5006 /* pseudo-op: .previous
5007 behaviour: toggles the current section with the previous section.
5009 warnings: "No previous section" */
5012 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5014 if (ppc_previous_section == NULL)
5016 as_warn (_("no previous section to return to, ignored."));
5020 subseg_set (ppc_previous_section, 0);
5022 ppc_set_current_section (ppc_previous_section);
5025 /* pseudo-op: .pdata
5026 behaviour: predefined read only data section
5030 initial: .section .pdata "adr3"
5031 a - don't know -- maybe a misprint
5032 d - initialized data
5034 3 - double word aligned (that would be 4 byte boundary)
5037 Tag index tables (also known as the function table) for exception
5038 handling, debugging, etc. */
5041 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5043 if (pdata_section == 0)
5045 pdata_section = subseg_new (".pdata", 0);
5047 bfd_set_section_flags (stdoutput, pdata_section,
5048 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5049 | SEC_READONLY | SEC_DATA ));
5051 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5055 pdata_section = subseg_new (".pdata", 0);
5057 ppc_set_current_section (pdata_section);
5060 /* pseudo-op: .ydata
5061 behaviour: predefined read only data section
5065 initial: .section .ydata "drw3"
5066 a - don't know -- maybe a misprint
5067 d - initialized data
5069 3 - double word aligned (that would be 4 byte boundary)
5071 Tag tables (also known as the scope table) for exception handling,
5075 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5077 if (ydata_section == 0)
5079 ydata_section = subseg_new (".ydata", 0);
5080 bfd_set_section_flags (stdoutput, ydata_section,
5081 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5082 | SEC_READONLY | SEC_DATA ));
5084 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5088 ydata_section = subseg_new (".ydata", 0);
5090 ppc_set_current_section (ydata_section);
5093 /* pseudo-op: .reldata
5094 behaviour: predefined read write data section
5095 double word aligned (4-byte)
5096 FIXME: relocation is applied to it
5097 FIXME: what's the difference between this and .data?
5100 initial: .section .reldata "drw3"
5101 d - initialized data
5104 3 - double word aligned (that would be 8 byte boundary)
5107 Like .data, but intended to hold data subject to relocation, such as
5108 function descriptors, etc. */
5111 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5113 if (reldata_section == 0)
5115 reldata_section = subseg_new (".reldata", 0);
5117 bfd_set_section_flags (stdoutput, reldata_section,
5118 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5121 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5125 reldata_section = subseg_new (".reldata", 0);
5127 ppc_set_current_section (reldata_section);
5130 /* pseudo-op: .rdata
5131 behaviour: predefined read only data section
5135 initial: .section .rdata "dr3"
5136 d - initialized data
5138 3 - double word aligned (that would be 4 byte boundary) */
5141 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5143 if (rdata_section == 0)
5145 rdata_section = subseg_new (".rdata", 0);
5146 bfd_set_section_flags (stdoutput, rdata_section,
5147 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5148 | SEC_READONLY | SEC_DATA ));
5150 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5154 rdata_section = subseg_new (".rdata", 0);
5156 ppc_set_current_section (rdata_section);
5159 /* pseudo-op: .ualong
5160 behaviour: much like .int, with the exception that no alignment is
5162 FIXME: test the alignment statement
5167 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5173 /* pseudo-op: .znop <symbol name>
5174 behaviour: Issue a nop instruction
5175 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5176 the supplied symbol name.
5178 warnings: Missing symbol name */
5181 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5184 const struct powerpc_opcode *opcode;
5191 /* Strip out the symbol name. */
5192 c = get_symbol_name (&symbol_name);
5194 name = xstrdup (symbol_name);
5196 sym = symbol_find_or_make (name);
5198 *input_line_pointer = c;
5200 SKIP_WHITESPACE_AFTER_NAME ();
5202 /* Look up the opcode in the hash table. */
5203 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5205 /* Stick in the nop. */
5206 insn = opcode->opcode;
5208 /* Write out the instruction. */
5210 md_number_to_chars (f, insn, 4);
5212 f - frag_now->fr_literal,
5217 BFD_RELOC_16_GOT_PCREL);
5227 ppc_pe_comm (int lcomm)
5236 c = get_symbol_name (&name);
5238 /* just after name is now '\0'. */
5239 p = input_line_pointer;
5241 SKIP_WHITESPACE_AFTER_NAME ();
5242 if (*input_line_pointer != ',')
5244 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5245 ignore_rest_of_line ();
5249 input_line_pointer++; /* skip ',' */
5250 if ((temp = get_absolute_expression ()) < 0)
5252 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5253 ignore_rest_of_line ();
5259 /* The third argument to .comm is the alignment. */
5260 if (*input_line_pointer != ',')
5264 ++input_line_pointer;
5265 align = get_absolute_expression ();
5268 as_warn (_("ignoring bad alignment"));
5275 symbolP = symbol_find_or_make (name);
5278 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5280 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5281 S_GET_NAME (symbolP));
5282 ignore_rest_of_line ();
5286 if (S_GET_VALUE (symbolP))
5288 if (S_GET_VALUE (symbolP) != (valueT) temp)
5289 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5290 S_GET_NAME (symbolP),
5291 (long) S_GET_VALUE (symbolP),
5296 S_SET_VALUE (symbolP, (valueT) temp);
5297 S_SET_EXTERNAL (symbolP);
5298 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5301 demand_empty_rest_of_line ();
5305 * implement the .section pseudo op:
5306 * .section name {, "flags"}
5308 * | +--- optional flags: 'b' for bss
5310 * +-- section name 'l' for lib
5314 * 'd' (apparently m88k for data)
5316 * But if the argument is not a quoted string, treat it as a
5317 * subsegment number.
5319 * FIXME: this is a copy of the section processing from obj-coff.c, with
5320 * additions/changes for the moto-pas assembler support. There are three
5323 * FIXME: I just noticed this. This doesn't work at all really. It it
5324 * setting bits that bfd probably neither understands or uses. The
5325 * correct approach (?) will have to incorporate extra fields attached
5326 * to the section to hold the system specific stuff. (krk)
5329 * 'a' - unknown - referred to in documentation, but no definition supplied
5330 * 'c' - section has code
5331 * 'd' - section has initialized data
5332 * 'u' - section has uninitialized data
5333 * 'i' - section contains directives (info)
5334 * 'n' - section can be discarded
5335 * 'R' - remove section at link time
5337 * Section Protection:
5338 * 'r' - section is readable
5339 * 'w' - section is writeable
5340 * 'x' - section is executable
5341 * 's' - section is sharable
5343 * Section Alignment:
5344 * '0' - align to byte boundary
5345 * '1' - align to halfword undary
5346 * '2' - align to word boundary
5347 * '3' - align to doubleword boundary
5348 * '4' - align to quadword boundary
5349 * '5' - align to 32 byte boundary
5350 * '6' - align to 64 byte boundary
5355 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5357 /* Strip out the section name. */
5366 c = get_symbol_name (§ion_name);
5368 name = xstrdup (section_name);
5370 *input_line_pointer = c;
5372 SKIP_WHITESPACE_AFTER_NAME ();
5375 flags = SEC_NO_FLAGS;
5377 if (strcmp (name, ".idata$2") == 0)
5381 else if (strcmp (name, ".idata$3") == 0)
5385 else if (strcmp (name, ".idata$4") == 0)
5389 else if (strcmp (name, ".idata$5") == 0)
5393 else if (strcmp (name, ".idata$6") == 0)
5398 /* Default alignment to 16 byte boundary. */
5401 if (*input_line_pointer == ',')
5403 ++input_line_pointer;
5405 if (*input_line_pointer != '"')
5406 exp = get_absolute_expression ();
5409 ++input_line_pointer;
5410 while (*input_line_pointer != '"'
5411 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5413 switch (*input_line_pointer)
5415 /* Section Contents */
5416 case 'a': /* unknown */
5417 as_bad (_("unsupported section attribute -- 'a'"));
5419 case 'c': /* code section */
5422 case 'd': /* section has initialized data */
5425 case 'u': /* section has uninitialized data */
5426 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5430 case 'i': /* section contains directives (info) */
5431 /* FIXME: This is IMAGE_SCN_LNK_INFO
5433 flags |= SEC_HAS_CONTENTS;
5435 case 'n': /* section can be discarded */
5438 case 'R': /* Remove section at link time */
5439 flags |= SEC_NEVER_LOAD;
5441 #if IFLICT_BRAIN_DAMAGE
5442 /* Section Protection */
5443 case 'r': /* section is readable */
5444 flags |= IMAGE_SCN_MEM_READ;
5446 case 'w': /* section is writeable */
5447 flags |= IMAGE_SCN_MEM_WRITE;
5449 case 'x': /* section is executable */
5450 flags |= IMAGE_SCN_MEM_EXECUTE;
5452 case 's': /* section is sharable */
5453 flags |= IMAGE_SCN_MEM_SHARED;
5456 /* Section Alignment */
5457 case '0': /* align to byte boundary */
5458 flags |= IMAGE_SCN_ALIGN_1BYTES;
5461 case '1': /* align to halfword boundary */
5462 flags |= IMAGE_SCN_ALIGN_2BYTES;
5465 case '2': /* align to word boundary */
5466 flags |= IMAGE_SCN_ALIGN_4BYTES;
5469 case '3': /* align to doubleword boundary */
5470 flags |= IMAGE_SCN_ALIGN_8BYTES;
5473 case '4': /* align to quadword boundary */
5474 flags |= IMAGE_SCN_ALIGN_16BYTES;
5477 case '5': /* align to 32 byte boundary */
5478 flags |= IMAGE_SCN_ALIGN_32BYTES;
5481 case '6': /* align to 64 byte boundary */
5482 flags |= IMAGE_SCN_ALIGN_64BYTES;
5487 as_bad (_("unknown section attribute '%c'"),
5488 *input_line_pointer);
5491 ++input_line_pointer;
5493 if (*input_line_pointer == '"')
5494 ++input_line_pointer;
5498 sec = subseg_new (name, (subsegT) exp);
5500 ppc_set_current_section (sec);
5502 if (flags != SEC_NO_FLAGS)
5504 if (! bfd_set_section_flags (stdoutput, sec, flags))
5505 as_bad (_("error setting flags for \"%s\": %s"),
5506 bfd_section_name (stdoutput, sec),
5507 bfd_errmsg (bfd_get_error ()));
5510 bfd_set_section_alignment (stdoutput, sec, align);
5514 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5520 endc = get_symbol_name (&name);
5522 ext_sym = symbol_find_or_make (name);
5524 (void) restore_line_pointer (endc);
5526 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5527 SF_SET_FUNCTION (ext_sym);
5528 SF_SET_PROCESS (ext_sym);
5529 coff_add_linesym (ext_sym);
5531 demand_empty_rest_of_line ();
5535 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5537 if (tocdata_section == 0)
5539 tocdata_section = subseg_new (".tocd", 0);
5540 /* FIXME: section flags won't work. */
5541 bfd_set_section_flags (stdoutput, tocdata_section,
5542 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5543 | SEC_READONLY | SEC_DATA));
5545 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5549 rdata_section = subseg_new (".tocd", 0);
5552 ppc_set_current_section (tocdata_section);
5554 demand_empty_rest_of_line ();
5557 /* Don't adjust TOC relocs to use the section symbol. */
5560 ppc_pe_fix_adjustable (fixS *fix)
5562 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5569 /* XCOFF specific symbol and file handling. */
5571 /* Canonicalize the symbol name. We use the to force the suffix, if
5572 any, to use square brackets, and to be in upper case. */
5575 ppc_canonicalize_symbol_name (char *name)
5579 if (ppc_stab_symbol)
5582 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5596 for (s++; *s != '\0' && *s != brac; s++)
5599 if (*s == '\0' || s[1] != '\0')
5600 as_bad (_("bad symbol suffix"));
5608 /* Set the class of a symbol based on the suffix, if any. This is
5609 called whenever a new symbol is created. */
5612 ppc_symbol_new_hook (symbolS *sym)
5614 struct ppc_tc_sy *tc;
5617 tc = symbol_get_tc (sym);
5620 tc->symbol_class = -1;
5621 tc->real_name = NULL;
5628 if (ppc_stab_symbol)
5631 s = strchr (S_GET_NAME (sym), '[');
5632 if (s == (const char *) NULL)
5634 /* There is no suffix. */
5643 if (strcmp (s, "BS]") == 0)
5644 tc->symbol_class = XMC_BS;
5647 if (strcmp (s, "DB]") == 0)
5648 tc->symbol_class = XMC_DB;
5649 else if (strcmp (s, "DS]") == 0)
5650 tc->symbol_class = XMC_DS;
5653 if (strcmp (s, "GL]") == 0)
5654 tc->symbol_class = XMC_GL;
5657 if (strcmp (s, "PR]") == 0)
5658 tc->symbol_class = XMC_PR;
5661 if (strcmp (s, "RO]") == 0)
5662 tc->symbol_class = XMC_RO;
5663 else if (strcmp (s, "RW]") == 0)
5664 tc->symbol_class = XMC_RW;
5667 if (strcmp (s, "SV]") == 0)
5668 tc->symbol_class = XMC_SV;
5671 if (strcmp (s, "TC]") == 0)
5672 tc->symbol_class = XMC_TC;
5673 else if (strcmp (s, "TI]") == 0)
5674 tc->symbol_class = XMC_TI;
5675 else if (strcmp (s, "TB]") == 0)
5676 tc->symbol_class = XMC_TB;
5677 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5678 tc->symbol_class = XMC_TC0;
5681 if (strcmp (s, "UA]") == 0)
5682 tc->symbol_class = XMC_UA;
5683 else if (strcmp (s, "UC]") == 0)
5684 tc->symbol_class = XMC_UC;
5687 if (strcmp (s, "XO]") == 0)
5688 tc->symbol_class = XMC_XO;
5692 if (tc->symbol_class == -1)
5693 as_bad (_("unrecognized symbol suffix"));
5696 /* Set the class of a label based on where it is defined. This
5697 handles symbols without suffixes. Also, move the symbol so that it
5698 follows the csect symbol. */
5701 ppc_frob_label (symbolS *sym)
5703 if (ppc_current_csect != (symbolS *) NULL)
5705 if (symbol_get_tc (sym)->symbol_class == -1)
5706 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5708 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5709 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5710 &symbol_rootP, &symbol_lastP);
5711 symbol_get_tc (ppc_current_csect)->within = sym;
5712 symbol_get_tc (sym)->within = ppc_current_csect;
5716 dwarf2_emit_label (sym);
5720 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5721 seen. It tells ppc_adjust_symtab whether it needs to look through
5724 static bfd_boolean ppc_saw_abs;
5726 /* Change the name of a symbol just before writing it out. Set the
5727 real name if the .rename pseudo-op was used. Otherwise, remove any
5728 class suffix. Return 1 if the symbol should not be included in the
5732 ppc_frob_symbol (symbolS *sym)
5734 static symbolS *ppc_last_function;
5735 static symbolS *set_end;
5737 /* Discard symbols that should not be included in the output symbol
5739 if (! symbol_used_in_reloc_p (sym)
5740 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5741 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5742 && ! symbol_get_tc (sym)->output
5743 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5746 /* This one will disappear anyway. Don't make a csect sym for it. */
5747 if (sym == abs_section_sym)
5750 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5751 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5757 name = S_GET_NAME (sym);
5758 s = strchr (name, '[');
5759 if (s != (char *) NULL)
5765 snew = xstrndup (name, len);
5767 S_SET_NAME (sym, snew);
5771 if (set_end != (symbolS *) NULL)
5773 SA_SET_SYM_ENDNDX (set_end, sym);
5777 if (SF_GET_FUNCTION (sym))
5779 if (ppc_last_function != (symbolS *) NULL)
5780 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5781 ppc_last_function = sym;
5782 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5784 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5785 SA_SET_SYM_FSIZE (sym,
5786 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5789 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5790 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5792 if (ppc_last_function == (symbolS *) NULL)
5793 as_bad (_(".ef with no preceding .function"));
5796 set_end = ppc_last_function;
5797 ppc_last_function = NULL;
5799 /* We don't have a C_EFCN symbol, but we need to force the
5800 COFF backend to believe that it has seen one. */
5801 coff_last_function = NULL;
5805 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5806 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5807 && S_GET_STORAGE_CLASS (sym) != C_FILE
5808 && S_GET_STORAGE_CLASS (sym) != C_FCN
5809 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5810 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5811 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5812 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5813 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5814 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5815 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5817 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5818 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5819 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5822 union internal_auxent *a;
5824 /* Create a csect aux. */
5825 i = S_GET_NUMBER_AUXILIARY (sym);
5826 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5827 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5828 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5830 /* This is the TOC table. */
5831 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5832 a->x_csect.x_scnlen.l = 0;
5833 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5835 else if (symbol_get_tc (sym)->subseg != 0)
5837 /* This is a csect symbol. x_scnlen is the size of the
5839 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5840 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5841 S_GET_SEGMENT (sym))
5842 - S_GET_VALUE (sym));
5845 resolve_symbol_value (symbol_get_tc (sym)->next);
5846 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5847 - S_GET_VALUE (sym));
5849 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5851 else if (S_GET_SEGMENT (sym) == bss_section)
5853 /* This is a common symbol. */
5854 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5855 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5856 if (S_IS_EXTERNAL (sym))
5857 symbol_get_tc (sym)->symbol_class = XMC_RW;
5859 symbol_get_tc (sym)->symbol_class = XMC_BS;
5861 else if (S_GET_SEGMENT (sym) == absolute_section)
5863 /* This is an absolute symbol. The csect will be created by
5864 ppc_adjust_symtab. */
5866 a->x_csect.x_smtyp = XTY_LD;
5867 if (symbol_get_tc (sym)->symbol_class == -1)
5868 symbol_get_tc (sym)->symbol_class = XMC_XO;
5870 else if (! S_IS_DEFINED (sym))
5872 /* This is an external symbol. */
5873 a->x_csect.x_scnlen.l = 0;
5874 a->x_csect.x_smtyp = XTY_ER;
5876 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5880 /* This is a TOC definition. x_scnlen is the size of the
5882 next = symbol_next (sym);
5883 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5884 next = symbol_next (next);
5885 if (next == (symbolS *) NULL
5886 || symbol_get_tc (next)->symbol_class != XMC_TC)
5888 if (ppc_after_toc_frag == (fragS *) NULL)
5889 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5891 - S_GET_VALUE (sym));
5893 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5894 - S_GET_VALUE (sym));
5898 resolve_symbol_value (next);
5899 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5900 - S_GET_VALUE (sym));
5902 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5908 /* This is a normal symbol definition. x_scnlen is the
5909 symbol index of the containing csect. */
5910 if (S_GET_SEGMENT (sym) == text_section)
5911 csect = ppc_text_csects;
5912 else if (S_GET_SEGMENT (sym) == data_section)
5913 csect = ppc_data_csects;
5917 /* Skip the initial dummy symbol. */
5918 csect = symbol_get_tc (csect)->next;
5920 if (csect == (symbolS *) NULL)
5922 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5923 a->x_csect.x_scnlen.l = 0;
5927 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5929 resolve_symbol_value (symbol_get_tc (csect)->next);
5930 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5931 > S_GET_VALUE (sym))
5933 csect = symbol_get_tc (csect)->next;
5936 a->x_csect.x_scnlen.p =
5937 coffsymbol (symbol_get_bfdsym (csect))->native;
5938 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5941 a->x_csect.x_smtyp = XTY_LD;
5944 a->x_csect.x_parmhash = 0;
5945 a->x_csect.x_snhash = 0;
5946 if (symbol_get_tc (sym)->symbol_class == -1)
5947 a->x_csect.x_smclas = XMC_PR;
5949 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5950 a->x_csect.x_stab = 0;
5951 a->x_csect.x_snstab = 0;
5953 /* Don't let the COFF backend resort these symbols. */
5954 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5956 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5958 /* We want the value to be the symbol index of the referenced
5959 csect symbol. BFD will do that for us if we set the right
5961 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5962 combined_entry_type *c = coffsymbol (bsym)->native;
5964 S_SET_VALUE (sym, (valueT) (size_t) c);
5965 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5967 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5972 block = symbol_get_tc (sym)->within;
5975 /* The value is the offset from the enclosing csect. */
5978 csect = symbol_get_tc (block)->within;
5979 resolve_symbol_value (csect);
5980 base = S_GET_VALUE (csect);
5985 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5987 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5988 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5990 /* We want the value to be a file offset into the line numbers.
5991 BFD will do that for us if we set the right flags. We have
5992 already set the value correctly. */
5993 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5999 /* Adjust the symbol table. This creates csect symbols for all
6000 absolute symbols. */
6003 ppc_adjust_symtab (void)
6010 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6014 union internal_auxent *a;
6016 if (S_GET_SEGMENT (sym) != absolute_section)
6019 csect = symbol_create (".abs[XO]", absolute_section,
6020 S_GET_VALUE (sym), &zero_address_frag);
6021 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6022 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6023 i = S_GET_NUMBER_AUXILIARY (csect);
6024 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6025 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6026 a->x_csect.x_scnlen.l = 0;
6027 a->x_csect.x_smtyp = XTY_SD;
6028 a->x_csect.x_parmhash = 0;
6029 a->x_csect.x_snhash = 0;
6030 a->x_csect.x_smclas = XMC_XO;
6031 a->x_csect.x_stab = 0;
6032 a->x_csect.x_snstab = 0;
6034 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6036 i = S_GET_NUMBER_AUXILIARY (sym);
6037 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6038 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6039 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6042 ppc_saw_abs = FALSE;
6045 /* Set the VMA for a section. This is called on all the sections in
6049 ppc_frob_section (asection *sec)
6051 static bfd_vma vma = 0;
6053 /* Dwarf sections start at 0. */
6054 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6057 vma = md_section_align (sec, vma);
6058 bfd_set_section_vma (stdoutput, sec, vma);
6059 vma += bfd_section_size (stdoutput, sec);
6062 #endif /* OBJ_XCOFF */
6065 md_atof (int type, char *litp, int *sizep)
6067 return ieee_md_atof (type, litp, sizep, target_big_endian);
6070 /* Write a value out to the object file, using the appropriate
6074 md_number_to_chars (char *buf, valueT val, int n)
6076 if (target_big_endian)
6077 number_to_chars_bigendian (buf, val, n);
6079 number_to_chars_littleendian (buf, val, n);
6082 /* Align a section (I don't know why this is machine dependent). */
6085 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6090 int align = bfd_get_section_alignment (stdoutput, seg);
6092 return ((addr + (1 << align) - 1) & -(1 << align));
6096 /* We don't have any form of relaxing. */
6099 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6100 asection *seg ATTRIBUTE_UNUSED)
6106 /* Convert a machine dependent frag. We never generate these. */
6109 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6110 asection *sec ATTRIBUTE_UNUSED,
6111 fragS *fragp ATTRIBUTE_UNUSED)
6116 /* We have no need to default values of symbols. */
6119 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6124 /* Functions concerning relocs. */
6126 /* The location from which a PC relative jump should be calculated,
6127 given a PC relative reloc. */
6130 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6132 return fixp->fx_frag->fr_address + fixp->fx_where;
6137 /* This is called to see whether a fixup should be adjusted to use a
6138 section symbol. We take the opportunity to change a fixup against
6139 a symbol in the TOC subsegment into a reloc against the
6140 corresponding .tc symbol. */
6143 ppc_fix_adjustable (fixS *fix)
6145 valueT val = resolve_symbol_value (fix->fx_addsy);
6146 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6147 TC_SYMFIELD_TYPE *tc;
6149 if (symseg == absolute_section)
6152 /* Always adjust symbols in debugging sections. */
6153 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6156 if (ppc_toc_csect != (symbolS *) NULL
6157 && fix->fx_addsy != ppc_toc_csect
6158 && symseg == data_section
6159 && val >= ppc_toc_frag->fr_address
6160 && (ppc_after_toc_frag == (fragS *) NULL
6161 || val < ppc_after_toc_frag->fr_address))
6165 for (sy = symbol_next (ppc_toc_csect);
6166 sy != (symbolS *) NULL;
6167 sy = symbol_next (sy))
6169 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6171 if (sy_tc->symbol_class == XMC_TC0)
6173 if (sy_tc->symbol_class != XMC_TC)
6175 if (val == resolve_symbol_value (sy))
6178 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6183 as_bad_where (fix->fx_file, fix->fx_line,
6184 _("symbol in .toc does not match any .tc"));
6187 /* Possibly adjust the reloc to be against the csect. */
6188 tc = symbol_get_tc (fix->fx_addsy);
6190 && tc->symbol_class != XMC_TC0
6191 && tc->symbol_class != XMC_TC
6192 && symseg != bss_section
6193 /* Don't adjust if this is a reloc in the toc section. */
6194 && (symseg != data_section
6195 || ppc_toc_csect == NULL
6196 || val < ppc_toc_frag->fr_address
6197 || (ppc_after_toc_frag != NULL
6198 && val >= ppc_after_toc_frag->fr_address)))
6200 symbolS *csect = tc->within;
6202 /* If the symbol was not declared by a label (eg: a section symbol),
6203 use the section instead of the csect. This doesn't happen in
6204 normal AIX assembly code. */
6206 csect = seg_info (symseg)->sym;
6208 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6209 fix->fx_addsy = csect;
6214 /* Adjust a reloc against a .lcomm symbol to be against the base
6216 if (symseg == bss_section
6217 && ! S_IS_EXTERNAL (fix->fx_addsy))
6219 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6221 fix->fx_offset += val - resolve_symbol_value (sy);
6228 /* A reloc from one csect to another must be kept. The assembler
6229 will, of course, keep relocs between sections, and it will keep
6230 absolute relocs, but we need to force it to keep PC relative relocs
6231 between two csects in the same section. */
6234 ppc_force_relocation (fixS *fix)
6236 /* At this point fix->fx_addsy should already have been converted to
6237 a csect symbol. If the csect does not include the fragment, then
6238 we need to force the relocation. */
6240 && fix->fx_addsy != NULL
6241 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6242 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6243 > fix->fx_frag->fr_address)
6244 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6245 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6246 <= fix->fx_frag->fr_address))))
6249 return generic_force_reloc (fix);
6253 ppc_new_dot_label (symbolS *sym)
6255 /* Anchor this label to the current csect for relocations. */
6256 symbol_get_tc (sym)->within = ppc_current_csect;
6259 #endif /* OBJ_XCOFF */
6262 /* If this function returns non-zero, it guarantees that a relocation
6263 will be emitted for a fixup. */
6266 ppc_force_relocation (fixS *fix)
6268 /* Branch prediction relocations must force a relocation, as must
6269 the vtable description relocs. */
6270 switch (fix->fx_r_type)
6272 case BFD_RELOC_PPC_B16_BRTAKEN:
6273 case BFD_RELOC_PPC_B16_BRNTAKEN:
6274 case BFD_RELOC_PPC_BA16_BRTAKEN:
6275 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6276 case BFD_RELOC_24_PLT_PCREL:
6277 case BFD_RELOC_PPC64_TOC:
6279 case BFD_RELOC_PPC_B26:
6280 case BFD_RELOC_PPC_BA26:
6281 case BFD_RELOC_PPC_B16:
6282 case BFD_RELOC_PPC_BA16:
6283 /* All branch fixups targeting a localentry symbol must
6284 force a relocation. */
6287 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6288 elf_symbol_type *elfsym
6289 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6290 gas_assert (elfsym);
6291 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6299 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6300 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6303 return generic_force_reloc (fix);
6307 ppc_fix_adjustable (fixS *fix)
6309 switch (fix->fx_r_type)
6311 /* All branch fixups targeting a localentry symbol must
6312 continue using the symbol. */
6313 case BFD_RELOC_PPC_B26:
6314 case BFD_RELOC_PPC_BA26:
6315 case BFD_RELOC_PPC_B16:
6316 case BFD_RELOC_PPC_BA16:
6317 case BFD_RELOC_PPC_B16_BRTAKEN:
6318 case BFD_RELOC_PPC_B16_BRNTAKEN:
6319 case BFD_RELOC_PPC_BA16_BRTAKEN:
6320 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6323 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6324 elf_symbol_type *elfsym
6325 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6326 gas_assert (elfsym);
6327 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6335 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6336 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6337 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6338 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6339 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6340 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6341 && fix->fx_r_type != BFD_RELOC_GPREL16
6342 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6343 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6344 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6345 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6350 ppc_frag_check (struct frag *fragP)
6352 if (!fragP->has_code)
6355 if (ppc_mach() == bfd_mach_ppc_vle)
6357 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6358 as_bad (_("instruction address is not a multiple of 2"));
6362 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6363 as_bad (_("instruction address is not a multiple of 4"));
6367 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6368 rs_align_code frag. */
6371 ppc_handle_align (struct frag *fragP)
6373 valueT count = (fragP->fr_next->fr_address
6374 - (fragP->fr_address + fragP->fr_fix));
6376 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6378 char *dest = fragP->fr_literal + fragP->fr_fix;
6381 md_number_to_chars (dest, 0x4400, 2);
6383 else if (count != 0 && (count & 3) == 0)
6385 char *dest = fragP->fr_literal + fragP->fr_fix;
6389 if (count > 4 * nop_limit && count < 0x2000000)
6393 /* Make a branch, then follow with nops. Insert another
6394 frag to handle the nops. */
6395 md_number_to_chars (dest, 0x48000000 + count, 4);
6400 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6401 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6402 fragP->fr_next = rest;
6404 rest->fr_address += rest->fr_fix + 4;
6406 /* If we leave the next frag as rs_align_code we'll come here
6407 again, resulting in a bunch of branches rather than a
6408 branch followed by nops. */
6409 rest->fr_type = rs_align;
6410 dest = rest->fr_literal;
6413 md_number_to_chars (dest, 0x60000000, 4);
6415 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6416 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6417 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6418 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6420 /* For power6, power7, power8 and power9, we want the last nop to be
6421 a group terminating one. Do this by inserting an rs_fill frag
6422 immediately after this one, with its address set to the last nop
6423 location. This will automatically reduce the number of nops in
6424 the current frag by one. */
6427 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6429 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6430 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6431 group_nop->fr_fix = 0;
6432 group_nop->fr_offset = 1;
6433 group_nop->fr_type = rs_fill;
6434 fragP->fr_next = group_nop;
6435 dest = group_nop->fr_literal;
6438 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6439 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6440 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6442 if (ppc_cpu & PPC_OPCODE_E500MC)
6443 /* e500mc group terminating nop: "ori 0,0,0". */
6444 md_number_to_chars (dest, 0x60000000, 4);
6446 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6447 md_number_to_chars (dest, 0x60420000, 4);
6450 /* power6 group terminating nop: "ori 1,1,0". */
6451 md_number_to_chars (dest, 0x60210000, 4);
6456 /* Apply a fixup to the object code. This is called for all the
6457 fixups we generated by the calls to fix_new_exp, above. */
6460 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6462 valueT value = * valP;
6464 const struct powerpc_operand *operand;
6467 if (fixP->fx_addsy != NULL)
6469 /* Hack around bfd_install_relocation brain damage. */
6471 value += fixP->fx_frag->fr_address + fixP->fx_where;
6473 if (fixP->fx_addsy == abs_section_sym)
6479 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6480 the symbol values. If we are doing this relocation the code in
6481 write.c is going to call bfd_install_relocation, which is also
6482 going to use the symbol value. That means that if the reloc is
6483 fully resolved we want to use *valP since bfd_install_relocation is
6485 However, if the reloc is not fully resolved we do not want to
6486 use *valP, and must use fx_offset instead. If the relocation
6487 is PC-relative, we then need to re-apply md_pcrel_from_section
6488 to this new relocation value. */
6489 if (fixP->fx_addsy == (symbolS *) NULL)
6494 value = fixP->fx_offset;
6496 value -= md_pcrel_from_section (fixP, seg);
6500 if (fixP->fx_subsy != (symbolS *) NULL)
6502 /* We can't actually support subtracting a symbol. */
6503 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6507 if (fixP->fx_pcrel_adjust != 0)
6509 /* This is a fixup on an instruction. */
6510 int opindex = fixP->fx_pcrel_adjust & 0xff;
6512 operand = &powerpc_operands[opindex];
6514 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6515 does not generate a reloc. It uses the offset of `sym' within its
6516 csect. Other usages, such as `.long sym', generate relocs. This
6517 is the documented behaviour of non-TOC symbols. */
6518 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6519 && (operand->bitm & 0xfff0) == 0xfff0
6520 && operand->shift == 0
6521 && (operand->insert == NULL || ppc_obj64)
6522 && fixP->fx_addsy != NULL
6523 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6524 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6525 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6526 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6528 value = fixP->fx_offset;
6532 /* During parsing of instructions, a TOC16 reloc is generated for
6533 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6534 in the toc. But at parse time, SYM may be not yet defined, so
6535 check again here. */
6536 if (fixP->fx_r_type == BFD_RELOC_16
6537 && fixP->fx_addsy != NULL
6538 && ppc_is_toc_sym (fixP->fx_addsy))
6539 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6543 /* Calculate value to be stored in field. */
6545 switch (fixP->fx_r_type)
6548 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6549 case BFD_RELOC_PPC_VLE_LO16A:
6550 case BFD_RELOC_PPC_VLE_LO16D:
6552 case BFD_RELOC_LO16:
6553 case BFD_RELOC_LO16_PCREL:
6554 fieldval = value & 0xffff;
6556 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6557 fieldval = SEX16 (fieldval);
6558 fixP->fx_no_overflow = 1;
6561 case BFD_RELOC_HI16:
6562 case BFD_RELOC_HI16_PCREL:
6564 if (REPORT_OVERFLOW_HI && ppc_obj64)
6566 fieldval = value >> 16;
6567 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6569 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6570 fieldval = ((valueT) fieldval ^ sign) - sign;
6576 case BFD_RELOC_PPC_VLE_HI16A:
6577 case BFD_RELOC_PPC_VLE_HI16D:
6578 case BFD_RELOC_PPC64_ADDR16_HIGH:
6580 fieldval = PPC_HI (value);
6581 goto sign_extend_16;
6583 case BFD_RELOC_HI16_S:
6584 case BFD_RELOC_HI16_S_PCREL:
6585 case BFD_RELOC_PPC_REL16DX_HA:
6587 if (REPORT_OVERFLOW_HI && ppc_obj64)
6589 fieldval = (value + 0x8000) >> 16;
6590 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6592 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6593 fieldval = ((valueT) fieldval ^ sign) - sign;
6599 case BFD_RELOC_PPC_VLE_HA16A:
6600 case BFD_RELOC_PPC_VLE_HA16D:
6601 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6603 fieldval = PPC_HA (value);
6604 goto sign_extend_16;
6607 case BFD_RELOC_PPC64_HIGHER:
6608 fieldval = PPC_HIGHER (value);
6609 goto sign_extend_16;
6611 case BFD_RELOC_PPC64_HIGHER_S:
6612 fieldval = PPC_HIGHERA (value);
6613 goto sign_extend_16;
6615 case BFD_RELOC_PPC64_HIGHEST:
6616 fieldval = PPC_HIGHEST (value);
6617 goto sign_extend_16;
6619 case BFD_RELOC_PPC64_HIGHEST_S:
6620 fieldval = PPC_HIGHESTA (value);
6621 goto sign_extend_16;
6628 if (operand != NULL)
6630 /* Handle relocs in an insn. */
6631 switch (fixP->fx_r_type)
6634 /* The following relocs can't be calculated by the assembler.
6635 Leave the field zero. */
6636 case BFD_RELOC_PPC_TPREL16:
6637 case BFD_RELOC_PPC_TPREL16_LO:
6638 case BFD_RELOC_PPC_TPREL16_HI:
6639 case BFD_RELOC_PPC_TPREL16_HA:
6640 case BFD_RELOC_PPC_DTPREL16:
6641 case BFD_RELOC_PPC_DTPREL16_LO:
6642 case BFD_RELOC_PPC_DTPREL16_HI:
6643 case BFD_RELOC_PPC_DTPREL16_HA:
6644 case BFD_RELOC_PPC_GOT_TLSGD16:
6645 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6646 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6647 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6648 case BFD_RELOC_PPC_GOT_TLSLD16:
6649 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6650 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6651 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6652 case BFD_RELOC_PPC_GOT_TPREL16:
6653 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6654 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6655 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6656 case BFD_RELOC_PPC_GOT_DTPREL16:
6657 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6658 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6659 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6660 case BFD_RELOC_PPC64_TPREL16_DS:
6661 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6662 case BFD_RELOC_PPC64_TPREL16_HIGH:
6663 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6664 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6665 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6666 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6667 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6668 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6669 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6670 case BFD_RELOC_PPC64_DTPREL16_DS:
6671 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6672 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6673 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6674 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6675 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6676 gas_assert (fixP->fx_addsy != NULL);
6677 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6681 /* These also should leave the field zero for the same
6682 reason. Note that older versions of gas wrote values
6683 here. If we want to go back to the old behaviour, then
6684 all _LO and _LO_DS cases will need to be treated like
6685 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6686 case BFD_RELOC_16_GOTOFF:
6687 case BFD_RELOC_LO16_GOTOFF:
6688 case BFD_RELOC_HI16_GOTOFF:
6689 case BFD_RELOC_HI16_S_GOTOFF:
6690 case BFD_RELOC_LO16_PLTOFF:
6691 case BFD_RELOC_HI16_PLTOFF:
6692 case BFD_RELOC_HI16_S_PLTOFF:
6693 case BFD_RELOC_GPREL16:
6694 case BFD_RELOC_16_BASEREL:
6695 case BFD_RELOC_LO16_BASEREL:
6696 case BFD_RELOC_HI16_BASEREL:
6697 case BFD_RELOC_HI16_S_BASEREL:
6698 case BFD_RELOC_PPC_TOC16:
6699 case BFD_RELOC_PPC64_TOC16_LO:
6700 case BFD_RELOC_PPC64_TOC16_HI:
6701 case BFD_RELOC_PPC64_TOC16_HA:
6702 case BFD_RELOC_PPC64_PLTGOT16:
6703 case BFD_RELOC_PPC64_PLTGOT16_LO:
6704 case BFD_RELOC_PPC64_PLTGOT16_HI:
6705 case BFD_RELOC_PPC64_PLTGOT16_HA:
6706 case BFD_RELOC_PPC64_GOT16_DS:
6707 case BFD_RELOC_PPC64_GOT16_LO_DS:
6708 case BFD_RELOC_PPC64_PLT16_LO_DS:
6709 case BFD_RELOC_PPC64_SECTOFF_DS:
6710 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6711 case BFD_RELOC_PPC64_TOC16_DS:
6712 case BFD_RELOC_PPC64_TOC16_LO_DS:
6713 case BFD_RELOC_PPC64_PLTGOT16_DS:
6714 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6715 case BFD_RELOC_PPC_EMB_NADDR16:
6716 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6717 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6718 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6719 case BFD_RELOC_PPC_EMB_SDAI16:
6720 case BFD_RELOC_PPC_EMB_SDA2I16:
6721 case BFD_RELOC_PPC_EMB_SDA2REL:
6722 case BFD_RELOC_PPC_EMB_SDA21:
6723 case BFD_RELOC_PPC_EMB_MRKREF:
6724 case BFD_RELOC_PPC_EMB_RELSEC16:
6725 case BFD_RELOC_PPC_EMB_RELST_LO:
6726 case BFD_RELOC_PPC_EMB_RELST_HI:
6727 case BFD_RELOC_PPC_EMB_RELST_HA:
6728 case BFD_RELOC_PPC_EMB_BIT_FLD:
6729 case BFD_RELOC_PPC_EMB_RELSDA:
6730 case BFD_RELOC_PPC_VLE_SDA21:
6731 case BFD_RELOC_PPC_VLE_SDA21_LO:
6732 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6733 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6734 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6735 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6736 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6737 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6738 gas_assert (fixP->fx_addsy != NULL);
6741 case BFD_RELOC_PPC_TLS:
6742 case BFD_RELOC_PPC_TLSGD:
6743 case BFD_RELOC_PPC_TLSLD:
6749 case BFD_RELOC_PPC_B16:
6750 /* Adjust the offset to the instruction boundary. */
6755 case BFD_RELOC_VTABLE_INHERIT:
6756 case BFD_RELOC_VTABLE_ENTRY:
6757 case BFD_RELOC_PPC_DTPMOD:
6758 case BFD_RELOC_PPC_TPREL:
6759 case BFD_RELOC_PPC_DTPREL:
6760 case BFD_RELOC_PPC_COPY:
6761 case BFD_RELOC_PPC_GLOB_DAT:
6762 case BFD_RELOC_32_PLT_PCREL:
6763 case BFD_RELOC_PPC_EMB_NADDR32:
6764 case BFD_RELOC_PPC64_TOC:
6765 case BFD_RELOC_CTOR:
6767 case BFD_RELOC_32_PCREL:
6770 case BFD_RELOC_64_PCREL:
6771 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6772 as_bad_where (fixP->fx_file, fixP->fx_line,
6773 _("%s unsupported as instruction fixup"),
6774 bfd_get_reloc_code_name (fixP->fx_r_type));
6783 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6784 contents can stay at zero. */
6785 #define APPLY_RELOC fixP->fx_done
6787 #define APPLY_RELOC 1
6789 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6792 unsigned char *where;
6794 /* Fetch the instruction, insert the fully resolved operand
6795 value, and stuff the instruction back again. */
6796 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6797 if (target_big_endian)
6799 if (fixP->fx_size == 4)
6800 insn = bfd_getb32 (where);
6802 insn = bfd_getb16 (where);
6806 if (fixP->fx_size == 4)
6807 insn = bfd_getl32 (where);
6809 insn = bfd_getl16 (where);
6811 insn = ppc_insert_operand (insn, operand, fieldval,
6812 fixP->tc_fix_data.ppc_cpu,
6813 fixP->fx_file, fixP->fx_line);
6814 if (target_big_endian)
6816 if (fixP->fx_size == 4)
6817 bfd_putb32 (insn, where);
6819 bfd_putb16 (insn, where);
6823 if (fixP->fx_size == 4)
6824 bfd_putl32 (insn, where);
6826 bfd_putl16 (insn, where);
6831 /* Nothing else to do here. */
6834 gas_assert (fixP->fx_addsy != NULL);
6835 if (fixP->fx_r_type == BFD_RELOC_NONE)
6840 /* Use expr_symbol_where to see if this is an expression
6842 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6843 as_bad_where (fixP->fx_file, fixP->fx_line,
6844 _("unresolved expression that must be resolved"));
6846 as_bad_where (fixP->fx_file, fixP->fx_line,
6847 _("unsupported relocation against %s"),
6848 S_GET_NAME (fixP->fx_addsy));
6855 /* Handle relocs in data. */
6856 switch (fixP->fx_r_type)
6858 case BFD_RELOC_VTABLE_INHERIT:
6860 && !S_IS_DEFINED (fixP->fx_addsy)
6861 && !S_IS_WEAK (fixP->fx_addsy))
6862 S_SET_WEAK (fixP->fx_addsy);
6865 case BFD_RELOC_VTABLE_ENTRY:
6870 /* These can appear with @l etc. in data. */
6871 case BFD_RELOC_LO16:
6872 case BFD_RELOC_LO16_PCREL:
6873 case BFD_RELOC_HI16:
6874 case BFD_RELOC_HI16_PCREL:
6875 case BFD_RELOC_HI16_S:
6876 case BFD_RELOC_HI16_S_PCREL:
6877 case BFD_RELOC_PPC64_HIGHER:
6878 case BFD_RELOC_PPC64_HIGHER_S:
6879 case BFD_RELOC_PPC64_HIGHEST:
6880 case BFD_RELOC_PPC64_HIGHEST_S:
6881 case BFD_RELOC_PPC64_ADDR16_HIGH:
6882 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6883 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6886 case BFD_RELOC_PPC_DTPMOD:
6887 case BFD_RELOC_PPC_TPREL:
6888 case BFD_RELOC_PPC_DTPREL:
6889 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6892 /* Just punt all of these to the linker. */
6893 case BFD_RELOC_PPC_B16_BRTAKEN:
6894 case BFD_RELOC_PPC_B16_BRNTAKEN:
6895 case BFD_RELOC_16_GOTOFF:
6896 case BFD_RELOC_LO16_GOTOFF:
6897 case BFD_RELOC_HI16_GOTOFF:
6898 case BFD_RELOC_HI16_S_GOTOFF:
6899 case BFD_RELOC_LO16_PLTOFF:
6900 case BFD_RELOC_HI16_PLTOFF:
6901 case BFD_RELOC_HI16_S_PLTOFF:
6902 case BFD_RELOC_PPC_COPY:
6903 case BFD_RELOC_PPC_GLOB_DAT:
6904 case BFD_RELOC_16_BASEREL:
6905 case BFD_RELOC_LO16_BASEREL:
6906 case BFD_RELOC_HI16_BASEREL:
6907 case BFD_RELOC_HI16_S_BASEREL:
6908 case BFD_RELOC_PPC_TLS:
6909 case BFD_RELOC_PPC_DTPREL16_LO:
6910 case BFD_RELOC_PPC_DTPREL16_HI:
6911 case BFD_RELOC_PPC_DTPREL16_HA:
6912 case BFD_RELOC_PPC_TPREL16_LO:
6913 case BFD_RELOC_PPC_TPREL16_HI:
6914 case BFD_RELOC_PPC_TPREL16_HA:
6915 case BFD_RELOC_PPC_GOT_TLSGD16:
6916 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6917 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6918 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6919 case BFD_RELOC_PPC_GOT_TLSLD16:
6920 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6921 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6922 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6923 case BFD_RELOC_PPC_GOT_DTPREL16:
6924 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6925 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6926 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6927 case BFD_RELOC_PPC_GOT_TPREL16:
6928 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6929 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6930 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6931 case BFD_RELOC_24_PLT_PCREL:
6932 case BFD_RELOC_PPC_LOCAL24PC:
6933 case BFD_RELOC_32_PLT_PCREL:
6934 case BFD_RELOC_GPREL16:
6935 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6936 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6937 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6938 case BFD_RELOC_PPC_EMB_NADDR32:
6939 case BFD_RELOC_PPC_EMB_NADDR16:
6940 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6941 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6942 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6943 case BFD_RELOC_PPC_EMB_SDAI16:
6944 case BFD_RELOC_PPC_EMB_SDA2REL:
6945 case BFD_RELOC_PPC_EMB_SDA2I16:
6946 case BFD_RELOC_PPC_EMB_SDA21:
6947 case BFD_RELOC_PPC_VLE_SDA21_LO:
6948 case BFD_RELOC_PPC_EMB_MRKREF:
6949 case BFD_RELOC_PPC_EMB_RELSEC16:
6950 case BFD_RELOC_PPC_EMB_RELST_LO:
6951 case BFD_RELOC_PPC_EMB_RELST_HI:
6952 case BFD_RELOC_PPC_EMB_RELST_HA:
6953 case BFD_RELOC_PPC_EMB_BIT_FLD:
6954 case BFD_RELOC_PPC_EMB_RELSDA:
6955 case BFD_RELOC_PPC64_TOC:
6956 case BFD_RELOC_PPC_TOC16:
6957 case BFD_RELOC_PPC64_TOC16_LO:
6958 case BFD_RELOC_PPC64_TOC16_HI:
6959 case BFD_RELOC_PPC64_TOC16_HA:
6960 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6961 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6962 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6963 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6964 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6965 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6966 case BFD_RELOC_PPC64_TPREL16_HIGH:
6967 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6968 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6969 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6970 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6971 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6977 case BFD_RELOC_NONE:
6979 case BFD_RELOC_CTOR:
6981 case BFD_RELOC_32_PCREL:
6984 case BFD_RELOC_64_PCREL:
6986 case BFD_RELOC_16_PCREL:
6992 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6997 if (fixP->fx_size && APPLY_RELOC)
6998 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6999 fieldval, fixP->fx_size);
7001 && (seg->flags & SEC_CODE) != 0
7002 && fixP->fx_size == 4
7005 && (fixP->fx_r_type == BFD_RELOC_32
7006 || fixP->fx_r_type == BFD_RELOC_CTOR
7007 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7008 as_warn_where (fixP->fx_file, fixP->fx_line,
7009 _("data in executable section"));
7012 /* We are only able to convert some relocs to pc-relative. */
7013 if (!fixP->fx_done && fixP->fx_pcrel)
7015 switch (fixP->fx_r_type)
7017 case BFD_RELOC_LO16:
7018 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7021 case BFD_RELOC_HI16:
7022 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7025 case BFD_RELOC_HI16_S:
7026 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7030 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7034 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7038 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7041 /* Some of course are already pc-relative. */
7042 case BFD_RELOC_LO16_PCREL:
7043 case BFD_RELOC_HI16_PCREL:
7044 case BFD_RELOC_HI16_S_PCREL:
7045 case BFD_RELOC_PPC_REL16DX_HA:
7046 case BFD_RELOC_64_PCREL:
7047 case BFD_RELOC_32_PCREL:
7048 case BFD_RELOC_16_PCREL:
7049 case BFD_RELOC_PPC_B16:
7050 case BFD_RELOC_PPC_B16_BRTAKEN:
7051 case BFD_RELOC_PPC_B16_BRNTAKEN:
7052 case BFD_RELOC_PPC_B26:
7053 case BFD_RELOC_PPC_LOCAL24PC:
7054 case BFD_RELOC_24_PLT_PCREL:
7055 case BFD_RELOC_32_PLT_PCREL:
7056 case BFD_RELOC_64_PLT_PCREL:
7057 case BFD_RELOC_PPC_VLE_REL8:
7058 case BFD_RELOC_PPC_VLE_REL15:
7059 case BFD_RELOC_PPC_VLE_REL24:
7068 /* Use expr_symbol_where to see if this is an
7069 expression symbol. */
7070 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7071 as_bad_where (fixP->fx_file, fixP->fx_line,
7072 _("unresolved expression that must"
7075 as_bad_where (fixP->fx_file, fixP->fx_line,
7076 _("cannot emit PC relative %s relocation"
7078 bfd_get_reloc_code_name (fixP->fx_r_type),
7079 S_GET_NAME (fixP->fx_addsy));
7082 as_bad_where (fixP->fx_file, fixP->fx_line,
7083 _("unable to resolve expression"));
7090 ppc_elf_validate_fix (fixP, seg);
7091 fixP->fx_addnumber = value;
7093 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7094 from the section contents. If we are going to be emitting a reloc
7095 then the section contents are immaterial, so don't warn if they
7096 happen to overflow. Leave such warnings to ld. */
7099 fixP->fx_no_overflow = 1;
7101 /* Arrange to emit .TOC. as a normal symbol if used in anything
7102 but .TOC.@tocbase. */
7104 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7105 && fixP->fx_addsy != NULL
7106 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7107 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7110 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7111 fixP->fx_addnumber = 0;
7115 fixP->fx_addnumber = 0;
7117 /* We want to use the offset within the toc, not the actual VMA
7119 fixP->fx_addnumber =
7120 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7121 - S_GET_VALUE (ppc_toc_csect);
7122 /* Set *valP to avoid errors. */
7129 /* Generate a reloc for a fixup. */
7132 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7136 reloc = (arelent *) xmalloc (sizeof (arelent));
7138 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
7139 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7140 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7141 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7142 if (reloc->howto == (reloc_howto_type *) NULL)
7144 as_bad_where (fixp->fx_file, fixp->fx_line,
7145 _("reloc %d not supported by object file format"),
7146 (int) fixp->fx_r_type);
7149 reloc->addend = fixp->fx_addnumber;
7155 ppc_cfi_frame_initial_instructions (void)
7157 cfi_add_CFA_def_cfa (1, 0);
7161 tc_ppc_regname_to_dw2regnum (char *regname)
7163 unsigned int regnum = -1;
7167 static struct { const char *name; int dw2regnum; } regnames[] =
7169 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7170 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7171 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7172 { "spe_acc", 111 }, { "spefscr", 112 }
7175 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7176 if (strcmp (regnames[i].name, regname) == 0)
7177 return regnames[i].dw2regnum;
7179 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7181 p = regname + 1 + (regname[1] == '.');
7182 regnum = strtoul (p, &q, 10);
7183 if (p == q || *q || regnum >= 32)
7185 if (regname[0] == 'f')
7187 else if (regname[0] == 'v')
7190 else if (regname[0] == 'c' && regname[1] == 'r')
7192 p = regname + 2 + (regname[2] == '.');
7193 if (p[0] < '0' || p[0] > '7' || p[1])
7195 regnum = p[0] - '0' + 68;