1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2016 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
139 static void ppc_previous (int);
140 static void ppc_pdata (int);
141 static void ppc_ydata (int);
142 static void ppc_reldata (int);
143 static void ppc_rdata (int);
144 static void ppc_ualong (int);
145 static void ppc_znop (int);
146 static void ppc_pe_comm (int);
147 static void ppc_pe_section (int);
148 static void ppc_pe_function (int);
149 static void ppc_pe_tocd (int);
152 /* Generic assembler global variables which must be defined by all
156 /* This string holds the chars that always start a comment. If the
157 pre-processor is disabled, these aren't very useful. The macro
158 tc_comment_chars points to this. We use this, rather than the
159 usual comment_chars, so that we can switch for Solaris conventions. */
160 static const char ppc_solaris_comment_chars[] = "#!";
161 static const char ppc_eabi_comment_chars[] = "#";
163 #ifdef TARGET_SOLARIS_COMMENT
164 const char *ppc_comment_chars = ppc_solaris_comment_chars;
166 const char *ppc_comment_chars = ppc_eabi_comment_chars;
169 const char comment_chars[] = "#";
172 /* Characters which start a comment at the beginning of a line. */
173 const char line_comment_chars[] = "#";
175 /* Characters which may be used to separate multiple commands on a
177 const char line_separator_chars[] = ";";
179 /* Characters which are used to indicate an exponent in a floating
181 const char EXP_CHARS[] = "eE";
183 /* Characters which mean that a number is a floating point constant,
185 const char FLT_CHARS[] = "dD";
187 /* Anything that can start an operand needs to be mentioned here,
188 to stop the input scrubber eating whitespace. */
189 const char ppc_symbol_chars[] = "%[";
191 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
192 int ppc_cie_data_alignment;
194 /* The dwarf2 minimum instruction length. */
195 int ppc_dwarf2_line_min_insn_length;
197 /* More than this number of nops in an alignment op gets a branch
199 unsigned long nop_limit = 4;
201 /* The type of processor we are assembling for. This is one or more
202 of the PPC_OPCODE flags defined in opcode/ppc.h. */
203 ppc_cpu_t ppc_cpu = 0;
204 ppc_cpu_t sticky = 0;
206 /* Value for ELF e_flags EF_PPC64_ABI. */
207 unsigned int ppc_abiversion = 0;
209 /* Flags set on encountering toc relocs. */
211 has_large_toc_reloc = 1,
212 has_small_toc_reloc = 2
215 /* Warn on emitting data to code sections. */
217 unsigned long last_insn;
221 /* The target specific pseudo-ops which we support. */
223 const pseudo_typeS md_pseudo_table[] =
225 /* Pseudo-ops which must be overridden. */
226 { "byte", ppc_byte, 0 },
229 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
230 legitimately belong in the obj-*.c file. However, XCOFF is based
231 on COFF, and is only implemented for the RS/6000. We just use
232 obj-coff.c, and add what we need here. */
233 { "comm", ppc_comm, 0 },
234 { "lcomm", ppc_comm, 1 },
238 { "bi", ppc_biei, 0 },
240 { "csect", ppc_csect, 0 },
241 { "dwsect", ppc_dwsect, 0 },
242 { "data", ppc_section, 'd' },
246 { "ei", ppc_biei, 1 },
248 { "extern", ppc_extern, 0 },
249 { "function", ppc_function, 0 },
250 { "lglobl", ppc_lglobl, 0 },
251 { "ref", ppc_ref, 0 },
252 { "rename", ppc_rename, 0 },
253 { "section", ppc_named_section, 0 },
254 { "stabx", ppc_stabx, 0 },
255 { "text", ppc_section, 't' },
256 { "toc", ppc_toc, 0 },
257 { "long", ppc_xcoff_cons, 2 },
258 { "llong", ppc_xcoff_cons, 3 },
259 { "word", ppc_xcoff_cons, 1 },
260 { "short", ppc_xcoff_cons, 1 },
261 { "vbyte", ppc_vbyte, 0 },
265 { "llong", cons, 8 },
266 { "rdata", ppc_elf_rdata, 0 },
267 { "rodata", ppc_elf_rdata, 0 },
268 { "lcomm", ppc_elf_lcomm, 0 },
269 { "localentry", ppc_elf_localentry, 0 },
270 { "abiversion", ppc_elf_abiversion, 0 },
274 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
275 { "previous", ppc_previous, 0 },
276 { "pdata", ppc_pdata, 0 },
277 { "ydata", ppc_ydata, 0 },
278 { "reldata", ppc_reldata, 0 },
279 { "rdata", ppc_rdata, 0 },
280 { "ualong", ppc_ualong, 0 },
281 { "znop", ppc_znop, 0 },
282 { "comm", ppc_pe_comm, 0 },
283 { "lcomm", ppc_pe_comm, 1 },
284 { "section", ppc_pe_section, 0 },
285 { "function", ppc_pe_function,0 },
286 { "tocd", ppc_pe_tocd, 0 },
289 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
291 { "machine", ppc_machine, 0 },
298 /* Predefined register names if -mregnames (or default for Windows NT).
299 In general, there are lots of them, in an attempt to be compatible
300 with a number of other Windows NT assemblers. */
302 /* Structure to hold information about predefined registers. */
309 /* List of registers that are pre-defined:
311 Each general register has predefined names of the form:
312 1. r<reg_num> which has the value <reg_num>.
313 2. r.<reg_num> which has the value <reg_num>.
315 Each floating point register has predefined names of the form:
316 1. f<reg_num> which has the value <reg_num>.
317 2. f.<reg_num> which has the value <reg_num>.
319 Each vector unit register has predefined names of the form:
320 1. v<reg_num> which has the value <reg_num>.
321 2. v.<reg_num> which has the value <reg_num>.
323 Each condition register has predefined names of the form:
324 1. cr<reg_num> which has the value <reg_num>.
325 2. cr.<reg_num> which has the value <reg_num>.
327 There are individual registers as well:
328 sp or r.sp has the value 1
329 rtoc or r.toc has the value 2
330 fpscr has the value 0
336 dsisr has the value 18
338 sdr1 has the value 25
339 srr0 has the value 26
340 srr1 has the value 27
342 The table is sorted. Suitable for searching by a binary search. */
344 static const struct pd_reg pre_defined_registers[] =
346 { "cr.0", 0 }, /* Condition Registers */
366 { "dar", 19 }, /* Data Access Register */
367 { "dec", 22 }, /* Decrementer */
368 { "dsisr", 18 }, /* Data Storage Interrupt Status Register */
370 { "f.0", 0 }, /* Floating point registers */
397 { "f.32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
463 { "f32", 32 }, /* Extended floating point scalar registers (ISA 2.06). */
504 /* Quantization registers used with pair single instructions. */
522 { "lr", 8 }, /* Link Register */
526 { "r.0", 0 }, /* General Purpose Registers */
559 { "r.sp", 1 }, /* Stack Pointer */
561 { "r.toc", 2 }, /* Pointer to the table of contents */
563 { "r0", 0 }, /* More general purpose registers */
596 { "rtoc", 2 }, /* Table of contents */
598 { "sdr1", 25 }, /* Storage Description Register 1 */
602 { "srr0", 26 }, /* Machine Status Save/Restore Register 0 */
603 { "srr1", 27 }, /* Machine Status Save/Restore Register 1 */
605 { "v.0", 0 }, /* Vector (Altivec/VMX) registers */
671 { "vs.0", 0 }, /* Vector Scalar (VSX) registers (ISA 2.06). */
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 int middle, low, high;
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
828 return regs[middle].value;
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS *expressionP)
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
860 else if (!reg_names_p || !ISALPHA (name[0]))
863 c = get_symbol_name (&name);
864 reg_number = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
869 /* Look to see if it's in the register table. */
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg_number;
875 /* Make the rest nice. */
876 expressionP->X_add_symbol = NULL;
877 expressionP->X_op_symbol = NULL;
881 /* Reset the line as if we had not done anything. */
882 input_line_pointer = start;
886 /* This function is called for each symbol seen in an expression. It
887 handles the special parsing which PowerPC assemblers are supposed
888 to use for condition codes. */
890 /* Whether to do the special parsing. */
891 static bfd_boolean cr_operand;
893 /* Names to recognize in a condition code. This table is sorted. */
894 static const struct pd_reg cr_names[] =
911 /* Parsing function. This returns non-zero if it recognized an
915 ppc_parse_name (const char *name, expressionS *exp)
924 val = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
929 exp->X_op = O_constant;
930 exp->X_add_number = val;
935 /* Local variables. */
937 /* Whether to target xcoff64/elf64. */
938 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
940 /* Opcode hash table. */
941 static struct hash_control *ppc_hash;
943 /* Macro hash table. */
944 static struct hash_control *ppc_macro_hash;
947 /* What type of shared library support to use. */
948 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
950 /* Flags to set in the elf header. */
951 static flagword ppc_flags = 0;
953 /* Whether this is Solaris or not. */
954 #ifdef TARGET_SOLARIS_COMMENT
955 #define SOLARIS_P TRUE
957 #define SOLARIS_P FALSE
960 static bfd_boolean msolaris = SOLARIS_P;
965 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
966 using a bunch of different sections. These assembler sections,
967 however, are all encompassed within the .text or .data sections of
968 the final output file. We handle this by using different
969 subsegments within these main segments. */
971 /* Next subsegment to allocate within the .text segment. */
972 static subsegT ppc_text_subsegment = 2;
974 /* Linked list of csects in the text section. */
975 static symbolS *ppc_text_csects;
977 /* Next subsegment to allocate within the .data segment. */
978 static subsegT ppc_data_subsegment = 2;
980 /* Linked list of csects in the data section. */
981 static symbolS *ppc_data_csects;
983 /* The current csect. */
984 static symbolS *ppc_current_csect;
986 /* The RS/6000 assembler uses a TOC which holds addresses of functions
987 and variables. Symbols are put in the TOC with the .tc pseudo-op.
988 A special relocation is used when accessing TOC entries. We handle
989 the TOC as a subsegment within the .data segment. We set it up if
990 we see a .toc pseudo-op, and save the csect symbol here. */
991 static symbolS *ppc_toc_csect;
993 /* The first frag in the TOC subsegment. */
994 static fragS *ppc_toc_frag;
996 /* The first frag in the first subsegment after the TOC in the .data
997 segment. NULL if there are no subsegments after the TOC. */
998 static fragS *ppc_after_toc_frag;
1000 /* The current static block. */
1001 static symbolS *ppc_current_block;
1003 /* The COFF debugging section; set by md_begin. This is not the
1004 .debug section, but is instead the secret BFD section which will
1005 cause BFD to set the section number of a symbol to N_DEBUG. */
1006 static asection *ppc_coff_debug_section;
1008 /* Structure to set the length field of the dwarf sections. */
1009 struct dw_subsection {
1010 /* Subsections are simply linked. */
1011 struct dw_subsection *link;
1013 /* The subsection number. */
1016 /* Expression to compute the length of the section. */
1017 expressionS end_exp;
1020 static struct dw_section {
1021 /* Corresponding section. */
1024 /* Simply linked list of subsections with a label. */
1025 struct dw_subsection *list_subseg;
1027 /* The anonymous subsection. */
1028 struct dw_subsection *anon_subseg;
1029 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1030 #endif /* OBJ_XCOFF */
1034 /* Various sections that we need for PE coff support. */
1035 static segT ydata_section;
1036 static segT pdata_section;
1037 static segT reldata_section;
1038 static segT rdata_section;
1039 static segT tocdata_section;
1041 /* The current section and the previous section. See ppc_previous. */
1042 static segT ppc_previous_section;
1043 static segT ppc_current_section;
1048 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1049 #define PPC_APUINFO_ISEL 0x40
1050 #define PPC_APUINFO_PMR 0x41
1051 #define PPC_APUINFO_RFMCI 0x42
1052 #define PPC_APUINFO_CACHELCK 0x43
1053 #define PPC_APUINFO_SPE 0x100
1054 #define PPC_APUINFO_EFS 0x101
1055 #define PPC_APUINFO_BRLOCK 0x102
1056 #define PPC_APUINFO_VLE 0x104
1059 * We keep a list of APUinfo
1061 unsigned long *ppc_apuinfo_list;
1062 unsigned int ppc_apuinfo_num;
1063 unsigned int ppc_apuinfo_num_alloc;
1064 #endif /* OBJ_ELF */
1067 const char *const md_shortopts = "b:l:usm:K:VQ:";
1069 const char *const md_shortopts = "um:";
1071 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1072 const struct option md_longopts[] = {
1073 {"nops", required_argument, NULL, OPTION_NOPS},
1074 {"ppc476-workaround", no_argument, &warn_476, 1},
1075 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1076 {NULL, no_argument, NULL, 0}
1078 const size_t md_longopts_size = sizeof (md_longopts);
1081 md_parse_option (int c, const char *arg)
1088 /* -u means that any undefined symbols should be treated as
1089 external, which is the default for gas anyhow. */
1094 /* Solaris as takes -le (presumably for little endian). For completeness
1095 sake, recognize -be also. */
1096 if (strcmp (arg, "e") == 0)
1098 target_big_endian = 0;
1099 set_target_endian = 1;
1100 if (ppc_cpu & PPC_OPCODE_VLE)
1101 as_bad (_("the use of -mvle requires big endian."));
1109 if (strcmp (arg, "e") == 0)
1111 target_big_endian = 1;
1112 set_target_endian = 1;
1120 /* Recognize -K PIC. */
1121 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1124 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1132 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1134 if (strcmp (arg, "64") == 0)
1138 if (ppc_cpu & PPC_OPCODE_VLE)
1139 as_bad (_("the use of -mvle requires -a32."));
1141 as_fatal (_("%s unsupported"), "-a64");
1144 else if (strcmp (arg, "32") == 0)
1151 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1155 if (strcmp (arg, "vle") == 0)
1157 if (set_target_endian && target_big_endian == 0)
1158 as_bad (_("the use of -mvle requires big endian."));
1160 as_bad (_("the use of -mvle requires -a32."));
1164 else if (strcmp (arg, "regnames") == 0)
1167 else if (strcmp (arg, "no-regnames") == 0)
1168 reg_names_p = FALSE;
1171 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1172 that require relocation. */
1173 else if (strcmp (arg, "relocatable") == 0)
1175 shlib = SHLIB_MRELOCATABLE;
1176 ppc_flags |= EF_PPC_RELOCATABLE;
1179 else if (strcmp (arg, "relocatable-lib") == 0)
1181 shlib = SHLIB_MRELOCATABLE;
1182 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1185 /* -memb, set embedded bit. */
1186 else if (strcmp (arg, "emb") == 0)
1187 ppc_flags |= EF_PPC_EMB;
1189 /* -mlittle/-mbig set the endianness. */
1190 else if (strcmp (arg, "little") == 0
1191 || strcmp (arg, "little-endian") == 0)
1193 target_big_endian = 0;
1194 set_target_endian = 1;
1195 if (ppc_cpu & PPC_OPCODE_VLE)
1196 as_bad (_("the use of -mvle requires big endian."));
1199 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1201 target_big_endian = 1;
1202 set_target_endian = 1;
1205 else if (strcmp (arg, "solaris") == 0)
1208 ppc_comment_chars = ppc_solaris_comment_chars;
1211 else if (strcmp (arg, "no-solaris") == 0)
1214 ppc_comment_chars = ppc_eabi_comment_chars;
1219 as_bad (_("invalid switch -m%s"), arg);
1225 /* -V: SVR4 argument to print version ID. */
1227 print_version_id ();
1230 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1231 should be emitted or not. FIXME: Not implemented. */
1235 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1236 rather than .stabs.excl, which is ignored by the linker.
1237 FIXME: Not implemented. */
1248 nop_limit = strtoul (optarg, &end, 0);
1250 as_bad (_("--nops needs a numeric argument"));
1265 md_show_usage (FILE *stream)
1267 fprintf (stream, _("\
1269 -a32 generate ELF32/XCOFF32\n\
1270 -a64 generate ELF64/XCOFF64\n\
1272 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1273 -mpwr generate code for POWER (RIOS1)\n\
1274 -m601 generate code for PowerPC 601\n\
1275 -mppc, -mppc32, -m603, -m604\n\
1276 generate code for PowerPC 603/604\n\
1277 -m403 generate code for PowerPC 403\n\
1278 -m405 generate code for PowerPC 405\n\
1279 -m440 generate code for PowerPC 440\n\
1280 -m464 generate code for PowerPC 464\n\
1281 -m476 generate code for PowerPC 476\n\
1282 -m7400, -m7410, -m7450, -m7455\n\
1283 generate code for PowerPC 7400/7410/7450/7455\n\
1284 -m750cl generate code for PowerPC 750cl\n\
1285 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1286 fprintf (stream, _("\
1287 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1288 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1289 -mbooke generate code for 32-bit PowerPC BookE\n\
1290 -ma2 generate code for A2 architecture\n\
1291 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1292 -mpower5, -mpwr5, -mpwr5x\n\
1293 generate code for Power5 architecture\n\
1294 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1295 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1296 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1297 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1298 -mcell generate code for Cell Broadband Engine architecture\n\
1299 -mcom generate code Power/PowerPC common instructions\n\
1300 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1301 fprintf (stream, _("\
1302 -maltivec generate code for AltiVec\n\
1303 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1304 -mhtm generate code for Hardware Transactional Memory\n\
1305 -me300 generate code for PowerPC e300 family\n\
1306 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1307 -me500mc, generate code for Freescale e500mc core complex\n\
1308 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1309 -me5500, generate code for Freescale e5500 core complex\n\
1310 -me6500, generate code for Freescale e6500 core complex\n\
1311 -mspe generate code for Motorola SPE instructions\n\
1312 -mvle generate code for Freescale VLE instructions\n\
1313 -mtitan generate code for AppliedMicro Titan core complex\n\
1314 -mregnames Allow symbolic names for registers\n\
1315 -mno-regnames Do not allow symbolic names for registers\n"));
1317 fprintf (stream, _("\
1318 -mrelocatable support for GCC's -mrelocatble option\n\
1319 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1320 -memb set PPC_EMB bit in ELF flags\n\
1321 -mlittle, -mlittle-endian, -le\n\
1322 generate code for a little endian machine\n\
1323 -mbig, -mbig-endian, -be\n\
1324 generate code for a big endian machine\n\
1325 -msolaris generate code for Solaris\n\
1326 -mno-solaris do not generate code for Solaris\n\
1327 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1328 -V print assembler version number\n\
1329 -Qy, -Qn ignored\n"));
1331 fprintf (stream, _("\
1332 -nops=count when aligning, more than COUNT nops uses a branch\n\
1333 -ppc476-workaround warn if emitting data to code sections\n"));
1336 /* Set ppc_cpu if it is not already set. */
1341 const char *default_os = TARGET_OS;
1342 const char *default_cpu = TARGET_CPU;
1344 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1347 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1348 else if (strncmp (default_os, "aix", 3) == 0
1349 && default_os[3] >= '4' && default_os[3] <= '9')
1350 ppc_cpu |= PPC_OPCODE_COMMON;
1351 else if (strncmp (default_os, "aix3", 4) == 0)
1352 ppc_cpu |= PPC_OPCODE_POWER;
1353 else if (strcmp (default_cpu, "rs6000") == 0)
1354 ppc_cpu |= PPC_OPCODE_POWER;
1355 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1356 ppc_cpu |= PPC_OPCODE_PPC;
1358 as_fatal (_("unknown default cpu = %s, os = %s"),
1359 default_cpu, default_os);
1363 /* Figure out the BFD architecture to use. This function and ppc_mach
1364 are called well before md_begin, when the output file is opened. */
1366 enum bfd_architecture
1369 const char *default_cpu = TARGET_CPU;
1372 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1373 return bfd_arch_powerpc;
1374 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1375 return bfd_arch_powerpc;
1376 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1377 return bfd_arch_rs6000;
1378 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1380 if (strcmp (default_cpu, "rs6000") == 0)
1381 return bfd_arch_rs6000;
1382 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1383 return bfd_arch_powerpc;
1386 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1387 return bfd_arch_unknown;
1394 return bfd_mach_ppc64;
1395 else if (ppc_arch () == bfd_arch_rs6000)
1396 return bfd_mach_rs6k;
1397 else if (ppc_cpu & PPC_OPCODE_TITAN)
1398 return bfd_mach_ppc_titan;
1399 else if (ppc_cpu & PPC_OPCODE_VLE)
1400 return bfd_mach_ppc_vle;
1402 return bfd_mach_ppc;
1406 ppc_target_format (void)
1410 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1412 return "xcoff-powermac";
1415 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1417 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1423 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1424 # elif defined (TE_VXWORKS)
1425 return "elf32-powerpc-vxworks";
1427 return (target_big_endian
1428 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1429 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1434 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1435 Return TRUE if there's a problem, otherwise FALSE. */
1438 insn_validate (const struct powerpc_opcode *op)
1440 const unsigned char *o;
1441 unsigned long omask = op->mask;
1443 /* The mask had better not trim off opcode bits. */
1444 if ((op->opcode & omask) != op->opcode)
1446 as_bad (_("mask trims opcode bits for %s"), op->name);
1450 /* The operands must not overlap the opcode or each other. */
1451 for (o = op->operands; *o; ++o)
1453 if (*o >= num_powerpc_operands)
1455 as_bad (_("operand index error for %s"), op->name);
1460 const struct powerpc_operand *operand = &powerpc_operands[*o];
1461 if (operand->shift != (int) PPC_OPSHIFT_INV)
1465 if (operand->shift >= 0)
1466 mask = operand->bitm << operand->shift;
1468 mask = operand->bitm >> -operand->shift;
1471 as_bad (_("operand %d overlap in %s"),
1472 (int) (o - op->operands), op->name);
1482 /* Insert opcodes and macros into hash tables. Called at startup and
1483 for .machine pseudo. */
1486 ppc_setup_opcodes (void)
1488 const struct powerpc_opcode *op;
1489 const struct powerpc_opcode *op_end;
1490 const struct powerpc_macro *macro;
1491 const struct powerpc_macro *macro_end;
1492 bfd_boolean bad_insn = FALSE;
1494 if (ppc_hash != NULL)
1495 hash_die (ppc_hash);
1496 if (ppc_macro_hash != NULL)
1497 hash_die (ppc_macro_hash);
1499 /* Insert the opcodes into a hash table. */
1500 ppc_hash = hash_new ();
1502 if (ENABLE_CHECKING)
1506 /* An index into powerpc_operands is stored in struct fix
1507 fx_pcrel_adjust which is 8 bits wide. */
1508 gas_assert (num_powerpc_operands < 256);
1510 /* Check operand masks. Code here and in the disassembler assumes
1511 all the 1's in the mask are contiguous. */
1512 for (i = 0; i < num_powerpc_operands; ++i)
1514 unsigned long mask = powerpc_operands[i].bitm;
1515 unsigned long right_bit;
1518 right_bit = mask & -mask;
1520 right_bit = mask & -mask;
1521 if (mask != right_bit)
1523 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1526 for (j = i + 1; j < num_powerpc_operands; ++j)
1527 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1528 sizeof (powerpc_operands[0])) == 0)
1530 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1537 op_end = powerpc_opcodes + powerpc_num_opcodes;
1538 for (op = powerpc_opcodes; op < op_end; op++)
1540 if (ENABLE_CHECKING)
1542 if (op != powerpc_opcodes)
1544 int old_opcode = PPC_OP (op[-1].opcode);
1545 int new_opcode = PPC_OP (op[0].opcode);
1547 #ifdef PRINT_OPCODE_TABLE
1548 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1549 op->name, (unsigned int) (op - powerpc_opcodes),
1550 (unsigned int) new_opcode, (unsigned int) op->opcode,
1551 (unsigned int) op->mask, (unsigned long long) op->flags);
1554 /* The major opcodes had better be sorted. Code in the
1555 disassembler assumes the insns are sorted according to
1557 if (new_opcode < old_opcode)
1559 as_bad (_("major opcode is not sorted for %s"),
1564 bad_insn |= insn_validate (op);
1567 if ((ppc_cpu & op->flags) != 0
1568 && !(ppc_cpu & op->deprecated))
1572 retval = hash_insert (ppc_hash, op->name, (void *) op);
1575 as_bad (_("duplicate instruction %s"),
1582 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1583 for (op = powerpc_opcodes; op < op_end; op++)
1584 hash_insert (ppc_hash, op->name, (void *) op);
1586 op_end = vle_opcodes + vle_num_opcodes;
1587 for (op = vle_opcodes; op < op_end; op++)
1589 if (ENABLE_CHECKING)
1591 if (op != vle_opcodes)
1593 unsigned old_seg, new_seg;
1595 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1596 old_seg = VLE_OP_TO_SEG (old_seg);
1597 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1598 new_seg = VLE_OP_TO_SEG (new_seg);
1600 #ifdef PRINT_OPCODE_TABLE
1601 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1602 op->name, (unsigned int) (op - powerpc_opcodes),
1603 (unsigned int) new_seg, (unsigned int) op->opcode,
1604 (unsigned int) op->mask, (unsigned long long) op->flags);
1606 /* The major opcodes had better be sorted. Code in the
1607 disassembler assumes the insns are sorted according to
1609 if (new_seg < old_seg)
1611 as_bad (_("major opcode is not sorted for %s"),
1617 bad_insn |= insn_validate (op);
1620 if ((ppc_cpu & op->flags) != 0
1621 && !(ppc_cpu & op->deprecated))
1625 retval = hash_insert (ppc_hash, op->name, (void *) op);
1628 as_bad (_("duplicate instruction %s"),
1635 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1636 for (op = vle_opcodes; op < op_end; op++)
1637 hash_insert (ppc_hash, op->name, (void *) op);
1639 /* Insert the macros into a hash table. */
1640 ppc_macro_hash = hash_new ();
1642 macro_end = powerpc_macros + powerpc_num_macros;
1643 for (macro = powerpc_macros; macro < macro_end; macro++)
1645 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1649 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1650 if (retval != (const char *) NULL)
1652 as_bad (_("duplicate macro %s"), macro->name);
1662 /* This function is called when the assembler starts up. It is called
1663 after the options have been parsed and the output file has been
1671 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1672 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1675 /* Set the ELF flags if desired. */
1676 if (ppc_flags && !msolaris)
1677 bfd_set_private_flags (stdoutput, ppc_flags);
1680 ppc_setup_opcodes ();
1682 /* Tell the main code what the endianness is if it is not overridden
1684 if (!set_target_endian)
1686 set_target_endian = 1;
1687 target_big_endian = PPC_BIG_ENDIAN;
1691 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1693 /* Create dummy symbols to serve as initial csects. This forces the
1694 text csects to precede the data csects. These symbols will not
1696 ppc_text_csects = symbol_make ("dummy\001");
1697 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1698 ppc_data_csects = symbol_make ("dummy\001");
1699 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1704 ppc_current_section = text_section;
1705 ppc_previous_section = 0;
1714 if (ppc_apuinfo_list == NULL)
1717 /* Ok, so write the section info out. We have this layout:
1721 0 8 length of "APUinfo\0"
1722 4 (n*4) number of APU's (4 bytes each)
1725 20 APU#1 first APU's info
1726 24 APU#2 second APU's info
1731 asection *seg = now_seg;
1732 subsegT subseg = now_subseg;
1733 asection *apuinfo_secp = (asection *) NULL;
1736 /* Create the .PPC.EMB.apuinfo section. */
1737 apuinfo_secp = subseg_new (".PPC.EMB.apuinfo", 0);
1738 bfd_set_section_flags (stdoutput,
1740 SEC_HAS_CONTENTS | SEC_READONLY);
1743 md_number_to_chars (p, (valueT) 8, 4);
1746 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1749 md_number_to_chars (p, (valueT) 2, 4);
1752 strcpy (p, "APUinfo");
1754 for (i = 0; i < ppc_apuinfo_num; i++)
1757 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1760 frag_align (2, 0, 0);
1762 /* We probably can't restore the current segment, for there likely
1765 subseg_set (seg, subseg);
1770 /* Insert an operand value into an instruction. */
1772 static unsigned long
1773 ppc_insert_operand (unsigned long insn,
1774 const struct powerpc_operand *operand,
1780 long min, max, right;
1782 max = operand->bitm;
1786 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1788 /* Extend the allowed range for addis to [-65536, 65535].
1789 Similarly for some VLE high part insns. For 64-bit it
1790 would be good to disable this for signed fields since the
1791 value is sign extended into the high 32 bits of the register.
1792 If the value is, say, an address, then we might care about
1793 the high bits. However, gcc as of 2014-06 uses unsigned
1794 values when loading the high part of 64-bit constants using
1796 Use the same extended range for cmpli, to allow at least
1798 min = ~max & -right;
1800 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1802 max = (max >> 1) & -right;
1803 min = ~max & -right;
1806 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1809 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1818 /* Some people write constants with the sign extension done by
1819 hand but only up to 32 bits. This shouldn't really be valid,
1820 but, to permit this code to assemble on a 64-bit host, we
1821 sign extend the 32-bit value to 64 bits if so doing makes the
1824 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1825 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1826 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1827 val = val - 0x80000000 - 0x80000000;
1829 /* Similarly, people write expressions like ~(1<<15), and expect
1830 this to be OK for a 32-bit unsigned value. */
1832 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1833 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1834 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1835 val = val + 0x80000000 + 0x80000000;
1839 || (val & (right - 1)) != 0)
1840 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1843 if (operand->insert)
1848 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1849 if (errmsg != (const char *) NULL)
1850 as_bad_where (file, line, "%s", errmsg);
1852 else if (operand->shift >= 0)
1853 insn |= ((long) val & operand->bitm) << operand->shift;
1855 insn |= ((long) val & operand->bitm) >> -operand->shift;
1862 /* Parse @got, etc. and return the desired relocation. */
1863 static bfd_reloc_code_real_type
1864 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1868 unsigned int length : 8;
1869 unsigned int valid32 : 1;
1870 unsigned int valid64 : 1;
1879 const struct map_bfd *ptr;
1881 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1882 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1883 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1885 static const struct map_bfd mapping[] = {
1886 MAP ("l", BFD_RELOC_LO16),
1887 MAP ("h", BFD_RELOC_HI16),
1888 MAP ("ha", BFD_RELOC_HI16_S),
1889 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1890 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1891 MAP ("got", BFD_RELOC_16_GOTOFF),
1892 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1893 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1894 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1895 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1896 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
1897 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
1898 MAP ("copy", BFD_RELOC_PPC_COPY),
1899 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
1900 MAP ("sectoff", BFD_RELOC_16_BASEREL),
1901 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
1902 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
1903 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
1904 MAP ("tls", BFD_RELOC_PPC_TLS),
1905 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
1906 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
1907 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
1908 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
1909 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
1910 MAP ("tprel", BFD_RELOC_PPC_TPREL),
1911 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
1912 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
1913 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
1914 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
1915 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
1916 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
1917 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
1918 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
1919 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
1920 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
1921 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
1922 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
1923 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
1924 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
1925 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
1926 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
1927 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
1928 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
1929 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
1930 MAP32 ("fixup", BFD_RELOC_CTOR),
1931 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
1932 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
1933 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
1934 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
1935 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
1936 MAP32 ("sdarel", BFD_RELOC_GPREL16),
1937 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
1938 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
1939 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
1940 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
1941 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
1942 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
1943 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
1944 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
1945 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
1946 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
1947 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
1948 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
1949 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
1950 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
1951 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
1952 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
1953 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
1954 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
1955 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
1956 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
1957 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
1958 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
1959 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
1960 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
1961 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
1962 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
1963 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
1964 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
1965 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
1966 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
1967 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
1968 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
1969 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
1970 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
1971 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
1972 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
1973 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
1974 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
1975 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
1976 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
1977 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
1978 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
1979 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
1980 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
1981 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
1982 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
1986 return BFD_RELOC_NONE;
1988 for (ch = *str, str2 = ident;
1989 (str2 < ident + sizeof (ident) - 1
1990 && (ISALNUM (ch) || ch == '@'));
1993 *str2++ = TOLOWER (ch);
2000 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2001 if (ch == ptr->string[0]
2002 && len == ptr->length
2003 && memcmp (ident, ptr->string, ptr->length) == 0
2004 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2006 int reloc = ptr->reloc;
2008 if (!ppc_obj64 && exp_p->X_add_number != 0)
2012 case BFD_RELOC_16_GOTOFF:
2013 case BFD_RELOC_LO16_GOTOFF:
2014 case BFD_RELOC_HI16_GOTOFF:
2015 case BFD_RELOC_HI16_S_GOTOFF:
2016 as_warn (_("identifier+constant@got means "
2017 "identifier@got+constant"));
2020 case BFD_RELOC_PPC_GOT_TLSGD16:
2021 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2022 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2023 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2024 case BFD_RELOC_PPC_GOT_TLSLD16:
2025 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2026 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2027 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2028 case BFD_RELOC_PPC_GOT_DTPREL16:
2029 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2030 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2031 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2032 case BFD_RELOC_PPC_GOT_TPREL16:
2033 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2034 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2035 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2036 as_bad (_("symbol+offset not supported for got tls"));
2041 /* Now check for identifier@suffix+constant. */
2042 if (*str == '-' || *str == '+')
2044 char *orig_line = input_line_pointer;
2045 expressionS new_exp;
2047 input_line_pointer = str;
2048 expression (&new_exp);
2049 if (new_exp.X_op == O_constant)
2051 exp_p->X_add_number += new_exp.X_add_number;
2052 str = input_line_pointer;
2055 if (&input_line_pointer != str_p)
2056 input_line_pointer = orig_line;
2060 if (reloc == (int) BFD_RELOC_PPC64_TOC
2061 && exp_p->X_op == O_symbol
2062 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2064 /* Change the symbol so that the dummy .TOC. symbol can be
2065 omitted from the object file. */
2066 exp_p->X_add_symbol = &abs_symbol;
2069 return (bfd_reloc_code_real_type) reloc;
2072 return BFD_RELOC_NONE;
2075 /* Support @got, etc. on constants emitted via .short, .int etc. */
2077 bfd_reloc_code_real_type
2078 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2081 if (nbytes >= 2 && *input_line_pointer == '@')
2082 return ppc_elf_suffix (&input_line_pointer, exp);
2083 return BFD_RELOC_NONE;
2086 /* Warn when emitting data to code sections, unless we are emitting
2087 a relocation that ld --ppc476-workaround uses to recognise data
2088 *and* there was an unconditional branch prior to the data. */
2091 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2092 unsigned int nbytes, fixS *fix)
2095 && (now_seg->flags & SEC_CODE) != 0
2098 || !(fix->fx_r_type == BFD_RELOC_32
2099 || fix->fx_r_type == BFD_RELOC_CTOR
2100 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2101 || !(last_seg == now_seg && last_subseg == now_subseg)
2102 || !((last_insn & (0x3f << 26)) == (18u << 26)
2103 || ((last_insn & (0x3f << 26)) == (16u << 26)
2104 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2105 || ((last_insn & (0x3f << 26)) == (19u << 26)
2106 && (last_insn & (0x3ff << 1)) == (16u << 1)
2107 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2109 /* Flag that we've warned. */
2113 as_warn (_("data in executable section"));
2117 /* Solaris pseduo op to change to the .rodata section. */
2119 ppc_elf_rdata (int xxx)
2121 char *save_line = input_line_pointer;
2122 static char section[] = ".rodata\n";
2124 /* Just pretend this is .section .rodata */
2125 input_line_pointer = section;
2126 obj_elf_section (xxx);
2128 input_line_pointer = save_line;
2131 /* Pseudo op to make file scope bss items. */
2133 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2146 c = get_symbol_name (&name);
2148 /* Just after name is now '\0'. */
2149 p = input_line_pointer;
2151 SKIP_WHITESPACE_AFTER_NAME ();
2152 if (*input_line_pointer != ',')
2154 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2155 ignore_rest_of_line ();
2159 input_line_pointer++; /* skip ',' */
2160 if ((size = get_absolute_expression ()) < 0)
2162 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2163 ignore_rest_of_line ();
2167 /* The third argument to .lcomm is the alignment. */
2168 if (*input_line_pointer != ',')
2172 ++input_line_pointer;
2173 align = get_absolute_expression ();
2176 as_warn (_("ignoring bad alignment"));
2182 symbolP = symbol_find_or_make (name);
2185 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2187 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2188 S_GET_NAME (symbolP));
2189 ignore_rest_of_line ();
2193 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2195 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2196 S_GET_NAME (symbolP),
2197 (long) S_GET_VALUE (symbolP),
2200 ignore_rest_of_line ();
2206 old_subsec = now_subseg;
2209 /* Convert to a power of 2 alignment. */
2210 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2213 as_bad (_("common alignment not a power of 2"));
2214 ignore_rest_of_line ();
2221 record_alignment (bss_section, align2);
2222 subseg_set (bss_section, 1);
2224 frag_align (align2, 0, 0);
2225 if (S_GET_SEGMENT (symbolP) == bss_section)
2226 symbol_get_frag (symbolP)->fr_symbol = 0;
2227 symbol_set_frag (symbolP, frag_now);
2228 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2231 S_SET_SIZE (symbolP, size);
2232 S_SET_SEGMENT (symbolP, bss_section);
2233 subseg_set (old_sec, old_subsec);
2234 demand_empty_rest_of_line ();
2237 /* Pseudo op to set symbol local entry point. */
2239 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2242 char c = get_symbol_name (&name);
2247 elf_symbol_type *elfsym;
2249 p = input_line_pointer;
2251 SKIP_WHITESPACE_AFTER_NAME ();
2252 if (*input_line_pointer != ',')
2255 as_bad (_("expected comma after name `%s' in .localentry directive"),
2258 ignore_rest_of_line ();
2261 input_line_pointer++;
2263 if (exp.X_op == O_absent)
2265 as_bad (_("missing expression in .localentry directive"));
2266 exp.X_op = O_constant;
2267 exp.X_add_number = 0;
2270 sym = symbol_find_or_make (name);
2273 if (resolve_expression (&exp)
2274 && exp.X_op == O_constant)
2276 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2278 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2279 as_bad (_(".localentry expression for `%s' "
2280 "is not a valid power of 2"), S_GET_NAME (sym));
2283 bfdsym = symbol_get_bfdsym (sym);
2284 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2285 gas_assert (elfsym);
2286 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2287 elfsym->internal_elf_sym.st_other |= encoded;
2288 if (ppc_abiversion == 0)
2293 as_bad (_(".localentry expression for `%s' "
2294 "does not evaluate to a constant"), S_GET_NAME (sym));
2296 demand_empty_rest_of_line ();
2299 /* Pseudo op to set ABI version. */
2301 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2306 if (exp.X_op == O_absent)
2308 as_bad (_("missing expression in .abiversion directive"));
2309 exp.X_op = O_constant;
2310 exp.X_add_number = 0;
2313 if (resolve_expression (&exp)
2314 && exp.X_op == O_constant)
2315 ppc_abiversion = exp.X_add_number;
2317 as_bad (_(".abiversion expression does not evaluate to a constant"));
2318 demand_empty_rest_of_line ();
2321 /* Set ABI version in output file. */
2325 if (ppc_obj64 && ppc_abiversion != 0)
2327 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2328 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2332 /* Validate any relocations emitted for -mrelocatable, possibly adding
2333 fixups for word relocations in writable segments, so we can adjust
2336 ppc_elf_validate_fix (fixS *fixp, segT seg)
2338 if (fixp->fx_done || fixp->fx_pcrel)
2347 case SHLIB_MRELOCATABLE:
2348 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2349 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2350 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2351 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2352 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2353 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2354 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2355 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2356 && (seg->flags & SEC_LOAD) != 0
2357 && strcmp (segment_name (seg), ".got2") != 0
2358 && strcmp (segment_name (seg), ".dtors") != 0
2359 && strcmp (segment_name (seg), ".ctors") != 0
2360 && strcmp (segment_name (seg), ".fixup") != 0
2361 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2362 && strcmp (segment_name (seg), ".eh_frame") != 0
2363 && strcmp (segment_name (seg), ".ex_shared") != 0)
2365 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2366 || fixp->fx_r_type != BFD_RELOC_CTOR)
2368 as_bad_where (fixp->fx_file, fixp->fx_line,
2369 _("relocation cannot be done when using -mrelocatable"));
2376 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2377 function descriptor sym if the corresponding code sym is used. */
2380 ppc_frob_file_before_adjust (void)
2388 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2394 name = S_GET_NAME (symp);
2398 if (! S_IS_WEAK (symp)
2399 || S_IS_DEFINED (symp))
2402 dotname = concat (".", name, (char *) NULL);
2403 dotsym = symbol_find_noref (dotname, 1);
2405 if (dotsym != NULL && (symbol_used_p (dotsym)
2406 || symbol_used_in_reloc_p (dotsym)))
2407 symbol_mark_used (symp);
2411 toc = bfd_get_section_by_name (stdoutput, ".toc");
2413 && toc_reloc_types != has_large_toc_reloc
2414 && bfd_section_size (stdoutput, toc) > 0x10000)
2415 as_warn (_("TOC section size exceeds 64k"));
2418 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2419 emitted. Other uses of .TOC. will cause the symbol to be marked
2420 with BSF_KEEP in md_apply_fix. */
2423 ppc_elf_adjust_symtab (void)
2428 symp = symbol_find (".TOC.");
2431 asymbol *bsym = symbol_get_bfdsym (symp);
2432 if ((bsym->flags & BSF_KEEP) == 0)
2433 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2437 #endif /* OBJ_ELF */
2442 * Summary of parse_toc_entry.
2444 * in: Input_line_pointer points to the '[' in one of:
2446 * [toc] [tocv] [toc32] [toc64]
2448 * Anything else is an error of one kind or another.
2451 * return value: success or failure
2452 * toc_kind: kind of toc reference
2453 * input_line_pointer:
2454 * success: first char after the ']'
2455 * failure: unchanged
2459 * [toc] - rv == success, toc_kind = default_toc
2460 * [tocv] - rv == success, toc_kind = data_in_toc
2461 * [toc32] - rv == success, toc_kind = must_be_32
2462 * [toc64] - rv == success, toc_kind = must_be_64
2466 enum toc_size_qualifier
2468 default_toc, /* The toc cell constructed should be the system default size */
2469 data_in_toc, /* This is a direct reference to a toc cell */
2470 must_be_32, /* The toc cell constructed must be 32 bits wide */
2471 must_be_64 /* The toc cell constructed must be 64 bits wide */
2475 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2480 enum toc_size_qualifier t;
2482 /* Save the input_line_pointer. */
2483 start = input_line_pointer;
2485 /* Skip over the '[' , and whitespace. */
2486 ++input_line_pointer;
2489 /* Find the spelling of the operand. */
2490 c = get_symbol_name (&toc_spec);
2492 if (strcmp (toc_spec, "toc") == 0)
2496 else if (strcmp (toc_spec, "tocv") == 0)
2500 else if (strcmp (toc_spec, "toc32") == 0)
2504 else if (strcmp (toc_spec, "toc64") == 0)
2510 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2511 *input_line_pointer = c;
2512 input_line_pointer = start;
2516 /* Now find the ']'. */
2517 *input_line_pointer = c;
2519 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2520 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2524 as_bad (_("syntax error: expected `]', found `%c'"), c);
2525 input_line_pointer = start;
2534 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2535 /* See whether a symbol is in the TOC section. */
2538 ppc_is_toc_sym (symbolS *sym)
2541 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2542 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2545 const char *sname = segment_name (S_GET_SEGMENT (sym));
2547 return strcmp (sname, ".toc") == 0;
2549 return strcmp (sname, ".got") == 0;
2552 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2556 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2558 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2562 /* Check we don't already exist. */
2563 for (i = 0; i < ppc_apuinfo_num; i++)
2564 if (ppc_apuinfo_list[i] == APUID (apu, version))
2567 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2569 if (ppc_apuinfo_num_alloc == 0)
2571 ppc_apuinfo_num_alloc = 4;
2572 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2576 ppc_apuinfo_num_alloc += 4;
2577 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2578 ppc_apuinfo_num_alloc);
2581 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2587 /* We need to keep a list of fixups. We can't simply generate them as
2588 we go, because that would require us to first create the frag, and
2589 that would screw up references to ``.''. */
2595 bfd_reloc_code_real_type reloc;
2598 #define MAX_INSN_FIXUPS (5)
2601 #define E_OR2I_INSN 0x7000C000
2602 #define E_AND2I_DOT_INSN 0x7000C800
2603 #define E_OR2IS_INSN 0x7000D000
2604 #define E_LIS_INSN 0x7000E000
2605 #define E_AND2IS_DOT_INSN 0x7000E800
2608 #define E_ADD2I_DOT_INSN 0x70008800
2609 #define E_ADD2IS_INSN 0x70009000
2610 #define E_CMP16I_INSN 0x70009800
2611 #define E_MULL2I_INSN 0x7000A000
2612 #define E_CMPL16I_INSN 0x7000A800
2613 #define E_CMPH16I_INSN 0x7000B000
2614 #define E_CMPHL16I_INSN 0x7000B800
2616 /* This routine is called for each instruction to be assembled. */
2619 md_assemble (char *str)
2622 const struct powerpc_opcode *opcode;
2624 const unsigned char *opindex_ptr;
2628 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2633 unsigned int insn_length;
2635 /* Get the opcode. */
2636 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2641 /* Look up the opcode in the hash table. */
2642 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2643 if (opcode == (const struct powerpc_opcode *) NULL)
2645 const struct powerpc_macro *macro;
2647 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2648 if (macro == (const struct powerpc_macro *) NULL)
2649 as_bad (_("unrecognized opcode: `%s'"), str);
2651 ppc_macro (s, macro);
2656 insn = opcode->opcode;
2659 while (ISSPACE (*str))
2662 /* PowerPC operands are just expressions. The only real issue is
2663 that a few operand types are optional. All cases which might use
2664 an optional operand separate the operands only with commas (in some
2665 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2666 have optional operands). Most instructions with optional operands
2667 have only one. Those that have more than one optional operand can
2668 take either all their operands or none. So, before we start seriously
2669 parsing the operands, we check to see if we have optional operands,
2670 and if we do, we count the number of commas to see which operands
2671 have been omitted. */
2673 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2675 const struct powerpc_operand *operand;
2677 operand = &powerpc_operands[*opindex_ptr];
2678 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
2680 unsigned int opcount;
2681 unsigned int num_operands_expected;
2683 /* There is an optional operand. Count the number of
2684 commas in the input line. */
2691 while ((s = strchr (s, ',')) != (char *) NULL)
2698 /* Compute the number of expected operands.
2699 Do not count fake operands. */
2700 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2701 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2702 ++ num_operands_expected;
2704 /* If there are fewer operands in the line then are called
2705 for by the instruction, we want to skip the optional
2707 if (opcount < num_operands_expected)
2714 /* Gather the operands. */
2718 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2720 const struct powerpc_operand *operand;
2726 if (next_opindex == 0)
2727 operand = &powerpc_operands[*opindex_ptr];
2730 operand = &powerpc_operands[next_opindex];
2735 /* If this is a fake operand, then we do not expect anything
2737 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2739 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2740 if (errmsg != (const char *) NULL)
2741 as_bad ("%s", errmsg);
2745 /* If this is an optional operand, and we are skipping it, just
2747 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2750 long val = ppc_optional_operand_value (operand);
2751 if (operand->insert)
2753 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2754 if (errmsg != (const char *) NULL)
2755 as_bad ("%s", errmsg);
2757 else if (operand->shift >= 0)
2758 insn |= ((long) val & operand->bitm) << operand->shift;
2760 insn |= ((long) val & operand->bitm) >> -operand->shift;
2762 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2763 next_opindex = *opindex_ptr + 1;
2767 /* Gather the operand. */
2768 hold = input_line_pointer;
2769 input_line_pointer = str;
2772 if (*input_line_pointer == '[')
2774 /* We are expecting something like the second argument here:
2776 * lwz r4,[toc].GS.0.static_int(rtoc)
2777 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2778 * The argument following the `]' must be a symbol name, and the
2779 * register must be the toc register: 'rtoc' or '2'
2781 * The effect is to 0 as the displacement field
2782 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2783 * the appropriate variation) reloc against it based on the symbol.
2784 * The linker will build the toc, and insert the resolved toc offset.
2787 * o The size of the toc entry is currently assumed to be
2788 * 32 bits. This should not be assumed to be a hard coded
2790 * o In an effort to cope with a change from 32 to 64 bits,
2791 * there are also toc entries that are specified to be
2792 * either 32 or 64 bits:
2793 * lwz r4,[toc32].GS.0.static_int(rtoc)
2794 * lwz r4,[toc64].GS.0.static_int(rtoc)
2795 * These demand toc entries of the specified size, and the
2796 * instruction probably requires it.
2800 enum toc_size_qualifier toc_kind;
2801 bfd_reloc_code_real_type toc_reloc;
2803 /* Go parse off the [tocXX] part. */
2804 valid_toc = parse_toc_entry (&toc_kind);
2808 ignore_rest_of_line ();
2812 /* Now get the symbol following the ']'. */
2818 /* In this case, we may not have seen the symbol yet,
2819 since it is allowed to appear on a .extern or .globl
2820 or just be a label in the .data section. */
2821 toc_reloc = BFD_RELOC_PPC_TOC16;
2824 /* 1. The symbol must be defined and either in the toc
2825 section, or a global.
2826 2. The reloc generated must have the TOCDEFN flag set
2827 in upper bit mess of the reloc type.
2828 FIXME: It's a little confusing what the tocv
2829 qualifier can be used for. At the very least, I've
2830 seen three uses, only one of which I'm sure I can
2832 if (ex.X_op == O_symbol)
2834 gas_assert (ex.X_add_symbol != NULL);
2835 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2838 as_bad (_("[tocv] symbol is not a toc symbol"));
2842 toc_reloc = BFD_RELOC_PPC_TOC16;
2845 /* FIXME: these next two specifically specify 32/64 bit
2846 toc entries. We don't support them today. Is this
2847 the right way to say that? */
2848 toc_reloc = BFD_RELOC_NONE;
2849 as_bad (_("unimplemented toc32 expression modifier"));
2852 /* FIXME: see above. */
2853 toc_reloc = BFD_RELOC_NONE;
2854 as_bad (_("unimplemented toc64 expression modifier"));
2858 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2864 /* We need to generate a fixup for this expression. */
2865 if (fc >= MAX_INSN_FIXUPS)
2866 as_fatal (_("too many fixups"));
2868 fixups[fc].reloc = toc_reloc;
2869 fixups[fc].exp = ex;
2870 fixups[fc].opindex = *opindex_ptr;
2873 /* Ok. We've set up the fixup for the instruction. Now make it
2874 look like the constant 0 was found here. */
2876 ex.X_op = O_constant;
2877 ex.X_add_number = 0;
2878 ex.X_add_symbol = NULL;
2879 ex.X_op_symbol = NULL;
2886 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2887 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2888 || !register_name (&ex))
2890 char save_lex = lex_type['%'];
2892 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
2893 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
2896 lex_type['%'] |= LEX_BEGIN_NAME;
2900 lex_type['%'] = save_lex;
2904 str = input_line_pointer;
2905 input_line_pointer = hold;
2907 if (ex.X_op == O_illegal)
2908 as_bad (_("illegal operand"));
2909 else if (ex.X_op == O_absent)
2910 as_bad (_("missing operand"));
2911 else if (ex.X_op == O_register)
2913 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
2914 ppc_cpu, (char *) NULL, 0);
2916 else if (ex.X_op == O_constant)
2919 /* Allow @HA, @L, @H on constants. */
2920 bfd_reloc_code_real_type reloc;
2921 char *orig_str = str;
2923 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
2930 case BFD_RELOC_LO16:
2931 ex.X_add_number &= 0xffff;
2932 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2933 ex.X_add_number = SEX16 (ex.X_add_number);
2936 case BFD_RELOC_HI16:
2937 if (REPORT_OVERFLOW_HI && ppc_obj64)
2939 /* PowerPC64 @h is tested for overflow. */
2940 ex.X_add_number = (addressT) ex.X_add_number >> 16;
2941 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2943 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2945 = ((addressT) ex.X_add_number ^ sign) - sign;
2951 case BFD_RELOC_PPC64_ADDR16_HIGH:
2952 ex.X_add_number = PPC_HI (ex.X_add_number);
2953 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2954 ex.X_add_number = SEX16 (ex.X_add_number);
2957 case BFD_RELOC_HI16_S:
2958 if (REPORT_OVERFLOW_HI && ppc_obj64)
2960 /* PowerPC64 @ha is tested for overflow. */
2962 = ((addressT) ex.X_add_number + 0x8000) >> 16;
2963 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2965 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
2967 = ((addressT) ex.X_add_number ^ sign) - sign;
2973 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2974 ex.X_add_number = PPC_HA (ex.X_add_number);
2975 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2976 ex.X_add_number = SEX16 (ex.X_add_number);
2979 case BFD_RELOC_PPC64_HIGHER:
2980 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
2981 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2982 ex.X_add_number = SEX16 (ex.X_add_number);
2985 case BFD_RELOC_PPC64_HIGHER_S:
2986 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
2987 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2988 ex.X_add_number = SEX16 (ex.X_add_number);
2991 case BFD_RELOC_PPC64_HIGHEST:
2992 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
2993 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
2994 ex.X_add_number = SEX16 (ex.X_add_number);
2997 case BFD_RELOC_PPC64_HIGHEST_S:
2998 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
2999 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3000 ex.X_add_number = SEX16 (ex.X_add_number);
3003 #endif /* OBJ_ELF */
3004 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3005 ppc_cpu, (char *) NULL, 0);
3009 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3011 if (ex.X_op == O_symbol && str[0] == '(')
3013 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3014 if (sym_name[0] == '.')
3017 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3019 expressionS tls_exp;
3021 hold = input_line_pointer;
3022 input_line_pointer = str + 1;
3023 expression (&tls_exp);
3024 if (tls_exp.X_op == O_symbol)
3026 reloc = BFD_RELOC_NONE;
3027 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3029 reloc = BFD_RELOC_PPC_TLSGD;
3030 input_line_pointer += 7;
3032 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3034 reloc = BFD_RELOC_PPC_TLSLD;
3035 input_line_pointer += 7;
3037 if (reloc != BFD_RELOC_NONE)
3040 str = input_line_pointer;
3042 if (fc >= MAX_INSN_FIXUPS)
3043 as_fatal (_("too many fixups"));
3044 fixups[fc].exp = tls_exp;
3045 fixups[fc].opindex = *opindex_ptr;
3046 fixups[fc].reloc = reloc;
3050 input_line_pointer = hold;
3054 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3056 /* Some TLS tweaks. */
3062 case BFD_RELOC_PPC_TLS:
3063 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3064 as_bad (_("@tls may not be used with \"%s\" operands"),
3066 else if (operand->shift != 11)
3067 as_bad (_("@tls may only be used in last operand"));
3069 insn = ppc_insert_operand (insn, operand,
3071 ppc_cpu, (char *) NULL, 0);
3074 /* We'll only use the 32 (or 64) bit form of these relocations
3075 in constants. Instructions get the 16 bit form. */
3076 case BFD_RELOC_PPC_DTPREL:
3077 reloc = BFD_RELOC_PPC_DTPREL16;
3079 case BFD_RELOC_PPC_TPREL:
3080 reloc = BFD_RELOC_PPC_TPREL16;
3085 if (opcode->opcode == (19 << 26) + (2 << 1)
3086 && reloc == BFD_RELOC_HI16_S)
3087 reloc = BFD_RELOC_PPC_REL16DX_HA;
3089 /* If VLE-mode convert LO/HI/HA relocations. */
3090 if (opcode->flags & PPC_OPCODE_VLE)
3092 int tmp_insn = insn & opcode->mask;
3094 int use_d_reloc = (tmp_insn == E_OR2I_INSN
3095 || tmp_insn == E_AND2I_DOT_INSN
3096 || tmp_insn == E_OR2IS_INSN
3097 || tmp_insn == E_LIS_INSN
3098 || tmp_insn == E_AND2IS_DOT_INSN);
3101 int use_a_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3102 || tmp_insn == E_ADD2IS_INSN
3103 || tmp_insn == E_CMP16I_INSN
3104 || tmp_insn == E_MULL2I_INSN
3105 || tmp_insn == E_CMPL16I_INSN
3106 || tmp_insn == E_CMPH16I_INSN
3107 || tmp_insn == E_CMPHL16I_INSN);
3114 case BFD_RELOC_PPC_EMB_SDA21:
3115 reloc = BFD_RELOC_PPC_VLE_SDA21;
3118 case BFD_RELOC_LO16:
3120 reloc = BFD_RELOC_PPC_VLE_LO16D;
3121 else if (use_a_reloc)
3122 reloc = BFD_RELOC_PPC_VLE_LO16A;
3125 case BFD_RELOC_HI16:
3127 reloc = BFD_RELOC_PPC_VLE_HI16D;
3128 else if (use_a_reloc)
3129 reloc = BFD_RELOC_PPC_VLE_HI16A;
3132 case BFD_RELOC_HI16_S:
3134 reloc = BFD_RELOC_PPC_VLE_HA16D;
3135 else if (use_a_reloc)
3136 reloc = BFD_RELOC_PPC_VLE_HA16A;
3139 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3141 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3144 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3146 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3149 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3151 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3156 #endif /* OBJ_ELF */
3158 if (reloc != BFD_RELOC_NONE)
3160 /* Determine a BFD reloc value based on the operand information.
3161 We are only prepared to turn a few of the operands into
3163 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3164 | PPC_OPERAND_ABSOLUTE)) != 0
3165 && operand->bitm == 0x3fffffc
3166 && operand->shift == 0)
3167 reloc = BFD_RELOC_PPC_B26;
3168 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3169 | PPC_OPERAND_ABSOLUTE)) != 0
3170 && operand->bitm == 0xfffc
3171 && operand->shift == 0)
3172 reloc = BFD_RELOC_PPC_B16;
3173 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3174 && operand->bitm == 0x1fe
3175 && operand->shift == -1)
3176 reloc = BFD_RELOC_PPC_VLE_REL8;
3177 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3178 && operand->bitm == 0xfffe
3179 && operand->shift == 0)
3180 reloc = BFD_RELOC_PPC_VLE_REL15;
3181 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3182 && operand->bitm == 0x1fffffe
3183 && operand->shift == 0)
3184 reloc = BFD_RELOC_PPC_VLE_REL24;
3185 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3186 && (operand->bitm & 0xfff0) == 0xfff0
3187 && operand->shift == 0)
3189 reloc = BFD_RELOC_16;
3190 #if defined OBJ_XCOFF || defined OBJ_ELF
3191 /* Note: the symbol may be not yet defined. */
3192 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3193 && ppc_is_toc_sym (ex.X_add_symbol))
3195 reloc = BFD_RELOC_PPC_TOC16;
3197 as_warn (_("assuming %s on symbol"),
3198 ppc_obj64 ? "@toc" : "@xgot");
3204 /* For the absolute forms of branches, convert the PC
3205 relative form back into the absolute. */
3206 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3210 case BFD_RELOC_PPC_B26:
3211 reloc = BFD_RELOC_PPC_BA26;
3213 case BFD_RELOC_PPC_B16:
3214 reloc = BFD_RELOC_PPC_BA16;
3217 case BFD_RELOC_PPC_B16_BRTAKEN:
3218 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3220 case BFD_RELOC_PPC_B16_BRNTAKEN:
3221 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3232 case BFD_RELOC_PPC_TOC16:
3233 toc_reloc_types |= has_small_toc_reloc;
3235 case BFD_RELOC_PPC64_TOC16_LO:
3236 case BFD_RELOC_PPC64_TOC16_HI:
3237 case BFD_RELOC_PPC64_TOC16_HA:
3238 toc_reloc_types |= has_large_toc_reloc;
3245 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3250 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3252 case BFD_RELOC_LO16:
3253 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3255 case BFD_RELOC_16_GOTOFF:
3256 reloc = BFD_RELOC_PPC64_GOT16_DS;
3258 case BFD_RELOC_LO16_GOTOFF:
3259 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3261 case BFD_RELOC_LO16_PLTOFF:
3262 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3264 case BFD_RELOC_16_BASEREL:
3265 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3267 case BFD_RELOC_LO16_BASEREL:
3268 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3270 case BFD_RELOC_PPC_TOC16:
3271 reloc = BFD_RELOC_PPC64_TOC16_DS;
3273 case BFD_RELOC_PPC64_TOC16_LO:
3274 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3276 case BFD_RELOC_PPC64_PLTGOT16:
3277 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3279 case BFD_RELOC_PPC64_PLTGOT16_LO:
3280 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3282 case BFD_RELOC_PPC_DTPREL16:
3283 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3285 case BFD_RELOC_PPC_DTPREL16_LO:
3286 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3288 case BFD_RELOC_PPC_TPREL16:
3289 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3291 case BFD_RELOC_PPC_TPREL16_LO:
3292 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3294 case BFD_RELOC_PPC_GOT_DTPREL16:
3295 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3296 case BFD_RELOC_PPC_GOT_TPREL16:
3297 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3300 as_bad (_("unsupported relocation for DS offset field"));
3306 /* We need to generate a fixup for this expression. */
3307 if (fc >= MAX_INSN_FIXUPS)
3308 as_fatal (_("too many fixups"));
3309 fixups[fc].exp = ex;
3310 fixups[fc].opindex = *opindex_ptr;
3311 fixups[fc].reloc = reloc;
3319 /* If expecting more operands, then we want to see "),". */
3320 if (*str == endc && opindex_ptr[1] != 0)
3324 while (ISSPACE (*str));
3328 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3336 /* The call to expression should have advanced str past any
3339 && (endc != ',' || *str != '\0'))
3342 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3344 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3352 while (ISSPACE (*str))
3356 as_bad (_("junk at end of line: `%s'"), str);
3359 /* Do we need/want an APUinfo section? */
3360 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3363 /* These are all version "1". */
3364 if (opcode->flags & PPC_OPCODE_SPE)
3365 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3366 if (opcode->flags & PPC_OPCODE_ISEL)
3367 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3368 if (opcode->flags & PPC_OPCODE_EFS)
3369 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3370 if (opcode->flags & PPC_OPCODE_BRLOCK)
3371 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3372 if (opcode->flags & PPC_OPCODE_PMR)
3373 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3374 if (opcode->flags & PPC_OPCODE_CACHELCK)
3375 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3376 if (opcode->flags & PPC_OPCODE_RFMCI)
3377 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3378 /* Only set the VLE flag if the instruction has been pulled via
3379 the VLE instruction set. This way the flag is guaranteed to
3380 be set for VLE-only instructions or for VLE-only processors,
3381 however it'll remain clear for dual-mode instructions on
3382 dual-mode and, more importantly, standard-mode processors. */
3383 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3384 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3388 /* Write out the instruction. */
3389 /* Differentiate between two and four byte insns. */
3390 if (ppc_mach () == bfd_mach_ppc_vle)
3392 if (PPC_OP_SE_VLE (insn))
3396 addr_mod = frag_now_fix () & 1;
3401 addr_mod = frag_now_fix () & 3;
3403 /* All instructions can start on a 2 byte boundary for VLE. */
3404 f = frag_more (insn_length);
3405 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3407 if (ppc_mach() == bfd_mach_ppc_vle)
3408 as_bad (_("instruction address is not a multiple of 2"));
3410 as_bad (_("instruction address is not a multiple of 4"));
3412 frag_now->insn_addr = addr_mod;
3413 frag_now->has_code = 1;
3414 md_number_to_chars (f, insn, insn_length);
3417 last_subseg = now_subseg;
3420 dwarf2_emit_insn (insn_length);
3423 /* Create any fixups. */
3424 for (i = 0; i < fc; i++)
3427 if (fixups[i].reloc != BFD_RELOC_NONE)
3429 reloc_howto_type *reloc_howto;
3433 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3437 size = bfd_get_reloc_size (reloc_howto);
3438 offset = target_big_endian ? (insn_length - size) : 0;
3440 fixP = fix_new_exp (frag_now,
3441 f - frag_now->fr_literal + offset,
3444 reloc_howto->pc_relative,
3449 const struct powerpc_operand *operand;
3451 operand = &powerpc_operands[fixups[i].opindex];
3452 fixP = fix_new_exp (frag_now,
3453 f - frag_now->fr_literal,
3456 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3459 fixP->fx_pcrel_adjust = fixups[i].opindex;
3463 /* Handle a macro. Gather all the operands, transform them as
3464 described by the macro, and call md_assemble recursively. All the
3465 operands are separated by commas; we don't accept parentheses
3466 around operands here. */
3469 ppc_macro (char *str, const struct powerpc_macro *macro)
3480 /* Gather the users operands into the operands array. */
3485 if (count >= sizeof operands / sizeof operands[0])
3487 operands[count++] = s;
3488 s = strchr (s, ',');
3489 if (s == (char *) NULL)
3494 if (count != macro->operands)
3496 as_bad (_("wrong number of operands"));
3500 /* Work out how large the string must be (the size is unbounded
3501 because it includes user input). */
3503 format = macro->format;
3504 while (*format != '\0')
3513 arg = strtol (format + 1, &send, 10);
3514 know (send != format && arg < count);
3515 len += strlen (operands[arg]);
3520 /* Put the string together. */
3521 complete = s = XNEWVEC (char, len + 1);
3522 format = macro->format;
3523 while (*format != '\0')
3529 arg = strtol (format + 1, &send, 10);
3530 strcpy (s, operands[arg]);
3537 /* Assemble the constructed instruction. */
3538 md_assemble (complete);
3543 /* For ELF, add support for SHT_ORDERED. */
3546 ppc_section_type (char *str, size_t len)
3548 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3555 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3557 if (type == SHT_ORDERED)
3558 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3562 #endif /* OBJ_ELF */
3565 /* Pseudo-op handling. */
3567 /* The .byte pseudo-op. This is similar to the normal .byte
3568 pseudo-op, but it can also take a single ASCII string. */
3571 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3575 if (*input_line_pointer != '\"')
3581 /* Gather characters. A real double quote is doubled. Unusual
3582 characters are not permitted. */
3583 ++input_line_pointer;
3588 c = *input_line_pointer++;
3592 if (*input_line_pointer != '\"')
3594 ++input_line_pointer;
3597 FRAG_APPEND_1_CHAR (c);
3601 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3602 as_warn (_("data in executable section"));
3603 demand_empty_rest_of_line ();
3608 /* XCOFF specific pseudo-op handling. */
3610 /* This is set if we are creating a .stabx symbol, since we don't want
3611 to handle symbol suffixes for such symbols. */
3612 static bfd_boolean ppc_stab_symbol;
3614 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3615 symbols in the .bss segment as though they were local common
3616 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3617 aligns .comm and .lcomm to 4 bytes. */
3620 ppc_comm (int lcomm)
3622 asection *current_seg = now_seg;
3623 subsegT current_subseg = now_subseg;
3629 symbolS *lcomm_sym = NULL;
3633 endc = get_symbol_name (&name);
3634 end_name = input_line_pointer;
3635 (void) restore_line_pointer (endc);
3637 if (*input_line_pointer != ',')
3639 as_bad (_("missing size"));
3640 ignore_rest_of_line ();
3643 ++input_line_pointer;
3645 size = get_absolute_expression ();
3648 as_bad (_("negative size"));
3649 ignore_rest_of_line ();
3655 /* The third argument to .comm is the alignment. */
3656 if (*input_line_pointer != ',')
3660 ++input_line_pointer;
3661 align = get_absolute_expression ();
3664 as_warn (_("ignoring bad alignment"));
3674 /* The third argument to .lcomm appears to be the real local
3675 common symbol to create. References to the symbol named in
3676 the first argument are turned into references to the third
3678 if (*input_line_pointer != ',')
3680 as_bad (_("missing real symbol name"));
3681 ignore_rest_of_line ();
3684 ++input_line_pointer;
3686 lcomm_endc = get_symbol_name (&lcomm_name);
3688 lcomm_sym = symbol_find_or_make (lcomm_name);
3690 (void) restore_line_pointer (lcomm_endc);
3692 /* The fourth argument to .lcomm is the alignment. */
3693 if (*input_line_pointer != ',')
3702 ++input_line_pointer;
3703 align = get_absolute_expression ();
3706 as_warn (_("ignoring bad alignment"));
3713 sym = symbol_find_or_make (name);
3716 if (S_IS_DEFINED (sym)
3717 || S_GET_VALUE (sym) != 0)
3719 as_bad (_("attempt to redefine symbol"));
3720 ignore_rest_of_line ();
3724 record_alignment (bss_section, align);
3727 || ! S_IS_DEFINED (lcomm_sym))
3736 S_SET_EXTERNAL (sym);
3740 symbol_get_tc (lcomm_sym)->output = 1;
3741 def_sym = lcomm_sym;
3745 subseg_set (bss_section, 1);
3746 frag_align (align, 0, 0);
3748 symbol_set_frag (def_sym, frag_now);
3749 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3750 def_size, (char *) NULL);
3752 S_SET_SEGMENT (def_sym, bss_section);
3753 symbol_get_tc (def_sym)->align = align;
3757 /* Align the size of lcomm_sym. */
3758 symbol_get_frag (lcomm_sym)->fr_offset =
3759 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3760 &~ ((1 << align) - 1));
3761 if (align > symbol_get_tc (lcomm_sym)->align)
3762 symbol_get_tc (lcomm_sym)->align = align;
3767 /* Make sym an offset from lcomm_sym. */
3768 S_SET_SEGMENT (sym, bss_section);
3769 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3770 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3771 symbol_get_frag (lcomm_sym)->fr_offset += size;
3774 subseg_set (current_seg, current_subseg);
3776 demand_empty_rest_of_line ();
3779 /* The .csect pseudo-op. This switches us into a different
3780 subsegment. The first argument is a symbol whose value is the
3781 start of the .csect. In COFF, csect symbols get special aux
3782 entries defined by the x_csect field of union internal_auxent. The
3783 optional second argument is the alignment (the default is 2). */
3786 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3793 endc = get_symbol_name (&name);
3795 sym = symbol_find_or_make (name);
3797 (void) restore_line_pointer (endc);
3799 if (S_GET_NAME (sym)[0] == '\0')
3801 /* An unnamed csect is assumed to be [PR]. */
3802 symbol_get_tc (sym)->symbol_class = XMC_PR;
3806 if (*input_line_pointer == ',')
3808 ++input_line_pointer;
3809 align = get_absolute_expression ();
3812 ppc_change_csect (sym, align);
3814 demand_empty_rest_of_line ();
3817 /* Change to a different csect. */
3820 ppc_change_csect (symbolS *sym, offsetT align)
3822 if (S_IS_DEFINED (sym))
3823 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3833 /* This is a new csect. We need to look at the symbol class to
3834 figure out whether it should go in the text section or the
3838 switch (symbol_get_tc (sym)->symbol_class)
3848 S_SET_SEGMENT (sym, text_section);
3849 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3850 ++ppc_text_subsegment;
3851 list_ptr = &ppc_text_csects;
3861 if (ppc_toc_csect != NULL
3862 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3863 == ppc_data_subsegment))
3865 S_SET_SEGMENT (sym, data_section);
3866 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3867 ++ppc_data_subsegment;
3868 list_ptr = &ppc_data_csects;
3874 /* We set the obstack chunk size to a small value before
3875 changing subsegments, so that we don't use a lot of memory
3876 space for what may be a small section. */
3877 hold_chunksize = chunksize;
3880 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
3881 symbol_get_tc (sym)->subseg);
3883 chunksize = hold_chunksize;
3886 ppc_after_toc_frag = frag_now;
3888 record_alignment (sec, align);
3890 frag_align_code (align, 0);
3892 frag_align (align, 0, 0);
3894 symbol_set_frag (sym, frag_now);
3895 S_SET_VALUE (sym, (valueT) frag_now_fix ());
3897 symbol_get_tc (sym)->align = align;
3898 symbol_get_tc (sym)->output = 1;
3899 symbol_get_tc (sym)->within = sym;
3901 for (list = *list_ptr;
3902 symbol_get_tc (list)->next != (symbolS *) NULL;
3903 list = symbol_get_tc (list)->next)
3905 symbol_get_tc (list)->next = sym;
3907 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
3908 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
3912 ppc_current_csect = sym;
3916 ppc_change_debug_section (unsigned int idx, subsegT subseg)
3920 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
3922 sec = subseg_new (dw->name, subseg);
3923 oldflags = bfd_get_section_flags (stdoutput, sec);
3924 if (oldflags == SEC_NO_FLAGS)
3926 /* Just created section. */
3927 gas_assert (dw_sections[idx].sect == NULL);
3929 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
3930 bfd_set_section_alignment (stdoutput, sec, 0);
3931 dw_sections[idx].sect = sec;
3934 /* Not anymore in a csect. */
3935 ppc_current_csect = NULL;
3938 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
3939 .dwsect flag [, opt-label ]
3943 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
3947 const struct xcoff_dwsect_name *dw;
3948 struct dw_subsection *subseg;
3949 struct dw_section *dws;
3953 flag = get_absolute_expression ();
3955 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
3956 if (xcoff_dwsect_names[i].flag == flag)
3958 dw = &xcoff_dwsect_names[i];
3962 /* Parse opt-label. */
3963 if (*input_line_pointer == ',')
3968 ++input_line_pointer;
3970 c = get_symbol_name (&label);
3971 opt_label = symbol_find_or_make (label);
3972 (void) restore_line_pointer (c);
3977 demand_empty_rest_of_line ();
3979 /* Return now in case of unknown subsection. */
3982 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
3987 /* Find the subsection. */
3988 dws = &dw_sections[i];
3990 if (opt_label != NULL && S_IS_DEFINED (opt_label))
3992 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
3993 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
3995 as_bad (_("label %s was not defined in this dwarf section"),
3996 S_GET_NAME (opt_label));
3997 subseg = dws->anon_subseg;
4001 subseg = symbol_get_tc (opt_label)->u.dw;
4006 /* Switch to the subsection. */
4007 ppc_change_debug_section (i, subseg->subseg);
4011 /* Create a new dw subsection. */
4012 subseg = XNEW (struct dw_subsection);
4014 if (opt_label == NULL)
4016 /* The anonymous one. */
4018 subseg->link = NULL;
4019 dws->anon_subseg = subseg;
4024 if (dws->list_subseg != NULL)
4025 subseg->subseg = dws->list_subseg->subseg + 1;
4029 subseg->link = dws->list_subseg;
4030 dws->list_subseg = subseg;
4031 symbol_get_tc (opt_label)->u.dw = subseg;
4034 ppc_change_debug_section (i, subseg->subseg);
4038 /* Add the length field. */
4039 expressionS *exp = &subseg->end_exp;
4042 if (opt_label != NULL)
4043 symbol_set_value_now (opt_label);
4045 /* Add the length field. Note that according to the AIX assembler
4046 manual, the size of the length field is 4 for powerpc32 but
4047 12 for powerpc64. */
4050 /* Write the 64bit marker. */
4051 md_number_to_chars (frag_more (4), -1, 4);
4054 exp->X_op = O_subtract;
4055 exp->X_op_symbol = symbol_temp_new_now ();
4056 exp->X_add_symbol = symbol_temp_make ();
4058 sz = ppc_obj64 ? 8 : 4;
4059 exp->X_add_number = -sz;
4060 emit_expr (exp, sz);
4065 /* This function handles the .text and .data pseudo-ops. These
4066 pseudo-ops aren't really used by XCOFF; we implement them for the
4067 convenience of people who aren't used to XCOFF. */
4070 ppc_section (int type)
4077 else if (type == 'd')
4082 sym = symbol_find_or_make (name);
4084 ppc_change_csect (sym, 2);
4086 demand_empty_rest_of_line ();
4089 /* This function handles the .section pseudo-op. This is mostly to
4090 give an error, since XCOFF only supports .text, .data and .bss, but
4091 we do permit the user to name the text or data section. */
4094 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4097 const char *real_name;
4101 c = get_symbol_name (&user_name);
4103 if (strcmp (user_name, ".text") == 0)
4104 real_name = ".text[PR]";
4105 else if (strcmp (user_name, ".data") == 0)
4106 real_name = ".data[RW]";
4109 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4110 (void) restore_line_pointer (c);
4111 ignore_rest_of_line ();
4115 (void) restore_line_pointer (c);
4117 sym = symbol_find_or_make (real_name);
4119 ppc_change_csect (sym, 2);
4121 demand_empty_rest_of_line ();
4124 /* The .extern pseudo-op. We create an undefined symbol. */
4127 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4132 endc = get_symbol_name (&name);
4134 (void) symbol_find_or_make (name);
4136 (void) restore_line_pointer (endc);
4138 demand_empty_rest_of_line ();
4141 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4144 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4150 endc = get_symbol_name (&name);
4152 sym = symbol_find_or_make (name);
4154 (void) restore_line_pointer (endc);
4156 symbol_get_tc (sym)->output = 1;
4158 demand_empty_rest_of_line ();
4161 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4162 relocations at the beginning of the current csect.
4164 (In principle, there's no reason why the relocations _have_ to be at
4165 the beginning. Anywhere in the csect would do. However, inserting
4166 at the beginning is what the native assmebler does, and it helps to
4167 deal with cases where the .ref statements follow the section contents.)
4169 ??? .refs don't work for empty .csects. However, the native assembler
4170 doesn't report an error in this case, and neither yet do we. */
4173 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4178 if (ppc_current_csect == NULL)
4180 as_bad (_(".ref outside .csect"));
4181 ignore_rest_of_line ();
4187 c = get_symbol_name (&name);
4189 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4190 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4192 *input_line_pointer = c;
4193 SKIP_WHITESPACE_AFTER_NAME ();
4194 c = *input_line_pointer;
4197 input_line_pointer++;
4199 if (is_end_of_line[(unsigned char) *input_line_pointer])
4201 as_bad (_("missing symbol name"));
4202 ignore_rest_of_line ();
4209 demand_empty_rest_of_line ();
4212 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4213 although I don't know why it bothers. */
4216 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4223 endc = get_symbol_name (&name);
4225 sym = symbol_find_or_make (name);
4227 (void) restore_line_pointer (endc);
4229 if (*input_line_pointer != ',')
4231 as_bad (_("missing rename string"));
4232 ignore_rest_of_line ();
4235 ++input_line_pointer;
4237 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4239 demand_empty_rest_of_line ();
4242 /* The .stabx pseudo-op. This is similar to a normal .stabs
4243 pseudo-op, but slightly different. A sample is
4244 .stabx "main:F-1",.main,142,0
4245 The first argument is the symbol name to create. The second is the
4246 value, and the third is the storage class. The fourth seems to be
4247 always zero, and I am assuming it is the type. */
4250 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4257 name = demand_copy_C_string (&len);
4259 if (*input_line_pointer != ',')
4261 as_bad (_("missing value"));
4264 ++input_line_pointer;
4266 ppc_stab_symbol = TRUE;
4267 sym = symbol_make (name);
4268 ppc_stab_symbol = FALSE;
4270 symbol_get_tc (sym)->real_name = name;
4272 (void) expression (&exp);
4279 as_bad (_("illegal .stabx expression; zero assumed"));
4280 exp.X_add_number = 0;
4283 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4284 symbol_set_frag (sym, &zero_address_frag);
4288 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4289 symbol_set_value_expression (sym, &exp);
4293 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4294 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4299 /* The value is some complex expression. This will probably
4300 fail at some later point, but this is probably the right
4301 thing to do here. */
4302 symbol_set_value_expression (sym, &exp);
4306 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4307 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4309 if (*input_line_pointer != ',')
4311 as_bad (_("missing class"));
4314 ++input_line_pointer;
4316 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4318 if (*input_line_pointer != ',')
4320 as_bad (_("missing type"));
4323 ++input_line_pointer;
4325 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4327 symbol_get_tc (sym)->output = 1;
4329 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4334 .stabx "z",arrays_,133,0
4337 .comm arrays_,13768,3
4339 resolve_symbol_value will copy the exp's "within" into sym's when the
4340 offset is 0. Since this seems to be corner case problem,
4341 only do the correction for storage class C_STSYM. A better solution
4342 would be to have the tc field updated in ppc_symbol_new_hook. */
4344 if (exp.X_op == O_symbol)
4346 if (ppc_current_block == NULL)
4347 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4349 symbol_get_tc (sym)->within = ppc_current_block;
4350 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4354 if (exp.X_op != O_symbol
4355 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4356 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4357 ppc_frob_label (sym);
4360 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4361 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4362 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4363 symbol_get_tc (ppc_current_csect)->within = sym;
4366 demand_empty_rest_of_line ();
4369 /* The .function pseudo-op. This takes several arguments. The first
4370 argument seems to be the external name of the symbol. The second
4371 argument seems to be the label for the start of the function. gcc
4372 uses the same name for both. I have no idea what the third and
4373 fourth arguments are meant to be. The optional fifth argument is
4374 an expression for the size of the function. In COFF this symbol
4375 gets an aux entry like that used for a csect. */
4378 ppc_function (int ignore ATTRIBUTE_UNUSED)
4386 endc = get_symbol_name (&name);
4388 /* Ignore any [PR] suffix. */
4389 name = ppc_canonicalize_symbol_name (name);
4390 s = strchr (name, '[');
4391 if (s != (char *) NULL
4392 && strcmp (s + 1, "PR]") == 0)
4395 ext_sym = symbol_find_or_make (name);
4397 (void) restore_line_pointer (endc);
4399 if (*input_line_pointer != ',')
4401 as_bad (_("missing symbol name"));
4402 ignore_rest_of_line ();
4405 ++input_line_pointer;
4407 endc = get_symbol_name (&name);
4409 lab_sym = symbol_find_or_make (name);
4411 (void) restore_line_pointer (endc);
4413 if (ext_sym != lab_sym)
4417 exp.X_op = O_symbol;
4418 exp.X_add_symbol = lab_sym;
4419 exp.X_op_symbol = NULL;
4420 exp.X_add_number = 0;
4422 symbol_set_value_expression (ext_sym, &exp);
4425 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4426 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4427 symbol_get_tc (ext_sym)->output = 1;
4429 if (*input_line_pointer == ',')
4433 /* Ignore the third argument. */
4434 ++input_line_pointer;
4436 if (*input_line_pointer == ',')
4438 /* Ignore the fourth argument. */
4439 ++input_line_pointer;
4441 if (*input_line_pointer == ',')
4443 /* The fifth argument is the function size. */
4444 ++input_line_pointer;
4445 symbol_get_tc (ext_sym)->u.size = symbol_new
4446 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4447 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4452 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4453 SF_SET_FUNCTION (ext_sym);
4454 SF_SET_PROCESS (ext_sym);
4455 coff_add_linesym (ext_sym);
4457 demand_empty_rest_of_line ();
4460 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4461 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4462 with the correct line number */
4464 static symbolS *saved_bi_sym = 0;
4467 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4471 sym = symbol_make (".bf");
4472 S_SET_SEGMENT (sym, text_section);
4473 symbol_set_frag (sym, frag_now);
4474 S_SET_VALUE (sym, frag_now_fix ());
4475 S_SET_STORAGE_CLASS (sym, C_FCN);
4477 coff_line_base = get_absolute_expression ();
4479 S_SET_NUMBER_AUXILIARY (sym, 1);
4480 SA_SET_SYM_LNNO (sym, coff_line_base);
4482 /* Line number for bi. */
4485 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4490 symbol_get_tc (sym)->output = 1;
4492 ppc_frob_label (sym);
4494 demand_empty_rest_of_line ();
4497 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4498 ".ef", except that the line number is absolute, not relative to the
4499 most recent ".bf" symbol. */
4502 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4506 sym = symbol_make (".ef");
4507 S_SET_SEGMENT (sym, text_section);
4508 symbol_set_frag (sym, frag_now);
4509 S_SET_VALUE (sym, frag_now_fix ());
4510 S_SET_STORAGE_CLASS (sym, C_FCN);
4511 S_SET_NUMBER_AUXILIARY (sym, 1);
4512 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4513 symbol_get_tc (sym)->output = 1;
4515 ppc_frob_label (sym);
4517 demand_empty_rest_of_line ();
4520 /* The .bi and .ei pseudo-ops. These take a string argument and
4521 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4522 the symbol list. The value of .bi will be know when the next .bf
4528 static symbolS *last_biei;
4535 name = demand_copy_C_string (&len);
4537 /* The value of these symbols is actually file offset. Here we set
4538 the value to the index into the line number entries. In
4539 ppc_frob_symbols we set the fix_line field, which will cause BFD
4540 to do the right thing. */
4542 sym = symbol_make (name);
4543 /* obj-coff.c currently only handles line numbers correctly in the
4545 S_SET_SEGMENT (sym, text_section);
4546 S_SET_VALUE (sym, coff_n_line_nos);
4547 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4549 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4550 symbol_get_tc (sym)->output = 1;
4558 for (look = last_biei ? last_biei : symbol_rootP;
4559 (look != (symbolS *) NULL
4560 && (S_GET_STORAGE_CLASS (look) == C_FILE
4561 || S_GET_STORAGE_CLASS (look) == C_BINCL
4562 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4563 look = symbol_next (look))
4565 if (look != (symbolS *) NULL)
4567 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4568 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4572 demand_empty_rest_of_line ();
4575 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4576 There is one argument, which is a csect symbol. The value of the
4577 .bs symbol is the index of this csect symbol. */
4580 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4587 if (ppc_current_block != NULL)
4588 as_bad (_("nested .bs blocks"));
4590 endc = get_symbol_name (&name);
4592 csect = symbol_find_or_make (name);
4594 (void) restore_line_pointer (endc);
4596 sym = symbol_make (".bs");
4597 S_SET_SEGMENT (sym, now_seg);
4598 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4599 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4600 symbol_get_tc (sym)->output = 1;
4602 symbol_get_tc (sym)->within = csect;
4604 ppc_frob_label (sym);
4606 ppc_current_block = sym;
4608 demand_empty_rest_of_line ();
4611 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4614 ppc_es (int ignore ATTRIBUTE_UNUSED)
4618 if (ppc_current_block == NULL)
4619 as_bad (_(".es without preceding .bs"));
4621 sym = symbol_make (".es");
4622 S_SET_SEGMENT (sym, now_seg);
4623 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4624 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4625 symbol_get_tc (sym)->output = 1;
4627 ppc_frob_label (sym);
4629 ppc_current_block = NULL;
4631 demand_empty_rest_of_line ();
4634 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4638 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4642 sym = symbol_make (".bb");
4643 S_SET_SEGMENT (sym, text_section);
4644 symbol_set_frag (sym, frag_now);
4645 S_SET_VALUE (sym, frag_now_fix ());
4646 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4648 S_SET_NUMBER_AUXILIARY (sym, 1);
4649 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4651 symbol_get_tc (sym)->output = 1;
4653 SF_SET_PROCESS (sym);
4655 ppc_frob_label (sym);
4657 demand_empty_rest_of_line ();
4660 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4664 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4668 sym = symbol_make (".eb");
4669 S_SET_SEGMENT (sym, text_section);
4670 symbol_set_frag (sym, frag_now);
4671 S_SET_VALUE (sym, frag_now_fix ());
4672 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4673 S_SET_NUMBER_AUXILIARY (sym, 1);
4674 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4675 symbol_get_tc (sym)->output = 1;
4677 SF_SET_PROCESS (sym);
4679 ppc_frob_label (sym);
4681 demand_empty_rest_of_line ();
4684 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4688 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4694 name = demand_copy_C_string (&len);
4695 sym = symbol_make (name);
4696 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4697 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4698 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4699 S_SET_VALUE (sym, 0);
4700 symbol_get_tc (sym)->output = 1;
4702 ppc_frob_label (sym);
4704 demand_empty_rest_of_line ();
4707 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4710 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4714 sym = symbol_make (".ec");
4715 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4716 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4717 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4718 S_SET_VALUE (sym, 0);
4719 symbol_get_tc (sym)->output = 1;
4721 ppc_frob_label (sym);
4723 demand_empty_rest_of_line ();
4726 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4729 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4731 if (ppc_toc_csect != (symbolS *) NULL)
4732 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4739 subseg = ppc_data_subsegment;
4740 ++ppc_data_subsegment;
4742 subseg_new (segment_name (data_section), subseg);
4743 ppc_toc_frag = frag_now;
4745 sym = symbol_find_or_make ("TOC[TC0]");
4746 symbol_set_frag (sym, frag_now);
4747 S_SET_SEGMENT (sym, data_section);
4748 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4749 symbol_get_tc (sym)->subseg = subseg;
4750 symbol_get_tc (sym)->output = 1;
4751 symbol_get_tc (sym)->within = sym;
4753 ppc_toc_csect = sym;
4755 for (list = ppc_data_csects;
4756 symbol_get_tc (list)->next != (symbolS *) NULL;
4757 list = symbol_get_tc (list)->next)
4759 symbol_get_tc (list)->next = sym;
4761 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4762 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4766 ppc_current_csect = ppc_toc_csect;
4768 demand_empty_rest_of_line ();
4771 /* The AIX assembler automatically aligns the operands of a .long or
4772 .short pseudo-op, and we want to be compatible. */
4775 ppc_xcoff_cons (int log_size)
4777 frag_align (log_size, 0, 0);
4778 record_alignment (now_seg, log_size);
4779 cons (1 << log_size);
4783 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4788 (void) expression (&exp);
4790 if (exp.X_op != O_constant)
4792 as_bad (_("non-constant byte count"));
4796 byte_count = exp.X_add_number;
4798 if (*input_line_pointer != ',')
4800 as_bad (_("missing value"));
4804 ++input_line_pointer;
4809 ppc_xcoff_end (void)
4813 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4815 struct dw_section *dws = &dw_sections[i];
4816 struct dw_subsection *dwss;
4818 if (dws->anon_subseg)
4820 dwss = dws->anon_subseg;
4821 dwss->link = dws->list_subseg;
4824 dwss = dws->list_subseg;
4826 for (; dwss != NULL; dwss = dwss->link)
4827 if (dwss->end_exp.X_add_symbol != NULL)
4829 subseg_set (dws->sect, dwss->subseg);
4830 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4835 #endif /* OBJ_XCOFF */
4836 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4838 /* The .tc pseudo-op. This is used when generating either XCOFF or
4839 ELF. This takes two or more arguments.
4841 When generating XCOFF output, the first argument is the name to
4842 give to this location in the toc; this will be a symbol with class
4843 TC. The rest of the arguments are N-byte values to actually put at
4844 this location in the TOC; often there is just one more argument, a
4845 relocatable symbol reference. The size of the value to store
4846 depends on target word size. A 32-bit target uses 4-byte values, a
4847 64-bit target uses 8-byte values.
4849 When not generating XCOFF output, the arguments are the same, but
4850 the first argument is simply ignored. */
4853 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4857 /* Define the TOC symbol name. */
4863 if (ppc_toc_csect == (symbolS *) NULL
4864 || ppc_toc_csect != ppc_current_csect)
4866 as_bad (_(".tc not in .toc section"));
4867 ignore_rest_of_line ();
4871 endc = get_symbol_name (&name);
4873 sym = symbol_find_or_make (name);
4875 (void) restore_line_pointer (endc);
4877 if (S_IS_DEFINED (sym))
4881 label = symbol_get_tc (ppc_current_csect)->within;
4882 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
4884 as_bad (_(".tc with no label"));
4885 ignore_rest_of_line ();
4889 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
4890 symbol_set_frag (label, symbol_get_frag (sym));
4891 S_SET_VALUE (label, S_GET_VALUE (sym));
4893 while (! is_end_of_line[(unsigned char) *input_line_pointer])
4894 ++input_line_pointer;
4899 S_SET_SEGMENT (sym, now_seg);
4900 symbol_set_frag (sym, frag_now);
4901 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4902 symbol_get_tc (sym)->symbol_class = XMC_TC;
4903 symbol_get_tc (sym)->output = 1;
4905 ppc_frob_label (sym);
4908 #endif /* OBJ_XCOFF */
4912 /* Skip the TOC symbol name. */
4913 while (is_part_of_name (*input_line_pointer)
4914 || *input_line_pointer == ' '
4915 || *input_line_pointer == '['
4916 || *input_line_pointer == ']'
4917 || *input_line_pointer == '{'
4918 || *input_line_pointer == '}')
4919 ++input_line_pointer;
4921 /* Align to a four/eight byte boundary. */
4922 align = ppc_obj64 ? 3 : 2;
4923 frag_align (align, 0, 0);
4924 record_alignment (now_seg, align);
4925 #endif /* OBJ_ELF */
4927 if (*input_line_pointer != ',')
4928 demand_empty_rest_of_line ();
4931 ++input_line_pointer;
4932 cons (ppc_obj64 ? 8 : 4);
4936 /* Pseudo-op .machine. */
4939 ppc_machine (int ignore ATTRIBUTE_UNUSED)
4943 #define MAX_HISTORY 100
4944 static ppc_cpu_t *cpu_history;
4945 static int curr_hist;
4949 c = get_symbol_name (&cpu_string);
4950 cpu_string = xstrdup (cpu_string);
4951 (void) restore_line_pointer (c);
4953 if (cpu_string != NULL)
4955 ppc_cpu_t old_cpu = ppc_cpu;
4959 for (p = cpu_string; *p != 0; p++)
4962 if (strcmp (cpu_string, "push") == 0)
4964 if (cpu_history == NULL)
4965 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
4967 if (curr_hist >= MAX_HISTORY)
4968 as_bad (_(".machine stack overflow"));
4970 cpu_history[curr_hist++] = ppc_cpu;
4972 else if (strcmp (cpu_string, "pop") == 0)
4975 as_bad (_(".machine stack underflow"));
4977 ppc_cpu = cpu_history[--curr_hist];
4979 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
4982 as_bad (_("invalid machine `%s'"), cpu_string);
4984 if (ppc_cpu != old_cpu)
4985 ppc_setup_opcodes ();
4988 demand_empty_rest_of_line ();
4990 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
4994 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
4996 /* Set the current section. */
4998 ppc_set_current_section (segT new)
5000 ppc_previous_section = ppc_current_section;
5001 ppc_current_section = new;
5004 /* pseudo-op: .previous
5005 behaviour: toggles the current section with the previous section.
5007 warnings: "No previous section" */
5010 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5012 if (ppc_previous_section == NULL)
5014 as_warn (_("no previous section to return to, ignored."));
5018 subseg_set (ppc_previous_section, 0);
5020 ppc_set_current_section (ppc_previous_section);
5023 /* pseudo-op: .pdata
5024 behaviour: predefined read only data section
5028 initial: .section .pdata "adr3"
5029 a - don't know -- maybe a misprint
5030 d - initialized data
5032 3 - double word aligned (that would be 4 byte boundary)
5035 Tag index tables (also known as the function table) for exception
5036 handling, debugging, etc. */
5039 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5041 if (pdata_section == 0)
5043 pdata_section = subseg_new (".pdata", 0);
5045 bfd_set_section_flags (stdoutput, pdata_section,
5046 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5047 | SEC_READONLY | SEC_DATA ));
5049 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5053 pdata_section = subseg_new (".pdata", 0);
5055 ppc_set_current_section (pdata_section);
5058 /* pseudo-op: .ydata
5059 behaviour: predefined read only data section
5063 initial: .section .ydata "drw3"
5064 a - don't know -- maybe a misprint
5065 d - initialized data
5067 3 - double word aligned (that would be 4 byte boundary)
5069 Tag tables (also known as the scope table) for exception handling,
5073 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5075 if (ydata_section == 0)
5077 ydata_section = subseg_new (".ydata", 0);
5078 bfd_set_section_flags (stdoutput, ydata_section,
5079 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5080 | SEC_READONLY | SEC_DATA ));
5082 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5086 ydata_section = subseg_new (".ydata", 0);
5088 ppc_set_current_section (ydata_section);
5091 /* pseudo-op: .reldata
5092 behaviour: predefined read write data section
5093 double word aligned (4-byte)
5094 FIXME: relocation is applied to it
5095 FIXME: what's the difference between this and .data?
5098 initial: .section .reldata "drw3"
5099 d - initialized data
5102 3 - double word aligned (that would be 8 byte boundary)
5105 Like .data, but intended to hold data subject to relocation, such as
5106 function descriptors, etc. */
5109 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5111 if (reldata_section == 0)
5113 reldata_section = subseg_new (".reldata", 0);
5115 bfd_set_section_flags (stdoutput, reldata_section,
5116 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5119 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5123 reldata_section = subseg_new (".reldata", 0);
5125 ppc_set_current_section (reldata_section);
5128 /* pseudo-op: .rdata
5129 behaviour: predefined read only data section
5133 initial: .section .rdata "dr3"
5134 d - initialized data
5136 3 - double word aligned (that would be 4 byte boundary) */
5139 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5141 if (rdata_section == 0)
5143 rdata_section = subseg_new (".rdata", 0);
5144 bfd_set_section_flags (stdoutput, rdata_section,
5145 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5146 | SEC_READONLY | SEC_DATA ));
5148 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5152 rdata_section = subseg_new (".rdata", 0);
5154 ppc_set_current_section (rdata_section);
5157 /* pseudo-op: .ualong
5158 behaviour: much like .int, with the exception that no alignment is
5160 FIXME: test the alignment statement
5165 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5171 /* pseudo-op: .znop <symbol name>
5172 behaviour: Issue a nop instruction
5173 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5174 the supplied symbol name.
5176 warnings: Missing symbol name */
5179 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5182 const struct powerpc_opcode *opcode;
5189 /* Strip out the symbol name. */
5190 c = get_symbol_name (&symbol_name);
5192 name = xstrdup (symbol_name);
5194 sym = symbol_find_or_make (name);
5196 *input_line_pointer = c;
5198 SKIP_WHITESPACE_AFTER_NAME ();
5200 /* Look up the opcode in the hash table. */
5201 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5203 /* Stick in the nop. */
5204 insn = opcode->opcode;
5206 /* Write out the instruction. */
5208 md_number_to_chars (f, insn, 4);
5210 f - frag_now->fr_literal,
5215 BFD_RELOC_16_GOT_PCREL);
5225 ppc_pe_comm (int lcomm)
5234 c = get_symbol_name (&name);
5236 /* just after name is now '\0'. */
5237 p = input_line_pointer;
5239 SKIP_WHITESPACE_AFTER_NAME ();
5240 if (*input_line_pointer != ',')
5242 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5243 ignore_rest_of_line ();
5247 input_line_pointer++; /* skip ',' */
5248 if ((temp = get_absolute_expression ()) < 0)
5250 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5251 ignore_rest_of_line ();
5257 /* The third argument to .comm is the alignment. */
5258 if (*input_line_pointer != ',')
5262 ++input_line_pointer;
5263 align = get_absolute_expression ();
5266 as_warn (_("ignoring bad alignment"));
5273 symbolP = symbol_find_or_make (name);
5276 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5278 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5279 S_GET_NAME (symbolP));
5280 ignore_rest_of_line ();
5284 if (S_GET_VALUE (symbolP))
5286 if (S_GET_VALUE (symbolP) != (valueT) temp)
5287 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5288 S_GET_NAME (symbolP),
5289 (long) S_GET_VALUE (symbolP),
5294 S_SET_VALUE (symbolP, (valueT) temp);
5295 S_SET_EXTERNAL (symbolP);
5296 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5299 demand_empty_rest_of_line ();
5303 * implement the .section pseudo op:
5304 * .section name {, "flags"}
5306 * | +--- optional flags: 'b' for bss
5308 * +-- section name 'l' for lib
5312 * 'd' (apparently m88k for data)
5314 * But if the argument is not a quoted string, treat it as a
5315 * subsegment number.
5317 * FIXME: this is a copy of the section processing from obj-coff.c, with
5318 * additions/changes for the moto-pas assembler support. There are three
5321 * FIXME: I just noticed this. This doesn't work at all really. It it
5322 * setting bits that bfd probably neither understands or uses. The
5323 * correct approach (?) will have to incorporate extra fields attached
5324 * to the section to hold the system specific stuff. (krk)
5327 * 'a' - unknown - referred to in documentation, but no definition supplied
5328 * 'c' - section has code
5329 * 'd' - section has initialized data
5330 * 'u' - section has uninitialized data
5331 * 'i' - section contains directives (info)
5332 * 'n' - section can be discarded
5333 * 'R' - remove section at link time
5335 * Section Protection:
5336 * 'r' - section is readable
5337 * 'w' - section is writeable
5338 * 'x' - section is executable
5339 * 's' - section is sharable
5341 * Section Alignment:
5342 * '0' - align to byte boundary
5343 * '1' - align to halfword undary
5344 * '2' - align to word boundary
5345 * '3' - align to doubleword boundary
5346 * '4' - align to quadword boundary
5347 * '5' - align to 32 byte boundary
5348 * '6' - align to 64 byte boundary
5353 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5355 /* Strip out the section name. */
5364 c = get_symbol_name (§ion_name);
5366 name = xstrdup (section_name);
5368 *input_line_pointer = c;
5370 SKIP_WHITESPACE_AFTER_NAME ();
5373 flags = SEC_NO_FLAGS;
5375 if (strcmp (name, ".idata$2") == 0)
5379 else if (strcmp (name, ".idata$3") == 0)
5383 else if (strcmp (name, ".idata$4") == 0)
5387 else if (strcmp (name, ".idata$5") == 0)
5391 else if (strcmp (name, ".idata$6") == 0)
5396 /* Default alignment to 16 byte boundary. */
5399 if (*input_line_pointer == ',')
5401 ++input_line_pointer;
5403 if (*input_line_pointer != '"')
5404 exp = get_absolute_expression ();
5407 ++input_line_pointer;
5408 while (*input_line_pointer != '"'
5409 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5411 switch (*input_line_pointer)
5413 /* Section Contents */
5414 case 'a': /* unknown */
5415 as_bad (_("unsupported section attribute -- 'a'"));
5417 case 'c': /* code section */
5420 case 'd': /* section has initialized data */
5423 case 'u': /* section has uninitialized data */
5424 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5428 case 'i': /* section contains directives (info) */
5429 /* FIXME: This is IMAGE_SCN_LNK_INFO
5431 flags |= SEC_HAS_CONTENTS;
5433 case 'n': /* section can be discarded */
5436 case 'R': /* Remove section at link time */
5437 flags |= SEC_NEVER_LOAD;
5439 #if IFLICT_BRAIN_DAMAGE
5440 /* Section Protection */
5441 case 'r': /* section is readable */
5442 flags |= IMAGE_SCN_MEM_READ;
5444 case 'w': /* section is writeable */
5445 flags |= IMAGE_SCN_MEM_WRITE;
5447 case 'x': /* section is executable */
5448 flags |= IMAGE_SCN_MEM_EXECUTE;
5450 case 's': /* section is sharable */
5451 flags |= IMAGE_SCN_MEM_SHARED;
5454 /* Section Alignment */
5455 case '0': /* align to byte boundary */
5456 flags |= IMAGE_SCN_ALIGN_1BYTES;
5459 case '1': /* align to halfword boundary */
5460 flags |= IMAGE_SCN_ALIGN_2BYTES;
5463 case '2': /* align to word boundary */
5464 flags |= IMAGE_SCN_ALIGN_4BYTES;
5467 case '3': /* align to doubleword boundary */
5468 flags |= IMAGE_SCN_ALIGN_8BYTES;
5471 case '4': /* align to quadword boundary */
5472 flags |= IMAGE_SCN_ALIGN_16BYTES;
5475 case '5': /* align to 32 byte boundary */
5476 flags |= IMAGE_SCN_ALIGN_32BYTES;
5479 case '6': /* align to 64 byte boundary */
5480 flags |= IMAGE_SCN_ALIGN_64BYTES;
5485 as_bad (_("unknown section attribute '%c'"),
5486 *input_line_pointer);
5489 ++input_line_pointer;
5491 if (*input_line_pointer == '"')
5492 ++input_line_pointer;
5496 sec = subseg_new (name, (subsegT) exp);
5498 ppc_set_current_section (sec);
5500 if (flags != SEC_NO_FLAGS)
5502 if (! bfd_set_section_flags (stdoutput, sec, flags))
5503 as_bad (_("error setting flags for \"%s\": %s"),
5504 bfd_section_name (stdoutput, sec),
5505 bfd_errmsg (bfd_get_error ()));
5508 bfd_set_section_alignment (stdoutput, sec, align);
5512 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5518 endc = get_symbol_name (&name);
5520 ext_sym = symbol_find_or_make (name);
5522 (void) restore_line_pointer (endc);
5524 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5525 SF_SET_FUNCTION (ext_sym);
5526 SF_SET_PROCESS (ext_sym);
5527 coff_add_linesym (ext_sym);
5529 demand_empty_rest_of_line ();
5533 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5535 if (tocdata_section == 0)
5537 tocdata_section = subseg_new (".tocd", 0);
5538 /* FIXME: section flags won't work. */
5539 bfd_set_section_flags (stdoutput, tocdata_section,
5540 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5541 | SEC_READONLY | SEC_DATA));
5543 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5547 rdata_section = subseg_new (".tocd", 0);
5550 ppc_set_current_section (tocdata_section);
5552 demand_empty_rest_of_line ();
5555 /* Don't adjust TOC relocs to use the section symbol. */
5558 ppc_pe_fix_adjustable (fixS *fix)
5560 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5567 /* XCOFF specific symbol and file handling. */
5569 /* Canonicalize the symbol name. We use the to force the suffix, if
5570 any, to use square brackets, and to be in upper case. */
5573 ppc_canonicalize_symbol_name (char *name)
5577 if (ppc_stab_symbol)
5580 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5594 for (s++; *s != '\0' && *s != brac; s++)
5597 if (*s == '\0' || s[1] != '\0')
5598 as_bad (_("bad symbol suffix"));
5606 /* Set the class of a symbol based on the suffix, if any. This is
5607 called whenever a new symbol is created. */
5610 ppc_symbol_new_hook (symbolS *sym)
5612 struct ppc_tc_sy *tc;
5615 tc = symbol_get_tc (sym);
5618 tc->symbol_class = -1;
5619 tc->real_name = NULL;
5626 if (ppc_stab_symbol)
5629 s = strchr (S_GET_NAME (sym), '[');
5630 if (s == (const char *) NULL)
5632 /* There is no suffix. */
5641 if (strcmp (s, "BS]") == 0)
5642 tc->symbol_class = XMC_BS;
5645 if (strcmp (s, "DB]") == 0)
5646 tc->symbol_class = XMC_DB;
5647 else if (strcmp (s, "DS]") == 0)
5648 tc->symbol_class = XMC_DS;
5651 if (strcmp (s, "GL]") == 0)
5652 tc->symbol_class = XMC_GL;
5655 if (strcmp (s, "PR]") == 0)
5656 tc->symbol_class = XMC_PR;
5659 if (strcmp (s, "RO]") == 0)
5660 tc->symbol_class = XMC_RO;
5661 else if (strcmp (s, "RW]") == 0)
5662 tc->symbol_class = XMC_RW;
5665 if (strcmp (s, "SV]") == 0)
5666 tc->symbol_class = XMC_SV;
5669 if (strcmp (s, "TC]") == 0)
5670 tc->symbol_class = XMC_TC;
5671 else if (strcmp (s, "TI]") == 0)
5672 tc->symbol_class = XMC_TI;
5673 else if (strcmp (s, "TB]") == 0)
5674 tc->symbol_class = XMC_TB;
5675 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5676 tc->symbol_class = XMC_TC0;
5679 if (strcmp (s, "UA]") == 0)
5680 tc->symbol_class = XMC_UA;
5681 else if (strcmp (s, "UC]") == 0)
5682 tc->symbol_class = XMC_UC;
5685 if (strcmp (s, "XO]") == 0)
5686 tc->symbol_class = XMC_XO;
5690 if (tc->symbol_class == -1)
5691 as_bad (_("unrecognized symbol suffix"));
5694 /* Set the class of a label based on where it is defined. This
5695 handles symbols without suffixes. Also, move the symbol so that it
5696 follows the csect symbol. */
5699 ppc_frob_label (symbolS *sym)
5701 if (ppc_current_csect != (symbolS *) NULL)
5703 if (symbol_get_tc (sym)->symbol_class == -1)
5704 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5706 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5707 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5708 &symbol_rootP, &symbol_lastP);
5709 symbol_get_tc (ppc_current_csect)->within = sym;
5710 symbol_get_tc (sym)->within = ppc_current_csect;
5714 dwarf2_emit_label (sym);
5718 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5719 seen. It tells ppc_adjust_symtab whether it needs to look through
5722 static bfd_boolean ppc_saw_abs;
5724 /* Change the name of a symbol just before writing it out. Set the
5725 real name if the .rename pseudo-op was used. Otherwise, remove any
5726 class suffix. Return 1 if the symbol should not be included in the
5730 ppc_frob_symbol (symbolS *sym)
5732 static symbolS *ppc_last_function;
5733 static symbolS *set_end;
5735 /* Discard symbols that should not be included in the output symbol
5737 if (! symbol_used_in_reloc_p (sym)
5738 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5739 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5740 && ! symbol_get_tc (sym)->output
5741 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5744 /* This one will disappear anyway. Don't make a csect sym for it. */
5745 if (sym == abs_section_sym)
5748 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5749 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5755 name = S_GET_NAME (sym);
5756 s = strchr (name, '[');
5757 if (s != (char *) NULL)
5763 snew = xstrndup (name, len);
5765 S_SET_NAME (sym, snew);
5769 if (set_end != (symbolS *) NULL)
5771 SA_SET_SYM_ENDNDX (set_end, sym);
5775 if (SF_GET_FUNCTION (sym))
5777 if (ppc_last_function != (symbolS *) NULL)
5778 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5779 ppc_last_function = sym;
5780 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5782 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5783 SA_SET_SYM_FSIZE (sym,
5784 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5787 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5788 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5790 if (ppc_last_function == (symbolS *) NULL)
5791 as_bad (_(".ef with no preceding .function"));
5794 set_end = ppc_last_function;
5795 ppc_last_function = NULL;
5797 /* We don't have a C_EFCN symbol, but we need to force the
5798 COFF backend to believe that it has seen one. */
5799 coff_last_function = NULL;
5803 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5804 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5805 && S_GET_STORAGE_CLASS (sym) != C_FILE
5806 && S_GET_STORAGE_CLASS (sym) != C_FCN
5807 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5808 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5809 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5810 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5811 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5812 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5813 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5815 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5816 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5817 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5820 union internal_auxent *a;
5822 /* Create a csect aux. */
5823 i = S_GET_NUMBER_AUXILIARY (sym);
5824 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5825 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5826 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5828 /* This is the TOC table. */
5829 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5830 a->x_csect.x_scnlen.l = 0;
5831 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5833 else if (symbol_get_tc (sym)->subseg != 0)
5835 /* This is a csect symbol. x_scnlen is the size of the
5837 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5838 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5839 S_GET_SEGMENT (sym))
5840 - S_GET_VALUE (sym));
5843 resolve_symbol_value (symbol_get_tc (sym)->next);
5844 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5845 - S_GET_VALUE (sym));
5847 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5849 else if (S_GET_SEGMENT (sym) == bss_section)
5851 /* This is a common symbol. */
5852 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5853 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5854 if (S_IS_EXTERNAL (sym))
5855 symbol_get_tc (sym)->symbol_class = XMC_RW;
5857 symbol_get_tc (sym)->symbol_class = XMC_BS;
5859 else if (S_GET_SEGMENT (sym) == absolute_section)
5861 /* This is an absolute symbol. The csect will be created by
5862 ppc_adjust_symtab. */
5864 a->x_csect.x_smtyp = XTY_LD;
5865 if (symbol_get_tc (sym)->symbol_class == -1)
5866 symbol_get_tc (sym)->symbol_class = XMC_XO;
5868 else if (! S_IS_DEFINED (sym))
5870 /* This is an external symbol. */
5871 a->x_csect.x_scnlen.l = 0;
5872 a->x_csect.x_smtyp = XTY_ER;
5874 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
5878 /* This is a TOC definition. x_scnlen is the size of the
5880 next = symbol_next (sym);
5881 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
5882 next = symbol_next (next);
5883 if (next == (symbolS *) NULL
5884 || symbol_get_tc (next)->symbol_class != XMC_TC)
5886 if (ppc_after_toc_frag == (fragS *) NULL)
5887 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5889 - S_GET_VALUE (sym));
5891 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
5892 - S_GET_VALUE (sym));
5896 resolve_symbol_value (next);
5897 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
5898 - S_GET_VALUE (sym));
5900 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5906 /* This is a normal symbol definition. x_scnlen is the
5907 symbol index of the containing csect. */
5908 if (S_GET_SEGMENT (sym) == text_section)
5909 csect = ppc_text_csects;
5910 else if (S_GET_SEGMENT (sym) == data_section)
5911 csect = ppc_data_csects;
5915 /* Skip the initial dummy symbol. */
5916 csect = symbol_get_tc (csect)->next;
5918 if (csect == (symbolS *) NULL)
5920 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
5921 a->x_csect.x_scnlen.l = 0;
5925 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
5927 resolve_symbol_value (symbol_get_tc (csect)->next);
5928 if (S_GET_VALUE (symbol_get_tc (csect)->next)
5929 > S_GET_VALUE (sym))
5931 csect = symbol_get_tc (csect)->next;
5934 a->x_csect.x_scnlen.p =
5935 coffsymbol (symbol_get_bfdsym (csect))->native;
5936 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
5939 a->x_csect.x_smtyp = XTY_LD;
5942 a->x_csect.x_parmhash = 0;
5943 a->x_csect.x_snhash = 0;
5944 if (symbol_get_tc (sym)->symbol_class == -1)
5945 a->x_csect.x_smclas = XMC_PR;
5947 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
5948 a->x_csect.x_stab = 0;
5949 a->x_csect.x_snstab = 0;
5951 /* Don't let the COFF backend resort these symbols. */
5952 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
5954 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
5956 /* We want the value to be the symbol index of the referenced
5957 csect symbol. BFD will do that for us if we set the right
5959 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
5960 combined_entry_type *c = coffsymbol (bsym)->native;
5962 S_SET_VALUE (sym, (valueT) (size_t) c);
5963 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
5965 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
5970 block = symbol_get_tc (sym)->within;
5973 /* The value is the offset from the enclosing csect. */
5976 csect = symbol_get_tc (block)->within;
5977 resolve_symbol_value (csect);
5978 base = S_GET_VALUE (csect);
5983 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
5985 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
5986 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
5988 /* We want the value to be a file offset into the line numbers.
5989 BFD will do that for us if we set the right flags. We have
5990 already set the value correctly. */
5991 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
5997 /* Adjust the symbol table. This creates csect symbols for all
5998 absolute symbols. */
6001 ppc_adjust_symtab (void)
6008 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6012 union internal_auxent *a;
6014 if (S_GET_SEGMENT (sym) != absolute_section)
6017 csect = symbol_create (".abs[XO]", absolute_section,
6018 S_GET_VALUE (sym), &zero_address_frag);
6019 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6020 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6021 i = S_GET_NUMBER_AUXILIARY (csect);
6022 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6023 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6024 a->x_csect.x_scnlen.l = 0;
6025 a->x_csect.x_smtyp = XTY_SD;
6026 a->x_csect.x_parmhash = 0;
6027 a->x_csect.x_snhash = 0;
6028 a->x_csect.x_smclas = XMC_XO;
6029 a->x_csect.x_stab = 0;
6030 a->x_csect.x_snstab = 0;
6032 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6034 i = S_GET_NUMBER_AUXILIARY (sym);
6035 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6036 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6037 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6040 ppc_saw_abs = FALSE;
6043 /* Set the VMA for a section. This is called on all the sections in
6047 ppc_frob_section (asection *sec)
6049 static bfd_vma vma = 0;
6051 /* Dwarf sections start at 0. */
6052 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6055 vma = md_section_align (sec, vma);
6056 bfd_set_section_vma (stdoutput, sec, vma);
6057 vma += bfd_section_size (stdoutput, sec);
6060 #endif /* OBJ_XCOFF */
6063 md_atof (int type, char *litp, int *sizep)
6065 return ieee_md_atof (type, litp, sizep, target_big_endian);
6068 /* Write a value out to the object file, using the appropriate
6072 md_number_to_chars (char *buf, valueT val, int n)
6074 if (target_big_endian)
6075 number_to_chars_bigendian (buf, val, n);
6077 number_to_chars_littleendian (buf, val, n);
6080 /* Align a section (I don't know why this is machine dependent). */
6083 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6088 int align = bfd_get_section_alignment (stdoutput, seg);
6090 return ((addr + (1 << align) - 1) & -(1 << align));
6094 /* We don't have any form of relaxing. */
6097 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6098 asection *seg ATTRIBUTE_UNUSED)
6104 /* Convert a machine dependent frag. We never generate these. */
6107 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6108 asection *sec ATTRIBUTE_UNUSED,
6109 fragS *fragp ATTRIBUTE_UNUSED)
6114 /* We have no need to default values of symbols. */
6117 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6122 /* Functions concerning relocs. */
6124 /* The location from which a PC relative jump should be calculated,
6125 given a PC relative reloc. */
6128 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6130 return fixp->fx_frag->fr_address + fixp->fx_where;
6135 /* This is called to see whether a fixup should be adjusted to use a
6136 section symbol. We take the opportunity to change a fixup against
6137 a symbol in the TOC subsegment into a reloc against the
6138 corresponding .tc symbol. */
6141 ppc_fix_adjustable (fixS *fix)
6143 valueT val = resolve_symbol_value (fix->fx_addsy);
6144 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6145 TC_SYMFIELD_TYPE *tc;
6147 if (symseg == absolute_section)
6150 /* Always adjust symbols in debugging sections. */
6151 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6154 if (ppc_toc_csect != (symbolS *) NULL
6155 && fix->fx_addsy != ppc_toc_csect
6156 && symseg == data_section
6157 && val >= ppc_toc_frag->fr_address
6158 && (ppc_after_toc_frag == (fragS *) NULL
6159 || val < ppc_after_toc_frag->fr_address))
6163 for (sy = symbol_next (ppc_toc_csect);
6164 sy != (symbolS *) NULL;
6165 sy = symbol_next (sy))
6167 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6169 if (sy_tc->symbol_class == XMC_TC0)
6171 if (sy_tc->symbol_class != XMC_TC)
6173 if (val == resolve_symbol_value (sy))
6176 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6181 as_bad_where (fix->fx_file, fix->fx_line,
6182 _("symbol in .toc does not match any .tc"));
6185 /* Possibly adjust the reloc to be against the csect. */
6186 tc = symbol_get_tc (fix->fx_addsy);
6188 && tc->symbol_class != XMC_TC0
6189 && tc->symbol_class != XMC_TC
6190 && symseg != bss_section
6191 /* Don't adjust if this is a reloc in the toc section. */
6192 && (symseg != data_section
6193 || ppc_toc_csect == NULL
6194 || val < ppc_toc_frag->fr_address
6195 || (ppc_after_toc_frag != NULL
6196 && val >= ppc_after_toc_frag->fr_address)))
6198 symbolS *csect = tc->within;
6200 /* If the symbol was not declared by a label (eg: a section symbol),
6201 use the section instead of the csect. This doesn't happen in
6202 normal AIX assembly code. */
6204 csect = seg_info (symseg)->sym;
6206 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6207 fix->fx_addsy = csect;
6212 /* Adjust a reloc against a .lcomm symbol to be against the base
6214 if (symseg == bss_section
6215 && ! S_IS_EXTERNAL (fix->fx_addsy))
6217 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6219 fix->fx_offset += val - resolve_symbol_value (sy);
6226 /* A reloc from one csect to another must be kept. The assembler
6227 will, of course, keep relocs between sections, and it will keep
6228 absolute relocs, but we need to force it to keep PC relative relocs
6229 between two csects in the same section. */
6232 ppc_force_relocation (fixS *fix)
6234 /* At this point fix->fx_addsy should already have been converted to
6235 a csect symbol. If the csect does not include the fragment, then
6236 we need to force the relocation. */
6238 && fix->fx_addsy != NULL
6239 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6240 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6241 > fix->fx_frag->fr_address)
6242 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6243 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6244 <= fix->fx_frag->fr_address))))
6247 return generic_force_reloc (fix);
6251 ppc_new_dot_label (symbolS *sym)
6253 /* Anchor this label to the current csect for relocations. */
6254 symbol_get_tc (sym)->within = ppc_current_csect;
6257 #endif /* OBJ_XCOFF */
6260 /* If this function returns non-zero, it guarantees that a relocation
6261 will be emitted for a fixup. */
6264 ppc_force_relocation (fixS *fix)
6266 /* Branch prediction relocations must force a relocation, as must
6267 the vtable description relocs. */
6268 switch (fix->fx_r_type)
6270 case BFD_RELOC_PPC_B16_BRTAKEN:
6271 case BFD_RELOC_PPC_B16_BRNTAKEN:
6272 case BFD_RELOC_PPC_BA16_BRTAKEN:
6273 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6274 case BFD_RELOC_24_PLT_PCREL:
6275 case BFD_RELOC_PPC64_TOC:
6277 case BFD_RELOC_PPC_B26:
6278 case BFD_RELOC_PPC_BA26:
6279 case BFD_RELOC_PPC_B16:
6280 case BFD_RELOC_PPC_BA16:
6281 /* All branch fixups targeting a localentry symbol must
6282 force a relocation. */
6285 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6286 elf_symbol_type *elfsym
6287 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6288 gas_assert (elfsym);
6289 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6297 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6298 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6301 return generic_force_reloc (fix);
6305 ppc_fix_adjustable (fixS *fix)
6307 switch (fix->fx_r_type)
6309 /* All branch fixups targeting a localentry symbol must
6310 continue using the symbol. */
6311 case BFD_RELOC_PPC_B26:
6312 case BFD_RELOC_PPC_BA26:
6313 case BFD_RELOC_PPC_B16:
6314 case BFD_RELOC_PPC_BA16:
6315 case BFD_RELOC_PPC_B16_BRTAKEN:
6316 case BFD_RELOC_PPC_B16_BRNTAKEN:
6317 case BFD_RELOC_PPC_BA16_BRTAKEN:
6318 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6321 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6322 elf_symbol_type *elfsym
6323 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6324 gas_assert (elfsym);
6325 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6333 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6334 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6335 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6336 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6337 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6338 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6339 && fix->fx_r_type != BFD_RELOC_GPREL16
6340 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6341 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6342 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6343 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6348 ppc_frag_check (struct frag *fragP)
6350 if (!fragP->has_code)
6353 if (ppc_mach() == bfd_mach_ppc_vle)
6355 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6356 as_bad (_("instruction address is not a multiple of 2"));
6360 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6361 as_bad (_("instruction address is not a multiple of 4"));
6365 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6366 rs_align_code frag. */
6369 ppc_handle_align (struct frag *fragP)
6371 valueT count = (fragP->fr_next->fr_address
6372 - (fragP->fr_address + fragP->fr_fix));
6374 if (ppc_mach() == bfd_mach_ppc_vle && count != 0 && (count & 1) == 0)
6376 char *dest = fragP->fr_literal + fragP->fr_fix;
6379 md_number_to_chars (dest, 0x4400, 2);
6381 else if (count != 0 && (count & 3) == 0)
6383 char *dest = fragP->fr_literal + fragP->fr_fix;
6387 if (count > 4 * nop_limit && count < 0x2000000)
6391 /* Make a branch, then follow with nops. Insert another
6392 frag to handle the nops. */
6393 md_number_to_chars (dest, 0x48000000 + count, 4);
6398 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6399 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6400 fragP->fr_next = rest;
6402 rest->fr_address += rest->fr_fix + 4;
6404 /* If we leave the next frag as rs_align_code we'll come here
6405 again, resulting in a bunch of branches rather than a
6406 branch followed by nops. */
6407 rest->fr_type = rs_align;
6408 dest = rest->fr_literal;
6411 md_number_to_chars (dest, 0x60000000, 4);
6413 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6414 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6415 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6416 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6418 /* For power6, power7, power8 and power9, we want the last nop to be
6419 a group terminating one. Do this by inserting an rs_fill frag
6420 immediately after this one, with its address set to the last nop
6421 location. This will automatically reduce the number of nops in
6422 the current frag by one. */
6425 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6427 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6428 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6429 group_nop->fr_fix = 0;
6430 group_nop->fr_offset = 1;
6431 group_nop->fr_type = rs_fill;
6432 fragP->fr_next = group_nop;
6433 dest = group_nop->fr_literal;
6436 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6437 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6438 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6440 if (ppc_cpu & PPC_OPCODE_E500MC)
6441 /* e500mc group terminating nop: "ori 0,0,0". */
6442 md_number_to_chars (dest, 0x60000000, 4);
6444 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6445 md_number_to_chars (dest, 0x60420000, 4);
6448 /* power6 group terminating nop: "ori 1,1,0". */
6449 md_number_to_chars (dest, 0x60210000, 4);
6454 /* Apply a fixup to the object code. This is called for all the
6455 fixups we generated by the calls to fix_new_exp, above. */
6458 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6460 valueT value = * valP;
6462 const struct powerpc_operand *operand;
6465 if (fixP->fx_addsy != NULL)
6467 /* Hack around bfd_install_relocation brain damage. */
6469 value += fixP->fx_frag->fr_address + fixP->fx_where;
6471 if (fixP->fx_addsy == abs_section_sym)
6477 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6478 the symbol values. If we are doing this relocation the code in
6479 write.c is going to call bfd_install_relocation, which is also
6480 going to use the symbol value. That means that if the reloc is
6481 fully resolved we want to use *valP since bfd_install_relocation is
6483 However, if the reloc is not fully resolved we do not want to
6484 use *valP, and must use fx_offset instead. If the relocation
6485 is PC-relative, we then need to re-apply md_pcrel_from_section
6486 to this new relocation value. */
6487 if (fixP->fx_addsy == (symbolS *) NULL)
6492 value = fixP->fx_offset;
6494 value -= md_pcrel_from_section (fixP, seg);
6498 if (fixP->fx_subsy != (symbolS *) NULL)
6500 /* We can't actually support subtracting a symbol. */
6501 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
6505 if (fixP->fx_pcrel_adjust != 0)
6507 /* This is a fixup on an instruction. */
6508 int opindex = fixP->fx_pcrel_adjust & 0xff;
6510 operand = &powerpc_operands[opindex];
6512 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6513 does not generate a reloc. It uses the offset of `sym' within its
6514 csect. Other usages, such as `.long sym', generate relocs. This
6515 is the documented behaviour of non-TOC symbols. */
6516 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6517 && (operand->bitm & 0xfff0) == 0xfff0
6518 && operand->shift == 0
6519 && (operand->insert == NULL || ppc_obj64)
6520 && fixP->fx_addsy != NULL
6521 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6522 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6523 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6524 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6526 value = fixP->fx_offset;
6530 /* During parsing of instructions, a TOC16 reloc is generated for
6531 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6532 in the toc. But at parse time, SYM may be not yet defined, so
6533 check again here. */
6534 if (fixP->fx_r_type == BFD_RELOC_16
6535 && fixP->fx_addsy != NULL
6536 && ppc_is_toc_sym (fixP->fx_addsy))
6537 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6541 /* Calculate value to be stored in field. */
6543 switch (fixP->fx_r_type)
6546 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6547 case BFD_RELOC_PPC_VLE_LO16A:
6548 case BFD_RELOC_PPC_VLE_LO16D:
6550 case BFD_RELOC_LO16:
6551 case BFD_RELOC_LO16_PCREL:
6552 fieldval = value & 0xffff;
6554 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6555 fieldval = SEX16 (fieldval);
6556 fixP->fx_no_overflow = 1;
6559 case BFD_RELOC_HI16:
6560 case BFD_RELOC_HI16_PCREL:
6562 if (REPORT_OVERFLOW_HI && ppc_obj64)
6564 fieldval = value >> 16;
6565 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6567 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6568 fieldval = ((valueT) fieldval ^ sign) - sign;
6574 case BFD_RELOC_PPC_VLE_HI16A:
6575 case BFD_RELOC_PPC_VLE_HI16D:
6576 case BFD_RELOC_PPC64_ADDR16_HIGH:
6578 fieldval = PPC_HI (value);
6579 goto sign_extend_16;
6581 case BFD_RELOC_HI16_S:
6582 case BFD_RELOC_HI16_S_PCREL:
6583 case BFD_RELOC_PPC_REL16DX_HA:
6585 if (REPORT_OVERFLOW_HI && ppc_obj64)
6587 fieldval = (value + 0x8000) >> 16;
6588 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6590 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6591 fieldval = ((valueT) fieldval ^ sign) - sign;
6597 case BFD_RELOC_PPC_VLE_HA16A:
6598 case BFD_RELOC_PPC_VLE_HA16D:
6599 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6601 fieldval = PPC_HA (value);
6602 goto sign_extend_16;
6605 case BFD_RELOC_PPC64_HIGHER:
6606 fieldval = PPC_HIGHER (value);
6607 goto sign_extend_16;
6609 case BFD_RELOC_PPC64_HIGHER_S:
6610 fieldval = PPC_HIGHERA (value);
6611 goto sign_extend_16;
6613 case BFD_RELOC_PPC64_HIGHEST:
6614 fieldval = PPC_HIGHEST (value);
6615 goto sign_extend_16;
6617 case BFD_RELOC_PPC64_HIGHEST_S:
6618 fieldval = PPC_HIGHESTA (value);
6619 goto sign_extend_16;
6626 if (operand != NULL)
6628 /* Handle relocs in an insn. */
6629 switch (fixP->fx_r_type)
6632 /* The following relocs can't be calculated by the assembler.
6633 Leave the field zero. */
6634 case BFD_RELOC_PPC_TPREL16:
6635 case BFD_RELOC_PPC_TPREL16_LO:
6636 case BFD_RELOC_PPC_TPREL16_HI:
6637 case BFD_RELOC_PPC_TPREL16_HA:
6638 case BFD_RELOC_PPC_DTPREL16:
6639 case BFD_RELOC_PPC_DTPREL16_LO:
6640 case BFD_RELOC_PPC_DTPREL16_HI:
6641 case BFD_RELOC_PPC_DTPREL16_HA:
6642 case BFD_RELOC_PPC_GOT_TLSGD16:
6643 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6644 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6645 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6646 case BFD_RELOC_PPC_GOT_TLSLD16:
6647 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6648 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6649 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6650 case BFD_RELOC_PPC_GOT_TPREL16:
6651 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6652 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6653 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6654 case BFD_RELOC_PPC_GOT_DTPREL16:
6655 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6656 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6657 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6658 case BFD_RELOC_PPC64_TPREL16_DS:
6659 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6660 case BFD_RELOC_PPC64_TPREL16_HIGH:
6661 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6662 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6663 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6664 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6665 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6666 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6667 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6668 case BFD_RELOC_PPC64_DTPREL16_DS:
6669 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6670 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6671 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6672 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6673 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6674 gas_assert (fixP->fx_addsy != NULL);
6675 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6679 /* These also should leave the field zero for the same
6680 reason. Note that older versions of gas wrote values
6681 here. If we want to go back to the old behaviour, then
6682 all _LO and _LO_DS cases will need to be treated like
6683 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6684 case BFD_RELOC_16_GOTOFF:
6685 case BFD_RELOC_LO16_GOTOFF:
6686 case BFD_RELOC_HI16_GOTOFF:
6687 case BFD_RELOC_HI16_S_GOTOFF:
6688 case BFD_RELOC_LO16_PLTOFF:
6689 case BFD_RELOC_HI16_PLTOFF:
6690 case BFD_RELOC_HI16_S_PLTOFF:
6691 case BFD_RELOC_GPREL16:
6692 case BFD_RELOC_16_BASEREL:
6693 case BFD_RELOC_LO16_BASEREL:
6694 case BFD_RELOC_HI16_BASEREL:
6695 case BFD_RELOC_HI16_S_BASEREL:
6696 case BFD_RELOC_PPC_TOC16:
6697 case BFD_RELOC_PPC64_TOC16_LO:
6698 case BFD_RELOC_PPC64_TOC16_HI:
6699 case BFD_RELOC_PPC64_TOC16_HA:
6700 case BFD_RELOC_PPC64_PLTGOT16:
6701 case BFD_RELOC_PPC64_PLTGOT16_LO:
6702 case BFD_RELOC_PPC64_PLTGOT16_HI:
6703 case BFD_RELOC_PPC64_PLTGOT16_HA:
6704 case BFD_RELOC_PPC64_GOT16_DS:
6705 case BFD_RELOC_PPC64_GOT16_LO_DS:
6706 case BFD_RELOC_PPC64_PLT16_LO_DS:
6707 case BFD_RELOC_PPC64_SECTOFF_DS:
6708 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6709 case BFD_RELOC_PPC64_TOC16_DS:
6710 case BFD_RELOC_PPC64_TOC16_LO_DS:
6711 case BFD_RELOC_PPC64_PLTGOT16_DS:
6712 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6713 case BFD_RELOC_PPC_EMB_NADDR16:
6714 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6715 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6716 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6717 case BFD_RELOC_PPC_EMB_SDAI16:
6718 case BFD_RELOC_PPC_EMB_SDA2I16:
6719 case BFD_RELOC_PPC_EMB_SDA2REL:
6720 case BFD_RELOC_PPC_EMB_SDA21:
6721 case BFD_RELOC_PPC_EMB_MRKREF:
6722 case BFD_RELOC_PPC_EMB_RELSEC16:
6723 case BFD_RELOC_PPC_EMB_RELST_LO:
6724 case BFD_RELOC_PPC_EMB_RELST_HI:
6725 case BFD_RELOC_PPC_EMB_RELST_HA:
6726 case BFD_RELOC_PPC_EMB_BIT_FLD:
6727 case BFD_RELOC_PPC_EMB_RELSDA:
6728 case BFD_RELOC_PPC_VLE_SDA21:
6729 case BFD_RELOC_PPC_VLE_SDA21_LO:
6730 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6731 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6732 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6733 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6734 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6735 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6736 gas_assert (fixP->fx_addsy != NULL);
6739 case BFD_RELOC_PPC_TLS:
6740 case BFD_RELOC_PPC_TLSGD:
6741 case BFD_RELOC_PPC_TLSLD:
6747 case BFD_RELOC_PPC_B16:
6748 /* Adjust the offset to the instruction boundary. */
6753 case BFD_RELOC_VTABLE_INHERIT:
6754 case BFD_RELOC_VTABLE_ENTRY:
6755 case BFD_RELOC_PPC_DTPMOD:
6756 case BFD_RELOC_PPC_TPREL:
6757 case BFD_RELOC_PPC_DTPREL:
6758 case BFD_RELOC_PPC_COPY:
6759 case BFD_RELOC_PPC_GLOB_DAT:
6760 case BFD_RELOC_32_PLT_PCREL:
6761 case BFD_RELOC_PPC_EMB_NADDR32:
6762 case BFD_RELOC_PPC64_TOC:
6763 case BFD_RELOC_CTOR:
6765 case BFD_RELOC_32_PCREL:
6768 case BFD_RELOC_64_PCREL:
6769 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6770 as_bad_where (fixP->fx_file, fixP->fx_line,
6771 _("%s unsupported as instruction fixup"),
6772 bfd_get_reloc_code_name (fixP->fx_r_type));
6781 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6782 contents can stay at zero. */
6783 #define APPLY_RELOC fixP->fx_done
6785 #define APPLY_RELOC 1
6787 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6790 unsigned char *where;
6792 /* Fetch the instruction, insert the fully resolved operand
6793 value, and stuff the instruction back again. */
6794 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6795 if (target_big_endian)
6797 if (fixP->fx_size == 4)
6798 insn = bfd_getb32 (where);
6800 insn = bfd_getb16 (where);
6804 if (fixP->fx_size == 4)
6805 insn = bfd_getl32 (where);
6807 insn = bfd_getl16 (where);
6809 insn = ppc_insert_operand (insn, operand, fieldval,
6810 fixP->tc_fix_data.ppc_cpu,
6811 fixP->fx_file, fixP->fx_line);
6812 if (target_big_endian)
6814 if (fixP->fx_size == 4)
6815 bfd_putb32 (insn, where);
6817 bfd_putb16 (insn, where);
6821 if (fixP->fx_size == 4)
6822 bfd_putl32 (insn, where);
6824 bfd_putl16 (insn, where);
6829 /* Nothing else to do here. */
6832 gas_assert (fixP->fx_addsy != NULL);
6833 if (fixP->fx_r_type == BFD_RELOC_NONE)
6838 /* Use expr_symbol_where to see if this is an expression
6840 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
6841 as_bad_where (fixP->fx_file, fixP->fx_line,
6842 _("unresolved expression that must be resolved"));
6844 as_bad_where (fixP->fx_file, fixP->fx_line,
6845 _("unsupported relocation against %s"),
6846 S_GET_NAME (fixP->fx_addsy));
6853 /* Handle relocs in data. */
6854 switch (fixP->fx_r_type)
6856 case BFD_RELOC_VTABLE_INHERIT:
6858 && !S_IS_DEFINED (fixP->fx_addsy)
6859 && !S_IS_WEAK (fixP->fx_addsy))
6860 S_SET_WEAK (fixP->fx_addsy);
6863 case BFD_RELOC_VTABLE_ENTRY:
6868 /* These can appear with @l etc. in data. */
6869 case BFD_RELOC_LO16:
6870 case BFD_RELOC_LO16_PCREL:
6871 case BFD_RELOC_HI16:
6872 case BFD_RELOC_HI16_PCREL:
6873 case BFD_RELOC_HI16_S:
6874 case BFD_RELOC_HI16_S_PCREL:
6875 case BFD_RELOC_PPC64_HIGHER:
6876 case BFD_RELOC_PPC64_HIGHER_S:
6877 case BFD_RELOC_PPC64_HIGHEST:
6878 case BFD_RELOC_PPC64_HIGHEST_S:
6879 case BFD_RELOC_PPC64_ADDR16_HIGH:
6880 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6881 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6884 case BFD_RELOC_PPC_DTPMOD:
6885 case BFD_RELOC_PPC_TPREL:
6886 case BFD_RELOC_PPC_DTPREL:
6887 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6890 /* Just punt all of these to the linker. */
6891 case BFD_RELOC_PPC_B16_BRTAKEN:
6892 case BFD_RELOC_PPC_B16_BRNTAKEN:
6893 case BFD_RELOC_16_GOTOFF:
6894 case BFD_RELOC_LO16_GOTOFF:
6895 case BFD_RELOC_HI16_GOTOFF:
6896 case BFD_RELOC_HI16_S_GOTOFF:
6897 case BFD_RELOC_LO16_PLTOFF:
6898 case BFD_RELOC_HI16_PLTOFF:
6899 case BFD_RELOC_HI16_S_PLTOFF:
6900 case BFD_RELOC_PPC_COPY:
6901 case BFD_RELOC_PPC_GLOB_DAT:
6902 case BFD_RELOC_16_BASEREL:
6903 case BFD_RELOC_LO16_BASEREL:
6904 case BFD_RELOC_HI16_BASEREL:
6905 case BFD_RELOC_HI16_S_BASEREL:
6906 case BFD_RELOC_PPC_TLS:
6907 case BFD_RELOC_PPC_DTPREL16_LO:
6908 case BFD_RELOC_PPC_DTPREL16_HI:
6909 case BFD_RELOC_PPC_DTPREL16_HA:
6910 case BFD_RELOC_PPC_TPREL16_LO:
6911 case BFD_RELOC_PPC_TPREL16_HI:
6912 case BFD_RELOC_PPC_TPREL16_HA:
6913 case BFD_RELOC_PPC_GOT_TLSGD16:
6914 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6915 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6916 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6917 case BFD_RELOC_PPC_GOT_TLSLD16:
6918 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6919 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6920 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6921 case BFD_RELOC_PPC_GOT_DTPREL16:
6922 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6923 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6924 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6925 case BFD_RELOC_PPC_GOT_TPREL16:
6926 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6927 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6928 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6929 case BFD_RELOC_24_PLT_PCREL:
6930 case BFD_RELOC_PPC_LOCAL24PC:
6931 case BFD_RELOC_32_PLT_PCREL:
6932 case BFD_RELOC_GPREL16:
6933 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6934 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6935 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6936 case BFD_RELOC_PPC_EMB_NADDR32:
6937 case BFD_RELOC_PPC_EMB_NADDR16:
6938 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6939 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6940 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6941 case BFD_RELOC_PPC_EMB_SDAI16:
6942 case BFD_RELOC_PPC_EMB_SDA2REL:
6943 case BFD_RELOC_PPC_EMB_SDA2I16:
6944 case BFD_RELOC_PPC_EMB_SDA21:
6945 case BFD_RELOC_PPC_VLE_SDA21_LO:
6946 case BFD_RELOC_PPC_EMB_MRKREF:
6947 case BFD_RELOC_PPC_EMB_RELSEC16:
6948 case BFD_RELOC_PPC_EMB_RELST_LO:
6949 case BFD_RELOC_PPC_EMB_RELST_HI:
6950 case BFD_RELOC_PPC_EMB_RELST_HA:
6951 case BFD_RELOC_PPC_EMB_BIT_FLD:
6952 case BFD_RELOC_PPC_EMB_RELSDA:
6953 case BFD_RELOC_PPC64_TOC:
6954 case BFD_RELOC_PPC_TOC16:
6955 case BFD_RELOC_PPC64_TOC16_LO:
6956 case BFD_RELOC_PPC64_TOC16_HI:
6957 case BFD_RELOC_PPC64_TOC16_HA:
6958 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6959 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6960 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6961 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6962 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6963 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6964 case BFD_RELOC_PPC64_TPREL16_HIGH:
6965 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6966 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6967 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6968 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6969 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6975 case BFD_RELOC_NONE:
6977 case BFD_RELOC_CTOR:
6979 case BFD_RELOC_32_PCREL:
6982 case BFD_RELOC_64_PCREL:
6984 case BFD_RELOC_16_PCREL:
6990 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
6995 if (fixP->fx_size && APPLY_RELOC)
6996 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
6997 fieldval, fixP->fx_size);
6999 && (seg->flags & SEC_CODE) != 0
7000 && fixP->fx_size == 4
7003 && (fixP->fx_r_type == BFD_RELOC_32
7004 || fixP->fx_r_type == BFD_RELOC_CTOR
7005 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7006 as_warn_where (fixP->fx_file, fixP->fx_line,
7007 _("data in executable section"));
7010 /* We are only able to convert some relocs to pc-relative. */
7011 if (!fixP->fx_done && fixP->fx_pcrel)
7013 switch (fixP->fx_r_type)
7015 case BFD_RELOC_LO16:
7016 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
7019 case BFD_RELOC_HI16:
7020 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
7023 case BFD_RELOC_HI16_S:
7024 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
7028 fixP->fx_r_type = BFD_RELOC_64_PCREL;
7032 fixP->fx_r_type = BFD_RELOC_32_PCREL;
7036 fixP->fx_r_type = BFD_RELOC_16_PCREL;
7039 /* Some of course are already pc-relative. */
7040 case BFD_RELOC_LO16_PCREL:
7041 case BFD_RELOC_HI16_PCREL:
7042 case BFD_RELOC_HI16_S_PCREL:
7043 case BFD_RELOC_PPC_REL16DX_HA:
7044 case BFD_RELOC_64_PCREL:
7045 case BFD_RELOC_32_PCREL:
7046 case BFD_RELOC_16_PCREL:
7047 case BFD_RELOC_PPC_B16:
7048 case BFD_RELOC_PPC_B16_BRTAKEN:
7049 case BFD_RELOC_PPC_B16_BRNTAKEN:
7050 case BFD_RELOC_PPC_B26:
7051 case BFD_RELOC_PPC_LOCAL24PC:
7052 case BFD_RELOC_24_PLT_PCREL:
7053 case BFD_RELOC_32_PLT_PCREL:
7054 case BFD_RELOC_64_PLT_PCREL:
7055 case BFD_RELOC_PPC_VLE_REL8:
7056 case BFD_RELOC_PPC_VLE_REL15:
7057 case BFD_RELOC_PPC_VLE_REL24:
7066 /* Use expr_symbol_where to see if this is an
7067 expression symbol. */
7068 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7069 as_bad_where (fixP->fx_file, fixP->fx_line,
7070 _("unresolved expression that must"
7073 as_bad_where (fixP->fx_file, fixP->fx_line,
7074 _("cannot emit PC relative %s relocation"
7076 bfd_get_reloc_code_name (fixP->fx_r_type),
7077 S_GET_NAME (fixP->fx_addsy));
7080 as_bad_where (fixP->fx_file, fixP->fx_line,
7081 _("unable to resolve expression"));
7088 ppc_elf_validate_fix (fixP, seg);
7089 fixP->fx_addnumber = value;
7091 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7092 from the section contents. If we are going to be emitting a reloc
7093 then the section contents are immaterial, so don't warn if they
7094 happen to overflow. Leave such warnings to ld. */
7097 fixP->fx_no_overflow = 1;
7099 /* Arrange to emit .TOC. as a normal symbol if used in anything
7100 but .TOC.@tocbase. */
7102 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7103 && fixP->fx_addsy != NULL
7104 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7105 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7108 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7109 fixP->fx_addnumber = 0;
7113 fixP->fx_addnumber = 0;
7115 /* We want to use the offset within the toc, not the actual VMA
7117 fixP->fx_addnumber =
7118 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7119 - S_GET_VALUE (ppc_toc_csect);
7120 /* Set *valP to avoid errors. */
7127 /* Generate a reloc for a fixup. */
7130 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7134 reloc = XNEW (arelent);
7136 reloc->sym_ptr_ptr = XNEW (asymbol *);
7137 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7138 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7139 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7140 if (reloc->howto == (reloc_howto_type *) NULL)
7142 as_bad_where (fixp->fx_file, fixp->fx_line,
7143 _("reloc %d not supported by object file format"),
7144 (int) fixp->fx_r_type);
7147 reloc->addend = fixp->fx_addnumber;
7153 ppc_cfi_frame_initial_instructions (void)
7155 cfi_add_CFA_def_cfa (1, 0);
7159 tc_ppc_regname_to_dw2regnum (char *regname)
7161 unsigned int regnum = -1;
7165 static struct { const char *name; int dw2regnum; } regnames[] =
7167 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7168 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7169 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7170 { "spe_acc", 111 }, { "spefscr", 112 }
7173 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7174 if (strcmp (regnames[i].name, regname) == 0)
7175 return regnames[i].dw2regnum;
7177 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7179 p = regname + 1 + (regname[1] == '.');
7180 regnum = strtoul (p, &q, 10);
7181 if (p == q || *q || regnum >= 32)
7183 if (regname[0] == 'f')
7185 else if (regname[0] == 'v')
7188 else if (regname[0] == 'c' && regname[1] == 'r')
7190 p = regname + 2 + (regname[2] == '.');
7191 if (p[0] < '0' || p[0] > '7' || p[1])
7193 regnum = p[0] - '0' + 68;