1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2017 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars[] = "#!";
162 static const char ppc_eabi_comment_chars[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars = ppc_solaris_comment_chars;
167 const char *ppc_comment_chars = ppc_eabi_comment_chars;
170 const char comment_chars[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit = 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu = 0;
205 ppc_cpu_t sticky = 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion = 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
218 /* Warn on emitting data to code sections. */
220 unsigned long last_insn;
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
241 { "bi", ppc_biei, 0 },
243 { "csect", ppc_csect, 0 },
244 { "dwsect", ppc_dwsect, 0 },
245 { "data", ppc_section, 'd' },
249 { "ei", ppc_biei, 1 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
254 { "ref", ppc_ref, 0 },
255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
261 { "llong", ppc_xcoff_cons, 3 },
262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
268 { "llong", cons, 8 },
269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
272 { "localentry", ppc_elf_localentry, 0 },
273 { "abiversion", ppc_elf_abiversion, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value;
311 unsigned short flags;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG },
351 { "cr.1", 1, PPC_OPERAND_CR_REG },
352 { "cr.2", 2, PPC_OPERAND_CR_REG },
353 { "cr.3", 3, PPC_OPERAND_CR_REG },
354 { "cr.4", 4, PPC_OPERAND_CR_REG },
355 { "cr.5", 5, PPC_OPERAND_CR_REG },
356 { "cr.6", 6, PPC_OPERAND_CR_REG },
357 { "cr.7", 7, PPC_OPERAND_CR_REG },
359 { "cr0", 0, PPC_OPERAND_CR_REG },
360 { "cr1", 1, PPC_OPERAND_CR_REG },
361 { "cr2", 2, PPC_OPERAND_CR_REG },
362 { "cr3", 3, PPC_OPERAND_CR_REG },
363 { "cr4", 4, PPC_OPERAND_CR_REG },
364 { "cr5", 5, PPC_OPERAND_CR_REG },
365 { "cr6", 6, PPC_OPERAND_CR_REG },
366 { "cr7", 7, PPC_OPERAND_CR_REG },
368 { "ctr", 9, PPC_OPERAND_SPR },
369 { "dar", 19, PPC_OPERAND_SPR },
370 { "dec", 22, PPC_OPERAND_SPR },
371 { "dsisr", 18, PPC_OPERAND_SPR },
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR },
375 { "f.1", 1, PPC_OPERAND_FPR },
376 { "f.10", 10, PPC_OPERAND_FPR },
377 { "f.11", 11, PPC_OPERAND_FPR },
378 { "f.12", 12, PPC_OPERAND_FPR },
379 { "f.13", 13, PPC_OPERAND_FPR },
380 { "f.14", 14, PPC_OPERAND_FPR },
381 { "f.15", 15, PPC_OPERAND_FPR },
382 { "f.16", 16, PPC_OPERAND_FPR },
383 { "f.17", 17, PPC_OPERAND_FPR },
384 { "f.18", 18, PPC_OPERAND_FPR },
385 { "f.19", 19, PPC_OPERAND_FPR },
386 { "f.2", 2, PPC_OPERAND_FPR },
387 { "f.20", 20, PPC_OPERAND_FPR },
388 { "f.21", 21, PPC_OPERAND_FPR },
389 { "f.22", 22, PPC_OPERAND_FPR },
390 { "f.23", 23, PPC_OPERAND_FPR },
391 { "f.24", 24, PPC_OPERAND_FPR },
392 { "f.25", 25, PPC_OPERAND_FPR },
393 { "f.26", 26, PPC_OPERAND_FPR },
394 { "f.27", 27, PPC_OPERAND_FPR },
395 { "f.28", 28, PPC_OPERAND_FPR },
396 { "f.29", 29, PPC_OPERAND_FPR },
397 { "f.3", 3, PPC_OPERAND_FPR },
398 { "f.30", 30, PPC_OPERAND_FPR },
399 { "f.31", 31, PPC_OPERAND_FPR },
400 { "f.32", 32, PPC_OPERAND_VSR },
401 { "f.33", 33, PPC_OPERAND_VSR },
402 { "f.34", 34, PPC_OPERAND_VSR },
403 { "f.35", 35, PPC_OPERAND_VSR },
404 { "f.36", 36, PPC_OPERAND_VSR },
405 { "f.37", 37, PPC_OPERAND_VSR },
406 { "f.38", 38, PPC_OPERAND_VSR },
407 { "f.39", 39, PPC_OPERAND_VSR },
408 { "f.4", 4, PPC_OPERAND_FPR },
409 { "f.40", 40, PPC_OPERAND_VSR },
410 { "f.41", 41, PPC_OPERAND_VSR },
411 { "f.42", 42, PPC_OPERAND_VSR },
412 { "f.43", 43, PPC_OPERAND_VSR },
413 { "f.44", 44, PPC_OPERAND_VSR },
414 { "f.45", 45, PPC_OPERAND_VSR },
415 { "f.46", 46, PPC_OPERAND_VSR },
416 { "f.47", 47, PPC_OPERAND_VSR },
417 { "f.48", 48, PPC_OPERAND_VSR },
418 { "f.49", 49, PPC_OPERAND_VSR },
419 { "f.5", 5, PPC_OPERAND_FPR },
420 { "f.50", 50, PPC_OPERAND_VSR },
421 { "f.51", 51, PPC_OPERAND_VSR },
422 { "f.52", 52, PPC_OPERAND_VSR },
423 { "f.53", 53, PPC_OPERAND_VSR },
424 { "f.54", 54, PPC_OPERAND_VSR },
425 { "f.55", 55, PPC_OPERAND_VSR },
426 { "f.56", 56, PPC_OPERAND_VSR },
427 { "f.57", 57, PPC_OPERAND_VSR },
428 { "f.58", 58, PPC_OPERAND_VSR },
429 { "f.59", 59, PPC_OPERAND_VSR },
430 { "f.6", 6, PPC_OPERAND_FPR },
431 { "f.60", 60, PPC_OPERAND_VSR },
432 { "f.61", 61, PPC_OPERAND_VSR },
433 { "f.62", 62, PPC_OPERAND_VSR },
434 { "f.63", 63, PPC_OPERAND_VSR },
435 { "f.7", 7, PPC_OPERAND_FPR },
436 { "f.8", 8, PPC_OPERAND_FPR },
437 { "f.9", 9, PPC_OPERAND_FPR },
439 { "f0", 0, PPC_OPERAND_FPR },
440 { "f1", 1, PPC_OPERAND_FPR },
441 { "f10", 10, PPC_OPERAND_FPR },
442 { "f11", 11, PPC_OPERAND_FPR },
443 { "f12", 12, PPC_OPERAND_FPR },
444 { "f13", 13, PPC_OPERAND_FPR },
445 { "f14", 14, PPC_OPERAND_FPR },
446 { "f15", 15, PPC_OPERAND_FPR },
447 { "f16", 16, PPC_OPERAND_FPR },
448 { "f17", 17, PPC_OPERAND_FPR },
449 { "f18", 18, PPC_OPERAND_FPR },
450 { "f19", 19, PPC_OPERAND_FPR },
451 { "f2", 2, PPC_OPERAND_FPR },
452 { "f20", 20, PPC_OPERAND_FPR },
453 { "f21", 21, PPC_OPERAND_FPR },
454 { "f22", 22, PPC_OPERAND_FPR },
455 { "f23", 23, PPC_OPERAND_FPR },
456 { "f24", 24, PPC_OPERAND_FPR },
457 { "f25", 25, PPC_OPERAND_FPR },
458 { "f26", 26, PPC_OPERAND_FPR },
459 { "f27", 27, PPC_OPERAND_FPR },
460 { "f28", 28, PPC_OPERAND_FPR },
461 { "f29", 29, PPC_OPERAND_FPR },
462 { "f3", 3, PPC_OPERAND_FPR },
463 { "f30", 30, PPC_OPERAND_FPR },
464 { "f31", 31, PPC_OPERAND_FPR },
465 { "f32", 32, PPC_OPERAND_VSR },
466 { "f33", 33, PPC_OPERAND_VSR },
467 { "f34", 34, PPC_OPERAND_VSR },
468 { "f35", 35, PPC_OPERAND_VSR },
469 { "f36", 36, PPC_OPERAND_VSR },
470 { "f37", 37, PPC_OPERAND_VSR },
471 { "f38", 38, PPC_OPERAND_VSR },
472 { "f39", 39, PPC_OPERAND_VSR },
473 { "f4", 4, PPC_OPERAND_FPR },
474 { "f40", 40, PPC_OPERAND_VSR },
475 { "f41", 41, PPC_OPERAND_VSR },
476 { "f42", 42, PPC_OPERAND_VSR },
477 { "f43", 43, PPC_OPERAND_VSR },
478 { "f44", 44, PPC_OPERAND_VSR },
479 { "f45", 45, PPC_OPERAND_VSR },
480 { "f46", 46, PPC_OPERAND_VSR },
481 { "f47", 47, PPC_OPERAND_VSR },
482 { "f48", 48, PPC_OPERAND_VSR },
483 { "f49", 49, PPC_OPERAND_VSR },
484 { "f5", 5, PPC_OPERAND_FPR },
485 { "f50", 50, PPC_OPERAND_VSR },
486 { "f51", 51, PPC_OPERAND_VSR },
487 { "f52", 52, PPC_OPERAND_VSR },
488 { "f53", 53, PPC_OPERAND_VSR },
489 { "f54", 54, PPC_OPERAND_VSR },
490 { "f55", 55, PPC_OPERAND_VSR },
491 { "f56", 56, PPC_OPERAND_VSR },
492 { "f57", 57, PPC_OPERAND_VSR },
493 { "f58", 58, PPC_OPERAND_VSR },
494 { "f59", 59, PPC_OPERAND_VSR },
495 { "f6", 6, PPC_OPERAND_FPR },
496 { "f60", 60, PPC_OPERAND_VSR },
497 { "f61", 61, PPC_OPERAND_VSR },
498 { "f62", 62, PPC_OPERAND_VSR },
499 { "f63", 63, PPC_OPERAND_VSR },
500 { "f7", 7, PPC_OPERAND_FPR },
501 { "f8", 8, PPC_OPERAND_FPR },
502 { "f9", 9, PPC_OPERAND_FPR },
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR },
506 { "gqr.1", 1, PPC_OPERAND_GQR },
507 { "gqr.2", 2, PPC_OPERAND_GQR },
508 { "gqr.3", 3, PPC_OPERAND_GQR },
509 { "gqr.4", 4, PPC_OPERAND_GQR },
510 { "gqr.5", 5, PPC_OPERAND_GQR },
511 { "gqr.6", 6, PPC_OPERAND_GQR },
512 { "gqr.7", 7, PPC_OPERAND_GQR },
513 { "gqr0", 0, PPC_OPERAND_GQR },
514 { "gqr1", 1, PPC_OPERAND_GQR },
515 { "gqr2", 2, PPC_OPERAND_GQR },
516 { "gqr3", 3, PPC_OPERAND_GQR },
517 { "gqr4", 4, PPC_OPERAND_GQR },
518 { "gqr5", 5, PPC_OPERAND_GQR },
519 { "gqr6", 6, PPC_OPERAND_GQR },
520 { "gqr7", 7, PPC_OPERAND_GQR },
522 { "lr", 8, PPC_OPERAND_SPR },
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR },
526 { "r.1", 1, PPC_OPERAND_GPR },
527 { "r.10", 10, PPC_OPERAND_GPR },
528 { "r.11", 11, PPC_OPERAND_GPR },
529 { "r.12", 12, PPC_OPERAND_GPR },
530 { "r.13", 13, PPC_OPERAND_GPR },
531 { "r.14", 14, PPC_OPERAND_GPR },
532 { "r.15", 15, PPC_OPERAND_GPR },
533 { "r.16", 16, PPC_OPERAND_GPR },
534 { "r.17", 17, PPC_OPERAND_GPR },
535 { "r.18", 18, PPC_OPERAND_GPR },
536 { "r.19", 19, PPC_OPERAND_GPR },
537 { "r.2", 2, PPC_OPERAND_GPR },
538 { "r.20", 20, PPC_OPERAND_GPR },
539 { "r.21", 21, PPC_OPERAND_GPR },
540 { "r.22", 22, PPC_OPERAND_GPR },
541 { "r.23", 23, PPC_OPERAND_GPR },
542 { "r.24", 24, PPC_OPERAND_GPR },
543 { "r.25", 25, PPC_OPERAND_GPR },
544 { "r.26", 26, PPC_OPERAND_GPR },
545 { "r.27", 27, PPC_OPERAND_GPR },
546 { "r.28", 28, PPC_OPERAND_GPR },
547 { "r.29", 29, PPC_OPERAND_GPR },
548 { "r.3", 3, PPC_OPERAND_GPR },
549 { "r.30", 30, PPC_OPERAND_GPR },
550 { "r.31", 31, PPC_OPERAND_GPR },
551 { "r.4", 4, PPC_OPERAND_GPR },
552 { "r.5", 5, PPC_OPERAND_GPR },
553 { "r.6", 6, PPC_OPERAND_GPR },
554 { "r.7", 7, PPC_OPERAND_GPR },
555 { "r.8", 8, PPC_OPERAND_GPR },
556 { "r.9", 9, PPC_OPERAND_GPR },
558 { "r.sp", 1, PPC_OPERAND_GPR },
560 { "r.toc", 2, PPC_OPERAND_GPR },
562 { "r0", 0, PPC_OPERAND_GPR },
563 { "r1", 1, PPC_OPERAND_GPR },
564 { "r10", 10, PPC_OPERAND_GPR },
565 { "r11", 11, PPC_OPERAND_GPR },
566 { "r12", 12, PPC_OPERAND_GPR },
567 { "r13", 13, PPC_OPERAND_GPR },
568 { "r14", 14, PPC_OPERAND_GPR },
569 { "r15", 15, PPC_OPERAND_GPR },
570 { "r16", 16, PPC_OPERAND_GPR },
571 { "r17", 17, PPC_OPERAND_GPR },
572 { "r18", 18, PPC_OPERAND_GPR },
573 { "r19", 19, PPC_OPERAND_GPR },
574 { "r2", 2, PPC_OPERAND_GPR },
575 { "r20", 20, PPC_OPERAND_GPR },
576 { "r21", 21, PPC_OPERAND_GPR },
577 { "r22", 22, PPC_OPERAND_GPR },
578 { "r23", 23, PPC_OPERAND_GPR },
579 { "r24", 24, PPC_OPERAND_GPR },
580 { "r25", 25, PPC_OPERAND_GPR },
581 { "r26", 26, PPC_OPERAND_GPR },
582 { "r27", 27, PPC_OPERAND_GPR },
583 { "r28", 28, PPC_OPERAND_GPR },
584 { "r29", 29, PPC_OPERAND_GPR },
585 { "r3", 3, PPC_OPERAND_GPR },
586 { "r30", 30, PPC_OPERAND_GPR },
587 { "r31", 31, PPC_OPERAND_GPR },
588 { "r4", 4, PPC_OPERAND_GPR },
589 { "r5", 5, PPC_OPERAND_GPR },
590 { "r6", 6, PPC_OPERAND_GPR },
591 { "r7", 7, PPC_OPERAND_GPR },
592 { "r8", 8, PPC_OPERAND_GPR },
593 { "r9", 9, PPC_OPERAND_GPR },
595 { "rtoc", 2, PPC_OPERAND_GPR },
597 { "sdr1", 25, PPC_OPERAND_SPR },
599 { "sp", 1, PPC_OPERAND_GPR },
601 { "srr0", 26, PPC_OPERAND_SPR },
602 { "srr1", 27, PPC_OPERAND_SPR },
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR },
606 { "v.1", 1, PPC_OPERAND_VR },
607 { "v.10", 10, PPC_OPERAND_VR },
608 { "v.11", 11, PPC_OPERAND_VR },
609 { "v.12", 12, PPC_OPERAND_VR },
610 { "v.13", 13, PPC_OPERAND_VR },
611 { "v.14", 14, PPC_OPERAND_VR },
612 { "v.15", 15, PPC_OPERAND_VR },
613 { "v.16", 16, PPC_OPERAND_VR },
614 { "v.17", 17, PPC_OPERAND_VR },
615 { "v.18", 18, PPC_OPERAND_VR },
616 { "v.19", 19, PPC_OPERAND_VR },
617 { "v.2", 2, PPC_OPERAND_VR },
618 { "v.20", 20, PPC_OPERAND_VR },
619 { "v.21", 21, PPC_OPERAND_VR },
620 { "v.22", 22, PPC_OPERAND_VR },
621 { "v.23", 23, PPC_OPERAND_VR },
622 { "v.24", 24, PPC_OPERAND_VR },
623 { "v.25", 25, PPC_OPERAND_VR },
624 { "v.26", 26, PPC_OPERAND_VR },
625 { "v.27", 27, PPC_OPERAND_VR },
626 { "v.28", 28, PPC_OPERAND_VR },
627 { "v.29", 29, PPC_OPERAND_VR },
628 { "v.3", 3, PPC_OPERAND_VR },
629 { "v.30", 30, PPC_OPERAND_VR },
630 { "v.31", 31, PPC_OPERAND_VR },
631 { "v.4", 4, PPC_OPERAND_VR },
632 { "v.5", 5, PPC_OPERAND_VR },
633 { "v.6", 6, PPC_OPERAND_VR },
634 { "v.7", 7, PPC_OPERAND_VR },
635 { "v.8", 8, PPC_OPERAND_VR },
636 { "v.9", 9, PPC_OPERAND_VR },
638 { "v0", 0, PPC_OPERAND_VR },
639 { "v1", 1, PPC_OPERAND_VR },
640 { "v10", 10, PPC_OPERAND_VR },
641 { "v11", 11, PPC_OPERAND_VR },
642 { "v12", 12, PPC_OPERAND_VR },
643 { "v13", 13, PPC_OPERAND_VR },
644 { "v14", 14, PPC_OPERAND_VR },
645 { "v15", 15, PPC_OPERAND_VR },
646 { "v16", 16, PPC_OPERAND_VR },
647 { "v17", 17, PPC_OPERAND_VR },
648 { "v18", 18, PPC_OPERAND_VR },
649 { "v19", 19, PPC_OPERAND_VR },
650 { "v2", 2, PPC_OPERAND_VR },
651 { "v20", 20, PPC_OPERAND_VR },
652 { "v21", 21, PPC_OPERAND_VR },
653 { "v22", 22, PPC_OPERAND_VR },
654 { "v23", 23, PPC_OPERAND_VR },
655 { "v24", 24, PPC_OPERAND_VR },
656 { "v25", 25, PPC_OPERAND_VR },
657 { "v26", 26, PPC_OPERAND_VR },
658 { "v27", 27, PPC_OPERAND_VR },
659 { "v28", 28, PPC_OPERAND_VR },
660 { "v29", 29, PPC_OPERAND_VR },
661 { "v3", 3, PPC_OPERAND_VR },
662 { "v30", 30, PPC_OPERAND_VR },
663 { "v31", 31, PPC_OPERAND_VR },
664 { "v4", 4, PPC_OPERAND_VR },
665 { "v5", 5, PPC_OPERAND_VR },
666 { "v6", 6, PPC_OPERAND_VR },
667 { "v7", 7, PPC_OPERAND_VR },
668 { "v8", 8, PPC_OPERAND_VR },
669 { "v9", 9, PPC_OPERAND_VR },
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR },
673 { "vs.1", 1, PPC_OPERAND_VSR },
674 { "vs.10", 10, PPC_OPERAND_VSR },
675 { "vs.11", 11, PPC_OPERAND_VSR },
676 { "vs.12", 12, PPC_OPERAND_VSR },
677 { "vs.13", 13, PPC_OPERAND_VSR },
678 { "vs.14", 14, PPC_OPERAND_VSR },
679 { "vs.15", 15, PPC_OPERAND_VSR },
680 { "vs.16", 16, PPC_OPERAND_VSR },
681 { "vs.17", 17, PPC_OPERAND_VSR },
682 { "vs.18", 18, PPC_OPERAND_VSR },
683 { "vs.19", 19, PPC_OPERAND_VSR },
684 { "vs.2", 2, PPC_OPERAND_VSR },
685 { "vs.20", 20, PPC_OPERAND_VSR },
686 { "vs.21", 21, PPC_OPERAND_VSR },
687 { "vs.22", 22, PPC_OPERAND_VSR },
688 { "vs.23", 23, PPC_OPERAND_VSR },
689 { "vs.24", 24, PPC_OPERAND_VSR },
690 { "vs.25", 25, PPC_OPERAND_VSR },
691 { "vs.26", 26, PPC_OPERAND_VSR },
692 { "vs.27", 27, PPC_OPERAND_VSR },
693 { "vs.28", 28, PPC_OPERAND_VSR },
694 { "vs.29", 29, PPC_OPERAND_VSR },
695 { "vs.3", 3, PPC_OPERAND_VSR },
696 { "vs.30", 30, PPC_OPERAND_VSR },
697 { "vs.31", 31, PPC_OPERAND_VSR },
698 { "vs.32", 32, PPC_OPERAND_VSR },
699 { "vs.33", 33, PPC_OPERAND_VSR },
700 { "vs.34", 34, PPC_OPERAND_VSR },
701 { "vs.35", 35, PPC_OPERAND_VSR },
702 { "vs.36", 36, PPC_OPERAND_VSR },
703 { "vs.37", 37, PPC_OPERAND_VSR },
704 { "vs.38", 38, PPC_OPERAND_VSR },
705 { "vs.39", 39, PPC_OPERAND_VSR },
706 { "vs.4", 4, PPC_OPERAND_VSR },
707 { "vs.40", 40, PPC_OPERAND_VSR },
708 { "vs.41", 41, PPC_OPERAND_VSR },
709 { "vs.42", 42, PPC_OPERAND_VSR },
710 { "vs.43", 43, PPC_OPERAND_VSR },
711 { "vs.44", 44, PPC_OPERAND_VSR },
712 { "vs.45", 45, PPC_OPERAND_VSR },
713 { "vs.46", 46, PPC_OPERAND_VSR },
714 { "vs.47", 47, PPC_OPERAND_VSR },
715 { "vs.48", 48, PPC_OPERAND_VSR },
716 { "vs.49", 49, PPC_OPERAND_VSR },
717 { "vs.5", 5, PPC_OPERAND_VSR },
718 { "vs.50", 50, PPC_OPERAND_VSR },
719 { "vs.51", 51, PPC_OPERAND_VSR },
720 { "vs.52", 52, PPC_OPERAND_VSR },
721 { "vs.53", 53, PPC_OPERAND_VSR },
722 { "vs.54", 54, PPC_OPERAND_VSR },
723 { "vs.55", 55, PPC_OPERAND_VSR },
724 { "vs.56", 56, PPC_OPERAND_VSR },
725 { "vs.57", 57, PPC_OPERAND_VSR },
726 { "vs.58", 58, PPC_OPERAND_VSR },
727 { "vs.59", 59, PPC_OPERAND_VSR },
728 { "vs.6", 6, PPC_OPERAND_VSR },
729 { "vs.60", 60, PPC_OPERAND_VSR },
730 { "vs.61", 61, PPC_OPERAND_VSR },
731 { "vs.62", 62, PPC_OPERAND_VSR },
732 { "vs.63", 63, PPC_OPERAND_VSR },
733 { "vs.7", 7, PPC_OPERAND_VSR },
734 { "vs.8", 8, PPC_OPERAND_VSR },
735 { "vs.9", 9, PPC_OPERAND_VSR },
737 { "vs0", 0, PPC_OPERAND_VSR },
738 { "vs1", 1, PPC_OPERAND_VSR },
739 { "vs10", 10, PPC_OPERAND_VSR },
740 { "vs11", 11, PPC_OPERAND_VSR },
741 { "vs12", 12, PPC_OPERAND_VSR },
742 { "vs13", 13, PPC_OPERAND_VSR },
743 { "vs14", 14, PPC_OPERAND_VSR },
744 { "vs15", 15, PPC_OPERAND_VSR },
745 { "vs16", 16, PPC_OPERAND_VSR },
746 { "vs17", 17, PPC_OPERAND_VSR },
747 { "vs18", 18, PPC_OPERAND_VSR },
748 { "vs19", 19, PPC_OPERAND_VSR },
749 { "vs2", 2, PPC_OPERAND_VSR },
750 { "vs20", 20, PPC_OPERAND_VSR },
751 { "vs21", 21, PPC_OPERAND_VSR },
752 { "vs22", 22, PPC_OPERAND_VSR },
753 { "vs23", 23, PPC_OPERAND_VSR },
754 { "vs24", 24, PPC_OPERAND_VSR },
755 { "vs25", 25, PPC_OPERAND_VSR },
756 { "vs26", 26, PPC_OPERAND_VSR },
757 { "vs27", 27, PPC_OPERAND_VSR },
758 { "vs28", 28, PPC_OPERAND_VSR },
759 { "vs29", 29, PPC_OPERAND_VSR },
760 { "vs3", 3, PPC_OPERAND_VSR },
761 { "vs30", 30, PPC_OPERAND_VSR },
762 { "vs31", 31, PPC_OPERAND_VSR },
763 { "vs32", 32, PPC_OPERAND_VSR },
764 { "vs33", 33, PPC_OPERAND_VSR },
765 { "vs34", 34, PPC_OPERAND_VSR },
766 { "vs35", 35, PPC_OPERAND_VSR },
767 { "vs36", 36, PPC_OPERAND_VSR },
768 { "vs37", 37, PPC_OPERAND_VSR },
769 { "vs38", 38, PPC_OPERAND_VSR },
770 { "vs39", 39, PPC_OPERAND_VSR },
771 { "vs4", 4, PPC_OPERAND_VSR },
772 { "vs40", 40, PPC_OPERAND_VSR },
773 { "vs41", 41, PPC_OPERAND_VSR },
774 { "vs42", 42, PPC_OPERAND_VSR },
775 { "vs43", 43, PPC_OPERAND_VSR },
776 { "vs44", 44, PPC_OPERAND_VSR },
777 { "vs45", 45, PPC_OPERAND_VSR },
778 { "vs46", 46, PPC_OPERAND_VSR },
779 { "vs47", 47, PPC_OPERAND_VSR },
780 { "vs48", 48, PPC_OPERAND_VSR },
781 { "vs49", 49, PPC_OPERAND_VSR },
782 { "vs5", 5, PPC_OPERAND_VSR },
783 { "vs50", 50, PPC_OPERAND_VSR },
784 { "vs51", 51, PPC_OPERAND_VSR },
785 { "vs52", 52, PPC_OPERAND_VSR },
786 { "vs53", 53, PPC_OPERAND_VSR },
787 { "vs54", 54, PPC_OPERAND_VSR },
788 { "vs55", 55, PPC_OPERAND_VSR },
789 { "vs56", 56, PPC_OPERAND_VSR },
790 { "vs57", 57, PPC_OPERAND_VSR },
791 { "vs58", 58, PPC_OPERAND_VSR },
792 { "vs59", 59, PPC_OPERAND_VSR },
793 { "vs6", 6, PPC_OPERAND_VSR },
794 { "vs60", 60, PPC_OPERAND_VSR },
795 { "vs61", 61, PPC_OPERAND_VSR },
796 { "vs62", 62, PPC_OPERAND_VSR },
797 { "vs63", 63, PPC_OPERAND_VSR },
798 { "vs7", 7, PPC_OPERAND_VSR },
799 { "vs8", 8, PPC_OPERAND_VSR },
800 { "vs9", 9, PPC_OPERAND_VSR },
802 { "xer", 1, PPC_OPERAND_SPR }
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg *
811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 int middle, low, high;
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
828 return ®s[middle];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS *expressionP)
850 const struct pd_reg *reg;
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
860 else if (!reg_names_p || !ISALPHA (name[0]))
863 c = get_symbol_name (&name);
864 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
869 /* Look to see if it's in the register table. */
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg->value;
874 expressionP->X_md = reg->flags;
876 /* Make the rest nice. */
877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG },
898 { "cr1", 1, PPC_OPERAND_CR_REG },
899 { "cr2", 2, PPC_OPERAND_CR_REG },
900 { "cr3", 3, PPC_OPERAND_CR_REG },
901 { "cr4", 4, PPC_OPERAND_CR_REG },
902 { "cr5", 5, PPC_OPERAND_CR_REG },
903 { "cr6", 6, PPC_OPERAND_CR_REG },
904 { "cr7", 7, PPC_OPERAND_CR_REG },
905 { "eq", 2, PPC_OPERAND_CR_BIT },
906 { "gt", 1, PPC_OPERAND_CR_BIT },
907 { "lt", 0, PPC_OPERAND_CR_BIT },
908 { "so", 3, PPC_OPERAND_CR_BIT },
909 { "un", 3, PPC_OPERAND_CR_BIT }
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name, expressionS *exp)
918 const struct pd_reg *reg;
925 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
930 exp->X_op = O_register;
931 exp->X_add_number = reg->value;
932 exp->X_md = reg->flags;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right->X_op == O_register
946 && right->X_md == PPC_OPERAND_CR_REG
947 && left->X_op == O_constant
948 && left->X_add_number == 4)
949 || (left->X_op == O_register
950 && left->X_md == PPC_OPERAND_CR_REG
951 && right->X_op == O_constant
952 && right->X_add_number == 4)))
954 left->X_op = O_register;
955 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT;
956 left->X_add_number *= right->X_add_number;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right->X_op == O_register
962 && left->X_op == O_register
964 && ((right->X_md == PPC_OPERAND_CR_BIT
965 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT))
966 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)
967 && left->X_md == PPC_OPERAND_CR_BIT)))
969 left->X_md = PPC_OPERAND_CR_BIT;
970 right->X_op = O_constant;
974 /* Accept reg +/- constant. */
975 if (left->X_op == O_register
976 && !((op == O_add || op == O_subtract) && right->X_op == O_constant))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right->X_op == O_register)
982 if (op == O_add && left->X_op == O_constant)
983 left->X_md = right->X_md;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
996 /* Opcode hash table. */
997 static struct hash_control *ppc_hash;
999 /* Macro hash table. */
1000 static struct hash_control *ppc_macro_hash;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags = 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris = SOLARIS_P;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment = 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS *ppc_text_csects;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment = 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS *ppc_data_csects;
1039 /* The current csect. */
1040 static symbolS *ppc_current_csect;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS *ppc_toc_csect;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS *ppc_toc_frag;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS *ppc_after_toc_frag;
1056 /* The current static block. */
1057 static symbolS *ppc_current_block;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection *ppc_coff_debug_section;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection {
1066 /* Subsections are simply linked. */
1067 struct dw_subsection *link;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp;
1076 static struct dw_section {
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection *list_subseg;
1083 /* The anonymous subsection. */
1084 struct dw_subsection *anon_subseg;
1085 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section;
1092 static segT pdata_section;
1093 static segT reldata_section;
1094 static segT rdata_section;
1095 static segT tocdata_section;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section;
1099 static segT ppc_current_section;
1104 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list;
1106 unsigned int ppc_apuinfo_num;
1107 unsigned int ppc_apuinfo_num_alloc;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts = "b:l:usm:K:VQ:";
1113 const char *const md_shortopts = "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts[] = {
1117 {"nops", required_argument, NULL, OPTION_NOPS},
1118 {"ppc476-workaround", no_argument, &warn_476, 1},
1119 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1120 {NULL, no_argument, NULL, 0}
1122 const size_t md_longopts_size = sizeof (md_longopts);
1125 md_parse_option (int c, const char *arg)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg, "e") == 0)
1142 target_big_endian = 0;
1143 set_target_endian = 1;
1144 if (ppc_cpu & PPC_OPCODE_VLE)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg, "e") == 0)
1155 target_big_endian = 1;
1156 set_target_endian = 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1168 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg, "64") == 0)
1182 if (ppc_cpu & PPC_OPCODE_VLE)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg, "32") == 0)
1195 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0)
1200 if (strcmp (arg, "vle") == 0)
1202 if (set_target_endian && target_big_endian == 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg, "regnames") == 0)
1212 else if (strcmp (arg, "no-regnames") == 0)
1213 reg_names_p = FALSE;
1216 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1217 that require relocation. */
1218 else if (strcmp (arg, "relocatable") == 0)
1220 shlib = SHLIB_MRELOCATABLE;
1221 ppc_flags |= EF_PPC_RELOCATABLE;
1224 else if (strcmp (arg, "relocatable-lib") == 0)
1226 shlib = SHLIB_MRELOCATABLE;
1227 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1230 /* -memb, set embedded bit. */
1231 else if (strcmp (arg, "emb") == 0)
1232 ppc_flags |= EF_PPC_EMB;
1234 /* -mlittle/-mbig set the endianness. */
1235 else if (strcmp (arg, "little") == 0
1236 || strcmp (arg, "little-endian") == 0)
1238 target_big_endian = 0;
1239 set_target_endian = 1;
1240 if (ppc_cpu & PPC_OPCODE_VLE)
1241 as_bad (_("the use of -mvle requires big endian."));
1244 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1246 target_big_endian = 1;
1247 set_target_endian = 1;
1250 else if (strcmp (arg, "solaris") == 0)
1253 ppc_comment_chars = ppc_solaris_comment_chars;
1256 else if (strcmp (arg, "no-solaris") == 0)
1259 ppc_comment_chars = ppc_eabi_comment_chars;
1261 else if (strcmp (arg, "spe2") == 0)
1263 ppc_cpu |= PPC_OPCODE_SPE2;
1268 as_bad (_("invalid switch -m%s"), arg);
1274 /* -V: SVR4 argument to print version ID. */
1276 print_version_id ();
1279 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1280 should be emitted or not. FIXME: Not implemented. */
1284 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1285 rather than .stabs.excl, which is ignored by the linker.
1286 FIXME: Not implemented. */
1297 nop_limit = strtoul (optarg, &end, 0);
1299 as_bad (_("--nops needs a numeric argument"));
1314 md_show_usage (FILE *stream)
1316 fprintf (stream, _("\
1318 -a32 generate ELF32/XCOFF32\n\
1319 -a64 generate ELF64/XCOFF64\n\
1321 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1322 -mpwr generate code for POWER (RIOS1)\n\
1323 -m601 generate code for PowerPC 601\n\
1324 -mppc, -mppc32, -m603, -m604\n\
1325 generate code for PowerPC 603/604\n\
1326 -m403 generate code for PowerPC 403\n\
1327 -m405 generate code for PowerPC 405\n\
1328 -m440 generate code for PowerPC 440\n\
1329 -m464 generate code for PowerPC 464\n\
1330 -m476 generate code for PowerPC 476\n\
1331 -m7400, -m7410, -m7450, -m7455\n\
1332 generate code for PowerPC 7400/7410/7450/7455\n\
1333 -m750cl generate code for PowerPC 750cl\n\
1334 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1335 fprintf (stream, _("\
1336 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1337 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1338 -mbooke generate code for 32-bit PowerPC BookE\n\
1339 -ma2 generate code for A2 architecture\n\
1340 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1341 -mpower5, -mpwr5, -mpwr5x\n\
1342 generate code for Power5 architecture\n\
1343 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1344 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1345 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1346 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1347 -mcell generate code for Cell Broadband Engine architecture\n\
1348 -mcom generate code for Power/PowerPC common instructions\n\
1349 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1350 fprintf (stream, _("\
1351 -maltivec generate code for AltiVec\n\
1352 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1353 -me300 generate code for PowerPC e300 family\n\
1354 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1355 -me500mc, generate code for Freescale e500mc core complex\n\
1356 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1357 -me5500, generate code for Freescale e5500 core complex\n\
1358 -me6500, generate code for Freescale e6500 core complex\n\
1359 -mspe generate code for Motorola SPE instructions\n\
1360 -mspe2 generate code for Freescale SPE2 instructions\n\
1361 -mvle generate code for Freescale VLE instructions\n\
1362 -mtitan generate code for AppliedMicro Titan core complex\n\
1363 -mregnames Allow symbolic names for registers\n\
1364 -mno-regnames Do not allow symbolic names for registers\n"));
1366 fprintf (stream, _("\
1367 -mrelocatable support for GCC's -mrelocatble option\n\
1368 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1369 -memb set PPC_EMB bit in ELF flags\n\
1370 -mlittle, -mlittle-endian, -le\n\
1371 generate code for a little endian machine\n\
1372 -mbig, -mbig-endian, -be\n\
1373 generate code for a big endian machine\n\
1374 -msolaris generate code for Solaris\n\
1375 -mno-solaris do not generate code for Solaris\n\
1376 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1377 -V print assembler version number\n\
1378 -Qy, -Qn ignored\n"));
1380 fprintf (stream, _("\
1381 -nops=count when aligning, more than COUNT nops uses a branch\n\
1382 -ppc476-workaround warn if emitting data to code sections\n"));
1385 /* Set ppc_cpu if it is not already set. */
1390 const char *default_os = TARGET_OS;
1391 const char *default_cpu = TARGET_CPU;
1393 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1396 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1397 else if (strncmp (default_os, "aix", 3) == 0
1398 && default_os[3] >= '4' && default_os[3] <= '9')
1399 ppc_cpu |= PPC_OPCODE_COMMON;
1400 else if (strncmp (default_os, "aix3", 4) == 0)
1401 ppc_cpu |= PPC_OPCODE_POWER;
1402 else if (strcmp (default_cpu, "rs6000") == 0)
1403 ppc_cpu |= PPC_OPCODE_POWER;
1404 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1405 ppc_cpu |= PPC_OPCODE_PPC;
1407 as_fatal (_("unknown default cpu = %s, os = %s"),
1408 default_cpu, default_os);
1412 /* Figure out the BFD architecture to use. This function and ppc_mach
1413 are called well before md_begin, when the output file is opened. */
1415 enum bfd_architecture
1418 const char *default_cpu = TARGET_CPU;
1421 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1422 return bfd_arch_powerpc;
1423 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1424 return bfd_arch_powerpc;
1425 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1426 return bfd_arch_rs6000;
1427 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1429 if (strcmp (default_cpu, "rs6000") == 0)
1430 return bfd_arch_rs6000;
1431 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1432 return bfd_arch_powerpc;
1435 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1436 return bfd_arch_unknown;
1443 return bfd_mach_ppc64;
1444 else if (ppc_arch () == bfd_arch_rs6000)
1445 return bfd_mach_rs6k;
1446 else if (ppc_cpu & PPC_OPCODE_TITAN)
1447 return bfd_mach_ppc_titan;
1448 else if (ppc_cpu & PPC_OPCODE_VLE)
1449 return bfd_mach_ppc_vle;
1451 return bfd_mach_ppc;
1455 ppc_target_format (void)
1459 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1461 return "xcoff-powermac";
1464 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1466 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1472 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1473 # elif defined (TE_VXWORKS)
1474 return "elf32-powerpc-vxworks";
1476 return (target_big_endian
1477 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1478 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1483 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1484 Return TRUE if there's a problem, otherwise FALSE. */
1487 insn_validate (const struct powerpc_opcode *op)
1489 const unsigned char *o;
1490 unsigned long omask = op->mask;
1492 /* The mask had better not trim off opcode bits. */
1493 if ((op->opcode & omask) != op->opcode)
1495 as_bad (_("mask trims opcode bits for %s"), op->name);
1499 /* The operands must not overlap the opcode or each other. */
1500 for (o = op->operands; *o; ++o)
1502 if (*o >= num_powerpc_operands)
1504 as_bad (_("operand index error for %s"), op->name);
1509 const struct powerpc_operand *operand = &powerpc_operands[*o];
1510 if (operand->shift != (int) PPC_OPSHIFT_INV)
1514 if (operand->shift >= 0)
1515 mask = operand->bitm << operand->shift;
1517 mask = operand->bitm >> -operand->shift;
1520 as_bad (_("operand %d overlap in %s"),
1521 (int) (o - op->operands), op->name);
1531 /* Insert opcodes and macros into hash tables. Called at startup and
1532 for .machine pseudo. */
1535 ppc_setup_opcodes (void)
1537 const struct powerpc_opcode *op;
1538 const struct powerpc_opcode *op_end;
1539 const struct powerpc_macro *macro;
1540 const struct powerpc_macro *macro_end;
1541 bfd_boolean bad_insn = FALSE;
1543 if (ppc_hash != NULL)
1544 hash_die (ppc_hash);
1545 if (ppc_macro_hash != NULL)
1546 hash_die (ppc_macro_hash);
1548 /* Insert the opcodes into a hash table. */
1549 ppc_hash = hash_new ();
1551 if (ENABLE_CHECKING)
1555 /* An index into powerpc_operands is stored in struct fix
1556 fx_pcrel_adjust which is 8 bits wide. */
1557 gas_assert (num_powerpc_operands < 256);
1559 /* Check operand masks. Code here and in the disassembler assumes
1560 all the 1's in the mask are contiguous. */
1561 for (i = 0; i < num_powerpc_operands; ++i)
1563 unsigned long mask = powerpc_operands[i].bitm;
1564 unsigned long right_bit;
1567 right_bit = mask & -mask;
1569 right_bit = mask & -mask;
1570 if (mask != right_bit)
1572 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1575 for (j = i + 1; j < num_powerpc_operands; ++j)
1576 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1577 sizeof (powerpc_operands[0])) == 0)
1579 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1586 op_end = powerpc_opcodes + powerpc_num_opcodes;
1587 for (op = powerpc_opcodes; op < op_end; op++)
1589 if (ENABLE_CHECKING)
1591 if (op != powerpc_opcodes)
1593 int old_opcode = PPC_OP (op[-1].opcode);
1594 int new_opcode = PPC_OP (op[0].opcode);
1596 #ifdef PRINT_OPCODE_TABLE
1597 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1598 op->name, (unsigned int) (op - powerpc_opcodes),
1599 (unsigned int) new_opcode, (unsigned int) op->opcode,
1600 (unsigned int) op->mask, (unsigned long long) op->flags);
1603 /* The major opcodes had better be sorted. Code in the
1604 disassembler assumes the insns are sorted according to
1606 if (new_opcode < old_opcode)
1608 as_bad (_("major opcode is not sorted for %s"),
1613 if ((op->flags & PPC_OPCODE_VLE) != 0)
1615 as_bad (_("%s is enabled by vle flag"), op->name);
1618 if (PPC_OP (op->opcode) != 4
1619 && PPC_OP (op->opcode) != 31
1620 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1622 as_bad (_("%s not disabled by vle flag"), op->name);
1625 bad_insn |= insn_validate (op);
1628 if ((ppc_cpu & op->flags) != 0
1629 && !(ppc_cpu & op->deprecated))
1633 retval = hash_insert (ppc_hash, op->name, (void *) op);
1636 as_bad (_("duplicate instruction %s"),
1643 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1644 for (op = powerpc_opcodes; op < op_end; op++)
1645 hash_insert (ppc_hash, op->name, (void *) op);
1647 op_end = vle_opcodes + vle_num_opcodes;
1648 for (op = vle_opcodes; op < op_end; op++)
1650 if (ENABLE_CHECKING)
1652 if (op != vle_opcodes)
1654 unsigned old_seg, new_seg;
1656 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1657 old_seg = VLE_OP_TO_SEG (old_seg);
1658 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1659 new_seg = VLE_OP_TO_SEG (new_seg);
1661 #ifdef PRINT_OPCODE_TABLE
1662 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%x\tmask: 0x%x\tflags: 0x%llx\n",
1663 op->name, (unsigned int) (op - powerpc_opcodes),
1664 (unsigned int) new_seg, (unsigned int) op->opcode,
1665 (unsigned int) op->mask, (unsigned long long) op->flags);
1667 /* The major opcodes had better be sorted. Code in the
1668 disassembler assumes the insns are sorted according to
1670 if (new_seg < old_seg)
1672 as_bad (_("major opcode is not sorted for %s"),
1678 bad_insn |= insn_validate (op);
1681 if ((ppc_cpu & op->flags) != 0
1682 && !(ppc_cpu & op->deprecated))
1686 retval = hash_insert (ppc_hash, op->name, (void *) op);
1689 as_bad (_("duplicate instruction %s"),
1696 /* SPE2 instructions */
1697 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2)
1699 op_end = spe2_opcodes + spe2_num_opcodes;
1700 for (op = spe2_opcodes; op < op_end; op++)
1702 if (ENABLE_CHECKING)
1704 if (op != spe2_opcodes)
1706 unsigned old_seg, new_seg;
1708 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1709 old_seg = VLE_OP_TO_SEG (old_seg);
1710 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1711 new_seg = VLE_OP_TO_SEG (new_seg);
1713 /* The major opcodes had better be sorted. Code in the
1714 disassembler assumes the insns are sorted according to
1716 if (new_seg < old_seg)
1718 as_bad (_("major opcode is not sorted for %s"), op->name);
1723 bad_insn |= insn_validate (op);
1726 if ((ppc_cpu & op->flags) != 0 && !(ppc_cpu & op->deprecated))
1730 retval = hash_insert (ppc_hash, op->name, (void *) op);
1733 as_bad (_("duplicate instruction %s"),
1740 for (op = spe2_opcodes; op < op_end; op++)
1741 hash_insert (ppc_hash, op->name, (void *) op);
1744 /* Insert the macros into a hash table. */
1745 ppc_macro_hash = hash_new ();
1747 macro_end = powerpc_macros + powerpc_num_macros;
1748 for (macro = powerpc_macros; macro < macro_end; macro++)
1750 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1754 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1755 if (retval != (const char *) NULL)
1757 as_bad (_("duplicate macro %s"), macro->name);
1767 /* This function is called when the assembler starts up. It is called
1768 after the options have been parsed and the output file has been
1776 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1777 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1780 /* Set the ELF flags if desired. */
1781 if (ppc_flags && !msolaris)
1782 bfd_set_private_flags (stdoutput, ppc_flags);
1785 ppc_setup_opcodes ();
1787 /* Tell the main code what the endianness is if it is not overridden
1789 if (!set_target_endian)
1791 set_target_endian = 1;
1792 target_big_endian = PPC_BIG_ENDIAN;
1796 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1798 /* Create dummy symbols to serve as initial csects. This forces the
1799 text csects to precede the data csects. These symbols will not
1801 ppc_text_csects = symbol_make ("dummy\001");
1802 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1803 ppc_data_csects = symbol_make ("dummy\001");
1804 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1809 ppc_current_section = text_section;
1810 ppc_previous_section = 0;
1819 if (ppc_apuinfo_list == NULL)
1822 /* Ok, so write the section info out. We have this layout:
1826 0 8 length of "APUinfo\0"
1827 4 (n*4) number of APU's (4 bytes each)
1830 20 APU#1 first APU's info
1831 24 APU#2 second APU's info
1836 asection *seg = now_seg;
1837 subsegT subseg = now_subseg;
1838 asection *apuinfo_secp = (asection *) NULL;
1841 /* Create the .PPC.EMB.apuinfo section. */
1842 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1843 bfd_set_section_flags (stdoutput,
1845 SEC_HAS_CONTENTS | SEC_READONLY);
1848 md_number_to_chars (p, (valueT) 8, 4);
1851 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1854 md_number_to_chars (p, (valueT) 2, 4);
1857 strcpy (p, APUINFO_LABEL);
1859 for (i = 0; i < ppc_apuinfo_num; i++)
1862 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1865 frag_align (2, 0, 0);
1867 /* We probably can't restore the current segment, for there likely
1870 subseg_set (seg, subseg);
1875 /* Insert an operand value into an instruction. */
1877 static unsigned long
1878 ppc_insert_operand (unsigned long insn,
1879 const struct powerpc_operand *operand,
1885 long min, max, right;
1887 max = operand->bitm;
1891 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1893 /* Extend the allowed range for addis to [-32768, 65535].
1894 Similarly for cmpli and some VLE high part insns. For 64-bit
1895 it would be good to disable this for signed fields since the
1896 value is sign extended into the high 32 bits of the register.
1897 If the value is, say, an address, then we might care about
1898 the high bits. However, gcc as of 2014-06 uses unsigned
1899 values when loading the high part of 64-bit constants using
1901 min = ~(max >> 1) & -right;
1903 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1905 max = (max >> 1) & -right;
1906 min = ~max & -right;
1909 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1912 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1921 /* Some people write constants with the sign extension done by
1922 hand but only up to 32 bits. This shouldn't really be valid,
1923 but, to permit this code to assemble on a 64-bit host, we
1924 sign extend the 32-bit value to 64 bits if so doing makes the
1927 && (offsetT) (val - 0x80000000 - 0x80000000) >= min
1928 && (offsetT) (val - 0x80000000 - 0x80000000) <= max
1929 && ((val - 0x80000000 - 0x80000000) & (right - 1)) == 0)
1930 val = val - 0x80000000 - 0x80000000;
1932 /* Similarly, people write expressions like ~(1<<15), and expect
1933 this to be OK for a 32-bit unsigned value. */
1935 && (offsetT) (val + 0x80000000 + 0x80000000) >= min
1936 && (offsetT) (val + 0x80000000 + 0x80000000) <= max
1937 && ((val + 0x80000000 + 0x80000000) & (right - 1)) == 0)
1938 val = val + 0x80000000 + 0x80000000;
1942 || (val & (right - 1)) != 0)
1943 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1946 if (operand->insert)
1951 insn = (*operand->insert) (insn, (long) val, cpu, &errmsg);
1952 if (errmsg != (const char *) NULL)
1953 as_bad_where (file, line, "%s", errmsg);
1955 else if (operand->shift >= 0)
1956 insn |= ((long) val & operand->bitm) << operand->shift;
1958 insn |= ((long) val & operand->bitm) >> -operand->shift;
1965 /* Parse @got, etc. and return the desired relocation. */
1966 static bfd_reloc_code_real_type
1967 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1971 unsigned int length : 8;
1972 unsigned int valid32 : 1;
1973 unsigned int valid64 : 1;
1982 const struct map_bfd *ptr;
1984 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1985 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1986 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1988 static const struct map_bfd mapping[] = {
1989 MAP ("l", BFD_RELOC_LO16),
1990 MAP ("h", BFD_RELOC_HI16),
1991 MAP ("ha", BFD_RELOC_HI16_S),
1992 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1993 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1994 MAP ("got", BFD_RELOC_16_GOTOFF),
1995 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1996 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1997 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
1998 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
1999 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
2000 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
2001 MAP ("copy", BFD_RELOC_PPC_COPY),
2002 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
2003 MAP ("sectoff", BFD_RELOC_16_BASEREL),
2004 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
2005 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
2006 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
2007 MAP ("tls", BFD_RELOC_PPC_TLS),
2008 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
2009 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
2010 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
2011 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
2012 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
2013 MAP ("tprel", BFD_RELOC_PPC_TPREL),
2014 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
2015 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
2016 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
2017 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
2018 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
2019 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
2020 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
2021 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
2022 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
2023 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
2024 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
2025 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
2026 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
2027 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
2028 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
2029 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
2030 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
2031 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
2032 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
2033 MAP32 ("fixup", BFD_RELOC_CTOR),
2034 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
2035 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
2036 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
2037 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
2038 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
2039 MAP32 ("sdarel", BFD_RELOC_GPREL16),
2040 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
2041 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
2042 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
2043 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
2044 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
2045 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
2046 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
2047 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
2048 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
2049 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
2050 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
2051 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
2052 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
2053 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
2054 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
2055 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
2056 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
2057 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
2058 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
2059 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
2060 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
2061 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
2062 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
2063 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
2064 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
2065 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
2066 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
2067 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
2068 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
2069 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
2070 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
2071 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
2072 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
2073 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
2074 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
2075 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
2076 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
2077 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
2078 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
2079 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
2080 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
2081 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
2082 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
2083 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
2084 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
2085 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
2089 return BFD_RELOC_NONE;
2091 for (ch = *str, str2 = ident;
2092 (str2 < ident + sizeof (ident) - 1
2093 && (ISALNUM (ch) || ch == '@'));
2096 *str2++ = TOLOWER (ch);
2103 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2104 if (ch == ptr->string[0]
2105 && len == ptr->length
2106 && memcmp (ident, ptr->string, ptr->length) == 0
2107 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2109 int reloc = ptr->reloc;
2111 if (!ppc_obj64 && exp_p->X_add_number != 0)
2115 case BFD_RELOC_16_GOTOFF:
2116 case BFD_RELOC_LO16_GOTOFF:
2117 case BFD_RELOC_HI16_GOTOFF:
2118 case BFD_RELOC_HI16_S_GOTOFF:
2119 as_warn (_("identifier+constant@got means "
2120 "identifier@got+constant"));
2123 case BFD_RELOC_PPC_GOT_TLSGD16:
2124 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2125 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2126 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2127 case BFD_RELOC_PPC_GOT_TLSLD16:
2128 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2129 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2130 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2131 case BFD_RELOC_PPC_GOT_DTPREL16:
2132 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2133 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2134 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2135 case BFD_RELOC_PPC_GOT_TPREL16:
2136 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2137 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2138 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2139 as_bad (_("symbol+offset not supported for got tls"));
2144 /* Now check for identifier@suffix+constant. */
2145 if (*str == '-' || *str == '+')
2147 char *orig_line = input_line_pointer;
2148 expressionS new_exp;
2150 input_line_pointer = str;
2151 expression (&new_exp);
2152 if (new_exp.X_op == O_constant)
2154 exp_p->X_add_number += new_exp.X_add_number;
2155 str = input_line_pointer;
2158 if (&input_line_pointer != str_p)
2159 input_line_pointer = orig_line;
2163 if (reloc == (int) BFD_RELOC_PPC64_TOC
2164 && exp_p->X_op == O_symbol
2165 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2167 /* Change the symbol so that the dummy .TOC. symbol can be
2168 omitted from the object file. */
2169 exp_p->X_add_symbol = &abs_symbol;
2172 return (bfd_reloc_code_real_type) reloc;
2175 return BFD_RELOC_NONE;
2178 /* Support @got, etc. on constants emitted via .short, .int etc. */
2180 bfd_reloc_code_real_type
2181 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2184 if (nbytes >= 2 && *input_line_pointer == '@')
2185 return ppc_elf_suffix (&input_line_pointer, exp);
2186 return BFD_RELOC_NONE;
2189 /* Warn when emitting data to code sections, unless we are emitting
2190 a relocation that ld --ppc476-workaround uses to recognise data
2191 *and* there was an unconditional branch prior to the data. */
2194 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2195 unsigned int nbytes, fixS *fix)
2198 && (now_seg->flags & SEC_CODE) != 0
2201 || !(fix->fx_r_type == BFD_RELOC_32
2202 || fix->fx_r_type == BFD_RELOC_CTOR
2203 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2204 || !(last_seg == now_seg && last_subseg == now_subseg)
2205 || !((last_insn & (0x3f << 26)) == (18u << 26)
2206 || ((last_insn & (0x3f << 26)) == (16u << 26)
2207 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2208 || ((last_insn & (0x3f << 26)) == (19u << 26)
2209 && (last_insn & (0x3ff << 1)) == (16u << 1)
2210 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2212 /* Flag that we've warned. */
2216 as_warn (_("data in executable section"));
2220 /* Solaris pseduo op to change to the .rodata section. */
2222 ppc_elf_rdata (int xxx)
2224 char *save_line = input_line_pointer;
2225 static char section[] = ".rodata\n";
2227 /* Just pretend this is .section .rodata */
2228 input_line_pointer = section;
2229 obj_elf_section (xxx);
2231 input_line_pointer = save_line;
2234 /* Pseudo op to make file scope bss items. */
2236 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2249 c = get_symbol_name (&name);
2251 /* Just after name is now '\0'. */
2252 p = input_line_pointer;
2254 SKIP_WHITESPACE_AFTER_NAME ();
2255 if (*input_line_pointer != ',')
2257 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2258 ignore_rest_of_line ();
2262 input_line_pointer++; /* skip ',' */
2263 if ((size = get_absolute_expression ()) < 0)
2265 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2266 ignore_rest_of_line ();
2270 /* The third argument to .lcomm is the alignment. */
2271 if (*input_line_pointer != ',')
2275 ++input_line_pointer;
2276 align = get_absolute_expression ();
2279 as_warn (_("ignoring bad alignment"));
2285 symbolP = symbol_find_or_make (name);
2288 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2290 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2291 S_GET_NAME (symbolP));
2292 ignore_rest_of_line ();
2296 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2298 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2299 S_GET_NAME (symbolP),
2300 (long) S_GET_VALUE (symbolP),
2303 ignore_rest_of_line ();
2309 old_subsec = now_subseg;
2312 /* Convert to a power of 2 alignment. */
2313 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2316 as_bad (_("common alignment not a power of 2"));
2317 ignore_rest_of_line ();
2324 record_alignment (bss_section, align2);
2325 subseg_set (bss_section, 1);
2327 frag_align (align2, 0, 0);
2328 if (S_GET_SEGMENT (symbolP) == bss_section)
2329 symbol_get_frag (symbolP)->fr_symbol = 0;
2330 symbol_set_frag (symbolP, frag_now);
2331 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2334 S_SET_SIZE (symbolP, size);
2335 S_SET_SEGMENT (symbolP, bss_section);
2336 subseg_set (old_sec, old_subsec);
2337 demand_empty_rest_of_line ();
2340 /* Pseudo op to set symbol local entry point. */
2342 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2345 char c = get_symbol_name (&name);
2350 elf_symbol_type *elfsym;
2352 p = input_line_pointer;
2354 SKIP_WHITESPACE_AFTER_NAME ();
2355 if (*input_line_pointer != ',')
2358 as_bad (_("expected comma after name `%s' in .localentry directive"),
2361 ignore_rest_of_line ();
2364 input_line_pointer++;
2366 if (exp.X_op == O_absent)
2368 as_bad (_("missing expression in .localentry directive"));
2369 exp.X_op = O_constant;
2370 exp.X_add_number = 0;
2373 sym = symbol_find_or_make (name);
2376 if (resolve_expression (&exp)
2377 && exp.X_op == O_constant)
2379 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2381 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2382 as_bad (_(".localentry expression for `%s' "
2383 "is not a valid power of 2"), S_GET_NAME (sym));
2386 bfdsym = symbol_get_bfdsym (sym);
2387 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2388 gas_assert (elfsym);
2389 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2390 elfsym->internal_elf_sym.st_other |= encoded;
2391 if (ppc_abiversion == 0)
2396 as_bad (_(".localentry expression for `%s' "
2397 "does not evaluate to a constant"), S_GET_NAME (sym));
2399 demand_empty_rest_of_line ();
2402 /* Pseudo op to set ABI version. */
2404 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2409 if (exp.X_op == O_absent)
2411 as_bad (_("missing expression in .abiversion directive"));
2412 exp.X_op = O_constant;
2413 exp.X_add_number = 0;
2416 if (resolve_expression (&exp)
2417 && exp.X_op == O_constant)
2418 ppc_abiversion = exp.X_add_number;
2420 as_bad (_(".abiversion expression does not evaluate to a constant"));
2421 demand_empty_rest_of_line ();
2424 /* Parse a .gnu_attribute directive. */
2426 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2428 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2430 /* Check validity of defined powerpc tags. */
2431 if (tag == Tag_GNU_Power_ABI_FP
2432 || tag == Tag_GNU_Power_ABI_Vector
2433 || tag == Tag_GNU_Power_ABI_Struct_Return)
2437 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2439 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2440 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2441 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2442 as_warn (_("unknown .gnu_attribute value"));
2446 /* Set ABI version in output file. */
2450 if (ppc_obj64 && ppc_abiversion != 0)
2452 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2453 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2457 /* Validate any relocations emitted for -mrelocatable, possibly adding
2458 fixups for word relocations in writable segments, so we can adjust
2461 ppc_elf_validate_fix (fixS *fixp, segT seg)
2463 if (fixp->fx_done || fixp->fx_pcrel)
2472 case SHLIB_MRELOCATABLE:
2473 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2474 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2475 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2476 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2477 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2478 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2479 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2480 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2481 && (seg->flags & SEC_LOAD) != 0
2482 && strcmp (segment_name (seg), ".got2") != 0
2483 && strcmp (segment_name (seg), ".dtors") != 0
2484 && strcmp (segment_name (seg), ".ctors") != 0
2485 && strcmp (segment_name (seg), ".fixup") != 0
2486 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2487 && strcmp (segment_name (seg), ".eh_frame") != 0
2488 && strcmp (segment_name (seg), ".ex_shared") != 0)
2490 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2491 || fixp->fx_r_type != BFD_RELOC_CTOR)
2493 as_bad_where (fixp->fx_file, fixp->fx_line,
2494 _("relocation cannot be done when using -mrelocatable"));
2501 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2502 function descriptor sym if the corresponding code sym is used. */
2505 ppc_frob_file_before_adjust (void)
2513 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2519 name = S_GET_NAME (symp);
2523 if (! S_IS_WEAK (symp)
2524 || S_IS_DEFINED (symp))
2527 dotname = concat (".", name, (char *) NULL);
2528 dotsym = symbol_find_noref (dotname, 1);
2530 if (dotsym != NULL && (symbol_used_p (dotsym)
2531 || symbol_used_in_reloc_p (dotsym)))
2532 symbol_mark_used (symp);
2536 toc = bfd_get_section_by_name (stdoutput, ".toc");
2538 && toc_reloc_types != has_large_toc_reloc
2539 && bfd_section_size (stdoutput, toc) > 0x10000)
2540 as_warn (_("TOC section size exceeds 64k"));
2543 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2544 emitted. Other uses of .TOC. will cause the symbol to be marked
2545 with BSF_KEEP in md_apply_fix. */
2548 ppc_elf_adjust_symtab (void)
2553 symp = symbol_find (".TOC.");
2556 asymbol *bsym = symbol_get_bfdsym (symp);
2557 if ((bsym->flags & BSF_KEEP) == 0)
2558 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2562 #endif /* OBJ_ELF */
2567 * Summary of parse_toc_entry.
2569 * in: Input_line_pointer points to the '[' in one of:
2571 * [toc] [tocv] [toc32] [toc64]
2573 * Anything else is an error of one kind or another.
2576 * return value: success or failure
2577 * toc_kind: kind of toc reference
2578 * input_line_pointer:
2579 * success: first char after the ']'
2580 * failure: unchanged
2584 * [toc] - rv == success, toc_kind = default_toc
2585 * [tocv] - rv == success, toc_kind = data_in_toc
2586 * [toc32] - rv == success, toc_kind = must_be_32
2587 * [toc64] - rv == success, toc_kind = must_be_64
2591 enum toc_size_qualifier
2593 default_toc, /* The toc cell constructed should be the system default size */
2594 data_in_toc, /* This is a direct reference to a toc cell */
2595 must_be_32, /* The toc cell constructed must be 32 bits wide */
2596 must_be_64 /* The toc cell constructed must be 64 bits wide */
2600 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2605 enum toc_size_qualifier t;
2607 /* Save the input_line_pointer. */
2608 start = input_line_pointer;
2610 /* Skip over the '[' , and whitespace. */
2611 ++input_line_pointer;
2614 /* Find the spelling of the operand. */
2615 c = get_symbol_name (&toc_spec);
2617 if (strcmp (toc_spec, "toc") == 0)
2621 else if (strcmp (toc_spec, "tocv") == 0)
2625 else if (strcmp (toc_spec, "toc32") == 0)
2629 else if (strcmp (toc_spec, "toc64") == 0)
2635 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2636 *input_line_pointer = c;
2637 input_line_pointer = start;
2641 /* Now find the ']'. */
2642 *input_line_pointer = c;
2644 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2645 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2649 as_bad (_("syntax error: expected `]', found `%c'"), c);
2650 input_line_pointer = start;
2659 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2660 /* See whether a symbol is in the TOC section. */
2663 ppc_is_toc_sym (symbolS *sym)
2666 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2667 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2670 const char *sname = segment_name (S_GET_SEGMENT (sym));
2672 return strcmp (sname, ".toc") == 0;
2674 return strcmp (sname, ".got") == 0;
2677 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2681 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2683 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2687 /* Check we don't already exist. */
2688 for (i = 0; i < ppc_apuinfo_num; i++)
2689 if (ppc_apuinfo_list[i] == APUID (apu, version))
2692 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2694 if (ppc_apuinfo_num_alloc == 0)
2696 ppc_apuinfo_num_alloc = 4;
2697 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2701 ppc_apuinfo_num_alloc += 4;
2702 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2703 ppc_apuinfo_num_alloc);
2706 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2712 /* We need to keep a list of fixups. We can't simply generate them as
2713 we go, because that would require us to first create the frag, and
2714 that would screw up references to ``.''. */
2720 bfd_reloc_code_real_type reloc;
2723 #define MAX_INSN_FIXUPS (5)
2725 /* This routine is called for each instruction to be assembled. */
2728 md_assemble (char *str)
2731 const struct powerpc_opcode *opcode;
2733 const unsigned char *opindex_ptr;
2737 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2742 unsigned int insn_length;
2744 /* Get the opcode. */
2745 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2750 /* Look up the opcode in the hash table. */
2751 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2752 if (opcode == (const struct powerpc_opcode *) NULL)
2754 const struct powerpc_macro *macro;
2756 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2757 if (macro == (const struct powerpc_macro *) NULL)
2758 as_bad (_("unrecognized opcode: `%s'"), str);
2760 ppc_macro (s, macro);
2765 insn = opcode->opcode;
2768 while (ISSPACE (*str))
2771 /* PowerPC operands are just expressions. The only real issue is
2772 that a few operand types are optional. All cases which might use
2773 an optional operand separate the operands only with commas (in some
2774 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2775 have optional operands). Most instructions with optional operands
2776 have only one. Those that have more than one optional operand can
2777 take either all their operands or none. So, before we start seriously
2778 parsing the operands, we check to see if we have optional operands,
2779 and if we do, we count the number of commas to see which operands
2780 have been omitted. */
2782 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2784 const struct powerpc_operand *operand;
2786 operand = &powerpc_operands[*opindex_ptr];
2787 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2788 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64))
2790 unsigned int opcount;
2791 unsigned int num_operands_expected;
2793 /* There is an optional operand. Count the number of
2794 commas in the input line. */
2801 while ((s = strchr (s, ',')) != (char *) NULL)
2808 /* Compute the number of expected operands.
2809 Do not count fake operands. */
2810 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2811 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2812 ++ num_operands_expected;
2814 /* If there are fewer operands in the line then are called
2815 for by the instruction, we want to skip the optional
2817 if (opcount < num_operands_expected)
2824 /* Gather the operands. */
2828 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2830 const struct powerpc_operand *operand;
2836 if (next_opindex == 0)
2837 operand = &powerpc_operands[*opindex_ptr];
2840 operand = &powerpc_operands[next_opindex];
2845 /* If this is a fake operand, then we do not expect anything
2847 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2849 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2850 if (errmsg != (const char *) NULL)
2851 as_bad ("%s", errmsg);
2855 /* If this is an optional operand, and we are skipping it, just
2857 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2858 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)
2861 long val = ppc_optional_operand_value (operand);
2862 if (operand->insert)
2864 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2865 if (errmsg != (const char *) NULL)
2866 as_bad ("%s", errmsg);
2868 else if (operand->shift >= 0)
2869 insn |= ((long) val & operand->bitm) << operand->shift;
2871 insn |= ((long) val & operand->bitm) >> -operand->shift;
2873 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2874 next_opindex = *opindex_ptr + 1;
2878 /* Gather the operand. */
2879 hold = input_line_pointer;
2880 input_line_pointer = str;
2883 if (*input_line_pointer == '[')
2885 /* We are expecting something like the second argument here:
2887 * lwz r4,[toc].GS.0.static_int(rtoc)
2888 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2889 * The argument following the `]' must be a symbol name, and the
2890 * register must be the toc register: 'rtoc' or '2'
2892 * The effect is to 0 as the displacement field
2893 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2894 * the appropriate variation) reloc against it based on the symbol.
2895 * The linker will build the toc, and insert the resolved toc offset.
2898 * o The size of the toc entry is currently assumed to be
2899 * 32 bits. This should not be assumed to be a hard coded
2901 * o In an effort to cope with a change from 32 to 64 bits,
2902 * there are also toc entries that are specified to be
2903 * either 32 or 64 bits:
2904 * lwz r4,[toc32].GS.0.static_int(rtoc)
2905 * lwz r4,[toc64].GS.0.static_int(rtoc)
2906 * These demand toc entries of the specified size, and the
2907 * instruction probably requires it.
2911 enum toc_size_qualifier toc_kind;
2912 bfd_reloc_code_real_type toc_reloc;
2914 /* Go parse off the [tocXX] part. */
2915 valid_toc = parse_toc_entry (&toc_kind);
2919 ignore_rest_of_line ();
2923 /* Now get the symbol following the ']'. */
2929 /* In this case, we may not have seen the symbol yet,
2930 since it is allowed to appear on a .extern or .globl
2931 or just be a label in the .data section. */
2932 toc_reloc = BFD_RELOC_PPC_TOC16;
2935 /* 1. The symbol must be defined and either in the toc
2936 section, or a global.
2937 2. The reloc generated must have the TOCDEFN flag set
2938 in upper bit mess of the reloc type.
2939 FIXME: It's a little confusing what the tocv
2940 qualifier can be used for. At the very least, I've
2941 seen three uses, only one of which I'm sure I can
2943 if (ex.X_op == O_symbol)
2945 gas_assert (ex.X_add_symbol != NULL);
2946 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2949 as_bad (_("[tocv] symbol is not a toc symbol"));
2953 toc_reloc = BFD_RELOC_PPC_TOC16;
2956 /* FIXME: these next two specifically specify 32/64 bit
2957 toc entries. We don't support them today. Is this
2958 the right way to say that? */
2959 toc_reloc = BFD_RELOC_NONE;
2960 as_bad (_("unimplemented toc32 expression modifier"));
2963 /* FIXME: see above. */
2964 toc_reloc = BFD_RELOC_NONE;
2965 as_bad (_("unimplemented toc64 expression modifier"));
2969 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2975 /* We need to generate a fixup for this expression. */
2976 if (fc >= MAX_INSN_FIXUPS)
2977 as_fatal (_("too many fixups"));
2979 fixups[fc].reloc = toc_reloc;
2980 fixups[fc].exp = ex;
2981 fixups[fc].opindex = *opindex_ptr;
2984 /* Ok. We've set up the fixup for the instruction. Now make it
2985 look like the constant 0 was found here. */
2987 ex.X_op = O_constant;
2988 ex.X_add_number = 0;
2989 ex.X_add_symbol = NULL;
2990 ex.X_op_symbol = NULL;
2997 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
2998 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
2999 || !register_name (&ex))
3001 char save_lex = lex_type['%'];
3003 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
3004 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
3007 lex_type['%'] |= LEX_BEGIN_NAME;
3011 lex_type['%'] = save_lex;
3015 str = input_line_pointer;
3016 input_line_pointer = hold;
3018 if (ex.X_op == O_illegal)
3019 as_bad (_("illegal operand"));
3020 else if (ex.X_op == O_absent)
3021 as_bad (_("missing operand"));
3022 else if (ex.X_op == O_register)
3026 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR
3027 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG
3028 | PPC_OPERAND_SPR | PPC_OPERAND_GQR)) != 0
3029 && !((ex.X_md & PPC_OPERAND_GPR) != 0
3030 && ex.X_add_number != 0
3031 && (operand->flags & PPC_OPERAND_GPR_0) != 0))
3032 as_warn (_("invalid register expression"));
3033 insn = ppc_insert_operand (insn, operand, ex.X_add_number & 0xff,
3034 ppc_cpu, (char *) NULL, 0);
3036 else if (ex.X_op == O_constant)
3039 /* Allow @HA, @L, @H on constants. */
3040 bfd_reloc_code_real_type reloc;
3041 char *orig_str = str;
3043 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3050 case BFD_RELOC_LO16:
3051 ex.X_add_number &= 0xffff;
3052 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3053 ex.X_add_number = SEX16 (ex.X_add_number);
3056 case BFD_RELOC_HI16:
3057 if (REPORT_OVERFLOW_HI && ppc_obj64)
3059 /* PowerPC64 @h is tested for overflow. */
3060 ex.X_add_number = (addressT) ex.X_add_number >> 16;
3061 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3063 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3065 = ((addressT) ex.X_add_number ^ sign) - sign;
3071 case BFD_RELOC_PPC64_ADDR16_HIGH:
3072 ex.X_add_number = PPC_HI (ex.X_add_number);
3073 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3074 ex.X_add_number = SEX16 (ex.X_add_number);
3077 case BFD_RELOC_HI16_S:
3078 if (REPORT_OVERFLOW_HI && ppc_obj64)
3080 /* PowerPC64 @ha is tested for overflow. */
3082 = ((addressT) ex.X_add_number + 0x8000) >> 16;
3083 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3085 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3087 = ((addressT) ex.X_add_number ^ sign) - sign;
3093 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3094 ex.X_add_number = PPC_HA (ex.X_add_number);
3095 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3096 ex.X_add_number = SEX16 (ex.X_add_number);
3099 case BFD_RELOC_PPC64_HIGHER:
3100 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3101 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3102 ex.X_add_number = SEX16 (ex.X_add_number);
3105 case BFD_RELOC_PPC64_HIGHER_S:
3106 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3107 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3108 ex.X_add_number = SEX16 (ex.X_add_number);
3111 case BFD_RELOC_PPC64_HIGHEST:
3112 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3113 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3114 ex.X_add_number = SEX16 (ex.X_add_number);
3117 case BFD_RELOC_PPC64_HIGHEST_S:
3118 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3119 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3120 ex.X_add_number = SEX16 (ex.X_add_number);
3123 #endif /* OBJ_ELF */
3124 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3125 ppc_cpu, (char *) NULL, 0);
3129 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3131 if (ex.X_op == O_symbol && str[0] == '(')
3133 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3134 if (sym_name[0] == '.')
3137 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3139 expressionS tls_exp;
3141 hold = input_line_pointer;
3142 input_line_pointer = str + 1;
3143 expression (&tls_exp);
3144 if (tls_exp.X_op == O_symbol)
3146 reloc = BFD_RELOC_NONE;
3147 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3149 reloc = BFD_RELOC_PPC_TLSGD;
3150 input_line_pointer += 7;
3152 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3154 reloc = BFD_RELOC_PPC_TLSLD;
3155 input_line_pointer += 7;
3157 if (reloc != BFD_RELOC_NONE)
3160 str = input_line_pointer;
3162 if (fc >= MAX_INSN_FIXUPS)
3163 as_fatal (_("too many fixups"));
3164 fixups[fc].exp = tls_exp;
3165 fixups[fc].opindex = *opindex_ptr;
3166 fixups[fc].reloc = reloc;
3170 input_line_pointer = hold;
3174 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3176 /* Some TLS tweaks. */
3182 case BFD_RELOC_PPC_TLS:
3183 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3184 as_bad (_("@tls may not be used with \"%s\" operands"),
3186 else if (operand->shift != 11)
3187 as_bad (_("@tls may only be used in last operand"));
3189 insn = ppc_insert_operand (insn, operand,
3191 ppc_cpu, (char *) NULL, 0);
3194 /* We'll only use the 32 (or 64) bit form of these relocations
3195 in constants. Instructions get the 16 bit form. */
3196 case BFD_RELOC_PPC_DTPREL:
3197 reloc = BFD_RELOC_PPC_DTPREL16;
3199 case BFD_RELOC_PPC_TPREL:
3200 reloc = BFD_RELOC_PPC_TPREL16;
3205 if (opcode->opcode == (19 << 26) + (2 << 1)
3206 && reloc == BFD_RELOC_HI16_S)
3207 reloc = BFD_RELOC_PPC_16DX_HA;
3209 /* If VLE-mode convert LO/HI/HA relocations. */
3210 if (opcode->flags & PPC_OPCODE_VLE)
3212 int tmp_insn = insn & opcode->mask;
3214 int use_a_reloc = (tmp_insn == E_OR2I_INSN
3215 || tmp_insn == E_AND2I_DOT_INSN
3216 || tmp_insn == E_OR2IS_INSN
3217 || tmp_insn == E_LIS_INSN
3218 || tmp_insn == E_AND2IS_DOT_INSN);
3221 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3222 || tmp_insn == E_ADD2IS_INSN
3223 || tmp_insn == E_CMP16I_INSN
3224 || tmp_insn == E_MULL2I_INSN
3225 || tmp_insn == E_CMPL16I_INSN
3226 || tmp_insn == E_CMPH16I_INSN
3227 || tmp_insn == E_CMPHL16I_INSN);
3234 case BFD_RELOC_PPC_EMB_SDA21:
3235 reloc = BFD_RELOC_PPC_VLE_SDA21;
3238 case BFD_RELOC_LO16:
3240 reloc = BFD_RELOC_PPC_VLE_LO16D;
3241 else if (use_a_reloc)
3242 reloc = BFD_RELOC_PPC_VLE_LO16A;
3245 case BFD_RELOC_HI16:
3247 reloc = BFD_RELOC_PPC_VLE_HI16D;
3248 else if (use_a_reloc)
3249 reloc = BFD_RELOC_PPC_VLE_HI16A;
3252 case BFD_RELOC_HI16_S:
3254 reloc = BFD_RELOC_PPC_VLE_HA16D;
3255 else if (use_a_reloc)
3256 reloc = BFD_RELOC_PPC_VLE_HA16A;
3259 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3261 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3264 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3266 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3269 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3271 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3276 #endif /* OBJ_ELF */
3278 if (reloc != BFD_RELOC_NONE)
3280 /* Determine a BFD reloc value based on the operand information.
3281 We are only prepared to turn a few of the operands into
3283 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3284 | PPC_OPERAND_ABSOLUTE)) != 0
3285 && operand->bitm == 0x3fffffc
3286 && operand->shift == 0)
3287 reloc = BFD_RELOC_PPC_B26;
3288 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3289 | PPC_OPERAND_ABSOLUTE)) != 0
3290 && operand->bitm == 0xfffc
3291 && operand->shift == 0)
3292 reloc = BFD_RELOC_PPC_B16;
3293 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3294 && operand->bitm == 0x1fe
3295 && operand->shift == -1)
3296 reloc = BFD_RELOC_PPC_VLE_REL8;
3297 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3298 && operand->bitm == 0xfffe
3299 && operand->shift == 0)
3300 reloc = BFD_RELOC_PPC_VLE_REL15;
3301 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3302 && operand->bitm == 0x1fffffe
3303 && operand->shift == 0)
3304 reloc = BFD_RELOC_PPC_VLE_REL24;
3305 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3306 && (operand->bitm & 0xfff0) == 0xfff0
3307 && operand->shift == 0)
3309 reloc = BFD_RELOC_16;
3310 #if defined OBJ_XCOFF || defined OBJ_ELF
3311 /* Note: the symbol may be not yet defined. */
3312 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3313 && ppc_is_toc_sym (ex.X_add_symbol))
3315 reloc = BFD_RELOC_PPC_TOC16;
3317 as_warn (_("assuming %s on symbol"),
3318 ppc_obj64 ? "@toc" : "@xgot");
3324 /* For the absolute forms of branches, convert the PC
3325 relative form back into the absolute. */
3326 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3330 case BFD_RELOC_PPC_B26:
3331 reloc = BFD_RELOC_PPC_BA26;
3333 case BFD_RELOC_PPC_B16:
3334 reloc = BFD_RELOC_PPC_BA16;
3337 case BFD_RELOC_PPC_B16_BRTAKEN:
3338 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3340 case BFD_RELOC_PPC_B16_BRNTAKEN:
3341 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3352 case BFD_RELOC_PPC_TOC16:
3353 toc_reloc_types |= has_small_toc_reloc;
3355 case BFD_RELOC_PPC64_TOC16_LO:
3356 case BFD_RELOC_PPC64_TOC16_HI:
3357 case BFD_RELOC_PPC64_TOC16_HA:
3358 toc_reloc_types |= has_large_toc_reloc;
3365 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3370 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3372 case BFD_RELOC_LO16:
3373 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3375 case BFD_RELOC_16_GOTOFF:
3376 reloc = BFD_RELOC_PPC64_GOT16_DS;
3378 case BFD_RELOC_LO16_GOTOFF:
3379 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3381 case BFD_RELOC_LO16_PLTOFF:
3382 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3384 case BFD_RELOC_16_BASEREL:
3385 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3387 case BFD_RELOC_LO16_BASEREL:
3388 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3390 case BFD_RELOC_PPC_TOC16:
3391 reloc = BFD_RELOC_PPC64_TOC16_DS;
3393 case BFD_RELOC_PPC64_TOC16_LO:
3394 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3396 case BFD_RELOC_PPC64_PLTGOT16:
3397 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3399 case BFD_RELOC_PPC64_PLTGOT16_LO:
3400 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3402 case BFD_RELOC_PPC_DTPREL16:
3403 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3405 case BFD_RELOC_PPC_DTPREL16_LO:
3406 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3408 case BFD_RELOC_PPC_TPREL16:
3409 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3411 case BFD_RELOC_PPC_TPREL16_LO:
3412 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3414 case BFD_RELOC_PPC_GOT_DTPREL16:
3415 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3416 case BFD_RELOC_PPC_GOT_TPREL16:
3417 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3420 as_bad (_("unsupported relocation for DS offset field"));
3426 /* We need to generate a fixup for this expression. */
3427 if (fc >= MAX_INSN_FIXUPS)
3428 as_fatal (_("too many fixups"));
3429 fixups[fc].exp = ex;
3430 fixups[fc].opindex = *opindex_ptr;
3431 fixups[fc].reloc = reloc;
3439 /* If expecting more operands, then we want to see "),". */
3440 if (*str == endc && opindex_ptr[1] != 0)
3444 while (ISSPACE (*str));
3448 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3456 /* The call to expression should have advanced str past any
3459 && (endc != ',' || *str != '\0'))
3462 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3464 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3472 while (ISSPACE (*str))
3476 as_bad (_("junk at end of line: `%s'"), str);
3479 /* Do we need/want an APUinfo section? */
3480 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3483 /* These are all version "1". */
3484 if (opcode->flags & PPC_OPCODE_SPE)
3485 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3486 if (opcode->flags & PPC_OPCODE_ISEL)
3487 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3488 if (opcode->flags & PPC_OPCODE_EFS)
3489 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3490 if (opcode->flags & PPC_OPCODE_BRLOCK)
3491 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3492 if (opcode->flags & PPC_OPCODE_PMR)
3493 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3494 if (opcode->flags & PPC_OPCODE_CACHELCK)
3495 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3496 if (opcode->flags & PPC_OPCODE_RFMCI)
3497 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3498 /* Only set the VLE flag if the instruction has been pulled via
3499 the VLE instruction set. This way the flag is guaranteed to
3500 be set for VLE-only instructions or for VLE-only processors,
3501 however it'll remain clear for dual-mode instructions on
3502 dual-mode and, more importantly, standard-mode processors. */
3503 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3505 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3506 if (elf_section_data (now_seg) != NULL)
3507 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
3512 /* Write out the instruction. */
3513 /* Differentiate between two and four byte insns. */
3514 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
3516 if (PPC_OP_SE_VLE (insn))
3520 addr_mod = frag_now_fix () & 1;
3525 addr_mod = frag_now_fix () & 3;
3527 /* All instructions can start on a 2 byte boundary for VLE. */
3528 f = frag_more (insn_length);
3529 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
3531 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
3532 as_bad (_("instruction address is not a multiple of 2"));
3534 as_bad (_("instruction address is not a multiple of 4"));
3536 frag_now->insn_addr = addr_mod;
3537 frag_now->has_code = 1;
3538 md_number_to_chars (f, insn, insn_length);
3541 last_subseg = now_subseg;
3544 dwarf2_emit_insn (insn_length);
3547 /* Create any fixups. */
3548 for (i = 0; i < fc; i++)
3551 if (fixups[i].reloc != BFD_RELOC_NONE)
3553 reloc_howto_type *reloc_howto;
3557 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3561 size = bfd_get_reloc_size (reloc_howto);
3562 offset = target_big_endian ? (insn_length - size) : 0;
3564 fixP = fix_new_exp (frag_now,
3565 f - frag_now->fr_literal + offset,
3568 reloc_howto->pc_relative,
3573 const struct powerpc_operand *operand;
3575 operand = &powerpc_operands[fixups[i].opindex];
3576 fixP = fix_new_exp (frag_now,
3577 f - frag_now->fr_literal,
3580 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3583 fixP->fx_pcrel_adjust = fixups[i].opindex;
3587 /* Handle a macro. Gather all the operands, transform them as
3588 described by the macro, and call md_assemble recursively. All the
3589 operands are separated by commas; we don't accept parentheses
3590 around operands here. */
3593 ppc_macro (char *str, const struct powerpc_macro *macro)
3604 /* Gather the users operands into the operands array. */
3609 if (count >= sizeof operands / sizeof operands[0])
3611 operands[count++] = s;
3612 s = strchr (s, ',');
3613 if (s == (char *) NULL)
3618 if (count != macro->operands)
3620 as_bad (_("wrong number of operands"));
3624 /* Work out how large the string must be (the size is unbounded
3625 because it includes user input). */
3627 format = macro->format;
3628 while (*format != '\0')
3637 arg = strtol (format + 1, &send, 10);
3638 know (send != format && arg < count);
3639 len += strlen (operands[arg]);
3644 /* Put the string together. */
3645 complete = s = XNEWVEC (char, len + 1);
3646 format = macro->format;
3647 while (*format != '\0')
3653 arg = strtol (format + 1, &send, 10);
3654 strcpy (s, operands[arg]);
3661 /* Assemble the constructed instruction. */
3662 md_assemble (complete);
3667 /* For ELF, add support for SHT_ORDERED. */
3670 ppc_section_type (char *str, size_t len)
3672 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3679 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3681 if (type == SHT_ORDERED)
3682 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3686 #endif /* OBJ_ELF */
3689 /* Pseudo-op handling. */
3691 /* The .byte pseudo-op. This is similar to the normal .byte
3692 pseudo-op, but it can also take a single ASCII string. */
3695 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3699 if (*input_line_pointer != '\"')
3705 /* Gather characters. A real double quote is doubled. Unusual
3706 characters are not permitted. */
3707 ++input_line_pointer;
3712 c = *input_line_pointer++;
3716 if (*input_line_pointer != '\"')
3718 ++input_line_pointer;
3721 FRAG_APPEND_1_CHAR (c);
3725 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3726 as_warn (_("data in executable section"));
3727 demand_empty_rest_of_line ();
3732 /* XCOFF specific pseudo-op handling. */
3734 /* This is set if we are creating a .stabx symbol, since we don't want
3735 to handle symbol suffixes for such symbols. */
3736 static bfd_boolean ppc_stab_symbol;
3738 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3739 symbols in the .bss segment as though they were local common
3740 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3741 aligns .comm and .lcomm to 4 bytes. */
3744 ppc_comm (int lcomm)
3746 asection *current_seg = now_seg;
3747 subsegT current_subseg = now_subseg;
3753 symbolS *lcomm_sym = NULL;
3757 endc = get_symbol_name (&name);
3758 end_name = input_line_pointer;
3759 (void) restore_line_pointer (endc);
3761 if (*input_line_pointer != ',')
3763 as_bad (_("missing size"));
3764 ignore_rest_of_line ();
3767 ++input_line_pointer;
3769 size = get_absolute_expression ();
3772 as_bad (_("negative size"));
3773 ignore_rest_of_line ();
3779 /* The third argument to .comm is the alignment. */
3780 if (*input_line_pointer != ',')
3784 ++input_line_pointer;
3785 align = get_absolute_expression ();
3788 as_warn (_("ignoring bad alignment"));
3798 /* The third argument to .lcomm appears to be the real local
3799 common symbol to create. References to the symbol named in
3800 the first argument are turned into references to the third
3802 if (*input_line_pointer != ',')
3804 as_bad (_("missing real symbol name"));
3805 ignore_rest_of_line ();
3808 ++input_line_pointer;
3810 lcomm_endc = get_symbol_name (&lcomm_name);
3812 lcomm_sym = symbol_find_or_make (lcomm_name);
3814 (void) restore_line_pointer (lcomm_endc);
3816 /* The fourth argument to .lcomm is the alignment. */
3817 if (*input_line_pointer != ',')
3826 ++input_line_pointer;
3827 align = get_absolute_expression ();
3830 as_warn (_("ignoring bad alignment"));
3837 sym = symbol_find_or_make (name);
3840 if (S_IS_DEFINED (sym)
3841 || S_GET_VALUE (sym) != 0)
3843 as_bad (_("attempt to redefine symbol"));
3844 ignore_rest_of_line ();
3848 record_alignment (bss_section, align);
3851 || ! S_IS_DEFINED (lcomm_sym))
3860 S_SET_EXTERNAL (sym);
3864 symbol_get_tc (lcomm_sym)->output = 1;
3865 def_sym = lcomm_sym;
3869 subseg_set (bss_section, 1);
3870 frag_align (align, 0, 0);
3872 symbol_set_frag (def_sym, frag_now);
3873 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3874 def_size, (char *) NULL);
3876 S_SET_SEGMENT (def_sym, bss_section);
3877 symbol_get_tc (def_sym)->align = align;
3881 /* Align the size of lcomm_sym. */
3882 symbol_get_frag (lcomm_sym)->fr_offset =
3883 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3884 &~ ((1 << align) - 1));
3885 if (align > symbol_get_tc (lcomm_sym)->align)
3886 symbol_get_tc (lcomm_sym)->align = align;
3891 /* Make sym an offset from lcomm_sym. */
3892 S_SET_SEGMENT (sym, bss_section);
3893 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3894 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3895 symbol_get_frag (lcomm_sym)->fr_offset += size;
3898 subseg_set (current_seg, current_subseg);
3900 demand_empty_rest_of_line ();
3903 /* The .csect pseudo-op. This switches us into a different
3904 subsegment. The first argument is a symbol whose value is the
3905 start of the .csect. In COFF, csect symbols get special aux
3906 entries defined by the x_csect field of union internal_auxent. The
3907 optional second argument is the alignment (the default is 2). */
3910 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3917 endc = get_symbol_name (&name);
3919 sym = symbol_find_or_make (name);
3921 (void) restore_line_pointer (endc);
3923 if (S_GET_NAME (sym)[0] == '\0')
3925 /* An unnamed csect is assumed to be [PR]. */
3926 symbol_get_tc (sym)->symbol_class = XMC_PR;
3930 if (*input_line_pointer == ',')
3932 ++input_line_pointer;
3933 align = get_absolute_expression ();
3936 ppc_change_csect (sym, align);
3938 demand_empty_rest_of_line ();
3941 /* Change to a different csect. */
3944 ppc_change_csect (symbolS *sym, offsetT align)
3946 if (S_IS_DEFINED (sym))
3947 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3957 /* This is a new csect. We need to look at the symbol class to
3958 figure out whether it should go in the text section or the
3962 switch (symbol_get_tc (sym)->symbol_class)
3972 S_SET_SEGMENT (sym, text_section);
3973 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3974 ++ppc_text_subsegment;
3975 list_ptr = &ppc_text_csects;
3985 if (ppc_toc_csect != NULL
3986 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
3987 == ppc_data_subsegment))
3989 S_SET_SEGMENT (sym, data_section);
3990 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
3991 ++ppc_data_subsegment;
3992 list_ptr = &ppc_data_csects;
3998 /* We set the obstack chunk size to a small value before
3999 changing subsegments, so that we don't use a lot of memory
4000 space for what may be a small section. */
4001 hold_chunksize = chunksize;
4004 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
4005 symbol_get_tc (sym)->subseg);
4007 chunksize = hold_chunksize;
4010 ppc_after_toc_frag = frag_now;
4012 record_alignment (sec, align);
4014 frag_align_code (align, 0);
4016 frag_align (align, 0, 0);
4018 symbol_set_frag (sym, frag_now);
4019 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4021 symbol_get_tc (sym)->align = align;
4022 symbol_get_tc (sym)->output = 1;
4023 symbol_get_tc (sym)->within = sym;
4025 for (list = *list_ptr;
4026 symbol_get_tc (list)->next != (symbolS *) NULL;
4027 list = symbol_get_tc (list)->next)
4029 symbol_get_tc (list)->next = sym;
4031 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4032 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4036 ppc_current_csect = sym;
4040 ppc_change_debug_section (unsigned int idx, subsegT subseg)
4044 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
4046 sec = subseg_new (dw->name, subseg);
4047 oldflags = bfd_get_section_flags (stdoutput, sec);
4048 if (oldflags == SEC_NO_FLAGS)
4050 /* Just created section. */
4051 gas_assert (dw_sections[idx].sect == NULL);
4053 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
4054 bfd_set_section_alignment (stdoutput, sec, 0);
4055 dw_sections[idx].sect = sec;
4058 /* Not anymore in a csect. */
4059 ppc_current_csect = NULL;
4062 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4063 .dwsect flag [, opt-label ]
4067 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
4071 const struct xcoff_dwsect_name *dw;
4072 struct dw_subsection *subseg;
4073 struct dw_section *dws;
4077 flag = get_absolute_expression ();
4079 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4080 if (xcoff_dwsect_names[i].flag == flag)
4082 dw = &xcoff_dwsect_names[i];
4086 /* Parse opt-label. */
4087 if (*input_line_pointer == ',')
4092 ++input_line_pointer;
4094 c = get_symbol_name (&label);
4095 opt_label = symbol_find_or_make (label);
4096 (void) restore_line_pointer (c);
4101 demand_empty_rest_of_line ();
4103 /* Return now in case of unknown subsection. */
4106 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4111 /* Find the subsection. */
4112 dws = &dw_sections[i];
4114 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4116 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4117 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4119 as_bad (_("label %s was not defined in this dwarf section"),
4120 S_GET_NAME (opt_label));
4121 subseg = dws->anon_subseg;
4125 subseg = symbol_get_tc (opt_label)->u.dw;
4130 /* Switch to the subsection. */
4131 ppc_change_debug_section (i, subseg->subseg);
4135 /* Create a new dw subsection. */
4136 subseg = XNEW (struct dw_subsection);
4138 if (opt_label == NULL)
4140 /* The anonymous one. */
4142 subseg->link = NULL;
4143 dws->anon_subseg = subseg;
4148 if (dws->list_subseg != NULL)
4149 subseg->subseg = dws->list_subseg->subseg + 1;
4153 subseg->link = dws->list_subseg;
4154 dws->list_subseg = subseg;
4155 symbol_get_tc (opt_label)->u.dw = subseg;
4158 ppc_change_debug_section (i, subseg->subseg);
4162 /* Add the length field. */
4163 expressionS *exp = &subseg->end_exp;
4166 if (opt_label != NULL)
4167 symbol_set_value_now (opt_label);
4169 /* Add the length field. Note that according to the AIX assembler
4170 manual, the size of the length field is 4 for powerpc32 but
4171 12 for powerpc64. */
4174 /* Write the 64bit marker. */
4175 md_number_to_chars (frag_more (4), -1, 4);
4178 exp->X_op = O_subtract;
4179 exp->X_op_symbol = symbol_temp_new_now ();
4180 exp->X_add_symbol = symbol_temp_make ();
4182 sz = ppc_obj64 ? 8 : 4;
4183 exp->X_add_number = -sz;
4184 emit_expr (exp, sz);
4189 /* This function handles the .text and .data pseudo-ops. These
4190 pseudo-ops aren't really used by XCOFF; we implement them for the
4191 convenience of people who aren't used to XCOFF. */
4194 ppc_section (int type)
4201 else if (type == 'd')
4206 sym = symbol_find_or_make (name);
4208 ppc_change_csect (sym, 2);
4210 demand_empty_rest_of_line ();
4213 /* This function handles the .section pseudo-op. This is mostly to
4214 give an error, since XCOFF only supports .text, .data and .bss, but
4215 we do permit the user to name the text or data section. */
4218 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4221 const char *real_name;
4225 c = get_symbol_name (&user_name);
4227 if (strcmp (user_name, ".text") == 0)
4228 real_name = ".text[PR]";
4229 else if (strcmp (user_name, ".data") == 0)
4230 real_name = ".data[RW]";
4233 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4234 (void) restore_line_pointer (c);
4235 ignore_rest_of_line ();
4239 (void) restore_line_pointer (c);
4241 sym = symbol_find_or_make (real_name);
4243 ppc_change_csect (sym, 2);
4245 demand_empty_rest_of_line ();
4248 /* The .extern pseudo-op. We create an undefined symbol. */
4251 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4256 endc = get_symbol_name (&name);
4258 (void) symbol_find_or_make (name);
4260 (void) restore_line_pointer (endc);
4262 demand_empty_rest_of_line ();
4265 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4268 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4274 endc = get_symbol_name (&name);
4276 sym = symbol_find_or_make (name);
4278 (void) restore_line_pointer (endc);
4280 symbol_get_tc (sym)->output = 1;
4282 demand_empty_rest_of_line ();
4285 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4286 relocations at the beginning of the current csect.
4288 (In principle, there's no reason why the relocations _have_ to be at
4289 the beginning. Anywhere in the csect would do. However, inserting
4290 at the beginning is what the native assembler does, and it helps to
4291 deal with cases where the .ref statements follow the section contents.)
4293 ??? .refs don't work for empty .csects. However, the native assembler
4294 doesn't report an error in this case, and neither yet do we. */
4297 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4302 if (ppc_current_csect == NULL)
4304 as_bad (_(".ref outside .csect"));
4305 ignore_rest_of_line ();
4311 c = get_symbol_name (&name);
4313 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4314 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4316 *input_line_pointer = c;
4317 SKIP_WHITESPACE_AFTER_NAME ();
4318 c = *input_line_pointer;
4321 input_line_pointer++;
4323 if (is_end_of_line[(unsigned char) *input_line_pointer])
4325 as_bad (_("missing symbol name"));
4326 ignore_rest_of_line ();
4333 demand_empty_rest_of_line ();
4336 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4337 although I don't know why it bothers. */
4340 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4347 endc = get_symbol_name (&name);
4349 sym = symbol_find_or_make (name);
4351 (void) restore_line_pointer (endc);
4353 if (*input_line_pointer != ',')
4355 as_bad (_("missing rename string"));
4356 ignore_rest_of_line ();
4359 ++input_line_pointer;
4361 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4363 demand_empty_rest_of_line ();
4366 /* The .stabx pseudo-op. This is similar to a normal .stabs
4367 pseudo-op, but slightly different. A sample is
4368 .stabx "main:F-1",.main,142,0
4369 The first argument is the symbol name to create. The second is the
4370 value, and the third is the storage class. The fourth seems to be
4371 always zero, and I am assuming it is the type. */
4374 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4381 name = demand_copy_C_string (&len);
4383 if (*input_line_pointer != ',')
4385 as_bad (_("missing value"));
4388 ++input_line_pointer;
4390 ppc_stab_symbol = TRUE;
4391 sym = symbol_make (name);
4392 ppc_stab_symbol = FALSE;
4394 symbol_get_tc (sym)->real_name = name;
4396 (void) expression (&exp);
4403 as_bad (_("illegal .stabx expression; zero assumed"));
4404 exp.X_add_number = 0;
4407 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4408 symbol_set_frag (sym, &zero_address_frag);
4412 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4413 symbol_set_value_expression (sym, &exp);
4417 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4418 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4423 /* The value is some complex expression. This will probably
4424 fail at some later point, but this is probably the right
4425 thing to do here. */
4426 symbol_set_value_expression (sym, &exp);
4430 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4431 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4433 if (*input_line_pointer != ',')
4435 as_bad (_("missing class"));
4438 ++input_line_pointer;
4440 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4442 if (*input_line_pointer != ',')
4444 as_bad (_("missing type"));
4447 ++input_line_pointer;
4449 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4451 symbol_get_tc (sym)->output = 1;
4453 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4458 .stabx "z",arrays_,133,0
4461 .comm arrays_,13768,3
4463 resolve_symbol_value will copy the exp's "within" into sym's when the
4464 offset is 0. Since this seems to be corner case problem,
4465 only do the correction for storage class C_STSYM. A better solution
4466 would be to have the tc field updated in ppc_symbol_new_hook. */
4468 if (exp.X_op == O_symbol)
4470 if (ppc_current_block == NULL)
4471 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4473 symbol_get_tc (sym)->within = ppc_current_block;
4474 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4478 if (exp.X_op != O_symbol
4479 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4480 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4481 ppc_frob_label (sym);
4484 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4485 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4486 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4487 symbol_get_tc (ppc_current_csect)->within = sym;
4490 demand_empty_rest_of_line ();
4493 /* The .function pseudo-op. This takes several arguments. The first
4494 argument seems to be the external name of the symbol. The second
4495 argument seems to be the label for the start of the function. gcc
4496 uses the same name for both. I have no idea what the third and
4497 fourth arguments are meant to be. The optional fifth argument is
4498 an expression for the size of the function. In COFF this symbol
4499 gets an aux entry like that used for a csect. */
4502 ppc_function (int ignore ATTRIBUTE_UNUSED)
4510 endc = get_symbol_name (&name);
4512 /* Ignore any [PR] suffix. */
4513 name = ppc_canonicalize_symbol_name (name);
4514 s = strchr (name, '[');
4515 if (s != (char *) NULL
4516 && strcmp (s + 1, "PR]") == 0)
4519 ext_sym = symbol_find_or_make (name);
4521 (void) restore_line_pointer (endc);
4523 if (*input_line_pointer != ',')
4525 as_bad (_("missing symbol name"));
4526 ignore_rest_of_line ();
4529 ++input_line_pointer;
4531 endc = get_symbol_name (&name);
4533 lab_sym = symbol_find_or_make (name);
4535 (void) restore_line_pointer (endc);
4537 if (ext_sym != lab_sym)
4541 exp.X_op = O_symbol;
4542 exp.X_add_symbol = lab_sym;
4543 exp.X_op_symbol = NULL;
4544 exp.X_add_number = 0;
4546 symbol_set_value_expression (ext_sym, &exp);
4549 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4550 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4551 symbol_get_tc (ext_sym)->output = 1;
4553 if (*input_line_pointer == ',')
4557 /* Ignore the third argument. */
4558 ++input_line_pointer;
4560 if (*input_line_pointer == ',')
4562 /* Ignore the fourth argument. */
4563 ++input_line_pointer;
4565 if (*input_line_pointer == ',')
4567 /* The fifth argument is the function size. */
4568 ++input_line_pointer;
4569 symbol_get_tc (ext_sym)->u.size = symbol_new
4570 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4571 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4576 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4577 SF_SET_FUNCTION (ext_sym);
4578 SF_SET_PROCESS (ext_sym);
4579 coff_add_linesym (ext_sym);
4581 demand_empty_rest_of_line ();
4584 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4585 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4586 with the correct line number */
4588 static symbolS *saved_bi_sym = 0;
4591 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4595 sym = symbol_make (".bf");
4596 S_SET_SEGMENT (sym, text_section);
4597 symbol_set_frag (sym, frag_now);
4598 S_SET_VALUE (sym, frag_now_fix ());
4599 S_SET_STORAGE_CLASS (sym, C_FCN);
4601 coff_line_base = get_absolute_expression ();
4603 S_SET_NUMBER_AUXILIARY (sym, 1);
4604 SA_SET_SYM_LNNO (sym, coff_line_base);
4606 /* Line number for bi. */
4609 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4614 symbol_get_tc (sym)->output = 1;
4616 ppc_frob_label (sym);
4618 demand_empty_rest_of_line ();
4621 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4622 ".ef", except that the line number is absolute, not relative to the
4623 most recent ".bf" symbol. */
4626 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4630 sym = symbol_make (".ef");
4631 S_SET_SEGMENT (sym, text_section);
4632 symbol_set_frag (sym, frag_now);
4633 S_SET_VALUE (sym, frag_now_fix ());
4634 S_SET_STORAGE_CLASS (sym, C_FCN);
4635 S_SET_NUMBER_AUXILIARY (sym, 1);
4636 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4637 symbol_get_tc (sym)->output = 1;
4639 ppc_frob_label (sym);
4641 demand_empty_rest_of_line ();
4644 /* The .bi and .ei pseudo-ops. These take a string argument and
4645 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4646 the symbol list. The value of .bi will be know when the next .bf
4652 static symbolS *last_biei;
4659 name = demand_copy_C_string (&len);
4661 /* The value of these symbols is actually file offset. Here we set
4662 the value to the index into the line number entries. In
4663 ppc_frob_symbols we set the fix_line field, which will cause BFD
4664 to do the right thing. */
4666 sym = symbol_make (name);
4667 /* obj-coff.c currently only handles line numbers correctly in the
4669 S_SET_SEGMENT (sym, text_section);
4670 S_SET_VALUE (sym, coff_n_line_nos);
4671 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4673 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4674 symbol_get_tc (sym)->output = 1;
4682 for (look = last_biei ? last_biei : symbol_rootP;
4683 (look != (symbolS *) NULL
4684 && (S_GET_STORAGE_CLASS (look) == C_FILE
4685 || S_GET_STORAGE_CLASS (look) == C_BINCL
4686 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4687 look = symbol_next (look))
4689 if (look != (symbolS *) NULL)
4691 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4692 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4696 demand_empty_rest_of_line ();
4699 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4700 There is one argument, which is a csect symbol. The value of the
4701 .bs symbol is the index of this csect symbol. */
4704 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4711 if (ppc_current_block != NULL)
4712 as_bad (_("nested .bs blocks"));
4714 endc = get_symbol_name (&name);
4716 csect = symbol_find_or_make (name);
4718 (void) restore_line_pointer (endc);
4720 sym = symbol_make (".bs");
4721 S_SET_SEGMENT (sym, now_seg);
4722 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4723 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4724 symbol_get_tc (sym)->output = 1;
4726 symbol_get_tc (sym)->within = csect;
4728 ppc_frob_label (sym);
4730 ppc_current_block = sym;
4732 demand_empty_rest_of_line ();
4735 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4738 ppc_es (int ignore ATTRIBUTE_UNUSED)
4742 if (ppc_current_block == NULL)
4743 as_bad (_(".es without preceding .bs"));
4745 sym = symbol_make (".es");
4746 S_SET_SEGMENT (sym, now_seg);
4747 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4748 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4749 symbol_get_tc (sym)->output = 1;
4751 ppc_frob_label (sym);
4753 ppc_current_block = NULL;
4755 demand_empty_rest_of_line ();
4758 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4762 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4766 sym = symbol_make (".bb");
4767 S_SET_SEGMENT (sym, text_section);
4768 symbol_set_frag (sym, frag_now);
4769 S_SET_VALUE (sym, frag_now_fix ());
4770 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4772 S_SET_NUMBER_AUXILIARY (sym, 1);
4773 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4775 symbol_get_tc (sym)->output = 1;
4777 SF_SET_PROCESS (sym);
4779 ppc_frob_label (sym);
4781 demand_empty_rest_of_line ();
4784 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4788 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4792 sym = symbol_make (".eb");
4793 S_SET_SEGMENT (sym, text_section);
4794 symbol_set_frag (sym, frag_now);
4795 S_SET_VALUE (sym, frag_now_fix ());
4796 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4797 S_SET_NUMBER_AUXILIARY (sym, 1);
4798 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4799 symbol_get_tc (sym)->output = 1;
4801 SF_SET_PROCESS (sym);
4803 ppc_frob_label (sym);
4805 demand_empty_rest_of_line ();
4808 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4812 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4818 name = demand_copy_C_string (&len);
4819 sym = symbol_make (name);
4820 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4821 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4822 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4823 S_SET_VALUE (sym, 0);
4824 symbol_get_tc (sym)->output = 1;
4826 ppc_frob_label (sym);
4828 demand_empty_rest_of_line ();
4831 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4834 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4838 sym = symbol_make (".ec");
4839 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4840 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4841 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4842 S_SET_VALUE (sym, 0);
4843 symbol_get_tc (sym)->output = 1;
4845 ppc_frob_label (sym);
4847 demand_empty_rest_of_line ();
4850 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4853 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4855 if (ppc_toc_csect != (symbolS *) NULL)
4856 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4863 subseg = ppc_data_subsegment;
4864 ++ppc_data_subsegment;
4866 subseg_new (segment_name (data_section), subseg);
4867 ppc_toc_frag = frag_now;
4869 sym = symbol_find_or_make ("TOC[TC0]");
4870 symbol_set_frag (sym, frag_now);
4871 S_SET_SEGMENT (sym, data_section);
4872 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4873 symbol_get_tc (sym)->subseg = subseg;
4874 symbol_get_tc (sym)->output = 1;
4875 symbol_get_tc (sym)->within = sym;
4877 ppc_toc_csect = sym;
4879 for (list = ppc_data_csects;
4880 symbol_get_tc (list)->next != (symbolS *) NULL;
4881 list = symbol_get_tc (list)->next)
4883 symbol_get_tc (list)->next = sym;
4885 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4886 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4890 ppc_current_csect = ppc_toc_csect;
4892 demand_empty_rest_of_line ();
4895 /* The AIX assembler automatically aligns the operands of a .long or
4896 .short pseudo-op, and we want to be compatible. */
4899 ppc_xcoff_cons (int log_size)
4901 frag_align (log_size, 0, 0);
4902 record_alignment (now_seg, log_size);
4903 cons (1 << log_size);
4907 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4912 (void) expression (&exp);
4914 if (exp.X_op != O_constant)
4916 as_bad (_("non-constant byte count"));
4920 byte_count = exp.X_add_number;
4922 if (*input_line_pointer != ',')
4924 as_bad (_("missing value"));
4928 ++input_line_pointer;
4933 ppc_xcoff_end (void)
4937 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4939 struct dw_section *dws = &dw_sections[i];
4940 struct dw_subsection *dwss;
4942 if (dws->anon_subseg)
4944 dwss = dws->anon_subseg;
4945 dwss->link = dws->list_subseg;
4948 dwss = dws->list_subseg;
4950 for (; dwss != NULL; dwss = dwss->link)
4951 if (dwss->end_exp.X_add_symbol != NULL)
4953 subseg_set (dws->sect, dwss->subseg);
4954 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4959 #endif /* OBJ_XCOFF */
4960 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4962 /* The .tc pseudo-op. This is used when generating either XCOFF or
4963 ELF. This takes two or more arguments.
4965 When generating XCOFF output, the first argument is the name to
4966 give to this location in the toc; this will be a symbol with class
4967 TC. The rest of the arguments are N-byte values to actually put at
4968 this location in the TOC; often there is just one more argument, a
4969 relocatable symbol reference. The size of the value to store
4970 depends on target word size. A 32-bit target uses 4-byte values, a
4971 64-bit target uses 8-byte values.
4973 When not generating XCOFF output, the arguments are the same, but
4974 the first argument is simply ignored. */
4977 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4981 /* Define the TOC symbol name. */
4987 if (ppc_toc_csect == (symbolS *) NULL
4988 || ppc_toc_csect != ppc_current_csect)
4990 as_bad (_(".tc not in .toc section"));
4991 ignore_rest_of_line ();
4995 endc = get_symbol_name (&name);
4997 sym = symbol_find_or_make (name);
4999 (void) restore_line_pointer (endc);
5001 if (S_IS_DEFINED (sym))
5005 label = symbol_get_tc (ppc_current_csect)->within;
5006 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
5008 as_bad (_(".tc with no label"));
5009 ignore_rest_of_line ();
5013 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
5014 symbol_set_frag (label, symbol_get_frag (sym));
5015 S_SET_VALUE (label, S_GET_VALUE (sym));
5017 while (! is_end_of_line[(unsigned char) *input_line_pointer])
5018 ++input_line_pointer;
5023 S_SET_SEGMENT (sym, now_seg);
5024 symbol_set_frag (sym, frag_now);
5025 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5026 symbol_get_tc (sym)->symbol_class = XMC_TC;
5027 symbol_get_tc (sym)->output = 1;
5029 ppc_frob_label (sym);
5032 #endif /* OBJ_XCOFF */
5036 /* Skip the TOC symbol name. */
5037 while (is_part_of_name (*input_line_pointer)
5038 || *input_line_pointer == ' '
5039 || *input_line_pointer == '['
5040 || *input_line_pointer == ']'
5041 || *input_line_pointer == '{'
5042 || *input_line_pointer == '}')
5043 ++input_line_pointer;
5045 /* Align to a four/eight byte boundary. */
5046 align = ppc_obj64 ? 3 : 2;
5047 frag_align (align, 0, 0);
5048 record_alignment (now_seg, align);
5049 #endif /* OBJ_ELF */
5051 if (*input_line_pointer != ',')
5052 demand_empty_rest_of_line ();
5055 ++input_line_pointer;
5056 cons (ppc_obj64 ? 8 : 4);
5060 /* Pseudo-op .machine. */
5063 ppc_machine (int ignore ATTRIBUTE_UNUSED)
5067 #define MAX_HISTORY 100
5068 static ppc_cpu_t *cpu_history;
5069 static int curr_hist;
5073 c = get_symbol_name (&cpu_string);
5074 cpu_string = xstrdup (cpu_string);
5075 (void) restore_line_pointer (c);
5077 if (cpu_string != NULL)
5079 ppc_cpu_t old_cpu = ppc_cpu;
5083 for (p = cpu_string; *p != 0; p++)
5086 if (strcmp (cpu_string, "push") == 0)
5088 if (cpu_history == NULL)
5089 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
5091 if (curr_hist >= MAX_HISTORY)
5092 as_bad (_(".machine stack overflow"));
5094 cpu_history[curr_hist++] = ppc_cpu;
5096 else if (strcmp (cpu_string, "pop") == 0)
5099 as_bad (_(".machine stack underflow"));
5101 ppc_cpu = cpu_history[--curr_hist];
5103 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
5106 as_bad (_("invalid machine `%s'"), cpu_string);
5108 if (ppc_cpu != old_cpu)
5109 ppc_setup_opcodes ();
5112 demand_empty_rest_of_line ();
5114 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5118 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5120 /* Set the current section. */
5122 ppc_set_current_section (segT new)
5124 ppc_previous_section = ppc_current_section;
5125 ppc_current_section = new;
5128 /* pseudo-op: .previous
5129 behaviour: toggles the current section with the previous section.
5131 warnings: "No previous section" */
5134 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5136 if (ppc_previous_section == NULL)
5138 as_warn (_("no previous section to return to, ignored."));
5142 subseg_set (ppc_previous_section, 0);
5144 ppc_set_current_section (ppc_previous_section);
5147 /* pseudo-op: .pdata
5148 behaviour: predefined read only data section
5152 initial: .section .pdata "adr3"
5153 a - don't know -- maybe a misprint
5154 d - initialized data
5156 3 - double word aligned (that would be 4 byte boundary)
5159 Tag index tables (also known as the function table) for exception
5160 handling, debugging, etc. */
5163 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5165 if (pdata_section == 0)
5167 pdata_section = subseg_new (".pdata", 0);
5169 bfd_set_section_flags (stdoutput, pdata_section,
5170 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5171 | SEC_READONLY | SEC_DATA ));
5173 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5177 pdata_section = subseg_new (".pdata", 0);
5179 ppc_set_current_section (pdata_section);
5182 /* pseudo-op: .ydata
5183 behaviour: predefined read only data section
5187 initial: .section .ydata "drw3"
5188 a - don't know -- maybe a misprint
5189 d - initialized data
5191 3 - double word aligned (that would be 4 byte boundary)
5193 Tag tables (also known as the scope table) for exception handling,
5197 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5199 if (ydata_section == 0)
5201 ydata_section = subseg_new (".ydata", 0);
5202 bfd_set_section_flags (stdoutput, ydata_section,
5203 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5204 | SEC_READONLY | SEC_DATA ));
5206 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5210 ydata_section = subseg_new (".ydata", 0);
5212 ppc_set_current_section (ydata_section);
5215 /* pseudo-op: .reldata
5216 behaviour: predefined read write data section
5217 double word aligned (4-byte)
5218 FIXME: relocation is applied to it
5219 FIXME: what's the difference between this and .data?
5222 initial: .section .reldata "drw3"
5223 d - initialized data
5226 3 - double word aligned (that would be 8 byte boundary)
5229 Like .data, but intended to hold data subject to relocation, such as
5230 function descriptors, etc. */
5233 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5235 if (reldata_section == 0)
5237 reldata_section = subseg_new (".reldata", 0);
5239 bfd_set_section_flags (stdoutput, reldata_section,
5240 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5243 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5247 reldata_section = subseg_new (".reldata", 0);
5249 ppc_set_current_section (reldata_section);
5252 /* pseudo-op: .rdata
5253 behaviour: predefined read only data section
5257 initial: .section .rdata "dr3"
5258 d - initialized data
5260 3 - double word aligned (that would be 4 byte boundary) */
5263 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5265 if (rdata_section == 0)
5267 rdata_section = subseg_new (".rdata", 0);
5268 bfd_set_section_flags (stdoutput, rdata_section,
5269 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5270 | SEC_READONLY | SEC_DATA ));
5272 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5276 rdata_section = subseg_new (".rdata", 0);
5278 ppc_set_current_section (rdata_section);
5281 /* pseudo-op: .ualong
5282 behaviour: much like .int, with the exception that no alignment is
5284 FIXME: test the alignment statement
5289 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5295 /* pseudo-op: .znop <symbol name>
5296 behaviour: Issue a nop instruction
5297 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5298 the supplied symbol name.
5300 warnings: Missing symbol name */
5303 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5306 const struct powerpc_opcode *opcode;
5313 /* Strip out the symbol name. */
5314 c = get_symbol_name (&symbol_name);
5316 name = xstrdup (symbol_name);
5318 sym = symbol_find_or_make (name);
5320 *input_line_pointer = c;
5322 SKIP_WHITESPACE_AFTER_NAME ();
5324 /* Look up the opcode in the hash table. */
5325 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5327 /* Stick in the nop. */
5328 insn = opcode->opcode;
5330 /* Write out the instruction. */
5332 md_number_to_chars (f, insn, 4);
5334 f - frag_now->fr_literal,
5339 BFD_RELOC_16_GOT_PCREL);
5349 ppc_pe_comm (int lcomm)
5358 c = get_symbol_name (&name);
5360 /* just after name is now '\0'. */
5361 p = input_line_pointer;
5363 SKIP_WHITESPACE_AFTER_NAME ();
5364 if (*input_line_pointer != ',')
5366 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5367 ignore_rest_of_line ();
5371 input_line_pointer++; /* skip ',' */
5372 if ((temp = get_absolute_expression ()) < 0)
5374 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5375 ignore_rest_of_line ();
5381 /* The third argument to .comm is the alignment. */
5382 if (*input_line_pointer != ',')
5386 ++input_line_pointer;
5387 align = get_absolute_expression ();
5390 as_warn (_("ignoring bad alignment"));
5397 symbolP = symbol_find_or_make (name);
5400 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5402 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5403 S_GET_NAME (symbolP));
5404 ignore_rest_of_line ();
5408 if (S_GET_VALUE (symbolP))
5410 if (S_GET_VALUE (symbolP) != (valueT) temp)
5411 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5412 S_GET_NAME (symbolP),
5413 (long) S_GET_VALUE (symbolP),
5418 S_SET_VALUE (symbolP, (valueT) temp);
5419 S_SET_EXTERNAL (symbolP);
5420 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5423 demand_empty_rest_of_line ();
5427 * implement the .section pseudo op:
5428 * .section name {, "flags"}
5430 * | +--- optional flags: 'b' for bss
5432 * +-- section name 'l' for lib
5436 * 'd' (apparently m88k for data)
5438 * But if the argument is not a quoted string, treat it as a
5439 * subsegment number.
5441 * FIXME: this is a copy of the section processing from obj-coff.c, with
5442 * additions/changes for the moto-pas assembler support. There are three
5445 * FIXME: I just noticed this. This doesn't work at all really. It it
5446 * setting bits that bfd probably neither understands or uses. The
5447 * correct approach (?) will have to incorporate extra fields attached
5448 * to the section to hold the system specific stuff. (krk)
5451 * 'a' - unknown - referred to in documentation, but no definition supplied
5452 * 'c' - section has code
5453 * 'd' - section has initialized data
5454 * 'u' - section has uninitialized data
5455 * 'i' - section contains directives (info)
5456 * 'n' - section can be discarded
5457 * 'R' - remove section at link time
5459 * Section Protection:
5460 * 'r' - section is readable
5461 * 'w' - section is writable
5462 * 'x' - section is executable
5463 * 's' - section is sharable
5465 * Section Alignment:
5466 * '0' - align to byte boundary
5467 * '1' - align to halfword boundary
5468 * '2' - align to word boundary
5469 * '3' - align to doubleword boundary
5470 * '4' - align to quadword boundary
5471 * '5' - align to 32 byte boundary
5472 * '6' - align to 64 byte boundary
5477 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5479 /* Strip out the section name. */
5488 c = get_symbol_name (§ion_name);
5490 name = xstrdup (section_name);
5492 *input_line_pointer = c;
5494 SKIP_WHITESPACE_AFTER_NAME ();
5497 flags = SEC_NO_FLAGS;
5499 if (strcmp (name, ".idata$2") == 0)
5503 else if (strcmp (name, ".idata$3") == 0)
5507 else if (strcmp (name, ".idata$4") == 0)
5511 else if (strcmp (name, ".idata$5") == 0)
5515 else if (strcmp (name, ".idata$6") == 0)
5520 /* Default alignment to 16 byte boundary. */
5523 if (*input_line_pointer == ',')
5525 ++input_line_pointer;
5527 if (*input_line_pointer != '"')
5528 exp = get_absolute_expression ();
5531 ++input_line_pointer;
5532 while (*input_line_pointer != '"'
5533 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5535 switch (*input_line_pointer)
5537 /* Section Contents */
5538 case 'a': /* unknown */
5539 as_bad (_("unsupported section attribute -- 'a'"));
5541 case 'c': /* code section */
5544 case 'd': /* section has initialized data */
5547 case 'u': /* section has uninitialized data */
5548 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5552 case 'i': /* section contains directives (info) */
5553 /* FIXME: This is IMAGE_SCN_LNK_INFO
5555 flags |= SEC_HAS_CONTENTS;
5557 case 'n': /* section can be discarded */
5560 case 'R': /* Remove section at link time */
5561 flags |= SEC_NEVER_LOAD;
5563 #if IFLICT_BRAIN_DAMAGE
5564 /* Section Protection */
5565 case 'r': /* section is readable */
5566 flags |= IMAGE_SCN_MEM_READ;
5568 case 'w': /* section is writable */
5569 flags |= IMAGE_SCN_MEM_WRITE;
5571 case 'x': /* section is executable */
5572 flags |= IMAGE_SCN_MEM_EXECUTE;
5574 case 's': /* section is sharable */
5575 flags |= IMAGE_SCN_MEM_SHARED;
5578 /* Section Alignment */
5579 case '0': /* align to byte boundary */
5580 flags |= IMAGE_SCN_ALIGN_1BYTES;
5583 case '1': /* align to halfword boundary */
5584 flags |= IMAGE_SCN_ALIGN_2BYTES;
5587 case '2': /* align to word boundary */
5588 flags |= IMAGE_SCN_ALIGN_4BYTES;
5591 case '3': /* align to doubleword boundary */
5592 flags |= IMAGE_SCN_ALIGN_8BYTES;
5595 case '4': /* align to quadword boundary */
5596 flags |= IMAGE_SCN_ALIGN_16BYTES;
5599 case '5': /* align to 32 byte boundary */
5600 flags |= IMAGE_SCN_ALIGN_32BYTES;
5603 case '6': /* align to 64 byte boundary */
5604 flags |= IMAGE_SCN_ALIGN_64BYTES;
5609 as_bad (_("unknown section attribute '%c'"),
5610 *input_line_pointer);
5613 ++input_line_pointer;
5615 if (*input_line_pointer == '"')
5616 ++input_line_pointer;
5620 sec = subseg_new (name, (subsegT) exp);
5622 ppc_set_current_section (sec);
5624 if (flags != SEC_NO_FLAGS)
5626 if (! bfd_set_section_flags (stdoutput, sec, flags))
5627 as_bad (_("error setting flags for \"%s\": %s"),
5628 bfd_section_name (stdoutput, sec),
5629 bfd_errmsg (bfd_get_error ()));
5632 bfd_set_section_alignment (stdoutput, sec, align);
5636 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5642 endc = get_symbol_name (&name);
5644 ext_sym = symbol_find_or_make (name);
5646 (void) restore_line_pointer (endc);
5648 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5649 SF_SET_FUNCTION (ext_sym);
5650 SF_SET_PROCESS (ext_sym);
5651 coff_add_linesym (ext_sym);
5653 demand_empty_rest_of_line ();
5657 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5659 if (tocdata_section == 0)
5661 tocdata_section = subseg_new (".tocd", 0);
5662 /* FIXME: section flags won't work. */
5663 bfd_set_section_flags (stdoutput, tocdata_section,
5664 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5665 | SEC_READONLY | SEC_DATA));
5667 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5671 rdata_section = subseg_new (".tocd", 0);
5674 ppc_set_current_section (tocdata_section);
5676 demand_empty_rest_of_line ();
5679 /* Don't adjust TOC relocs to use the section symbol. */
5682 ppc_pe_fix_adjustable (fixS *fix)
5684 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5691 /* XCOFF specific symbol and file handling. */
5693 /* Canonicalize the symbol name. We use the to force the suffix, if
5694 any, to use square brackets, and to be in upper case. */
5697 ppc_canonicalize_symbol_name (char *name)
5701 if (ppc_stab_symbol)
5704 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5718 for (s++; *s != '\0' && *s != brac; s++)
5721 if (*s == '\0' || s[1] != '\0')
5722 as_bad (_("bad symbol suffix"));
5730 /* Set the class of a symbol based on the suffix, if any. This is
5731 called whenever a new symbol is created. */
5734 ppc_symbol_new_hook (symbolS *sym)
5736 struct ppc_tc_sy *tc;
5739 tc = symbol_get_tc (sym);
5742 tc->symbol_class = -1;
5743 tc->real_name = NULL;
5750 if (ppc_stab_symbol)
5753 s = strchr (S_GET_NAME (sym), '[');
5754 if (s == (const char *) NULL)
5756 /* There is no suffix. */
5765 if (strcmp (s, "BS]") == 0)
5766 tc->symbol_class = XMC_BS;
5769 if (strcmp (s, "DB]") == 0)
5770 tc->symbol_class = XMC_DB;
5771 else if (strcmp (s, "DS]") == 0)
5772 tc->symbol_class = XMC_DS;
5775 if (strcmp (s, "GL]") == 0)
5776 tc->symbol_class = XMC_GL;
5779 if (strcmp (s, "PR]") == 0)
5780 tc->symbol_class = XMC_PR;
5783 if (strcmp (s, "RO]") == 0)
5784 tc->symbol_class = XMC_RO;
5785 else if (strcmp (s, "RW]") == 0)
5786 tc->symbol_class = XMC_RW;
5789 if (strcmp (s, "SV]") == 0)
5790 tc->symbol_class = XMC_SV;
5793 if (strcmp (s, "TC]") == 0)
5794 tc->symbol_class = XMC_TC;
5795 else if (strcmp (s, "TI]") == 0)
5796 tc->symbol_class = XMC_TI;
5797 else if (strcmp (s, "TB]") == 0)
5798 tc->symbol_class = XMC_TB;
5799 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5800 tc->symbol_class = XMC_TC0;
5803 if (strcmp (s, "UA]") == 0)
5804 tc->symbol_class = XMC_UA;
5805 else if (strcmp (s, "UC]") == 0)
5806 tc->symbol_class = XMC_UC;
5809 if (strcmp (s, "XO]") == 0)
5810 tc->symbol_class = XMC_XO;
5814 if (tc->symbol_class == -1)
5815 as_bad (_("unrecognized symbol suffix"));
5818 /* Set the class of a label based on where it is defined. This
5819 handles symbols without suffixes. Also, move the symbol so that it
5820 follows the csect symbol. */
5823 ppc_frob_label (symbolS *sym)
5825 if (ppc_current_csect != (symbolS *) NULL)
5827 if (symbol_get_tc (sym)->symbol_class == -1)
5828 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5830 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5831 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5832 &symbol_rootP, &symbol_lastP);
5833 symbol_get_tc (ppc_current_csect)->within = sym;
5834 symbol_get_tc (sym)->within = ppc_current_csect;
5838 dwarf2_emit_label (sym);
5842 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5843 seen. It tells ppc_adjust_symtab whether it needs to look through
5846 static bfd_boolean ppc_saw_abs;
5848 /* Change the name of a symbol just before writing it out. Set the
5849 real name if the .rename pseudo-op was used. Otherwise, remove any
5850 class suffix. Return 1 if the symbol should not be included in the
5854 ppc_frob_symbol (symbolS *sym)
5856 static symbolS *ppc_last_function;
5857 static symbolS *set_end;
5859 /* Discard symbols that should not be included in the output symbol
5861 if (! symbol_used_in_reloc_p (sym)
5862 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5863 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5864 && ! symbol_get_tc (sym)->output
5865 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5868 /* This one will disappear anyway. Don't make a csect sym for it. */
5869 if (sym == abs_section_sym)
5872 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5873 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5879 name = S_GET_NAME (sym);
5880 s = strchr (name, '[');
5881 if (s != (char *) NULL)
5887 snew = xstrndup (name, len);
5889 S_SET_NAME (sym, snew);
5893 if (set_end != (symbolS *) NULL)
5895 SA_SET_SYM_ENDNDX (set_end, sym);
5899 if (SF_GET_FUNCTION (sym))
5901 if (ppc_last_function != (symbolS *) NULL)
5902 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5903 ppc_last_function = sym;
5904 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5906 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5907 SA_SET_SYM_FSIZE (sym,
5908 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5911 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5912 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5914 if (ppc_last_function == (symbolS *) NULL)
5915 as_bad (_(".ef with no preceding .function"));
5918 set_end = ppc_last_function;
5919 ppc_last_function = NULL;
5921 /* We don't have a C_EFCN symbol, but we need to force the
5922 COFF backend to believe that it has seen one. */
5923 coff_last_function = NULL;
5927 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5928 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5929 && S_GET_STORAGE_CLASS (sym) != C_FILE
5930 && S_GET_STORAGE_CLASS (sym) != C_FCN
5931 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5932 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5933 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5934 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5935 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5936 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5937 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5939 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5940 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5941 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5944 union internal_auxent *a;
5946 /* Create a csect aux. */
5947 i = S_GET_NUMBER_AUXILIARY (sym);
5948 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5949 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5950 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5952 /* This is the TOC table. */
5953 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5954 a->x_csect.x_scnlen.l = 0;
5955 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5957 else if (symbol_get_tc (sym)->subseg != 0)
5959 /* This is a csect symbol. x_scnlen is the size of the
5961 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5962 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5963 S_GET_SEGMENT (sym))
5964 - S_GET_VALUE (sym));
5967 resolve_symbol_value (symbol_get_tc (sym)->next);
5968 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5969 - S_GET_VALUE (sym));
5971 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5973 else if (S_GET_SEGMENT (sym) == bss_section)
5975 /* This is a common symbol. */
5976 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5977 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5978 if (S_IS_EXTERNAL (sym))
5979 symbol_get_tc (sym)->symbol_class = XMC_RW;
5981 symbol_get_tc (sym)->symbol_class = XMC_BS;
5983 else if (S_GET_SEGMENT (sym) == absolute_section)
5985 /* This is an absolute symbol. The csect will be created by
5986 ppc_adjust_symtab. */
5988 a->x_csect.x_smtyp = XTY_LD;
5989 if (symbol_get_tc (sym)->symbol_class == -1)
5990 symbol_get_tc (sym)->symbol_class = XMC_XO;
5992 else if (! S_IS_DEFINED (sym))
5994 /* This is an external symbol. */
5995 a->x_csect.x_scnlen.l = 0;
5996 a->x_csect.x_smtyp = XTY_ER;
5998 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
6002 /* This is a TOC definition. x_scnlen is the size of the
6004 next = symbol_next (sym);
6005 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
6006 next = symbol_next (next);
6007 if (next == (symbolS *) NULL
6008 || symbol_get_tc (next)->symbol_class != XMC_TC)
6010 if (ppc_after_toc_frag == (fragS *) NULL)
6011 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
6013 - S_GET_VALUE (sym));
6015 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
6016 - S_GET_VALUE (sym));
6020 resolve_symbol_value (next);
6021 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
6022 - S_GET_VALUE (sym));
6024 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
6030 /* This is a normal symbol definition. x_scnlen is the
6031 symbol index of the containing csect. */
6032 if (S_GET_SEGMENT (sym) == text_section)
6033 csect = ppc_text_csects;
6034 else if (S_GET_SEGMENT (sym) == data_section)
6035 csect = ppc_data_csects;
6039 /* Skip the initial dummy symbol. */
6040 csect = symbol_get_tc (csect)->next;
6042 if (csect == (symbolS *) NULL)
6044 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
6045 a->x_csect.x_scnlen.l = 0;
6049 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
6051 resolve_symbol_value (symbol_get_tc (csect)->next);
6052 if (S_GET_VALUE (symbol_get_tc (csect)->next)
6053 > S_GET_VALUE (sym))
6055 csect = symbol_get_tc (csect)->next;
6058 a->x_csect.x_scnlen.p =
6059 coffsymbol (symbol_get_bfdsym (csect))->native;
6060 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
6063 a->x_csect.x_smtyp = XTY_LD;
6066 a->x_csect.x_parmhash = 0;
6067 a->x_csect.x_snhash = 0;
6068 if (symbol_get_tc (sym)->symbol_class == -1)
6069 a->x_csect.x_smclas = XMC_PR;
6071 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
6072 a->x_csect.x_stab = 0;
6073 a->x_csect.x_snstab = 0;
6075 /* Don't let the COFF backend resort these symbols. */
6076 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
6078 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
6080 /* We want the value to be the symbol index of the referenced
6081 csect symbol. BFD will do that for us if we set the right
6083 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
6084 combined_entry_type *c = coffsymbol (bsym)->native;
6086 S_SET_VALUE (sym, (valueT) (size_t) c);
6087 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
6089 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
6094 block = symbol_get_tc (sym)->within;
6097 /* The value is the offset from the enclosing csect. */
6100 csect = symbol_get_tc (block)->within;
6101 resolve_symbol_value (csect);
6102 base = S_GET_VALUE (csect);
6107 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6109 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6110 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6112 /* We want the value to be a file offset into the line numbers.
6113 BFD will do that for us if we set the right flags. We have
6114 already set the value correctly. */
6115 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6121 /* Adjust the symbol table. This creates csect symbols for all
6122 absolute symbols. */
6125 ppc_adjust_symtab (void)
6132 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6136 union internal_auxent *a;
6138 if (S_GET_SEGMENT (sym) != absolute_section)
6141 csect = symbol_create (".abs[XO]", absolute_section,
6142 S_GET_VALUE (sym), &zero_address_frag);
6143 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6144 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6145 i = S_GET_NUMBER_AUXILIARY (csect);
6146 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6147 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6148 a->x_csect.x_scnlen.l = 0;
6149 a->x_csect.x_smtyp = XTY_SD;
6150 a->x_csect.x_parmhash = 0;
6151 a->x_csect.x_snhash = 0;
6152 a->x_csect.x_smclas = XMC_XO;
6153 a->x_csect.x_stab = 0;
6154 a->x_csect.x_snstab = 0;
6156 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6158 i = S_GET_NUMBER_AUXILIARY (sym);
6159 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6160 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6161 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6164 ppc_saw_abs = FALSE;
6167 /* Set the VMA for a section. This is called on all the sections in
6171 ppc_frob_section (asection *sec)
6173 static bfd_vma vma = 0;
6175 /* Dwarf sections start at 0. */
6176 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6179 vma = md_section_align (sec, vma);
6180 bfd_set_section_vma (stdoutput, sec, vma);
6181 vma += bfd_section_size (stdoutput, sec);
6184 #endif /* OBJ_XCOFF */
6187 md_atof (int type, char *litp, int *sizep)
6189 return ieee_md_atof (type, litp, sizep, target_big_endian);
6192 /* Write a value out to the object file, using the appropriate
6196 md_number_to_chars (char *buf, valueT val, int n)
6198 if (target_big_endian)
6199 number_to_chars_bigendian (buf, val, n);
6201 number_to_chars_littleendian (buf, val, n);
6204 /* Align a section (I don't know why this is machine dependent). */
6207 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6212 int align = bfd_get_section_alignment (stdoutput, seg);
6214 return ((addr + (1 << align) - 1) & -(1 << align));
6218 /* We don't have any form of relaxing. */
6221 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6222 asection *seg ATTRIBUTE_UNUSED)
6228 /* Convert a machine dependent frag. We never generate these. */
6231 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6232 asection *sec ATTRIBUTE_UNUSED,
6233 fragS *fragp ATTRIBUTE_UNUSED)
6238 /* We have no need to default values of symbols. */
6241 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6246 /* Functions concerning relocs. */
6248 /* The location from which a PC relative jump should be calculated,
6249 given a PC relative reloc. */
6252 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6254 return fixp->fx_frag->fr_address + fixp->fx_where;
6259 /* This is called to see whether a fixup should be adjusted to use a
6260 section symbol. We take the opportunity to change a fixup against
6261 a symbol in the TOC subsegment into a reloc against the
6262 corresponding .tc symbol. */
6265 ppc_fix_adjustable (fixS *fix)
6267 valueT val = resolve_symbol_value (fix->fx_addsy);
6268 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6269 TC_SYMFIELD_TYPE *tc;
6271 if (symseg == absolute_section)
6274 /* Always adjust symbols in debugging sections. */
6275 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6278 if (ppc_toc_csect != (symbolS *) NULL
6279 && fix->fx_addsy != ppc_toc_csect
6280 && symseg == data_section
6281 && val >= ppc_toc_frag->fr_address
6282 && (ppc_after_toc_frag == (fragS *) NULL
6283 || val < ppc_after_toc_frag->fr_address))
6287 for (sy = symbol_next (ppc_toc_csect);
6288 sy != (symbolS *) NULL;
6289 sy = symbol_next (sy))
6291 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6293 if (sy_tc->symbol_class == XMC_TC0)
6295 if (sy_tc->symbol_class != XMC_TC)
6297 if (val == resolve_symbol_value (sy))
6300 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6305 as_bad_where (fix->fx_file, fix->fx_line,
6306 _("symbol in .toc does not match any .tc"));
6309 /* Possibly adjust the reloc to be against the csect. */
6310 tc = symbol_get_tc (fix->fx_addsy);
6312 && tc->symbol_class != XMC_TC0
6313 && tc->symbol_class != XMC_TC
6314 && symseg != bss_section
6315 /* Don't adjust if this is a reloc in the toc section. */
6316 && (symseg != data_section
6317 || ppc_toc_csect == NULL
6318 || val < ppc_toc_frag->fr_address
6319 || (ppc_after_toc_frag != NULL
6320 && val >= ppc_after_toc_frag->fr_address)))
6322 symbolS *csect = tc->within;
6324 /* If the symbol was not declared by a label (eg: a section symbol),
6325 use the section instead of the csect. This doesn't happen in
6326 normal AIX assembly code. */
6328 csect = seg_info (symseg)->sym;
6330 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6331 fix->fx_addsy = csect;
6336 /* Adjust a reloc against a .lcomm symbol to be against the base
6338 if (symseg == bss_section
6339 && ! S_IS_EXTERNAL (fix->fx_addsy))
6341 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6343 fix->fx_offset += val - resolve_symbol_value (sy);
6350 /* A reloc from one csect to another must be kept. The assembler
6351 will, of course, keep relocs between sections, and it will keep
6352 absolute relocs, but we need to force it to keep PC relative relocs
6353 between two csects in the same section. */
6356 ppc_force_relocation (fixS *fix)
6358 /* At this point fix->fx_addsy should already have been converted to
6359 a csect symbol. If the csect does not include the fragment, then
6360 we need to force the relocation. */
6362 && fix->fx_addsy != NULL
6363 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6364 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6365 > fix->fx_frag->fr_address)
6366 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6367 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6368 <= fix->fx_frag->fr_address))))
6371 return generic_force_reloc (fix);
6375 ppc_new_dot_label (symbolS *sym)
6377 /* Anchor this label to the current csect for relocations. */
6378 symbol_get_tc (sym)->within = ppc_current_csect;
6381 #endif /* OBJ_XCOFF */
6384 /* If this function returns non-zero, it guarantees that a relocation
6385 will be emitted for a fixup. */
6388 ppc_force_relocation (fixS *fix)
6390 /* Branch prediction relocations must force a relocation, as must
6391 the vtable description relocs. */
6392 switch (fix->fx_r_type)
6394 case BFD_RELOC_PPC_B16_BRTAKEN:
6395 case BFD_RELOC_PPC_B16_BRNTAKEN:
6396 case BFD_RELOC_PPC_BA16_BRTAKEN:
6397 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6398 case BFD_RELOC_24_PLT_PCREL:
6399 case BFD_RELOC_PPC64_TOC:
6401 case BFD_RELOC_PPC_B26:
6402 case BFD_RELOC_PPC_BA26:
6403 case BFD_RELOC_PPC_B16:
6404 case BFD_RELOC_PPC_BA16:
6405 /* All branch fixups targeting a localentry symbol must
6406 force a relocation. */
6409 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6410 elf_symbol_type *elfsym
6411 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6412 gas_assert (elfsym);
6413 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6421 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6422 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6425 return generic_force_reloc (fix);
6429 ppc_fix_adjustable (fixS *fix)
6431 switch (fix->fx_r_type)
6433 /* All branch fixups targeting a localentry symbol must
6434 continue using the symbol. */
6435 case BFD_RELOC_PPC_B26:
6436 case BFD_RELOC_PPC_BA26:
6437 case BFD_RELOC_PPC_B16:
6438 case BFD_RELOC_PPC_BA16:
6439 case BFD_RELOC_PPC_B16_BRTAKEN:
6440 case BFD_RELOC_PPC_B16_BRNTAKEN:
6441 case BFD_RELOC_PPC_BA16_BRTAKEN:
6442 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6445 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6446 elf_symbol_type *elfsym
6447 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6448 gas_assert (elfsym);
6449 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6457 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6458 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6459 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6460 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6461 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6462 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6463 && fix->fx_r_type != BFD_RELOC_GPREL16
6464 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6465 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6466 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6467 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6472 ppc_frag_check (struct frag *fragP)
6474 if (!fragP->has_code)
6477 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
6479 if (((fragP->fr_address + fragP->insn_addr) & 1) != 0)
6480 as_bad (_("instruction address is not a multiple of 2"));
6484 if (((fragP->fr_address + fragP->insn_addr) & 3) != 0)
6485 as_bad (_("instruction address is not a multiple of 4"));
6489 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6490 rs_align_code frag. */
6493 ppc_handle_align (struct frag *fragP)
6495 valueT count = (fragP->fr_next->fr_address
6496 - (fragP->fr_address + fragP->fr_fix));
6498 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
6500 char *dest = fragP->fr_literal + fragP->fr_fix;
6503 md_number_to_chars (dest, 0x4400, 2);
6505 else if (count != 0 && (count & 3) == 0)
6507 char *dest = fragP->fr_literal + fragP->fr_fix;
6511 if (count > 4 * nop_limit && count < 0x2000000)
6515 /* Make a branch, then follow with nops. Insert another
6516 frag to handle the nops. */
6517 md_number_to_chars (dest, 0x48000000 + count, 4);
6522 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6523 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6524 fragP->fr_next = rest;
6526 rest->fr_address += rest->fr_fix + 4;
6528 /* If we leave the next frag as rs_align_code we'll come here
6529 again, resulting in a bunch of branches rather than a
6530 branch followed by nops. */
6531 rest->fr_type = rs_align;
6532 dest = rest->fr_literal;
6535 md_number_to_chars (dest, 0x60000000, 4);
6537 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6538 || (ppc_cpu & PPC_OPCODE_POWER7) != 0
6539 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6540 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6542 /* For power6, power7, power8 and power9, we want the last nop to be
6543 a group terminating one. Do this by inserting an rs_fill frag
6544 immediately after this one, with its address set to the last nop
6545 location. This will automatically reduce the number of nops in
6546 the current frag by one. */
6549 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6551 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6552 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6553 group_nop->fr_fix = 0;
6554 group_nop->fr_offset = 1;
6555 group_nop->fr_type = rs_fill;
6556 fragP->fr_next = group_nop;
6557 dest = group_nop->fr_literal;
6560 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0
6561 || (ppc_cpu & PPC_OPCODE_POWER8) != 0
6562 || (ppc_cpu & PPC_OPCODE_POWER9) != 0)
6564 if (ppc_cpu & PPC_OPCODE_E500MC)
6565 /* e500mc group terminating nop: "ori 0,0,0". */
6566 md_number_to_chars (dest, 0x60000000, 4);
6568 /* power7/power8/power9 group terminating nop: "ori 2,2,0". */
6569 md_number_to_chars (dest, 0x60420000, 4);
6572 /* power6 group terminating nop: "ori 1,1,0". */
6573 md_number_to_chars (dest, 0x60210000, 4);
6578 /* Apply a fixup to the object code. This is called for all the
6579 fixups we generated by the calls to fix_new_exp, above. */
6582 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6584 valueT value = * valP;
6586 const struct powerpc_operand *operand;
6589 if (fixP->fx_addsy != NULL)
6591 /* Hack around bfd_install_relocation brain damage. */
6593 value += fixP->fx_frag->fr_address + fixP->fx_where;
6595 if (fixP->fx_addsy == abs_section_sym)
6601 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6602 the symbol values. If we are doing this relocation the code in
6603 write.c is going to call bfd_install_relocation, which is also
6604 going to use the symbol value. That means that if the reloc is
6605 fully resolved we want to use *valP since bfd_install_relocation is
6607 However, if the reloc is not fully resolved we do not want to
6608 use *valP, and must use fx_offset instead. If the relocation
6609 is PC-relative, we then need to re-apply md_pcrel_from_section
6610 to this new relocation value. */
6611 if (fixP->fx_addsy == (symbolS *) NULL)
6616 value = fixP->fx_offset;
6618 value -= md_pcrel_from_section (fixP, seg);
6622 /* We are only able to convert some relocs to pc-relative. */
6625 switch (fixP->fx_r_type)
6627 case BFD_RELOC_LO16:
6628 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6631 case BFD_RELOC_HI16:
6632 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6635 case BFD_RELOC_HI16_S:
6636 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6640 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6644 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6648 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6651 case BFD_RELOC_PPC_16DX_HA:
6652 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6659 else if (!fixP->fx_done
6660 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA)
6662 /* addpcis is relative to next insn address. */
6664 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6669 if (fixP->fx_pcrel_adjust != 0)
6671 /* This is a fixup on an instruction. */
6672 int opindex = fixP->fx_pcrel_adjust & 0xff;
6674 operand = &powerpc_operands[opindex];
6676 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6677 does not generate a reloc. It uses the offset of `sym' within its
6678 csect. Other usages, such as `.long sym', generate relocs. This
6679 is the documented behaviour of non-TOC symbols. */
6680 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6681 && (operand->bitm & 0xfff0) == 0xfff0
6682 && operand->shift == 0
6683 && (operand->insert == NULL || ppc_obj64)
6684 && fixP->fx_addsy != NULL
6685 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6686 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6687 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6688 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6690 value = fixP->fx_offset;
6694 /* During parsing of instructions, a TOC16 reloc is generated for
6695 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6696 in the toc. But at parse time, SYM may be not yet defined, so
6697 check again here. */
6698 if (fixP->fx_r_type == BFD_RELOC_16
6699 && fixP->fx_addsy != NULL
6700 && ppc_is_toc_sym (fixP->fx_addsy))
6701 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6705 /* Calculate value to be stored in field. */
6707 switch (fixP->fx_r_type)
6710 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6711 case BFD_RELOC_PPC_VLE_LO16A:
6712 case BFD_RELOC_PPC_VLE_LO16D:
6714 case BFD_RELOC_LO16:
6715 case BFD_RELOC_LO16_PCREL:
6716 fieldval = value & 0xffff;
6718 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6719 fieldval = SEX16 (fieldval);
6720 fixP->fx_no_overflow = 1;
6723 case BFD_RELOC_HI16:
6724 case BFD_RELOC_HI16_PCREL:
6726 if (REPORT_OVERFLOW_HI && ppc_obj64)
6728 fieldval = value >> 16;
6729 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6731 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6732 fieldval = ((valueT) fieldval ^ sign) - sign;
6738 case BFD_RELOC_PPC_VLE_HI16A:
6739 case BFD_RELOC_PPC_VLE_HI16D:
6740 case BFD_RELOC_PPC64_ADDR16_HIGH:
6742 fieldval = PPC_HI (value);
6743 goto sign_extend_16;
6745 case BFD_RELOC_HI16_S:
6746 case BFD_RELOC_HI16_S_PCREL:
6747 case BFD_RELOC_PPC_16DX_HA:
6748 case BFD_RELOC_PPC_REL16DX_HA:
6750 if (REPORT_OVERFLOW_HI && ppc_obj64)
6752 fieldval = (value + 0x8000) >> 16;
6753 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6755 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6756 fieldval = ((valueT) fieldval ^ sign) - sign;
6762 case BFD_RELOC_PPC_VLE_HA16A:
6763 case BFD_RELOC_PPC_VLE_HA16D:
6764 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6766 fieldval = PPC_HA (value);
6767 goto sign_extend_16;
6770 case BFD_RELOC_PPC64_HIGHER:
6771 fieldval = PPC_HIGHER (value);
6772 goto sign_extend_16;
6774 case BFD_RELOC_PPC64_HIGHER_S:
6775 fieldval = PPC_HIGHERA (value);
6776 goto sign_extend_16;
6778 case BFD_RELOC_PPC64_HIGHEST:
6779 fieldval = PPC_HIGHEST (value);
6780 goto sign_extend_16;
6782 case BFD_RELOC_PPC64_HIGHEST_S:
6783 fieldval = PPC_HIGHESTA (value);
6784 goto sign_extend_16;
6791 if (operand != NULL)
6793 /* Handle relocs in an insn. */
6794 switch (fixP->fx_r_type)
6797 /* The following relocs can't be calculated by the assembler.
6798 Leave the field zero. */
6799 case BFD_RELOC_PPC_TPREL16:
6800 case BFD_RELOC_PPC_TPREL16_LO:
6801 case BFD_RELOC_PPC_TPREL16_HI:
6802 case BFD_RELOC_PPC_TPREL16_HA:
6803 case BFD_RELOC_PPC_DTPREL16:
6804 case BFD_RELOC_PPC_DTPREL16_LO:
6805 case BFD_RELOC_PPC_DTPREL16_HI:
6806 case BFD_RELOC_PPC_DTPREL16_HA:
6807 case BFD_RELOC_PPC_GOT_TLSGD16:
6808 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6809 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6810 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6811 case BFD_RELOC_PPC_GOT_TLSLD16:
6812 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6813 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6814 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6815 case BFD_RELOC_PPC_GOT_TPREL16:
6816 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6817 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6818 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6819 case BFD_RELOC_PPC_GOT_DTPREL16:
6820 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6821 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6822 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6823 case BFD_RELOC_PPC64_TPREL16_DS:
6824 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6825 case BFD_RELOC_PPC64_TPREL16_HIGH:
6826 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6827 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6828 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6829 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6830 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6831 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6832 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6833 case BFD_RELOC_PPC64_DTPREL16_DS:
6834 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6835 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6836 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6839 gas_assert (fixP->fx_addsy != NULL);
6840 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6844 /* These also should leave the field zero for the same
6845 reason. Note that older versions of gas wrote values
6846 here. If we want to go back to the old behaviour, then
6847 all _LO and _LO_DS cases will need to be treated like
6848 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6849 case BFD_RELOC_16_GOTOFF:
6850 case BFD_RELOC_LO16_GOTOFF:
6851 case BFD_RELOC_HI16_GOTOFF:
6852 case BFD_RELOC_HI16_S_GOTOFF:
6853 case BFD_RELOC_LO16_PLTOFF:
6854 case BFD_RELOC_HI16_PLTOFF:
6855 case BFD_RELOC_HI16_S_PLTOFF:
6856 case BFD_RELOC_GPREL16:
6857 case BFD_RELOC_16_BASEREL:
6858 case BFD_RELOC_LO16_BASEREL:
6859 case BFD_RELOC_HI16_BASEREL:
6860 case BFD_RELOC_HI16_S_BASEREL:
6861 case BFD_RELOC_PPC_TOC16:
6862 case BFD_RELOC_PPC64_TOC16_LO:
6863 case BFD_RELOC_PPC64_TOC16_HI:
6864 case BFD_RELOC_PPC64_TOC16_HA:
6865 case BFD_RELOC_PPC64_PLTGOT16:
6866 case BFD_RELOC_PPC64_PLTGOT16_LO:
6867 case BFD_RELOC_PPC64_PLTGOT16_HI:
6868 case BFD_RELOC_PPC64_PLTGOT16_HA:
6869 case BFD_RELOC_PPC64_GOT16_DS:
6870 case BFD_RELOC_PPC64_GOT16_LO_DS:
6871 case BFD_RELOC_PPC64_PLT16_LO_DS:
6872 case BFD_RELOC_PPC64_SECTOFF_DS:
6873 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6874 case BFD_RELOC_PPC64_TOC16_DS:
6875 case BFD_RELOC_PPC64_TOC16_LO_DS:
6876 case BFD_RELOC_PPC64_PLTGOT16_DS:
6877 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6878 case BFD_RELOC_PPC_EMB_NADDR16:
6879 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6880 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6881 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6882 case BFD_RELOC_PPC_EMB_SDAI16:
6883 case BFD_RELOC_PPC_EMB_SDA2I16:
6884 case BFD_RELOC_PPC_EMB_SDA2REL:
6885 case BFD_RELOC_PPC_EMB_SDA21:
6886 case BFD_RELOC_PPC_EMB_MRKREF:
6887 case BFD_RELOC_PPC_EMB_RELSEC16:
6888 case BFD_RELOC_PPC_EMB_RELST_LO:
6889 case BFD_RELOC_PPC_EMB_RELST_HI:
6890 case BFD_RELOC_PPC_EMB_RELST_HA:
6891 case BFD_RELOC_PPC_EMB_BIT_FLD:
6892 case BFD_RELOC_PPC_EMB_RELSDA:
6893 case BFD_RELOC_PPC_VLE_SDA21:
6894 case BFD_RELOC_PPC_VLE_SDA21_LO:
6895 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6896 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6897 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6898 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6899 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6900 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6901 gas_assert (fixP->fx_addsy != NULL);
6904 case BFD_RELOC_PPC_TLS:
6905 case BFD_RELOC_PPC_TLSGD:
6906 case BFD_RELOC_PPC_TLSLD:
6912 case BFD_RELOC_PPC_B16:
6913 /* Adjust the offset to the instruction boundary. */
6918 case BFD_RELOC_VTABLE_INHERIT:
6919 case BFD_RELOC_VTABLE_ENTRY:
6920 case BFD_RELOC_PPC_DTPMOD:
6921 case BFD_RELOC_PPC_TPREL:
6922 case BFD_RELOC_PPC_DTPREL:
6923 case BFD_RELOC_PPC_COPY:
6924 case BFD_RELOC_PPC_GLOB_DAT:
6925 case BFD_RELOC_32_PLT_PCREL:
6926 case BFD_RELOC_PPC_EMB_NADDR32:
6927 case BFD_RELOC_PPC64_TOC:
6928 case BFD_RELOC_CTOR:
6930 case BFD_RELOC_32_PCREL:
6933 case BFD_RELOC_64_PCREL:
6934 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6935 as_bad_where (fixP->fx_file, fixP->fx_line,
6936 _("%s unsupported as instruction fixup"),
6937 bfd_get_reloc_code_name (fixP->fx_r_type));
6946 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6947 contents can stay at zero. */
6948 #define APPLY_RELOC fixP->fx_done
6950 #define APPLY_RELOC 1
6952 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6955 unsigned char *where;
6957 /* Fetch the instruction, insert the fully resolved operand
6958 value, and stuff the instruction back again. */
6959 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6960 if (target_big_endian)
6962 if (fixP->fx_size == 4)
6963 insn = bfd_getb32 (where);
6965 insn = bfd_getb16 (where);
6969 if (fixP->fx_size == 4)
6970 insn = bfd_getl32 (where);
6972 insn = bfd_getl16 (where);
6974 insn = ppc_insert_operand (insn, operand, fieldval,
6975 fixP->tc_fix_data.ppc_cpu,
6976 fixP->fx_file, fixP->fx_line);
6977 if (target_big_endian)
6979 if (fixP->fx_size == 4)
6980 bfd_putb32 (insn, where);
6982 bfd_putb16 (insn, where);
6986 if (fixP->fx_size == 4)
6987 bfd_putl32 (insn, where);
6989 bfd_putl16 (insn, where);
6994 /* Nothing else to do here. */
6997 gas_assert (fixP->fx_addsy != NULL);
6998 if (fixP->fx_r_type == BFD_RELOC_NONE)
7003 /* Use expr_symbol_where to see if this is an expression
7005 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7006 as_bad_where (fixP->fx_file, fixP->fx_line,
7007 _("unresolved expression that must be resolved"));
7009 as_bad_where (fixP->fx_file, fixP->fx_line,
7010 _("unsupported relocation against %s"),
7011 S_GET_NAME (fixP->fx_addsy));
7018 /* Handle relocs in data. */
7019 switch (fixP->fx_r_type)
7021 case BFD_RELOC_VTABLE_INHERIT:
7023 && !S_IS_DEFINED (fixP->fx_addsy)
7024 && !S_IS_WEAK (fixP->fx_addsy))
7025 S_SET_WEAK (fixP->fx_addsy);
7028 case BFD_RELOC_VTABLE_ENTRY:
7033 /* These can appear with @l etc. in data. */
7034 case BFD_RELOC_LO16:
7035 case BFD_RELOC_LO16_PCREL:
7036 case BFD_RELOC_HI16:
7037 case BFD_RELOC_HI16_PCREL:
7038 case BFD_RELOC_HI16_S:
7039 case BFD_RELOC_HI16_S_PCREL:
7040 case BFD_RELOC_PPC64_HIGHER:
7041 case BFD_RELOC_PPC64_HIGHER_S:
7042 case BFD_RELOC_PPC64_HIGHEST:
7043 case BFD_RELOC_PPC64_HIGHEST_S:
7044 case BFD_RELOC_PPC64_ADDR16_HIGH:
7045 case BFD_RELOC_PPC64_ADDR16_HIGHA:
7046 case BFD_RELOC_PPC64_ADDR64_LOCAL:
7049 case BFD_RELOC_PPC_DTPMOD:
7050 case BFD_RELOC_PPC_TPREL:
7051 case BFD_RELOC_PPC_DTPREL:
7052 S_SET_THREAD_LOCAL (fixP->fx_addsy);
7055 /* Just punt all of these to the linker. */
7056 case BFD_RELOC_PPC_B16_BRTAKEN:
7057 case BFD_RELOC_PPC_B16_BRNTAKEN:
7058 case BFD_RELOC_16_GOTOFF:
7059 case BFD_RELOC_LO16_GOTOFF:
7060 case BFD_RELOC_HI16_GOTOFF:
7061 case BFD_RELOC_HI16_S_GOTOFF:
7062 case BFD_RELOC_LO16_PLTOFF:
7063 case BFD_RELOC_HI16_PLTOFF:
7064 case BFD_RELOC_HI16_S_PLTOFF:
7065 case BFD_RELOC_PPC_COPY:
7066 case BFD_RELOC_PPC_GLOB_DAT:
7067 case BFD_RELOC_16_BASEREL:
7068 case BFD_RELOC_LO16_BASEREL:
7069 case BFD_RELOC_HI16_BASEREL:
7070 case BFD_RELOC_HI16_S_BASEREL:
7071 case BFD_RELOC_PPC_TLS:
7072 case BFD_RELOC_PPC_DTPREL16_LO:
7073 case BFD_RELOC_PPC_DTPREL16_HI:
7074 case BFD_RELOC_PPC_DTPREL16_HA:
7075 case BFD_RELOC_PPC_TPREL16_LO:
7076 case BFD_RELOC_PPC_TPREL16_HI:
7077 case BFD_RELOC_PPC_TPREL16_HA:
7078 case BFD_RELOC_PPC_GOT_TLSGD16:
7079 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
7080 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
7081 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
7082 case BFD_RELOC_PPC_GOT_TLSLD16:
7083 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
7084 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
7085 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
7086 case BFD_RELOC_PPC_GOT_DTPREL16:
7087 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
7088 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
7089 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
7090 case BFD_RELOC_PPC_GOT_TPREL16:
7091 case BFD_RELOC_PPC_GOT_TPREL16_LO:
7092 case BFD_RELOC_PPC_GOT_TPREL16_HI:
7093 case BFD_RELOC_PPC_GOT_TPREL16_HA:
7094 case BFD_RELOC_24_PLT_PCREL:
7095 case BFD_RELOC_PPC_LOCAL24PC:
7096 case BFD_RELOC_32_PLT_PCREL:
7097 case BFD_RELOC_GPREL16:
7098 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
7099 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
7100 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
7101 case BFD_RELOC_PPC_EMB_NADDR32:
7102 case BFD_RELOC_PPC_EMB_NADDR16:
7103 case BFD_RELOC_PPC_EMB_NADDR16_LO:
7104 case BFD_RELOC_PPC_EMB_NADDR16_HI:
7105 case BFD_RELOC_PPC_EMB_NADDR16_HA:
7106 case BFD_RELOC_PPC_EMB_SDAI16:
7107 case BFD_RELOC_PPC_EMB_SDA2REL:
7108 case BFD_RELOC_PPC_EMB_SDA2I16:
7109 case BFD_RELOC_PPC_EMB_SDA21:
7110 case BFD_RELOC_PPC_VLE_SDA21_LO:
7111 case BFD_RELOC_PPC_EMB_MRKREF:
7112 case BFD_RELOC_PPC_EMB_RELSEC16:
7113 case BFD_RELOC_PPC_EMB_RELST_LO:
7114 case BFD_RELOC_PPC_EMB_RELST_HI:
7115 case BFD_RELOC_PPC_EMB_RELST_HA:
7116 case BFD_RELOC_PPC_EMB_BIT_FLD:
7117 case BFD_RELOC_PPC_EMB_RELSDA:
7118 case BFD_RELOC_PPC64_TOC:
7119 case BFD_RELOC_PPC_TOC16:
7120 case BFD_RELOC_PPC64_TOC16_LO:
7121 case BFD_RELOC_PPC64_TOC16_HI:
7122 case BFD_RELOC_PPC64_TOC16_HA:
7123 case BFD_RELOC_PPC64_DTPREL16_HIGH:
7124 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
7125 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
7126 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
7127 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
7128 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7129 case BFD_RELOC_PPC64_TPREL16_HIGH:
7130 case BFD_RELOC_PPC64_TPREL16_HIGHA:
7131 case BFD_RELOC_PPC64_TPREL16_HIGHER:
7132 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
7133 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
7134 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
7140 case BFD_RELOC_NONE:
7142 case BFD_RELOC_CTOR:
7144 case BFD_RELOC_32_PCREL:
7147 case BFD_RELOC_64_PCREL:
7149 case BFD_RELOC_16_PCREL:
7155 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
7160 if (fixP->fx_size && APPLY_RELOC)
7161 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7162 fieldval, fixP->fx_size);
7164 && (seg->flags & SEC_CODE) != 0
7165 && fixP->fx_size == 4
7168 && (fixP->fx_r_type == BFD_RELOC_32
7169 || fixP->fx_r_type == BFD_RELOC_CTOR
7170 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7171 as_warn_where (fixP->fx_file, fixP->fx_line,
7172 _("data in executable section"));
7176 ppc_elf_validate_fix (fixP, seg);
7177 fixP->fx_addnumber = value;
7179 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7180 from the section contents. If we are going to be emitting a reloc
7181 then the section contents are immaterial, so don't warn if they
7182 happen to overflow. Leave such warnings to ld. */
7185 fixP->fx_no_overflow = 1;
7187 /* Arrange to emit .TOC. as a normal symbol if used in anything
7188 but .TOC.@tocbase. */
7190 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7191 && fixP->fx_addsy != NULL
7192 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7193 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7196 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7197 fixP->fx_addnumber = 0;
7201 fixP->fx_addnumber = 0;
7203 /* We want to use the offset within the toc, not the actual VMA
7205 fixP->fx_addnumber =
7206 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7207 - S_GET_VALUE (ppc_toc_csect);
7208 /* Set *valP to avoid errors. */
7215 /* Generate a reloc for a fixup. */
7218 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7222 reloc = XNEW (arelent);
7224 reloc->sym_ptr_ptr = XNEW (asymbol *);
7225 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7226 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7227 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7228 if (reloc->howto == (reloc_howto_type *) NULL)
7230 as_bad_where (fixp->fx_file, fixp->fx_line,
7231 _("reloc %d not supported by object file format"),
7232 (int) fixp->fx_r_type);
7235 reloc->addend = fixp->fx_addnumber;
7241 ppc_cfi_frame_initial_instructions (void)
7243 cfi_add_CFA_def_cfa (1, 0);
7247 tc_ppc_regname_to_dw2regnum (char *regname)
7249 unsigned int regnum = -1;
7253 static struct { const char *name; int dw2regnum; } regnames[] =
7255 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7256 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7257 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7258 { "spe_acc", 111 }, { "spefscr", 112 }
7261 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7262 if (strcmp (regnames[i].name, regname) == 0)
7263 return regnames[i].dw2regnum;
7265 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7267 p = regname + 1 + (regname[1] == '.');
7268 regnum = strtoul (p, &q, 10);
7269 if (p == q || *q || regnum >= 32)
7271 if (regname[0] == 'f')
7273 else if (regname[0] == 'v')
7276 else if (regname[0] == 'c' && regname[1] == 'r')
7278 p = regname + 2 + (regname[2] == '.');
7279 if (p[0] < '0' || p[0] > '7' || p[1])
7281 regnum = p[0] - '0' + 68;