1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2019 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars[] = "#!";
162 static const char ppc_eabi_comment_chars[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars = ppc_solaris_comment_chars;
167 const char *ppc_comment_chars = ppc_eabi_comment_chars;
170 const char comment_chars[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit = 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu = 0;
205 ppc_cpu_t sticky = 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion = 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
241 { "bi", ppc_biei, 0 },
243 { "csect", ppc_csect, 0 },
244 { "dwsect", ppc_dwsect, 0 },
245 { "data", ppc_section, 'd' },
249 { "ei", ppc_biei, 1 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
254 { "ref", ppc_ref, 0 },
255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
261 { "llong", ppc_xcoff_cons, 3 },
262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
268 { "llong", cons, 8 },
269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
272 { "localentry", ppc_elf_localentry, 0 },
273 { "abiversion", ppc_elf_abiversion, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value;
311 unsigned short flags;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG },
351 { "cr.1", 1, PPC_OPERAND_CR_REG },
352 { "cr.2", 2, PPC_OPERAND_CR_REG },
353 { "cr.3", 3, PPC_OPERAND_CR_REG },
354 { "cr.4", 4, PPC_OPERAND_CR_REG },
355 { "cr.5", 5, PPC_OPERAND_CR_REG },
356 { "cr.6", 6, PPC_OPERAND_CR_REG },
357 { "cr.7", 7, PPC_OPERAND_CR_REG },
359 { "cr0", 0, PPC_OPERAND_CR_REG },
360 { "cr1", 1, PPC_OPERAND_CR_REG },
361 { "cr2", 2, PPC_OPERAND_CR_REG },
362 { "cr3", 3, PPC_OPERAND_CR_REG },
363 { "cr4", 4, PPC_OPERAND_CR_REG },
364 { "cr5", 5, PPC_OPERAND_CR_REG },
365 { "cr6", 6, PPC_OPERAND_CR_REG },
366 { "cr7", 7, PPC_OPERAND_CR_REG },
368 { "ctr", 9, PPC_OPERAND_SPR },
369 { "dar", 19, PPC_OPERAND_SPR },
370 { "dec", 22, PPC_OPERAND_SPR },
371 { "dsisr", 18, PPC_OPERAND_SPR },
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR },
375 { "f.1", 1, PPC_OPERAND_FPR },
376 { "f.10", 10, PPC_OPERAND_FPR },
377 { "f.11", 11, PPC_OPERAND_FPR },
378 { "f.12", 12, PPC_OPERAND_FPR },
379 { "f.13", 13, PPC_OPERAND_FPR },
380 { "f.14", 14, PPC_OPERAND_FPR },
381 { "f.15", 15, PPC_OPERAND_FPR },
382 { "f.16", 16, PPC_OPERAND_FPR },
383 { "f.17", 17, PPC_OPERAND_FPR },
384 { "f.18", 18, PPC_OPERAND_FPR },
385 { "f.19", 19, PPC_OPERAND_FPR },
386 { "f.2", 2, PPC_OPERAND_FPR },
387 { "f.20", 20, PPC_OPERAND_FPR },
388 { "f.21", 21, PPC_OPERAND_FPR },
389 { "f.22", 22, PPC_OPERAND_FPR },
390 { "f.23", 23, PPC_OPERAND_FPR },
391 { "f.24", 24, PPC_OPERAND_FPR },
392 { "f.25", 25, PPC_OPERAND_FPR },
393 { "f.26", 26, PPC_OPERAND_FPR },
394 { "f.27", 27, PPC_OPERAND_FPR },
395 { "f.28", 28, PPC_OPERAND_FPR },
396 { "f.29", 29, PPC_OPERAND_FPR },
397 { "f.3", 3, PPC_OPERAND_FPR },
398 { "f.30", 30, PPC_OPERAND_FPR },
399 { "f.31", 31, PPC_OPERAND_FPR },
400 { "f.32", 32, PPC_OPERAND_VSR },
401 { "f.33", 33, PPC_OPERAND_VSR },
402 { "f.34", 34, PPC_OPERAND_VSR },
403 { "f.35", 35, PPC_OPERAND_VSR },
404 { "f.36", 36, PPC_OPERAND_VSR },
405 { "f.37", 37, PPC_OPERAND_VSR },
406 { "f.38", 38, PPC_OPERAND_VSR },
407 { "f.39", 39, PPC_OPERAND_VSR },
408 { "f.4", 4, PPC_OPERAND_FPR },
409 { "f.40", 40, PPC_OPERAND_VSR },
410 { "f.41", 41, PPC_OPERAND_VSR },
411 { "f.42", 42, PPC_OPERAND_VSR },
412 { "f.43", 43, PPC_OPERAND_VSR },
413 { "f.44", 44, PPC_OPERAND_VSR },
414 { "f.45", 45, PPC_OPERAND_VSR },
415 { "f.46", 46, PPC_OPERAND_VSR },
416 { "f.47", 47, PPC_OPERAND_VSR },
417 { "f.48", 48, PPC_OPERAND_VSR },
418 { "f.49", 49, PPC_OPERAND_VSR },
419 { "f.5", 5, PPC_OPERAND_FPR },
420 { "f.50", 50, PPC_OPERAND_VSR },
421 { "f.51", 51, PPC_OPERAND_VSR },
422 { "f.52", 52, PPC_OPERAND_VSR },
423 { "f.53", 53, PPC_OPERAND_VSR },
424 { "f.54", 54, PPC_OPERAND_VSR },
425 { "f.55", 55, PPC_OPERAND_VSR },
426 { "f.56", 56, PPC_OPERAND_VSR },
427 { "f.57", 57, PPC_OPERAND_VSR },
428 { "f.58", 58, PPC_OPERAND_VSR },
429 { "f.59", 59, PPC_OPERAND_VSR },
430 { "f.6", 6, PPC_OPERAND_FPR },
431 { "f.60", 60, PPC_OPERAND_VSR },
432 { "f.61", 61, PPC_OPERAND_VSR },
433 { "f.62", 62, PPC_OPERAND_VSR },
434 { "f.63", 63, PPC_OPERAND_VSR },
435 { "f.7", 7, PPC_OPERAND_FPR },
436 { "f.8", 8, PPC_OPERAND_FPR },
437 { "f.9", 9, PPC_OPERAND_FPR },
439 { "f0", 0, PPC_OPERAND_FPR },
440 { "f1", 1, PPC_OPERAND_FPR },
441 { "f10", 10, PPC_OPERAND_FPR },
442 { "f11", 11, PPC_OPERAND_FPR },
443 { "f12", 12, PPC_OPERAND_FPR },
444 { "f13", 13, PPC_OPERAND_FPR },
445 { "f14", 14, PPC_OPERAND_FPR },
446 { "f15", 15, PPC_OPERAND_FPR },
447 { "f16", 16, PPC_OPERAND_FPR },
448 { "f17", 17, PPC_OPERAND_FPR },
449 { "f18", 18, PPC_OPERAND_FPR },
450 { "f19", 19, PPC_OPERAND_FPR },
451 { "f2", 2, PPC_OPERAND_FPR },
452 { "f20", 20, PPC_OPERAND_FPR },
453 { "f21", 21, PPC_OPERAND_FPR },
454 { "f22", 22, PPC_OPERAND_FPR },
455 { "f23", 23, PPC_OPERAND_FPR },
456 { "f24", 24, PPC_OPERAND_FPR },
457 { "f25", 25, PPC_OPERAND_FPR },
458 { "f26", 26, PPC_OPERAND_FPR },
459 { "f27", 27, PPC_OPERAND_FPR },
460 { "f28", 28, PPC_OPERAND_FPR },
461 { "f29", 29, PPC_OPERAND_FPR },
462 { "f3", 3, PPC_OPERAND_FPR },
463 { "f30", 30, PPC_OPERAND_FPR },
464 { "f31", 31, PPC_OPERAND_FPR },
465 { "f32", 32, PPC_OPERAND_VSR },
466 { "f33", 33, PPC_OPERAND_VSR },
467 { "f34", 34, PPC_OPERAND_VSR },
468 { "f35", 35, PPC_OPERAND_VSR },
469 { "f36", 36, PPC_OPERAND_VSR },
470 { "f37", 37, PPC_OPERAND_VSR },
471 { "f38", 38, PPC_OPERAND_VSR },
472 { "f39", 39, PPC_OPERAND_VSR },
473 { "f4", 4, PPC_OPERAND_FPR },
474 { "f40", 40, PPC_OPERAND_VSR },
475 { "f41", 41, PPC_OPERAND_VSR },
476 { "f42", 42, PPC_OPERAND_VSR },
477 { "f43", 43, PPC_OPERAND_VSR },
478 { "f44", 44, PPC_OPERAND_VSR },
479 { "f45", 45, PPC_OPERAND_VSR },
480 { "f46", 46, PPC_OPERAND_VSR },
481 { "f47", 47, PPC_OPERAND_VSR },
482 { "f48", 48, PPC_OPERAND_VSR },
483 { "f49", 49, PPC_OPERAND_VSR },
484 { "f5", 5, PPC_OPERAND_FPR },
485 { "f50", 50, PPC_OPERAND_VSR },
486 { "f51", 51, PPC_OPERAND_VSR },
487 { "f52", 52, PPC_OPERAND_VSR },
488 { "f53", 53, PPC_OPERAND_VSR },
489 { "f54", 54, PPC_OPERAND_VSR },
490 { "f55", 55, PPC_OPERAND_VSR },
491 { "f56", 56, PPC_OPERAND_VSR },
492 { "f57", 57, PPC_OPERAND_VSR },
493 { "f58", 58, PPC_OPERAND_VSR },
494 { "f59", 59, PPC_OPERAND_VSR },
495 { "f6", 6, PPC_OPERAND_FPR },
496 { "f60", 60, PPC_OPERAND_VSR },
497 { "f61", 61, PPC_OPERAND_VSR },
498 { "f62", 62, PPC_OPERAND_VSR },
499 { "f63", 63, PPC_OPERAND_VSR },
500 { "f7", 7, PPC_OPERAND_FPR },
501 { "f8", 8, PPC_OPERAND_FPR },
502 { "f9", 9, PPC_OPERAND_FPR },
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR },
506 { "gqr.1", 1, PPC_OPERAND_GQR },
507 { "gqr.2", 2, PPC_OPERAND_GQR },
508 { "gqr.3", 3, PPC_OPERAND_GQR },
509 { "gqr.4", 4, PPC_OPERAND_GQR },
510 { "gqr.5", 5, PPC_OPERAND_GQR },
511 { "gqr.6", 6, PPC_OPERAND_GQR },
512 { "gqr.7", 7, PPC_OPERAND_GQR },
513 { "gqr0", 0, PPC_OPERAND_GQR },
514 { "gqr1", 1, PPC_OPERAND_GQR },
515 { "gqr2", 2, PPC_OPERAND_GQR },
516 { "gqr3", 3, PPC_OPERAND_GQR },
517 { "gqr4", 4, PPC_OPERAND_GQR },
518 { "gqr5", 5, PPC_OPERAND_GQR },
519 { "gqr6", 6, PPC_OPERAND_GQR },
520 { "gqr7", 7, PPC_OPERAND_GQR },
522 { "lr", 8, PPC_OPERAND_SPR },
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR },
526 { "r.1", 1, PPC_OPERAND_GPR },
527 { "r.10", 10, PPC_OPERAND_GPR },
528 { "r.11", 11, PPC_OPERAND_GPR },
529 { "r.12", 12, PPC_OPERAND_GPR },
530 { "r.13", 13, PPC_OPERAND_GPR },
531 { "r.14", 14, PPC_OPERAND_GPR },
532 { "r.15", 15, PPC_OPERAND_GPR },
533 { "r.16", 16, PPC_OPERAND_GPR },
534 { "r.17", 17, PPC_OPERAND_GPR },
535 { "r.18", 18, PPC_OPERAND_GPR },
536 { "r.19", 19, PPC_OPERAND_GPR },
537 { "r.2", 2, PPC_OPERAND_GPR },
538 { "r.20", 20, PPC_OPERAND_GPR },
539 { "r.21", 21, PPC_OPERAND_GPR },
540 { "r.22", 22, PPC_OPERAND_GPR },
541 { "r.23", 23, PPC_OPERAND_GPR },
542 { "r.24", 24, PPC_OPERAND_GPR },
543 { "r.25", 25, PPC_OPERAND_GPR },
544 { "r.26", 26, PPC_OPERAND_GPR },
545 { "r.27", 27, PPC_OPERAND_GPR },
546 { "r.28", 28, PPC_OPERAND_GPR },
547 { "r.29", 29, PPC_OPERAND_GPR },
548 { "r.3", 3, PPC_OPERAND_GPR },
549 { "r.30", 30, PPC_OPERAND_GPR },
550 { "r.31", 31, PPC_OPERAND_GPR },
551 { "r.4", 4, PPC_OPERAND_GPR },
552 { "r.5", 5, PPC_OPERAND_GPR },
553 { "r.6", 6, PPC_OPERAND_GPR },
554 { "r.7", 7, PPC_OPERAND_GPR },
555 { "r.8", 8, PPC_OPERAND_GPR },
556 { "r.9", 9, PPC_OPERAND_GPR },
558 { "r.sp", 1, PPC_OPERAND_GPR },
560 { "r.toc", 2, PPC_OPERAND_GPR },
562 { "r0", 0, PPC_OPERAND_GPR },
563 { "r1", 1, PPC_OPERAND_GPR },
564 { "r10", 10, PPC_OPERAND_GPR },
565 { "r11", 11, PPC_OPERAND_GPR },
566 { "r12", 12, PPC_OPERAND_GPR },
567 { "r13", 13, PPC_OPERAND_GPR },
568 { "r14", 14, PPC_OPERAND_GPR },
569 { "r15", 15, PPC_OPERAND_GPR },
570 { "r16", 16, PPC_OPERAND_GPR },
571 { "r17", 17, PPC_OPERAND_GPR },
572 { "r18", 18, PPC_OPERAND_GPR },
573 { "r19", 19, PPC_OPERAND_GPR },
574 { "r2", 2, PPC_OPERAND_GPR },
575 { "r20", 20, PPC_OPERAND_GPR },
576 { "r21", 21, PPC_OPERAND_GPR },
577 { "r22", 22, PPC_OPERAND_GPR },
578 { "r23", 23, PPC_OPERAND_GPR },
579 { "r24", 24, PPC_OPERAND_GPR },
580 { "r25", 25, PPC_OPERAND_GPR },
581 { "r26", 26, PPC_OPERAND_GPR },
582 { "r27", 27, PPC_OPERAND_GPR },
583 { "r28", 28, PPC_OPERAND_GPR },
584 { "r29", 29, PPC_OPERAND_GPR },
585 { "r3", 3, PPC_OPERAND_GPR },
586 { "r30", 30, PPC_OPERAND_GPR },
587 { "r31", 31, PPC_OPERAND_GPR },
588 { "r4", 4, PPC_OPERAND_GPR },
589 { "r5", 5, PPC_OPERAND_GPR },
590 { "r6", 6, PPC_OPERAND_GPR },
591 { "r7", 7, PPC_OPERAND_GPR },
592 { "r8", 8, PPC_OPERAND_GPR },
593 { "r9", 9, PPC_OPERAND_GPR },
595 { "rtoc", 2, PPC_OPERAND_GPR },
597 { "sdr1", 25, PPC_OPERAND_SPR },
599 { "sp", 1, PPC_OPERAND_GPR },
601 { "srr0", 26, PPC_OPERAND_SPR },
602 { "srr1", 27, PPC_OPERAND_SPR },
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR },
606 { "v.1", 1, PPC_OPERAND_VR },
607 { "v.10", 10, PPC_OPERAND_VR },
608 { "v.11", 11, PPC_OPERAND_VR },
609 { "v.12", 12, PPC_OPERAND_VR },
610 { "v.13", 13, PPC_OPERAND_VR },
611 { "v.14", 14, PPC_OPERAND_VR },
612 { "v.15", 15, PPC_OPERAND_VR },
613 { "v.16", 16, PPC_OPERAND_VR },
614 { "v.17", 17, PPC_OPERAND_VR },
615 { "v.18", 18, PPC_OPERAND_VR },
616 { "v.19", 19, PPC_OPERAND_VR },
617 { "v.2", 2, PPC_OPERAND_VR },
618 { "v.20", 20, PPC_OPERAND_VR },
619 { "v.21", 21, PPC_OPERAND_VR },
620 { "v.22", 22, PPC_OPERAND_VR },
621 { "v.23", 23, PPC_OPERAND_VR },
622 { "v.24", 24, PPC_OPERAND_VR },
623 { "v.25", 25, PPC_OPERAND_VR },
624 { "v.26", 26, PPC_OPERAND_VR },
625 { "v.27", 27, PPC_OPERAND_VR },
626 { "v.28", 28, PPC_OPERAND_VR },
627 { "v.29", 29, PPC_OPERAND_VR },
628 { "v.3", 3, PPC_OPERAND_VR },
629 { "v.30", 30, PPC_OPERAND_VR },
630 { "v.31", 31, PPC_OPERAND_VR },
631 { "v.4", 4, PPC_OPERAND_VR },
632 { "v.5", 5, PPC_OPERAND_VR },
633 { "v.6", 6, PPC_OPERAND_VR },
634 { "v.7", 7, PPC_OPERAND_VR },
635 { "v.8", 8, PPC_OPERAND_VR },
636 { "v.9", 9, PPC_OPERAND_VR },
638 { "v0", 0, PPC_OPERAND_VR },
639 { "v1", 1, PPC_OPERAND_VR },
640 { "v10", 10, PPC_OPERAND_VR },
641 { "v11", 11, PPC_OPERAND_VR },
642 { "v12", 12, PPC_OPERAND_VR },
643 { "v13", 13, PPC_OPERAND_VR },
644 { "v14", 14, PPC_OPERAND_VR },
645 { "v15", 15, PPC_OPERAND_VR },
646 { "v16", 16, PPC_OPERAND_VR },
647 { "v17", 17, PPC_OPERAND_VR },
648 { "v18", 18, PPC_OPERAND_VR },
649 { "v19", 19, PPC_OPERAND_VR },
650 { "v2", 2, PPC_OPERAND_VR },
651 { "v20", 20, PPC_OPERAND_VR },
652 { "v21", 21, PPC_OPERAND_VR },
653 { "v22", 22, PPC_OPERAND_VR },
654 { "v23", 23, PPC_OPERAND_VR },
655 { "v24", 24, PPC_OPERAND_VR },
656 { "v25", 25, PPC_OPERAND_VR },
657 { "v26", 26, PPC_OPERAND_VR },
658 { "v27", 27, PPC_OPERAND_VR },
659 { "v28", 28, PPC_OPERAND_VR },
660 { "v29", 29, PPC_OPERAND_VR },
661 { "v3", 3, PPC_OPERAND_VR },
662 { "v30", 30, PPC_OPERAND_VR },
663 { "v31", 31, PPC_OPERAND_VR },
664 { "v4", 4, PPC_OPERAND_VR },
665 { "v5", 5, PPC_OPERAND_VR },
666 { "v6", 6, PPC_OPERAND_VR },
667 { "v7", 7, PPC_OPERAND_VR },
668 { "v8", 8, PPC_OPERAND_VR },
669 { "v9", 9, PPC_OPERAND_VR },
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR },
673 { "vs.1", 1, PPC_OPERAND_VSR },
674 { "vs.10", 10, PPC_OPERAND_VSR },
675 { "vs.11", 11, PPC_OPERAND_VSR },
676 { "vs.12", 12, PPC_OPERAND_VSR },
677 { "vs.13", 13, PPC_OPERAND_VSR },
678 { "vs.14", 14, PPC_OPERAND_VSR },
679 { "vs.15", 15, PPC_OPERAND_VSR },
680 { "vs.16", 16, PPC_OPERAND_VSR },
681 { "vs.17", 17, PPC_OPERAND_VSR },
682 { "vs.18", 18, PPC_OPERAND_VSR },
683 { "vs.19", 19, PPC_OPERAND_VSR },
684 { "vs.2", 2, PPC_OPERAND_VSR },
685 { "vs.20", 20, PPC_OPERAND_VSR },
686 { "vs.21", 21, PPC_OPERAND_VSR },
687 { "vs.22", 22, PPC_OPERAND_VSR },
688 { "vs.23", 23, PPC_OPERAND_VSR },
689 { "vs.24", 24, PPC_OPERAND_VSR },
690 { "vs.25", 25, PPC_OPERAND_VSR },
691 { "vs.26", 26, PPC_OPERAND_VSR },
692 { "vs.27", 27, PPC_OPERAND_VSR },
693 { "vs.28", 28, PPC_OPERAND_VSR },
694 { "vs.29", 29, PPC_OPERAND_VSR },
695 { "vs.3", 3, PPC_OPERAND_VSR },
696 { "vs.30", 30, PPC_OPERAND_VSR },
697 { "vs.31", 31, PPC_OPERAND_VSR },
698 { "vs.32", 32, PPC_OPERAND_VSR },
699 { "vs.33", 33, PPC_OPERAND_VSR },
700 { "vs.34", 34, PPC_OPERAND_VSR },
701 { "vs.35", 35, PPC_OPERAND_VSR },
702 { "vs.36", 36, PPC_OPERAND_VSR },
703 { "vs.37", 37, PPC_OPERAND_VSR },
704 { "vs.38", 38, PPC_OPERAND_VSR },
705 { "vs.39", 39, PPC_OPERAND_VSR },
706 { "vs.4", 4, PPC_OPERAND_VSR },
707 { "vs.40", 40, PPC_OPERAND_VSR },
708 { "vs.41", 41, PPC_OPERAND_VSR },
709 { "vs.42", 42, PPC_OPERAND_VSR },
710 { "vs.43", 43, PPC_OPERAND_VSR },
711 { "vs.44", 44, PPC_OPERAND_VSR },
712 { "vs.45", 45, PPC_OPERAND_VSR },
713 { "vs.46", 46, PPC_OPERAND_VSR },
714 { "vs.47", 47, PPC_OPERAND_VSR },
715 { "vs.48", 48, PPC_OPERAND_VSR },
716 { "vs.49", 49, PPC_OPERAND_VSR },
717 { "vs.5", 5, PPC_OPERAND_VSR },
718 { "vs.50", 50, PPC_OPERAND_VSR },
719 { "vs.51", 51, PPC_OPERAND_VSR },
720 { "vs.52", 52, PPC_OPERAND_VSR },
721 { "vs.53", 53, PPC_OPERAND_VSR },
722 { "vs.54", 54, PPC_OPERAND_VSR },
723 { "vs.55", 55, PPC_OPERAND_VSR },
724 { "vs.56", 56, PPC_OPERAND_VSR },
725 { "vs.57", 57, PPC_OPERAND_VSR },
726 { "vs.58", 58, PPC_OPERAND_VSR },
727 { "vs.59", 59, PPC_OPERAND_VSR },
728 { "vs.6", 6, PPC_OPERAND_VSR },
729 { "vs.60", 60, PPC_OPERAND_VSR },
730 { "vs.61", 61, PPC_OPERAND_VSR },
731 { "vs.62", 62, PPC_OPERAND_VSR },
732 { "vs.63", 63, PPC_OPERAND_VSR },
733 { "vs.7", 7, PPC_OPERAND_VSR },
734 { "vs.8", 8, PPC_OPERAND_VSR },
735 { "vs.9", 9, PPC_OPERAND_VSR },
737 { "vs0", 0, PPC_OPERAND_VSR },
738 { "vs1", 1, PPC_OPERAND_VSR },
739 { "vs10", 10, PPC_OPERAND_VSR },
740 { "vs11", 11, PPC_OPERAND_VSR },
741 { "vs12", 12, PPC_OPERAND_VSR },
742 { "vs13", 13, PPC_OPERAND_VSR },
743 { "vs14", 14, PPC_OPERAND_VSR },
744 { "vs15", 15, PPC_OPERAND_VSR },
745 { "vs16", 16, PPC_OPERAND_VSR },
746 { "vs17", 17, PPC_OPERAND_VSR },
747 { "vs18", 18, PPC_OPERAND_VSR },
748 { "vs19", 19, PPC_OPERAND_VSR },
749 { "vs2", 2, PPC_OPERAND_VSR },
750 { "vs20", 20, PPC_OPERAND_VSR },
751 { "vs21", 21, PPC_OPERAND_VSR },
752 { "vs22", 22, PPC_OPERAND_VSR },
753 { "vs23", 23, PPC_OPERAND_VSR },
754 { "vs24", 24, PPC_OPERAND_VSR },
755 { "vs25", 25, PPC_OPERAND_VSR },
756 { "vs26", 26, PPC_OPERAND_VSR },
757 { "vs27", 27, PPC_OPERAND_VSR },
758 { "vs28", 28, PPC_OPERAND_VSR },
759 { "vs29", 29, PPC_OPERAND_VSR },
760 { "vs3", 3, PPC_OPERAND_VSR },
761 { "vs30", 30, PPC_OPERAND_VSR },
762 { "vs31", 31, PPC_OPERAND_VSR },
763 { "vs32", 32, PPC_OPERAND_VSR },
764 { "vs33", 33, PPC_OPERAND_VSR },
765 { "vs34", 34, PPC_OPERAND_VSR },
766 { "vs35", 35, PPC_OPERAND_VSR },
767 { "vs36", 36, PPC_OPERAND_VSR },
768 { "vs37", 37, PPC_OPERAND_VSR },
769 { "vs38", 38, PPC_OPERAND_VSR },
770 { "vs39", 39, PPC_OPERAND_VSR },
771 { "vs4", 4, PPC_OPERAND_VSR },
772 { "vs40", 40, PPC_OPERAND_VSR },
773 { "vs41", 41, PPC_OPERAND_VSR },
774 { "vs42", 42, PPC_OPERAND_VSR },
775 { "vs43", 43, PPC_OPERAND_VSR },
776 { "vs44", 44, PPC_OPERAND_VSR },
777 { "vs45", 45, PPC_OPERAND_VSR },
778 { "vs46", 46, PPC_OPERAND_VSR },
779 { "vs47", 47, PPC_OPERAND_VSR },
780 { "vs48", 48, PPC_OPERAND_VSR },
781 { "vs49", 49, PPC_OPERAND_VSR },
782 { "vs5", 5, PPC_OPERAND_VSR },
783 { "vs50", 50, PPC_OPERAND_VSR },
784 { "vs51", 51, PPC_OPERAND_VSR },
785 { "vs52", 52, PPC_OPERAND_VSR },
786 { "vs53", 53, PPC_OPERAND_VSR },
787 { "vs54", 54, PPC_OPERAND_VSR },
788 { "vs55", 55, PPC_OPERAND_VSR },
789 { "vs56", 56, PPC_OPERAND_VSR },
790 { "vs57", 57, PPC_OPERAND_VSR },
791 { "vs58", 58, PPC_OPERAND_VSR },
792 { "vs59", 59, PPC_OPERAND_VSR },
793 { "vs6", 6, PPC_OPERAND_VSR },
794 { "vs60", 60, PPC_OPERAND_VSR },
795 { "vs61", 61, PPC_OPERAND_VSR },
796 { "vs62", 62, PPC_OPERAND_VSR },
797 { "vs63", 63, PPC_OPERAND_VSR },
798 { "vs7", 7, PPC_OPERAND_VSR },
799 { "vs8", 8, PPC_OPERAND_VSR },
800 { "vs9", 9, PPC_OPERAND_VSR },
802 { "xer", 1, PPC_OPERAND_SPR }
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg *
811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 int middle, low, high;
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
828 return ®s[middle];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS *expressionP)
850 const struct pd_reg *reg;
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
860 else if (!reg_names_p || !ISALPHA (name[0]))
863 c = get_symbol_name (&name);
864 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
869 /* Look to see if it's in the register table. */
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg->value;
874 expressionP->X_md = reg->flags;
876 /* Make the rest nice. */
877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG },
898 { "cr1", 1, PPC_OPERAND_CR_REG },
899 { "cr2", 2, PPC_OPERAND_CR_REG },
900 { "cr3", 3, PPC_OPERAND_CR_REG },
901 { "cr4", 4, PPC_OPERAND_CR_REG },
902 { "cr5", 5, PPC_OPERAND_CR_REG },
903 { "cr6", 6, PPC_OPERAND_CR_REG },
904 { "cr7", 7, PPC_OPERAND_CR_REG },
905 { "eq", 2, PPC_OPERAND_CR_BIT },
906 { "gt", 1, PPC_OPERAND_CR_BIT },
907 { "lt", 0, PPC_OPERAND_CR_BIT },
908 { "so", 3, PPC_OPERAND_CR_BIT },
909 { "un", 3, PPC_OPERAND_CR_BIT }
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name, expressionS *exp)
918 const struct pd_reg *reg;
925 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
930 exp->X_op = O_register;
931 exp->X_add_number = reg->value;
932 exp->X_md = reg->flags;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right->X_op == O_register
946 && right->X_md == PPC_OPERAND_CR_REG
947 && left->X_op == O_constant
948 && left->X_add_number == 4)
949 || (left->X_op == O_register
950 && left->X_md == PPC_OPERAND_CR_REG
951 && right->X_op == O_constant
952 && right->X_add_number == 4)))
954 left->X_op = O_register;
955 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT;
956 left->X_add_number *= right->X_add_number;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right->X_op == O_register
962 && left->X_op == O_register
964 && ((right->X_md == PPC_OPERAND_CR_BIT
965 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT))
966 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)
967 && left->X_md == PPC_OPERAND_CR_BIT)))
969 left->X_md = PPC_OPERAND_CR_BIT;
970 right->X_op = O_constant;
974 /* Accept reg +/- constant. */
975 if (left->X_op == O_register
976 && !((op == O_add || op == O_subtract) && right->X_op == O_constant))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right->X_op == O_register)
982 if (op == O_add && left->X_op == O_constant)
983 left->X_md = right->X_md;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
996 /* Opcode hash table. */
997 static struct hash_control *ppc_hash;
999 /* Macro hash table. */
1000 static struct hash_control *ppc_macro_hash;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags = 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris = SOLARIS_P;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment = 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS *ppc_text_csects;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment = 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS *ppc_data_csects;
1039 /* The current csect. */
1040 static symbolS *ppc_current_csect;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS *ppc_toc_csect;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS *ppc_toc_frag;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS *ppc_after_toc_frag;
1056 /* The current static block. */
1057 static symbolS *ppc_current_block;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection *ppc_coff_debug_section;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection {
1066 /* Subsections are simply linked. */
1067 struct dw_subsection *link;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp;
1076 static struct dw_section {
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection *list_subseg;
1083 /* The anonymous subsection. */
1084 struct dw_subsection *anon_subseg;
1085 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section;
1092 static segT pdata_section;
1093 static segT reldata_section;
1094 static segT rdata_section;
1095 static segT tocdata_section;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section;
1099 static segT ppc_current_section;
1104 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list;
1106 unsigned int ppc_apuinfo_num;
1107 unsigned int ppc_apuinfo_num_alloc;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts = "b:l:usm:K:VQ:";
1113 const char *const md_shortopts = "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts[] = {
1117 {"nops", required_argument, NULL, OPTION_NOPS},
1118 {"ppc476-workaround", no_argument, &warn_476, 1},
1119 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1120 {NULL, no_argument, NULL, 0}
1122 const size_t md_longopts_size = sizeof (md_longopts);
1125 md_parse_option (int c, const char *arg)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg, "e") == 0)
1142 target_big_endian = 0;
1143 set_target_endian = 1;
1144 if (ppc_cpu & PPC_OPCODE_VLE)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg, "e") == 0)
1155 target_big_endian = 1;
1156 set_target_endian = 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1168 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg, "64") == 0)
1182 if (ppc_cpu & PPC_OPCODE_VLE)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg, "32") == 0)
1195 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0)
1200 if (strcmp (arg, "vle") == 0)
1202 if (set_target_endian && target_big_endian == 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg, "no-vle") == 0)
1211 sticky &= ~PPC_OPCODE_VLE;
1213 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke");
1214 new_cpu &= ~PPC_OPCODE_VLE;
1219 else if (strcmp (arg, "regnames") == 0)
1222 else if (strcmp (arg, "no-regnames") == 0)
1223 reg_names_p = FALSE;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg, "relocatable") == 0)
1230 shlib = SHLIB_MRELOCATABLE;
1231 ppc_flags |= EF_PPC_RELOCATABLE;
1234 else if (strcmp (arg, "relocatable-lib") == 0)
1236 shlib = SHLIB_MRELOCATABLE;
1237 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg, "emb") == 0)
1242 ppc_flags |= EF_PPC_EMB;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg, "little") == 0
1246 || strcmp (arg, "little-endian") == 0)
1248 target_big_endian = 0;
1249 set_target_endian = 1;
1250 if (ppc_cpu & PPC_OPCODE_VLE)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1256 target_big_endian = 1;
1257 set_target_endian = 1;
1260 else if (strcmp (arg, "solaris") == 0)
1263 ppc_comment_chars = ppc_solaris_comment_chars;
1266 else if (strcmp (arg, "no-solaris") == 0)
1269 ppc_comment_chars = ppc_eabi_comment_chars;
1271 else if (strcmp (arg, "spe2") == 0)
1273 ppc_cpu |= PPC_OPCODE_SPE2;
1278 as_bad (_("invalid switch -m%s"), arg);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit = strtoul (optarg, &end, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream)
1326 fprintf (stream, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl, -mgekko, -mbroadway\n\
1344 generate code for PowerPC 750cl/Gekko/Broadway\n\
1345 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1346 fprintf (stream, _("\
1347 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1348 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1349 -mbooke generate code for 32-bit PowerPC BookE\n\
1350 -ma2 generate code for A2 architecture\n\
1351 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1352 -mpower5, -mpwr5, -mpwr5x\n\
1353 generate code for Power5 architecture\n\
1354 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1355 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1356 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1357 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1358 -mcell generate code for Cell Broadband Engine architecture\n\
1359 -mcom generate code for Power/PowerPC common instructions\n\
1360 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1361 fprintf (stream, _("\
1362 -maltivec generate code for AltiVec\n\
1363 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1364 -me300 generate code for PowerPC e300 family\n\
1365 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1366 -me500mc, generate code for Freescale e500mc core complex\n\
1367 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1368 -me5500, generate code for Freescale e5500 core complex\n\
1369 -me6500, generate code for Freescale e6500 core complex\n\
1370 -mspe generate code for Motorola SPE instructions\n\
1371 -mspe2 generate code for Freescale SPE2 instructions\n\
1372 -mvle generate code for Freescale VLE instructions\n\
1373 -mtitan generate code for AppliedMicro Titan core complex\n\
1374 -mregnames Allow symbolic names for registers\n\
1375 -mno-regnames Do not allow symbolic names for registers\n"));
1377 fprintf (stream, _("\
1378 -mrelocatable support for GCC's -mrelocatble option\n\
1379 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1380 -memb set PPC_EMB bit in ELF flags\n\
1381 -mlittle, -mlittle-endian, -le\n\
1382 generate code for a little endian machine\n\
1383 -mbig, -mbig-endian, -be\n\
1384 generate code for a big endian machine\n\
1385 -msolaris generate code for Solaris\n\
1386 -mno-solaris do not generate code for Solaris\n\
1387 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1388 -V print assembler version number\n\
1389 -Qy, -Qn ignored\n"));
1391 fprintf (stream, _("\
1392 -nops=count when aligning, more than COUNT nops uses a branch\n\
1393 -ppc476-workaround warn if emitting data to code sections\n"));
1396 /* Set ppc_cpu if it is not already set. */
1401 const char *default_os = TARGET_OS;
1402 const char *default_cpu = TARGET_CPU;
1404 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1407 if (target_big_endian)
1408 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1410 /* The minimum supported cpu for 64-bit little-endian is power8. */
1411 ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8");
1412 else if (strncmp (default_os, "aix", 3) == 0
1413 && default_os[3] >= '4' && default_os[3] <= '9')
1414 ppc_cpu |= PPC_OPCODE_COMMON;
1415 else if (strncmp (default_os, "aix3", 4) == 0)
1416 ppc_cpu |= PPC_OPCODE_POWER;
1417 else if (strcmp (default_cpu, "rs6000") == 0)
1418 ppc_cpu |= PPC_OPCODE_POWER;
1419 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1420 ppc_cpu |= PPC_OPCODE_PPC;
1422 as_fatal (_("unknown default cpu = %s, os = %s"),
1423 default_cpu, default_os);
1427 /* Figure out the BFD architecture to use. This function and ppc_mach
1428 are called well before md_begin, when the output file is opened. */
1430 enum bfd_architecture
1433 const char *default_cpu = TARGET_CPU;
1436 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1437 return bfd_arch_powerpc;
1438 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1439 return bfd_arch_powerpc;
1440 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1441 return bfd_arch_rs6000;
1442 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1444 if (strcmp (default_cpu, "rs6000") == 0)
1445 return bfd_arch_rs6000;
1446 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1447 return bfd_arch_powerpc;
1450 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1451 return bfd_arch_unknown;
1458 return bfd_mach_ppc64;
1459 else if (ppc_arch () == bfd_arch_rs6000)
1460 return bfd_mach_rs6k;
1461 else if (ppc_cpu & PPC_OPCODE_TITAN)
1462 return bfd_mach_ppc_titan;
1463 else if (ppc_cpu & PPC_OPCODE_VLE)
1464 return bfd_mach_ppc_vle;
1466 return bfd_mach_ppc;
1470 ppc_target_format (void)
1474 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1476 return "xcoff-powermac";
1479 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1481 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1487 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1488 # elif defined (TE_VXWORKS)
1489 return "elf32-powerpc-vxworks";
1491 return (target_big_endian
1492 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1493 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1498 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1499 Return TRUE if there's a problem, otherwise FALSE. */
1502 insn_validate (const struct powerpc_opcode *op)
1504 const unsigned char *o;
1505 uint64_t omask = op->mask;
1507 /* The mask had better not trim off opcode bits. */
1508 if ((op->opcode & omask) != op->opcode)
1510 as_bad (_("mask trims opcode bits for %s"), op->name);
1514 /* The operands must not overlap the opcode or each other. */
1515 for (o = op->operands; *o; ++o)
1517 bfd_boolean optional = FALSE;
1518 if (*o >= num_powerpc_operands)
1520 as_bad (_("operand index error for %s"), op->name);
1526 const struct powerpc_operand *operand = &powerpc_operands[*o];
1527 if (operand->shift == (int) PPC_OPSHIFT_INV)
1534 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1536 else if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1538 mask = (*operand->insert) (0, val, ppc_cpu, &errmsg);
1540 else if (operand->shift >= 0)
1541 mask = operand->bitm << operand->shift;
1543 mask = operand->bitm >> -operand->shift;
1546 as_bad (_("operand %d overlap in %s"),
1547 (int) (o - op->operands), op->name);
1551 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0)
1555 as_bad (_("non-optional operand %d follows optional operand in %s"),
1556 (int) (o - op->operands), op->name);
1564 /* Insert opcodes and macros into hash tables. Called at startup and
1565 for .machine pseudo. */
1568 ppc_setup_opcodes (void)
1570 const struct powerpc_opcode *op;
1571 const struct powerpc_opcode *op_end;
1572 const struct powerpc_macro *macro;
1573 const struct powerpc_macro *macro_end;
1574 bfd_boolean bad_insn = FALSE;
1576 if (ppc_hash != NULL)
1577 hash_die (ppc_hash);
1578 if (ppc_macro_hash != NULL)
1579 hash_die (ppc_macro_hash);
1581 /* Insert the opcodes into a hash table. */
1582 ppc_hash = hash_new ();
1584 if (ENABLE_CHECKING)
1588 /* An index into powerpc_operands is stored in struct fix
1589 fx_pcrel_adjust which is 8 bits wide. */
1590 gas_assert (num_powerpc_operands < 256);
1592 /* Check operand masks. Code here and in the disassembler assumes
1593 all the 1's in the mask are contiguous. */
1594 for (i = 0; i < num_powerpc_operands; ++i)
1596 uint64_t mask = powerpc_operands[i].bitm;
1600 right_bit = mask & -mask;
1602 right_bit = mask & -mask;
1603 if (mask != right_bit)
1605 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1608 for (j = i + 1; j < num_powerpc_operands; ++j)
1609 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1610 sizeof (powerpc_operands[0])) == 0)
1612 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1619 op_end = powerpc_opcodes + powerpc_num_opcodes;
1620 for (op = powerpc_opcodes; op < op_end; op++)
1622 if (ENABLE_CHECKING)
1624 unsigned int new_opcode = PPC_OP (op[0].opcode);
1626 #ifdef PRINT_OPCODE_TABLE
1627 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1628 op->name, (unsigned int) (op - powerpc_opcodes),
1629 new_opcode, (unsigned long long) op->opcode,
1630 (unsigned long long) op->mask, (unsigned long long) op->flags);
1633 /* The major opcodes had better be sorted. Code in the disassembler
1634 assumes the insns are sorted according to major opcode. */
1635 if (op != powerpc_opcodes
1636 && new_opcode < PPC_OP (op[-1].opcode))
1638 as_bad (_("major opcode is not sorted for %s"), op->name);
1642 if ((op->flags & PPC_OPCODE_VLE) != 0)
1644 as_bad (_("%s is enabled by vle flag"), op->name);
1647 if (PPC_OP (op->opcode) != 4
1648 && PPC_OP (op->opcode) != 31
1649 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1651 as_bad (_("%s not disabled by vle flag"), op->name);
1654 bad_insn |= insn_validate (op);
1657 if ((ppc_cpu & op->flags) != 0
1658 && !(ppc_cpu & op->deprecated))
1662 retval = hash_insert (ppc_hash, op->name, (void *) op);
1665 as_bad (_("duplicate instruction %s"),
1672 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1673 for (op = powerpc_opcodes; op < op_end; op++)
1674 hash_insert (ppc_hash, op->name, (void *) op);
1676 op_end = vle_opcodes + vle_num_opcodes;
1677 for (op = vle_opcodes; op < op_end; op++)
1679 if (ENABLE_CHECKING)
1681 unsigned new_seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask));
1683 #ifdef PRINT_OPCODE_TABLE
1684 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1685 op->name, (unsigned int) (op - vle_opcodes),
1686 (unsigned int) new_seg, (unsigned long long) op->opcode,
1687 (unsigned long long) op->mask, (unsigned long long) op->flags);
1690 /* The major opcodes had better be sorted. Code in the disassembler
1691 assumes the insns are sorted according to major opcode. */
1692 if (op != vle_opcodes
1693 && new_seg < VLE_OP_TO_SEG (VLE_OP (op[-1].opcode, op[-1].mask)))
1695 as_bad (_("major opcode is not sorted for %s"), op->name);
1699 bad_insn |= insn_validate (op);
1702 if ((ppc_cpu & op->flags) != 0
1703 && !(ppc_cpu & op->deprecated))
1707 retval = hash_insert (ppc_hash, op->name, (void *) op);
1710 as_bad (_("duplicate instruction %s"),
1717 /* SPE2 instructions */
1718 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2)
1720 op_end = spe2_opcodes + spe2_num_opcodes;
1721 for (op = spe2_opcodes; op < op_end; op++)
1723 if (ENABLE_CHECKING)
1725 if (op != spe2_opcodes)
1727 unsigned old_seg, new_seg;
1729 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1730 old_seg = VLE_OP_TO_SEG (old_seg);
1731 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1732 new_seg = VLE_OP_TO_SEG (new_seg);
1734 /* The major opcodes had better be sorted. Code in the
1735 disassembler assumes the insns are sorted according to
1737 if (new_seg < old_seg)
1739 as_bad (_("major opcode is not sorted for %s"), op->name);
1744 bad_insn |= insn_validate (op);
1747 if ((ppc_cpu & op->flags) != 0 && !(ppc_cpu & op->deprecated))
1751 retval = hash_insert (ppc_hash, op->name, (void *) op);
1754 as_bad (_("duplicate instruction %s"),
1761 for (op = spe2_opcodes; op < op_end; op++)
1762 hash_insert (ppc_hash, op->name, (void *) op);
1765 /* Insert the macros into a hash table. */
1766 ppc_macro_hash = hash_new ();
1768 macro_end = powerpc_macros + powerpc_num_macros;
1769 for (macro = powerpc_macros; macro < macro_end; macro++)
1771 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1775 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1776 if (retval != (const char *) NULL)
1778 as_bad (_("duplicate macro %s"), macro->name);
1788 /* This function is called when the assembler starts up. It is called
1789 after the options have been parsed and the output file has been
1797 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1798 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1801 /* Set the ELF flags if desired. */
1802 if (ppc_flags && !msolaris)
1803 bfd_set_private_flags (stdoutput, ppc_flags);
1806 ppc_setup_opcodes ();
1808 /* Tell the main code what the endianness is if it is not overridden
1810 if (!set_target_endian)
1812 set_target_endian = 1;
1813 target_big_endian = PPC_BIG_ENDIAN;
1817 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1819 /* Create dummy symbols to serve as initial csects. This forces the
1820 text csects to precede the data csects. These symbols will not
1822 ppc_text_csects = symbol_make ("dummy\001");
1823 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1824 ppc_data_csects = symbol_make ("dummy\001");
1825 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1830 ppc_current_section = text_section;
1831 ppc_previous_section = 0;
1840 if (ppc_apuinfo_list == NULL)
1843 /* Ok, so write the section info out. We have this layout:
1847 0 8 length of "APUinfo\0"
1848 4 (n*4) number of APU's (4 bytes each)
1851 20 APU#1 first APU's info
1852 24 APU#2 second APU's info
1857 asection *seg = now_seg;
1858 subsegT subseg = now_subseg;
1859 asection *apuinfo_secp = (asection *) NULL;
1862 /* Create the .PPC.EMB.apuinfo section. */
1863 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1864 bfd_set_section_flags (stdoutput,
1866 SEC_HAS_CONTENTS | SEC_READONLY);
1869 md_number_to_chars (p, (valueT) 8, 4);
1872 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1875 md_number_to_chars (p, (valueT) 2, 4);
1878 strcpy (p, APUINFO_LABEL);
1880 for (i = 0; i < ppc_apuinfo_num; i++)
1883 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1886 frag_align (2, 0, 0);
1888 /* We probably can't restore the current segment, for there likely
1891 subseg_set (seg, subseg);
1896 /* Insert an operand value into an instruction. */
1899 ppc_insert_operand (uint64_t insn,
1900 const struct powerpc_operand *operand,
1906 int64_t min, max, right;
1908 max = operand->bitm;
1912 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1914 /* Extend the allowed range for addis to [-32768, 65535].
1915 Similarly for cmpli and some VLE high part insns. For 64-bit
1916 it would be good to disable this for signed fields since the
1917 value is sign extended into the high 32 bits of the register.
1918 If the value is, say, an address, then we might care about
1919 the high bits. However, gcc as of 2014-06 uses unsigned
1920 values when loading the high part of 64-bit constants using
1922 min = ~(max >> 1) & -right;
1924 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1926 max = (max >> 1) & -right;
1927 min = ~max & -right;
1930 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1933 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1942 /* Some people write constants with the sign extension done by
1943 hand but only up to 32 bits. This shouldn't really be valid,
1944 but, to permit this code to assemble on a 64-bit host, we
1945 sign extend the 32-bit value to 64 bits if so doing makes the
1948 && (val - (1LL << 32)) >= min
1949 && (val - (1LL << 32)) <= max
1950 && ((val - (1LL << 32)) & (right - 1)) == 0)
1951 val = val - (1LL << 32);
1953 /* Similarly, people write expressions like ~(1<<15), and expect
1954 this to be OK for a 32-bit unsigned value. */
1956 && (val + (1LL << 32)) >= min
1957 && (val + (1LL << 32)) <= max
1958 && ((val + (1LL << 32)) & (right - 1)) == 0)
1959 val = val + (1LL << 32);
1963 || (val & (right - 1)) != 0)
1964 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1967 if (operand->insert)
1972 insn = (*operand->insert) (insn, val, cpu, &errmsg);
1973 if (errmsg != (const char *) NULL)
1974 as_bad_where (file, line, "%s", errmsg);
1976 else if (operand->shift >= 0)
1977 insn |= (val & operand->bitm) << operand->shift;
1979 insn |= (val & operand->bitm) >> -operand->shift;
1986 /* Parse @got, etc. and return the desired relocation. */
1987 static bfd_reloc_code_real_type
1988 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1992 unsigned int length : 8;
1993 unsigned int valid32 : 1;
1994 unsigned int valid64 : 1;
2003 const struct map_bfd *ptr;
2005 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
2006 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
2007 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
2009 static const struct map_bfd mapping[] = {
2010 MAP ("l", BFD_RELOC_LO16),
2011 MAP ("h", BFD_RELOC_HI16),
2012 MAP ("ha", BFD_RELOC_HI16_S),
2013 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
2014 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
2015 MAP ("got", BFD_RELOC_16_GOTOFF),
2016 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
2017 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
2018 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
2019 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
2020 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
2021 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
2022 MAP ("copy", BFD_RELOC_PPC_COPY),
2023 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
2024 MAP ("sectoff", BFD_RELOC_16_BASEREL),
2025 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
2026 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
2027 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
2028 MAP ("tls", BFD_RELOC_PPC_TLS),
2029 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
2030 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
2031 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
2032 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
2033 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
2034 MAP ("tprel", BFD_RELOC_PPC_TPREL),
2035 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
2036 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
2037 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
2038 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
2039 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
2040 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
2041 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
2042 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
2043 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
2044 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
2045 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
2046 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
2047 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
2048 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
2049 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
2050 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
2051 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
2052 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
2053 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
2054 MAP32 ("fixup", BFD_RELOC_CTOR),
2055 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
2056 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
2057 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
2058 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
2059 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
2060 MAP32 ("sdarel", BFD_RELOC_GPREL16),
2061 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
2062 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
2063 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
2064 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
2065 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
2066 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
2067 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
2068 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
2069 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
2070 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
2071 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
2072 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
2073 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
2074 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
2075 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
2076 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
2077 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
2078 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
2079 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
2080 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
2081 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
2082 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
2083 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
2084 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
2085 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
2086 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
2087 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
2088 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
2089 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
2090 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
2091 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
2092 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
2093 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
2094 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
2095 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
2096 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
2097 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
2098 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
2099 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
2100 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
2101 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
2102 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
2103 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
2104 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
2105 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
2106 MAP64 ("notoc", BFD_RELOC_PPC64_REL24_NOTOC),
2107 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
2111 return BFD_RELOC_NONE;
2113 for (ch = *str, str2 = ident;
2114 (str2 < ident + sizeof (ident) - 1
2115 && (ISALNUM (ch) || ch == '@'));
2118 *str2++ = TOLOWER (ch);
2125 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2126 if (ch == ptr->string[0]
2127 && len == ptr->length
2128 && memcmp (ident, ptr->string, ptr->length) == 0
2129 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2131 int reloc = ptr->reloc;
2133 if (!ppc_obj64 && exp_p->X_add_number != 0)
2137 case BFD_RELOC_16_GOTOFF:
2138 case BFD_RELOC_LO16_GOTOFF:
2139 case BFD_RELOC_HI16_GOTOFF:
2140 case BFD_RELOC_HI16_S_GOTOFF:
2141 as_warn (_("identifier+constant@got means "
2142 "identifier@got+constant"));
2145 case BFD_RELOC_PPC_GOT_TLSGD16:
2146 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2147 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2148 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2149 case BFD_RELOC_PPC_GOT_TLSLD16:
2150 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2151 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2152 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2153 case BFD_RELOC_PPC_GOT_DTPREL16:
2154 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2155 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2156 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2157 case BFD_RELOC_PPC_GOT_TPREL16:
2158 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2159 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2160 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2161 as_bad (_("symbol+offset not supported for got tls"));
2166 /* Now check for identifier@suffix+constant. */
2167 if (*str == '-' || *str == '+')
2169 char *orig_line = input_line_pointer;
2170 expressionS new_exp;
2172 input_line_pointer = str;
2173 expression (&new_exp);
2174 if (new_exp.X_op == O_constant)
2176 exp_p->X_add_number += new_exp.X_add_number;
2177 str = input_line_pointer;
2180 if (&input_line_pointer != str_p)
2181 input_line_pointer = orig_line;
2185 if (reloc == (int) BFD_RELOC_PPC64_TOC
2186 && exp_p->X_op == O_symbol
2187 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2189 /* Change the symbol so that the dummy .TOC. symbol can be
2190 omitted from the object file. */
2191 exp_p->X_add_symbol = &abs_symbol;
2194 return (bfd_reloc_code_real_type) reloc;
2197 return BFD_RELOC_NONE;
2200 /* Support @got, etc. on constants emitted via .short, .int etc. */
2202 bfd_reloc_code_real_type
2203 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2206 if (nbytes >= 2 && *input_line_pointer == '@')
2207 return ppc_elf_suffix (&input_line_pointer, exp);
2208 return BFD_RELOC_NONE;
2211 /* Warn when emitting data to code sections, unless we are emitting
2212 a relocation that ld --ppc476-workaround uses to recognise data
2213 *and* there was an unconditional branch prior to the data. */
2216 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2217 unsigned int nbytes, fixS *fix)
2220 && (now_seg->flags & SEC_CODE) != 0
2223 || !(fix->fx_r_type == BFD_RELOC_32
2224 || fix->fx_r_type == BFD_RELOC_CTOR
2225 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2226 || !(last_seg == now_seg && last_subseg == now_subseg)
2227 || !((last_insn & (0x3f << 26)) == (18u << 26)
2228 || ((last_insn & (0x3f << 26)) == (16u << 26)
2229 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2230 || ((last_insn & (0x3f << 26)) == (19u << 26)
2231 && (last_insn & (0x3ff << 1)) == (16u << 1)
2232 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2234 /* Flag that we've warned. */
2238 as_warn (_("data in executable section"));
2242 /* Solaris pseduo op to change to the .rodata section. */
2244 ppc_elf_rdata (int xxx)
2246 char *save_line = input_line_pointer;
2247 static char section[] = ".rodata\n";
2249 /* Just pretend this is .section .rodata */
2250 input_line_pointer = section;
2251 obj_elf_section (xxx);
2253 input_line_pointer = save_line;
2256 /* Pseudo op to make file scope bss items. */
2258 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2271 c = get_symbol_name (&name);
2273 /* Just after name is now '\0'. */
2274 p = input_line_pointer;
2276 SKIP_WHITESPACE_AFTER_NAME ();
2277 if (*input_line_pointer != ',')
2279 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2280 ignore_rest_of_line ();
2284 input_line_pointer++; /* skip ',' */
2285 if ((size = get_absolute_expression ()) < 0)
2287 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2288 ignore_rest_of_line ();
2292 /* The third argument to .lcomm is the alignment. */
2293 if (*input_line_pointer != ',')
2297 ++input_line_pointer;
2298 align = get_absolute_expression ();
2301 as_warn (_("ignoring bad alignment"));
2307 symbolP = symbol_find_or_make (name);
2310 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2312 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2313 S_GET_NAME (symbolP));
2314 ignore_rest_of_line ();
2318 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2320 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2321 S_GET_NAME (symbolP),
2322 (long) S_GET_VALUE (symbolP),
2325 ignore_rest_of_line ();
2331 old_subsec = now_subseg;
2334 /* Convert to a power of 2 alignment. */
2335 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2338 as_bad (_("common alignment not a power of 2"));
2339 ignore_rest_of_line ();
2346 record_alignment (bss_section, align2);
2347 subseg_set (bss_section, 1);
2349 frag_align (align2, 0, 0);
2350 if (S_GET_SEGMENT (symbolP) == bss_section)
2351 symbol_get_frag (symbolP)->fr_symbol = 0;
2352 symbol_set_frag (symbolP, frag_now);
2353 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2356 S_SET_SIZE (symbolP, size);
2357 S_SET_SEGMENT (symbolP, bss_section);
2358 subseg_set (old_sec, old_subsec);
2359 demand_empty_rest_of_line ();
2362 /* Pseudo op to set symbol local entry point. */
2364 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2367 char c = get_symbol_name (&name);
2372 elf_symbol_type *elfsym;
2374 p = input_line_pointer;
2376 SKIP_WHITESPACE_AFTER_NAME ();
2377 if (*input_line_pointer != ',')
2380 as_bad (_("expected comma after name `%s' in .localentry directive"),
2383 ignore_rest_of_line ();
2386 input_line_pointer++;
2388 if (exp.X_op == O_absent)
2390 as_bad (_("missing expression in .localentry directive"));
2391 exp.X_op = O_constant;
2392 exp.X_add_number = 0;
2395 sym = symbol_find_or_make (name);
2398 if (resolve_expression (&exp)
2399 && exp.X_op == O_constant)
2401 unsigned int encoded, ok;
2404 if (exp.X_add_number == 1 || exp.X_add_number == 7)
2405 encoded = exp.X_add_number << STO_PPC64_LOCAL_BIT;
2408 encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2409 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2411 as_bad (_(".localentry expression for `%s' "
2412 "is not a valid power of 2"), S_GET_NAME (sym));
2418 bfdsym = symbol_get_bfdsym (sym);
2419 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2420 gas_assert (elfsym);
2421 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2422 elfsym->internal_elf_sym.st_other |= encoded;
2423 if (ppc_abiversion == 0)
2428 as_bad (_(".localentry expression for `%s' "
2429 "does not evaluate to a constant"), S_GET_NAME (sym));
2431 demand_empty_rest_of_line ();
2434 /* Pseudo op to set ABI version. */
2436 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2441 if (exp.X_op == O_absent)
2443 as_bad (_("missing expression in .abiversion directive"));
2444 exp.X_op = O_constant;
2445 exp.X_add_number = 0;
2448 if (resolve_expression (&exp)
2449 && exp.X_op == O_constant)
2450 ppc_abiversion = exp.X_add_number;
2452 as_bad (_(".abiversion expression does not evaluate to a constant"));
2453 demand_empty_rest_of_line ();
2456 /* Parse a .gnu_attribute directive. */
2458 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2460 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2462 /* Check validity of defined powerpc tags. */
2463 if (tag == Tag_GNU_Power_ABI_FP
2464 || tag == Tag_GNU_Power_ABI_Vector
2465 || tag == Tag_GNU_Power_ABI_Struct_Return)
2469 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2471 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2472 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2473 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2474 as_warn (_("unknown .gnu_attribute value"));
2478 /* Set ABI version in output file. */
2482 if (ppc_obj64 && ppc_abiversion != 0)
2484 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2485 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2489 /* Validate any relocations emitted for -mrelocatable, possibly adding
2490 fixups for word relocations in writable segments, so we can adjust
2493 ppc_elf_validate_fix (fixS *fixp, segT seg)
2495 if (fixp->fx_done || fixp->fx_pcrel)
2504 case SHLIB_MRELOCATABLE:
2505 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2506 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2507 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2508 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2509 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2510 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2511 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2512 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2513 && (seg->flags & SEC_LOAD) != 0
2514 && strcmp (segment_name (seg), ".got2") != 0
2515 && strcmp (segment_name (seg), ".dtors") != 0
2516 && strcmp (segment_name (seg), ".ctors") != 0
2517 && strcmp (segment_name (seg), ".fixup") != 0
2518 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2519 && strcmp (segment_name (seg), ".eh_frame") != 0
2520 && strcmp (segment_name (seg), ".ex_shared") != 0)
2522 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2523 || fixp->fx_r_type != BFD_RELOC_CTOR)
2525 as_bad_where (fixp->fx_file, fixp->fx_line,
2526 _("relocation cannot be done when using -mrelocatable"));
2533 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2534 function descriptor sym if the corresponding code sym is used. */
2537 ppc_frob_file_before_adjust (void)
2545 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2551 name = S_GET_NAME (symp);
2555 if (! S_IS_WEAK (symp)
2556 || S_IS_DEFINED (symp))
2559 dotname = concat (".", name, (char *) NULL);
2560 dotsym = symbol_find_noref (dotname, 1);
2562 if (dotsym != NULL && (symbol_used_p (dotsym)
2563 || symbol_used_in_reloc_p (dotsym)))
2564 symbol_mark_used (symp);
2568 toc = bfd_get_section_by_name (stdoutput, ".toc");
2570 && toc_reloc_types != has_large_toc_reloc
2571 && bfd_section_size (stdoutput, toc) > 0x10000)
2572 as_warn (_("TOC section size exceeds 64k"));
2575 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2576 emitted. Other uses of .TOC. will cause the symbol to be marked
2577 with BSF_KEEP in md_apply_fix. */
2580 ppc_elf_adjust_symtab (void)
2585 symp = symbol_find (".TOC.");
2588 asymbol *bsym = symbol_get_bfdsym (symp);
2589 if ((bsym->flags & BSF_KEEP) == 0)
2590 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2594 #endif /* OBJ_ELF */
2599 * Summary of parse_toc_entry.
2601 * in: Input_line_pointer points to the '[' in one of:
2603 * [toc] [tocv] [toc32] [toc64]
2605 * Anything else is an error of one kind or another.
2608 * return value: success or failure
2609 * toc_kind: kind of toc reference
2610 * input_line_pointer:
2611 * success: first char after the ']'
2612 * failure: unchanged
2616 * [toc] - rv == success, toc_kind = default_toc
2617 * [tocv] - rv == success, toc_kind = data_in_toc
2618 * [toc32] - rv == success, toc_kind = must_be_32
2619 * [toc64] - rv == success, toc_kind = must_be_64
2623 enum toc_size_qualifier
2625 default_toc, /* The toc cell constructed should be the system default size */
2626 data_in_toc, /* This is a direct reference to a toc cell */
2627 must_be_32, /* The toc cell constructed must be 32 bits wide */
2628 must_be_64 /* The toc cell constructed must be 64 bits wide */
2632 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2637 enum toc_size_qualifier t;
2639 /* Save the input_line_pointer. */
2640 start = input_line_pointer;
2642 /* Skip over the '[' , and whitespace. */
2643 ++input_line_pointer;
2646 /* Find the spelling of the operand. */
2647 c = get_symbol_name (&toc_spec);
2649 if (strcmp (toc_spec, "toc") == 0)
2653 else if (strcmp (toc_spec, "tocv") == 0)
2657 else if (strcmp (toc_spec, "toc32") == 0)
2661 else if (strcmp (toc_spec, "toc64") == 0)
2667 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2668 *input_line_pointer = c;
2669 input_line_pointer = start;
2673 /* Now find the ']'. */
2674 *input_line_pointer = c;
2676 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2677 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2681 as_bad (_("syntax error: expected `]', found `%c'"), c);
2682 input_line_pointer = start;
2691 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2692 /* See whether a symbol is in the TOC section. */
2695 ppc_is_toc_sym (symbolS *sym)
2698 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2699 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2702 const char *sname = segment_name (S_GET_SEGMENT (sym));
2704 return strcmp (sname, ".toc") == 0;
2706 return strcmp (sname, ".got") == 0;
2709 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2713 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2715 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2719 /* Check we don't already exist. */
2720 for (i = 0; i < ppc_apuinfo_num; i++)
2721 if (ppc_apuinfo_list[i] == APUID (apu, version))
2724 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2726 if (ppc_apuinfo_num_alloc == 0)
2728 ppc_apuinfo_num_alloc = 4;
2729 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2733 ppc_apuinfo_num_alloc += 4;
2734 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2735 ppc_apuinfo_num_alloc);
2738 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2744 /* We need to keep a list of fixups. We can't simply generate them as
2745 we go, because that would require us to first create the frag, and
2746 that would screw up references to ``.''. */
2752 bfd_reloc_code_real_type reloc;
2755 #define MAX_INSN_FIXUPS (5)
2757 /* Return the field size operated on by RELOC, and whether it is
2758 pc-relative in PC_RELATIVE. */
2761 fixup_size (bfd_reloc_code_real_type reloc, bfd_boolean *pc_relative)
2763 unsigned int size = 0;
2764 bfd_boolean pcrel = FALSE;
2768 /* This switch statement must handle all BFD_RELOC values
2769 possible in instruction fixups. As is, it handles all
2770 BFD_RELOC values used in bfd/elf64-ppc.c, bfd/elf32-ppc.c,
2771 bfd/coff-ppc, bfd/coff-rs6000.c and bfd/coff64-rs6000.c.
2772 Overkill since data and marker relocs need not be handled
2773 here, but this way we can be sure a needed fixup reloc isn't
2774 accidentally omitted. */
2775 case BFD_RELOC_PPC_EMB_MRKREF:
2776 case BFD_RELOC_VTABLE_ENTRY:
2777 case BFD_RELOC_VTABLE_INHERIT:
2785 case BFD_RELOC_16_BASEREL:
2786 case BFD_RELOC_16_GOTOFF:
2787 case BFD_RELOC_GPREL16:
2788 case BFD_RELOC_HI16:
2789 case BFD_RELOC_HI16_BASEREL:
2790 case BFD_RELOC_HI16_GOTOFF:
2791 case BFD_RELOC_HI16_PLTOFF:
2792 case BFD_RELOC_HI16_S:
2793 case BFD_RELOC_HI16_S_BASEREL:
2794 case BFD_RELOC_HI16_S_GOTOFF:
2795 case BFD_RELOC_HI16_S_PLTOFF:
2796 case BFD_RELOC_LO16:
2797 case BFD_RELOC_LO16_BASEREL:
2798 case BFD_RELOC_LO16_GOTOFF:
2799 case BFD_RELOC_LO16_PLTOFF:
2800 case BFD_RELOC_PPC64_ADDR16_DS:
2801 case BFD_RELOC_PPC64_ADDR16_HIGH:
2802 case BFD_RELOC_PPC64_ADDR16_HIGHA:
2803 case BFD_RELOC_PPC64_ADDR16_LO_DS:
2804 case BFD_RELOC_PPC64_DTPREL16_DS:
2805 case BFD_RELOC_PPC64_DTPREL16_HIGH:
2806 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
2807 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
2808 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
2809 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
2810 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
2811 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
2812 case BFD_RELOC_PPC64_GOT16_DS:
2813 case BFD_RELOC_PPC64_GOT16_LO_DS:
2814 case BFD_RELOC_PPC64_HIGHER:
2815 case BFD_RELOC_PPC64_HIGHER_S:
2816 case BFD_RELOC_PPC64_HIGHEST:
2817 case BFD_RELOC_PPC64_HIGHEST_S:
2818 case BFD_RELOC_PPC64_PLT16_LO_DS:
2819 case BFD_RELOC_PPC64_PLTGOT16:
2820 case BFD_RELOC_PPC64_PLTGOT16_DS:
2821 case BFD_RELOC_PPC64_PLTGOT16_HA:
2822 case BFD_RELOC_PPC64_PLTGOT16_HI:
2823 case BFD_RELOC_PPC64_PLTGOT16_LO:
2824 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
2825 case BFD_RELOC_PPC64_SECTOFF_DS:
2826 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
2827 case BFD_RELOC_PPC64_TOC16_DS:
2828 case BFD_RELOC_PPC64_TOC16_HA:
2829 case BFD_RELOC_PPC64_TOC16_HI:
2830 case BFD_RELOC_PPC64_TOC16_LO:
2831 case BFD_RELOC_PPC64_TOC16_LO_DS:
2832 case BFD_RELOC_PPC64_TPREL16_DS:
2833 case BFD_RELOC_PPC64_TPREL16_HIGH:
2834 case BFD_RELOC_PPC64_TPREL16_HIGHA:
2835 case BFD_RELOC_PPC64_TPREL16_HIGHER:
2836 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
2837 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
2838 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
2839 case BFD_RELOC_PPC64_TPREL16_LO_DS:
2841 case BFD_RELOC_PPC_BA16:
2843 case BFD_RELOC_PPC_DTPREL16:
2844 case BFD_RELOC_PPC_DTPREL16_HA:
2845 case BFD_RELOC_PPC_DTPREL16_HI:
2846 case BFD_RELOC_PPC_DTPREL16_LO:
2847 case BFD_RELOC_PPC_EMB_NADDR16:
2848 case BFD_RELOC_PPC_EMB_NADDR16_HA:
2849 case BFD_RELOC_PPC_EMB_NADDR16_HI:
2850 case BFD_RELOC_PPC_EMB_NADDR16_LO:
2851 case BFD_RELOC_PPC_EMB_RELSDA:
2852 case BFD_RELOC_PPC_EMB_RELSEC16:
2853 case BFD_RELOC_PPC_EMB_RELST_LO:
2854 case BFD_RELOC_PPC_EMB_RELST_HI:
2855 case BFD_RELOC_PPC_EMB_RELST_HA:
2856 case BFD_RELOC_PPC_EMB_SDA2I16:
2857 case BFD_RELOC_PPC_EMB_SDA2REL:
2858 case BFD_RELOC_PPC_EMB_SDAI16:
2859 case BFD_RELOC_PPC_GOT_DTPREL16:
2860 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2861 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2862 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2863 case BFD_RELOC_PPC_GOT_TLSGD16:
2864 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2865 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2866 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2867 case BFD_RELOC_PPC_GOT_TLSLD16:
2868 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2869 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2870 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2871 case BFD_RELOC_PPC_GOT_TPREL16:
2872 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2873 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2874 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2875 case BFD_RELOC_PPC_TOC16:
2876 case BFD_RELOC_PPC_TPREL16:
2877 case BFD_RELOC_PPC_TPREL16_HA:
2878 case BFD_RELOC_PPC_TPREL16_HI:
2879 case BFD_RELOC_PPC_TPREL16_LO:
2883 case BFD_RELOC_16_PCREL:
2884 case BFD_RELOC_HI16_PCREL:
2885 case BFD_RELOC_HI16_S_PCREL:
2886 case BFD_RELOC_LO16_PCREL:
2887 case BFD_RELOC_PPC64_REL16_HIGH:
2888 case BFD_RELOC_PPC64_REL16_HIGHA:
2889 case BFD_RELOC_PPC64_REL16_HIGHER:
2890 case BFD_RELOC_PPC64_REL16_HIGHERA:
2891 case BFD_RELOC_PPC64_REL16_HIGHEST:
2892 case BFD_RELOC_PPC64_REL16_HIGHESTA:
2894 case BFD_RELOC_PPC_B16:
2896 case BFD_RELOC_PPC_VLE_REL8:
2901 case BFD_RELOC_16_GOT_PCREL: /* coff reloc, bad name re size. */
2903 case BFD_RELOC_32_GOTOFF:
2904 case BFD_RELOC_32_PLTOFF:
2906 case BFD_RELOC_CTOR:
2908 case BFD_RELOC_PPC64_ENTRY:
2909 case BFD_RELOC_PPC_16DX_HA:
2911 case BFD_RELOC_PPC_BA16:
2913 case BFD_RELOC_PPC_BA16_BRNTAKEN:
2914 case BFD_RELOC_PPC_BA16_BRTAKEN:
2915 case BFD_RELOC_PPC_BA26:
2916 case BFD_RELOC_PPC_EMB_BIT_FLD:
2917 case BFD_RELOC_PPC_EMB_NADDR32:
2918 case BFD_RELOC_PPC_EMB_SDA21:
2919 case BFD_RELOC_PPC_TLS:
2920 case BFD_RELOC_PPC_TLSGD:
2921 case BFD_RELOC_PPC_TLSLD:
2922 case BFD_RELOC_PPC_VLE_HA16A:
2923 case BFD_RELOC_PPC_VLE_HA16D:
2924 case BFD_RELOC_PPC_VLE_HI16A:
2925 case BFD_RELOC_PPC_VLE_HI16D:
2926 case BFD_RELOC_PPC_VLE_LO16A:
2927 case BFD_RELOC_PPC_VLE_LO16D:
2928 case BFD_RELOC_PPC_VLE_SDA21:
2929 case BFD_RELOC_PPC_VLE_SDA21_LO:
2930 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
2931 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
2932 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
2933 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
2934 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
2935 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
2940 case BFD_RELOC_24_PLT_PCREL:
2941 case BFD_RELOC_32_PCREL:
2942 case BFD_RELOC_32_PLT_PCREL:
2943 case BFD_RELOC_PPC64_REL24_NOTOC:
2945 case BFD_RELOC_PPC_B16:
2947 case BFD_RELOC_PPC_B16_BRNTAKEN:
2948 case BFD_RELOC_PPC_B16_BRTAKEN:
2949 case BFD_RELOC_PPC_B26:
2950 case BFD_RELOC_PPC_LOCAL24PC:
2951 case BFD_RELOC_PPC_REL16DX_HA:
2952 case BFD_RELOC_PPC_VLE_REL15:
2953 case BFD_RELOC_PPC_VLE_REL24:
2959 case BFD_RELOC_CTOR:
2961 case BFD_RELOC_PPC_COPY:
2962 case BFD_RELOC_PPC_DTPMOD:
2963 case BFD_RELOC_PPC_DTPREL:
2964 case BFD_RELOC_PPC_GLOB_DAT:
2965 case BFD_RELOC_PPC_TPREL:
2966 size = ppc_obj64 ? 8 : 4;
2970 case BFD_RELOC_64_PLTOFF:
2971 case BFD_RELOC_PPC64_ADDR64_LOCAL:
2972 case BFD_RELOC_PPC64_TOC:
2976 case BFD_RELOC_64_PCREL:
2977 case BFD_RELOC_64_PLT_PCREL:
2986 if (ENABLE_CHECKING)
2988 reloc_howto_type *reloc_howto = bfd_reloc_type_lookup (stdoutput, reloc);
2989 if (reloc_howto != NULL
2990 && (size != bfd_get_reloc_size (reloc_howto)
2991 || pcrel != reloc_howto->pc_relative))
2993 as_bad (_("%s howto doesn't match size/pcrel in gas"),
2998 *pc_relative = pcrel;
3002 /* If we have parsed a call to __tls_get_addr, parse an argument like
3003 (gd0@tlsgd). *STR is the leading parenthesis on entry. If an arg
3004 is successfully parsed, *STR is updated past the trailing
3005 parenthesis and trailing white space, and *TLS_FIX contains the
3006 reloc and arg expression. */
3009 parse_tls_arg (char **str, const expressionS *exp, struct ppc_fixup *tls_fix)
3011 const char *sym_name = S_GET_NAME (exp->X_add_symbol);
3012 if (sym_name[0] == '.')
3015 tls_fix->reloc = BFD_RELOC_NONE;
3016 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3018 char *hold = input_line_pointer;
3019 input_line_pointer = *str + 1;
3020 expression (&tls_fix->exp);
3021 if (tls_fix->exp.X_op == O_symbol)
3023 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3024 tls_fix->reloc = BFD_RELOC_PPC_TLSGD;
3025 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3026 tls_fix->reloc = BFD_RELOC_PPC_TLSLD;
3027 if (tls_fix->reloc != BFD_RELOC_NONE)
3029 input_line_pointer += 7;
3031 *str = input_line_pointer;
3034 input_line_pointer = hold;
3036 return tls_fix->reloc != BFD_RELOC_NONE;
3039 /* This routine is called for each instruction to be assembled. */
3042 md_assemble (char *str)
3045 const struct powerpc_opcode *opcode;
3047 const unsigned char *opindex_ptr;
3050 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
3055 unsigned int insn_length;
3057 /* Get the opcode. */
3058 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
3063 /* Look up the opcode in the hash table. */
3064 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
3065 if (opcode == (const struct powerpc_opcode *) NULL)
3067 const struct powerpc_macro *macro;
3069 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
3070 if (macro == (const struct powerpc_macro *) NULL)
3071 as_bad (_("unrecognized opcode: `%s'"), str);
3073 ppc_macro (s, macro);
3078 insn = opcode->opcode;
3081 while (ISSPACE (*str))
3084 /* PowerPC operands are just expressions. The only real issue is
3085 that a few operand types are optional. If an instruction has
3086 multiple optional operands and one is omitted, then all optional
3087 operands past the first omitted one must also be omitted. */
3088 int num_optional_operands = 0;
3089 int num_optional_provided = 0;
3091 /* Gather the operands. */
3095 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
3097 const struct powerpc_operand *operand;
3103 if (next_opindex == 0)
3104 operand = &powerpc_operands[*opindex_ptr];
3107 operand = &powerpc_operands[next_opindex];
3112 /* If this is an optional operand, and we are skipping it, just
3113 insert the default value, usually a zero. */
3114 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
3115 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64))
3117 if (num_optional_operands == 0)
3119 const unsigned char *optr;
3125 for (optr = opindex_ptr; *optr != 0; optr++)
3127 const struct powerpc_operand *op;
3128 op = &powerpc_operands[*optr];
3132 if ((op->flags & PPC_OPERAND_OPTIONAL) != 0
3133 && !((op->flags & PPC_OPERAND_OPTIONAL32) != 0
3135 ++num_optional_operands;
3137 if (s != NULL && *s != '\0')
3141 /* Look for the start of the next operand. */
3142 if ((op->flags & PPC_OPERAND_PARENS) != 0)
3143 s = strpbrk (s, "(,");
3145 s = strchr (s, ',');
3151 omitted = total - provided;
3152 num_optional_provided = num_optional_operands - omitted;
3154 if (--num_optional_provided < 0)
3156 int64_t val = ppc_optional_operand_value (operand, insn, ppc_cpu,
3157 num_optional_provided);
3158 if (operand->insert)
3160 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
3161 if (errmsg != (const char *) NULL)
3162 as_bad ("%s", errmsg);
3164 else if (operand->shift >= 0)
3165 insn |= (val & operand->bitm) << operand->shift;
3167 insn |= (val & operand->bitm) >> -operand->shift;
3169 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
3170 next_opindex = *opindex_ptr + 1;
3175 /* Gather the operand. */
3176 hold = input_line_pointer;
3177 input_line_pointer = str;
3180 if (*input_line_pointer == '[')
3182 /* We are expecting something like the second argument here:
3184 * lwz r4,[toc].GS.0.static_int(rtoc)
3185 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
3186 * The argument following the `]' must be a symbol name, and the
3187 * register must be the toc register: 'rtoc' or '2'
3189 * The effect is to 0 as the displacement field
3190 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
3191 * the appropriate variation) reloc against it based on the symbol.
3192 * The linker will build the toc, and insert the resolved toc offset.
3195 * o The size of the toc entry is currently assumed to be
3196 * 32 bits. This should not be assumed to be a hard coded
3198 * o In an effort to cope with a change from 32 to 64 bits,
3199 * there are also toc entries that are specified to be
3200 * either 32 or 64 bits:
3201 * lwz r4,[toc32].GS.0.static_int(rtoc)
3202 * lwz r4,[toc64].GS.0.static_int(rtoc)
3203 * These demand toc entries of the specified size, and the
3204 * instruction probably requires it.
3208 enum toc_size_qualifier toc_kind;
3209 bfd_reloc_code_real_type toc_reloc;
3211 /* Go parse off the [tocXX] part. */
3212 valid_toc = parse_toc_entry (&toc_kind);
3216 ignore_rest_of_line ();
3220 /* Now get the symbol following the ']'. */
3226 /* In this case, we may not have seen the symbol yet,
3227 since it is allowed to appear on a .extern or .globl
3228 or just be a label in the .data section. */
3229 toc_reloc = BFD_RELOC_PPC_TOC16;
3232 /* 1. The symbol must be defined and either in the toc
3233 section, or a global.
3234 2. The reloc generated must have the TOCDEFN flag set
3235 in upper bit mess of the reloc type.
3236 FIXME: It's a little confusing what the tocv
3237 qualifier can be used for. At the very least, I've
3238 seen three uses, only one of which I'm sure I can
3240 if (ex.X_op == O_symbol)
3242 gas_assert (ex.X_add_symbol != NULL);
3243 if (symbol_get_bfdsym (ex.X_add_symbol)->section
3246 as_bad (_("[tocv] symbol is not a toc symbol"));
3250 toc_reloc = BFD_RELOC_PPC_TOC16;
3253 /* FIXME: these next two specifically specify 32/64 bit
3254 toc entries. We don't support them today. Is this
3255 the right way to say that? */
3256 toc_reloc = BFD_RELOC_NONE;
3257 as_bad (_("unimplemented toc32 expression modifier"));
3260 /* FIXME: see above. */
3261 toc_reloc = BFD_RELOC_NONE;
3262 as_bad (_("unimplemented toc64 expression modifier"));
3266 _("Unexpected return value [%d] from parse_toc_entry!\n"),
3272 /* We need to generate a fixup for this expression. */
3273 if (fc >= MAX_INSN_FIXUPS)
3274 as_fatal (_("too many fixups"));
3276 fixups[fc].reloc = toc_reloc;
3277 fixups[fc].exp = ex;
3278 fixups[fc].opindex = *opindex_ptr;
3281 /* Ok. We've set up the fixup for the instruction. Now make it
3282 look like the constant 0 was found here. */
3284 ex.X_op = O_constant;
3285 ex.X_add_number = 0;
3286 ex.X_add_symbol = NULL;
3287 ex.X_op_symbol = NULL;
3294 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
3295 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
3296 || !register_name (&ex))
3298 char save_lex = lex_type['%'];
3300 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
3301 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
3304 lex_type['%'] |= LEX_BEGIN_NAME;
3308 lex_type['%'] = save_lex;
3312 str = input_line_pointer;
3313 input_line_pointer = hold;
3315 if (ex.X_op == O_illegal)
3316 as_bad (_("illegal operand"));
3317 else if (ex.X_op == O_absent)
3318 as_bad (_("missing operand"));
3319 else if (ex.X_op == O_register)
3323 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR
3324 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG
3325 | PPC_OPERAND_SPR | PPC_OPERAND_GQR)) != 0
3326 && !((ex.X_md & PPC_OPERAND_GPR) != 0
3327 && ex.X_add_number != 0
3328 && (operand->flags & PPC_OPERAND_GPR_0) != 0))
3329 as_warn (_("invalid register expression"));
3330 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3331 ppc_cpu, (char *) NULL, 0);
3333 else if (ex.X_op == O_constant)
3336 /* Allow @HA, @L, @H on constants. */
3337 bfd_reloc_code_real_type reloc;
3338 char *orig_str = str;
3340 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3347 case BFD_RELOC_LO16:
3348 ex.X_add_number &= 0xffff;
3349 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3350 ex.X_add_number = SEX16 (ex.X_add_number);
3353 case BFD_RELOC_HI16:
3354 if (REPORT_OVERFLOW_HI && ppc_obj64)
3356 /* PowerPC64 @h is tested for overflow. */
3357 ex.X_add_number = (addressT) ex.X_add_number >> 16;
3358 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3360 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3362 = ((addressT) ex.X_add_number ^ sign) - sign;
3368 case BFD_RELOC_PPC64_ADDR16_HIGH:
3369 ex.X_add_number = PPC_HI (ex.X_add_number);
3370 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3371 ex.X_add_number = SEX16 (ex.X_add_number);
3374 case BFD_RELOC_HI16_S:
3375 if (REPORT_OVERFLOW_HI && ppc_obj64)
3377 /* PowerPC64 @ha is tested for overflow. */
3379 = ((addressT) ex.X_add_number + 0x8000) >> 16;
3380 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3382 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3384 = ((addressT) ex.X_add_number ^ sign) - sign;
3390 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3391 ex.X_add_number = PPC_HA (ex.X_add_number);
3392 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3393 ex.X_add_number = SEX16 (ex.X_add_number);
3396 case BFD_RELOC_PPC64_HIGHER:
3397 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3398 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3399 ex.X_add_number = SEX16 (ex.X_add_number);
3402 case BFD_RELOC_PPC64_HIGHER_S:
3403 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3404 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3405 ex.X_add_number = SEX16 (ex.X_add_number);
3408 case BFD_RELOC_PPC64_HIGHEST:
3409 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3410 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3411 ex.X_add_number = SEX16 (ex.X_add_number);
3414 case BFD_RELOC_PPC64_HIGHEST_S:
3415 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3416 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3417 ex.X_add_number = SEX16 (ex.X_add_number);
3420 #endif /* OBJ_ELF */
3421 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3422 ppc_cpu, (char *) NULL, 0);
3426 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3428 /* Look for a __tls_get_addr arg using the insane old syntax. */
3429 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS
3430 && parse_tls_arg (&str, &ex, &fixups[fc]))
3432 fixups[fc].opindex = *opindex_ptr;
3436 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3438 /* If VLE-mode convert LO/HI/HA relocations. */
3439 if (opcode->flags & PPC_OPCODE_VLE)
3441 uint64_t tmp_insn = insn & opcode->mask;
3443 int use_a_reloc = (tmp_insn == E_OR2I_INSN
3444 || tmp_insn == E_AND2I_DOT_INSN
3445 || tmp_insn == E_OR2IS_INSN
3446 || tmp_insn == E_LI_INSN
3447 || tmp_insn == E_LIS_INSN
3448 || tmp_insn == E_AND2IS_DOT_INSN);
3451 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3452 || tmp_insn == E_ADD2IS_INSN
3453 || tmp_insn == E_CMP16I_INSN
3454 || tmp_insn == E_MULL2I_INSN
3455 || tmp_insn == E_CMPL16I_INSN
3456 || tmp_insn == E_CMPH16I_INSN
3457 || tmp_insn == E_CMPHL16I_INSN);
3464 case BFD_RELOC_PPC_EMB_SDA21:
3465 reloc = BFD_RELOC_PPC_VLE_SDA21;
3468 case BFD_RELOC_LO16:
3470 reloc = BFD_RELOC_PPC_VLE_LO16D;
3471 else if (use_a_reloc)
3472 reloc = BFD_RELOC_PPC_VLE_LO16A;
3475 case BFD_RELOC_HI16:
3477 reloc = BFD_RELOC_PPC_VLE_HI16D;
3478 else if (use_a_reloc)
3479 reloc = BFD_RELOC_PPC_VLE_HI16A;
3482 case BFD_RELOC_HI16_S:
3484 reloc = BFD_RELOC_PPC_VLE_HA16D;
3485 else if (use_a_reloc)
3486 reloc = BFD_RELOC_PPC_VLE_HA16A;
3489 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3491 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3494 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3496 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3499 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3501 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3506 /* TLS and other tweaks. */
3512 case BFD_RELOC_PPC_TLS:
3513 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3514 as_bad (_("@tls may not be used with \"%s\" operands"),
3516 else if (operand->shift != 11)
3517 as_bad (_("@tls may only be used in last operand"));
3519 insn = ppc_insert_operand (insn, operand,
3521 ppc_cpu, (char *) NULL, 0);
3524 /* We'll only use the 32 (or 64) bit form of these relocations
3525 in constants. Instructions get the 16 bit form. */
3526 case BFD_RELOC_PPC_DTPREL:
3527 reloc = BFD_RELOC_PPC_DTPREL16;
3530 case BFD_RELOC_PPC_TPREL:
3531 reloc = BFD_RELOC_PPC_TPREL16;
3534 case BFD_RELOC_LO16:
3535 if ((operand->bitm | 0xf) != 0xffff
3536 || operand->shift != 0
3537 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0)
3538 as_warn (_("%s unsupported on this instruction"), "@l");
3541 case BFD_RELOC_HI16:
3542 if (operand->bitm != 0xffff
3543 || operand->shift != 0
3544 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0)
3545 as_warn (_("%s unsupported on this instruction"), "@h");
3548 case BFD_RELOC_HI16_S:
3549 if (operand->bitm == 0xffff
3550 && operand->shift == (int) PPC_OPSHIFT_INV
3551 && opcode->opcode == (19 << 26) + (2 << 1))
3553 reloc = BFD_RELOC_PPC_16DX_HA;
3554 else if (operand->bitm != 0xffff
3555 || operand->shift != 0
3556 || (operand->flags & PPC_OPERAND_NEGATIVE) != 0)
3557 as_warn (_("%s unsupported on this instruction"), "@ha");
3560 #endif /* OBJ_ELF */
3562 if (reloc != BFD_RELOC_NONE)
3564 /* Determine a BFD reloc value based on the operand information.
3565 We are only prepared to turn a few of the operands into
3567 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3568 | PPC_OPERAND_ABSOLUTE)) != 0
3569 && operand->bitm == 0x3fffffc
3570 && operand->shift == 0)
3571 reloc = BFD_RELOC_PPC_B26;
3572 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3573 | PPC_OPERAND_ABSOLUTE)) != 0
3574 && operand->bitm == 0xfffc
3575 && operand->shift == 0)
3576 reloc = BFD_RELOC_PPC_B16;
3577 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3578 && operand->bitm == 0x1fe
3579 && operand->shift == -1)
3580 reloc = BFD_RELOC_PPC_VLE_REL8;
3581 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3582 && operand->bitm == 0xfffe
3583 && operand->shift == 0)
3584 reloc = BFD_RELOC_PPC_VLE_REL15;
3585 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3586 && operand->bitm == 0x1fffffe
3587 && operand->shift == 0)
3588 reloc = BFD_RELOC_PPC_VLE_REL24;
3589 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3590 && (operand->bitm & 0xfff0) == 0xfff0
3591 && operand->shift == 0)
3593 reloc = BFD_RELOC_16;
3594 #if defined OBJ_XCOFF || defined OBJ_ELF
3595 /* Note: the symbol may be not yet defined. */
3596 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3597 && ppc_is_toc_sym (ex.X_add_symbol))
3599 reloc = BFD_RELOC_PPC_TOC16;
3601 as_warn (_("assuming %s on symbol"),
3602 ppc_obj64 ? "@toc" : "@xgot");
3608 /* For the absolute forms of branches, convert the PC
3609 relative form back into the absolute. */
3610 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3614 case BFD_RELOC_PPC_B26:
3615 reloc = BFD_RELOC_PPC_BA26;
3617 case BFD_RELOC_PPC_B16:
3618 reloc = BFD_RELOC_PPC_BA16;
3621 case BFD_RELOC_PPC_B16_BRTAKEN:
3622 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3624 case BFD_RELOC_PPC_B16_BRNTAKEN:
3625 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3636 case BFD_RELOC_PPC_TOC16:
3637 toc_reloc_types |= has_small_toc_reloc;
3639 case BFD_RELOC_PPC64_TOC16_LO:
3640 case BFD_RELOC_PPC64_TOC16_HI:
3641 case BFD_RELOC_PPC64_TOC16_HA:
3642 toc_reloc_types |= has_large_toc_reloc;
3649 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3654 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3656 case BFD_RELOC_LO16:
3657 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3659 case BFD_RELOC_16_GOTOFF:
3660 reloc = BFD_RELOC_PPC64_GOT16_DS;
3662 case BFD_RELOC_LO16_GOTOFF:
3663 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3665 case BFD_RELOC_LO16_PLTOFF:
3666 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3668 case BFD_RELOC_16_BASEREL:
3669 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3671 case BFD_RELOC_LO16_BASEREL:
3672 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3674 case BFD_RELOC_PPC_TOC16:
3675 reloc = BFD_RELOC_PPC64_TOC16_DS;
3677 case BFD_RELOC_PPC64_TOC16_LO:
3678 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3680 case BFD_RELOC_PPC64_PLTGOT16:
3681 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3683 case BFD_RELOC_PPC64_PLTGOT16_LO:
3684 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3686 case BFD_RELOC_PPC_DTPREL16:
3687 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3689 case BFD_RELOC_PPC_DTPREL16_LO:
3690 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3692 case BFD_RELOC_PPC_TPREL16:
3693 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3695 case BFD_RELOC_PPC_TPREL16_LO:
3696 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3698 case BFD_RELOC_PPC_GOT_DTPREL16:
3699 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3700 case BFD_RELOC_PPC_GOT_TPREL16:
3701 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3704 as_bad (_("unsupported relocation for DS offset field"));
3709 /* Look for a __tls_get_addr arg after any __tls_get_addr
3710 modifiers like @plt. This fixup must be emitted before
3711 the usual call fixup. */
3712 if (ex.X_op == O_symbol && *str == '(' && fc < MAX_INSN_FIXUPS
3713 && parse_tls_arg (&str, &ex, &fixups[fc]))
3715 fixups[fc].opindex = *opindex_ptr;
3720 /* We need to generate a fixup for this expression. */
3721 if (fc >= MAX_INSN_FIXUPS)
3722 as_fatal (_("too many fixups"));
3723 fixups[fc].exp = ex;
3724 fixups[fc].opindex = *opindex_ptr;
3725 fixups[fc].reloc = reloc;
3733 /* If expecting more operands, then we want to see "),". */
3734 if (*str == endc && opindex_ptr[1] != 0)
3738 while (ISSPACE (*str));
3742 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3747 /* The call to expression should have advanced str past any
3755 else if (*str != '\0')
3757 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3760 else if (endc == ')')
3762 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3767 while (ISSPACE (*str))
3771 as_bad (_("junk at end of line: `%s'"), str);
3774 /* Do we need/want an APUinfo section? */
3775 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3778 /* These are all version "1". */
3779 if (opcode->flags & PPC_OPCODE_SPE)
3780 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3781 if (opcode->flags & PPC_OPCODE_ISEL)
3782 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3783 if (opcode->flags & PPC_OPCODE_EFS)
3784 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3785 if (opcode->flags & PPC_OPCODE_BRLOCK)
3786 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3787 if (opcode->flags & PPC_OPCODE_PMR)
3788 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3789 if (opcode->flags & PPC_OPCODE_CACHELCK)
3790 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3791 if (opcode->flags & PPC_OPCODE_RFMCI)
3792 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3793 /* Only set the VLE flag if the instruction has been pulled via
3794 the VLE instruction set. This way the flag is guaranteed to
3795 be set for VLE-only instructions or for VLE-only processors,
3796 however it'll remain clear for dual-mode instructions on
3797 dual-mode and, more importantly, standard-mode processors. */
3798 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3800 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3801 if (elf_section_data (now_seg) != NULL)
3802 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
3807 /* Write out the instruction. */
3810 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
3811 /* All instructions can start on a 2 byte boundary for VLE. */
3814 if (frag_now->insn_addr != addr_mask)
3816 /* Don't emit instructions to a frag started for data, or for a
3817 CPU differing in VLE mode. Data is allowed to be misaligned,
3818 and it's possible to start a new frag in the middle of
3820 frag_wane (frag_now);
3824 /* Check that insns within the frag are aligned. ppc_frag_check
3825 will ensure that the frag start address is aligned. */
3826 if ((frag_now_fix () & addr_mask) != 0)
3827 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1);
3829 /* Differentiate between two and four byte insns. */
3831 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn))
3834 f = frag_more (insn_length);
3835 frag_now->insn_addr = addr_mask;
3836 md_number_to_chars (f, insn, insn_length);
3839 last_subseg = now_subseg;
3842 dwarf2_emit_insn (insn_length);
3845 /* Create any fixups. */
3846 for (i = 0; i < fc; i++)
3849 if (fixups[i].reloc != BFD_RELOC_NONE)
3852 unsigned int size = fixup_size (fixups[i].reloc, &pcrel);
3853 int offset = target_big_endian ? (insn_length - size) : 0;
3855 fixP = fix_new_exp (frag_now,
3856 f - frag_now->fr_literal + offset,
3864 const struct powerpc_operand *operand;
3866 operand = &powerpc_operands[fixups[i].opindex];
3867 fixP = fix_new_exp (frag_now,
3868 f - frag_now->fr_literal,
3871 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3874 fixP->fx_pcrel_adjust = fixups[i].opindex;
3878 /* Handle a macro. Gather all the operands, transform them as
3879 described by the macro, and call md_assemble recursively. All the
3880 operands are separated by commas; we don't accept parentheses
3881 around operands here. */
3884 ppc_macro (char *str, const struct powerpc_macro *macro)
3895 /* Gather the users operands into the operands array. */
3900 if (count >= sizeof operands / sizeof operands[0])
3902 operands[count++] = s;
3903 s = strchr (s, ',');
3904 if (s == (char *) NULL)
3909 if (count != macro->operands)
3911 as_bad (_("wrong number of operands"));
3915 /* Work out how large the string must be (the size is unbounded
3916 because it includes user input). */
3918 format = macro->format;
3919 while (*format != '\0')
3928 arg = strtol (format + 1, &send, 10);
3929 know (send != format && arg < count);
3930 len += strlen (operands[arg]);
3935 /* Put the string together. */
3936 complete = s = XNEWVEC (char, len + 1);
3937 format = macro->format;
3938 while (*format != '\0')
3944 arg = strtol (format + 1, &send, 10);
3945 strcpy (s, operands[arg]);
3952 /* Assemble the constructed instruction. */
3953 md_assemble (complete);
3958 /* For ELF, add support for SHT_ORDERED. */
3961 ppc_section_type (char *str, size_t len)
3963 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3970 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3972 if (type == SHT_ORDERED)
3973 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3979 ppc_elf_section_letter (int letter, const char **ptrmsg)
3984 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3987 #endif /* OBJ_ELF */
3990 /* Pseudo-op handling. */
3992 /* The .byte pseudo-op. This is similar to the normal .byte
3993 pseudo-op, but it can also take a single ASCII string. */
3996 ppc_byte (int ignore ATTRIBUTE_UNUSED)
4000 if (*input_line_pointer != '\"')
4006 /* Gather characters. A real double quote is doubled. Unusual
4007 characters are not permitted. */
4008 ++input_line_pointer;
4013 c = *input_line_pointer++;
4017 if (*input_line_pointer != '\"')
4019 ++input_line_pointer;
4022 FRAG_APPEND_1_CHAR (c);
4026 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
4027 as_warn (_("data in executable section"));
4028 demand_empty_rest_of_line ();
4033 /* XCOFF specific pseudo-op handling. */
4035 /* This is set if we are creating a .stabx symbol, since we don't want
4036 to handle symbol suffixes for such symbols. */
4037 static bfd_boolean ppc_stab_symbol;
4039 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
4040 symbols in the .bss segment as though they were local common
4041 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
4042 aligns .comm and .lcomm to 4 bytes. */
4045 ppc_comm (int lcomm)
4047 asection *current_seg = now_seg;
4048 subsegT current_subseg = now_subseg;
4054 symbolS *lcomm_sym = NULL;
4058 endc = get_symbol_name (&name);
4059 end_name = input_line_pointer;
4060 (void) restore_line_pointer (endc);
4062 if (*input_line_pointer != ',')
4064 as_bad (_("missing size"));
4065 ignore_rest_of_line ();
4068 ++input_line_pointer;
4070 size = get_absolute_expression ();
4073 as_bad (_("negative size"));
4074 ignore_rest_of_line ();
4080 /* The third argument to .comm is the alignment. */
4081 if (*input_line_pointer != ',')
4085 ++input_line_pointer;
4086 align = get_absolute_expression ();
4089 as_warn (_("ignoring bad alignment"));
4099 /* The third argument to .lcomm appears to be the real local
4100 common symbol to create. References to the symbol named in
4101 the first argument are turned into references to the third
4103 if (*input_line_pointer != ',')
4105 as_bad (_("missing real symbol name"));
4106 ignore_rest_of_line ();
4109 ++input_line_pointer;
4111 lcomm_endc = get_symbol_name (&lcomm_name);
4113 lcomm_sym = symbol_find_or_make (lcomm_name);
4115 (void) restore_line_pointer (lcomm_endc);
4117 /* The fourth argument to .lcomm is the alignment. */
4118 if (*input_line_pointer != ',')
4127 ++input_line_pointer;
4128 align = get_absolute_expression ();
4131 as_warn (_("ignoring bad alignment"));
4138 sym = symbol_find_or_make (name);
4141 if (S_IS_DEFINED (sym)
4142 || S_GET_VALUE (sym) != 0)
4144 as_bad (_("attempt to redefine symbol"));
4145 ignore_rest_of_line ();
4149 record_alignment (bss_section, align);
4152 || ! S_IS_DEFINED (lcomm_sym))
4161 S_SET_EXTERNAL (sym);
4165 symbol_get_tc (lcomm_sym)->output = 1;
4166 def_sym = lcomm_sym;
4170 subseg_set (bss_section, 1);
4171 frag_align (align, 0, 0);
4173 symbol_set_frag (def_sym, frag_now);
4174 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
4175 def_size, (char *) NULL);
4177 S_SET_SEGMENT (def_sym, bss_section);
4178 symbol_get_tc (def_sym)->align = align;
4182 /* Align the size of lcomm_sym. */
4183 symbol_get_frag (lcomm_sym)->fr_offset =
4184 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
4185 &~ ((1 << align) - 1));
4186 if (align > symbol_get_tc (lcomm_sym)->align)
4187 symbol_get_tc (lcomm_sym)->align = align;
4192 /* Make sym an offset from lcomm_sym. */
4193 S_SET_SEGMENT (sym, bss_section);
4194 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
4195 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
4196 symbol_get_frag (lcomm_sym)->fr_offset += size;
4199 subseg_set (current_seg, current_subseg);
4201 demand_empty_rest_of_line ();
4204 /* The .csect pseudo-op. This switches us into a different
4205 subsegment. The first argument is a symbol whose value is the
4206 start of the .csect. In COFF, csect symbols get special aux
4207 entries defined by the x_csect field of union internal_auxent. The
4208 optional second argument is the alignment (the default is 2). */
4211 ppc_csect (int ignore ATTRIBUTE_UNUSED)
4218 endc = get_symbol_name (&name);
4220 sym = symbol_find_or_make (name);
4222 (void) restore_line_pointer (endc);
4224 if (S_GET_NAME (sym)[0] == '\0')
4226 /* An unnamed csect is assumed to be [PR]. */
4227 symbol_get_tc (sym)->symbol_class = XMC_PR;
4231 if (*input_line_pointer == ',')
4233 ++input_line_pointer;
4234 align = get_absolute_expression ();
4237 ppc_change_csect (sym, align);
4239 demand_empty_rest_of_line ();
4242 /* Change to a different csect. */
4245 ppc_change_csect (symbolS *sym, offsetT align)
4247 if (S_IS_DEFINED (sym))
4248 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
4258 /* This is a new csect. We need to look at the symbol class to
4259 figure out whether it should go in the text section or the
4263 switch (symbol_get_tc (sym)->symbol_class)
4273 S_SET_SEGMENT (sym, text_section);
4274 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
4275 ++ppc_text_subsegment;
4276 list_ptr = &ppc_text_csects;
4286 if (ppc_toc_csect != NULL
4287 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
4288 == ppc_data_subsegment))
4290 S_SET_SEGMENT (sym, data_section);
4291 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
4292 ++ppc_data_subsegment;
4293 list_ptr = &ppc_data_csects;
4299 /* We set the obstack chunk size to a small value before
4300 changing subsegments, so that we don't use a lot of memory
4301 space for what may be a small section. */
4302 hold_chunksize = chunksize;
4305 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
4306 symbol_get_tc (sym)->subseg);
4308 chunksize = hold_chunksize;
4311 ppc_after_toc_frag = frag_now;
4313 record_alignment (sec, align);
4315 frag_align_code (align, 0);
4317 frag_align (align, 0, 0);
4319 symbol_set_frag (sym, frag_now);
4320 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4322 symbol_get_tc (sym)->align = align;
4323 symbol_get_tc (sym)->output = 1;
4324 symbol_get_tc (sym)->within = sym;
4326 for (list = *list_ptr;
4327 symbol_get_tc (list)->next != (symbolS *) NULL;
4328 list = symbol_get_tc (list)->next)
4330 symbol_get_tc (list)->next = sym;
4332 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4333 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4337 ppc_current_csect = sym;
4341 ppc_change_debug_section (unsigned int idx, subsegT subseg)
4345 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
4347 sec = subseg_new (dw->name, subseg);
4348 oldflags = bfd_get_section_flags (stdoutput, sec);
4349 if (oldflags == SEC_NO_FLAGS)
4351 /* Just created section. */
4352 gas_assert (dw_sections[idx].sect == NULL);
4354 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
4355 bfd_set_section_alignment (stdoutput, sec, 0);
4356 dw_sections[idx].sect = sec;
4359 /* Not anymore in a csect. */
4360 ppc_current_csect = NULL;
4363 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4364 .dwsect flag [, opt-label ]
4368 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
4372 const struct xcoff_dwsect_name *dw;
4373 struct dw_subsection *subseg;
4374 struct dw_section *dws;
4378 flag = get_absolute_expression ();
4380 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4381 if (xcoff_dwsect_names[i].flag == flag)
4383 dw = &xcoff_dwsect_names[i];
4387 /* Parse opt-label. */
4388 if (*input_line_pointer == ',')
4393 ++input_line_pointer;
4395 c = get_symbol_name (&label);
4396 opt_label = symbol_find_or_make (label);
4397 (void) restore_line_pointer (c);
4402 demand_empty_rest_of_line ();
4404 /* Return now in case of unknown subsection. */
4407 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4412 /* Find the subsection. */
4413 dws = &dw_sections[i];
4415 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4417 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4418 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4420 as_bad (_("label %s was not defined in this dwarf section"),
4421 S_GET_NAME (opt_label));
4422 subseg = dws->anon_subseg;
4426 subseg = symbol_get_tc (opt_label)->u.dw;
4431 /* Switch to the subsection. */
4432 ppc_change_debug_section (i, subseg->subseg);
4436 /* Create a new dw subsection. */
4437 subseg = XNEW (struct dw_subsection);
4439 if (opt_label == NULL)
4441 /* The anonymous one. */
4443 subseg->link = NULL;
4444 dws->anon_subseg = subseg;
4449 if (dws->list_subseg != NULL)
4450 subseg->subseg = dws->list_subseg->subseg + 1;
4454 subseg->link = dws->list_subseg;
4455 dws->list_subseg = subseg;
4456 symbol_get_tc (opt_label)->u.dw = subseg;
4459 ppc_change_debug_section (i, subseg->subseg);
4463 /* Add the length field. */
4464 expressionS *exp = &subseg->end_exp;
4467 if (opt_label != NULL)
4468 symbol_set_value_now (opt_label);
4470 /* Add the length field. Note that according to the AIX assembler
4471 manual, the size of the length field is 4 for powerpc32 but
4472 12 for powerpc64. */
4475 /* Write the 64bit marker. */
4476 md_number_to_chars (frag_more (4), -1, 4);
4479 exp->X_op = O_subtract;
4480 exp->X_op_symbol = symbol_temp_new_now ();
4481 exp->X_add_symbol = symbol_temp_make ();
4483 sz = ppc_obj64 ? 8 : 4;
4484 exp->X_add_number = -sz;
4485 emit_expr (exp, sz);
4490 /* This function handles the .text and .data pseudo-ops. These
4491 pseudo-ops aren't really used by XCOFF; we implement them for the
4492 convenience of people who aren't used to XCOFF. */
4495 ppc_section (int type)
4502 else if (type == 'd')
4507 sym = symbol_find_or_make (name);
4509 ppc_change_csect (sym, 2);
4511 demand_empty_rest_of_line ();
4514 /* This function handles the .section pseudo-op. This is mostly to
4515 give an error, since XCOFF only supports .text, .data and .bss, but
4516 we do permit the user to name the text or data section. */
4519 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4522 const char *real_name;
4526 c = get_symbol_name (&user_name);
4528 if (strcmp (user_name, ".text") == 0)
4529 real_name = ".text[PR]";
4530 else if (strcmp (user_name, ".data") == 0)
4531 real_name = ".data[RW]";
4534 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4535 (void) restore_line_pointer (c);
4536 ignore_rest_of_line ();
4540 (void) restore_line_pointer (c);
4542 sym = symbol_find_or_make (real_name);
4544 ppc_change_csect (sym, 2);
4546 demand_empty_rest_of_line ();
4549 /* The .extern pseudo-op. We create an undefined symbol. */
4552 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4557 endc = get_symbol_name (&name);
4559 (void) symbol_find_or_make (name);
4561 (void) restore_line_pointer (endc);
4563 demand_empty_rest_of_line ();
4566 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4569 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4575 endc = get_symbol_name (&name);
4577 sym = symbol_find_or_make (name);
4579 (void) restore_line_pointer (endc);
4581 symbol_get_tc (sym)->output = 1;
4583 demand_empty_rest_of_line ();
4586 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4587 relocations at the beginning of the current csect.
4589 (In principle, there's no reason why the relocations _have_ to be at
4590 the beginning. Anywhere in the csect would do. However, inserting
4591 at the beginning is what the native assembler does, and it helps to
4592 deal with cases where the .ref statements follow the section contents.)
4594 ??? .refs don't work for empty .csects. However, the native assembler
4595 doesn't report an error in this case, and neither yet do we. */
4598 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4603 if (ppc_current_csect == NULL)
4605 as_bad (_(".ref outside .csect"));
4606 ignore_rest_of_line ();
4612 c = get_symbol_name (&name);
4614 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4615 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4617 *input_line_pointer = c;
4618 SKIP_WHITESPACE_AFTER_NAME ();
4619 c = *input_line_pointer;
4622 input_line_pointer++;
4624 if (is_end_of_line[(unsigned char) *input_line_pointer])
4626 as_bad (_("missing symbol name"));
4627 ignore_rest_of_line ();
4634 demand_empty_rest_of_line ();
4637 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4638 although I don't know why it bothers. */
4641 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4648 endc = get_symbol_name (&name);
4650 sym = symbol_find_or_make (name);
4652 (void) restore_line_pointer (endc);
4654 if (*input_line_pointer != ',')
4656 as_bad (_("missing rename string"));
4657 ignore_rest_of_line ();
4660 ++input_line_pointer;
4662 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4664 demand_empty_rest_of_line ();
4667 /* The .stabx pseudo-op. This is similar to a normal .stabs
4668 pseudo-op, but slightly different. A sample is
4669 .stabx "main:F-1",.main,142,0
4670 The first argument is the symbol name to create. The second is the
4671 value, and the third is the storage class. The fourth seems to be
4672 always zero, and I am assuming it is the type. */
4675 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4682 name = demand_copy_C_string (&len);
4684 if (*input_line_pointer != ',')
4686 as_bad (_("missing value"));
4689 ++input_line_pointer;
4691 ppc_stab_symbol = TRUE;
4692 sym = symbol_make (name);
4693 ppc_stab_symbol = FALSE;
4695 symbol_get_tc (sym)->real_name = name;
4697 (void) expression (&exp);
4704 as_bad (_("illegal .stabx expression; zero assumed"));
4705 exp.X_add_number = 0;
4708 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4709 symbol_set_frag (sym, &zero_address_frag);
4713 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4714 symbol_set_value_expression (sym, &exp);
4718 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4719 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4724 /* The value is some complex expression. This will probably
4725 fail at some later point, but this is probably the right
4726 thing to do here. */
4727 symbol_set_value_expression (sym, &exp);
4731 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4732 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4734 if (*input_line_pointer != ',')
4736 as_bad (_("missing class"));
4739 ++input_line_pointer;
4741 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4743 if (*input_line_pointer != ',')
4745 as_bad (_("missing type"));
4748 ++input_line_pointer;
4750 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4752 symbol_get_tc (sym)->output = 1;
4754 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4759 .stabx "z",arrays_,133,0
4762 .comm arrays_,13768,3
4764 resolve_symbol_value will copy the exp's "within" into sym's when the
4765 offset is 0. Since this seems to be corner case problem,
4766 only do the correction for storage class C_STSYM. A better solution
4767 would be to have the tc field updated in ppc_symbol_new_hook. */
4769 if (exp.X_op == O_symbol)
4771 if (ppc_current_block == NULL)
4772 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4774 symbol_get_tc (sym)->within = ppc_current_block;
4775 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4779 if (exp.X_op != O_symbol
4780 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4781 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4782 ppc_frob_label (sym);
4785 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4786 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4787 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4788 symbol_get_tc (ppc_current_csect)->within = sym;
4791 demand_empty_rest_of_line ();
4794 /* The .function pseudo-op. This takes several arguments. The first
4795 argument seems to be the external name of the symbol. The second
4796 argument seems to be the label for the start of the function. gcc
4797 uses the same name for both. I have no idea what the third and
4798 fourth arguments are meant to be. The optional fifth argument is
4799 an expression for the size of the function. In COFF this symbol
4800 gets an aux entry like that used for a csect. */
4803 ppc_function (int ignore ATTRIBUTE_UNUSED)
4811 endc = get_symbol_name (&name);
4813 /* Ignore any [PR] suffix. */
4814 name = ppc_canonicalize_symbol_name (name);
4815 s = strchr (name, '[');
4816 if (s != (char *) NULL
4817 && strcmp (s + 1, "PR]") == 0)
4820 ext_sym = symbol_find_or_make (name);
4822 (void) restore_line_pointer (endc);
4824 if (*input_line_pointer != ',')
4826 as_bad (_("missing symbol name"));
4827 ignore_rest_of_line ();
4830 ++input_line_pointer;
4832 endc = get_symbol_name (&name);
4834 lab_sym = symbol_find_or_make (name);
4836 (void) restore_line_pointer (endc);
4838 if (ext_sym != lab_sym)
4842 exp.X_op = O_symbol;
4843 exp.X_add_symbol = lab_sym;
4844 exp.X_op_symbol = NULL;
4845 exp.X_add_number = 0;
4847 symbol_set_value_expression (ext_sym, &exp);
4850 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4851 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4852 symbol_get_tc (ext_sym)->output = 1;
4854 if (*input_line_pointer == ',')
4858 /* Ignore the third argument. */
4859 ++input_line_pointer;
4861 if (*input_line_pointer == ',')
4863 /* Ignore the fourth argument. */
4864 ++input_line_pointer;
4866 if (*input_line_pointer == ',')
4868 /* The fifth argument is the function size. */
4869 ++input_line_pointer;
4870 symbol_get_tc (ext_sym)->u.size = symbol_new
4871 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4872 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4877 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4878 SF_SET_FUNCTION (ext_sym);
4879 SF_SET_PROCESS (ext_sym);
4880 coff_add_linesym (ext_sym);
4882 demand_empty_rest_of_line ();
4885 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4886 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4887 with the correct line number */
4889 static symbolS *saved_bi_sym = 0;
4892 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4896 sym = symbol_make (".bf");
4897 S_SET_SEGMENT (sym, text_section);
4898 symbol_set_frag (sym, frag_now);
4899 S_SET_VALUE (sym, frag_now_fix ());
4900 S_SET_STORAGE_CLASS (sym, C_FCN);
4902 coff_line_base = get_absolute_expression ();
4904 S_SET_NUMBER_AUXILIARY (sym, 1);
4905 SA_SET_SYM_LNNO (sym, coff_line_base);
4907 /* Line number for bi. */
4910 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4915 symbol_get_tc (sym)->output = 1;
4917 ppc_frob_label (sym);
4919 demand_empty_rest_of_line ();
4922 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4923 ".ef", except that the line number is absolute, not relative to the
4924 most recent ".bf" symbol. */
4927 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4931 sym = symbol_make (".ef");
4932 S_SET_SEGMENT (sym, text_section);
4933 symbol_set_frag (sym, frag_now);
4934 S_SET_VALUE (sym, frag_now_fix ());
4935 S_SET_STORAGE_CLASS (sym, C_FCN);
4936 S_SET_NUMBER_AUXILIARY (sym, 1);
4937 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4938 symbol_get_tc (sym)->output = 1;
4940 ppc_frob_label (sym);
4942 demand_empty_rest_of_line ();
4945 /* The .bi and .ei pseudo-ops. These take a string argument and
4946 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4947 the symbol list. The value of .bi will be know when the next .bf
4953 static symbolS *last_biei;
4960 name = demand_copy_C_string (&len);
4962 /* The value of these symbols is actually file offset. Here we set
4963 the value to the index into the line number entries. In
4964 ppc_frob_symbols we set the fix_line field, which will cause BFD
4965 to do the right thing. */
4967 sym = symbol_make (name);
4968 /* obj-coff.c currently only handles line numbers correctly in the
4970 S_SET_SEGMENT (sym, text_section);
4971 S_SET_VALUE (sym, coff_n_line_nos);
4972 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4974 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4975 symbol_get_tc (sym)->output = 1;
4983 for (look = last_biei ? last_biei : symbol_rootP;
4984 (look != (symbolS *) NULL
4985 && (S_GET_STORAGE_CLASS (look) == C_FILE
4986 || S_GET_STORAGE_CLASS (look) == C_BINCL
4987 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4988 look = symbol_next (look))
4990 if (look != (symbolS *) NULL)
4992 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4993 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4997 demand_empty_rest_of_line ();
5000 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
5001 There is one argument, which is a csect symbol. The value of the
5002 .bs symbol is the index of this csect symbol. */
5005 ppc_bs (int ignore ATTRIBUTE_UNUSED)
5012 if (ppc_current_block != NULL)
5013 as_bad (_("nested .bs blocks"));
5015 endc = get_symbol_name (&name);
5017 csect = symbol_find_or_make (name);
5019 (void) restore_line_pointer (endc);
5021 sym = symbol_make (".bs");
5022 S_SET_SEGMENT (sym, now_seg);
5023 S_SET_STORAGE_CLASS (sym, C_BSTAT);
5024 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
5025 symbol_get_tc (sym)->output = 1;
5027 symbol_get_tc (sym)->within = csect;
5029 ppc_frob_label (sym);
5031 ppc_current_block = sym;
5033 demand_empty_rest_of_line ();
5036 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
5039 ppc_es (int ignore ATTRIBUTE_UNUSED)
5043 if (ppc_current_block == NULL)
5044 as_bad (_(".es without preceding .bs"));
5046 sym = symbol_make (".es");
5047 S_SET_SEGMENT (sym, now_seg);
5048 S_SET_STORAGE_CLASS (sym, C_ESTAT);
5049 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
5050 symbol_get_tc (sym)->output = 1;
5052 ppc_frob_label (sym);
5054 ppc_current_block = NULL;
5056 demand_empty_rest_of_line ();
5059 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
5063 ppc_bb (int ignore ATTRIBUTE_UNUSED)
5067 sym = symbol_make (".bb");
5068 S_SET_SEGMENT (sym, text_section);
5069 symbol_set_frag (sym, frag_now);
5070 S_SET_VALUE (sym, frag_now_fix ());
5071 S_SET_STORAGE_CLASS (sym, C_BLOCK);
5073 S_SET_NUMBER_AUXILIARY (sym, 1);
5074 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
5076 symbol_get_tc (sym)->output = 1;
5078 SF_SET_PROCESS (sym);
5080 ppc_frob_label (sym);
5082 demand_empty_rest_of_line ();
5085 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
5089 ppc_eb (int ignore ATTRIBUTE_UNUSED)
5093 sym = symbol_make (".eb");
5094 S_SET_SEGMENT (sym, text_section);
5095 symbol_set_frag (sym, frag_now);
5096 S_SET_VALUE (sym, frag_now_fix ());
5097 S_SET_STORAGE_CLASS (sym, C_BLOCK);
5098 S_SET_NUMBER_AUXILIARY (sym, 1);
5099 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
5100 symbol_get_tc (sym)->output = 1;
5102 SF_SET_PROCESS (sym);
5104 ppc_frob_label (sym);
5106 demand_empty_rest_of_line ();
5109 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
5113 ppc_bc (int ignore ATTRIBUTE_UNUSED)
5119 name = demand_copy_C_string (&len);
5120 sym = symbol_make (name);
5121 S_SET_SEGMENT (sym, ppc_coff_debug_section);
5122 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
5123 S_SET_STORAGE_CLASS (sym, C_BCOMM);
5124 S_SET_VALUE (sym, 0);
5125 symbol_get_tc (sym)->output = 1;
5127 ppc_frob_label (sym);
5129 demand_empty_rest_of_line ();
5132 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
5135 ppc_ec (int ignore ATTRIBUTE_UNUSED)
5139 sym = symbol_make (".ec");
5140 S_SET_SEGMENT (sym, ppc_coff_debug_section);
5141 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
5142 S_SET_STORAGE_CLASS (sym, C_ECOMM);
5143 S_SET_VALUE (sym, 0);
5144 symbol_get_tc (sym)->output = 1;
5146 ppc_frob_label (sym);
5148 demand_empty_rest_of_line ();
5151 /* The .toc pseudo-op. Switch to the .toc subsegment. */
5154 ppc_toc (int ignore ATTRIBUTE_UNUSED)
5156 if (ppc_toc_csect != (symbolS *) NULL)
5157 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
5164 subseg = ppc_data_subsegment;
5165 ++ppc_data_subsegment;
5167 subseg_new (segment_name (data_section), subseg);
5168 ppc_toc_frag = frag_now;
5170 sym = symbol_find_or_make ("TOC[TC0]");
5171 symbol_set_frag (sym, frag_now);
5172 S_SET_SEGMENT (sym, data_section);
5173 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5174 symbol_get_tc (sym)->subseg = subseg;
5175 symbol_get_tc (sym)->output = 1;
5176 symbol_get_tc (sym)->within = sym;
5178 ppc_toc_csect = sym;
5180 for (list = ppc_data_csects;
5181 symbol_get_tc (list)->next != (symbolS *) NULL;
5182 list = symbol_get_tc (list)->next)
5184 symbol_get_tc (list)->next = sym;
5186 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5187 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
5191 ppc_current_csect = ppc_toc_csect;
5193 demand_empty_rest_of_line ();
5196 /* The AIX assembler automatically aligns the operands of a .long or
5197 .short pseudo-op, and we want to be compatible. */
5200 ppc_xcoff_cons (int log_size)
5202 frag_align (log_size, 0, 0);
5203 record_alignment (now_seg, log_size);
5204 cons (1 << log_size);
5208 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
5213 (void) expression (&exp);
5215 if (exp.X_op != O_constant)
5217 as_bad (_("non-constant byte count"));
5221 byte_count = exp.X_add_number;
5223 if (*input_line_pointer != ',')
5225 as_bad (_("missing value"));
5229 ++input_line_pointer;
5234 ppc_xcoff_end (void)
5238 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
5240 struct dw_section *dws = &dw_sections[i];
5241 struct dw_subsection *dwss;
5243 if (dws->anon_subseg)
5245 dwss = dws->anon_subseg;
5246 dwss->link = dws->list_subseg;
5249 dwss = dws->list_subseg;
5251 for (; dwss != NULL; dwss = dwss->link)
5252 if (dwss->end_exp.X_add_symbol != NULL)
5254 subseg_set (dws->sect, dwss->subseg);
5255 symbol_set_value_now (dwss->end_exp.X_add_symbol);
5260 #endif /* OBJ_XCOFF */
5261 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
5263 /* The .tc pseudo-op. This is used when generating either XCOFF or
5264 ELF. This takes two or more arguments.
5266 When generating XCOFF output, the first argument is the name to
5267 give to this location in the toc; this will be a symbol with class
5268 TC. The rest of the arguments are N-byte values to actually put at
5269 this location in the TOC; often there is just one more argument, a
5270 relocatable symbol reference. The size of the value to store
5271 depends on target word size. A 32-bit target uses 4-byte values, a
5272 64-bit target uses 8-byte values.
5274 When not generating XCOFF output, the arguments are the same, but
5275 the first argument is simply ignored. */
5278 ppc_tc (int ignore ATTRIBUTE_UNUSED)
5282 /* Define the TOC symbol name. */
5288 if (ppc_toc_csect == (symbolS *) NULL
5289 || ppc_toc_csect != ppc_current_csect)
5291 as_bad (_(".tc not in .toc section"));
5292 ignore_rest_of_line ();
5296 endc = get_symbol_name (&name);
5298 sym = symbol_find_or_make (name);
5300 (void) restore_line_pointer (endc);
5302 if (S_IS_DEFINED (sym))
5306 label = symbol_get_tc (ppc_current_csect)->within;
5307 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
5309 as_bad (_(".tc with no label"));
5310 ignore_rest_of_line ();
5314 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
5315 symbol_set_frag (label, symbol_get_frag (sym));
5316 S_SET_VALUE (label, S_GET_VALUE (sym));
5318 while (! is_end_of_line[(unsigned char) *input_line_pointer])
5319 ++input_line_pointer;
5324 S_SET_SEGMENT (sym, now_seg);
5325 symbol_set_frag (sym, frag_now);
5326 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5327 symbol_get_tc (sym)->symbol_class = XMC_TC;
5328 symbol_get_tc (sym)->output = 1;
5330 ppc_frob_label (sym);
5333 #endif /* OBJ_XCOFF */
5337 /* Skip the TOC symbol name. */
5338 while (is_part_of_name (*input_line_pointer)
5339 || *input_line_pointer == ' '
5340 || *input_line_pointer == '['
5341 || *input_line_pointer == ']'
5342 || *input_line_pointer == '{'
5343 || *input_line_pointer == '}')
5344 ++input_line_pointer;
5346 /* Align to a four/eight byte boundary. */
5347 align = ppc_obj64 ? 3 : 2;
5348 frag_align (align, 0, 0);
5349 record_alignment (now_seg, align);
5350 #endif /* OBJ_ELF */
5352 if (*input_line_pointer != ',')
5353 demand_empty_rest_of_line ();
5356 ++input_line_pointer;
5357 cons (ppc_obj64 ? 8 : 4);
5361 /* Pseudo-op .machine. */
5364 ppc_machine (int ignore ATTRIBUTE_UNUSED)
5368 #define MAX_HISTORY 100
5369 static ppc_cpu_t *cpu_history;
5370 static int curr_hist;
5374 c = get_symbol_name (&cpu_string);
5375 cpu_string = xstrdup (cpu_string);
5376 (void) restore_line_pointer (c);
5378 if (cpu_string != NULL)
5380 ppc_cpu_t old_cpu = ppc_cpu;
5384 for (p = cpu_string; *p != 0; p++)
5387 if (strcmp (cpu_string, "push") == 0)
5389 if (cpu_history == NULL)
5390 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
5392 if (curr_hist >= MAX_HISTORY)
5393 as_bad (_(".machine stack overflow"));
5395 cpu_history[curr_hist++] = ppc_cpu;
5397 else if (strcmp (cpu_string, "pop") == 0)
5400 as_bad (_(".machine stack underflow"));
5402 ppc_cpu = cpu_history[--curr_hist];
5404 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
5407 as_bad (_("invalid machine `%s'"), cpu_string);
5409 if (ppc_cpu != old_cpu)
5410 ppc_setup_opcodes ();
5413 demand_empty_rest_of_line ();
5415 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5419 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5421 /* Set the current section. */
5423 ppc_set_current_section (segT new)
5425 ppc_previous_section = ppc_current_section;
5426 ppc_current_section = new;
5429 /* pseudo-op: .previous
5430 behaviour: toggles the current section with the previous section.
5432 warnings: "No previous section" */
5435 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5437 if (ppc_previous_section == NULL)
5439 as_warn (_("no previous section to return to, ignored."));
5443 subseg_set (ppc_previous_section, 0);
5445 ppc_set_current_section (ppc_previous_section);
5448 /* pseudo-op: .pdata
5449 behaviour: predefined read only data section
5453 initial: .section .pdata "adr3"
5454 a - don't know -- maybe a misprint
5455 d - initialized data
5457 3 - double word aligned (that would be 4 byte boundary)
5460 Tag index tables (also known as the function table) for exception
5461 handling, debugging, etc. */
5464 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5466 if (pdata_section == 0)
5468 pdata_section = subseg_new (".pdata", 0);
5470 bfd_set_section_flags (stdoutput, pdata_section,
5471 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5472 | SEC_READONLY | SEC_DATA ));
5474 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5478 pdata_section = subseg_new (".pdata", 0);
5480 ppc_set_current_section (pdata_section);
5483 /* pseudo-op: .ydata
5484 behaviour: predefined read only data section
5488 initial: .section .ydata "drw3"
5489 a - don't know -- maybe a misprint
5490 d - initialized data
5492 3 - double word aligned (that would be 4 byte boundary)
5494 Tag tables (also known as the scope table) for exception handling,
5498 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5500 if (ydata_section == 0)
5502 ydata_section = subseg_new (".ydata", 0);
5503 bfd_set_section_flags (stdoutput, ydata_section,
5504 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5505 | SEC_READONLY | SEC_DATA ));
5507 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5511 ydata_section = subseg_new (".ydata", 0);
5513 ppc_set_current_section (ydata_section);
5516 /* pseudo-op: .reldata
5517 behaviour: predefined read write data section
5518 double word aligned (4-byte)
5519 FIXME: relocation is applied to it
5520 FIXME: what's the difference between this and .data?
5523 initial: .section .reldata "drw3"
5524 d - initialized data
5527 3 - double word aligned (that would be 8 byte boundary)
5530 Like .data, but intended to hold data subject to relocation, such as
5531 function descriptors, etc. */
5534 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5536 if (reldata_section == 0)
5538 reldata_section = subseg_new (".reldata", 0);
5540 bfd_set_section_flags (stdoutput, reldata_section,
5541 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5544 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5548 reldata_section = subseg_new (".reldata", 0);
5550 ppc_set_current_section (reldata_section);
5553 /* pseudo-op: .rdata
5554 behaviour: predefined read only data section
5558 initial: .section .rdata "dr3"
5559 d - initialized data
5561 3 - double word aligned (that would be 4 byte boundary) */
5564 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5566 if (rdata_section == 0)
5568 rdata_section = subseg_new (".rdata", 0);
5569 bfd_set_section_flags (stdoutput, rdata_section,
5570 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5571 | SEC_READONLY | SEC_DATA ));
5573 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5577 rdata_section = subseg_new (".rdata", 0);
5579 ppc_set_current_section (rdata_section);
5582 /* pseudo-op: .ualong
5583 behaviour: much like .int, with the exception that no alignment is
5585 FIXME: test the alignment statement
5590 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5596 /* pseudo-op: .znop <symbol name>
5597 behaviour: Issue a nop instruction
5598 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5599 the supplied symbol name.
5601 warnings: Missing symbol name */
5604 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5607 const struct powerpc_opcode *opcode;
5614 /* Strip out the symbol name. */
5615 c = get_symbol_name (&symbol_name);
5617 name = xstrdup (symbol_name);
5619 sym = symbol_find_or_make (name);
5621 *input_line_pointer = c;
5623 SKIP_WHITESPACE_AFTER_NAME ();
5625 /* Look up the opcode in the hash table. */
5626 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5628 /* Stick in the nop. */
5629 insn = opcode->opcode;
5631 /* Write out the instruction. */
5633 md_number_to_chars (f, insn, 4);
5635 f - frag_now->fr_literal,
5640 BFD_RELOC_16_GOT_PCREL);
5650 ppc_pe_comm (int lcomm)
5659 c = get_symbol_name (&name);
5661 /* just after name is now '\0'. */
5662 p = input_line_pointer;
5664 SKIP_WHITESPACE_AFTER_NAME ();
5665 if (*input_line_pointer != ',')
5667 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5668 ignore_rest_of_line ();
5672 input_line_pointer++; /* skip ',' */
5673 if ((temp = get_absolute_expression ()) < 0)
5675 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5676 ignore_rest_of_line ();
5682 /* The third argument to .comm is the alignment. */
5683 if (*input_line_pointer != ',')
5687 ++input_line_pointer;
5688 align = get_absolute_expression ();
5691 as_warn (_("ignoring bad alignment"));
5698 symbolP = symbol_find_or_make (name);
5701 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5703 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5704 S_GET_NAME (symbolP));
5705 ignore_rest_of_line ();
5709 if (S_GET_VALUE (symbolP))
5711 if (S_GET_VALUE (symbolP) != (valueT) temp)
5712 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5713 S_GET_NAME (symbolP),
5714 (long) S_GET_VALUE (symbolP),
5719 S_SET_VALUE (symbolP, (valueT) temp);
5720 S_SET_EXTERNAL (symbolP);
5721 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5724 demand_empty_rest_of_line ();
5728 * implement the .section pseudo op:
5729 * .section name {, "flags"}
5731 * | +--- optional flags: 'b' for bss
5733 * +-- section name 'l' for lib
5737 * 'd' (apparently m88k for data)
5739 * But if the argument is not a quoted string, treat it as a
5740 * subsegment number.
5742 * FIXME: this is a copy of the section processing from obj-coff.c, with
5743 * additions/changes for the moto-pas assembler support. There are three
5746 * FIXME: I just noticed this. This doesn't work at all really. It it
5747 * setting bits that bfd probably neither understands or uses. The
5748 * correct approach (?) will have to incorporate extra fields attached
5749 * to the section to hold the system specific stuff. (krk)
5752 * 'a' - unknown - referred to in documentation, but no definition supplied
5753 * 'c' - section has code
5754 * 'd' - section has initialized data
5755 * 'u' - section has uninitialized data
5756 * 'i' - section contains directives (info)
5757 * 'n' - section can be discarded
5758 * 'R' - remove section at link time
5760 * Section Protection:
5761 * 'r' - section is readable
5762 * 'w' - section is writable
5763 * 'x' - section is executable
5764 * 's' - section is sharable
5766 * Section Alignment:
5767 * '0' - align to byte boundary
5768 * '1' - align to halfword boundary
5769 * '2' - align to word boundary
5770 * '3' - align to doubleword boundary
5771 * '4' - align to quadword boundary
5772 * '5' - align to 32 byte boundary
5773 * '6' - align to 64 byte boundary
5778 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5780 /* Strip out the section name. */
5789 c = get_symbol_name (§ion_name);
5791 name = xstrdup (section_name);
5793 *input_line_pointer = c;
5795 SKIP_WHITESPACE_AFTER_NAME ();
5798 flags = SEC_NO_FLAGS;
5800 if (strcmp (name, ".idata$2") == 0)
5804 else if (strcmp (name, ".idata$3") == 0)
5808 else if (strcmp (name, ".idata$4") == 0)
5812 else if (strcmp (name, ".idata$5") == 0)
5816 else if (strcmp (name, ".idata$6") == 0)
5821 /* Default alignment to 16 byte boundary. */
5824 if (*input_line_pointer == ',')
5826 ++input_line_pointer;
5828 if (*input_line_pointer != '"')
5829 exp = get_absolute_expression ();
5832 ++input_line_pointer;
5833 while (*input_line_pointer != '"'
5834 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5836 switch (*input_line_pointer)
5838 /* Section Contents */
5839 case 'a': /* unknown */
5840 as_bad (_("unsupported section attribute -- 'a'"));
5842 case 'c': /* code section */
5845 case 'd': /* section has initialized data */
5848 case 'u': /* section has uninitialized data */
5849 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5853 case 'i': /* section contains directives (info) */
5854 /* FIXME: This is IMAGE_SCN_LNK_INFO
5856 flags |= SEC_HAS_CONTENTS;
5858 case 'n': /* section can be discarded */
5861 case 'R': /* Remove section at link time */
5862 flags |= SEC_NEVER_LOAD;
5864 #if IFLICT_BRAIN_DAMAGE
5865 /* Section Protection */
5866 case 'r': /* section is readable */
5867 flags |= IMAGE_SCN_MEM_READ;
5869 case 'w': /* section is writable */
5870 flags |= IMAGE_SCN_MEM_WRITE;
5872 case 'x': /* section is executable */
5873 flags |= IMAGE_SCN_MEM_EXECUTE;
5875 case 's': /* section is sharable */
5876 flags |= IMAGE_SCN_MEM_SHARED;
5879 /* Section Alignment */
5880 case '0': /* align to byte boundary */
5881 flags |= IMAGE_SCN_ALIGN_1BYTES;
5884 case '1': /* align to halfword boundary */
5885 flags |= IMAGE_SCN_ALIGN_2BYTES;
5888 case '2': /* align to word boundary */
5889 flags |= IMAGE_SCN_ALIGN_4BYTES;
5892 case '3': /* align to doubleword boundary */
5893 flags |= IMAGE_SCN_ALIGN_8BYTES;
5896 case '4': /* align to quadword boundary */
5897 flags |= IMAGE_SCN_ALIGN_16BYTES;
5900 case '5': /* align to 32 byte boundary */
5901 flags |= IMAGE_SCN_ALIGN_32BYTES;
5904 case '6': /* align to 64 byte boundary */
5905 flags |= IMAGE_SCN_ALIGN_64BYTES;
5910 as_bad (_("unknown section attribute '%c'"),
5911 *input_line_pointer);
5914 ++input_line_pointer;
5916 if (*input_line_pointer == '"')
5917 ++input_line_pointer;
5921 sec = subseg_new (name, (subsegT) exp);
5923 ppc_set_current_section (sec);
5925 if (flags != SEC_NO_FLAGS)
5927 if (! bfd_set_section_flags (stdoutput, sec, flags))
5928 as_bad (_("error setting flags for \"%s\": %s"),
5929 bfd_section_name (stdoutput, sec),
5930 bfd_errmsg (bfd_get_error ()));
5933 bfd_set_section_alignment (stdoutput, sec, align);
5937 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5943 endc = get_symbol_name (&name);
5945 ext_sym = symbol_find_or_make (name);
5947 (void) restore_line_pointer (endc);
5949 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5950 SF_SET_FUNCTION (ext_sym);
5951 SF_SET_PROCESS (ext_sym);
5952 coff_add_linesym (ext_sym);
5954 demand_empty_rest_of_line ();
5958 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5960 if (tocdata_section == 0)
5962 tocdata_section = subseg_new (".tocd", 0);
5963 /* FIXME: section flags won't work. */
5964 bfd_set_section_flags (stdoutput, tocdata_section,
5965 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5966 | SEC_READONLY | SEC_DATA));
5968 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5972 rdata_section = subseg_new (".tocd", 0);
5975 ppc_set_current_section (tocdata_section);
5977 demand_empty_rest_of_line ();
5980 /* Don't adjust TOC relocs to use the section symbol. */
5983 ppc_pe_fix_adjustable (fixS *fix)
5985 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5992 /* XCOFF specific symbol and file handling. */
5994 /* Canonicalize the symbol name. We use the to force the suffix, if
5995 any, to use square brackets, and to be in upper case. */
5998 ppc_canonicalize_symbol_name (char *name)
6002 if (ppc_stab_symbol)
6005 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
6019 for (s++; *s != '\0' && *s != brac; s++)
6022 if (*s == '\0' || s[1] != '\0')
6023 as_bad (_("bad symbol suffix"));
6031 /* Set the class of a symbol based on the suffix, if any. This is
6032 called whenever a new symbol is created. */
6035 ppc_symbol_new_hook (symbolS *sym)
6037 struct ppc_tc_sy *tc;
6040 tc = symbol_get_tc (sym);
6043 tc->symbol_class = -1;
6044 tc->real_name = NULL;
6051 if (ppc_stab_symbol)
6054 s = strchr (S_GET_NAME (sym), '[');
6055 if (s == (const char *) NULL)
6057 /* There is no suffix. */
6066 if (strcmp (s, "BS]") == 0)
6067 tc->symbol_class = XMC_BS;
6070 if (strcmp (s, "DB]") == 0)
6071 tc->symbol_class = XMC_DB;
6072 else if (strcmp (s, "DS]") == 0)
6073 tc->symbol_class = XMC_DS;
6076 if (strcmp (s, "GL]") == 0)
6077 tc->symbol_class = XMC_GL;
6080 if (strcmp (s, "PR]") == 0)
6081 tc->symbol_class = XMC_PR;
6084 if (strcmp (s, "RO]") == 0)
6085 tc->symbol_class = XMC_RO;
6086 else if (strcmp (s, "RW]") == 0)
6087 tc->symbol_class = XMC_RW;
6090 if (strcmp (s, "SV]") == 0)
6091 tc->symbol_class = XMC_SV;
6094 if (strcmp (s, "TC]") == 0)
6095 tc->symbol_class = XMC_TC;
6096 else if (strcmp (s, "TI]") == 0)
6097 tc->symbol_class = XMC_TI;
6098 else if (strcmp (s, "TB]") == 0)
6099 tc->symbol_class = XMC_TB;
6100 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
6101 tc->symbol_class = XMC_TC0;
6104 if (strcmp (s, "UA]") == 0)
6105 tc->symbol_class = XMC_UA;
6106 else if (strcmp (s, "UC]") == 0)
6107 tc->symbol_class = XMC_UC;
6110 if (strcmp (s, "XO]") == 0)
6111 tc->symbol_class = XMC_XO;
6115 if (tc->symbol_class == -1)
6116 as_bad (_("unrecognized symbol suffix"));
6119 /* Set the class of a label based on where it is defined. This
6120 handles symbols without suffixes. Also, move the symbol so that it
6121 follows the csect symbol. */
6124 ppc_frob_label (symbolS *sym)
6126 if (ppc_current_csect != (symbolS *) NULL)
6128 if (symbol_get_tc (sym)->symbol_class == -1)
6129 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
6131 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
6132 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
6133 &symbol_rootP, &symbol_lastP);
6134 symbol_get_tc (ppc_current_csect)->within = sym;
6135 symbol_get_tc (sym)->within = ppc_current_csect;
6139 dwarf2_emit_label (sym);
6143 /* This variable is set by ppc_frob_symbol if any absolute symbols are
6144 seen. It tells ppc_adjust_symtab whether it needs to look through
6147 static bfd_boolean ppc_saw_abs;
6149 /* Change the name of a symbol just before writing it out. Set the
6150 real name if the .rename pseudo-op was used. Otherwise, remove any
6151 class suffix. Return 1 if the symbol should not be included in the
6155 ppc_frob_symbol (symbolS *sym)
6157 static symbolS *ppc_last_function;
6158 static symbolS *set_end;
6160 /* Discard symbols that should not be included in the output symbol
6162 if (! symbol_used_in_reloc_p (sym)
6163 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
6164 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
6165 && ! symbol_get_tc (sym)->output
6166 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
6169 /* This one will disappear anyway. Don't make a csect sym for it. */
6170 if (sym == abs_section_sym)
6173 if (symbol_get_tc (sym)->real_name != (char *) NULL)
6174 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
6180 name = S_GET_NAME (sym);
6181 s = strchr (name, '[');
6182 if (s != (char *) NULL)
6188 snew = xstrndup (name, len);
6190 S_SET_NAME (sym, snew);
6194 if (set_end != (symbolS *) NULL)
6196 SA_SET_SYM_ENDNDX (set_end, sym);
6200 if (SF_GET_FUNCTION (sym))
6202 if (ppc_last_function != (symbolS *) NULL)
6203 as_bad (_("two .function pseudo-ops with no intervening .ef"));
6204 ppc_last_function = sym;
6205 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
6207 resolve_symbol_value (symbol_get_tc (sym)->u.size);
6208 SA_SET_SYM_FSIZE (sym,
6209 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
6212 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
6213 && strcmp (S_GET_NAME (sym), ".ef") == 0)
6215 if (ppc_last_function == (symbolS *) NULL)
6216 as_bad (_(".ef with no preceding .function"));
6219 set_end = ppc_last_function;
6220 ppc_last_function = NULL;
6222 /* We don't have a C_EFCN symbol, but we need to force the
6223 COFF backend to believe that it has seen one. */
6224 coff_last_function = NULL;
6228 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
6229 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
6230 && S_GET_STORAGE_CLASS (sym) != C_FILE
6231 && S_GET_STORAGE_CLASS (sym) != C_FCN
6232 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
6233 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
6234 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
6235 && S_GET_STORAGE_CLASS (sym) != C_BINCL
6236 && S_GET_STORAGE_CLASS (sym) != C_EINCL
6237 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
6238 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
6240 if (S_GET_STORAGE_CLASS (sym) == C_EXT
6241 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
6242 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
6245 union internal_auxent *a;
6247 /* Create a csect aux. */
6248 i = S_GET_NUMBER_AUXILIARY (sym);
6249 S_SET_NUMBER_AUXILIARY (sym, i + 1);
6250 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
6251 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
6253 /* This is the TOC table. */
6254 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
6255 a->x_csect.x_scnlen.l = 0;
6256 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
6258 else if (symbol_get_tc (sym)->subseg != 0)
6260 /* This is a csect symbol. x_scnlen is the size of the
6262 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
6263 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
6264 S_GET_SEGMENT (sym))
6265 - S_GET_VALUE (sym));
6268 resolve_symbol_value (symbol_get_tc (sym)->next);
6269 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
6270 - S_GET_VALUE (sym));
6272 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
6274 else if (S_GET_SEGMENT (sym) == bss_section)
6276 /* This is a common symbol. */
6277 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
6278 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
6279 if (S_IS_EXTERNAL (sym))
6280 symbol_get_tc (sym)->symbol_class = XMC_RW;
6282 symbol_get_tc (sym)->symbol_class = XMC_BS;
6284 else if (S_GET_SEGMENT (sym) == absolute_section)
6286 /* This is an absolute symbol. The csect will be created by
6287 ppc_adjust_symtab. */
6289 a->x_csect.x_smtyp = XTY_LD;
6290 if (symbol_get_tc (sym)->symbol_class == -1)
6291 symbol_get_tc (sym)->symbol_class = XMC_XO;
6293 else if (! S_IS_DEFINED (sym))
6295 /* This is an external symbol. */
6296 a->x_csect.x_scnlen.l = 0;
6297 a->x_csect.x_smtyp = XTY_ER;
6299 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
6303 /* This is a TOC definition. x_scnlen is the size of the
6305 next = symbol_next (sym);
6306 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
6307 next = symbol_next (next);
6308 if (next == (symbolS *) NULL
6309 || symbol_get_tc (next)->symbol_class != XMC_TC)
6311 if (ppc_after_toc_frag == (fragS *) NULL)
6312 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
6314 - S_GET_VALUE (sym));
6316 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
6317 - S_GET_VALUE (sym));
6321 resolve_symbol_value (next);
6322 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
6323 - S_GET_VALUE (sym));
6325 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
6331 /* This is a normal symbol definition. x_scnlen is the
6332 symbol index of the containing csect. */
6333 if (S_GET_SEGMENT (sym) == text_section)
6334 csect = ppc_text_csects;
6335 else if (S_GET_SEGMENT (sym) == data_section)
6336 csect = ppc_data_csects;
6340 /* Skip the initial dummy symbol. */
6341 csect = symbol_get_tc (csect)->next;
6343 if (csect == (symbolS *) NULL)
6345 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
6346 a->x_csect.x_scnlen.l = 0;
6350 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
6352 resolve_symbol_value (symbol_get_tc (csect)->next);
6353 if (S_GET_VALUE (symbol_get_tc (csect)->next)
6354 > S_GET_VALUE (sym))
6356 csect = symbol_get_tc (csect)->next;
6359 a->x_csect.x_scnlen.p =
6360 coffsymbol (symbol_get_bfdsym (csect))->native;
6361 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
6364 a->x_csect.x_smtyp = XTY_LD;
6367 a->x_csect.x_parmhash = 0;
6368 a->x_csect.x_snhash = 0;
6369 if (symbol_get_tc (sym)->symbol_class == -1)
6370 a->x_csect.x_smclas = XMC_PR;
6372 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
6373 a->x_csect.x_stab = 0;
6374 a->x_csect.x_snstab = 0;
6376 /* Don't let the COFF backend resort these symbols. */
6377 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
6379 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
6381 /* We want the value to be the symbol index of the referenced
6382 csect symbol. BFD will do that for us if we set the right
6384 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
6385 combined_entry_type *c = coffsymbol (bsym)->native;
6387 S_SET_VALUE (sym, (valueT) (size_t) c);
6388 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
6390 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
6395 block = symbol_get_tc (sym)->within;
6398 /* The value is the offset from the enclosing csect. */
6401 csect = symbol_get_tc (block)->within;
6402 resolve_symbol_value (csect);
6403 base = S_GET_VALUE (csect);
6408 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6410 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6411 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6413 /* We want the value to be a file offset into the line numbers.
6414 BFD will do that for us if we set the right flags. We have
6415 already set the value correctly. */
6416 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6422 /* Adjust the symbol table. This creates csect symbols for all
6423 absolute symbols. */
6426 ppc_adjust_symtab (void)
6433 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6437 union internal_auxent *a;
6439 if (S_GET_SEGMENT (sym) != absolute_section)
6442 csect = symbol_create (".abs[XO]", absolute_section,
6443 S_GET_VALUE (sym), &zero_address_frag);
6444 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6445 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6446 i = S_GET_NUMBER_AUXILIARY (csect);
6447 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6448 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6449 a->x_csect.x_scnlen.l = 0;
6450 a->x_csect.x_smtyp = XTY_SD;
6451 a->x_csect.x_parmhash = 0;
6452 a->x_csect.x_snhash = 0;
6453 a->x_csect.x_smclas = XMC_XO;
6454 a->x_csect.x_stab = 0;
6455 a->x_csect.x_snstab = 0;
6457 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6459 i = S_GET_NUMBER_AUXILIARY (sym);
6460 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6461 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6462 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6465 ppc_saw_abs = FALSE;
6468 /* Set the VMA for a section. This is called on all the sections in
6472 ppc_frob_section (asection *sec)
6474 static bfd_vma vma = 0;
6476 /* Dwarf sections start at 0. */
6477 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6480 vma = md_section_align (sec, vma);
6481 bfd_set_section_vma (stdoutput, sec, vma);
6482 vma += bfd_section_size (stdoutput, sec);
6485 #endif /* OBJ_XCOFF */
6488 md_atof (int type, char *litp, int *sizep)
6490 return ieee_md_atof (type, litp, sizep, target_big_endian);
6493 /* Write a value out to the object file, using the appropriate
6497 md_number_to_chars (char *buf, valueT val, int n)
6499 if (target_big_endian)
6500 number_to_chars_bigendian (buf, val, n);
6502 number_to_chars_littleendian (buf, val, n);
6505 /* Align a section (I don't know why this is machine dependent). */
6508 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6513 int align = bfd_get_section_alignment (stdoutput, seg);
6515 return ((addr + (1 << align) - 1) & -(1 << align));
6519 /* We don't have any form of relaxing. */
6522 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6523 asection *seg ATTRIBUTE_UNUSED)
6529 /* Convert a machine dependent frag. We never generate these. */
6532 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6533 asection *sec ATTRIBUTE_UNUSED,
6534 fragS *fragp ATTRIBUTE_UNUSED)
6539 /* We have no need to default values of symbols. */
6542 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6547 /* Functions concerning relocs. */
6549 /* The location from which a PC relative jump should be calculated,
6550 given a PC relative reloc. */
6553 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6555 return fixp->fx_frag->fr_address + fixp->fx_where;
6560 /* This is called to see whether a fixup should be adjusted to use a
6561 section symbol. We take the opportunity to change a fixup against
6562 a symbol in the TOC subsegment into a reloc against the
6563 corresponding .tc symbol. */
6566 ppc_fix_adjustable (fixS *fix)
6568 valueT val = resolve_symbol_value (fix->fx_addsy);
6569 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6570 TC_SYMFIELD_TYPE *tc;
6572 if (symseg == absolute_section)
6575 /* Always adjust symbols in debugging sections. */
6576 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6579 if (ppc_toc_csect != (symbolS *) NULL
6580 && fix->fx_addsy != ppc_toc_csect
6581 && symseg == data_section
6582 && val >= ppc_toc_frag->fr_address
6583 && (ppc_after_toc_frag == (fragS *) NULL
6584 || val < ppc_after_toc_frag->fr_address))
6588 for (sy = symbol_next (ppc_toc_csect);
6589 sy != (symbolS *) NULL;
6590 sy = symbol_next (sy))
6592 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6594 if (sy_tc->symbol_class == XMC_TC0)
6596 if (sy_tc->symbol_class != XMC_TC)
6598 if (val == resolve_symbol_value (sy))
6601 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6606 as_bad_where (fix->fx_file, fix->fx_line,
6607 _("symbol in .toc does not match any .tc"));
6610 /* Possibly adjust the reloc to be against the csect. */
6611 tc = symbol_get_tc (fix->fx_addsy);
6613 && tc->symbol_class != XMC_TC0
6614 && tc->symbol_class != XMC_TC
6615 && symseg != bss_section
6616 /* Don't adjust if this is a reloc in the toc section. */
6617 && (symseg != data_section
6618 || ppc_toc_csect == NULL
6619 || val < ppc_toc_frag->fr_address
6620 || (ppc_after_toc_frag != NULL
6621 && val >= ppc_after_toc_frag->fr_address)))
6623 symbolS *csect = tc->within;
6625 /* If the symbol was not declared by a label (eg: a section symbol),
6626 use the section instead of the csect. This doesn't happen in
6627 normal AIX assembly code. */
6629 csect = seg_info (symseg)->sym;
6631 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6632 fix->fx_addsy = csect;
6637 /* Adjust a reloc against a .lcomm symbol to be against the base
6639 if (symseg == bss_section
6640 && ! S_IS_EXTERNAL (fix->fx_addsy))
6642 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6644 fix->fx_offset += val - resolve_symbol_value (sy);
6651 /* A reloc from one csect to another must be kept. The assembler
6652 will, of course, keep relocs between sections, and it will keep
6653 absolute relocs, but we need to force it to keep PC relative relocs
6654 between two csects in the same section. */
6657 ppc_force_relocation (fixS *fix)
6659 /* At this point fix->fx_addsy should already have been converted to
6660 a csect symbol. If the csect does not include the fragment, then
6661 we need to force the relocation. */
6663 && fix->fx_addsy != NULL
6664 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6665 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6666 > fix->fx_frag->fr_address)
6667 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6668 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6669 <= fix->fx_frag->fr_address))))
6672 return generic_force_reloc (fix);
6676 ppc_new_dot_label (symbolS *sym)
6678 /* Anchor this label to the current csect for relocations. */
6679 symbol_get_tc (sym)->within = ppc_current_csect;
6682 #endif /* OBJ_XCOFF */
6685 /* If this function returns non-zero, it guarantees that a relocation
6686 will be emitted for a fixup. */
6689 ppc_force_relocation (fixS *fix)
6691 /* Branch prediction relocations must force a relocation, as must
6692 the vtable description relocs. */
6693 switch (fix->fx_r_type)
6695 case BFD_RELOC_PPC_B16_BRTAKEN:
6696 case BFD_RELOC_PPC_B16_BRNTAKEN:
6697 case BFD_RELOC_PPC_BA16_BRTAKEN:
6698 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6699 case BFD_RELOC_24_PLT_PCREL:
6700 case BFD_RELOC_PPC64_TOC:
6702 case BFD_RELOC_PPC_B26:
6703 case BFD_RELOC_PPC_BA26:
6704 case BFD_RELOC_PPC_B16:
6705 case BFD_RELOC_PPC_BA16:
6706 case BFD_RELOC_PPC64_REL24_NOTOC:
6707 /* All branch fixups targeting a localentry symbol must
6708 force a relocation. */
6711 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6712 elf_symbol_type *elfsym
6713 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6714 gas_assert (elfsym);
6715 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6723 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6724 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6727 return generic_force_reloc (fix);
6731 ppc_fix_adjustable (fixS *fix)
6733 switch (fix->fx_r_type)
6735 /* All branch fixups targeting a localentry symbol must
6736 continue using the symbol. */
6737 case BFD_RELOC_PPC_B26:
6738 case BFD_RELOC_PPC_BA26:
6739 case BFD_RELOC_PPC_B16:
6740 case BFD_RELOC_PPC_BA16:
6741 case BFD_RELOC_PPC_B16_BRTAKEN:
6742 case BFD_RELOC_PPC_B16_BRNTAKEN:
6743 case BFD_RELOC_PPC_BA16_BRTAKEN:
6744 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6745 case BFD_RELOC_PPC64_REL24_NOTOC:
6748 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6749 elf_symbol_type *elfsym
6750 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6751 gas_assert (elfsym);
6752 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6760 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6761 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6762 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6763 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6764 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6765 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6766 && fix->fx_r_type != BFD_RELOC_GPREL16
6767 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6768 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6769 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6770 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6775 ppc_frag_check (struct frag *fragP)
6777 if ((fragP->fr_address & fragP->insn_addr) != 0)
6778 as_bad_where (fragP->fr_file, fragP->fr_line,
6779 _("instruction address is not a multiple of %d"),
6780 fragP->insn_addr + 1);
6783 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6784 rs_align_code frag. */
6787 ppc_handle_align (struct frag *fragP)
6789 valueT count = (fragP->fr_next->fr_address
6790 - (fragP->fr_address + fragP->fr_fix));
6792 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
6794 char *dest = fragP->fr_literal + fragP->fr_fix;
6797 md_number_to_chars (dest, 0x4400, 2);
6799 else if (count != 0 && (count & 3) == 0)
6801 char *dest = fragP->fr_literal + fragP->fr_fix;
6805 if (count > 4 * nop_limit && count < 0x2000000)
6809 /* Make a branch, then follow with nops. Insert another
6810 frag to handle the nops. */
6811 md_number_to_chars (dest, 0x48000000 + count, 4);
6816 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6817 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6818 fragP->fr_next = rest;
6820 rest->fr_address += rest->fr_fix + 4;
6822 /* If we leave the next frag as rs_align_code we'll come here
6823 again, resulting in a bunch of branches rather than a
6824 branch followed by nops. */
6825 rest->fr_type = rs_align;
6826 dest = rest->fr_literal;
6829 md_number_to_chars (dest, 0x60000000, 4);
6831 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6832 && (ppc_cpu & PPC_OPCODE_POWER9) == 0)
6834 /* For power6, power7, and power8, we want the last nop to
6835 be a group terminating one. Do this by inserting an
6836 rs_fill frag immediately after this one, with its address
6837 set to the last nop location. This will automatically
6838 reduce the number of nops in the current frag by one. */
6841 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6843 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6844 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6845 group_nop->fr_fix = 0;
6846 group_nop->fr_offset = 1;
6847 group_nop->fr_type = rs_fill;
6848 fragP->fr_next = group_nop;
6849 dest = group_nop->fr_literal;
6852 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6854 if (ppc_cpu & PPC_OPCODE_E500MC)
6855 /* e500mc group terminating nop: "ori 0,0,0". */
6856 md_number_to_chars (dest, 0x60000000, 4);
6858 /* power7/power8 group terminating nop: "ori 2,2,0". */
6859 md_number_to_chars (dest, 0x60420000, 4);
6862 /* power6 group terminating nop: "ori 1,1,0". */
6863 md_number_to_chars (dest, 0x60210000, 4);
6868 /* Apply a fixup to the object code. This is called for all the
6869 fixups we generated by the calls to fix_new_exp, above. */
6872 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6874 valueT value = * valP;
6876 const struct powerpc_operand *operand;
6879 if (fixP->fx_addsy != NULL)
6881 /* Hack around bfd_install_relocation brain damage. */
6883 value += fixP->fx_frag->fr_address + fixP->fx_where;
6885 if (fixP->fx_addsy == abs_section_sym)
6891 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6892 the symbol values. If we are doing this relocation the code in
6893 write.c is going to call bfd_install_relocation, which is also
6894 going to use the symbol value. That means that if the reloc is
6895 fully resolved we want to use *valP since bfd_install_relocation is
6897 However, if the reloc is not fully resolved we do not want to
6898 use *valP, and must use fx_offset instead. If the relocation
6899 is PC-relative, we then need to re-apply md_pcrel_from_section
6900 to this new relocation value. */
6901 if (fixP->fx_addsy == (symbolS *) NULL)
6906 value = fixP->fx_offset;
6908 value -= md_pcrel_from_section (fixP, seg);
6912 /* We are only able to convert some relocs to pc-relative. */
6915 switch (fixP->fx_r_type)
6918 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6922 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6926 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6929 case BFD_RELOC_LO16:
6930 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6933 case BFD_RELOC_HI16:
6934 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6937 case BFD_RELOC_HI16_S:
6938 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6941 case BFD_RELOC_PPC64_ADDR16_HIGH:
6942 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGH;
6945 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6946 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHA;
6949 case BFD_RELOC_PPC64_HIGHER:
6950 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHER;
6953 case BFD_RELOC_PPC64_HIGHER_S:
6954 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHERA;
6957 case BFD_RELOC_PPC64_HIGHEST:
6958 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHEST;
6961 case BFD_RELOC_PPC64_HIGHEST_S:
6962 fixP->fx_r_type = BFD_RELOC_PPC64_REL16_HIGHESTA;
6965 case BFD_RELOC_PPC_16DX_HA:
6966 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6973 else if (!fixP->fx_done
6974 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA)
6976 /* addpcis is relative to next insn address. */
6978 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6983 if (fixP->fx_pcrel_adjust != 0)
6985 /* This is a fixup on an instruction. */
6986 int opindex = fixP->fx_pcrel_adjust & 0xff;
6988 operand = &powerpc_operands[opindex];
6990 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6991 does not generate a reloc. It uses the offset of `sym' within its
6992 csect. Other usages, such as `.long sym', generate relocs. This
6993 is the documented behaviour of non-TOC symbols. */
6994 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6995 && (operand->bitm & 0xfff0) == 0xfff0
6996 && operand->shift == 0
6997 && (operand->insert == NULL || ppc_obj64)
6998 && fixP->fx_addsy != NULL
6999 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
7000 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
7001 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
7002 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
7004 value = fixP->fx_offset;
7008 /* During parsing of instructions, a TOC16 reloc is generated for
7009 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
7010 in the toc. But at parse time, SYM may be not yet defined, so
7011 check again here. */
7012 if (fixP->fx_r_type == BFD_RELOC_16
7013 && fixP->fx_addsy != NULL
7014 && ppc_is_toc_sym (fixP->fx_addsy))
7015 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
7019 /* Calculate value to be stored in field. */
7021 switch (fixP->fx_r_type)
7024 case BFD_RELOC_PPC64_ADDR16_LO_DS:
7025 case BFD_RELOC_PPC_VLE_LO16A:
7026 case BFD_RELOC_PPC_VLE_LO16D:
7028 case BFD_RELOC_LO16:
7029 case BFD_RELOC_LO16_PCREL:
7030 fieldval = value & 0xffff;
7032 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
7033 fieldval = SEX16 (fieldval);
7034 fixP->fx_no_overflow = 1;
7037 case BFD_RELOC_HI16:
7038 case BFD_RELOC_HI16_PCREL:
7040 if (REPORT_OVERFLOW_HI && ppc_obj64)
7042 fieldval = value >> 16;
7043 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
7045 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
7046 fieldval = ((valueT) fieldval ^ sign) - sign;
7052 case BFD_RELOC_PPC_VLE_HI16A:
7053 case BFD_RELOC_PPC_VLE_HI16D:
7054 case BFD_RELOC_PPC64_ADDR16_HIGH:
7056 fieldval = PPC_HI (value);
7057 goto sign_extend_16;
7059 case BFD_RELOC_HI16_S:
7060 case BFD_RELOC_HI16_S_PCREL:
7061 case BFD_RELOC_PPC_16DX_HA:
7062 case BFD_RELOC_PPC_REL16DX_HA:
7064 if (REPORT_OVERFLOW_HI && ppc_obj64)
7066 fieldval = (value + 0x8000) >> 16;
7067 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
7069 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
7070 fieldval = ((valueT) fieldval ^ sign) - sign;
7076 case BFD_RELOC_PPC_VLE_HA16A:
7077 case BFD_RELOC_PPC_VLE_HA16D:
7078 case BFD_RELOC_PPC64_ADDR16_HIGHA:
7080 fieldval = PPC_HA (value);
7081 goto sign_extend_16;
7084 case BFD_RELOC_PPC64_HIGHER:
7085 fieldval = PPC_HIGHER (value);
7086 goto sign_extend_16;
7088 case BFD_RELOC_PPC64_HIGHER_S:
7089 fieldval = PPC_HIGHERA (value);
7090 goto sign_extend_16;
7092 case BFD_RELOC_PPC64_HIGHEST:
7093 fieldval = PPC_HIGHEST (value);
7094 goto sign_extend_16;
7096 case BFD_RELOC_PPC64_HIGHEST_S:
7097 fieldval = PPC_HIGHESTA (value);
7098 goto sign_extend_16;
7105 if (operand != NULL)
7107 /* Handle relocs in an insn. */
7108 switch (fixP->fx_r_type)
7111 /* The following relocs can't be calculated by the assembler.
7112 Leave the field zero. */
7113 case BFD_RELOC_PPC_TPREL16:
7114 case BFD_RELOC_PPC_TPREL16_LO:
7115 case BFD_RELOC_PPC_TPREL16_HI:
7116 case BFD_RELOC_PPC_TPREL16_HA:
7117 case BFD_RELOC_PPC_DTPREL16:
7118 case BFD_RELOC_PPC_DTPREL16_LO:
7119 case BFD_RELOC_PPC_DTPREL16_HI:
7120 case BFD_RELOC_PPC_DTPREL16_HA:
7121 case BFD_RELOC_PPC_GOT_TLSGD16:
7122 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
7123 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
7124 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
7125 case BFD_RELOC_PPC_GOT_TLSLD16:
7126 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
7127 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
7128 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
7129 case BFD_RELOC_PPC_GOT_TPREL16:
7130 case BFD_RELOC_PPC_GOT_TPREL16_LO:
7131 case BFD_RELOC_PPC_GOT_TPREL16_HI:
7132 case BFD_RELOC_PPC_GOT_TPREL16_HA:
7133 case BFD_RELOC_PPC_GOT_DTPREL16:
7134 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
7135 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
7136 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
7137 case BFD_RELOC_PPC64_TPREL16_DS:
7138 case BFD_RELOC_PPC64_TPREL16_LO_DS:
7139 case BFD_RELOC_PPC64_TPREL16_HIGH:
7140 case BFD_RELOC_PPC64_TPREL16_HIGHA:
7141 case BFD_RELOC_PPC64_TPREL16_HIGHER:
7142 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
7143 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
7144 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
7145 case BFD_RELOC_PPC64_DTPREL16_HIGH:
7146 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
7147 case BFD_RELOC_PPC64_DTPREL16_DS:
7148 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
7149 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
7150 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
7151 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
7152 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7153 gas_assert (fixP->fx_addsy != NULL);
7154 S_SET_THREAD_LOCAL (fixP->fx_addsy);
7158 /* These also should leave the field zero for the same
7159 reason. Note that older versions of gas wrote values
7160 here. If we want to go back to the old behaviour, then
7161 all _LO and _LO_DS cases will need to be treated like
7162 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
7163 case BFD_RELOC_16_GOTOFF:
7164 case BFD_RELOC_LO16_GOTOFF:
7165 case BFD_RELOC_HI16_GOTOFF:
7166 case BFD_RELOC_HI16_S_GOTOFF:
7167 case BFD_RELOC_LO16_PLTOFF:
7168 case BFD_RELOC_HI16_PLTOFF:
7169 case BFD_RELOC_HI16_S_PLTOFF:
7170 case BFD_RELOC_GPREL16:
7171 case BFD_RELOC_16_BASEREL:
7172 case BFD_RELOC_LO16_BASEREL:
7173 case BFD_RELOC_HI16_BASEREL:
7174 case BFD_RELOC_HI16_S_BASEREL:
7175 case BFD_RELOC_PPC_TOC16:
7176 case BFD_RELOC_PPC64_TOC16_LO:
7177 case BFD_RELOC_PPC64_TOC16_HI:
7178 case BFD_RELOC_PPC64_TOC16_HA:
7179 case BFD_RELOC_PPC64_PLTGOT16:
7180 case BFD_RELOC_PPC64_PLTGOT16_LO:
7181 case BFD_RELOC_PPC64_PLTGOT16_HI:
7182 case BFD_RELOC_PPC64_PLTGOT16_HA:
7183 case BFD_RELOC_PPC64_GOT16_DS:
7184 case BFD_RELOC_PPC64_GOT16_LO_DS:
7185 case BFD_RELOC_PPC64_PLT16_LO_DS:
7186 case BFD_RELOC_PPC64_SECTOFF_DS:
7187 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
7188 case BFD_RELOC_PPC64_TOC16_DS:
7189 case BFD_RELOC_PPC64_TOC16_LO_DS:
7190 case BFD_RELOC_PPC64_PLTGOT16_DS:
7191 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
7192 case BFD_RELOC_PPC_EMB_NADDR16:
7193 case BFD_RELOC_PPC_EMB_NADDR16_LO:
7194 case BFD_RELOC_PPC_EMB_NADDR16_HI:
7195 case BFD_RELOC_PPC_EMB_NADDR16_HA:
7196 case BFD_RELOC_PPC_EMB_SDAI16:
7197 case BFD_RELOC_PPC_EMB_SDA2I16:
7198 case BFD_RELOC_PPC_EMB_SDA2REL:
7199 case BFD_RELOC_PPC_EMB_SDA21:
7200 case BFD_RELOC_PPC_EMB_MRKREF:
7201 case BFD_RELOC_PPC_EMB_RELSEC16:
7202 case BFD_RELOC_PPC_EMB_RELST_LO:
7203 case BFD_RELOC_PPC_EMB_RELST_HI:
7204 case BFD_RELOC_PPC_EMB_RELST_HA:
7205 case BFD_RELOC_PPC_EMB_BIT_FLD:
7206 case BFD_RELOC_PPC_EMB_RELSDA:
7207 case BFD_RELOC_PPC_VLE_SDA21:
7208 case BFD_RELOC_PPC_VLE_SDA21_LO:
7209 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
7210 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
7211 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
7212 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
7213 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
7214 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
7215 gas_assert (fixP->fx_addsy != NULL);
7218 case BFD_RELOC_PPC_TLS:
7219 case BFD_RELOC_PPC_TLSGD:
7220 case BFD_RELOC_PPC_TLSLD:
7226 case BFD_RELOC_PPC_B16:
7227 /* Adjust the offset to the instruction boundary. */
7232 case BFD_RELOC_VTABLE_INHERIT:
7233 case BFD_RELOC_VTABLE_ENTRY:
7234 case BFD_RELOC_PPC_DTPMOD:
7235 case BFD_RELOC_PPC_TPREL:
7236 case BFD_RELOC_PPC_DTPREL:
7237 case BFD_RELOC_PPC_COPY:
7238 case BFD_RELOC_PPC_GLOB_DAT:
7239 case BFD_RELOC_32_PLT_PCREL:
7240 case BFD_RELOC_PPC_EMB_NADDR32:
7241 case BFD_RELOC_PPC64_TOC:
7242 case BFD_RELOC_CTOR:
7244 case BFD_RELOC_32_PCREL:
7247 case BFD_RELOC_64_PCREL:
7248 case BFD_RELOC_PPC64_ADDR64_LOCAL:
7249 as_bad_where (fixP->fx_file, fixP->fx_line,
7250 _("%s unsupported as instruction fixup"),
7251 bfd_get_reloc_code_name (fixP->fx_r_type));
7260 /* powerpc uses RELA style relocs, so if emitting a reloc the field
7261 contents can stay at zero. */
7262 #define APPLY_RELOC fixP->fx_done
7264 #define APPLY_RELOC 1
7266 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
7269 unsigned char *where;
7271 /* Fetch the instruction, insert the fully resolved operand
7272 value, and stuff the instruction back again. */
7273 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
7274 if (target_big_endian)
7276 if (fixP->fx_size == 4)
7277 insn = bfd_getb32 (where);
7279 insn = bfd_getb16 (where);
7283 if (fixP->fx_size == 4)
7284 insn = bfd_getl32 (where);
7286 insn = bfd_getl16 (where);
7288 insn = ppc_insert_operand (insn, operand, fieldval,
7289 fixP->tc_fix_data.ppc_cpu,
7290 fixP->fx_file, fixP->fx_line);
7291 if (target_big_endian)
7293 if (fixP->fx_size == 4)
7294 bfd_putb32 (insn, where);
7296 bfd_putb16 (insn, where);
7300 if (fixP->fx_size == 4)
7301 bfd_putl32 (insn, where);
7303 bfd_putl16 (insn, where);
7308 /* Nothing else to do here. */
7311 gas_assert (fixP->fx_addsy != NULL);
7312 if (fixP->fx_r_type == BFD_RELOC_NONE)
7317 /* Use expr_symbol_where to see if this is an expression
7319 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7320 as_bad_where (fixP->fx_file, fixP->fx_line,
7321 _("unresolved expression that must be resolved"));
7323 as_bad_where (fixP->fx_file, fixP->fx_line,
7324 _("unsupported relocation against %s"),
7325 S_GET_NAME (fixP->fx_addsy));
7332 /* Handle relocs in data. */
7333 switch (fixP->fx_r_type)
7335 case BFD_RELOC_VTABLE_INHERIT:
7337 && !S_IS_DEFINED (fixP->fx_addsy)
7338 && !S_IS_WEAK (fixP->fx_addsy))
7339 S_SET_WEAK (fixP->fx_addsy);
7342 case BFD_RELOC_VTABLE_ENTRY:
7347 /* These can appear with @l etc. in data. */
7348 case BFD_RELOC_LO16:
7349 case BFD_RELOC_LO16_PCREL:
7350 case BFD_RELOC_HI16:
7351 case BFD_RELOC_HI16_PCREL:
7352 case BFD_RELOC_HI16_S:
7353 case BFD_RELOC_HI16_S_PCREL:
7354 case BFD_RELOC_PPC64_HIGHER:
7355 case BFD_RELOC_PPC64_HIGHER_S:
7356 case BFD_RELOC_PPC64_HIGHEST:
7357 case BFD_RELOC_PPC64_HIGHEST_S:
7358 case BFD_RELOC_PPC64_ADDR16_HIGH:
7359 case BFD_RELOC_PPC64_ADDR16_HIGHA:
7360 case BFD_RELOC_PPC64_ADDR64_LOCAL:
7363 case BFD_RELOC_PPC_DTPMOD:
7364 case BFD_RELOC_PPC_TPREL:
7365 case BFD_RELOC_PPC_DTPREL:
7366 S_SET_THREAD_LOCAL (fixP->fx_addsy);
7369 /* Just punt all of these to the linker. */
7370 case BFD_RELOC_PPC_B16_BRTAKEN:
7371 case BFD_RELOC_PPC_B16_BRNTAKEN:
7372 case BFD_RELOC_16_GOTOFF:
7373 case BFD_RELOC_LO16_GOTOFF:
7374 case BFD_RELOC_HI16_GOTOFF:
7375 case BFD_RELOC_HI16_S_GOTOFF:
7376 case BFD_RELOC_LO16_PLTOFF:
7377 case BFD_RELOC_HI16_PLTOFF:
7378 case BFD_RELOC_HI16_S_PLTOFF:
7379 case BFD_RELOC_PPC_COPY:
7380 case BFD_RELOC_PPC_GLOB_DAT:
7381 case BFD_RELOC_16_BASEREL:
7382 case BFD_RELOC_LO16_BASEREL:
7383 case BFD_RELOC_HI16_BASEREL:
7384 case BFD_RELOC_HI16_S_BASEREL:
7385 case BFD_RELOC_PPC_TLS:
7386 case BFD_RELOC_PPC_DTPREL16_LO:
7387 case BFD_RELOC_PPC_DTPREL16_HI:
7388 case BFD_RELOC_PPC_DTPREL16_HA:
7389 case BFD_RELOC_PPC_TPREL16_LO:
7390 case BFD_RELOC_PPC_TPREL16_HI:
7391 case BFD_RELOC_PPC_TPREL16_HA:
7392 case BFD_RELOC_PPC_GOT_TLSGD16:
7393 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
7394 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
7395 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
7396 case BFD_RELOC_PPC_GOT_TLSLD16:
7397 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
7398 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
7399 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
7400 case BFD_RELOC_PPC_GOT_DTPREL16:
7401 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
7402 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
7403 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
7404 case BFD_RELOC_PPC_GOT_TPREL16:
7405 case BFD_RELOC_PPC_GOT_TPREL16_LO:
7406 case BFD_RELOC_PPC_GOT_TPREL16_HI:
7407 case BFD_RELOC_PPC_GOT_TPREL16_HA:
7408 case BFD_RELOC_24_PLT_PCREL:
7409 case BFD_RELOC_PPC_LOCAL24PC:
7410 case BFD_RELOC_32_PLT_PCREL:
7411 case BFD_RELOC_GPREL16:
7412 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
7413 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
7414 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
7415 case BFD_RELOC_PPC_EMB_NADDR32:
7416 case BFD_RELOC_PPC_EMB_NADDR16:
7417 case BFD_RELOC_PPC_EMB_NADDR16_LO:
7418 case BFD_RELOC_PPC_EMB_NADDR16_HI:
7419 case BFD_RELOC_PPC_EMB_NADDR16_HA:
7420 case BFD_RELOC_PPC_EMB_SDAI16:
7421 case BFD_RELOC_PPC_EMB_SDA2REL:
7422 case BFD_RELOC_PPC_EMB_SDA2I16:
7423 case BFD_RELOC_PPC_EMB_SDA21:
7424 case BFD_RELOC_PPC_VLE_SDA21_LO:
7425 case BFD_RELOC_PPC_EMB_MRKREF:
7426 case BFD_RELOC_PPC_EMB_RELSEC16:
7427 case BFD_RELOC_PPC_EMB_RELST_LO:
7428 case BFD_RELOC_PPC_EMB_RELST_HI:
7429 case BFD_RELOC_PPC_EMB_RELST_HA:
7430 case BFD_RELOC_PPC_EMB_BIT_FLD:
7431 case BFD_RELOC_PPC_EMB_RELSDA:
7432 case BFD_RELOC_PPC64_TOC:
7433 case BFD_RELOC_PPC_TOC16:
7434 case BFD_RELOC_PPC64_TOC16_LO:
7435 case BFD_RELOC_PPC64_TOC16_HI:
7436 case BFD_RELOC_PPC64_TOC16_HA:
7437 case BFD_RELOC_PPC64_DTPREL16_HIGH:
7438 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
7439 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
7440 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
7441 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
7442 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7443 case BFD_RELOC_PPC64_TPREL16_HIGH:
7444 case BFD_RELOC_PPC64_TPREL16_HIGHA:
7445 case BFD_RELOC_PPC64_TPREL16_HIGHER:
7446 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
7447 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
7448 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
7454 case BFD_RELOC_NONE:
7456 case BFD_RELOC_CTOR:
7458 case BFD_RELOC_32_PCREL:
7461 case BFD_RELOC_64_PCREL:
7463 case BFD_RELOC_16_PCREL:
7469 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
7474 if (fixP->fx_size && APPLY_RELOC)
7475 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7476 fieldval, fixP->fx_size);
7478 && (seg->flags & SEC_CODE) != 0
7479 && fixP->fx_size == 4
7482 && (fixP->fx_r_type == BFD_RELOC_32
7483 || fixP->fx_r_type == BFD_RELOC_CTOR
7484 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7485 as_warn_where (fixP->fx_file, fixP->fx_line,
7486 _("data in executable section"));
7490 ppc_elf_validate_fix (fixP, seg);
7491 fixP->fx_addnumber = value;
7493 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7494 from the section contents. If we are going to be emitting a reloc
7495 then the section contents are immaterial, so don't warn if they
7496 happen to overflow. Leave such warnings to ld. */
7499 fixP->fx_no_overflow = 1;
7501 /* Arrange to emit .TOC. as a normal symbol if used in anything
7502 but .TOC.@tocbase. */
7504 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7505 && fixP->fx_addsy != NULL
7506 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7507 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7510 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7511 fixP->fx_addnumber = 0;
7515 fixP->fx_addnumber = 0;
7517 /* We want to use the offset within the toc, not the actual VMA
7519 fixP->fx_addnumber =
7520 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7521 - S_GET_VALUE (ppc_toc_csect);
7522 /* Set *valP to avoid errors. */
7529 /* Generate a reloc for a fixup. */
7532 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7536 reloc = XNEW (arelent);
7538 reloc->sym_ptr_ptr = XNEW (asymbol *);
7539 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7540 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7541 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7542 if (reloc->howto == (reloc_howto_type *) NULL)
7544 as_bad_where (fixp->fx_file, fixp->fx_line,
7545 _("reloc %d not supported by object file format"),
7546 (int) fixp->fx_r_type);
7549 reloc->addend = fixp->fx_addnumber;
7555 ppc_cfi_frame_initial_instructions (void)
7557 cfi_add_CFA_def_cfa (1, 0);
7561 tc_ppc_regname_to_dw2regnum (char *regname)
7563 unsigned int regnum = -1;
7567 static struct { const char *name; int dw2regnum; } regnames[] =
7569 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7570 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7571 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7572 { "spe_acc", 111 }, { "spefscr", 112 }
7575 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7576 if (strcmp (regnames[i].name, regname) == 0)
7577 return regnames[i].dw2regnum;
7579 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7581 p = regname + 1 + (regname[1] == '.');
7582 regnum = strtoul (p, &q, 10);
7583 if (p == q || *q || regnum >= 32)
7585 if (regname[0] == 'f')
7587 else if (regname[0] == 'v')
7590 else if (regname[0] == 'c' && regname[1] == 'r')
7592 p = regname + 2 + (regname[2] == '.');
7593 if (p[0] < '0' || p[0] > '7' || p[1])
7595 regnum = p[0] - '0' + 68;