1 /* tc-ppc.c -- Assemble for the PowerPC or POWER (RS/6000)
2 Copyright (C) 1994-2018 Free Software Foundation, Inc.
3 Written by Ian Lance Taylor, Cygnus Support.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
23 #include "safe-ctype.h"
25 #include "dw2gencfi.h"
26 #include "opcode/ppc.h"
30 #include "elf/ppc64.h"
31 #include "dwarf2dbg.h"
39 #include "coff/xcoff.h"
43 /* This is the assembler for the PowerPC or POWER (RS/6000) chips. */
45 /* Tell the main code what the endianness is. */
46 extern int target_big_endian;
48 /* Whether or not, we've set target_big_endian. */
49 static int set_target_endian = 0;
51 /* Whether to use user friendly register names. */
52 #ifndef TARGET_REG_NAMES_P
54 #define TARGET_REG_NAMES_P TRUE
56 #define TARGET_REG_NAMES_P FALSE
60 /* Macros for calculating LO, HI, HA, HIGHER, HIGHERA, HIGHEST,
63 /* #lo(value) denotes the least significant 16 bits of the indicated. */
64 #define PPC_LO(v) ((v) & 0xffff)
66 /* #hi(value) denotes bits 16 through 31 of the indicated value. */
67 #define PPC_HI(v) (((v) >> 16) & 0xffff)
69 /* #ha(value) denotes the high adjusted value: bits 16 through 31 of
70 the indicated value, compensating for #lo() being treated as a
72 #define PPC_HA(v) PPC_HI ((v) + 0x8000)
74 /* #higher(value) denotes bits 32 through 47 of the indicated value. */
75 #define PPC_HIGHER(v) (((v) >> 16 >> 16) & 0xffff)
77 /* #highera(value) denotes bits 32 through 47 of the indicated value,
78 compensating for #lo() being treated as a signed number. */
79 #define PPC_HIGHERA(v) PPC_HIGHER ((v) + 0x8000)
81 /* #highest(value) denotes bits 48 through 63 of the indicated value. */
82 #define PPC_HIGHEST(v) (((v) >> 24 >> 24) & 0xffff)
84 /* #highesta(value) denotes bits 48 through 63 of the indicated value,
85 compensating for #lo being treated as a signed number. */
86 #define PPC_HIGHESTA(v) PPC_HIGHEST ((v) + 0x8000)
88 #define SEX16(val) (((val) ^ 0x8000) - 0x8000)
90 /* For the time being on ppc64, don't report overflow on @h and @ha
91 applied to constants. */
92 #define REPORT_OVERFLOW_HI 0
94 static bfd_boolean reg_names_p = TARGET_REG_NAMES_P;
96 static void ppc_macro (char *, const struct powerpc_macro *);
97 static void ppc_byte (int);
99 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
100 static void ppc_tc (int);
101 static void ppc_machine (int);
105 static void ppc_comm (int);
106 static void ppc_bb (int);
107 static void ppc_bc (int);
108 static void ppc_bf (int);
109 static void ppc_biei (int);
110 static void ppc_bs (int);
111 static void ppc_eb (int);
112 static void ppc_ec (int);
113 static void ppc_ef (int);
114 static void ppc_es (int);
115 static void ppc_csect (int);
116 static void ppc_dwsect (int);
117 static void ppc_change_csect (symbolS *, offsetT);
118 static void ppc_function (int);
119 static void ppc_extern (int);
120 static void ppc_lglobl (int);
121 static void ppc_ref (int);
122 static void ppc_section (int);
123 static void ppc_named_section (int);
124 static void ppc_stabx (int);
125 static void ppc_rename (int);
126 static void ppc_toc (int);
127 static void ppc_xcoff_cons (int);
128 static void ppc_vbyte (int);
132 static void ppc_elf_rdata (int);
133 static void ppc_elf_lcomm (int);
134 static void ppc_elf_localentry (int);
135 static void ppc_elf_abiversion (int);
136 static void ppc_elf_gnu_attribute (int);
140 static void ppc_previous (int);
141 static void ppc_pdata (int);
142 static void ppc_ydata (int);
143 static void ppc_reldata (int);
144 static void ppc_rdata (int);
145 static void ppc_ualong (int);
146 static void ppc_znop (int);
147 static void ppc_pe_comm (int);
148 static void ppc_pe_section (int);
149 static void ppc_pe_function (int);
150 static void ppc_pe_tocd (int);
153 /* Generic assembler global variables which must be defined by all
157 /* This string holds the chars that always start a comment. If the
158 pre-processor is disabled, these aren't very useful. The macro
159 tc_comment_chars points to this. We use this, rather than the
160 usual comment_chars, so that we can switch for Solaris conventions. */
161 static const char ppc_solaris_comment_chars[] = "#!";
162 static const char ppc_eabi_comment_chars[] = "#";
164 #ifdef TARGET_SOLARIS_COMMENT
165 const char *ppc_comment_chars = ppc_solaris_comment_chars;
167 const char *ppc_comment_chars = ppc_eabi_comment_chars;
170 const char comment_chars[] = "#";
173 /* Characters which start a comment at the beginning of a line. */
174 const char line_comment_chars[] = "#";
176 /* Characters which may be used to separate multiple commands on a
178 const char line_separator_chars[] = ";";
180 /* Characters which are used to indicate an exponent in a floating
182 const char EXP_CHARS[] = "eE";
184 /* Characters which mean that a number is a floating point constant,
186 const char FLT_CHARS[] = "dD";
188 /* Anything that can start an operand needs to be mentioned here,
189 to stop the input scrubber eating whitespace. */
190 const char ppc_symbol_chars[] = "%[";
192 /* The dwarf2 data alignment, adjusted for 32 or 64 bit. */
193 int ppc_cie_data_alignment;
195 /* The dwarf2 minimum instruction length. */
196 int ppc_dwarf2_line_min_insn_length;
198 /* More than this number of nops in an alignment op gets a branch
200 unsigned long nop_limit = 4;
202 /* The type of processor we are assembling for. This is one or more
203 of the PPC_OPCODE flags defined in opcode/ppc.h. */
204 ppc_cpu_t ppc_cpu = 0;
205 ppc_cpu_t sticky = 0;
207 /* Value for ELF e_flags EF_PPC64_ABI. */
208 unsigned int ppc_abiversion = 0;
211 /* Flags set on encountering toc relocs. */
213 has_large_toc_reloc = 1,
214 has_small_toc_reloc = 2
218 /* Warn on emitting data to code sections. */
224 /* The target specific pseudo-ops which we support. */
226 const pseudo_typeS md_pseudo_table[] =
228 /* Pseudo-ops which must be overridden. */
229 { "byte", ppc_byte, 0 },
232 /* Pseudo-ops specific to the RS/6000 XCOFF format. Some of these
233 legitimately belong in the obj-*.c file. However, XCOFF is based
234 on COFF, and is only implemented for the RS/6000. We just use
235 obj-coff.c, and add what we need here. */
236 { "comm", ppc_comm, 0 },
237 { "lcomm", ppc_comm, 1 },
241 { "bi", ppc_biei, 0 },
243 { "csect", ppc_csect, 0 },
244 { "dwsect", ppc_dwsect, 0 },
245 { "data", ppc_section, 'd' },
249 { "ei", ppc_biei, 1 },
251 { "extern", ppc_extern, 0 },
252 { "function", ppc_function, 0 },
253 { "lglobl", ppc_lglobl, 0 },
254 { "ref", ppc_ref, 0 },
255 { "rename", ppc_rename, 0 },
256 { "section", ppc_named_section, 0 },
257 { "stabx", ppc_stabx, 0 },
258 { "text", ppc_section, 't' },
259 { "toc", ppc_toc, 0 },
260 { "long", ppc_xcoff_cons, 2 },
261 { "llong", ppc_xcoff_cons, 3 },
262 { "word", ppc_xcoff_cons, 1 },
263 { "short", ppc_xcoff_cons, 1 },
264 { "vbyte", ppc_vbyte, 0 },
268 { "llong", cons, 8 },
269 { "rdata", ppc_elf_rdata, 0 },
270 { "rodata", ppc_elf_rdata, 0 },
271 { "lcomm", ppc_elf_lcomm, 0 },
272 { "localentry", ppc_elf_localentry, 0 },
273 { "abiversion", ppc_elf_abiversion, 0 },
274 { "gnu_attribute", ppc_elf_gnu_attribute, 0},
278 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
279 { "previous", ppc_previous, 0 },
280 { "pdata", ppc_pdata, 0 },
281 { "ydata", ppc_ydata, 0 },
282 { "reldata", ppc_reldata, 0 },
283 { "rdata", ppc_rdata, 0 },
284 { "ualong", ppc_ualong, 0 },
285 { "znop", ppc_znop, 0 },
286 { "comm", ppc_pe_comm, 0 },
287 { "lcomm", ppc_pe_comm, 1 },
288 { "section", ppc_pe_section, 0 },
289 { "function", ppc_pe_function,0 },
290 { "tocd", ppc_pe_tocd, 0 },
293 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
295 { "machine", ppc_machine, 0 },
302 /* Predefined register names if -mregnames (or default for Windows NT).
303 In general, there are lots of them, in an attempt to be compatible
304 with a number of other Windows NT assemblers. */
306 /* Structure to hold information about predefined registers. */
310 unsigned short value;
311 unsigned short flags;
314 /* List of registers that are pre-defined:
316 Each general register has predefined names of the form:
317 1. r<reg_num> which has the value <reg_num>.
318 2. r.<reg_num> which has the value <reg_num>.
320 Each floating point register has predefined names of the form:
321 1. f<reg_num> which has the value <reg_num>.
322 2. f.<reg_num> which has the value <reg_num>.
324 Each vector unit register has predefined names of the form:
325 1. v<reg_num> which has the value <reg_num>.
326 2. v.<reg_num> which has the value <reg_num>.
328 Each condition register has predefined names of the form:
329 1. cr<reg_num> which has the value <reg_num>.
330 2. cr.<reg_num> which has the value <reg_num>.
332 There are individual registers as well:
333 sp or r.sp has the value 1
334 rtoc or r.toc has the value 2
339 dsisr has the value 18
341 sdr1 has the value 25
342 srr0 has the value 26
343 srr1 has the value 27
345 The table is sorted. Suitable for searching by a binary search. */
347 static const struct pd_reg pre_defined_registers[] =
349 /* Condition Registers */
350 { "cr.0", 0, PPC_OPERAND_CR_REG },
351 { "cr.1", 1, PPC_OPERAND_CR_REG },
352 { "cr.2", 2, PPC_OPERAND_CR_REG },
353 { "cr.3", 3, PPC_OPERAND_CR_REG },
354 { "cr.4", 4, PPC_OPERAND_CR_REG },
355 { "cr.5", 5, PPC_OPERAND_CR_REG },
356 { "cr.6", 6, PPC_OPERAND_CR_REG },
357 { "cr.7", 7, PPC_OPERAND_CR_REG },
359 { "cr0", 0, PPC_OPERAND_CR_REG },
360 { "cr1", 1, PPC_OPERAND_CR_REG },
361 { "cr2", 2, PPC_OPERAND_CR_REG },
362 { "cr3", 3, PPC_OPERAND_CR_REG },
363 { "cr4", 4, PPC_OPERAND_CR_REG },
364 { "cr5", 5, PPC_OPERAND_CR_REG },
365 { "cr6", 6, PPC_OPERAND_CR_REG },
366 { "cr7", 7, PPC_OPERAND_CR_REG },
368 { "ctr", 9, PPC_OPERAND_SPR },
369 { "dar", 19, PPC_OPERAND_SPR },
370 { "dec", 22, PPC_OPERAND_SPR },
371 { "dsisr", 18, PPC_OPERAND_SPR },
373 /* Floating point registers */
374 { "f.0", 0, PPC_OPERAND_FPR },
375 { "f.1", 1, PPC_OPERAND_FPR },
376 { "f.10", 10, PPC_OPERAND_FPR },
377 { "f.11", 11, PPC_OPERAND_FPR },
378 { "f.12", 12, PPC_OPERAND_FPR },
379 { "f.13", 13, PPC_OPERAND_FPR },
380 { "f.14", 14, PPC_OPERAND_FPR },
381 { "f.15", 15, PPC_OPERAND_FPR },
382 { "f.16", 16, PPC_OPERAND_FPR },
383 { "f.17", 17, PPC_OPERAND_FPR },
384 { "f.18", 18, PPC_OPERAND_FPR },
385 { "f.19", 19, PPC_OPERAND_FPR },
386 { "f.2", 2, PPC_OPERAND_FPR },
387 { "f.20", 20, PPC_OPERAND_FPR },
388 { "f.21", 21, PPC_OPERAND_FPR },
389 { "f.22", 22, PPC_OPERAND_FPR },
390 { "f.23", 23, PPC_OPERAND_FPR },
391 { "f.24", 24, PPC_OPERAND_FPR },
392 { "f.25", 25, PPC_OPERAND_FPR },
393 { "f.26", 26, PPC_OPERAND_FPR },
394 { "f.27", 27, PPC_OPERAND_FPR },
395 { "f.28", 28, PPC_OPERAND_FPR },
396 { "f.29", 29, PPC_OPERAND_FPR },
397 { "f.3", 3, PPC_OPERAND_FPR },
398 { "f.30", 30, PPC_OPERAND_FPR },
399 { "f.31", 31, PPC_OPERAND_FPR },
400 { "f.32", 32, PPC_OPERAND_VSR },
401 { "f.33", 33, PPC_OPERAND_VSR },
402 { "f.34", 34, PPC_OPERAND_VSR },
403 { "f.35", 35, PPC_OPERAND_VSR },
404 { "f.36", 36, PPC_OPERAND_VSR },
405 { "f.37", 37, PPC_OPERAND_VSR },
406 { "f.38", 38, PPC_OPERAND_VSR },
407 { "f.39", 39, PPC_OPERAND_VSR },
408 { "f.4", 4, PPC_OPERAND_FPR },
409 { "f.40", 40, PPC_OPERAND_VSR },
410 { "f.41", 41, PPC_OPERAND_VSR },
411 { "f.42", 42, PPC_OPERAND_VSR },
412 { "f.43", 43, PPC_OPERAND_VSR },
413 { "f.44", 44, PPC_OPERAND_VSR },
414 { "f.45", 45, PPC_OPERAND_VSR },
415 { "f.46", 46, PPC_OPERAND_VSR },
416 { "f.47", 47, PPC_OPERAND_VSR },
417 { "f.48", 48, PPC_OPERAND_VSR },
418 { "f.49", 49, PPC_OPERAND_VSR },
419 { "f.5", 5, PPC_OPERAND_FPR },
420 { "f.50", 50, PPC_OPERAND_VSR },
421 { "f.51", 51, PPC_OPERAND_VSR },
422 { "f.52", 52, PPC_OPERAND_VSR },
423 { "f.53", 53, PPC_OPERAND_VSR },
424 { "f.54", 54, PPC_OPERAND_VSR },
425 { "f.55", 55, PPC_OPERAND_VSR },
426 { "f.56", 56, PPC_OPERAND_VSR },
427 { "f.57", 57, PPC_OPERAND_VSR },
428 { "f.58", 58, PPC_OPERAND_VSR },
429 { "f.59", 59, PPC_OPERAND_VSR },
430 { "f.6", 6, PPC_OPERAND_FPR },
431 { "f.60", 60, PPC_OPERAND_VSR },
432 { "f.61", 61, PPC_OPERAND_VSR },
433 { "f.62", 62, PPC_OPERAND_VSR },
434 { "f.63", 63, PPC_OPERAND_VSR },
435 { "f.7", 7, PPC_OPERAND_FPR },
436 { "f.8", 8, PPC_OPERAND_FPR },
437 { "f.9", 9, PPC_OPERAND_FPR },
439 { "f0", 0, PPC_OPERAND_FPR },
440 { "f1", 1, PPC_OPERAND_FPR },
441 { "f10", 10, PPC_OPERAND_FPR },
442 { "f11", 11, PPC_OPERAND_FPR },
443 { "f12", 12, PPC_OPERAND_FPR },
444 { "f13", 13, PPC_OPERAND_FPR },
445 { "f14", 14, PPC_OPERAND_FPR },
446 { "f15", 15, PPC_OPERAND_FPR },
447 { "f16", 16, PPC_OPERAND_FPR },
448 { "f17", 17, PPC_OPERAND_FPR },
449 { "f18", 18, PPC_OPERAND_FPR },
450 { "f19", 19, PPC_OPERAND_FPR },
451 { "f2", 2, PPC_OPERAND_FPR },
452 { "f20", 20, PPC_OPERAND_FPR },
453 { "f21", 21, PPC_OPERAND_FPR },
454 { "f22", 22, PPC_OPERAND_FPR },
455 { "f23", 23, PPC_OPERAND_FPR },
456 { "f24", 24, PPC_OPERAND_FPR },
457 { "f25", 25, PPC_OPERAND_FPR },
458 { "f26", 26, PPC_OPERAND_FPR },
459 { "f27", 27, PPC_OPERAND_FPR },
460 { "f28", 28, PPC_OPERAND_FPR },
461 { "f29", 29, PPC_OPERAND_FPR },
462 { "f3", 3, PPC_OPERAND_FPR },
463 { "f30", 30, PPC_OPERAND_FPR },
464 { "f31", 31, PPC_OPERAND_FPR },
465 { "f32", 32, PPC_OPERAND_VSR },
466 { "f33", 33, PPC_OPERAND_VSR },
467 { "f34", 34, PPC_OPERAND_VSR },
468 { "f35", 35, PPC_OPERAND_VSR },
469 { "f36", 36, PPC_OPERAND_VSR },
470 { "f37", 37, PPC_OPERAND_VSR },
471 { "f38", 38, PPC_OPERAND_VSR },
472 { "f39", 39, PPC_OPERAND_VSR },
473 { "f4", 4, PPC_OPERAND_FPR },
474 { "f40", 40, PPC_OPERAND_VSR },
475 { "f41", 41, PPC_OPERAND_VSR },
476 { "f42", 42, PPC_OPERAND_VSR },
477 { "f43", 43, PPC_OPERAND_VSR },
478 { "f44", 44, PPC_OPERAND_VSR },
479 { "f45", 45, PPC_OPERAND_VSR },
480 { "f46", 46, PPC_OPERAND_VSR },
481 { "f47", 47, PPC_OPERAND_VSR },
482 { "f48", 48, PPC_OPERAND_VSR },
483 { "f49", 49, PPC_OPERAND_VSR },
484 { "f5", 5, PPC_OPERAND_FPR },
485 { "f50", 50, PPC_OPERAND_VSR },
486 { "f51", 51, PPC_OPERAND_VSR },
487 { "f52", 52, PPC_OPERAND_VSR },
488 { "f53", 53, PPC_OPERAND_VSR },
489 { "f54", 54, PPC_OPERAND_VSR },
490 { "f55", 55, PPC_OPERAND_VSR },
491 { "f56", 56, PPC_OPERAND_VSR },
492 { "f57", 57, PPC_OPERAND_VSR },
493 { "f58", 58, PPC_OPERAND_VSR },
494 { "f59", 59, PPC_OPERAND_VSR },
495 { "f6", 6, PPC_OPERAND_FPR },
496 { "f60", 60, PPC_OPERAND_VSR },
497 { "f61", 61, PPC_OPERAND_VSR },
498 { "f62", 62, PPC_OPERAND_VSR },
499 { "f63", 63, PPC_OPERAND_VSR },
500 { "f7", 7, PPC_OPERAND_FPR },
501 { "f8", 8, PPC_OPERAND_FPR },
502 { "f9", 9, PPC_OPERAND_FPR },
504 /* Quantization registers used with pair single instructions. */
505 { "gqr.0", 0, PPC_OPERAND_GQR },
506 { "gqr.1", 1, PPC_OPERAND_GQR },
507 { "gqr.2", 2, PPC_OPERAND_GQR },
508 { "gqr.3", 3, PPC_OPERAND_GQR },
509 { "gqr.4", 4, PPC_OPERAND_GQR },
510 { "gqr.5", 5, PPC_OPERAND_GQR },
511 { "gqr.6", 6, PPC_OPERAND_GQR },
512 { "gqr.7", 7, PPC_OPERAND_GQR },
513 { "gqr0", 0, PPC_OPERAND_GQR },
514 { "gqr1", 1, PPC_OPERAND_GQR },
515 { "gqr2", 2, PPC_OPERAND_GQR },
516 { "gqr3", 3, PPC_OPERAND_GQR },
517 { "gqr4", 4, PPC_OPERAND_GQR },
518 { "gqr5", 5, PPC_OPERAND_GQR },
519 { "gqr6", 6, PPC_OPERAND_GQR },
520 { "gqr7", 7, PPC_OPERAND_GQR },
522 { "lr", 8, PPC_OPERAND_SPR },
524 /* General Purpose Registers */
525 { "r.0", 0, PPC_OPERAND_GPR },
526 { "r.1", 1, PPC_OPERAND_GPR },
527 { "r.10", 10, PPC_OPERAND_GPR },
528 { "r.11", 11, PPC_OPERAND_GPR },
529 { "r.12", 12, PPC_OPERAND_GPR },
530 { "r.13", 13, PPC_OPERAND_GPR },
531 { "r.14", 14, PPC_OPERAND_GPR },
532 { "r.15", 15, PPC_OPERAND_GPR },
533 { "r.16", 16, PPC_OPERAND_GPR },
534 { "r.17", 17, PPC_OPERAND_GPR },
535 { "r.18", 18, PPC_OPERAND_GPR },
536 { "r.19", 19, PPC_OPERAND_GPR },
537 { "r.2", 2, PPC_OPERAND_GPR },
538 { "r.20", 20, PPC_OPERAND_GPR },
539 { "r.21", 21, PPC_OPERAND_GPR },
540 { "r.22", 22, PPC_OPERAND_GPR },
541 { "r.23", 23, PPC_OPERAND_GPR },
542 { "r.24", 24, PPC_OPERAND_GPR },
543 { "r.25", 25, PPC_OPERAND_GPR },
544 { "r.26", 26, PPC_OPERAND_GPR },
545 { "r.27", 27, PPC_OPERAND_GPR },
546 { "r.28", 28, PPC_OPERAND_GPR },
547 { "r.29", 29, PPC_OPERAND_GPR },
548 { "r.3", 3, PPC_OPERAND_GPR },
549 { "r.30", 30, PPC_OPERAND_GPR },
550 { "r.31", 31, PPC_OPERAND_GPR },
551 { "r.4", 4, PPC_OPERAND_GPR },
552 { "r.5", 5, PPC_OPERAND_GPR },
553 { "r.6", 6, PPC_OPERAND_GPR },
554 { "r.7", 7, PPC_OPERAND_GPR },
555 { "r.8", 8, PPC_OPERAND_GPR },
556 { "r.9", 9, PPC_OPERAND_GPR },
558 { "r.sp", 1, PPC_OPERAND_GPR },
560 { "r.toc", 2, PPC_OPERAND_GPR },
562 { "r0", 0, PPC_OPERAND_GPR },
563 { "r1", 1, PPC_OPERAND_GPR },
564 { "r10", 10, PPC_OPERAND_GPR },
565 { "r11", 11, PPC_OPERAND_GPR },
566 { "r12", 12, PPC_OPERAND_GPR },
567 { "r13", 13, PPC_OPERAND_GPR },
568 { "r14", 14, PPC_OPERAND_GPR },
569 { "r15", 15, PPC_OPERAND_GPR },
570 { "r16", 16, PPC_OPERAND_GPR },
571 { "r17", 17, PPC_OPERAND_GPR },
572 { "r18", 18, PPC_OPERAND_GPR },
573 { "r19", 19, PPC_OPERAND_GPR },
574 { "r2", 2, PPC_OPERAND_GPR },
575 { "r20", 20, PPC_OPERAND_GPR },
576 { "r21", 21, PPC_OPERAND_GPR },
577 { "r22", 22, PPC_OPERAND_GPR },
578 { "r23", 23, PPC_OPERAND_GPR },
579 { "r24", 24, PPC_OPERAND_GPR },
580 { "r25", 25, PPC_OPERAND_GPR },
581 { "r26", 26, PPC_OPERAND_GPR },
582 { "r27", 27, PPC_OPERAND_GPR },
583 { "r28", 28, PPC_OPERAND_GPR },
584 { "r29", 29, PPC_OPERAND_GPR },
585 { "r3", 3, PPC_OPERAND_GPR },
586 { "r30", 30, PPC_OPERAND_GPR },
587 { "r31", 31, PPC_OPERAND_GPR },
588 { "r4", 4, PPC_OPERAND_GPR },
589 { "r5", 5, PPC_OPERAND_GPR },
590 { "r6", 6, PPC_OPERAND_GPR },
591 { "r7", 7, PPC_OPERAND_GPR },
592 { "r8", 8, PPC_OPERAND_GPR },
593 { "r9", 9, PPC_OPERAND_GPR },
595 { "rtoc", 2, PPC_OPERAND_GPR },
597 { "sdr1", 25, PPC_OPERAND_SPR },
599 { "sp", 1, PPC_OPERAND_GPR },
601 { "srr0", 26, PPC_OPERAND_SPR },
602 { "srr1", 27, PPC_OPERAND_SPR },
604 /* Vector (Altivec/VMX) registers */
605 { "v.0", 0, PPC_OPERAND_VR },
606 { "v.1", 1, PPC_OPERAND_VR },
607 { "v.10", 10, PPC_OPERAND_VR },
608 { "v.11", 11, PPC_OPERAND_VR },
609 { "v.12", 12, PPC_OPERAND_VR },
610 { "v.13", 13, PPC_OPERAND_VR },
611 { "v.14", 14, PPC_OPERAND_VR },
612 { "v.15", 15, PPC_OPERAND_VR },
613 { "v.16", 16, PPC_OPERAND_VR },
614 { "v.17", 17, PPC_OPERAND_VR },
615 { "v.18", 18, PPC_OPERAND_VR },
616 { "v.19", 19, PPC_OPERAND_VR },
617 { "v.2", 2, PPC_OPERAND_VR },
618 { "v.20", 20, PPC_OPERAND_VR },
619 { "v.21", 21, PPC_OPERAND_VR },
620 { "v.22", 22, PPC_OPERAND_VR },
621 { "v.23", 23, PPC_OPERAND_VR },
622 { "v.24", 24, PPC_OPERAND_VR },
623 { "v.25", 25, PPC_OPERAND_VR },
624 { "v.26", 26, PPC_OPERAND_VR },
625 { "v.27", 27, PPC_OPERAND_VR },
626 { "v.28", 28, PPC_OPERAND_VR },
627 { "v.29", 29, PPC_OPERAND_VR },
628 { "v.3", 3, PPC_OPERAND_VR },
629 { "v.30", 30, PPC_OPERAND_VR },
630 { "v.31", 31, PPC_OPERAND_VR },
631 { "v.4", 4, PPC_OPERAND_VR },
632 { "v.5", 5, PPC_OPERAND_VR },
633 { "v.6", 6, PPC_OPERAND_VR },
634 { "v.7", 7, PPC_OPERAND_VR },
635 { "v.8", 8, PPC_OPERAND_VR },
636 { "v.9", 9, PPC_OPERAND_VR },
638 { "v0", 0, PPC_OPERAND_VR },
639 { "v1", 1, PPC_OPERAND_VR },
640 { "v10", 10, PPC_OPERAND_VR },
641 { "v11", 11, PPC_OPERAND_VR },
642 { "v12", 12, PPC_OPERAND_VR },
643 { "v13", 13, PPC_OPERAND_VR },
644 { "v14", 14, PPC_OPERAND_VR },
645 { "v15", 15, PPC_OPERAND_VR },
646 { "v16", 16, PPC_OPERAND_VR },
647 { "v17", 17, PPC_OPERAND_VR },
648 { "v18", 18, PPC_OPERAND_VR },
649 { "v19", 19, PPC_OPERAND_VR },
650 { "v2", 2, PPC_OPERAND_VR },
651 { "v20", 20, PPC_OPERAND_VR },
652 { "v21", 21, PPC_OPERAND_VR },
653 { "v22", 22, PPC_OPERAND_VR },
654 { "v23", 23, PPC_OPERAND_VR },
655 { "v24", 24, PPC_OPERAND_VR },
656 { "v25", 25, PPC_OPERAND_VR },
657 { "v26", 26, PPC_OPERAND_VR },
658 { "v27", 27, PPC_OPERAND_VR },
659 { "v28", 28, PPC_OPERAND_VR },
660 { "v29", 29, PPC_OPERAND_VR },
661 { "v3", 3, PPC_OPERAND_VR },
662 { "v30", 30, PPC_OPERAND_VR },
663 { "v31", 31, PPC_OPERAND_VR },
664 { "v4", 4, PPC_OPERAND_VR },
665 { "v5", 5, PPC_OPERAND_VR },
666 { "v6", 6, PPC_OPERAND_VR },
667 { "v7", 7, PPC_OPERAND_VR },
668 { "v8", 8, PPC_OPERAND_VR },
669 { "v9", 9, PPC_OPERAND_VR },
671 /* Vector Scalar (VSX) registers (ISA 2.06). */
672 { "vs.0", 0, PPC_OPERAND_VSR },
673 { "vs.1", 1, PPC_OPERAND_VSR },
674 { "vs.10", 10, PPC_OPERAND_VSR },
675 { "vs.11", 11, PPC_OPERAND_VSR },
676 { "vs.12", 12, PPC_OPERAND_VSR },
677 { "vs.13", 13, PPC_OPERAND_VSR },
678 { "vs.14", 14, PPC_OPERAND_VSR },
679 { "vs.15", 15, PPC_OPERAND_VSR },
680 { "vs.16", 16, PPC_OPERAND_VSR },
681 { "vs.17", 17, PPC_OPERAND_VSR },
682 { "vs.18", 18, PPC_OPERAND_VSR },
683 { "vs.19", 19, PPC_OPERAND_VSR },
684 { "vs.2", 2, PPC_OPERAND_VSR },
685 { "vs.20", 20, PPC_OPERAND_VSR },
686 { "vs.21", 21, PPC_OPERAND_VSR },
687 { "vs.22", 22, PPC_OPERAND_VSR },
688 { "vs.23", 23, PPC_OPERAND_VSR },
689 { "vs.24", 24, PPC_OPERAND_VSR },
690 { "vs.25", 25, PPC_OPERAND_VSR },
691 { "vs.26", 26, PPC_OPERAND_VSR },
692 { "vs.27", 27, PPC_OPERAND_VSR },
693 { "vs.28", 28, PPC_OPERAND_VSR },
694 { "vs.29", 29, PPC_OPERAND_VSR },
695 { "vs.3", 3, PPC_OPERAND_VSR },
696 { "vs.30", 30, PPC_OPERAND_VSR },
697 { "vs.31", 31, PPC_OPERAND_VSR },
698 { "vs.32", 32, PPC_OPERAND_VSR },
699 { "vs.33", 33, PPC_OPERAND_VSR },
700 { "vs.34", 34, PPC_OPERAND_VSR },
701 { "vs.35", 35, PPC_OPERAND_VSR },
702 { "vs.36", 36, PPC_OPERAND_VSR },
703 { "vs.37", 37, PPC_OPERAND_VSR },
704 { "vs.38", 38, PPC_OPERAND_VSR },
705 { "vs.39", 39, PPC_OPERAND_VSR },
706 { "vs.4", 4, PPC_OPERAND_VSR },
707 { "vs.40", 40, PPC_OPERAND_VSR },
708 { "vs.41", 41, PPC_OPERAND_VSR },
709 { "vs.42", 42, PPC_OPERAND_VSR },
710 { "vs.43", 43, PPC_OPERAND_VSR },
711 { "vs.44", 44, PPC_OPERAND_VSR },
712 { "vs.45", 45, PPC_OPERAND_VSR },
713 { "vs.46", 46, PPC_OPERAND_VSR },
714 { "vs.47", 47, PPC_OPERAND_VSR },
715 { "vs.48", 48, PPC_OPERAND_VSR },
716 { "vs.49", 49, PPC_OPERAND_VSR },
717 { "vs.5", 5, PPC_OPERAND_VSR },
718 { "vs.50", 50, PPC_OPERAND_VSR },
719 { "vs.51", 51, PPC_OPERAND_VSR },
720 { "vs.52", 52, PPC_OPERAND_VSR },
721 { "vs.53", 53, PPC_OPERAND_VSR },
722 { "vs.54", 54, PPC_OPERAND_VSR },
723 { "vs.55", 55, PPC_OPERAND_VSR },
724 { "vs.56", 56, PPC_OPERAND_VSR },
725 { "vs.57", 57, PPC_OPERAND_VSR },
726 { "vs.58", 58, PPC_OPERAND_VSR },
727 { "vs.59", 59, PPC_OPERAND_VSR },
728 { "vs.6", 6, PPC_OPERAND_VSR },
729 { "vs.60", 60, PPC_OPERAND_VSR },
730 { "vs.61", 61, PPC_OPERAND_VSR },
731 { "vs.62", 62, PPC_OPERAND_VSR },
732 { "vs.63", 63, PPC_OPERAND_VSR },
733 { "vs.7", 7, PPC_OPERAND_VSR },
734 { "vs.8", 8, PPC_OPERAND_VSR },
735 { "vs.9", 9, PPC_OPERAND_VSR },
737 { "vs0", 0, PPC_OPERAND_VSR },
738 { "vs1", 1, PPC_OPERAND_VSR },
739 { "vs10", 10, PPC_OPERAND_VSR },
740 { "vs11", 11, PPC_OPERAND_VSR },
741 { "vs12", 12, PPC_OPERAND_VSR },
742 { "vs13", 13, PPC_OPERAND_VSR },
743 { "vs14", 14, PPC_OPERAND_VSR },
744 { "vs15", 15, PPC_OPERAND_VSR },
745 { "vs16", 16, PPC_OPERAND_VSR },
746 { "vs17", 17, PPC_OPERAND_VSR },
747 { "vs18", 18, PPC_OPERAND_VSR },
748 { "vs19", 19, PPC_OPERAND_VSR },
749 { "vs2", 2, PPC_OPERAND_VSR },
750 { "vs20", 20, PPC_OPERAND_VSR },
751 { "vs21", 21, PPC_OPERAND_VSR },
752 { "vs22", 22, PPC_OPERAND_VSR },
753 { "vs23", 23, PPC_OPERAND_VSR },
754 { "vs24", 24, PPC_OPERAND_VSR },
755 { "vs25", 25, PPC_OPERAND_VSR },
756 { "vs26", 26, PPC_OPERAND_VSR },
757 { "vs27", 27, PPC_OPERAND_VSR },
758 { "vs28", 28, PPC_OPERAND_VSR },
759 { "vs29", 29, PPC_OPERAND_VSR },
760 { "vs3", 3, PPC_OPERAND_VSR },
761 { "vs30", 30, PPC_OPERAND_VSR },
762 { "vs31", 31, PPC_OPERAND_VSR },
763 { "vs32", 32, PPC_OPERAND_VSR },
764 { "vs33", 33, PPC_OPERAND_VSR },
765 { "vs34", 34, PPC_OPERAND_VSR },
766 { "vs35", 35, PPC_OPERAND_VSR },
767 { "vs36", 36, PPC_OPERAND_VSR },
768 { "vs37", 37, PPC_OPERAND_VSR },
769 { "vs38", 38, PPC_OPERAND_VSR },
770 { "vs39", 39, PPC_OPERAND_VSR },
771 { "vs4", 4, PPC_OPERAND_VSR },
772 { "vs40", 40, PPC_OPERAND_VSR },
773 { "vs41", 41, PPC_OPERAND_VSR },
774 { "vs42", 42, PPC_OPERAND_VSR },
775 { "vs43", 43, PPC_OPERAND_VSR },
776 { "vs44", 44, PPC_OPERAND_VSR },
777 { "vs45", 45, PPC_OPERAND_VSR },
778 { "vs46", 46, PPC_OPERAND_VSR },
779 { "vs47", 47, PPC_OPERAND_VSR },
780 { "vs48", 48, PPC_OPERAND_VSR },
781 { "vs49", 49, PPC_OPERAND_VSR },
782 { "vs5", 5, PPC_OPERAND_VSR },
783 { "vs50", 50, PPC_OPERAND_VSR },
784 { "vs51", 51, PPC_OPERAND_VSR },
785 { "vs52", 52, PPC_OPERAND_VSR },
786 { "vs53", 53, PPC_OPERAND_VSR },
787 { "vs54", 54, PPC_OPERAND_VSR },
788 { "vs55", 55, PPC_OPERAND_VSR },
789 { "vs56", 56, PPC_OPERAND_VSR },
790 { "vs57", 57, PPC_OPERAND_VSR },
791 { "vs58", 58, PPC_OPERAND_VSR },
792 { "vs59", 59, PPC_OPERAND_VSR },
793 { "vs6", 6, PPC_OPERAND_VSR },
794 { "vs60", 60, PPC_OPERAND_VSR },
795 { "vs61", 61, PPC_OPERAND_VSR },
796 { "vs62", 62, PPC_OPERAND_VSR },
797 { "vs63", 63, PPC_OPERAND_VSR },
798 { "vs7", 7, PPC_OPERAND_VSR },
799 { "vs8", 8, PPC_OPERAND_VSR },
800 { "vs9", 9, PPC_OPERAND_VSR },
802 { "xer", 1, PPC_OPERAND_SPR }
805 #define REG_NAME_CNT (sizeof (pre_defined_registers) / sizeof (struct pd_reg))
807 /* Given NAME, find the register number associated with that name, return
808 the integer value associated with the given name or -1 on failure. */
810 static const struct pd_reg *
811 reg_name_search (const struct pd_reg *regs, int regcount, const char *name)
813 int middle, low, high;
821 middle = (low + high) / 2;
822 cmp = strcasecmp (name, regs[middle].name);
828 return ®s[middle];
836 * Summary of register_name.
838 * in: Input_line_pointer points to 1st char of operand.
840 * out: A expressionS.
841 * The operand may have been a register: in this case, X_op == O_register,
842 * X_add_number is set to the register number, and truth is returned.
843 * Input_line_pointer->(next non-blank) char after operand, or is in its
848 register_name (expressionS *expressionP)
850 const struct pd_reg *reg;
855 /* Find the spelling of the operand. */
856 start = name = input_line_pointer;
857 if (name[0] == '%' && ISALPHA (name[1]))
858 name = ++input_line_pointer;
860 else if (!reg_names_p || !ISALPHA (name[0]))
863 c = get_symbol_name (&name);
864 reg = reg_name_search (pre_defined_registers, REG_NAME_CNT, name);
866 /* Put back the delimiting char. */
867 *input_line_pointer = c;
869 /* Look to see if it's in the register table. */
872 expressionP->X_op = O_register;
873 expressionP->X_add_number = reg->value;
874 expressionP->X_md = reg->flags;
876 /* Make the rest nice. */
877 expressionP->X_add_symbol = NULL;
878 expressionP->X_op_symbol = NULL;
882 /* Reset the line as if we had not done anything. */
883 input_line_pointer = start;
887 /* This function is called for each symbol seen in an expression. It
888 handles the special parsing which PowerPC assemblers are supposed
889 to use for condition codes. */
891 /* Whether to do the special parsing. */
892 static bfd_boolean cr_operand;
894 /* Names to recognize in a condition code. This table is sorted. */
895 static const struct pd_reg cr_names[] =
897 { "cr0", 0, PPC_OPERAND_CR_REG },
898 { "cr1", 1, PPC_OPERAND_CR_REG },
899 { "cr2", 2, PPC_OPERAND_CR_REG },
900 { "cr3", 3, PPC_OPERAND_CR_REG },
901 { "cr4", 4, PPC_OPERAND_CR_REG },
902 { "cr5", 5, PPC_OPERAND_CR_REG },
903 { "cr6", 6, PPC_OPERAND_CR_REG },
904 { "cr7", 7, PPC_OPERAND_CR_REG },
905 { "eq", 2, PPC_OPERAND_CR_BIT },
906 { "gt", 1, PPC_OPERAND_CR_BIT },
907 { "lt", 0, PPC_OPERAND_CR_BIT },
908 { "so", 3, PPC_OPERAND_CR_BIT },
909 { "un", 3, PPC_OPERAND_CR_BIT }
912 /* Parsing function. This returns non-zero if it recognized an
916 ppc_parse_name (const char *name, expressionS *exp)
918 const struct pd_reg *reg;
925 reg = reg_name_search (cr_names, sizeof cr_names / sizeof cr_names[0],
930 exp->X_op = O_register;
931 exp->X_add_number = reg->value;
932 exp->X_md = reg->flags;
937 /* Propagate X_md and check register expressions. This is to support
938 condition codes like 4*cr5+eq. */
941 ppc_optimize_expr (expressionS *left, operatorT op, expressionS *right)
943 /* Accept 4*cr<n> and cr<n>*4. */
945 && ((right->X_op == O_register
946 && right->X_md == PPC_OPERAND_CR_REG
947 && left->X_op == O_constant
948 && left->X_add_number == 4)
949 || (left->X_op == O_register
950 && left->X_md == PPC_OPERAND_CR_REG
951 && right->X_op == O_constant
952 && right->X_add_number == 4)))
954 left->X_op = O_register;
955 left->X_md = PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT;
956 left->X_add_number *= right->X_add_number;
960 /* Accept the above plus <cr bit>, and <cr bit> plus the above. */
961 if (right->X_op == O_register
962 && left->X_op == O_register
964 && ((right->X_md == PPC_OPERAND_CR_BIT
965 && left->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT))
966 || (right->X_md == (PPC_OPERAND_CR_REG | PPC_OPERAND_CR_BIT)
967 && left->X_md == PPC_OPERAND_CR_BIT)))
969 left->X_md = PPC_OPERAND_CR_BIT;
970 right->X_op = O_constant;
974 /* Accept reg +/- constant. */
975 if (left->X_op == O_register
976 && !((op == O_add || op == O_subtract) && right->X_op == O_constant))
977 as_warn (_("invalid register expression"));
979 /* Accept constant + reg. */
980 if (right->X_op == O_register)
982 if (op == O_add && left->X_op == O_constant)
983 left->X_md = right->X_md;
985 as_warn (_("invalid register expression"));
991 /* Local variables. */
993 /* Whether to target xcoff64/elf64. */
994 static unsigned int ppc_obj64 = BFD_DEFAULT_TARGET_SIZE == 64;
996 /* Opcode hash table. */
997 static struct hash_control *ppc_hash;
999 /* Macro hash table. */
1000 static struct hash_control *ppc_macro_hash;
1003 /* What type of shared library support to use. */
1004 static enum { SHLIB_NONE, SHLIB_PIC, SHLIB_MRELOCATABLE } shlib = SHLIB_NONE;
1006 /* Flags to set in the elf header. */
1007 static flagword ppc_flags = 0;
1009 /* Whether this is Solaris or not. */
1010 #ifdef TARGET_SOLARIS_COMMENT
1011 #define SOLARIS_P TRUE
1013 #define SOLARIS_P FALSE
1016 static bfd_boolean msolaris = SOLARIS_P;
1021 /* The RS/6000 assembler uses the .csect pseudo-op to generate code
1022 using a bunch of different sections. These assembler sections,
1023 however, are all encompassed within the .text or .data sections of
1024 the final output file. We handle this by using different
1025 subsegments within these main segments. */
1027 /* Next subsegment to allocate within the .text segment. */
1028 static subsegT ppc_text_subsegment = 2;
1030 /* Linked list of csects in the text section. */
1031 static symbolS *ppc_text_csects;
1033 /* Next subsegment to allocate within the .data segment. */
1034 static subsegT ppc_data_subsegment = 2;
1036 /* Linked list of csects in the data section. */
1037 static symbolS *ppc_data_csects;
1039 /* The current csect. */
1040 static symbolS *ppc_current_csect;
1042 /* The RS/6000 assembler uses a TOC which holds addresses of functions
1043 and variables. Symbols are put in the TOC with the .tc pseudo-op.
1044 A special relocation is used when accessing TOC entries. We handle
1045 the TOC as a subsegment within the .data segment. We set it up if
1046 we see a .toc pseudo-op, and save the csect symbol here. */
1047 static symbolS *ppc_toc_csect;
1049 /* The first frag in the TOC subsegment. */
1050 static fragS *ppc_toc_frag;
1052 /* The first frag in the first subsegment after the TOC in the .data
1053 segment. NULL if there are no subsegments after the TOC. */
1054 static fragS *ppc_after_toc_frag;
1056 /* The current static block. */
1057 static symbolS *ppc_current_block;
1059 /* The COFF debugging section; set by md_begin. This is not the
1060 .debug section, but is instead the secret BFD section which will
1061 cause BFD to set the section number of a symbol to N_DEBUG. */
1062 static asection *ppc_coff_debug_section;
1064 /* Structure to set the length field of the dwarf sections. */
1065 struct dw_subsection {
1066 /* Subsections are simply linked. */
1067 struct dw_subsection *link;
1069 /* The subsection number. */
1072 /* Expression to compute the length of the section. */
1073 expressionS end_exp;
1076 static struct dw_section {
1077 /* Corresponding section. */
1080 /* Simply linked list of subsections with a label. */
1081 struct dw_subsection *list_subseg;
1083 /* The anonymous subsection. */
1084 struct dw_subsection *anon_subseg;
1085 } dw_sections[XCOFF_DWSECT_NBR_NAMES];
1086 #endif /* OBJ_XCOFF */
1090 /* Various sections that we need for PE coff support. */
1091 static segT ydata_section;
1092 static segT pdata_section;
1093 static segT reldata_section;
1094 static segT rdata_section;
1095 static segT tocdata_section;
1097 /* The current section and the previous section. See ppc_previous. */
1098 static segT ppc_previous_section;
1099 static segT ppc_current_section;
1104 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE" */
1105 unsigned long *ppc_apuinfo_list;
1106 unsigned int ppc_apuinfo_num;
1107 unsigned int ppc_apuinfo_num_alloc;
1108 #endif /* OBJ_ELF */
1111 const char *const md_shortopts = "b:l:usm:K:VQ:";
1113 const char *const md_shortopts = "um:";
1115 #define OPTION_NOPS (OPTION_MD_BASE + 0)
1116 const struct option md_longopts[] = {
1117 {"nops", required_argument, NULL, OPTION_NOPS},
1118 {"ppc476-workaround", no_argument, &warn_476, 1},
1119 {"no-ppc476-workaround", no_argument, &warn_476, 0},
1120 {NULL, no_argument, NULL, 0}
1122 const size_t md_longopts_size = sizeof (md_longopts);
1125 md_parse_option (int c, const char *arg)
1132 /* -u means that any undefined symbols should be treated as
1133 external, which is the default for gas anyhow. */
1138 /* Solaris as takes -le (presumably for little endian). For completeness
1139 sake, recognize -be also. */
1140 if (strcmp (arg, "e") == 0)
1142 target_big_endian = 0;
1143 set_target_endian = 1;
1144 if (ppc_cpu & PPC_OPCODE_VLE)
1145 as_bad (_("the use of -mvle requires big endian."));
1153 if (strcmp (arg, "e") == 0)
1155 target_big_endian = 1;
1156 set_target_endian = 1;
1164 /* Recognize -K PIC. */
1165 if (strcmp (arg, "PIC") == 0 || strcmp (arg, "pic") == 0)
1168 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1176 /* a64 and a32 determine whether to use XCOFF64 or XCOFF32. */
1178 if (strcmp (arg, "64") == 0)
1182 if (ppc_cpu & PPC_OPCODE_VLE)
1183 as_bad (_("the use of -mvle requires -a32."));
1185 as_fatal (_("%s unsupported"), "-a64");
1188 else if (strcmp (arg, "32") == 0)
1195 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, arg);
1196 /* "raw" is only valid for the disassembler. */
1197 if (new_cpu != 0 && (new_cpu & PPC_OPCODE_RAW) == 0)
1200 if (strcmp (arg, "vle") == 0)
1202 if (set_target_endian && target_big_endian == 0)
1203 as_bad (_("the use of -mvle requires big endian."));
1205 as_bad (_("the use of -mvle requires -a32."));
1209 else if (strcmp (arg, "no-vle") == 0)
1211 sticky &= ~PPC_OPCODE_VLE;
1213 new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, "booke");
1214 new_cpu &= ~PPC_OPCODE_VLE;
1219 else if (strcmp (arg, "regnames") == 0)
1222 else if (strcmp (arg, "no-regnames") == 0)
1223 reg_names_p = FALSE;
1226 /* -mrelocatable/-mrelocatable-lib -- warn about initializations
1227 that require relocation. */
1228 else if (strcmp (arg, "relocatable") == 0)
1230 shlib = SHLIB_MRELOCATABLE;
1231 ppc_flags |= EF_PPC_RELOCATABLE;
1234 else if (strcmp (arg, "relocatable-lib") == 0)
1236 shlib = SHLIB_MRELOCATABLE;
1237 ppc_flags |= EF_PPC_RELOCATABLE_LIB;
1240 /* -memb, set embedded bit. */
1241 else if (strcmp (arg, "emb") == 0)
1242 ppc_flags |= EF_PPC_EMB;
1244 /* -mlittle/-mbig set the endianness. */
1245 else if (strcmp (arg, "little") == 0
1246 || strcmp (arg, "little-endian") == 0)
1248 target_big_endian = 0;
1249 set_target_endian = 1;
1250 if (ppc_cpu & PPC_OPCODE_VLE)
1251 as_bad (_("the use of -mvle requires big endian."));
1254 else if (strcmp (arg, "big") == 0 || strcmp (arg, "big-endian") == 0)
1256 target_big_endian = 1;
1257 set_target_endian = 1;
1260 else if (strcmp (arg, "solaris") == 0)
1263 ppc_comment_chars = ppc_solaris_comment_chars;
1266 else if (strcmp (arg, "no-solaris") == 0)
1269 ppc_comment_chars = ppc_eabi_comment_chars;
1271 else if (strcmp (arg, "spe2") == 0)
1273 ppc_cpu |= PPC_OPCODE_SPE2;
1278 as_bad (_("invalid switch -m%s"), arg);
1284 /* -V: SVR4 argument to print version ID. */
1286 print_version_id ();
1289 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
1290 should be emitted or not. FIXME: Not implemented. */
1294 /* Solaris takes -s to specify that .stabs go in a .stabs section,
1295 rather than .stabs.excl, which is ignored by the linker.
1296 FIXME: Not implemented. */
1307 nop_limit = strtoul (optarg, &end, 0);
1309 as_bad (_("--nops needs a numeric argument"));
1324 md_show_usage (FILE *stream)
1326 fprintf (stream, _("\
1328 -a32 generate ELF32/XCOFF32\n\
1329 -a64 generate ELF64/XCOFF64\n\
1331 -mpwrx, -mpwr2 generate code for POWER/2 (RIOS2)\n\
1332 -mpwr generate code for POWER (RIOS1)\n\
1333 -m601 generate code for PowerPC 601\n\
1334 -mppc, -mppc32, -m603, -m604\n\
1335 generate code for PowerPC 603/604\n\
1336 -m403 generate code for PowerPC 403\n\
1337 -m405 generate code for PowerPC 405\n\
1338 -m440 generate code for PowerPC 440\n\
1339 -m464 generate code for PowerPC 464\n\
1340 -m476 generate code for PowerPC 476\n\
1341 -m7400, -m7410, -m7450, -m7455\n\
1342 generate code for PowerPC 7400/7410/7450/7455\n\
1343 -m750cl generate code for PowerPC 750cl\n\
1344 -m821, -m850, -m860 generate code for PowerPC 821/850/860\n"));
1345 fprintf (stream, _("\
1346 -mppc64, -m620 generate code for PowerPC 620/625/630\n\
1347 -mppc64bridge generate code for PowerPC 64, including bridge insns\n\
1348 -mbooke generate code for 32-bit PowerPC BookE\n\
1349 -ma2 generate code for A2 architecture\n\
1350 -mpower4, -mpwr4 generate code for Power4 architecture\n\
1351 -mpower5, -mpwr5, -mpwr5x\n\
1352 generate code for Power5 architecture\n\
1353 -mpower6, -mpwr6 generate code for Power6 architecture\n\
1354 -mpower7, -mpwr7 generate code for Power7 architecture\n\
1355 -mpower8, -mpwr8 generate code for Power8 architecture\n\
1356 -mpower9, -mpwr9 generate code for Power9 architecture\n\
1357 -mcell generate code for Cell Broadband Engine architecture\n\
1358 -mcom generate code for Power/PowerPC common instructions\n\
1359 -many generate code for any architecture (PWR/PWRX/PPC)\n"));
1360 fprintf (stream, _("\
1361 -maltivec generate code for AltiVec\n\
1362 -mvsx generate code for Vector-Scalar (VSX) instructions\n\
1363 -me300 generate code for PowerPC e300 family\n\
1364 -me500, -me500x2 generate code for Motorola e500 core complex\n\
1365 -me500mc, generate code for Freescale e500mc core complex\n\
1366 -me500mc64, generate code for Freescale e500mc64 core complex\n\
1367 -me5500, generate code for Freescale e5500 core complex\n\
1368 -me6500, generate code for Freescale e6500 core complex\n\
1369 -mspe generate code for Motorola SPE instructions\n\
1370 -mspe2 generate code for Freescale SPE2 instructions\n\
1371 -mvle generate code for Freescale VLE instructions\n\
1372 -mtitan generate code for AppliedMicro Titan core complex\n\
1373 -mregnames Allow symbolic names for registers\n\
1374 -mno-regnames Do not allow symbolic names for registers\n"));
1376 fprintf (stream, _("\
1377 -mrelocatable support for GCC's -mrelocatble option\n\
1378 -mrelocatable-lib support for GCC's -mrelocatble-lib option\n\
1379 -memb set PPC_EMB bit in ELF flags\n\
1380 -mlittle, -mlittle-endian, -le\n\
1381 generate code for a little endian machine\n\
1382 -mbig, -mbig-endian, -be\n\
1383 generate code for a big endian machine\n\
1384 -msolaris generate code for Solaris\n\
1385 -mno-solaris do not generate code for Solaris\n\
1386 -K PIC set EF_PPC_RELOCATABLE_LIB in ELF flags\n\
1387 -V print assembler version number\n\
1388 -Qy, -Qn ignored\n"));
1390 fprintf (stream, _("\
1391 -nops=count when aligning, more than COUNT nops uses a branch\n\
1392 -ppc476-workaround warn if emitting data to code sections\n"));
1395 /* Set ppc_cpu if it is not already set. */
1400 const char *default_os = TARGET_OS;
1401 const char *default_cpu = TARGET_CPU;
1403 if ((ppc_cpu & ~(ppc_cpu_t) PPC_OPCODE_ANY) == 0)
1406 if (target_big_endian)
1407 ppc_cpu |= PPC_OPCODE_PPC | PPC_OPCODE_64;
1409 /* The minimum supported cpu for 64-bit little-endian is power8. */
1410 ppc_cpu |= ppc_parse_cpu (ppc_cpu, &sticky, "power8");
1411 else if (strncmp (default_os, "aix", 3) == 0
1412 && default_os[3] >= '4' && default_os[3] <= '9')
1413 ppc_cpu |= PPC_OPCODE_COMMON;
1414 else if (strncmp (default_os, "aix3", 4) == 0)
1415 ppc_cpu |= PPC_OPCODE_POWER;
1416 else if (strcmp (default_cpu, "rs6000") == 0)
1417 ppc_cpu |= PPC_OPCODE_POWER;
1418 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1419 ppc_cpu |= PPC_OPCODE_PPC;
1421 as_fatal (_("unknown default cpu = %s, os = %s"),
1422 default_cpu, default_os);
1426 /* Figure out the BFD architecture to use. This function and ppc_mach
1427 are called well before md_begin, when the output file is opened. */
1429 enum bfd_architecture
1432 const char *default_cpu = TARGET_CPU;
1435 if ((ppc_cpu & PPC_OPCODE_PPC) != 0)
1436 return bfd_arch_powerpc;
1437 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
1438 return bfd_arch_powerpc;
1439 if ((ppc_cpu & PPC_OPCODE_POWER) != 0)
1440 return bfd_arch_rs6000;
1441 if ((ppc_cpu & (PPC_OPCODE_COMMON | PPC_OPCODE_ANY)) != 0)
1443 if (strcmp (default_cpu, "rs6000") == 0)
1444 return bfd_arch_rs6000;
1445 else if (strncmp (default_cpu, "powerpc", 7) == 0)
1446 return bfd_arch_powerpc;
1449 as_fatal (_("neither Power nor PowerPC opcodes were selected."));
1450 return bfd_arch_unknown;
1457 return bfd_mach_ppc64;
1458 else if (ppc_arch () == bfd_arch_rs6000)
1459 return bfd_mach_rs6k;
1460 else if (ppc_cpu & PPC_OPCODE_TITAN)
1461 return bfd_mach_ppc_titan;
1462 else if (ppc_cpu & PPC_OPCODE_VLE)
1463 return bfd_mach_ppc_vle;
1465 return bfd_mach_ppc;
1469 ppc_target_format (void)
1473 return target_big_endian ? "pe-powerpc" : "pe-powerpcle";
1475 return "xcoff-powermac";
1478 return (ppc_obj64 ? "aix5coff64-rs6000" : "aixcoff-rs6000");
1480 return (ppc_obj64 ? "aixcoff64-rs6000" : "aixcoff-rs6000");
1486 return (ppc_obj64 ? "elf64-powerpc-freebsd" : "elf32-powerpc-freebsd");
1487 # elif defined (TE_VXWORKS)
1488 return "elf32-powerpc-vxworks";
1490 return (target_big_endian
1491 ? (ppc_obj64 ? "elf64-powerpc" : "elf32-powerpc")
1492 : (ppc_obj64 ? "elf64-powerpcle" : "elf32-powerpcle"));
1497 /* Validate one entry in powerpc_opcodes[] or vle_opcodes[].
1498 Return TRUE if there's a problem, otherwise FALSE. */
1501 insn_validate (const struct powerpc_opcode *op)
1503 const unsigned char *o;
1504 uint64_t omask = op->mask;
1506 /* The mask had better not trim off opcode bits. */
1507 if ((op->opcode & omask) != op->opcode)
1509 as_bad (_("mask trims opcode bits for %s"), op->name);
1513 /* The operands must not overlap the opcode or each other. */
1514 for (o = op->operands; *o; ++o)
1516 if (*o >= num_powerpc_operands)
1518 as_bad (_("operand index error for %s"), op->name);
1523 const struct powerpc_operand *operand = &powerpc_operands[*o];
1524 if (operand->shift != (int) PPC_OPSHIFT_INV)
1528 if (operand->shift >= 0)
1529 mask = operand->bitm << operand->shift;
1531 mask = operand->bitm >> -operand->shift;
1534 as_bad (_("operand %d overlap in %s"),
1535 (int) (o - op->operands), op->name);
1545 /* Insert opcodes and macros into hash tables. Called at startup and
1546 for .machine pseudo. */
1549 ppc_setup_opcodes (void)
1551 const struct powerpc_opcode *op;
1552 const struct powerpc_opcode *op_end;
1553 const struct powerpc_macro *macro;
1554 const struct powerpc_macro *macro_end;
1555 bfd_boolean bad_insn = FALSE;
1557 if (ppc_hash != NULL)
1558 hash_die (ppc_hash);
1559 if (ppc_macro_hash != NULL)
1560 hash_die (ppc_macro_hash);
1562 /* Insert the opcodes into a hash table. */
1563 ppc_hash = hash_new ();
1565 if (ENABLE_CHECKING)
1569 /* An index into powerpc_operands is stored in struct fix
1570 fx_pcrel_adjust which is 8 bits wide. */
1571 gas_assert (num_powerpc_operands < 256);
1573 /* Check operand masks. Code here and in the disassembler assumes
1574 all the 1's in the mask are contiguous. */
1575 for (i = 0; i < num_powerpc_operands; ++i)
1577 uint64_t mask = powerpc_operands[i].bitm;
1581 right_bit = mask & -mask;
1583 right_bit = mask & -mask;
1584 if (mask != right_bit)
1586 as_bad (_("powerpc_operands[%d].bitm invalid"), i);
1589 for (j = i + 1; j < num_powerpc_operands; ++j)
1590 if (memcmp (&powerpc_operands[i], &powerpc_operands[j],
1591 sizeof (powerpc_operands[0])) == 0)
1593 as_bad (_("powerpc_operands[%d] duplicates powerpc_operands[%d]"),
1600 op_end = powerpc_opcodes + powerpc_num_opcodes;
1601 for (op = powerpc_opcodes; op < op_end; op++)
1603 if (ENABLE_CHECKING)
1605 unsigned int new_opcode = PPC_OP (op[0].opcode);
1607 #ifdef PRINT_OPCODE_TABLE
1608 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1609 op->name, (unsigned int) (op - powerpc_opcodes),
1610 new_opcode, (unsigned long long) op->opcode,
1611 (unsigned long long) op->mask, (unsigned long long) op->flags);
1614 /* The major opcodes had better be sorted. Code in the disassembler
1615 assumes the insns are sorted according to major opcode. */
1616 if (op != powerpc_opcodes
1617 && new_opcode < PPC_OP (op[-1].opcode))
1619 as_bad (_("major opcode is not sorted for %s"), op->name);
1623 if ((op->flags & PPC_OPCODE_VLE) != 0)
1625 as_bad (_("%s is enabled by vle flag"), op->name);
1628 if (PPC_OP (op->opcode) != 4
1629 && PPC_OP (op->opcode) != 31
1630 && (op->deprecated & PPC_OPCODE_VLE) == 0)
1632 as_bad (_("%s not disabled by vle flag"), op->name);
1635 bad_insn |= insn_validate (op);
1638 if ((ppc_cpu & op->flags) != 0
1639 && !(ppc_cpu & op->deprecated))
1643 retval = hash_insert (ppc_hash, op->name, (void *) op);
1646 as_bad (_("duplicate instruction %s"),
1653 if ((ppc_cpu & PPC_OPCODE_ANY) != 0)
1654 for (op = powerpc_opcodes; op < op_end; op++)
1655 hash_insert (ppc_hash, op->name, (void *) op);
1657 op_end = vle_opcodes + vle_num_opcodes;
1658 for (op = vle_opcodes; op < op_end; op++)
1660 if (ENABLE_CHECKING)
1662 unsigned new_seg = VLE_OP_TO_SEG (VLE_OP (op[0].opcode, op[0].mask));
1664 #ifdef PRINT_OPCODE_TABLE
1665 printf ("%-14s\t#%04u\tmajor op: 0x%x\top: 0x%llx\tmask: 0x%llx\tflags: 0x%llx\n",
1666 op->name, (unsigned int) (op - vle_opcodes),
1667 (unsigned int) new_seg, (unsigned long long) op->opcode,
1668 (unsigned long long) op->mask, (unsigned long long) op->flags);
1671 /* The major opcodes had better be sorted. Code in the disassembler
1672 assumes the insns are sorted according to major opcode. */
1673 if (op != vle_opcodes
1674 && new_seg < VLE_OP_TO_SEG (VLE_OP (op[-1].opcode, op[-1].mask)))
1676 as_bad (_("major opcode is not sorted for %s"), op->name);
1680 bad_insn |= insn_validate (op);
1683 if ((ppc_cpu & op->flags) != 0
1684 && !(ppc_cpu & op->deprecated))
1688 retval = hash_insert (ppc_hash, op->name, (void *) op);
1691 as_bad (_("duplicate instruction %s"),
1698 /* SPE2 instructions */
1699 if ((ppc_cpu & PPC_OPCODE_SPE2) == PPC_OPCODE_SPE2)
1701 op_end = spe2_opcodes + spe2_num_opcodes;
1702 for (op = spe2_opcodes; op < op_end; op++)
1704 if (ENABLE_CHECKING)
1706 if (op != spe2_opcodes)
1708 unsigned old_seg, new_seg;
1710 old_seg = VLE_OP (op[-1].opcode, op[-1].mask);
1711 old_seg = VLE_OP_TO_SEG (old_seg);
1712 new_seg = VLE_OP (op[0].opcode, op[0].mask);
1713 new_seg = VLE_OP_TO_SEG (new_seg);
1715 /* The major opcodes had better be sorted. Code in the
1716 disassembler assumes the insns are sorted according to
1718 if (new_seg < old_seg)
1720 as_bad (_("major opcode is not sorted for %s"), op->name);
1725 bad_insn |= insn_validate (op);
1728 if ((ppc_cpu & op->flags) != 0 && !(ppc_cpu & op->deprecated))
1732 retval = hash_insert (ppc_hash, op->name, (void *) op);
1735 as_bad (_("duplicate instruction %s"),
1742 for (op = spe2_opcodes; op < op_end; op++)
1743 hash_insert (ppc_hash, op->name, (void *) op);
1746 /* Insert the macros into a hash table. */
1747 ppc_macro_hash = hash_new ();
1749 macro_end = powerpc_macros + powerpc_num_macros;
1750 for (macro = powerpc_macros; macro < macro_end; macro++)
1752 if ((macro->flags & ppc_cpu) != 0 || (ppc_cpu & PPC_OPCODE_ANY) != 0)
1756 retval = hash_insert (ppc_macro_hash, macro->name, (void *) macro);
1757 if (retval != (const char *) NULL)
1759 as_bad (_("duplicate macro %s"), macro->name);
1769 /* This function is called when the assembler starts up. It is called
1770 after the options have been parsed and the output file has been
1778 ppc_cie_data_alignment = ppc_obj64 ? -8 : -4;
1779 ppc_dwarf2_line_min_insn_length = (ppc_cpu & PPC_OPCODE_VLE) ? 2 : 4;
1782 /* Set the ELF flags if desired. */
1783 if (ppc_flags && !msolaris)
1784 bfd_set_private_flags (stdoutput, ppc_flags);
1787 ppc_setup_opcodes ();
1789 /* Tell the main code what the endianness is if it is not overridden
1791 if (!set_target_endian)
1793 set_target_endian = 1;
1794 target_big_endian = PPC_BIG_ENDIAN;
1798 ppc_coff_debug_section = coff_section_from_bfd_index (stdoutput, N_DEBUG);
1800 /* Create dummy symbols to serve as initial csects. This forces the
1801 text csects to precede the data csects. These symbols will not
1803 ppc_text_csects = symbol_make ("dummy\001");
1804 symbol_get_tc (ppc_text_csects)->within = ppc_text_csects;
1805 ppc_data_csects = symbol_make ("dummy\001");
1806 symbol_get_tc (ppc_data_csects)->within = ppc_data_csects;
1811 ppc_current_section = text_section;
1812 ppc_previous_section = 0;
1821 if (ppc_apuinfo_list == NULL)
1824 /* Ok, so write the section info out. We have this layout:
1828 0 8 length of "APUinfo\0"
1829 4 (n*4) number of APU's (4 bytes each)
1832 20 APU#1 first APU's info
1833 24 APU#2 second APU's info
1838 asection *seg = now_seg;
1839 subsegT subseg = now_subseg;
1840 asection *apuinfo_secp = (asection *) NULL;
1843 /* Create the .PPC.EMB.apuinfo section. */
1844 apuinfo_secp = subseg_new (APUINFO_SECTION_NAME, 0);
1845 bfd_set_section_flags (stdoutput,
1847 SEC_HAS_CONTENTS | SEC_READONLY);
1850 md_number_to_chars (p, (valueT) 8, 4);
1853 md_number_to_chars (p, (valueT) ppc_apuinfo_num * 4, 4);
1856 md_number_to_chars (p, (valueT) 2, 4);
1859 strcpy (p, APUINFO_LABEL);
1861 for (i = 0; i < ppc_apuinfo_num; i++)
1864 md_number_to_chars (p, (valueT) ppc_apuinfo_list[i], 4);
1867 frag_align (2, 0, 0);
1869 /* We probably can't restore the current segment, for there likely
1872 subseg_set (seg, subseg);
1877 /* Insert an operand value into an instruction. */
1880 ppc_insert_operand (uint64_t insn,
1881 const struct powerpc_operand *operand,
1887 int64_t min, max, right;
1889 max = operand->bitm;
1893 if ((operand->flags & PPC_OPERAND_SIGNOPT) != 0)
1895 /* Extend the allowed range for addis to [-32768, 65535].
1896 Similarly for cmpli and some VLE high part insns. For 64-bit
1897 it would be good to disable this for signed fields since the
1898 value is sign extended into the high 32 bits of the register.
1899 If the value is, say, an address, then we might care about
1900 the high bits. However, gcc as of 2014-06 uses unsigned
1901 values when loading the high part of 64-bit constants using
1903 min = ~(max >> 1) & -right;
1905 else if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
1907 max = (max >> 1) & -right;
1908 min = ~max & -right;
1911 if ((operand->flags & PPC_OPERAND_PLUS1) != 0)
1914 if ((operand->flags & PPC_OPERAND_NEGATIVE) != 0)
1923 /* Some people write constants with the sign extension done by
1924 hand but only up to 32 bits. This shouldn't really be valid,
1925 but, to permit this code to assemble on a 64-bit host, we
1926 sign extend the 32-bit value to 64 bits if so doing makes the
1929 && (val - (1LL << 32)) >= min
1930 && (val - (1LL << 32)) <= max
1931 && ((val - (1LL << 32)) & (right - 1)) == 0)
1932 val = val - (1LL << 32);
1934 /* Similarly, people write expressions like ~(1<<15), and expect
1935 this to be OK for a 32-bit unsigned value. */
1937 && (val + (1LL << 32)) >= min
1938 && (val + (1LL << 32)) <= max
1939 && ((val + (1LL << 32)) & (right - 1)) == 0)
1940 val = val + (1LL << 32);
1944 || (val & (right - 1)) != 0)
1945 as_bad_value_out_of_range (_("operand"), val, min, max, file, line);
1948 if (operand->insert)
1953 insn = (*operand->insert) (insn, val, cpu, &errmsg);
1954 if (errmsg != (const char *) NULL)
1955 as_bad_where (file, line, "%s", errmsg);
1957 else if (operand->shift >= 0)
1958 insn |= (val & operand->bitm) << operand->shift;
1960 insn |= (val & operand->bitm) >> -operand->shift;
1967 /* Parse @got, etc. and return the desired relocation. */
1968 static bfd_reloc_code_real_type
1969 ppc_elf_suffix (char **str_p, expressionS *exp_p)
1973 unsigned int length : 8;
1974 unsigned int valid32 : 1;
1975 unsigned int valid64 : 1;
1984 const struct map_bfd *ptr;
1986 #define MAP(str, reloc) { str, sizeof (str) - 1, 1, 1, reloc }
1987 #define MAP32(str, reloc) { str, sizeof (str) - 1, 1, 0, reloc }
1988 #define MAP64(str, reloc) { str, sizeof (str) - 1, 0, 1, reloc }
1990 static const struct map_bfd mapping[] = {
1991 MAP ("l", BFD_RELOC_LO16),
1992 MAP ("h", BFD_RELOC_HI16),
1993 MAP ("ha", BFD_RELOC_HI16_S),
1994 MAP ("brtaken", BFD_RELOC_PPC_B16_BRTAKEN),
1995 MAP ("brntaken", BFD_RELOC_PPC_B16_BRNTAKEN),
1996 MAP ("got", BFD_RELOC_16_GOTOFF),
1997 MAP ("got@l", BFD_RELOC_LO16_GOTOFF),
1998 MAP ("got@h", BFD_RELOC_HI16_GOTOFF),
1999 MAP ("got@ha", BFD_RELOC_HI16_S_GOTOFF),
2000 MAP ("plt@l", BFD_RELOC_LO16_PLTOFF),
2001 MAP ("plt@h", BFD_RELOC_HI16_PLTOFF),
2002 MAP ("plt@ha", BFD_RELOC_HI16_S_PLTOFF),
2003 MAP ("copy", BFD_RELOC_PPC_COPY),
2004 MAP ("globdat", BFD_RELOC_PPC_GLOB_DAT),
2005 MAP ("sectoff", BFD_RELOC_16_BASEREL),
2006 MAP ("sectoff@l", BFD_RELOC_LO16_BASEREL),
2007 MAP ("sectoff@h", BFD_RELOC_HI16_BASEREL),
2008 MAP ("sectoff@ha", BFD_RELOC_HI16_S_BASEREL),
2009 MAP ("tls", BFD_RELOC_PPC_TLS),
2010 MAP ("dtpmod", BFD_RELOC_PPC_DTPMOD),
2011 MAP ("dtprel", BFD_RELOC_PPC_DTPREL),
2012 MAP ("dtprel@l", BFD_RELOC_PPC_DTPREL16_LO),
2013 MAP ("dtprel@h", BFD_RELOC_PPC_DTPREL16_HI),
2014 MAP ("dtprel@ha", BFD_RELOC_PPC_DTPREL16_HA),
2015 MAP ("tprel", BFD_RELOC_PPC_TPREL),
2016 MAP ("tprel@l", BFD_RELOC_PPC_TPREL16_LO),
2017 MAP ("tprel@h", BFD_RELOC_PPC_TPREL16_HI),
2018 MAP ("tprel@ha", BFD_RELOC_PPC_TPREL16_HA),
2019 MAP ("got@tlsgd", BFD_RELOC_PPC_GOT_TLSGD16),
2020 MAP ("got@tlsgd@l", BFD_RELOC_PPC_GOT_TLSGD16_LO),
2021 MAP ("got@tlsgd@h", BFD_RELOC_PPC_GOT_TLSGD16_HI),
2022 MAP ("got@tlsgd@ha", BFD_RELOC_PPC_GOT_TLSGD16_HA),
2023 MAP ("got@tlsld", BFD_RELOC_PPC_GOT_TLSLD16),
2024 MAP ("got@tlsld@l", BFD_RELOC_PPC_GOT_TLSLD16_LO),
2025 MAP ("got@tlsld@h", BFD_RELOC_PPC_GOT_TLSLD16_HI),
2026 MAP ("got@tlsld@ha", BFD_RELOC_PPC_GOT_TLSLD16_HA),
2027 MAP ("got@dtprel", BFD_RELOC_PPC_GOT_DTPREL16),
2028 MAP ("got@dtprel@l", BFD_RELOC_PPC_GOT_DTPREL16_LO),
2029 MAP ("got@dtprel@h", BFD_RELOC_PPC_GOT_DTPREL16_HI),
2030 MAP ("got@dtprel@ha", BFD_RELOC_PPC_GOT_DTPREL16_HA),
2031 MAP ("got@tprel", BFD_RELOC_PPC_GOT_TPREL16),
2032 MAP ("got@tprel@l", BFD_RELOC_PPC_GOT_TPREL16_LO),
2033 MAP ("got@tprel@h", BFD_RELOC_PPC_GOT_TPREL16_HI),
2034 MAP ("got@tprel@ha", BFD_RELOC_PPC_GOT_TPREL16_HA),
2035 MAP32 ("fixup", BFD_RELOC_CTOR),
2036 MAP32 ("plt", BFD_RELOC_24_PLT_PCREL),
2037 MAP32 ("pltrel24", BFD_RELOC_24_PLT_PCREL),
2038 MAP32 ("local24pc", BFD_RELOC_PPC_LOCAL24PC),
2039 MAP32 ("local", BFD_RELOC_PPC_LOCAL24PC),
2040 MAP32 ("pltrel", BFD_RELOC_32_PLT_PCREL),
2041 MAP32 ("sdarel", BFD_RELOC_GPREL16),
2042 MAP32 ("sdarel@l", BFD_RELOC_PPC_VLE_SDAREL_LO16A),
2043 MAP32 ("sdarel@h", BFD_RELOC_PPC_VLE_SDAREL_HI16A),
2044 MAP32 ("sdarel@ha", BFD_RELOC_PPC_VLE_SDAREL_HA16A),
2045 MAP32 ("naddr", BFD_RELOC_PPC_EMB_NADDR32),
2046 MAP32 ("naddr16", BFD_RELOC_PPC_EMB_NADDR16),
2047 MAP32 ("naddr@l", BFD_RELOC_PPC_EMB_NADDR16_LO),
2048 MAP32 ("naddr@h", BFD_RELOC_PPC_EMB_NADDR16_HI),
2049 MAP32 ("naddr@ha", BFD_RELOC_PPC_EMB_NADDR16_HA),
2050 MAP32 ("sdai16", BFD_RELOC_PPC_EMB_SDAI16),
2051 MAP32 ("sda2rel", BFD_RELOC_PPC_EMB_SDA2REL),
2052 MAP32 ("sda2i16", BFD_RELOC_PPC_EMB_SDA2I16),
2053 MAP32 ("sda21", BFD_RELOC_PPC_EMB_SDA21),
2054 MAP32 ("sda21@l", BFD_RELOC_PPC_VLE_SDA21_LO),
2055 MAP32 ("mrkref", BFD_RELOC_PPC_EMB_MRKREF),
2056 MAP32 ("relsect", BFD_RELOC_PPC_EMB_RELSEC16),
2057 MAP32 ("relsect@l", BFD_RELOC_PPC_EMB_RELST_LO),
2058 MAP32 ("relsect@h", BFD_RELOC_PPC_EMB_RELST_HI),
2059 MAP32 ("relsect@ha", BFD_RELOC_PPC_EMB_RELST_HA),
2060 MAP32 ("bitfld", BFD_RELOC_PPC_EMB_BIT_FLD),
2061 MAP32 ("relsda", BFD_RELOC_PPC_EMB_RELSDA),
2062 MAP32 ("xgot", BFD_RELOC_PPC_TOC16),
2063 MAP64 ("high", BFD_RELOC_PPC64_ADDR16_HIGH),
2064 MAP64 ("higha", BFD_RELOC_PPC64_ADDR16_HIGHA),
2065 MAP64 ("higher", BFD_RELOC_PPC64_HIGHER),
2066 MAP64 ("highera", BFD_RELOC_PPC64_HIGHER_S),
2067 MAP64 ("highest", BFD_RELOC_PPC64_HIGHEST),
2068 MAP64 ("highesta", BFD_RELOC_PPC64_HIGHEST_S),
2069 MAP64 ("tocbase", BFD_RELOC_PPC64_TOC),
2070 MAP64 ("toc", BFD_RELOC_PPC_TOC16),
2071 MAP64 ("toc@l", BFD_RELOC_PPC64_TOC16_LO),
2072 MAP64 ("toc@h", BFD_RELOC_PPC64_TOC16_HI),
2073 MAP64 ("toc@ha", BFD_RELOC_PPC64_TOC16_HA),
2074 MAP64 ("dtprel@high", BFD_RELOC_PPC64_DTPREL16_HIGH),
2075 MAP64 ("dtprel@higha", BFD_RELOC_PPC64_DTPREL16_HIGHA),
2076 MAP64 ("dtprel@higher", BFD_RELOC_PPC64_DTPREL16_HIGHER),
2077 MAP64 ("dtprel@highera", BFD_RELOC_PPC64_DTPREL16_HIGHERA),
2078 MAP64 ("dtprel@highest", BFD_RELOC_PPC64_DTPREL16_HIGHEST),
2079 MAP64 ("dtprel@highesta", BFD_RELOC_PPC64_DTPREL16_HIGHESTA),
2080 MAP64 ("localentry", BFD_RELOC_PPC64_ADDR64_LOCAL),
2081 MAP64 ("tprel@high", BFD_RELOC_PPC64_TPREL16_HIGH),
2082 MAP64 ("tprel@higha", BFD_RELOC_PPC64_TPREL16_HIGHA),
2083 MAP64 ("tprel@higher", BFD_RELOC_PPC64_TPREL16_HIGHER),
2084 MAP64 ("tprel@highera", BFD_RELOC_PPC64_TPREL16_HIGHERA),
2085 MAP64 ("tprel@highest", BFD_RELOC_PPC64_TPREL16_HIGHEST),
2086 MAP64 ("tprel@highesta", BFD_RELOC_PPC64_TPREL16_HIGHESTA),
2087 { (char *) 0, 0, 0, 0, BFD_RELOC_NONE }
2091 return BFD_RELOC_NONE;
2093 for (ch = *str, str2 = ident;
2094 (str2 < ident + sizeof (ident) - 1
2095 && (ISALNUM (ch) || ch == '@'));
2098 *str2++ = TOLOWER (ch);
2105 for (ptr = &mapping[0]; ptr->length > 0; ptr++)
2106 if (ch == ptr->string[0]
2107 && len == ptr->length
2108 && memcmp (ident, ptr->string, ptr->length) == 0
2109 && (ppc_obj64 ? ptr->valid64 : ptr->valid32))
2111 int reloc = ptr->reloc;
2113 if (!ppc_obj64 && exp_p->X_add_number != 0)
2117 case BFD_RELOC_16_GOTOFF:
2118 case BFD_RELOC_LO16_GOTOFF:
2119 case BFD_RELOC_HI16_GOTOFF:
2120 case BFD_RELOC_HI16_S_GOTOFF:
2121 as_warn (_("identifier+constant@got means "
2122 "identifier@got+constant"));
2125 case BFD_RELOC_PPC_GOT_TLSGD16:
2126 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
2127 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
2128 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
2129 case BFD_RELOC_PPC_GOT_TLSLD16:
2130 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
2131 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
2132 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
2133 case BFD_RELOC_PPC_GOT_DTPREL16:
2134 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
2135 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
2136 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
2137 case BFD_RELOC_PPC_GOT_TPREL16:
2138 case BFD_RELOC_PPC_GOT_TPREL16_LO:
2139 case BFD_RELOC_PPC_GOT_TPREL16_HI:
2140 case BFD_RELOC_PPC_GOT_TPREL16_HA:
2141 as_bad (_("symbol+offset not supported for got tls"));
2146 /* Now check for identifier@suffix+constant. */
2147 if (*str == '-' || *str == '+')
2149 char *orig_line = input_line_pointer;
2150 expressionS new_exp;
2152 input_line_pointer = str;
2153 expression (&new_exp);
2154 if (new_exp.X_op == O_constant)
2156 exp_p->X_add_number += new_exp.X_add_number;
2157 str = input_line_pointer;
2160 if (&input_line_pointer != str_p)
2161 input_line_pointer = orig_line;
2165 if (reloc == (int) BFD_RELOC_PPC64_TOC
2166 && exp_p->X_op == O_symbol
2167 && strcmp (S_GET_NAME (exp_p->X_add_symbol), ".TOC.") == 0)
2169 /* Change the symbol so that the dummy .TOC. symbol can be
2170 omitted from the object file. */
2171 exp_p->X_add_symbol = &abs_symbol;
2174 return (bfd_reloc_code_real_type) reloc;
2177 return BFD_RELOC_NONE;
2180 /* Support @got, etc. on constants emitted via .short, .int etc. */
2182 bfd_reloc_code_real_type
2183 ppc_elf_parse_cons (expressionS *exp, unsigned int nbytes)
2186 if (nbytes >= 2 && *input_line_pointer == '@')
2187 return ppc_elf_suffix (&input_line_pointer, exp);
2188 return BFD_RELOC_NONE;
2191 /* Warn when emitting data to code sections, unless we are emitting
2192 a relocation that ld --ppc476-workaround uses to recognise data
2193 *and* there was an unconditional branch prior to the data. */
2196 ppc_elf_cons_fix_check (expressionS *exp ATTRIBUTE_UNUSED,
2197 unsigned int nbytes, fixS *fix)
2200 && (now_seg->flags & SEC_CODE) != 0
2203 || !(fix->fx_r_type == BFD_RELOC_32
2204 || fix->fx_r_type == BFD_RELOC_CTOR
2205 || fix->fx_r_type == BFD_RELOC_32_PCREL)
2206 || !(last_seg == now_seg && last_subseg == now_subseg)
2207 || !((last_insn & (0x3f << 26)) == (18u << 26)
2208 || ((last_insn & (0x3f << 26)) == (16u << 26)
2209 && (last_insn & (0x14 << 21)) == (0x14 << 21))
2210 || ((last_insn & (0x3f << 26)) == (19u << 26)
2211 && (last_insn & (0x3ff << 1)) == (16u << 1)
2212 && (last_insn & (0x14 << 21)) == (0x14 << 21)))))
2214 /* Flag that we've warned. */
2218 as_warn (_("data in executable section"));
2222 /* Solaris pseduo op to change to the .rodata section. */
2224 ppc_elf_rdata (int xxx)
2226 char *save_line = input_line_pointer;
2227 static char section[] = ".rodata\n";
2229 /* Just pretend this is .section .rodata */
2230 input_line_pointer = section;
2231 obj_elf_section (xxx);
2233 input_line_pointer = save_line;
2236 /* Pseudo op to make file scope bss items. */
2238 ppc_elf_lcomm (int xxx ATTRIBUTE_UNUSED)
2251 c = get_symbol_name (&name);
2253 /* Just after name is now '\0'. */
2254 p = input_line_pointer;
2256 SKIP_WHITESPACE_AFTER_NAME ();
2257 if (*input_line_pointer != ',')
2259 as_bad (_("expected comma after symbol-name: rest of line ignored."));
2260 ignore_rest_of_line ();
2264 input_line_pointer++; /* skip ',' */
2265 if ((size = get_absolute_expression ()) < 0)
2267 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) size);
2268 ignore_rest_of_line ();
2272 /* The third argument to .lcomm is the alignment. */
2273 if (*input_line_pointer != ',')
2277 ++input_line_pointer;
2278 align = get_absolute_expression ();
2281 as_warn (_("ignoring bad alignment"));
2287 symbolP = symbol_find_or_make (name);
2290 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
2292 as_bad (_("ignoring attempt to re-define symbol `%s'."),
2293 S_GET_NAME (symbolP));
2294 ignore_rest_of_line ();
2298 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
2300 as_bad (_("length of .lcomm \"%s\" is already %ld. Not changed to %ld."),
2301 S_GET_NAME (symbolP),
2302 (long) S_GET_VALUE (symbolP),
2305 ignore_rest_of_line ();
2311 old_subsec = now_subseg;
2314 /* Convert to a power of 2 alignment. */
2315 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2);
2318 as_bad (_("common alignment not a power of 2"));
2319 ignore_rest_of_line ();
2326 record_alignment (bss_section, align2);
2327 subseg_set (bss_section, 1);
2329 frag_align (align2, 0, 0);
2330 if (S_GET_SEGMENT (symbolP) == bss_section)
2331 symbol_get_frag (symbolP)->fr_symbol = 0;
2332 symbol_set_frag (symbolP, frag_now);
2333 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
2336 S_SET_SIZE (symbolP, size);
2337 S_SET_SEGMENT (symbolP, bss_section);
2338 subseg_set (old_sec, old_subsec);
2339 demand_empty_rest_of_line ();
2342 /* Pseudo op to set symbol local entry point. */
2344 ppc_elf_localentry (int ignore ATTRIBUTE_UNUSED)
2347 char c = get_symbol_name (&name);
2352 elf_symbol_type *elfsym;
2354 p = input_line_pointer;
2356 SKIP_WHITESPACE_AFTER_NAME ();
2357 if (*input_line_pointer != ',')
2360 as_bad (_("expected comma after name `%s' in .localentry directive"),
2363 ignore_rest_of_line ();
2366 input_line_pointer++;
2368 if (exp.X_op == O_absent)
2370 as_bad (_("missing expression in .localentry directive"));
2371 exp.X_op = O_constant;
2372 exp.X_add_number = 0;
2375 sym = symbol_find_or_make (name);
2378 if (resolve_expression (&exp)
2379 && exp.X_op == O_constant)
2381 unsigned char encoded = PPC64_SET_LOCAL_ENTRY_OFFSET (exp.X_add_number);
2383 if (exp.X_add_number != (offsetT) PPC64_LOCAL_ENTRY_OFFSET (encoded))
2384 as_bad (_(".localentry expression for `%s' "
2385 "is not a valid power of 2"), S_GET_NAME (sym));
2388 bfdsym = symbol_get_bfdsym (sym);
2389 elfsym = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
2390 gas_assert (elfsym);
2391 elfsym->internal_elf_sym.st_other &= ~STO_PPC64_LOCAL_MASK;
2392 elfsym->internal_elf_sym.st_other |= encoded;
2393 if (ppc_abiversion == 0)
2398 as_bad (_(".localentry expression for `%s' "
2399 "does not evaluate to a constant"), S_GET_NAME (sym));
2401 demand_empty_rest_of_line ();
2404 /* Pseudo op to set ABI version. */
2406 ppc_elf_abiversion (int ignore ATTRIBUTE_UNUSED)
2411 if (exp.X_op == O_absent)
2413 as_bad (_("missing expression in .abiversion directive"));
2414 exp.X_op = O_constant;
2415 exp.X_add_number = 0;
2418 if (resolve_expression (&exp)
2419 && exp.X_op == O_constant)
2420 ppc_abiversion = exp.X_add_number;
2422 as_bad (_(".abiversion expression does not evaluate to a constant"));
2423 demand_empty_rest_of_line ();
2426 /* Parse a .gnu_attribute directive. */
2428 ppc_elf_gnu_attribute (int ignored ATTRIBUTE_UNUSED)
2430 int tag = obj_elf_vendor_attribute (OBJ_ATTR_GNU);
2432 /* Check validity of defined powerpc tags. */
2433 if (tag == Tag_GNU_Power_ABI_FP
2434 || tag == Tag_GNU_Power_ABI_Vector
2435 || tag == Tag_GNU_Power_ABI_Struct_Return)
2439 val = bfd_elf_get_obj_attr_int (stdoutput, OBJ_ATTR_GNU, tag);
2441 if ((tag == Tag_GNU_Power_ABI_FP && val > 15)
2442 || (tag == Tag_GNU_Power_ABI_Vector && val > 3)
2443 || (tag == Tag_GNU_Power_ABI_Struct_Return && val > 2))
2444 as_warn (_("unknown .gnu_attribute value"));
2448 /* Set ABI version in output file. */
2452 if (ppc_obj64 && ppc_abiversion != 0)
2454 elf_elfheader (stdoutput)->e_flags &= ~EF_PPC64_ABI;
2455 elf_elfheader (stdoutput)->e_flags |= ppc_abiversion & EF_PPC64_ABI;
2459 /* Validate any relocations emitted for -mrelocatable, possibly adding
2460 fixups for word relocations in writable segments, so we can adjust
2463 ppc_elf_validate_fix (fixS *fixp, segT seg)
2465 if (fixp->fx_done || fixp->fx_pcrel)
2474 case SHLIB_MRELOCATABLE:
2475 if (fixp->fx_r_type != BFD_RELOC_16_GOTOFF
2476 && fixp->fx_r_type != BFD_RELOC_HI16_GOTOFF
2477 && fixp->fx_r_type != BFD_RELOC_LO16_GOTOFF
2478 && fixp->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
2479 && fixp->fx_r_type != BFD_RELOC_16_BASEREL
2480 && fixp->fx_r_type != BFD_RELOC_LO16_BASEREL
2481 && fixp->fx_r_type != BFD_RELOC_HI16_BASEREL
2482 && fixp->fx_r_type != BFD_RELOC_HI16_S_BASEREL
2483 && (seg->flags & SEC_LOAD) != 0
2484 && strcmp (segment_name (seg), ".got2") != 0
2485 && strcmp (segment_name (seg), ".dtors") != 0
2486 && strcmp (segment_name (seg), ".ctors") != 0
2487 && strcmp (segment_name (seg), ".fixup") != 0
2488 && strcmp (segment_name (seg), ".gcc_except_table") != 0
2489 && strcmp (segment_name (seg), ".eh_frame") != 0
2490 && strcmp (segment_name (seg), ".ex_shared") != 0)
2492 if ((seg->flags & (SEC_READONLY | SEC_CODE)) != 0
2493 || fixp->fx_r_type != BFD_RELOC_CTOR)
2495 as_bad_where (fixp->fx_file, fixp->fx_line,
2496 _("relocation cannot be done when using -mrelocatable"));
2503 /* Prevent elf_frob_file_before_adjust removing a weak undefined
2504 function descriptor sym if the corresponding code sym is used. */
2507 ppc_frob_file_before_adjust (void)
2515 for (symp = symbol_rootP; symp; symp = symbol_next (symp))
2521 name = S_GET_NAME (symp);
2525 if (! S_IS_WEAK (symp)
2526 || S_IS_DEFINED (symp))
2529 dotname = concat (".", name, (char *) NULL);
2530 dotsym = symbol_find_noref (dotname, 1);
2532 if (dotsym != NULL && (symbol_used_p (dotsym)
2533 || symbol_used_in_reloc_p (dotsym)))
2534 symbol_mark_used (symp);
2538 toc = bfd_get_section_by_name (stdoutput, ".toc");
2540 && toc_reloc_types != has_large_toc_reloc
2541 && bfd_section_size (stdoutput, toc) > 0x10000)
2542 as_warn (_("TOC section size exceeds 64k"));
2545 /* .TOC. used in an opd entry as .TOC.@tocbase doesn't need to be
2546 emitted. Other uses of .TOC. will cause the symbol to be marked
2547 with BSF_KEEP in md_apply_fix. */
2550 ppc_elf_adjust_symtab (void)
2555 symp = symbol_find (".TOC.");
2558 asymbol *bsym = symbol_get_bfdsym (symp);
2559 if ((bsym->flags & BSF_KEEP) == 0)
2560 symbol_remove (symp, &symbol_rootP, &symbol_lastP);
2564 #endif /* OBJ_ELF */
2569 * Summary of parse_toc_entry.
2571 * in: Input_line_pointer points to the '[' in one of:
2573 * [toc] [tocv] [toc32] [toc64]
2575 * Anything else is an error of one kind or another.
2578 * return value: success or failure
2579 * toc_kind: kind of toc reference
2580 * input_line_pointer:
2581 * success: first char after the ']'
2582 * failure: unchanged
2586 * [toc] - rv == success, toc_kind = default_toc
2587 * [tocv] - rv == success, toc_kind = data_in_toc
2588 * [toc32] - rv == success, toc_kind = must_be_32
2589 * [toc64] - rv == success, toc_kind = must_be_64
2593 enum toc_size_qualifier
2595 default_toc, /* The toc cell constructed should be the system default size */
2596 data_in_toc, /* This is a direct reference to a toc cell */
2597 must_be_32, /* The toc cell constructed must be 32 bits wide */
2598 must_be_64 /* The toc cell constructed must be 64 bits wide */
2602 parse_toc_entry (enum toc_size_qualifier *toc_kind)
2607 enum toc_size_qualifier t;
2609 /* Save the input_line_pointer. */
2610 start = input_line_pointer;
2612 /* Skip over the '[' , and whitespace. */
2613 ++input_line_pointer;
2616 /* Find the spelling of the operand. */
2617 c = get_symbol_name (&toc_spec);
2619 if (strcmp (toc_spec, "toc") == 0)
2623 else if (strcmp (toc_spec, "tocv") == 0)
2627 else if (strcmp (toc_spec, "toc32") == 0)
2631 else if (strcmp (toc_spec, "toc64") == 0)
2637 as_bad (_("syntax error: invalid toc specifier `%s'"), toc_spec);
2638 *input_line_pointer = c;
2639 input_line_pointer = start;
2643 /* Now find the ']'. */
2644 *input_line_pointer = c;
2646 SKIP_WHITESPACE_AFTER_NAME (); /* leading whitespace could be there. */
2647 c = *input_line_pointer++; /* input_line_pointer->past char in c. */
2651 as_bad (_("syntax error: expected `]', found `%c'"), c);
2652 input_line_pointer = start;
2661 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
2662 /* See whether a symbol is in the TOC section. */
2665 ppc_is_toc_sym (symbolS *sym)
2668 return (symbol_get_tc (sym)->symbol_class == XMC_TC
2669 || symbol_get_tc (sym)->symbol_class == XMC_TC0);
2672 const char *sname = segment_name (S_GET_SEGMENT (sym));
2674 return strcmp (sname, ".toc") == 0;
2676 return strcmp (sname, ".got") == 0;
2679 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
2683 #define APUID(a,v) ((((a) & 0xffff) << 16) | ((v) & 0xffff))
2685 ppc_apuinfo_section_add (unsigned int apu, unsigned int version)
2689 /* Check we don't already exist. */
2690 for (i = 0; i < ppc_apuinfo_num; i++)
2691 if (ppc_apuinfo_list[i] == APUID (apu, version))
2694 if (ppc_apuinfo_num == ppc_apuinfo_num_alloc)
2696 if (ppc_apuinfo_num_alloc == 0)
2698 ppc_apuinfo_num_alloc = 4;
2699 ppc_apuinfo_list = XNEWVEC (unsigned long, ppc_apuinfo_num_alloc);
2703 ppc_apuinfo_num_alloc += 4;
2704 ppc_apuinfo_list = XRESIZEVEC (unsigned long, ppc_apuinfo_list,
2705 ppc_apuinfo_num_alloc);
2708 ppc_apuinfo_list[ppc_apuinfo_num++] = APUID (apu, version);
2714 /* We need to keep a list of fixups. We can't simply generate them as
2715 we go, because that would require us to first create the frag, and
2716 that would screw up references to ``.''. */
2722 bfd_reloc_code_real_type reloc;
2725 #define MAX_INSN_FIXUPS (5)
2727 /* This routine is called for each instruction to be assembled. */
2730 md_assemble (char *str)
2733 const struct powerpc_opcode *opcode;
2735 const unsigned char *opindex_ptr;
2739 struct ppc_fixup fixups[MAX_INSN_FIXUPS];
2744 unsigned int insn_length;
2746 /* Get the opcode. */
2747 for (s = str; *s != '\0' && ! ISSPACE (*s); s++)
2752 /* Look up the opcode in the hash table. */
2753 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, str);
2754 if (opcode == (const struct powerpc_opcode *) NULL)
2756 const struct powerpc_macro *macro;
2758 macro = (const struct powerpc_macro *) hash_find (ppc_macro_hash, str);
2759 if (macro == (const struct powerpc_macro *) NULL)
2760 as_bad (_("unrecognized opcode: `%s'"), str);
2762 ppc_macro (s, macro);
2767 insn = opcode->opcode;
2770 while (ISSPACE (*str))
2773 /* PowerPC operands are just expressions. The only real issue is
2774 that a few operand types are optional. All cases which might use
2775 an optional operand separate the operands only with commas (in some
2776 cases parentheses are used, as in ``lwz 1,0(1)'' but such cases never
2777 have optional operands). Most instructions with optional operands
2778 have only one. Those that have more than one optional operand can
2779 take either all their operands or none. So, before we start seriously
2780 parsing the operands, we check to see if we have optional operands,
2781 and if we do, we count the number of commas to see which operands
2782 have been omitted. */
2784 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2786 const struct powerpc_operand *operand;
2788 operand = &powerpc_operands[*opindex_ptr];
2789 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2790 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64))
2792 unsigned int opcount;
2793 unsigned int num_operands_expected;
2795 /* There is an optional operand. Count the number of
2796 commas in the input line. */
2803 while ((s = strchr (s, ',')) != (char *) NULL)
2810 /* Compute the number of expected operands.
2811 Do not count fake operands. */
2812 for (num_operands_expected = 0, i = 0; opcode->operands[i]; i ++)
2813 if ((powerpc_operands [opcode->operands[i]].flags & PPC_OPERAND_FAKE) == 0)
2814 ++ num_operands_expected;
2816 /* If there are fewer operands in the line then are called
2817 for by the instruction, we want to skip the optional
2819 if (opcount < num_operands_expected)
2826 /* Gather the operands. */
2830 for (opindex_ptr = opcode->operands; *opindex_ptr != 0; opindex_ptr++)
2832 const struct powerpc_operand *operand;
2838 if (next_opindex == 0)
2839 operand = &powerpc_operands[*opindex_ptr];
2842 operand = &powerpc_operands[next_opindex];
2847 /* If this is a fake operand, then we do not expect anything
2849 if ((operand->flags & PPC_OPERAND_FAKE) != 0)
2851 insn = (*operand->insert) (insn, 0L, ppc_cpu, &errmsg);
2852 if (errmsg != (const char *) NULL)
2853 as_bad ("%s", errmsg);
2857 /* If this is an optional operand, and we are skipping it, just
2859 if ((operand->flags & PPC_OPERAND_OPTIONAL) != 0
2860 && !((operand->flags & PPC_OPERAND_OPTIONAL32) != 0 && ppc_obj64)
2863 int64_t val = ppc_optional_operand_value (operand);
2864 if (operand->insert)
2866 insn = (*operand->insert) (insn, val, ppc_cpu, &errmsg);
2867 if (errmsg != (const char *) NULL)
2868 as_bad ("%s", errmsg);
2870 else if (operand->shift >= 0)
2871 insn |= (val & operand->bitm) << operand->shift;
2873 insn |= (val & operand->bitm) >> -operand->shift;
2875 if ((operand->flags & PPC_OPERAND_NEXT) != 0)
2876 next_opindex = *opindex_ptr + 1;
2880 /* Gather the operand. */
2881 hold = input_line_pointer;
2882 input_line_pointer = str;
2885 if (*input_line_pointer == '[')
2887 /* We are expecting something like the second argument here:
2889 * lwz r4,[toc].GS.0.static_int(rtoc)
2890 * ^^^^^^^^^^^^^^^^^^^^^^^^^^^
2891 * The argument following the `]' must be a symbol name, and the
2892 * register must be the toc register: 'rtoc' or '2'
2894 * The effect is to 0 as the displacement field
2895 * in the instruction, and issue an IMAGE_REL_PPC_TOCREL16 (or
2896 * the appropriate variation) reloc against it based on the symbol.
2897 * The linker will build the toc, and insert the resolved toc offset.
2900 * o The size of the toc entry is currently assumed to be
2901 * 32 bits. This should not be assumed to be a hard coded
2903 * o In an effort to cope with a change from 32 to 64 bits,
2904 * there are also toc entries that are specified to be
2905 * either 32 or 64 bits:
2906 * lwz r4,[toc32].GS.0.static_int(rtoc)
2907 * lwz r4,[toc64].GS.0.static_int(rtoc)
2908 * These demand toc entries of the specified size, and the
2909 * instruction probably requires it.
2913 enum toc_size_qualifier toc_kind;
2914 bfd_reloc_code_real_type toc_reloc;
2916 /* Go parse off the [tocXX] part. */
2917 valid_toc = parse_toc_entry (&toc_kind);
2921 ignore_rest_of_line ();
2925 /* Now get the symbol following the ']'. */
2931 /* In this case, we may not have seen the symbol yet,
2932 since it is allowed to appear on a .extern or .globl
2933 or just be a label in the .data section. */
2934 toc_reloc = BFD_RELOC_PPC_TOC16;
2937 /* 1. The symbol must be defined and either in the toc
2938 section, or a global.
2939 2. The reloc generated must have the TOCDEFN flag set
2940 in upper bit mess of the reloc type.
2941 FIXME: It's a little confusing what the tocv
2942 qualifier can be used for. At the very least, I've
2943 seen three uses, only one of which I'm sure I can
2945 if (ex.X_op == O_symbol)
2947 gas_assert (ex.X_add_symbol != NULL);
2948 if (symbol_get_bfdsym (ex.X_add_symbol)->section
2951 as_bad (_("[tocv] symbol is not a toc symbol"));
2955 toc_reloc = BFD_RELOC_PPC_TOC16;
2958 /* FIXME: these next two specifically specify 32/64 bit
2959 toc entries. We don't support them today. Is this
2960 the right way to say that? */
2961 toc_reloc = BFD_RELOC_NONE;
2962 as_bad (_("unimplemented toc32 expression modifier"));
2965 /* FIXME: see above. */
2966 toc_reloc = BFD_RELOC_NONE;
2967 as_bad (_("unimplemented toc64 expression modifier"));
2971 _("Unexpected return value [%d] from parse_toc_entry!\n"),
2977 /* We need to generate a fixup for this expression. */
2978 if (fc >= MAX_INSN_FIXUPS)
2979 as_fatal (_("too many fixups"));
2981 fixups[fc].reloc = toc_reloc;
2982 fixups[fc].exp = ex;
2983 fixups[fc].opindex = *opindex_ptr;
2986 /* Ok. We've set up the fixup for the instruction. Now make it
2987 look like the constant 0 was found here. */
2989 ex.X_op = O_constant;
2990 ex.X_add_number = 0;
2991 ex.X_add_symbol = NULL;
2992 ex.X_op_symbol = NULL;
2999 && (((operand->flags & PPC_OPERAND_CR_BIT) != 0)
3000 || ((operand->flags & PPC_OPERAND_CR_REG) != 0)))
3001 || !register_name (&ex))
3003 char save_lex = lex_type['%'];
3005 if (((operand->flags & PPC_OPERAND_CR_REG) != 0)
3006 || (operand->flags & PPC_OPERAND_CR_BIT) != 0)
3009 lex_type['%'] |= LEX_BEGIN_NAME;
3013 lex_type['%'] = save_lex;
3017 str = input_line_pointer;
3018 input_line_pointer = hold;
3020 if (ex.X_op == O_illegal)
3021 as_bad (_("illegal operand"));
3022 else if (ex.X_op == O_absent)
3023 as_bad (_("missing operand"));
3024 else if (ex.X_op == O_register)
3028 & (PPC_OPERAND_GPR | PPC_OPERAND_FPR | PPC_OPERAND_VR
3029 | PPC_OPERAND_VSR | PPC_OPERAND_CR_BIT | PPC_OPERAND_CR_REG
3030 | PPC_OPERAND_SPR | PPC_OPERAND_GQR)) != 0
3031 && !((ex.X_md & PPC_OPERAND_GPR) != 0
3032 && ex.X_add_number != 0
3033 && (operand->flags & PPC_OPERAND_GPR_0) != 0))
3034 as_warn (_("invalid register expression"));
3035 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3036 ppc_cpu, (char *) NULL, 0);
3038 else if (ex.X_op == O_constant)
3041 /* Allow @HA, @L, @H on constants. */
3042 bfd_reloc_code_real_type reloc;
3043 char *orig_str = str;
3045 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3052 case BFD_RELOC_LO16:
3053 ex.X_add_number &= 0xffff;
3054 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3055 ex.X_add_number = SEX16 (ex.X_add_number);
3058 case BFD_RELOC_HI16:
3059 if (REPORT_OVERFLOW_HI && ppc_obj64)
3061 /* PowerPC64 @h is tested for overflow. */
3062 ex.X_add_number = (addressT) ex.X_add_number >> 16;
3063 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3065 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3067 = ((addressT) ex.X_add_number ^ sign) - sign;
3073 case BFD_RELOC_PPC64_ADDR16_HIGH:
3074 ex.X_add_number = PPC_HI (ex.X_add_number);
3075 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3076 ex.X_add_number = SEX16 (ex.X_add_number);
3079 case BFD_RELOC_HI16_S:
3080 if (REPORT_OVERFLOW_HI && ppc_obj64)
3082 /* PowerPC64 @ha is tested for overflow. */
3084 = ((addressT) ex.X_add_number + 0x8000) >> 16;
3085 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3087 addressT sign = (((addressT) -1 >> 16) + 1) >> 1;
3089 = ((addressT) ex.X_add_number ^ sign) - sign;
3095 case BFD_RELOC_PPC64_ADDR16_HIGHA:
3096 ex.X_add_number = PPC_HA (ex.X_add_number);
3097 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3098 ex.X_add_number = SEX16 (ex.X_add_number);
3101 case BFD_RELOC_PPC64_HIGHER:
3102 ex.X_add_number = PPC_HIGHER (ex.X_add_number);
3103 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3104 ex.X_add_number = SEX16 (ex.X_add_number);
3107 case BFD_RELOC_PPC64_HIGHER_S:
3108 ex.X_add_number = PPC_HIGHERA (ex.X_add_number);
3109 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3110 ex.X_add_number = SEX16 (ex.X_add_number);
3113 case BFD_RELOC_PPC64_HIGHEST:
3114 ex.X_add_number = PPC_HIGHEST (ex.X_add_number);
3115 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3116 ex.X_add_number = SEX16 (ex.X_add_number);
3119 case BFD_RELOC_PPC64_HIGHEST_S:
3120 ex.X_add_number = PPC_HIGHESTA (ex.X_add_number);
3121 if ((operand->flags & PPC_OPERAND_SIGNED) != 0)
3122 ex.X_add_number = SEX16 (ex.X_add_number);
3125 #endif /* OBJ_ELF */
3126 insn = ppc_insert_operand (insn, operand, ex.X_add_number,
3127 ppc_cpu, (char *) NULL, 0);
3131 bfd_reloc_code_real_type reloc = BFD_RELOC_NONE;
3133 if (ex.X_op == O_symbol && str[0] == '(')
3135 const char *sym_name = S_GET_NAME (ex.X_add_symbol);
3136 if (sym_name[0] == '.')
3139 if (strcasecmp (sym_name, "__tls_get_addr") == 0)
3141 expressionS tls_exp;
3143 hold = input_line_pointer;
3144 input_line_pointer = str + 1;
3145 expression (&tls_exp);
3146 if (tls_exp.X_op == O_symbol)
3148 reloc = BFD_RELOC_NONE;
3149 if (strncasecmp (input_line_pointer, "@tlsgd)", 7) == 0)
3151 reloc = BFD_RELOC_PPC_TLSGD;
3152 input_line_pointer += 7;
3154 else if (strncasecmp (input_line_pointer, "@tlsld)", 7) == 0)
3156 reloc = BFD_RELOC_PPC_TLSLD;
3157 input_line_pointer += 7;
3159 if (reloc != BFD_RELOC_NONE)
3162 str = input_line_pointer;
3164 if (fc >= MAX_INSN_FIXUPS)
3165 as_fatal (_("too many fixups"));
3166 fixups[fc].exp = tls_exp;
3167 fixups[fc].opindex = *opindex_ptr;
3168 fixups[fc].reloc = reloc;
3172 input_line_pointer = hold;
3176 if ((reloc = ppc_elf_suffix (&str, &ex)) != BFD_RELOC_NONE)
3178 /* Some TLS tweaks. */
3184 case BFD_RELOC_PPC_TLS:
3185 if (!_bfd_elf_ppc_at_tls_transform (opcode->opcode, 0))
3186 as_bad (_("@tls may not be used with \"%s\" operands"),
3188 else if (operand->shift != 11)
3189 as_bad (_("@tls may only be used in last operand"));
3191 insn = ppc_insert_operand (insn, operand,
3193 ppc_cpu, (char *) NULL, 0);
3196 /* We'll only use the 32 (or 64) bit form of these relocations
3197 in constants. Instructions get the 16 bit form. */
3198 case BFD_RELOC_PPC_DTPREL:
3199 reloc = BFD_RELOC_PPC_DTPREL16;
3201 case BFD_RELOC_PPC_TPREL:
3202 reloc = BFD_RELOC_PPC_TPREL16;
3207 if (opcode->opcode == (19 << 26) + (2 << 1)
3208 && reloc == BFD_RELOC_HI16_S)
3209 reloc = BFD_RELOC_PPC_16DX_HA;
3211 /* If VLE-mode convert LO/HI/HA relocations. */
3212 if (opcode->flags & PPC_OPCODE_VLE)
3214 uint64_t tmp_insn = insn & opcode->mask;
3216 int use_a_reloc = (tmp_insn == E_OR2I_INSN
3217 || tmp_insn == E_AND2I_DOT_INSN
3218 || tmp_insn == E_OR2IS_INSN
3219 || tmp_insn == E_LIS_INSN
3220 || tmp_insn == E_AND2IS_DOT_INSN);
3223 int use_d_reloc = (tmp_insn == E_ADD2I_DOT_INSN
3224 || tmp_insn == E_ADD2IS_INSN
3225 || tmp_insn == E_CMP16I_INSN
3226 || tmp_insn == E_MULL2I_INSN
3227 || tmp_insn == E_CMPL16I_INSN
3228 || tmp_insn == E_CMPH16I_INSN
3229 || tmp_insn == E_CMPHL16I_INSN);
3236 case BFD_RELOC_PPC_EMB_SDA21:
3237 reloc = BFD_RELOC_PPC_VLE_SDA21;
3240 case BFD_RELOC_LO16:
3242 reloc = BFD_RELOC_PPC_VLE_LO16D;
3243 else if (use_a_reloc)
3244 reloc = BFD_RELOC_PPC_VLE_LO16A;
3247 case BFD_RELOC_HI16:
3249 reloc = BFD_RELOC_PPC_VLE_HI16D;
3250 else if (use_a_reloc)
3251 reloc = BFD_RELOC_PPC_VLE_HI16A;
3254 case BFD_RELOC_HI16_S:
3256 reloc = BFD_RELOC_PPC_VLE_HA16D;
3257 else if (use_a_reloc)
3258 reloc = BFD_RELOC_PPC_VLE_HA16A;
3261 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
3263 reloc = BFD_RELOC_PPC_VLE_SDAREL_LO16D;
3266 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
3268 reloc = BFD_RELOC_PPC_VLE_SDAREL_HI16D;
3271 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
3273 reloc = BFD_RELOC_PPC_VLE_SDAREL_HA16D;
3278 #endif /* OBJ_ELF */
3280 if (reloc != BFD_RELOC_NONE)
3282 /* Determine a BFD reloc value based on the operand information.
3283 We are only prepared to turn a few of the operands into
3285 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3286 | PPC_OPERAND_ABSOLUTE)) != 0
3287 && operand->bitm == 0x3fffffc
3288 && operand->shift == 0)
3289 reloc = BFD_RELOC_PPC_B26;
3290 else if ((operand->flags & (PPC_OPERAND_RELATIVE
3291 | PPC_OPERAND_ABSOLUTE)) != 0
3292 && operand->bitm == 0xfffc
3293 && operand->shift == 0)
3294 reloc = BFD_RELOC_PPC_B16;
3295 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3296 && operand->bitm == 0x1fe
3297 && operand->shift == -1)
3298 reloc = BFD_RELOC_PPC_VLE_REL8;
3299 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3300 && operand->bitm == 0xfffe
3301 && operand->shift == 0)
3302 reloc = BFD_RELOC_PPC_VLE_REL15;
3303 else if ((operand->flags & PPC_OPERAND_RELATIVE) != 0
3304 && operand->bitm == 0x1fffffe
3305 && operand->shift == 0)
3306 reloc = BFD_RELOC_PPC_VLE_REL24;
3307 else if ((operand->flags & PPC_OPERAND_NEGATIVE) == 0
3308 && (operand->bitm & 0xfff0) == 0xfff0
3309 && operand->shift == 0)
3311 reloc = BFD_RELOC_16;
3312 #if defined OBJ_XCOFF || defined OBJ_ELF
3313 /* Note: the symbol may be not yet defined. */
3314 if ((operand->flags & PPC_OPERAND_PARENS) != 0
3315 && ppc_is_toc_sym (ex.X_add_symbol))
3317 reloc = BFD_RELOC_PPC_TOC16;
3319 as_warn (_("assuming %s on symbol"),
3320 ppc_obj64 ? "@toc" : "@xgot");
3326 /* For the absolute forms of branches, convert the PC
3327 relative form back into the absolute. */
3328 if ((operand->flags & PPC_OPERAND_ABSOLUTE) != 0)
3332 case BFD_RELOC_PPC_B26:
3333 reloc = BFD_RELOC_PPC_BA26;
3335 case BFD_RELOC_PPC_B16:
3336 reloc = BFD_RELOC_PPC_BA16;
3339 case BFD_RELOC_PPC_B16_BRTAKEN:
3340 reloc = BFD_RELOC_PPC_BA16_BRTAKEN;
3342 case BFD_RELOC_PPC_B16_BRNTAKEN:
3343 reloc = BFD_RELOC_PPC_BA16_BRNTAKEN;
3354 case BFD_RELOC_PPC_TOC16:
3355 toc_reloc_types |= has_small_toc_reloc;
3357 case BFD_RELOC_PPC64_TOC16_LO:
3358 case BFD_RELOC_PPC64_TOC16_HI:
3359 case BFD_RELOC_PPC64_TOC16_HA:
3360 toc_reloc_types |= has_large_toc_reloc;
3367 && (operand->flags & (PPC_OPERAND_DS | PPC_OPERAND_DQ)) != 0)
3372 reloc = BFD_RELOC_PPC64_ADDR16_DS;
3374 case BFD_RELOC_LO16:
3375 reloc = BFD_RELOC_PPC64_ADDR16_LO_DS;
3377 case BFD_RELOC_16_GOTOFF:
3378 reloc = BFD_RELOC_PPC64_GOT16_DS;
3380 case BFD_RELOC_LO16_GOTOFF:
3381 reloc = BFD_RELOC_PPC64_GOT16_LO_DS;
3383 case BFD_RELOC_LO16_PLTOFF:
3384 reloc = BFD_RELOC_PPC64_PLT16_LO_DS;
3386 case BFD_RELOC_16_BASEREL:
3387 reloc = BFD_RELOC_PPC64_SECTOFF_DS;
3389 case BFD_RELOC_LO16_BASEREL:
3390 reloc = BFD_RELOC_PPC64_SECTOFF_LO_DS;
3392 case BFD_RELOC_PPC_TOC16:
3393 reloc = BFD_RELOC_PPC64_TOC16_DS;
3395 case BFD_RELOC_PPC64_TOC16_LO:
3396 reloc = BFD_RELOC_PPC64_TOC16_LO_DS;
3398 case BFD_RELOC_PPC64_PLTGOT16:
3399 reloc = BFD_RELOC_PPC64_PLTGOT16_DS;
3401 case BFD_RELOC_PPC64_PLTGOT16_LO:
3402 reloc = BFD_RELOC_PPC64_PLTGOT16_LO_DS;
3404 case BFD_RELOC_PPC_DTPREL16:
3405 reloc = BFD_RELOC_PPC64_DTPREL16_DS;
3407 case BFD_RELOC_PPC_DTPREL16_LO:
3408 reloc = BFD_RELOC_PPC64_DTPREL16_LO_DS;
3410 case BFD_RELOC_PPC_TPREL16:
3411 reloc = BFD_RELOC_PPC64_TPREL16_DS;
3413 case BFD_RELOC_PPC_TPREL16_LO:
3414 reloc = BFD_RELOC_PPC64_TPREL16_LO_DS;
3416 case BFD_RELOC_PPC_GOT_DTPREL16:
3417 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
3418 case BFD_RELOC_PPC_GOT_TPREL16:
3419 case BFD_RELOC_PPC_GOT_TPREL16_LO:
3422 as_bad (_("unsupported relocation for DS offset field"));
3428 /* We need to generate a fixup for this expression. */
3429 if (fc >= MAX_INSN_FIXUPS)
3430 as_fatal (_("too many fixups"));
3431 fixups[fc].exp = ex;
3432 fixups[fc].opindex = *opindex_ptr;
3433 fixups[fc].reloc = reloc;
3441 /* If expecting more operands, then we want to see "),". */
3442 if (*str == endc && opindex_ptr[1] != 0)
3446 while (ISSPACE (*str));
3450 else if ((operand->flags & PPC_OPERAND_PARENS) != 0)
3458 /* The call to expression should have advanced str past any
3461 && (endc != ',' || *str != '\0'))
3464 as_bad (_("syntax error; end of line, expected `%c'"), endc);
3466 as_bad (_("syntax error; found `%c', expected `%c'"), *str, endc);
3474 while (ISSPACE (*str))
3478 as_bad (_("junk at end of line: `%s'"), str);
3481 /* Do we need/want an APUinfo section? */
3482 if ((ppc_cpu & (PPC_OPCODE_E500 | PPC_OPCODE_E500MC | PPC_OPCODE_VLE)) != 0
3485 /* These are all version "1". */
3486 if (opcode->flags & PPC_OPCODE_SPE)
3487 ppc_apuinfo_section_add (PPC_APUINFO_SPE, 1);
3488 if (opcode->flags & PPC_OPCODE_ISEL)
3489 ppc_apuinfo_section_add (PPC_APUINFO_ISEL, 1);
3490 if (opcode->flags & PPC_OPCODE_EFS)
3491 ppc_apuinfo_section_add (PPC_APUINFO_EFS, 1);
3492 if (opcode->flags & PPC_OPCODE_BRLOCK)
3493 ppc_apuinfo_section_add (PPC_APUINFO_BRLOCK, 1);
3494 if (opcode->flags & PPC_OPCODE_PMR)
3495 ppc_apuinfo_section_add (PPC_APUINFO_PMR, 1);
3496 if (opcode->flags & PPC_OPCODE_CACHELCK)
3497 ppc_apuinfo_section_add (PPC_APUINFO_CACHELCK, 1);
3498 if (opcode->flags & PPC_OPCODE_RFMCI)
3499 ppc_apuinfo_section_add (PPC_APUINFO_RFMCI, 1);
3500 /* Only set the VLE flag if the instruction has been pulled via
3501 the VLE instruction set. This way the flag is guaranteed to
3502 be set for VLE-only instructions or for VLE-only processors,
3503 however it'll remain clear for dual-mode instructions on
3504 dual-mode and, more importantly, standard-mode processors. */
3505 if ((ppc_cpu & opcode->flags) == PPC_OPCODE_VLE)
3507 ppc_apuinfo_section_add (PPC_APUINFO_VLE, 1);
3508 if (elf_section_data (now_seg) != NULL)
3509 elf_section_data (now_seg)->this_hdr.sh_flags |= SHF_PPC_VLE;
3514 /* Write out the instruction. */
3517 if ((ppc_cpu & PPC_OPCODE_VLE) != 0)
3518 /* All instructions can start on a 2 byte boundary for VLE. */
3521 if (frag_now->insn_addr != addr_mask)
3523 /* Don't emit instructions to a frag started for data, or for a
3524 CPU differing in VLE mode. Data is allowed to be misaligned,
3525 and it's possible to start a new frag in the middle of
3527 frag_wane (frag_now);
3531 /* Check that insns within the frag are aligned. ppc_frag_check
3532 will ensure that the frag start address is aligned. */
3533 if ((frag_now_fix () & addr_mask) != 0)
3534 as_bad (_("instruction address is not a multiple of %d"), addr_mask + 1);
3536 /* Differentiate between two and four byte insns. */
3538 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && PPC_OP_SE_VLE (insn))
3541 f = frag_more (insn_length);
3542 frag_now->insn_addr = addr_mask;
3543 md_number_to_chars (f, insn, insn_length);
3546 last_subseg = now_subseg;
3549 dwarf2_emit_insn (insn_length);
3552 /* Create any fixups. */
3553 for (i = 0; i < fc; i++)
3556 if (fixups[i].reloc != BFD_RELOC_NONE)
3558 reloc_howto_type *reloc_howto;
3562 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
3566 size = bfd_get_reloc_size (reloc_howto);
3567 offset = target_big_endian ? (insn_length - size) : 0;
3569 fixP = fix_new_exp (frag_now,
3570 f - frag_now->fr_literal + offset,
3573 reloc_howto->pc_relative,
3578 const struct powerpc_operand *operand;
3580 operand = &powerpc_operands[fixups[i].opindex];
3581 fixP = fix_new_exp (frag_now,
3582 f - frag_now->fr_literal,
3585 (operand->flags & PPC_OPERAND_RELATIVE) != 0,
3588 fixP->fx_pcrel_adjust = fixups[i].opindex;
3592 /* Handle a macro. Gather all the operands, transform them as
3593 described by the macro, and call md_assemble recursively. All the
3594 operands are separated by commas; we don't accept parentheses
3595 around operands here. */
3598 ppc_macro (char *str, const struct powerpc_macro *macro)
3609 /* Gather the users operands into the operands array. */
3614 if (count >= sizeof operands / sizeof operands[0])
3616 operands[count++] = s;
3617 s = strchr (s, ',');
3618 if (s == (char *) NULL)
3623 if (count != macro->operands)
3625 as_bad (_("wrong number of operands"));
3629 /* Work out how large the string must be (the size is unbounded
3630 because it includes user input). */
3632 format = macro->format;
3633 while (*format != '\0')
3642 arg = strtol (format + 1, &send, 10);
3643 know (send != format && arg < count);
3644 len += strlen (operands[arg]);
3649 /* Put the string together. */
3650 complete = s = XNEWVEC (char, len + 1);
3651 format = macro->format;
3652 while (*format != '\0')
3658 arg = strtol (format + 1, &send, 10);
3659 strcpy (s, operands[arg]);
3666 /* Assemble the constructed instruction. */
3667 md_assemble (complete);
3672 /* For ELF, add support for SHT_ORDERED. */
3675 ppc_section_type (char *str, size_t len)
3677 if (len == 7 && strncmp (str, "ordered", 7) == 0)
3684 ppc_section_flags (flagword flags, bfd_vma attr ATTRIBUTE_UNUSED, int type)
3686 if (type == SHT_ORDERED)
3687 flags |= SEC_ALLOC | SEC_LOAD | SEC_SORT_ENTRIES;
3693 ppc_elf_section_letter (int letter, const char **ptrmsg)
3698 *ptrmsg = _("bad .section directive: want a,e,v,w,x,M,S,G,T in string");
3701 #endif /* OBJ_ELF */
3704 /* Pseudo-op handling. */
3706 /* The .byte pseudo-op. This is similar to the normal .byte
3707 pseudo-op, but it can also take a single ASCII string. */
3710 ppc_byte (int ignore ATTRIBUTE_UNUSED)
3714 if (*input_line_pointer != '\"')
3720 /* Gather characters. A real double quote is doubled. Unusual
3721 characters are not permitted. */
3722 ++input_line_pointer;
3727 c = *input_line_pointer++;
3731 if (*input_line_pointer != '\"')
3733 ++input_line_pointer;
3736 FRAG_APPEND_1_CHAR (c);
3740 if (warn_476 && count != 0 && (now_seg->flags & SEC_CODE) != 0)
3741 as_warn (_("data in executable section"));
3742 demand_empty_rest_of_line ();
3747 /* XCOFF specific pseudo-op handling. */
3749 /* This is set if we are creating a .stabx symbol, since we don't want
3750 to handle symbol suffixes for such symbols. */
3751 static bfd_boolean ppc_stab_symbol;
3753 /* The .comm and .lcomm pseudo-ops for XCOFF. XCOFF puts common
3754 symbols in the .bss segment as though they were local common
3755 symbols, and uses a different smclas. The native Aix 4.3.3 assembler
3756 aligns .comm and .lcomm to 4 bytes. */
3759 ppc_comm (int lcomm)
3761 asection *current_seg = now_seg;
3762 subsegT current_subseg = now_subseg;
3768 symbolS *lcomm_sym = NULL;
3772 endc = get_symbol_name (&name);
3773 end_name = input_line_pointer;
3774 (void) restore_line_pointer (endc);
3776 if (*input_line_pointer != ',')
3778 as_bad (_("missing size"));
3779 ignore_rest_of_line ();
3782 ++input_line_pointer;
3784 size = get_absolute_expression ();
3787 as_bad (_("negative size"));
3788 ignore_rest_of_line ();
3794 /* The third argument to .comm is the alignment. */
3795 if (*input_line_pointer != ',')
3799 ++input_line_pointer;
3800 align = get_absolute_expression ();
3803 as_warn (_("ignoring bad alignment"));
3813 /* The third argument to .lcomm appears to be the real local
3814 common symbol to create. References to the symbol named in
3815 the first argument are turned into references to the third
3817 if (*input_line_pointer != ',')
3819 as_bad (_("missing real symbol name"));
3820 ignore_rest_of_line ();
3823 ++input_line_pointer;
3825 lcomm_endc = get_symbol_name (&lcomm_name);
3827 lcomm_sym = symbol_find_or_make (lcomm_name);
3829 (void) restore_line_pointer (lcomm_endc);
3831 /* The fourth argument to .lcomm is the alignment. */
3832 if (*input_line_pointer != ',')
3841 ++input_line_pointer;
3842 align = get_absolute_expression ();
3845 as_warn (_("ignoring bad alignment"));
3852 sym = symbol_find_or_make (name);
3855 if (S_IS_DEFINED (sym)
3856 || S_GET_VALUE (sym) != 0)
3858 as_bad (_("attempt to redefine symbol"));
3859 ignore_rest_of_line ();
3863 record_alignment (bss_section, align);
3866 || ! S_IS_DEFINED (lcomm_sym))
3875 S_SET_EXTERNAL (sym);
3879 symbol_get_tc (lcomm_sym)->output = 1;
3880 def_sym = lcomm_sym;
3884 subseg_set (bss_section, 1);
3885 frag_align (align, 0, 0);
3887 symbol_set_frag (def_sym, frag_now);
3888 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, def_sym,
3889 def_size, (char *) NULL);
3891 S_SET_SEGMENT (def_sym, bss_section);
3892 symbol_get_tc (def_sym)->align = align;
3896 /* Align the size of lcomm_sym. */
3897 symbol_get_frag (lcomm_sym)->fr_offset =
3898 ((symbol_get_frag (lcomm_sym)->fr_offset + (1 << align) - 1)
3899 &~ ((1 << align) - 1));
3900 if (align > symbol_get_tc (lcomm_sym)->align)
3901 symbol_get_tc (lcomm_sym)->align = align;
3906 /* Make sym an offset from lcomm_sym. */
3907 S_SET_SEGMENT (sym, bss_section);
3908 symbol_set_frag (sym, symbol_get_frag (lcomm_sym));
3909 S_SET_VALUE (sym, symbol_get_frag (lcomm_sym)->fr_offset);
3910 symbol_get_frag (lcomm_sym)->fr_offset += size;
3913 subseg_set (current_seg, current_subseg);
3915 demand_empty_rest_of_line ();
3918 /* The .csect pseudo-op. This switches us into a different
3919 subsegment. The first argument is a symbol whose value is the
3920 start of the .csect. In COFF, csect symbols get special aux
3921 entries defined by the x_csect field of union internal_auxent. The
3922 optional second argument is the alignment (the default is 2). */
3925 ppc_csect (int ignore ATTRIBUTE_UNUSED)
3932 endc = get_symbol_name (&name);
3934 sym = symbol_find_or_make (name);
3936 (void) restore_line_pointer (endc);
3938 if (S_GET_NAME (sym)[0] == '\0')
3940 /* An unnamed csect is assumed to be [PR]. */
3941 symbol_get_tc (sym)->symbol_class = XMC_PR;
3945 if (*input_line_pointer == ',')
3947 ++input_line_pointer;
3948 align = get_absolute_expression ();
3951 ppc_change_csect (sym, align);
3953 demand_empty_rest_of_line ();
3956 /* Change to a different csect. */
3959 ppc_change_csect (symbolS *sym, offsetT align)
3961 if (S_IS_DEFINED (sym))
3962 subseg_set (S_GET_SEGMENT (sym), symbol_get_tc (sym)->subseg);
3972 /* This is a new csect. We need to look at the symbol class to
3973 figure out whether it should go in the text section or the
3977 switch (symbol_get_tc (sym)->symbol_class)
3987 S_SET_SEGMENT (sym, text_section);
3988 symbol_get_tc (sym)->subseg = ppc_text_subsegment;
3989 ++ppc_text_subsegment;
3990 list_ptr = &ppc_text_csects;
4000 if (ppc_toc_csect != NULL
4001 && (symbol_get_tc (ppc_toc_csect)->subseg + 1
4002 == ppc_data_subsegment))
4004 S_SET_SEGMENT (sym, data_section);
4005 symbol_get_tc (sym)->subseg = ppc_data_subsegment;
4006 ++ppc_data_subsegment;
4007 list_ptr = &ppc_data_csects;
4013 /* We set the obstack chunk size to a small value before
4014 changing subsegments, so that we don't use a lot of memory
4015 space for what may be a small section. */
4016 hold_chunksize = chunksize;
4019 sec = subseg_new (segment_name (S_GET_SEGMENT (sym)),
4020 symbol_get_tc (sym)->subseg);
4022 chunksize = hold_chunksize;
4025 ppc_after_toc_frag = frag_now;
4027 record_alignment (sec, align);
4029 frag_align_code (align, 0);
4031 frag_align (align, 0, 0);
4033 symbol_set_frag (sym, frag_now);
4034 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4036 symbol_get_tc (sym)->align = align;
4037 symbol_get_tc (sym)->output = 1;
4038 symbol_get_tc (sym)->within = sym;
4040 for (list = *list_ptr;
4041 symbol_get_tc (list)->next != (symbolS *) NULL;
4042 list = symbol_get_tc (list)->next)
4044 symbol_get_tc (list)->next = sym;
4046 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4047 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4051 ppc_current_csect = sym;
4055 ppc_change_debug_section (unsigned int idx, subsegT subseg)
4059 const struct xcoff_dwsect_name *dw = &xcoff_dwsect_names[idx];
4061 sec = subseg_new (dw->name, subseg);
4062 oldflags = bfd_get_section_flags (stdoutput, sec);
4063 if (oldflags == SEC_NO_FLAGS)
4065 /* Just created section. */
4066 gas_assert (dw_sections[idx].sect == NULL);
4068 bfd_set_section_flags (stdoutput, sec, SEC_DEBUGGING);
4069 bfd_set_section_alignment (stdoutput, sec, 0);
4070 dw_sections[idx].sect = sec;
4073 /* Not anymore in a csect. */
4074 ppc_current_csect = NULL;
4077 /* The .dwsect pseudo-op. Defines a DWARF section. Syntax is:
4078 .dwsect flag [, opt-label ]
4082 ppc_dwsect (int ignore ATTRIBUTE_UNUSED)
4086 const struct xcoff_dwsect_name *dw;
4087 struct dw_subsection *subseg;
4088 struct dw_section *dws;
4092 flag = get_absolute_expression ();
4094 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4095 if (xcoff_dwsect_names[i].flag == flag)
4097 dw = &xcoff_dwsect_names[i];
4101 /* Parse opt-label. */
4102 if (*input_line_pointer == ',')
4107 ++input_line_pointer;
4109 c = get_symbol_name (&label);
4110 opt_label = symbol_find_or_make (label);
4111 (void) restore_line_pointer (c);
4116 demand_empty_rest_of_line ();
4118 /* Return now in case of unknown subsection. */
4121 as_bad (_("no known dwarf XCOFF section for flag 0x%08x\n"),
4126 /* Find the subsection. */
4127 dws = &dw_sections[i];
4129 if (opt_label != NULL && S_IS_DEFINED (opt_label))
4131 /* Sanity check (note that in theory S_GET_SEGMENT mustn't be null). */
4132 if (dws->sect == NULL || S_GET_SEGMENT (opt_label) != dws->sect)
4134 as_bad (_("label %s was not defined in this dwarf section"),
4135 S_GET_NAME (opt_label));
4136 subseg = dws->anon_subseg;
4140 subseg = symbol_get_tc (opt_label)->u.dw;
4145 /* Switch to the subsection. */
4146 ppc_change_debug_section (i, subseg->subseg);
4150 /* Create a new dw subsection. */
4151 subseg = XNEW (struct dw_subsection);
4153 if (opt_label == NULL)
4155 /* The anonymous one. */
4157 subseg->link = NULL;
4158 dws->anon_subseg = subseg;
4163 if (dws->list_subseg != NULL)
4164 subseg->subseg = dws->list_subseg->subseg + 1;
4168 subseg->link = dws->list_subseg;
4169 dws->list_subseg = subseg;
4170 symbol_get_tc (opt_label)->u.dw = subseg;
4173 ppc_change_debug_section (i, subseg->subseg);
4177 /* Add the length field. */
4178 expressionS *exp = &subseg->end_exp;
4181 if (opt_label != NULL)
4182 symbol_set_value_now (opt_label);
4184 /* Add the length field. Note that according to the AIX assembler
4185 manual, the size of the length field is 4 for powerpc32 but
4186 12 for powerpc64. */
4189 /* Write the 64bit marker. */
4190 md_number_to_chars (frag_more (4), -1, 4);
4193 exp->X_op = O_subtract;
4194 exp->X_op_symbol = symbol_temp_new_now ();
4195 exp->X_add_symbol = symbol_temp_make ();
4197 sz = ppc_obj64 ? 8 : 4;
4198 exp->X_add_number = -sz;
4199 emit_expr (exp, sz);
4204 /* This function handles the .text and .data pseudo-ops. These
4205 pseudo-ops aren't really used by XCOFF; we implement them for the
4206 convenience of people who aren't used to XCOFF. */
4209 ppc_section (int type)
4216 else if (type == 'd')
4221 sym = symbol_find_or_make (name);
4223 ppc_change_csect (sym, 2);
4225 demand_empty_rest_of_line ();
4228 /* This function handles the .section pseudo-op. This is mostly to
4229 give an error, since XCOFF only supports .text, .data and .bss, but
4230 we do permit the user to name the text or data section. */
4233 ppc_named_section (int ignore ATTRIBUTE_UNUSED)
4236 const char *real_name;
4240 c = get_symbol_name (&user_name);
4242 if (strcmp (user_name, ".text") == 0)
4243 real_name = ".text[PR]";
4244 else if (strcmp (user_name, ".data") == 0)
4245 real_name = ".data[RW]";
4248 as_bad (_("the XCOFF file format does not support arbitrary sections"));
4249 (void) restore_line_pointer (c);
4250 ignore_rest_of_line ();
4254 (void) restore_line_pointer (c);
4256 sym = symbol_find_or_make (real_name);
4258 ppc_change_csect (sym, 2);
4260 demand_empty_rest_of_line ();
4263 /* The .extern pseudo-op. We create an undefined symbol. */
4266 ppc_extern (int ignore ATTRIBUTE_UNUSED)
4271 endc = get_symbol_name (&name);
4273 (void) symbol_find_or_make (name);
4275 (void) restore_line_pointer (endc);
4277 demand_empty_rest_of_line ();
4280 /* The .lglobl pseudo-op. Keep the symbol in the symbol table. */
4283 ppc_lglobl (int ignore ATTRIBUTE_UNUSED)
4289 endc = get_symbol_name (&name);
4291 sym = symbol_find_or_make (name);
4293 (void) restore_line_pointer (endc);
4295 symbol_get_tc (sym)->output = 1;
4297 demand_empty_rest_of_line ();
4300 /* The .ref pseudo-op. It takes a list of symbol names and inserts R_REF
4301 relocations at the beginning of the current csect.
4303 (In principle, there's no reason why the relocations _have_ to be at
4304 the beginning. Anywhere in the csect would do. However, inserting
4305 at the beginning is what the native assembler does, and it helps to
4306 deal with cases where the .ref statements follow the section contents.)
4308 ??? .refs don't work for empty .csects. However, the native assembler
4309 doesn't report an error in this case, and neither yet do we. */
4312 ppc_ref (int ignore ATTRIBUTE_UNUSED)
4317 if (ppc_current_csect == NULL)
4319 as_bad (_(".ref outside .csect"));
4320 ignore_rest_of_line ();
4326 c = get_symbol_name (&name);
4328 fix_at_start (symbol_get_frag (ppc_current_csect), 0,
4329 symbol_find_or_make (name), 0, FALSE, BFD_RELOC_NONE);
4331 *input_line_pointer = c;
4332 SKIP_WHITESPACE_AFTER_NAME ();
4333 c = *input_line_pointer;
4336 input_line_pointer++;
4338 if (is_end_of_line[(unsigned char) *input_line_pointer])
4340 as_bad (_("missing symbol name"));
4341 ignore_rest_of_line ();
4348 demand_empty_rest_of_line ();
4351 /* The .rename pseudo-op. The RS/6000 assembler can rename symbols,
4352 although I don't know why it bothers. */
4355 ppc_rename (int ignore ATTRIBUTE_UNUSED)
4362 endc = get_symbol_name (&name);
4364 sym = symbol_find_or_make (name);
4366 (void) restore_line_pointer (endc);
4368 if (*input_line_pointer != ',')
4370 as_bad (_("missing rename string"));
4371 ignore_rest_of_line ();
4374 ++input_line_pointer;
4376 symbol_get_tc (sym)->real_name = demand_copy_C_string (&len);
4378 demand_empty_rest_of_line ();
4381 /* The .stabx pseudo-op. This is similar to a normal .stabs
4382 pseudo-op, but slightly different. A sample is
4383 .stabx "main:F-1",.main,142,0
4384 The first argument is the symbol name to create. The second is the
4385 value, and the third is the storage class. The fourth seems to be
4386 always zero, and I am assuming it is the type. */
4389 ppc_stabx (int ignore ATTRIBUTE_UNUSED)
4396 name = demand_copy_C_string (&len);
4398 if (*input_line_pointer != ',')
4400 as_bad (_("missing value"));
4403 ++input_line_pointer;
4405 ppc_stab_symbol = TRUE;
4406 sym = symbol_make (name);
4407 ppc_stab_symbol = FALSE;
4409 symbol_get_tc (sym)->real_name = name;
4411 (void) expression (&exp);
4418 as_bad (_("illegal .stabx expression; zero assumed"));
4419 exp.X_add_number = 0;
4422 S_SET_VALUE (sym, (valueT) exp.X_add_number);
4423 symbol_set_frag (sym, &zero_address_frag);
4427 if (S_GET_SEGMENT (exp.X_add_symbol) == undefined_section)
4428 symbol_set_value_expression (sym, &exp);
4432 exp.X_add_number + S_GET_VALUE (exp.X_add_symbol));
4433 symbol_set_frag (sym, symbol_get_frag (exp.X_add_symbol));
4438 /* The value is some complex expression. This will probably
4439 fail at some later point, but this is probably the right
4440 thing to do here. */
4441 symbol_set_value_expression (sym, &exp);
4445 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4446 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4448 if (*input_line_pointer != ',')
4450 as_bad (_("missing class"));
4453 ++input_line_pointer;
4455 S_SET_STORAGE_CLASS (sym, get_absolute_expression ());
4457 if (*input_line_pointer != ',')
4459 as_bad (_("missing type"));
4462 ++input_line_pointer;
4464 S_SET_DATA_TYPE (sym, get_absolute_expression ());
4466 symbol_get_tc (sym)->output = 1;
4468 if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
4473 .stabx "z",arrays_,133,0
4476 .comm arrays_,13768,3
4478 resolve_symbol_value will copy the exp's "within" into sym's when the
4479 offset is 0. Since this seems to be corner case problem,
4480 only do the correction for storage class C_STSYM. A better solution
4481 would be to have the tc field updated in ppc_symbol_new_hook. */
4483 if (exp.X_op == O_symbol)
4485 if (ppc_current_block == NULL)
4486 as_bad (_(".stabx of storage class stsym must be within .bs/.es"));
4488 symbol_get_tc (sym)->within = ppc_current_block;
4489 symbol_get_tc (exp.X_add_symbol)->within = ppc_current_block;
4493 if (exp.X_op != O_symbol
4494 || ! S_IS_EXTERNAL (exp.X_add_symbol)
4495 || S_GET_SEGMENT (exp.X_add_symbol) != bss_section)
4496 ppc_frob_label (sym);
4499 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4500 symbol_append (sym, exp.X_add_symbol, &symbol_rootP, &symbol_lastP);
4501 if (symbol_get_tc (ppc_current_csect)->within == exp.X_add_symbol)
4502 symbol_get_tc (ppc_current_csect)->within = sym;
4505 demand_empty_rest_of_line ();
4508 /* The .function pseudo-op. This takes several arguments. The first
4509 argument seems to be the external name of the symbol. The second
4510 argument seems to be the label for the start of the function. gcc
4511 uses the same name for both. I have no idea what the third and
4512 fourth arguments are meant to be. The optional fifth argument is
4513 an expression for the size of the function. In COFF this symbol
4514 gets an aux entry like that used for a csect. */
4517 ppc_function (int ignore ATTRIBUTE_UNUSED)
4525 endc = get_symbol_name (&name);
4527 /* Ignore any [PR] suffix. */
4528 name = ppc_canonicalize_symbol_name (name);
4529 s = strchr (name, '[');
4530 if (s != (char *) NULL
4531 && strcmp (s + 1, "PR]") == 0)
4534 ext_sym = symbol_find_or_make (name);
4536 (void) restore_line_pointer (endc);
4538 if (*input_line_pointer != ',')
4540 as_bad (_("missing symbol name"));
4541 ignore_rest_of_line ();
4544 ++input_line_pointer;
4546 endc = get_symbol_name (&name);
4548 lab_sym = symbol_find_or_make (name);
4550 (void) restore_line_pointer (endc);
4552 if (ext_sym != lab_sym)
4556 exp.X_op = O_symbol;
4557 exp.X_add_symbol = lab_sym;
4558 exp.X_op_symbol = NULL;
4559 exp.X_add_number = 0;
4561 symbol_set_value_expression (ext_sym, &exp);
4564 if (symbol_get_tc (ext_sym)->symbol_class == -1)
4565 symbol_get_tc (ext_sym)->symbol_class = XMC_PR;
4566 symbol_get_tc (ext_sym)->output = 1;
4568 if (*input_line_pointer == ',')
4572 /* Ignore the third argument. */
4573 ++input_line_pointer;
4575 if (*input_line_pointer == ',')
4577 /* Ignore the fourth argument. */
4578 ++input_line_pointer;
4580 if (*input_line_pointer == ',')
4582 /* The fifth argument is the function size. */
4583 ++input_line_pointer;
4584 symbol_get_tc (ext_sym)->u.size = symbol_new
4585 ("L0\001", absolute_section,(valueT) 0, &zero_address_frag);
4586 pseudo_set (symbol_get_tc (ext_sym)->u.size);
4591 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
4592 SF_SET_FUNCTION (ext_sym);
4593 SF_SET_PROCESS (ext_sym);
4594 coff_add_linesym (ext_sym);
4596 demand_empty_rest_of_line ();
4599 /* The .bf pseudo-op. This is just like a COFF C_FCN symbol named
4600 ".bf". If the pseudo op .bi was seen before .bf, patch the .bi sym
4601 with the correct line number */
4603 static symbolS *saved_bi_sym = 0;
4606 ppc_bf (int ignore ATTRIBUTE_UNUSED)
4610 sym = symbol_make (".bf");
4611 S_SET_SEGMENT (sym, text_section);
4612 symbol_set_frag (sym, frag_now);
4613 S_SET_VALUE (sym, frag_now_fix ());
4614 S_SET_STORAGE_CLASS (sym, C_FCN);
4616 coff_line_base = get_absolute_expression ();
4618 S_SET_NUMBER_AUXILIARY (sym, 1);
4619 SA_SET_SYM_LNNO (sym, coff_line_base);
4621 /* Line number for bi. */
4624 S_SET_VALUE (saved_bi_sym, coff_n_line_nos);
4629 symbol_get_tc (sym)->output = 1;
4631 ppc_frob_label (sym);
4633 demand_empty_rest_of_line ();
4636 /* The .ef pseudo-op. This is just like a COFF C_FCN symbol named
4637 ".ef", except that the line number is absolute, not relative to the
4638 most recent ".bf" symbol. */
4641 ppc_ef (int ignore ATTRIBUTE_UNUSED)
4645 sym = symbol_make (".ef");
4646 S_SET_SEGMENT (sym, text_section);
4647 symbol_set_frag (sym, frag_now);
4648 S_SET_VALUE (sym, frag_now_fix ());
4649 S_SET_STORAGE_CLASS (sym, C_FCN);
4650 S_SET_NUMBER_AUXILIARY (sym, 1);
4651 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4652 symbol_get_tc (sym)->output = 1;
4654 ppc_frob_label (sym);
4656 demand_empty_rest_of_line ();
4659 /* The .bi and .ei pseudo-ops. These take a string argument and
4660 generates a C_BINCL or C_EINCL symbol, which goes at the start of
4661 the symbol list. The value of .bi will be know when the next .bf
4667 static symbolS *last_biei;
4674 name = demand_copy_C_string (&len);
4676 /* The value of these symbols is actually file offset. Here we set
4677 the value to the index into the line number entries. In
4678 ppc_frob_symbols we set the fix_line field, which will cause BFD
4679 to do the right thing. */
4681 sym = symbol_make (name);
4682 /* obj-coff.c currently only handles line numbers correctly in the
4684 S_SET_SEGMENT (sym, text_section);
4685 S_SET_VALUE (sym, coff_n_line_nos);
4686 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4688 S_SET_STORAGE_CLASS (sym, ei ? C_EINCL : C_BINCL);
4689 symbol_get_tc (sym)->output = 1;
4697 for (look = last_biei ? last_biei : symbol_rootP;
4698 (look != (symbolS *) NULL
4699 && (S_GET_STORAGE_CLASS (look) == C_FILE
4700 || S_GET_STORAGE_CLASS (look) == C_BINCL
4701 || S_GET_STORAGE_CLASS (look) == C_EINCL));
4702 look = symbol_next (look))
4704 if (look != (symbolS *) NULL)
4706 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4707 symbol_insert (sym, look, &symbol_rootP, &symbol_lastP);
4711 demand_empty_rest_of_line ();
4714 /* The .bs pseudo-op. This generates a C_BSTAT symbol named ".bs".
4715 There is one argument, which is a csect symbol. The value of the
4716 .bs symbol is the index of this csect symbol. */
4719 ppc_bs (int ignore ATTRIBUTE_UNUSED)
4726 if (ppc_current_block != NULL)
4727 as_bad (_("nested .bs blocks"));
4729 endc = get_symbol_name (&name);
4731 csect = symbol_find_or_make (name);
4733 (void) restore_line_pointer (endc);
4735 sym = symbol_make (".bs");
4736 S_SET_SEGMENT (sym, now_seg);
4737 S_SET_STORAGE_CLASS (sym, C_BSTAT);
4738 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4739 symbol_get_tc (sym)->output = 1;
4741 symbol_get_tc (sym)->within = csect;
4743 ppc_frob_label (sym);
4745 ppc_current_block = sym;
4747 demand_empty_rest_of_line ();
4750 /* The .es pseudo-op. Generate a C_ESTART symbol named .es. */
4753 ppc_es (int ignore ATTRIBUTE_UNUSED)
4757 if (ppc_current_block == NULL)
4758 as_bad (_(".es without preceding .bs"));
4760 sym = symbol_make (".es");
4761 S_SET_SEGMENT (sym, now_seg);
4762 S_SET_STORAGE_CLASS (sym, C_ESTAT);
4763 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4764 symbol_get_tc (sym)->output = 1;
4766 ppc_frob_label (sym);
4768 ppc_current_block = NULL;
4770 demand_empty_rest_of_line ();
4773 /* The .bb pseudo-op. Generate a C_BLOCK symbol named .bb, with a
4777 ppc_bb (int ignore ATTRIBUTE_UNUSED)
4781 sym = symbol_make (".bb");
4782 S_SET_SEGMENT (sym, text_section);
4783 symbol_set_frag (sym, frag_now);
4784 S_SET_VALUE (sym, frag_now_fix ());
4785 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4787 S_SET_NUMBER_AUXILIARY (sym, 1);
4788 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4790 symbol_get_tc (sym)->output = 1;
4792 SF_SET_PROCESS (sym);
4794 ppc_frob_label (sym);
4796 demand_empty_rest_of_line ();
4799 /* The .eb pseudo-op. Generate a C_BLOCK symbol named .eb, with a
4803 ppc_eb (int ignore ATTRIBUTE_UNUSED)
4807 sym = symbol_make (".eb");
4808 S_SET_SEGMENT (sym, text_section);
4809 symbol_set_frag (sym, frag_now);
4810 S_SET_VALUE (sym, frag_now_fix ());
4811 S_SET_STORAGE_CLASS (sym, C_BLOCK);
4812 S_SET_NUMBER_AUXILIARY (sym, 1);
4813 SA_SET_SYM_LNNO (sym, get_absolute_expression ());
4814 symbol_get_tc (sym)->output = 1;
4816 SF_SET_PROCESS (sym);
4818 ppc_frob_label (sym);
4820 demand_empty_rest_of_line ();
4823 /* The .bc pseudo-op. This just creates a C_BCOMM symbol with a
4827 ppc_bc (int ignore ATTRIBUTE_UNUSED)
4833 name = demand_copy_C_string (&len);
4834 sym = symbol_make (name);
4835 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4836 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4837 S_SET_STORAGE_CLASS (sym, C_BCOMM);
4838 S_SET_VALUE (sym, 0);
4839 symbol_get_tc (sym)->output = 1;
4841 ppc_frob_label (sym);
4843 demand_empty_rest_of_line ();
4846 /* The .ec pseudo-op. This just creates a C_ECOMM symbol. */
4849 ppc_ec (int ignore ATTRIBUTE_UNUSED)
4853 sym = symbol_make (".ec");
4854 S_SET_SEGMENT (sym, ppc_coff_debug_section);
4855 symbol_get_bfdsym (sym)->flags |= BSF_DEBUGGING;
4856 S_SET_STORAGE_CLASS (sym, C_ECOMM);
4857 S_SET_VALUE (sym, 0);
4858 symbol_get_tc (sym)->output = 1;
4860 ppc_frob_label (sym);
4862 demand_empty_rest_of_line ();
4865 /* The .toc pseudo-op. Switch to the .toc subsegment. */
4868 ppc_toc (int ignore ATTRIBUTE_UNUSED)
4870 if (ppc_toc_csect != (symbolS *) NULL)
4871 subseg_set (data_section, symbol_get_tc (ppc_toc_csect)->subseg);
4878 subseg = ppc_data_subsegment;
4879 ++ppc_data_subsegment;
4881 subseg_new (segment_name (data_section), subseg);
4882 ppc_toc_frag = frag_now;
4884 sym = symbol_find_or_make ("TOC[TC0]");
4885 symbol_set_frag (sym, frag_now);
4886 S_SET_SEGMENT (sym, data_section);
4887 S_SET_VALUE (sym, (valueT) frag_now_fix ());
4888 symbol_get_tc (sym)->subseg = subseg;
4889 symbol_get_tc (sym)->output = 1;
4890 symbol_get_tc (sym)->within = sym;
4892 ppc_toc_csect = sym;
4894 for (list = ppc_data_csects;
4895 symbol_get_tc (list)->next != (symbolS *) NULL;
4896 list = symbol_get_tc (list)->next)
4898 symbol_get_tc (list)->next = sym;
4900 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
4901 symbol_append (sym, symbol_get_tc (list)->within, &symbol_rootP,
4905 ppc_current_csect = ppc_toc_csect;
4907 demand_empty_rest_of_line ();
4910 /* The AIX assembler automatically aligns the operands of a .long or
4911 .short pseudo-op, and we want to be compatible. */
4914 ppc_xcoff_cons (int log_size)
4916 frag_align (log_size, 0, 0);
4917 record_alignment (now_seg, log_size);
4918 cons (1 << log_size);
4922 ppc_vbyte (int dummy ATTRIBUTE_UNUSED)
4927 (void) expression (&exp);
4929 if (exp.X_op != O_constant)
4931 as_bad (_("non-constant byte count"));
4935 byte_count = exp.X_add_number;
4937 if (*input_line_pointer != ',')
4939 as_bad (_("missing value"));
4943 ++input_line_pointer;
4948 ppc_xcoff_end (void)
4952 for (i = 0; i < XCOFF_DWSECT_NBR_NAMES; i++)
4954 struct dw_section *dws = &dw_sections[i];
4955 struct dw_subsection *dwss;
4957 if (dws->anon_subseg)
4959 dwss = dws->anon_subseg;
4960 dwss->link = dws->list_subseg;
4963 dwss = dws->list_subseg;
4965 for (; dwss != NULL; dwss = dwss->link)
4966 if (dwss->end_exp.X_add_symbol != NULL)
4968 subseg_set (dws->sect, dwss->subseg);
4969 symbol_set_value_now (dwss->end_exp.X_add_symbol);
4974 #endif /* OBJ_XCOFF */
4975 #if defined (OBJ_XCOFF) || defined (OBJ_ELF)
4977 /* The .tc pseudo-op. This is used when generating either XCOFF or
4978 ELF. This takes two or more arguments.
4980 When generating XCOFF output, the first argument is the name to
4981 give to this location in the toc; this will be a symbol with class
4982 TC. The rest of the arguments are N-byte values to actually put at
4983 this location in the TOC; often there is just one more argument, a
4984 relocatable symbol reference. The size of the value to store
4985 depends on target word size. A 32-bit target uses 4-byte values, a
4986 64-bit target uses 8-byte values.
4988 When not generating XCOFF output, the arguments are the same, but
4989 the first argument is simply ignored. */
4992 ppc_tc (int ignore ATTRIBUTE_UNUSED)
4996 /* Define the TOC symbol name. */
5002 if (ppc_toc_csect == (symbolS *) NULL
5003 || ppc_toc_csect != ppc_current_csect)
5005 as_bad (_(".tc not in .toc section"));
5006 ignore_rest_of_line ();
5010 endc = get_symbol_name (&name);
5012 sym = symbol_find_or_make (name);
5014 (void) restore_line_pointer (endc);
5016 if (S_IS_DEFINED (sym))
5020 label = symbol_get_tc (ppc_current_csect)->within;
5021 if (symbol_get_tc (label)->symbol_class != XMC_TC0)
5023 as_bad (_(".tc with no label"));
5024 ignore_rest_of_line ();
5028 S_SET_SEGMENT (label, S_GET_SEGMENT (sym));
5029 symbol_set_frag (label, symbol_get_frag (sym));
5030 S_SET_VALUE (label, S_GET_VALUE (sym));
5032 while (! is_end_of_line[(unsigned char) *input_line_pointer])
5033 ++input_line_pointer;
5038 S_SET_SEGMENT (sym, now_seg);
5039 symbol_set_frag (sym, frag_now);
5040 S_SET_VALUE (sym, (valueT) frag_now_fix ());
5041 symbol_get_tc (sym)->symbol_class = XMC_TC;
5042 symbol_get_tc (sym)->output = 1;
5044 ppc_frob_label (sym);
5047 #endif /* OBJ_XCOFF */
5051 /* Skip the TOC symbol name. */
5052 while (is_part_of_name (*input_line_pointer)
5053 || *input_line_pointer == ' '
5054 || *input_line_pointer == '['
5055 || *input_line_pointer == ']'
5056 || *input_line_pointer == '{'
5057 || *input_line_pointer == '}')
5058 ++input_line_pointer;
5060 /* Align to a four/eight byte boundary. */
5061 align = ppc_obj64 ? 3 : 2;
5062 frag_align (align, 0, 0);
5063 record_alignment (now_seg, align);
5064 #endif /* OBJ_ELF */
5066 if (*input_line_pointer != ',')
5067 demand_empty_rest_of_line ();
5070 ++input_line_pointer;
5071 cons (ppc_obj64 ? 8 : 4);
5075 /* Pseudo-op .machine. */
5078 ppc_machine (int ignore ATTRIBUTE_UNUSED)
5082 #define MAX_HISTORY 100
5083 static ppc_cpu_t *cpu_history;
5084 static int curr_hist;
5088 c = get_symbol_name (&cpu_string);
5089 cpu_string = xstrdup (cpu_string);
5090 (void) restore_line_pointer (c);
5092 if (cpu_string != NULL)
5094 ppc_cpu_t old_cpu = ppc_cpu;
5098 for (p = cpu_string; *p != 0; p++)
5101 if (strcmp (cpu_string, "push") == 0)
5103 if (cpu_history == NULL)
5104 cpu_history = XNEWVEC (ppc_cpu_t, MAX_HISTORY);
5106 if (curr_hist >= MAX_HISTORY)
5107 as_bad (_(".machine stack overflow"));
5109 cpu_history[curr_hist++] = ppc_cpu;
5111 else if (strcmp (cpu_string, "pop") == 0)
5114 as_bad (_(".machine stack underflow"));
5116 ppc_cpu = cpu_history[--curr_hist];
5118 else if ((new_cpu = ppc_parse_cpu (ppc_cpu, &sticky, cpu_string)) != 0)
5121 as_bad (_("invalid machine `%s'"), cpu_string);
5123 if (ppc_cpu != old_cpu)
5124 ppc_setup_opcodes ();
5127 demand_empty_rest_of_line ();
5129 #endif /* defined (OBJ_XCOFF) || defined (OBJ_ELF) */
5133 /* Pseudo-ops specific to the Windows NT PowerPC PE (coff) format. */
5135 /* Set the current section. */
5137 ppc_set_current_section (segT new)
5139 ppc_previous_section = ppc_current_section;
5140 ppc_current_section = new;
5143 /* pseudo-op: .previous
5144 behaviour: toggles the current section with the previous section.
5146 warnings: "No previous section" */
5149 ppc_previous (int ignore ATTRIBUTE_UNUSED)
5151 if (ppc_previous_section == NULL)
5153 as_warn (_("no previous section to return to, ignored."));
5157 subseg_set (ppc_previous_section, 0);
5159 ppc_set_current_section (ppc_previous_section);
5162 /* pseudo-op: .pdata
5163 behaviour: predefined read only data section
5167 initial: .section .pdata "adr3"
5168 a - don't know -- maybe a misprint
5169 d - initialized data
5171 3 - double word aligned (that would be 4 byte boundary)
5174 Tag index tables (also known as the function table) for exception
5175 handling, debugging, etc. */
5178 ppc_pdata (int ignore ATTRIBUTE_UNUSED)
5180 if (pdata_section == 0)
5182 pdata_section = subseg_new (".pdata", 0);
5184 bfd_set_section_flags (stdoutput, pdata_section,
5185 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5186 | SEC_READONLY | SEC_DATA ));
5188 bfd_set_section_alignment (stdoutput, pdata_section, 2);
5192 pdata_section = subseg_new (".pdata", 0);
5194 ppc_set_current_section (pdata_section);
5197 /* pseudo-op: .ydata
5198 behaviour: predefined read only data section
5202 initial: .section .ydata "drw3"
5203 a - don't know -- maybe a misprint
5204 d - initialized data
5206 3 - double word aligned (that would be 4 byte boundary)
5208 Tag tables (also known as the scope table) for exception handling,
5212 ppc_ydata (int ignore ATTRIBUTE_UNUSED)
5214 if (ydata_section == 0)
5216 ydata_section = subseg_new (".ydata", 0);
5217 bfd_set_section_flags (stdoutput, ydata_section,
5218 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5219 | SEC_READONLY | SEC_DATA ));
5221 bfd_set_section_alignment (stdoutput, ydata_section, 3);
5225 ydata_section = subseg_new (".ydata", 0);
5227 ppc_set_current_section (ydata_section);
5230 /* pseudo-op: .reldata
5231 behaviour: predefined read write data section
5232 double word aligned (4-byte)
5233 FIXME: relocation is applied to it
5234 FIXME: what's the difference between this and .data?
5237 initial: .section .reldata "drw3"
5238 d - initialized data
5241 3 - double word aligned (that would be 8 byte boundary)
5244 Like .data, but intended to hold data subject to relocation, such as
5245 function descriptors, etc. */
5248 ppc_reldata (int ignore ATTRIBUTE_UNUSED)
5250 if (reldata_section == 0)
5252 reldata_section = subseg_new (".reldata", 0);
5254 bfd_set_section_flags (stdoutput, reldata_section,
5255 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5258 bfd_set_section_alignment (stdoutput, reldata_section, 2);
5262 reldata_section = subseg_new (".reldata", 0);
5264 ppc_set_current_section (reldata_section);
5267 /* pseudo-op: .rdata
5268 behaviour: predefined read only data section
5272 initial: .section .rdata "dr3"
5273 d - initialized data
5275 3 - double word aligned (that would be 4 byte boundary) */
5278 ppc_rdata (int ignore ATTRIBUTE_UNUSED)
5280 if (rdata_section == 0)
5282 rdata_section = subseg_new (".rdata", 0);
5283 bfd_set_section_flags (stdoutput, rdata_section,
5284 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5285 | SEC_READONLY | SEC_DATA ));
5287 bfd_set_section_alignment (stdoutput, rdata_section, 2);
5291 rdata_section = subseg_new (".rdata", 0);
5293 ppc_set_current_section (rdata_section);
5296 /* pseudo-op: .ualong
5297 behaviour: much like .int, with the exception that no alignment is
5299 FIXME: test the alignment statement
5304 ppc_ualong (int ignore ATTRIBUTE_UNUSED)
5310 /* pseudo-op: .znop <symbol name>
5311 behaviour: Issue a nop instruction
5312 Issue a IMAGE_REL_PPC_IFGLUE relocation against it, using
5313 the supplied symbol name.
5315 warnings: Missing symbol name */
5318 ppc_znop (int ignore ATTRIBUTE_UNUSED)
5321 const struct powerpc_opcode *opcode;
5328 /* Strip out the symbol name. */
5329 c = get_symbol_name (&symbol_name);
5331 name = xstrdup (symbol_name);
5333 sym = symbol_find_or_make (name);
5335 *input_line_pointer = c;
5337 SKIP_WHITESPACE_AFTER_NAME ();
5339 /* Look up the opcode in the hash table. */
5340 opcode = (const struct powerpc_opcode *) hash_find (ppc_hash, "nop");
5342 /* Stick in the nop. */
5343 insn = opcode->opcode;
5345 /* Write out the instruction. */
5347 md_number_to_chars (f, insn, 4);
5349 f - frag_now->fr_literal,
5354 BFD_RELOC_16_GOT_PCREL);
5364 ppc_pe_comm (int lcomm)
5373 c = get_symbol_name (&name);
5375 /* just after name is now '\0'. */
5376 p = input_line_pointer;
5378 SKIP_WHITESPACE_AFTER_NAME ();
5379 if (*input_line_pointer != ',')
5381 as_bad (_("expected comma after symbol-name: rest of line ignored."));
5382 ignore_rest_of_line ();
5386 input_line_pointer++; /* skip ',' */
5387 if ((temp = get_absolute_expression ()) < 0)
5389 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
5390 ignore_rest_of_line ();
5396 /* The third argument to .comm is the alignment. */
5397 if (*input_line_pointer != ',')
5401 ++input_line_pointer;
5402 align = get_absolute_expression ();
5405 as_warn (_("ignoring bad alignment"));
5412 symbolP = symbol_find_or_make (name);
5415 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
5417 as_bad (_("ignoring attempt to re-define symbol `%s'."),
5418 S_GET_NAME (symbolP));
5419 ignore_rest_of_line ();
5423 if (S_GET_VALUE (symbolP))
5425 if (S_GET_VALUE (symbolP) != (valueT) temp)
5426 as_bad (_("length of .comm \"%s\" is already %ld. Not changed to %ld."),
5427 S_GET_NAME (symbolP),
5428 (long) S_GET_VALUE (symbolP),
5433 S_SET_VALUE (symbolP, (valueT) temp);
5434 S_SET_EXTERNAL (symbolP);
5435 S_SET_SEGMENT (symbolP, bfd_com_section_ptr);
5438 demand_empty_rest_of_line ();
5442 * implement the .section pseudo op:
5443 * .section name {, "flags"}
5445 * | +--- optional flags: 'b' for bss
5447 * +-- section name 'l' for lib
5451 * 'd' (apparently m88k for data)
5453 * But if the argument is not a quoted string, treat it as a
5454 * subsegment number.
5456 * FIXME: this is a copy of the section processing from obj-coff.c, with
5457 * additions/changes for the moto-pas assembler support. There are three
5460 * FIXME: I just noticed this. This doesn't work at all really. It it
5461 * setting bits that bfd probably neither understands or uses. The
5462 * correct approach (?) will have to incorporate extra fields attached
5463 * to the section to hold the system specific stuff. (krk)
5466 * 'a' - unknown - referred to in documentation, but no definition supplied
5467 * 'c' - section has code
5468 * 'd' - section has initialized data
5469 * 'u' - section has uninitialized data
5470 * 'i' - section contains directives (info)
5471 * 'n' - section can be discarded
5472 * 'R' - remove section at link time
5474 * Section Protection:
5475 * 'r' - section is readable
5476 * 'w' - section is writable
5477 * 'x' - section is executable
5478 * 's' - section is sharable
5480 * Section Alignment:
5481 * '0' - align to byte boundary
5482 * '1' - align to halfword boundary
5483 * '2' - align to word boundary
5484 * '3' - align to doubleword boundary
5485 * '4' - align to quadword boundary
5486 * '5' - align to 32 byte boundary
5487 * '6' - align to 64 byte boundary
5492 ppc_pe_section (int ignore ATTRIBUTE_UNUSED)
5494 /* Strip out the section name. */
5503 c = get_symbol_name (§ion_name);
5505 name = xstrdup (section_name);
5507 *input_line_pointer = c;
5509 SKIP_WHITESPACE_AFTER_NAME ();
5512 flags = SEC_NO_FLAGS;
5514 if (strcmp (name, ".idata$2") == 0)
5518 else if (strcmp (name, ".idata$3") == 0)
5522 else if (strcmp (name, ".idata$4") == 0)
5526 else if (strcmp (name, ".idata$5") == 0)
5530 else if (strcmp (name, ".idata$6") == 0)
5535 /* Default alignment to 16 byte boundary. */
5538 if (*input_line_pointer == ',')
5540 ++input_line_pointer;
5542 if (*input_line_pointer != '"')
5543 exp = get_absolute_expression ();
5546 ++input_line_pointer;
5547 while (*input_line_pointer != '"'
5548 && ! is_end_of_line[(unsigned char) *input_line_pointer])
5550 switch (*input_line_pointer)
5552 /* Section Contents */
5553 case 'a': /* unknown */
5554 as_bad (_("unsupported section attribute -- 'a'"));
5556 case 'c': /* code section */
5559 case 'd': /* section has initialized data */
5562 case 'u': /* section has uninitialized data */
5563 /* FIXME: This is IMAGE_SCN_CNT_UNINITIALIZED_DATA
5567 case 'i': /* section contains directives (info) */
5568 /* FIXME: This is IMAGE_SCN_LNK_INFO
5570 flags |= SEC_HAS_CONTENTS;
5572 case 'n': /* section can be discarded */
5575 case 'R': /* Remove section at link time */
5576 flags |= SEC_NEVER_LOAD;
5578 #if IFLICT_BRAIN_DAMAGE
5579 /* Section Protection */
5580 case 'r': /* section is readable */
5581 flags |= IMAGE_SCN_MEM_READ;
5583 case 'w': /* section is writable */
5584 flags |= IMAGE_SCN_MEM_WRITE;
5586 case 'x': /* section is executable */
5587 flags |= IMAGE_SCN_MEM_EXECUTE;
5589 case 's': /* section is sharable */
5590 flags |= IMAGE_SCN_MEM_SHARED;
5593 /* Section Alignment */
5594 case '0': /* align to byte boundary */
5595 flags |= IMAGE_SCN_ALIGN_1BYTES;
5598 case '1': /* align to halfword boundary */
5599 flags |= IMAGE_SCN_ALIGN_2BYTES;
5602 case '2': /* align to word boundary */
5603 flags |= IMAGE_SCN_ALIGN_4BYTES;
5606 case '3': /* align to doubleword boundary */
5607 flags |= IMAGE_SCN_ALIGN_8BYTES;
5610 case '4': /* align to quadword boundary */
5611 flags |= IMAGE_SCN_ALIGN_16BYTES;
5614 case '5': /* align to 32 byte boundary */
5615 flags |= IMAGE_SCN_ALIGN_32BYTES;
5618 case '6': /* align to 64 byte boundary */
5619 flags |= IMAGE_SCN_ALIGN_64BYTES;
5624 as_bad (_("unknown section attribute '%c'"),
5625 *input_line_pointer);
5628 ++input_line_pointer;
5630 if (*input_line_pointer == '"')
5631 ++input_line_pointer;
5635 sec = subseg_new (name, (subsegT) exp);
5637 ppc_set_current_section (sec);
5639 if (flags != SEC_NO_FLAGS)
5641 if (! bfd_set_section_flags (stdoutput, sec, flags))
5642 as_bad (_("error setting flags for \"%s\": %s"),
5643 bfd_section_name (stdoutput, sec),
5644 bfd_errmsg (bfd_get_error ()));
5647 bfd_set_section_alignment (stdoutput, sec, align);
5651 ppc_pe_function (int ignore ATTRIBUTE_UNUSED)
5657 endc = get_symbol_name (&name);
5659 ext_sym = symbol_find_or_make (name);
5661 (void) restore_line_pointer (endc);
5663 S_SET_DATA_TYPE (ext_sym, DT_FCN << N_BTSHFT);
5664 SF_SET_FUNCTION (ext_sym);
5665 SF_SET_PROCESS (ext_sym);
5666 coff_add_linesym (ext_sym);
5668 demand_empty_rest_of_line ();
5672 ppc_pe_tocd (int ignore ATTRIBUTE_UNUSED)
5674 if (tocdata_section == 0)
5676 tocdata_section = subseg_new (".tocd", 0);
5677 /* FIXME: section flags won't work. */
5678 bfd_set_section_flags (stdoutput, tocdata_section,
5679 (SEC_ALLOC | SEC_LOAD | SEC_RELOC
5680 | SEC_READONLY | SEC_DATA));
5682 bfd_set_section_alignment (stdoutput, tocdata_section, 2);
5686 rdata_section = subseg_new (".tocd", 0);
5689 ppc_set_current_section (tocdata_section);
5691 demand_empty_rest_of_line ();
5694 /* Don't adjust TOC relocs to use the section symbol. */
5697 ppc_pe_fix_adjustable (fixS *fix)
5699 return fix->fx_r_type != BFD_RELOC_PPC_TOC16;
5706 /* XCOFF specific symbol and file handling. */
5708 /* Canonicalize the symbol name. We use the to force the suffix, if
5709 any, to use square brackets, and to be in upper case. */
5712 ppc_canonicalize_symbol_name (char *name)
5716 if (ppc_stab_symbol)
5719 for (s = name; *s != '\0' && *s != '{' && *s != '['; s++)
5733 for (s++; *s != '\0' && *s != brac; s++)
5736 if (*s == '\0' || s[1] != '\0')
5737 as_bad (_("bad symbol suffix"));
5745 /* Set the class of a symbol based on the suffix, if any. This is
5746 called whenever a new symbol is created. */
5749 ppc_symbol_new_hook (symbolS *sym)
5751 struct ppc_tc_sy *tc;
5754 tc = symbol_get_tc (sym);
5757 tc->symbol_class = -1;
5758 tc->real_name = NULL;
5765 if (ppc_stab_symbol)
5768 s = strchr (S_GET_NAME (sym), '[');
5769 if (s == (const char *) NULL)
5771 /* There is no suffix. */
5780 if (strcmp (s, "BS]") == 0)
5781 tc->symbol_class = XMC_BS;
5784 if (strcmp (s, "DB]") == 0)
5785 tc->symbol_class = XMC_DB;
5786 else if (strcmp (s, "DS]") == 0)
5787 tc->symbol_class = XMC_DS;
5790 if (strcmp (s, "GL]") == 0)
5791 tc->symbol_class = XMC_GL;
5794 if (strcmp (s, "PR]") == 0)
5795 tc->symbol_class = XMC_PR;
5798 if (strcmp (s, "RO]") == 0)
5799 tc->symbol_class = XMC_RO;
5800 else if (strcmp (s, "RW]") == 0)
5801 tc->symbol_class = XMC_RW;
5804 if (strcmp (s, "SV]") == 0)
5805 tc->symbol_class = XMC_SV;
5808 if (strcmp (s, "TC]") == 0)
5809 tc->symbol_class = XMC_TC;
5810 else if (strcmp (s, "TI]") == 0)
5811 tc->symbol_class = XMC_TI;
5812 else if (strcmp (s, "TB]") == 0)
5813 tc->symbol_class = XMC_TB;
5814 else if (strcmp (s, "TC0]") == 0 || strcmp (s, "T0]") == 0)
5815 tc->symbol_class = XMC_TC0;
5818 if (strcmp (s, "UA]") == 0)
5819 tc->symbol_class = XMC_UA;
5820 else if (strcmp (s, "UC]") == 0)
5821 tc->symbol_class = XMC_UC;
5824 if (strcmp (s, "XO]") == 0)
5825 tc->symbol_class = XMC_XO;
5829 if (tc->symbol_class == -1)
5830 as_bad (_("unrecognized symbol suffix"));
5833 /* Set the class of a label based on where it is defined. This
5834 handles symbols without suffixes. Also, move the symbol so that it
5835 follows the csect symbol. */
5838 ppc_frob_label (symbolS *sym)
5840 if (ppc_current_csect != (symbolS *) NULL)
5842 if (symbol_get_tc (sym)->symbol_class == -1)
5843 symbol_get_tc (sym)->symbol_class = symbol_get_tc (ppc_current_csect)->symbol_class;
5845 symbol_remove (sym, &symbol_rootP, &symbol_lastP);
5846 symbol_append (sym, symbol_get_tc (ppc_current_csect)->within,
5847 &symbol_rootP, &symbol_lastP);
5848 symbol_get_tc (ppc_current_csect)->within = sym;
5849 symbol_get_tc (sym)->within = ppc_current_csect;
5853 dwarf2_emit_label (sym);
5857 /* This variable is set by ppc_frob_symbol if any absolute symbols are
5858 seen. It tells ppc_adjust_symtab whether it needs to look through
5861 static bfd_boolean ppc_saw_abs;
5863 /* Change the name of a symbol just before writing it out. Set the
5864 real name if the .rename pseudo-op was used. Otherwise, remove any
5865 class suffix. Return 1 if the symbol should not be included in the
5869 ppc_frob_symbol (symbolS *sym)
5871 static symbolS *ppc_last_function;
5872 static symbolS *set_end;
5874 /* Discard symbols that should not be included in the output symbol
5876 if (! symbol_used_in_reloc_p (sym)
5877 && ((symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) != 0
5878 || (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5879 && ! symbol_get_tc (sym)->output
5880 && S_GET_STORAGE_CLASS (sym) != C_FILE)))
5883 /* This one will disappear anyway. Don't make a csect sym for it. */
5884 if (sym == abs_section_sym)
5887 if (symbol_get_tc (sym)->real_name != (char *) NULL)
5888 S_SET_NAME (sym, symbol_get_tc (sym)->real_name);
5894 name = S_GET_NAME (sym);
5895 s = strchr (name, '[');
5896 if (s != (char *) NULL)
5902 snew = xstrndup (name, len);
5904 S_SET_NAME (sym, snew);
5908 if (set_end != (symbolS *) NULL)
5910 SA_SET_SYM_ENDNDX (set_end, sym);
5914 if (SF_GET_FUNCTION (sym))
5916 if (ppc_last_function != (symbolS *) NULL)
5917 as_bad (_("two .function pseudo-ops with no intervening .ef"));
5918 ppc_last_function = sym;
5919 if (symbol_get_tc (sym)->u.size != (symbolS *) NULL)
5921 resolve_symbol_value (symbol_get_tc (sym)->u.size);
5922 SA_SET_SYM_FSIZE (sym,
5923 (long) S_GET_VALUE (symbol_get_tc (sym)->u.size));
5926 else if (S_GET_STORAGE_CLASS (sym) == C_FCN
5927 && strcmp (S_GET_NAME (sym), ".ef") == 0)
5929 if (ppc_last_function == (symbolS *) NULL)
5930 as_bad (_(".ef with no preceding .function"));
5933 set_end = ppc_last_function;
5934 ppc_last_function = NULL;
5936 /* We don't have a C_EFCN symbol, but we need to force the
5937 COFF backend to believe that it has seen one. */
5938 coff_last_function = NULL;
5942 if (! (S_IS_EXTERNAL (sym) || S_IS_WEAK (sym))
5943 && (symbol_get_bfdsym (sym)->flags & BSF_SECTION_SYM) == 0
5944 && S_GET_STORAGE_CLASS (sym) != C_FILE
5945 && S_GET_STORAGE_CLASS (sym) != C_FCN
5946 && S_GET_STORAGE_CLASS (sym) != C_BLOCK
5947 && S_GET_STORAGE_CLASS (sym) != C_BSTAT
5948 && S_GET_STORAGE_CLASS (sym) != C_ESTAT
5949 && S_GET_STORAGE_CLASS (sym) != C_BINCL
5950 && S_GET_STORAGE_CLASS (sym) != C_EINCL
5951 && S_GET_SEGMENT (sym) != ppc_coff_debug_section)
5952 S_SET_STORAGE_CLASS (sym, C_HIDEXT);
5954 if (S_GET_STORAGE_CLASS (sym) == C_EXT
5955 || S_GET_STORAGE_CLASS (sym) == C_AIX_WEAKEXT
5956 || S_GET_STORAGE_CLASS (sym) == C_HIDEXT)
5959 union internal_auxent *a;
5961 /* Create a csect aux. */
5962 i = S_GET_NUMBER_AUXILIARY (sym);
5963 S_SET_NUMBER_AUXILIARY (sym, i + 1);
5964 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].u.auxent;
5965 if (symbol_get_tc (sym)->symbol_class == XMC_TC0)
5967 /* This is the TOC table. */
5968 know (strcmp (S_GET_NAME (sym), "TOC") == 0);
5969 a->x_csect.x_scnlen.l = 0;
5970 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
5972 else if (symbol_get_tc (sym)->subseg != 0)
5974 /* This is a csect symbol. x_scnlen is the size of the
5976 if (symbol_get_tc (sym)->next == (symbolS *) NULL)
5977 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
5978 S_GET_SEGMENT (sym))
5979 - S_GET_VALUE (sym));
5982 resolve_symbol_value (symbol_get_tc (sym)->next);
5983 a->x_csect.x_scnlen.l = (S_GET_VALUE (symbol_get_tc (sym)->next)
5984 - S_GET_VALUE (sym));
5986 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_SD;
5988 else if (S_GET_SEGMENT (sym) == bss_section)
5990 /* This is a common symbol. */
5991 a->x_csect.x_scnlen.l = symbol_get_frag (sym)->fr_offset;
5992 a->x_csect.x_smtyp = (symbol_get_tc (sym)->align << 3) | XTY_CM;
5993 if (S_IS_EXTERNAL (sym))
5994 symbol_get_tc (sym)->symbol_class = XMC_RW;
5996 symbol_get_tc (sym)->symbol_class = XMC_BS;
5998 else if (S_GET_SEGMENT (sym) == absolute_section)
6000 /* This is an absolute symbol. The csect will be created by
6001 ppc_adjust_symtab. */
6003 a->x_csect.x_smtyp = XTY_LD;
6004 if (symbol_get_tc (sym)->symbol_class == -1)
6005 symbol_get_tc (sym)->symbol_class = XMC_XO;
6007 else if (! S_IS_DEFINED (sym))
6009 /* This is an external symbol. */
6010 a->x_csect.x_scnlen.l = 0;
6011 a->x_csect.x_smtyp = XTY_ER;
6013 else if (symbol_get_tc (sym)->symbol_class == XMC_TC)
6017 /* This is a TOC definition. x_scnlen is the size of the
6019 next = symbol_next (sym);
6020 while (symbol_get_tc (next)->symbol_class == XMC_TC0)
6021 next = symbol_next (next);
6022 if (next == (symbolS *) NULL
6023 || symbol_get_tc (next)->symbol_class != XMC_TC)
6025 if (ppc_after_toc_frag == (fragS *) NULL)
6026 a->x_csect.x_scnlen.l = (bfd_section_size (stdoutput,
6028 - S_GET_VALUE (sym));
6030 a->x_csect.x_scnlen.l = (ppc_after_toc_frag->fr_address
6031 - S_GET_VALUE (sym));
6035 resolve_symbol_value (next);
6036 a->x_csect.x_scnlen.l = (S_GET_VALUE (next)
6037 - S_GET_VALUE (sym));
6039 a->x_csect.x_smtyp = (2 << 3) | XTY_SD;
6045 /* This is a normal symbol definition. x_scnlen is the
6046 symbol index of the containing csect. */
6047 if (S_GET_SEGMENT (sym) == text_section)
6048 csect = ppc_text_csects;
6049 else if (S_GET_SEGMENT (sym) == data_section)
6050 csect = ppc_data_csects;
6054 /* Skip the initial dummy symbol. */
6055 csect = symbol_get_tc (csect)->next;
6057 if (csect == (symbolS *) NULL)
6059 as_warn (_("warning: symbol %s has no csect"), S_GET_NAME (sym));
6060 a->x_csect.x_scnlen.l = 0;
6064 while (symbol_get_tc (csect)->next != (symbolS *) NULL)
6066 resolve_symbol_value (symbol_get_tc (csect)->next);
6067 if (S_GET_VALUE (symbol_get_tc (csect)->next)
6068 > S_GET_VALUE (sym))
6070 csect = symbol_get_tc (csect)->next;
6073 a->x_csect.x_scnlen.p =
6074 coffsymbol (symbol_get_bfdsym (csect))->native;
6075 coffsymbol (symbol_get_bfdsym (sym))->native[i + 1].fix_scnlen =
6078 a->x_csect.x_smtyp = XTY_LD;
6081 a->x_csect.x_parmhash = 0;
6082 a->x_csect.x_snhash = 0;
6083 if (symbol_get_tc (sym)->symbol_class == -1)
6084 a->x_csect.x_smclas = XMC_PR;
6086 a->x_csect.x_smclas = symbol_get_tc (sym)->symbol_class;
6087 a->x_csect.x_stab = 0;
6088 a->x_csect.x_snstab = 0;
6090 /* Don't let the COFF backend resort these symbols. */
6091 symbol_get_bfdsym (sym)->flags |= BSF_NOT_AT_END;
6093 else if (S_GET_STORAGE_CLASS (sym) == C_BSTAT)
6095 /* We want the value to be the symbol index of the referenced
6096 csect symbol. BFD will do that for us if we set the right
6098 asymbol *bsym = symbol_get_bfdsym (symbol_get_tc (sym)->within);
6099 combined_entry_type *c = coffsymbol (bsym)->native;
6101 S_SET_VALUE (sym, (valueT) (size_t) c);
6102 coffsymbol (symbol_get_bfdsym (sym))->native->fix_value = 1;
6104 else if (S_GET_STORAGE_CLASS (sym) == C_STSYM)
6109 block = symbol_get_tc (sym)->within;
6112 /* The value is the offset from the enclosing csect. */
6115 csect = symbol_get_tc (block)->within;
6116 resolve_symbol_value (csect);
6117 base = S_GET_VALUE (csect);
6122 S_SET_VALUE (sym, S_GET_VALUE (sym) - base);
6124 else if (S_GET_STORAGE_CLASS (sym) == C_BINCL
6125 || S_GET_STORAGE_CLASS (sym) == C_EINCL)
6127 /* We want the value to be a file offset into the line numbers.
6128 BFD will do that for us if we set the right flags. We have
6129 already set the value correctly. */
6130 coffsymbol (symbol_get_bfdsym (sym))->native->fix_line = 1;
6136 /* Adjust the symbol table. This creates csect symbols for all
6137 absolute symbols. */
6140 ppc_adjust_symtab (void)
6147 for (sym = symbol_rootP; sym != NULL; sym = symbol_next (sym))
6151 union internal_auxent *a;
6153 if (S_GET_SEGMENT (sym) != absolute_section)
6156 csect = symbol_create (".abs[XO]", absolute_section,
6157 S_GET_VALUE (sym), &zero_address_frag);
6158 symbol_get_bfdsym (csect)->value = S_GET_VALUE (sym);
6159 S_SET_STORAGE_CLASS (csect, C_HIDEXT);
6160 i = S_GET_NUMBER_AUXILIARY (csect);
6161 S_SET_NUMBER_AUXILIARY (csect, i + 1);
6162 a = &coffsymbol (symbol_get_bfdsym (csect))->native[i + 1].u.auxent;
6163 a->x_csect.x_scnlen.l = 0;
6164 a->x_csect.x_smtyp = XTY_SD;
6165 a->x_csect.x_parmhash = 0;
6166 a->x_csect.x_snhash = 0;
6167 a->x_csect.x_smclas = XMC_XO;
6168 a->x_csect.x_stab = 0;
6169 a->x_csect.x_snstab = 0;
6171 symbol_insert (csect, sym, &symbol_rootP, &symbol_lastP);
6173 i = S_GET_NUMBER_AUXILIARY (sym);
6174 a = &coffsymbol (symbol_get_bfdsym (sym))->native[i].u.auxent;
6175 a->x_csect.x_scnlen.p = coffsymbol (symbol_get_bfdsym (csect))->native;
6176 coffsymbol (symbol_get_bfdsym (sym))->native[i].fix_scnlen = 1;
6179 ppc_saw_abs = FALSE;
6182 /* Set the VMA for a section. This is called on all the sections in
6186 ppc_frob_section (asection *sec)
6188 static bfd_vma vma = 0;
6190 /* Dwarf sections start at 0. */
6191 if (bfd_get_section_flags (NULL, sec) & SEC_DEBUGGING)
6194 vma = md_section_align (sec, vma);
6195 bfd_set_section_vma (stdoutput, sec, vma);
6196 vma += bfd_section_size (stdoutput, sec);
6199 #endif /* OBJ_XCOFF */
6202 md_atof (int type, char *litp, int *sizep)
6204 return ieee_md_atof (type, litp, sizep, target_big_endian);
6207 /* Write a value out to the object file, using the appropriate
6211 md_number_to_chars (char *buf, valueT val, int n)
6213 if (target_big_endian)
6214 number_to_chars_bigendian (buf, val, n);
6216 number_to_chars_littleendian (buf, val, n);
6219 /* Align a section (I don't know why this is machine dependent). */
6222 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT addr)
6227 int align = bfd_get_section_alignment (stdoutput, seg);
6229 return ((addr + (1 << align) - 1) & -(1 << align));
6233 /* We don't have any form of relaxing. */
6236 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
6237 asection *seg ATTRIBUTE_UNUSED)
6243 /* Convert a machine dependent frag. We never generate these. */
6246 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
6247 asection *sec ATTRIBUTE_UNUSED,
6248 fragS *fragp ATTRIBUTE_UNUSED)
6253 /* We have no need to default values of symbols. */
6256 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
6261 /* Functions concerning relocs. */
6263 /* The location from which a PC relative jump should be calculated,
6264 given a PC relative reloc. */
6267 md_pcrel_from_section (fixS *fixp, segT sec ATTRIBUTE_UNUSED)
6269 return fixp->fx_frag->fr_address + fixp->fx_where;
6274 /* This is called to see whether a fixup should be adjusted to use a
6275 section symbol. We take the opportunity to change a fixup against
6276 a symbol in the TOC subsegment into a reloc against the
6277 corresponding .tc symbol. */
6280 ppc_fix_adjustable (fixS *fix)
6282 valueT val = resolve_symbol_value (fix->fx_addsy);
6283 segT symseg = S_GET_SEGMENT (fix->fx_addsy);
6284 TC_SYMFIELD_TYPE *tc;
6286 if (symseg == absolute_section)
6289 /* Always adjust symbols in debugging sections. */
6290 if (bfd_get_section_flags (stdoutput, symseg) & SEC_DEBUGGING)
6293 if (ppc_toc_csect != (symbolS *) NULL
6294 && fix->fx_addsy != ppc_toc_csect
6295 && symseg == data_section
6296 && val >= ppc_toc_frag->fr_address
6297 && (ppc_after_toc_frag == (fragS *) NULL
6298 || val < ppc_after_toc_frag->fr_address))
6302 for (sy = symbol_next (ppc_toc_csect);
6303 sy != (symbolS *) NULL;
6304 sy = symbol_next (sy))
6306 TC_SYMFIELD_TYPE *sy_tc = symbol_get_tc (sy);
6308 if (sy_tc->symbol_class == XMC_TC0)
6310 if (sy_tc->symbol_class != XMC_TC)
6312 if (val == resolve_symbol_value (sy))
6315 fix->fx_addnumber = val - ppc_toc_frag->fr_address;
6320 as_bad_where (fix->fx_file, fix->fx_line,
6321 _("symbol in .toc does not match any .tc"));
6324 /* Possibly adjust the reloc to be against the csect. */
6325 tc = symbol_get_tc (fix->fx_addsy);
6327 && tc->symbol_class != XMC_TC0
6328 && tc->symbol_class != XMC_TC
6329 && symseg != bss_section
6330 /* Don't adjust if this is a reloc in the toc section. */
6331 && (symseg != data_section
6332 || ppc_toc_csect == NULL
6333 || val < ppc_toc_frag->fr_address
6334 || (ppc_after_toc_frag != NULL
6335 && val >= ppc_after_toc_frag->fr_address)))
6337 symbolS *csect = tc->within;
6339 /* If the symbol was not declared by a label (eg: a section symbol),
6340 use the section instead of the csect. This doesn't happen in
6341 normal AIX assembly code. */
6343 csect = seg_info (symseg)->sym;
6345 fix->fx_offset += val - symbol_get_frag (csect)->fr_address;
6346 fix->fx_addsy = csect;
6351 /* Adjust a reloc against a .lcomm symbol to be against the base
6353 if (symseg == bss_section
6354 && ! S_IS_EXTERNAL (fix->fx_addsy))
6356 symbolS *sy = symbol_get_frag (fix->fx_addsy)->fr_symbol;
6358 fix->fx_offset += val - resolve_symbol_value (sy);
6365 /* A reloc from one csect to another must be kept. The assembler
6366 will, of course, keep relocs between sections, and it will keep
6367 absolute relocs, but we need to force it to keep PC relative relocs
6368 between two csects in the same section. */
6371 ppc_force_relocation (fixS *fix)
6373 /* At this point fix->fx_addsy should already have been converted to
6374 a csect symbol. If the csect does not include the fragment, then
6375 we need to force the relocation. */
6377 && fix->fx_addsy != NULL
6378 && symbol_get_tc (fix->fx_addsy)->subseg != 0
6379 && ((symbol_get_frag (fix->fx_addsy)->fr_address
6380 > fix->fx_frag->fr_address)
6381 || (symbol_get_tc (fix->fx_addsy)->next != NULL
6382 && (symbol_get_frag (symbol_get_tc (fix->fx_addsy)->next)->fr_address
6383 <= fix->fx_frag->fr_address))))
6386 return generic_force_reloc (fix);
6390 ppc_new_dot_label (symbolS *sym)
6392 /* Anchor this label to the current csect for relocations. */
6393 symbol_get_tc (sym)->within = ppc_current_csect;
6396 #endif /* OBJ_XCOFF */
6399 /* If this function returns non-zero, it guarantees that a relocation
6400 will be emitted for a fixup. */
6403 ppc_force_relocation (fixS *fix)
6405 /* Branch prediction relocations must force a relocation, as must
6406 the vtable description relocs. */
6407 switch (fix->fx_r_type)
6409 case BFD_RELOC_PPC_B16_BRTAKEN:
6410 case BFD_RELOC_PPC_B16_BRNTAKEN:
6411 case BFD_RELOC_PPC_BA16_BRTAKEN:
6412 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6413 case BFD_RELOC_24_PLT_PCREL:
6414 case BFD_RELOC_PPC64_TOC:
6416 case BFD_RELOC_PPC_B26:
6417 case BFD_RELOC_PPC_BA26:
6418 case BFD_RELOC_PPC_B16:
6419 case BFD_RELOC_PPC_BA16:
6420 /* All branch fixups targeting a localentry symbol must
6421 force a relocation. */
6424 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6425 elf_symbol_type *elfsym
6426 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6427 gas_assert (elfsym);
6428 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6436 if (fix->fx_r_type >= BFD_RELOC_PPC_TLS
6437 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA)
6440 return generic_force_reloc (fix);
6444 ppc_fix_adjustable (fixS *fix)
6446 switch (fix->fx_r_type)
6448 /* All branch fixups targeting a localentry symbol must
6449 continue using the symbol. */
6450 case BFD_RELOC_PPC_B26:
6451 case BFD_RELOC_PPC_BA26:
6452 case BFD_RELOC_PPC_B16:
6453 case BFD_RELOC_PPC_BA16:
6454 case BFD_RELOC_PPC_B16_BRTAKEN:
6455 case BFD_RELOC_PPC_B16_BRNTAKEN:
6456 case BFD_RELOC_PPC_BA16_BRTAKEN:
6457 case BFD_RELOC_PPC_BA16_BRNTAKEN:
6460 asymbol *bfdsym = symbol_get_bfdsym (fix->fx_addsy);
6461 elf_symbol_type *elfsym
6462 = elf_symbol_from (bfd_asymbol_bfd (bfdsym), bfdsym);
6463 gas_assert (elfsym);
6464 if ((STO_PPC64_LOCAL_MASK & elfsym->internal_elf_sym.st_other) != 0)
6472 return (fix->fx_r_type != BFD_RELOC_16_GOTOFF
6473 && fix->fx_r_type != BFD_RELOC_LO16_GOTOFF
6474 && fix->fx_r_type != BFD_RELOC_HI16_GOTOFF
6475 && fix->fx_r_type != BFD_RELOC_HI16_S_GOTOFF
6476 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_DS
6477 && fix->fx_r_type != BFD_RELOC_PPC64_GOT16_LO_DS
6478 && fix->fx_r_type != BFD_RELOC_GPREL16
6479 && fix->fx_r_type != BFD_RELOC_VTABLE_INHERIT
6480 && fix->fx_r_type != BFD_RELOC_VTABLE_ENTRY
6481 && !(fix->fx_r_type >= BFD_RELOC_PPC_TLS
6482 && fix->fx_r_type <= BFD_RELOC_PPC64_DTPREL16_HIGHESTA));
6487 ppc_frag_check (struct frag *fragP)
6489 if ((fragP->fr_address & fragP->insn_addr) != 0)
6490 as_bad_where (fragP->fr_file, fragP->fr_line,
6491 _("instruction address is not a multiple of %d"),
6492 fragP->insn_addr + 1);
6495 /* Implement HANDLE_ALIGN. This writes the NOP pattern into an
6496 rs_align_code frag. */
6499 ppc_handle_align (struct frag *fragP)
6501 valueT count = (fragP->fr_next->fr_address
6502 - (fragP->fr_address + fragP->fr_fix));
6504 if ((ppc_cpu & PPC_OPCODE_VLE) != 0 && count != 0 && (count & 1) == 0)
6506 char *dest = fragP->fr_literal + fragP->fr_fix;
6509 md_number_to_chars (dest, 0x4400, 2);
6511 else if (count != 0 && (count & 3) == 0)
6513 char *dest = fragP->fr_literal + fragP->fr_fix;
6517 if (count > 4 * nop_limit && count < 0x2000000)
6521 /* Make a branch, then follow with nops. Insert another
6522 frag to handle the nops. */
6523 md_number_to_chars (dest, 0x48000000 + count, 4);
6528 rest = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6529 memcpy (rest, fragP, SIZEOF_STRUCT_FRAG);
6530 fragP->fr_next = rest;
6532 rest->fr_address += rest->fr_fix + 4;
6534 /* If we leave the next frag as rs_align_code we'll come here
6535 again, resulting in a bunch of branches rather than a
6536 branch followed by nops. */
6537 rest->fr_type = rs_align;
6538 dest = rest->fr_literal;
6541 md_number_to_chars (dest, 0x60000000, 4);
6543 if ((ppc_cpu & PPC_OPCODE_POWER6) != 0
6544 && (ppc_cpu & PPC_OPCODE_POWER9) == 0)
6546 /* For power6, power7, and power8, we want the last nop to
6547 be a group terminating one. Do this by inserting an
6548 rs_fill frag immediately after this one, with its address
6549 set to the last nop location. This will automatically
6550 reduce the number of nops in the current frag by one. */
6553 struct frag *group_nop = xmalloc (SIZEOF_STRUCT_FRAG + 4);
6555 memcpy (group_nop, fragP, SIZEOF_STRUCT_FRAG);
6556 group_nop->fr_address = group_nop->fr_next->fr_address - 4;
6557 group_nop->fr_fix = 0;
6558 group_nop->fr_offset = 1;
6559 group_nop->fr_type = rs_fill;
6560 fragP->fr_next = group_nop;
6561 dest = group_nop->fr_literal;
6564 if ((ppc_cpu & PPC_OPCODE_POWER7) != 0)
6566 if (ppc_cpu & PPC_OPCODE_E500MC)
6567 /* e500mc group terminating nop: "ori 0,0,0". */
6568 md_number_to_chars (dest, 0x60000000, 4);
6570 /* power7/power8 group terminating nop: "ori 2,2,0". */
6571 md_number_to_chars (dest, 0x60420000, 4);
6574 /* power6 group terminating nop: "ori 1,1,0". */
6575 md_number_to_chars (dest, 0x60210000, 4);
6580 /* Apply a fixup to the object code. This is called for all the
6581 fixups we generated by the calls to fix_new_exp, above. */
6584 md_apply_fix (fixS *fixP, valueT *valP, segT seg)
6586 valueT value = * valP;
6588 const struct powerpc_operand *operand;
6591 if (fixP->fx_addsy != NULL)
6593 /* Hack around bfd_install_relocation brain damage. */
6595 value += fixP->fx_frag->fr_address + fixP->fx_where;
6597 if (fixP->fx_addsy == abs_section_sym)
6603 /* FIXME FIXME FIXME: The value we are passed in *valP includes
6604 the symbol values. If we are doing this relocation the code in
6605 write.c is going to call bfd_install_relocation, which is also
6606 going to use the symbol value. That means that if the reloc is
6607 fully resolved we want to use *valP since bfd_install_relocation is
6609 However, if the reloc is not fully resolved we do not want to
6610 use *valP, and must use fx_offset instead. If the relocation
6611 is PC-relative, we then need to re-apply md_pcrel_from_section
6612 to this new relocation value. */
6613 if (fixP->fx_addsy == (symbolS *) NULL)
6618 value = fixP->fx_offset;
6620 value -= md_pcrel_from_section (fixP, seg);
6624 /* We are only able to convert some relocs to pc-relative. */
6627 switch (fixP->fx_r_type)
6629 case BFD_RELOC_LO16:
6630 fixP->fx_r_type = BFD_RELOC_LO16_PCREL;
6633 case BFD_RELOC_HI16:
6634 fixP->fx_r_type = BFD_RELOC_HI16_PCREL;
6637 case BFD_RELOC_HI16_S:
6638 fixP->fx_r_type = BFD_RELOC_HI16_S_PCREL;
6642 fixP->fx_r_type = BFD_RELOC_64_PCREL;
6646 fixP->fx_r_type = BFD_RELOC_32_PCREL;
6650 fixP->fx_r_type = BFD_RELOC_16_PCREL;
6653 case BFD_RELOC_PPC_16DX_HA:
6654 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6661 else if (!fixP->fx_done
6662 && fixP->fx_r_type == BFD_RELOC_PPC_16DX_HA)
6664 /* addpcis is relative to next insn address. */
6666 fixP->fx_r_type = BFD_RELOC_PPC_REL16DX_HA;
6671 if (fixP->fx_pcrel_adjust != 0)
6673 /* This is a fixup on an instruction. */
6674 int opindex = fixP->fx_pcrel_adjust & 0xff;
6676 operand = &powerpc_operands[opindex];
6678 /* An instruction like `lwz 9,sym(30)' when `sym' is not a TOC symbol
6679 does not generate a reloc. It uses the offset of `sym' within its
6680 csect. Other usages, such as `.long sym', generate relocs. This
6681 is the documented behaviour of non-TOC symbols. */
6682 if ((operand->flags & PPC_OPERAND_PARENS) != 0
6683 && (operand->bitm & 0xfff0) == 0xfff0
6684 && operand->shift == 0
6685 && (operand->insert == NULL || ppc_obj64)
6686 && fixP->fx_addsy != NULL
6687 && symbol_get_tc (fixP->fx_addsy)->subseg != 0
6688 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC
6689 && symbol_get_tc (fixP->fx_addsy)->symbol_class != XMC_TC0
6690 && S_GET_SEGMENT (fixP->fx_addsy) != bss_section)
6692 value = fixP->fx_offset;
6696 /* During parsing of instructions, a TOC16 reloc is generated for
6697 instructions such as 'lwz RT,SYM(RB)' if SYM is a symbol defined
6698 in the toc. But at parse time, SYM may be not yet defined, so
6699 check again here. */
6700 if (fixP->fx_r_type == BFD_RELOC_16
6701 && fixP->fx_addsy != NULL
6702 && ppc_is_toc_sym (fixP->fx_addsy))
6703 fixP->fx_r_type = BFD_RELOC_PPC_TOC16;
6707 /* Calculate value to be stored in field. */
6709 switch (fixP->fx_r_type)
6712 case BFD_RELOC_PPC64_ADDR16_LO_DS:
6713 case BFD_RELOC_PPC_VLE_LO16A:
6714 case BFD_RELOC_PPC_VLE_LO16D:
6716 case BFD_RELOC_LO16:
6717 case BFD_RELOC_LO16_PCREL:
6718 fieldval = value & 0xffff;
6720 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6721 fieldval = SEX16 (fieldval);
6722 fixP->fx_no_overflow = 1;
6725 case BFD_RELOC_HI16:
6726 case BFD_RELOC_HI16_PCREL:
6728 if (REPORT_OVERFLOW_HI && ppc_obj64)
6730 fieldval = value >> 16;
6731 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6733 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6734 fieldval = ((valueT) fieldval ^ sign) - sign;
6740 case BFD_RELOC_PPC_VLE_HI16A:
6741 case BFD_RELOC_PPC_VLE_HI16D:
6742 case BFD_RELOC_PPC64_ADDR16_HIGH:
6744 fieldval = PPC_HI (value);
6745 goto sign_extend_16;
6747 case BFD_RELOC_HI16_S:
6748 case BFD_RELOC_HI16_S_PCREL:
6749 case BFD_RELOC_PPC_16DX_HA:
6750 case BFD_RELOC_PPC_REL16DX_HA:
6752 if (REPORT_OVERFLOW_HI && ppc_obj64)
6754 fieldval = (value + 0x8000) >> 16;
6755 if (operand != NULL && (operand->flags & PPC_OPERAND_SIGNED) != 0)
6757 valueT sign = (((valueT) -1 >> 16) + 1) >> 1;
6758 fieldval = ((valueT) fieldval ^ sign) - sign;
6764 case BFD_RELOC_PPC_VLE_HA16A:
6765 case BFD_RELOC_PPC_VLE_HA16D:
6766 case BFD_RELOC_PPC64_ADDR16_HIGHA:
6768 fieldval = PPC_HA (value);
6769 goto sign_extend_16;
6772 case BFD_RELOC_PPC64_HIGHER:
6773 fieldval = PPC_HIGHER (value);
6774 goto sign_extend_16;
6776 case BFD_RELOC_PPC64_HIGHER_S:
6777 fieldval = PPC_HIGHERA (value);
6778 goto sign_extend_16;
6780 case BFD_RELOC_PPC64_HIGHEST:
6781 fieldval = PPC_HIGHEST (value);
6782 goto sign_extend_16;
6784 case BFD_RELOC_PPC64_HIGHEST_S:
6785 fieldval = PPC_HIGHESTA (value);
6786 goto sign_extend_16;
6793 if (operand != NULL)
6795 /* Handle relocs in an insn. */
6796 switch (fixP->fx_r_type)
6799 /* The following relocs can't be calculated by the assembler.
6800 Leave the field zero. */
6801 case BFD_RELOC_PPC_TPREL16:
6802 case BFD_RELOC_PPC_TPREL16_LO:
6803 case BFD_RELOC_PPC_TPREL16_HI:
6804 case BFD_RELOC_PPC_TPREL16_HA:
6805 case BFD_RELOC_PPC_DTPREL16:
6806 case BFD_RELOC_PPC_DTPREL16_LO:
6807 case BFD_RELOC_PPC_DTPREL16_HI:
6808 case BFD_RELOC_PPC_DTPREL16_HA:
6809 case BFD_RELOC_PPC_GOT_TLSGD16:
6810 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
6811 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
6812 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
6813 case BFD_RELOC_PPC_GOT_TLSLD16:
6814 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
6815 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
6816 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
6817 case BFD_RELOC_PPC_GOT_TPREL16:
6818 case BFD_RELOC_PPC_GOT_TPREL16_LO:
6819 case BFD_RELOC_PPC_GOT_TPREL16_HI:
6820 case BFD_RELOC_PPC_GOT_TPREL16_HA:
6821 case BFD_RELOC_PPC_GOT_DTPREL16:
6822 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
6823 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
6824 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
6825 case BFD_RELOC_PPC64_TPREL16_DS:
6826 case BFD_RELOC_PPC64_TPREL16_LO_DS:
6827 case BFD_RELOC_PPC64_TPREL16_HIGH:
6828 case BFD_RELOC_PPC64_TPREL16_HIGHA:
6829 case BFD_RELOC_PPC64_TPREL16_HIGHER:
6830 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
6831 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
6832 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
6833 case BFD_RELOC_PPC64_DTPREL16_HIGH:
6834 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
6835 case BFD_RELOC_PPC64_DTPREL16_DS:
6836 case BFD_RELOC_PPC64_DTPREL16_LO_DS:
6837 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
6838 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
6839 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
6840 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
6841 gas_assert (fixP->fx_addsy != NULL);
6842 S_SET_THREAD_LOCAL (fixP->fx_addsy);
6846 /* These also should leave the field zero for the same
6847 reason. Note that older versions of gas wrote values
6848 here. If we want to go back to the old behaviour, then
6849 all _LO and _LO_DS cases will need to be treated like
6850 BFD_RELOC_LO16_PCREL above. Similarly for _HI etc. */
6851 case BFD_RELOC_16_GOTOFF:
6852 case BFD_RELOC_LO16_GOTOFF:
6853 case BFD_RELOC_HI16_GOTOFF:
6854 case BFD_RELOC_HI16_S_GOTOFF:
6855 case BFD_RELOC_LO16_PLTOFF:
6856 case BFD_RELOC_HI16_PLTOFF:
6857 case BFD_RELOC_HI16_S_PLTOFF:
6858 case BFD_RELOC_GPREL16:
6859 case BFD_RELOC_16_BASEREL:
6860 case BFD_RELOC_LO16_BASEREL:
6861 case BFD_RELOC_HI16_BASEREL:
6862 case BFD_RELOC_HI16_S_BASEREL:
6863 case BFD_RELOC_PPC_TOC16:
6864 case BFD_RELOC_PPC64_TOC16_LO:
6865 case BFD_RELOC_PPC64_TOC16_HI:
6866 case BFD_RELOC_PPC64_TOC16_HA:
6867 case BFD_RELOC_PPC64_PLTGOT16:
6868 case BFD_RELOC_PPC64_PLTGOT16_LO:
6869 case BFD_RELOC_PPC64_PLTGOT16_HI:
6870 case BFD_RELOC_PPC64_PLTGOT16_HA:
6871 case BFD_RELOC_PPC64_GOT16_DS:
6872 case BFD_RELOC_PPC64_GOT16_LO_DS:
6873 case BFD_RELOC_PPC64_PLT16_LO_DS:
6874 case BFD_RELOC_PPC64_SECTOFF_DS:
6875 case BFD_RELOC_PPC64_SECTOFF_LO_DS:
6876 case BFD_RELOC_PPC64_TOC16_DS:
6877 case BFD_RELOC_PPC64_TOC16_LO_DS:
6878 case BFD_RELOC_PPC64_PLTGOT16_DS:
6879 case BFD_RELOC_PPC64_PLTGOT16_LO_DS:
6880 case BFD_RELOC_PPC_EMB_NADDR16:
6881 case BFD_RELOC_PPC_EMB_NADDR16_LO:
6882 case BFD_RELOC_PPC_EMB_NADDR16_HI:
6883 case BFD_RELOC_PPC_EMB_NADDR16_HA:
6884 case BFD_RELOC_PPC_EMB_SDAI16:
6885 case BFD_RELOC_PPC_EMB_SDA2I16:
6886 case BFD_RELOC_PPC_EMB_SDA2REL:
6887 case BFD_RELOC_PPC_EMB_SDA21:
6888 case BFD_RELOC_PPC_EMB_MRKREF:
6889 case BFD_RELOC_PPC_EMB_RELSEC16:
6890 case BFD_RELOC_PPC_EMB_RELST_LO:
6891 case BFD_RELOC_PPC_EMB_RELST_HI:
6892 case BFD_RELOC_PPC_EMB_RELST_HA:
6893 case BFD_RELOC_PPC_EMB_BIT_FLD:
6894 case BFD_RELOC_PPC_EMB_RELSDA:
6895 case BFD_RELOC_PPC_VLE_SDA21:
6896 case BFD_RELOC_PPC_VLE_SDA21_LO:
6897 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
6898 case BFD_RELOC_PPC_VLE_SDAREL_LO16D:
6899 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
6900 case BFD_RELOC_PPC_VLE_SDAREL_HI16D:
6901 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
6902 case BFD_RELOC_PPC_VLE_SDAREL_HA16D:
6903 gas_assert (fixP->fx_addsy != NULL);
6906 case BFD_RELOC_PPC_TLS:
6907 case BFD_RELOC_PPC_TLSGD:
6908 case BFD_RELOC_PPC_TLSLD:
6914 case BFD_RELOC_PPC_B16:
6915 /* Adjust the offset to the instruction boundary. */
6920 case BFD_RELOC_VTABLE_INHERIT:
6921 case BFD_RELOC_VTABLE_ENTRY:
6922 case BFD_RELOC_PPC_DTPMOD:
6923 case BFD_RELOC_PPC_TPREL:
6924 case BFD_RELOC_PPC_DTPREL:
6925 case BFD_RELOC_PPC_COPY:
6926 case BFD_RELOC_PPC_GLOB_DAT:
6927 case BFD_RELOC_32_PLT_PCREL:
6928 case BFD_RELOC_PPC_EMB_NADDR32:
6929 case BFD_RELOC_PPC64_TOC:
6930 case BFD_RELOC_CTOR:
6932 case BFD_RELOC_32_PCREL:
6935 case BFD_RELOC_64_PCREL:
6936 case BFD_RELOC_PPC64_ADDR64_LOCAL:
6937 as_bad_where (fixP->fx_file, fixP->fx_line,
6938 _("%s unsupported as instruction fixup"),
6939 bfd_get_reloc_code_name (fixP->fx_r_type));
6948 /* powerpc uses RELA style relocs, so if emitting a reloc the field
6949 contents can stay at zero. */
6950 #define APPLY_RELOC fixP->fx_done
6952 #define APPLY_RELOC 1
6954 if ((fieldval != 0 && APPLY_RELOC) || operand->insert != NULL)
6957 unsigned char *where;
6959 /* Fetch the instruction, insert the fully resolved operand
6960 value, and stuff the instruction back again. */
6961 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
6962 if (target_big_endian)
6964 if (fixP->fx_size == 4)
6965 insn = bfd_getb32 (where);
6967 insn = bfd_getb16 (where);
6971 if (fixP->fx_size == 4)
6972 insn = bfd_getl32 (where);
6974 insn = bfd_getl16 (where);
6976 insn = ppc_insert_operand (insn, operand, fieldval,
6977 fixP->tc_fix_data.ppc_cpu,
6978 fixP->fx_file, fixP->fx_line);
6979 if (target_big_endian)
6981 if (fixP->fx_size == 4)
6982 bfd_putb32 (insn, where);
6984 bfd_putb16 (insn, where);
6988 if (fixP->fx_size == 4)
6989 bfd_putl32 (insn, where);
6991 bfd_putl16 (insn, where);
6996 /* Nothing else to do here. */
6999 gas_assert (fixP->fx_addsy != NULL);
7000 if (fixP->fx_r_type == BFD_RELOC_NONE)
7005 /* Use expr_symbol_where to see if this is an expression
7007 if (expr_symbol_where (fixP->fx_addsy, &sfile, &sline))
7008 as_bad_where (fixP->fx_file, fixP->fx_line,
7009 _("unresolved expression that must be resolved"));
7011 as_bad_where (fixP->fx_file, fixP->fx_line,
7012 _("unsupported relocation against %s"),
7013 S_GET_NAME (fixP->fx_addsy));
7020 /* Handle relocs in data. */
7021 switch (fixP->fx_r_type)
7023 case BFD_RELOC_VTABLE_INHERIT:
7025 && !S_IS_DEFINED (fixP->fx_addsy)
7026 && !S_IS_WEAK (fixP->fx_addsy))
7027 S_SET_WEAK (fixP->fx_addsy);
7030 case BFD_RELOC_VTABLE_ENTRY:
7035 /* These can appear with @l etc. in data. */
7036 case BFD_RELOC_LO16:
7037 case BFD_RELOC_LO16_PCREL:
7038 case BFD_RELOC_HI16:
7039 case BFD_RELOC_HI16_PCREL:
7040 case BFD_RELOC_HI16_S:
7041 case BFD_RELOC_HI16_S_PCREL:
7042 case BFD_RELOC_PPC64_HIGHER:
7043 case BFD_RELOC_PPC64_HIGHER_S:
7044 case BFD_RELOC_PPC64_HIGHEST:
7045 case BFD_RELOC_PPC64_HIGHEST_S:
7046 case BFD_RELOC_PPC64_ADDR16_HIGH:
7047 case BFD_RELOC_PPC64_ADDR16_HIGHA:
7048 case BFD_RELOC_PPC64_ADDR64_LOCAL:
7051 case BFD_RELOC_PPC_DTPMOD:
7052 case BFD_RELOC_PPC_TPREL:
7053 case BFD_RELOC_PPC_DTPREL:
7054 S_SET_THREAD_LOCAL (fixP->fx_addsy);
7057 /* Just punt all of these to the linker. */
7058 case BFD_RELOC_PPC_B16_BRTAKEN:
7059 case BFD_RELOC_PPC_B16_BRNTAKEN:
7060 case BFD_RELOC_16_GOTOFF:
7061 case BFD_RELOC_LO16_GOTOFF:
7062 case BFD_RELOC_HI16_GOTOFF:
7063 case BFD_RELOC_HI16_S_GOTOFF:
7064 case BFD_RELOC_LO16_PLTOFF:
7065 case BFD_RELOC_HI16_PLTOFF:
7066 case BFD_RELOC_HI16_S_PLTOFF:
7067 case BFD_RELOC_PPC_COPY:
7068 case BFD_RELOC_PPC_GLOB_DAT:
7069 case BFD_RELOC_16_BASEREL:
7070 case BFD_RELOC_LO16_BASEREL:
7071 case BFD_RELOC_HI16_BASEREL:
7072 case BFD_RELOC_HI16_S_BASEREL:
7073 case BFD_RELOC_PPC_TLS:
7074 case BFD_RELOC_PPC_DTPREL16_LO:
7075 case BFD_RELOC_PPC_DTPREL16_HI:
7076 case BFD_RELOC_PPC_DTPREL16_HA:
7077 case BFD_RELOC_PPC_TPREL16_LO:
7078 case BFD_RELOC_PPC_TPREL16_HI:
7079 case BFD_RELOC_PPC_TPREL16_HA:
7080 case BFD_RELOC_PPC_GOT_TLSGD16:
7081 case BFD_RELOC_PPC_GOT_TLSGD16_LO:
7082 case BFD_RELOC_PPC_GOT_TLSGD16_HI:
7083 case BFD_RELOC_PPC_GOT_TLSGD16_HA:
7084 case BFD_RELOC_PPC_GOT_TLSLD16:
7085 case BFD_RELOC_PPC_GOT_TLSLD16_LO:
7086 case BFD_RELOC_PPC_GOT_TLSLD16_HI:
7087 case BFD_RELOC_PPC_GOT_TLSLD16_HA:
7088 case BFD_RELOC_PPC_GOT_DTPREL16:
7089 case BFD_RELOC_PPC_GOT_DTPREL16_LO:
7090 case BFD_RELOC_PPC_GOT_DTPREL16_HI:
7091 case BFD_RELOC_PPC_GOT_DTPREL16_HA:
7092 case BFD_RELOC_PPC_GOT_TPREL16:
7093 case BFD_RELOC_PPC_GOT_TPREL16_LO:
7094 case BFD_RELOC_PPC_GOT_TPREL16_HI:
7095 case BFD_RELOC_PPC_GOT_TPREL16_HA:
7096 case BFD_RELOC_24_PLT_PCREL:
7097 case BFD_RELOC_PPC_LOCAL24PC:
7098 case BFD_RELOC_32_PLT_PCREL:
7099 case BFD_RELOC_GPREL16:
7100 case BFD_RELOC_PPC_VLE_SDAREL_LO16A:
7101 case BFD_RELOC_PPC_VLE_SDAREL_HI16A:
7102 case BFD_RELOC_PPC_VLE_SDAREL_HA16A:
7103 case BFD_RELOC_PPC_EMB_NADDR32:
7104 case BFD_RELOC_PPC_EMB_NADDR16:
7105 case BFD_RELOC_PPC_EMB_NADDR16_LO:
7106 case BFD_RELOC_PPC_EMB_NADDR16_HI:
7107 case BFD_RELOC_PPC_EMB_NADDR16_HA:
7108 case BFD_RELOC_PPC_EMB_SDAI16:
7109 case BFD_RELOC_PPC_EMB_SDA2REL:
7110 case BFD_RELOC_PPC_EMB_SDA2I16:
7111 case BFD_RELOC_PPC_EMB_SDA21:
7112 case BFD_RELOC_PPC_VLE_SDA21_LO:
7113 case BFD_RELOC_PPC_EMB_MRKREF:
7114 case BFD_RELOC_PPC_EMB_RELSEC16:
7115 case BFD_RELOC_PPC_EMB_RELST_LO:
7116 case BFD_RELOC_PPC_EMB_RELST_HI:
7117 case BFD_RELOC_PPC_EMB_RELST_HA:
7118 case BFD_RELOC_PPC_EMB_BIT_FLD:
7119 case BFD_RELOC_PPC_EMB_RELSDA:
7120 case BFD_RELOC_PPC64_TOC:
7121 case BFD_RELOC_PPC_TOC16:
7122 case BFD_RELOC_PPC64_TOC16_LO:
7123 case BFD_RELOC_PPC64_TOC16_HI:
7124 case BFD_RELOC_PPC64_TOC16_HA:
7125 case BFD_RELOC_PPC64_DTPREL16_HIGH:
7126 case BFD_RELOC_PPC64_DTPREL16_HIGHA:
7127 case BFD_RELOC_PPC64_DTPREL16_HIGHER:
7128 case BFD_RELOC_PPC64_DTPREL16_HIGHERA:
7129 case BFD_RELOC_PPC64_DTPREL16_HIGHEST:
7130 case BFD_RELOC_PPC64_DTPREL16_HIGHESTA:
7131 case BFD_RELOC_PPC64_TPREL16_HIGH:
7132 case BFD_RELOC_PPC64_TPREL16_HIGHA:
7133 case BFD_RELOC_PPC64_TPREL16_HIGHER:
7134 case BFD_RELOC_PPC64_TPREL16_HIGHERA:
7135 case BFD_RELOC_PPC64_TPREL16_HIGHEST:
7136 case BFD_RELOC_PPC64_TPREL16_HIGHESTA:
7142 case BFD_RELOC_NONE:
7144 case BFD_RELOC_CTOR:
7146 case BFD_RELOC_32_PCREL:
7149 case BFD_RELOC_64_PCREL:
7151 case BFD_RELOC_16_PCREL:
7157 _("Gas failure, reloc value %d\n"), fixP->fx_r_type);
7162 if (fixP->fx_size && APPLY_RELOC)
7163 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
7164 fieldval, fixP->fx_size);
7166 && (seg->flags & SEC_CODE) != 0
7167 && fixP->fx_size == 4
7170 && (fixP->fx_r_type == BFD_RELOC_32
7171 || fixP->fx_r_type == BFD_RELOC_CTOR
7172 || fixP->fx_r_type == BFD_RELOC_32_PCREL))
7173 as_warn_where (fixP->fx_file, fixP->fx_line,
7174 _("data in executable section"));
7178 ppc_elf_validate_fix (fixP, seg);
7179 fixP->fx_addnumber = value;
7181 /* PowerPC uses RELA relocs, ie. the reloc addend is stored separately
7182 from the section contents. If we are going to be emitting a reloc
7183 then the section contents are immaterial, so don't warn if they
7184 happen to overflow. Leave such warnings to ld. */
7187 fixP->fx_no_overflow = 1;
7189 /* Arrange to emit .TOC. as a normal symbol if used in anything
7190 but .TOC.@tocbase. */
7192 && fixP->fx_r_type != BFD_RELOC_PPC64_TOC
7193 && fixP->fx_addsy != NULL
7194 && strcmp (S_GET_NAME (fixP->fx_addsy), ".TOC.") == 0)
7195 symbol_get_bfdsym (fixP->fx_addsy)->flags |= BSF_KEEP;
7198 if (fixP->fx_r_type != BFD_RELOC_PPC_TOC16)
7199 fixP->fx_addnumber = 0;
7203 fixP->fx_addnumber = 0;
7205 /* We want to use the offset within the toc, not the actual VMA
7207 fixP->fx_addnumber =
7208 - bfd_get_section_vma (stdoutput, S_GET_SEGMENT (fixP->fx_addsy))
7209 - S_GET_VALUE (ppc_toc_csect);
7210 /* Set *valP to avoid errors. */
7217 /* Generate a reloc for a fixup. */
7220 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
7224 reloc = XNEW (arelent);
7226 reloc->sym_ptr_ptr = XNEW (asymbol *);
7227 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
7228 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
7229 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
7230 if (reloc->howto == (reloc_howto_type *) NULL)
7232 as_bad_where (fixp->fx_file, fixp->fx_line,
7233 _("reloc %d not supported by object file format"),
7234 (int) fixp->fx_r_type);
7237 reloc->addend = fixp->fx_addnumber;
7243 ppc_cfi_frame_initial_instructions (void)
7245 cfi_add_CFA_def_cfa (1, 0);
7249 tc_ppc_regname_to_dw2regnum (char *regname)
7251 unsigned int regnum = -1;
7255 static struct { const char *name; int dw2regnum; } regnames[] =
7257 { "sp", 1 }, { "r.sp", 1 }, { "rtoc", 2 }, { "r.toc", 2 },
7258 { "mq", 64 }, { "lr", 65 }, { "ctr", 66 }, { "ap", 67 },
7259 { "cr", 70 }, { "xer", 76 }, { "vrsave", 109 }, { "vscr", 110 },
7260 { "spe_acc", 111 }, { "spefscr", 112 }
7263 for (i = 0; i < ARRAY_SIZE (regnames); ++i)
7264 if (strcmp (regnames[i].name, regname) == 0)
7265 return regnames[i].dw2regnum;
7267 if (regname[0] == 'r' || regname[0] == 'f' || regname[0] == 'v')
7269 p = regname + 1 + (regname[1] == '.');
7270 regnum = strtoul (p, &q, 10);
7271 if (p == q || *q || regnum >= 32)
7273 if (regname[0] == 'f')
7275 else if (regname[0] == 'v')
7278 else if (regname[0] == 'c' && regname[1] == 'r')
7280 p = regname + 2 + (regname[2] == '.');
7281 if (p[0] < '0' || p[0] > '7' || p[1])
7283 regnum = p[0] - '0' + 68;