1 /* Altera Nios II assembler.
2 Copyright (C) 2012-2018 Free Software Foundation, Inc.
3 Contributed by Nigel Gray (ngray@altera.com).
4 Contributed by Mentor Graphics, Inc.
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street - Fifth Floor, Boston, MA
24 #include "opcode/nios2.h"
25 #include "elf/nios2.h"
28 #include "dwarf2dbg.h"
30 #include "safe-ctype.h"
31 #include "dw2gencfi.h"
34 /* We are not supporting any other target so we throw a compile time error. */
38 /* We can choose our endianness at run-time, regardless of configuration. */
39 extern int target_big_endian;
41 /* This array holds the chars that always start a comment. If the
42 pre-processor is disabled, these aren't very useful. */
43 const char comment_chars[] = "#";
45 /* This array holds the chars that only start a comment at the beginning of
46 a line. If the line seems to have the form '# 123 filename'
47 .line and .file directives will appear in the pre-processed output. */
48 /* Note that input_file.c hand checks for '#' at the beginning of the
49 first line of the input file. This is because the compiler outputs
50 #NO_APP at the beginning of its output. */
51 /* Also note that C style comments are always supported. */
52 const char line_comment_chars[] = "#";
54 /* This array holds machine specific line separator characters. */
55 const char line_separator_chars[] = ";";
57 /* Chars that can be used to separate mant from exp in floating point nums. */
58 const char EXP_CHARS[] = "eE";
60 /* Chars that mean this number is a floating point constant. */
63 const char FLT_CHARS[] = "rRsSfFdDxXpP";
65 /* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
66 changed in read.c. Ideally it shouldn't have to know about it at all,
67 but nothing is ideal around here. */
69 /* Machine-dependent command-line options. */
71 const char *md_shortopts = "r";
73 struct option md_longopts[] = {
74 #define OPTION_RELAX_ALL (OPTION_MD_BASE + 0)
75 {"relax-all", no_argument, NULL, OPTION_RELAX_ALL},
76 #define OPTION_NORELAX (OPTION_MD_BASE + 1)
77 {"no-relax", no_argument, NULL, OPTION_NORELAX},
78 #define OPTION_RELAX_SECTION (OPTION_MD_BASE + 2)
79 {"relax-section", no_argument, NULL, OPTION_RELAX_SECTION},
80 #define OPTION_EB (OPTION_MD_BASE + 3)
81 {"EB", no_argument, NULL, OPTION_EB},
82 #define OPTION_EL (OPTION_MD_BASE + 4)
83 {"EL", no_argument, NULL, OPTION_EL},
84 #define OPTION_MARCH (OPTION_MD_BASE + 5)
85 {"march", required_argument, NULL, OPTION_MARCH}
88 size_t md_longopts_size = sizeof (md_longopts);
90 /* The assembler supports three different relaxation modes, controlled by
91 command-line options. */
99 /* Struct contains all assembler options set with .set. */
102 /* .set noat -> noat = 1 allows assembly code to use at without warning
103 and macro expansions generate a warning.
104 .set at -> noat = 0, assembly code using at warn but macro expansions
105 do not generate warnings. */
108 /* .set nobreak -> nobreak = 1 allows assembly code to use ba,bt without
110 .set break -> nobreak = 0, assembly code using ba,bt warns. */
113 /* .cmd line option -relax-all allows all branches and calls to be replaced
114 with longer versions.
115 -no-relax inhibits branch/call conversion.
116 The default value is relax_section, which relaxes branches within
120 } nios2_as_options = {FALSE, FALSE, relax_section};
123 typedef struct nios2_insn_reloc
125 /* Any expression in the instruction is parsed into this field,
126 which is passed to fix_new_exp() to generate a fixup. */
127 expressionS reloc_expression;
129 /* The type of the relocation to be applied. */
130 bfd_reloc_code_real_type reloc_type;
133 unsigned int reloc_pcrel;
135 /* The next relocation to be applied to the instruction. */
136 struct nios2_insn_reloc *reloc_next;
139 /* This struct is used to hold state when assembling instructions. */
140 typedef struct nios2_insn_info
142 /* Assembled instruction. */
143 unsigned long insn_code;
145 /* Constant bits masked into insn_code for self-check mode. */
146 unsigned long constant_bits;
148 /* Pointer to the relevant bit of the opcode table. */
149 const struct nios2_opcode *insn_nios2_opcode;
150 /* After parsing ptrs to the tokens in the instruction fill this array
151 it is terminated with a null pointer (hence the first +1).
152 The second +1 is because in some parts of the code the opcode
153 is not counted as a token, but still placed in this array. */
154 const char *insn_tokens[NIOS2_MAX_INSN_TOKENS + 1 + 1];
156 /* This holds information used to generate fixups
157 and eventually relocations if it is not null. */
158 nios2_insn_relocS *insn_reloc;
162 /* This struct is used to convert Nios II pseudo-ops into the
163 corresponding real op. */
164 typedef struct nios2_ps_insn_info
166 /* Map this pseudo_op... */
167 const char *pseudo_insn;
169 /* ...to this real instruction. */
172 /* Call this function to modify the operands.... */
173 void (*arg_modifer_func) (char ** parsed_args, const char *arg, int num,
176 /* ...with these arguments. */
177 const char *arg_modifier;
181 /* If arg_modifier_func allocates new memory, provide this function
182 to free it afterwards. */
183 void (*arg_cleanup_func) (char **parsed_args, int num, int start);
184 } nios2_ps_insn_infoS;
186 /* Opcode hash table. */
187 static struct hash_control *nios2_opcode_hash = NULL;
188 #define nios2_opcode_lookup(NAME) \
189 ((struct nios2_opcode *) hash_find (nios2_opcode_hash, (NAME)))
191 /* Register hash table. */
192 static struct hash_control *nios2_reg_hash = NULL;
193 #define nios2_reg_lookup(NAME) \
194 ((struct nios2_reg *) hash_find (nios2_reg_hash, (NAME)))
197 /* Pseudo-op hash table. */
198 static struct hash_control *nios2_ps_hash = NULL;
199 #define nios2_ps_lookup(NAME) \
200 ((nios2_ps_insn_infoS *) hash_find (nios2_ps_hash, (NAME)))
202 /* The known current alignment of the current section. */
203 static int nios2_current_align;
204 static segT nios2_current_align_seg;
206 static int nios2_auto_align_on = 1;
208 /* The last seen label in the current section. This is used to auto-align
209 labels preceding instructions. */
210 static symbolS *nios2_last_label;
212 /* If we saw a 16-bit CDX instruction, we can align on 2-byte boundaries
213 instead of 4-bytes. Use this to keep track of the minimum power-of-2
215 static int nios2_min_align = 2;
218 /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
222 /* The processor architecture value, EF_NIOS2_ARCH_R1 by default. */
223 static int nios2_architecture = EF_NIOS2_ARCH_R1;
226 /** Utility routines. */
227 /* Function md_chars_to_number takes the sequence of
228 bytes in buf and returns the corresponding value
229 in an int. n must be 1, 2 or 4. */
231 md_chars_to_number (char *buf, int n)
236 gas_assert (n == 1 || n == 2 || n == 4);
239 if (target_big_endian)
240 for (i = 0; i < n; ++i)
241 val = val | ((buf[i] & 0xff) << 8 * (n - (i + 1)));
243 for (i = 0; i < n; ++i)
244 val = val | ((buf[i] & 0xff) << 8 * i);
249 /* This function turns a C long int, short int or char
250 into the series of bytes that represent the number
251 on the target machine. */
253 md_number_to_chars (char *buf, valueT val, int n)
255 gas_assert (n == 1 || n == 2 || n == 4 || n == 8);
256 if (target_big_endian)
257 number_to_chars_bigendian (buf, val, n);
259 number_to_chars_littleendian (buf, val, n);
262 /* Turn a string in input_line_pointer into a floating point constant
263 of type TYPE, and store the appropriate bytes in *LITP. The number
264 of LITTLENUMS emitted is stored in *SIZEP. An error message is
265 returned, or NULL on OK. */
267 md_atof (int type, char *litP, int *sizeP)
270 LITTLENUM_TYPE words[4];
284 return _("bad call to md_atof");
287 t = atof_ieee (input_line_pointer, type, words);
289 input_line_pointer = t;
293 if (! target_big_endian)
294 for (i = prec - 1; i >= 0; i--, litP += 2)
295 md_number_to_chars (litP, (valueT) words[i], 2);
297 for (i = 0; i < prec; i++, litP += 2)
298 md_number_to_chars (litP, (valueT) words[i], 2);
303 /* Return true if STR starts with PREFIX, which should be a string literal. */
304 #define strprefix(STR, PREFIX) \
305 (strncmp ((STR), PREFIX, strlen (PREFIX)) == 0)
308 /* Return true if STR is prefixed with a special relocation operator. */
310 nios2_special_relocation_p (const char *str)
312 return (strprefix (str, "%lo")
313 || strprefix (str, "%hi")
314 || strprefix (str, "%hiadj")
315 || strprefix (str, "%gprel")
316 || strprefix (str, "%got")
317 || strprefix (str, "%call")
318 || strprefix (str, "%gotoff_lo")
319 || strprefix (str, "%gotoff_hiadj")
320 || strprefix (str, "%tls_gd")
321 || strprefix (str, "%tls_ldm")
322 || strprefix (str, "%tls_ldo")
323 || strprefix (str, "%tls_ie")
324 || strprefix (str, "%tls_le")
325 || strprefix (str, "%gotoff"));
329 /* nop fill patterns for text section. */
330 static char const nop_r1[4] = { 0x3a, 0x88, 0x01, 0x00 };
331 static char const nop_r2[4] = { 0x20, 0x00, 0x00, 0xc4 };
332 static char const nop_r2_cdx[2] = { 0x3b, 0x00 };
333 static char const *nop32 = nop_r1;
334 static char const *nop16 = NULL;
336 /* Handles all machine-dependent alignment needs. */
338 nios2_align (int log_size, const char *pfill, symbolS *label)
341 long max_alignment = 15;
343 /* The front end is prone to changing segments out from under us
344 temporarily when -g is in effect. */
345 int switched_seg_p = (nios2_current_align_seg != now_seg);
348 if (align > max_alignment)
350 align = max_alignment;
351 as_bad (_("Alignment too large: %d. assumed"), align);
355 as_warn (_("Alignment negative: 0 assumed"));
361 if (subseg_text_p (now_seg) && align >= nios2_min_align)
363 /* First, make sure we're on the minimum boundary, in case
364 someone has been putting .byte values the text section. */
365 if (nios2_current_align < nios2_min_align || switched_seg_p)
366 frag_align (nios2_min_align, 0, 0);
368 /* If we might be on a 2-byte boundary, first align to a
369 4-byte boundary using the 2-byte nop as fill. */
370 if (nios2_min_align == 1
371 && align > nios2_min_align
375 frag_align_pattern (2, nop16, 2, 0);
378 /* Now fill in the alignment pattern. */
380 frag_align_pattern (align, pfill, 4, 0);
382 frag_align (align, 0, 0);
385 frag_align (align, 0, 0);
388 nios2_current_align = align;
390 /* If the last label was in a different section we can't align it. */
391 if (label != NULL && !switched_seg_p)
394 int label_seen = FALSE;
395 struct frag *old_frag;
399 gas_assert (S_GET_SEGMENT (label) == now_seg);
401 old_frag = symbol_get_frag (label);
402 old_value = S_GET_VALUE (label);
403 new_value = (valueT) frag_now_fix ();
405 /* It is possible to have more than one label at a particular
406 address, especially if debugging is enabled, so we must
407 take care to adjust all the labels at this address in this
408 fragment. To save time we search from the end of the symbol
409 list, backwards, since the symbols we are interested in are
410 almost certainly the ones that were most recently added.
411 Also to save time we stop searching once we have seen at least
412 one matching label, and we encounter a label that is no longer
413 in the target fragment. Note, this search is guaranteed to
414 find at least one match when sym == label, so no special case
415 code is necessary. */
416 for (sym = symbol_lastP; sym != NULL; sym = symbol_previous (sym))
417 if (symbol_get_frag (sym) == old_frag
418 && S_GET_VALUE (sym) == old_value)
421 symbol_set_frag (sym, frag_now);
422 S_SET_VALUE (sym, new_value);
424 else if (label_seen && symbol_get_frag (sym) != old_frag)
427 record_alignment (now_seg, align);
432 /** Support for self-check mode. */
434 /* Mode of the assembler. */
437 NIOS2_MODE_ASSEMBLE, /* Ordinary operation. */
438 NIOS2_MODE_TEST /* Hidden mode used for self testing. */
441 static NIOS2_MODE nios2_mode = NIOS2_MODE_ASSEMBLE;
443 /* This function is used to in self-checking mode
444 to check the assembled instruction
445 opcode should be the assembled opcode, and exp_opcode
446 the parsed string representing the expected opcode. */
448 nios2_check_assembly (unsigned int opcode, const char *exp_opcode)
450 if (nios2_mode == NIOS2_MODE_TEST)
452 if (exp_opcode == NULL)
453 as_bad (_("expecting opcode string in self test mode"));
454 else if (opcode != strtoul (exp_opcode, NULL, 16))
455 as_bad (_("assembly 0x%08x, expected %s"), opcode, exp_opcode);
460 /** Support for machine-dependent assembler directives. */
461 /* Handle the .align pseudo-op. This aligns to a power of two. It
462 also adjusts any current instruction label. We treat this the same
463 way the MIPS port does: .align 0 turns off auto alignment. */
465 s_nios2_align (int ignore ATTRIBUTE_UNUSED)
469 const char *pfill = NULL;
470 long max_alignment = 15;
472 align = get_absolute_expression ();
473 if (align > max_alignment)
475 align = max_alignment;
476 as_bad (_("Alignment too large: %d. assumed"), align);
480 as_warn (_("Alignment negative: 0 assumed"));
484 if (*input_line_pointer == ',')
486 input_line_pointer++;
487 fill = get_absolute_expression ();
488 pfill = (const char *) &fill;
490 else if (subseg_text_p (now_seg))
491 pfill = (const char *) nop32;
495 nios2_last_label = NULL;
500 nios2_auto_align_on = 1;
501 nios2_align (align, pfill, nios2_last_label);
502 nios2_last_label = NULL;
505 nios2_auto_align_on = 0;
507 demand_empty_rest_of_line ();
510 /* Handle the .text pseudo-op. This is like the usual one, but it
511 clears the saved last label and resets known alignment. */
516 nios2_last_label = NULL;
517 nios2_current_align = 0;
518 nios2_current_align_seg = now_seg;
521 /* Handle the .data pseudo-op. This is like the usual one, but it
522 clears the saved last label and resets known alignment. */
527 nios2_last_label = NULL;
528 nios2_current_align = 0;
529 nios2_current_align_seg = now_seg;
532 /* Handle the .section pseudo-op. This is like the usual one, but it
533 clears the saved last label and resets known alignment. */
535 s_nios2_section (int ignore)
537 obj_elf_section (ignore);
538 nios2_last_label = NULL;
539 nios2_current_align = 0;
540 nios2_current_align_seg = now_seg;
543 /* Explicitly unaligned cons. */
545 s_nios2_ucons (int nbytes)
548 hold = nios2_auto_align_on;
549 nios2_auto_align_on = 0;
551 nios2_auto_align_on = hold;
554 /* Handle the .sdata directive. */
556 s_nios2_sdata (int ignore ATTRIBUTE_UNUSED)
558 get_absolute_expression (); /* Ignored. */
559 subseg_new (".sdata", 0);
560 demand_empty_rest_of_line ();
563 /* .set sets assembler options eg noat/at and is also used
564 to set symbol values (.equ, .equiv ). */
566 s_nios2_set (int equiv)
568 char *save = input_line_pointer;
570 char delim = get_symbol_name (&directive);
571 char *endline = input_line_pointer;
573 (void) restore_line_pointer (delim);
575 /* We only want to handle ".set XXX" if the
576 user has tried ".set XXX, YYY" they are not
577 trying a directive. This prevents
578 us from polluting the name space. */
580 if (is_end_of_line[(unsigned char) *input_line_pointer])
582 bfd_boolean done = TRUE;
585 if (!strcmp (directive, "noat"))
586 nios2_as_options.noat = TRUE;
587 else if (!strcmp (directive, "at"))
588 nios2_as_options.noat = FALSE;
589 else if (!strcmp (directive, "nobreak"))
590 nios2_as_options.nobreak = TRUE;
591 else if (!strcmp (directive, "break"))
592 nios2_as_options.nobreak = FALSE;
593 else if (!strcmp (directive, "norelax"))
594 nios2_as_options.relax = relax_none;
595 else if (!strcmp (directive, "relaxsection"))
596 nios2_as_options.relax = relax_section;
597 else if (!strcmp (directive, "relaxall"))
598 nios2_as_options.relax = relax_all;
605 demand_empty_rest_of_line ();
610 /* If we fall through to here, either we have ".set XXX, YYY"
611 or we have ".set XXX" where XXX is unknown or we have
613 input_line_pointer = save;
617 /* Machine-dependent assembler directives.
618 Format of each entry is:
619 { "directive", handler_func, param } */
620 const pseudo_typeS md_pseudo_table[] = {
621 {"align", s_nios2_align, 0},
622 {"text", s_nios2_text, 0},
623 {"data", s_nios2_data, 0},
624 {"section", s_nios2_section, 0},
625 {"section.s", s_nios2_section, 0},
626 {"sect", s_nios2_section, 0},
627 {"sect.s", s_nios2_section, 0},
628 /* .dword and .half are included for compatibility with MIPS. */
631 /* NIOS2 native word size is 4 bytes, so we override
632 the GAS default of 2. */
634 /* Explicitly unaligned directives. */
635 {"2byte", s_nios2_ucons, 2},
636 {"4byte", s_nios2_ucons, 4},
637 {"8byte", s_nios2_ucons, 8},
638 {"16byte", s_nios2_ucons, 16},
640 {"sdata", s_nios2_sdata, 0},
642 {"set", s_nios2_set, 0},
647 /** Relaxation support. */
649 /* We support two relaxation modes: a limited PC-relative mode with
650 -relax-section (the default), and an absolute jump mode with -relax-all.
652 Nios II PC-relative branch instructions only support 16-bit offsets.
653 And, there's no good way to add a 32-bit constant to the PC without
656 To deal with this, for the pc-relative relaxation mode we convert
658 into a series of 16-bit adds, like:
662 addi at, at, remainder
665 Similarly, conditional branches are converted from
666 b(condition) r, s, label
668 b(opposite condition) r, s, skip
672 addi at, at, remainder
676 The compiler can do a better job, either by converting the branch
677 directly into a JMP (going through the GOT for PIC) or by allocating
678 a second register for the 32-bit displacement.
680 For the -relax-all relaxation mode, the conversions are
681 movhi at, %hi(symbol+offset)
682 ori at, %lo(symbol+offset)
685 b(opposite condition), r, s, skip
686 movhi at, %hi(symbol+offset)
687 ori at, %lo(symbol+offset)
692 16-bit CDX branch instructions are relaxed first into equivalent
693 32-bit branches and then the above transformations are applied
698 /* Arbitrarily limit the number of addis we can insert; we need to be able
699 to specify the maximum growth size for each frag that contains a
700 relaxable branch. There's no point in specifying a huge number here
701 since that means the assembler needs to allocate that much extra
702 memory for every branch, and almost no real code will ever need it.
703 Plus, as already noted a better solution is to just use a jmp, or
704 allocate a second register to hold a 32-bit displacement.
705 FIXME: Rather than making this a constant, it could be controlled by
706 a command-line argument. */
707 #define RELAX_MAX_ADDI 32
709 /* The fr_subtype field represents the target-specific relocation state.
710 It has type relax_substateT (unsigned int). We use it to track the
711 number of addis necessary, plus a bit to track whether this is a
712 conditional branch and a bit for 16-bit CDX instructions.
713 Regardless of the smaller RELAX_MAX_ADDI limit, we reserve 16 bits
714 in the fr_subtype to encode the number of addis so that the whole
715 theoretically-valid range is representable.
716 For the -relax-all mode, N = 0 represents an in-range branch and N = 1
717 represents a branch that needs to be relaxed. */
718 #define UBRANCH (0 << 16)
719 #define CBRANCH (1 << 16)
720 #define CDXBRANCH (1 << 17)
721 #define IS_CBRANCH(SUBTYPE) ((SUBTYPE) & CBRANCH)
722 #define IS_UBRANCH(SUBTYPE) (!IS_CBRANCH (SUBTYPE))
723 #define IS_CDXBRANCH(SUBTYPE) ((SUBTYPE) & CDXBRANCH)
724 #define UBRANCH_SUBTYPE(N) (UBRANCH | (N))
725 #define CBRANCH_SUBTYPE(N) (CBRANCH | (N))
726 #define CDX_UBRANCH_SUBTYPE(N) (CDXBRANCH | UBRANCH | (N))
727 #define CDX_CBRANCH_SUBTYPE(N) (CDXBRANCH | CBRANCH | (N))
728 #define SUBTYPE_ADDIS(SUBTYPE) ((SUBTYPE) & 0xffff)
730 /* For the -relax-section mode, unconditional branches require 2 extra
731 instructions besides the addis, conditional branches require 3. */
732 #define UBRANCH_ADDIS_TO_SIZE(N) (((N) + 2) * 4)
733 #define CBRANCH_ADDIS_TO_SIZE(N) (((N) + 3) * 4)
735 /* For the -relax-all mode, unconditional branches require 3 instructions
736 and conditional branches require 4. */
737 #define UBRANCH_JUMP_SIZE 12
738 #define CBRANCH_JUMP_SIZE 16
740 /* Maximum sizes of relaxation sequences. */
741 #define UBRANCH_MAX_SIZE \
742 (nios2_as_options.relax == relax_all \
743 ? UBRANCH_JUMP_SIZE \
744 : UBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))
745 #define CBRANCH_MAX_SIZE \
746 (nios2_as_options.relax == relax_all \
747 ? CBRANCH_JUMP_SIZE \
748 : CBRANCH_ADDIS_TO_SIZE (RELAX_MAX_ADDI))
750 /* Register number of AT, the assembler temporary. */
753 /* Determine how many bytes are required to represent the sequence
754 indicated by SUBTYPE. */
756 nios2_relax_subtype_size (relax_substateT subtype)
758 int n = SUBTYPE_ADDIS (subtype);
760 /* Regular conditional/unconditional branch instruction. */
761 return (IS_CDXBRANCH (subtype) ? 2 : 4);
762 else if (nios2_as_options.relax == relax_all)
763 return (IS_CBRANCH (subtype) ? CBRANCH_JUMP_SIZE : UBRANCH_JUMP_SIZE);
764 else if (IS_CBRANCH (subtype))
765 return CBRANCH_ADDIS_TO_SIZE (n);
767 return UBRANCH_ADDIS_TO_SIZE (n);
770 /* Estimate size of fragp before relaxation.
771 This could also examine the offset in fragp and adjust
772 fragp->fr_subtype, but we will do that in nios2_relax_frag anyway. */
774 md_estimate_size_before_relax (fragS *fragp, segT segment ATTRIBUTE_UNUSED)
776 return nios2_relax_subtype_size (fragp->fr_subtype);
779 /* Implement md_relax_frag, returning the change in size of the frag. */
781 nios2_relax_frag (segT segment, fragS *fragp, long stretch)
783 addressT target = fragp->fr_offset;
784 relax_substateT subtype = fragp->fr_subtype;
785 symbolS *symbolp = fragp->fr_symbol;
789 fragS *sym_frag = symbol_get_frag (symbolp);
792 bfd_boolean is_cdx = FALSE;
794 target += S_GET_VALUE (symbolp);
796 /* See comments in write.c:relax_frag about handling of stretch. */
798 && sym_frag->relax_marker != fragp->relax_marker)
800 if (stretch < 0 || sym_frag->region == fragp->region)
802 else if (target < fragp->fr_address)
803 target = fragp->fr_next->fr_address + stretch;
806 /* We subtract fr_var (4 for 32-bit insns) because all pc relative
807 branches are from the next instruction. */
808 offset = target - fragp->fr_address - fragp->fr_fix - fragp->fr_var;
809 if (IS_CDXBRANCH (subtype) && IS_UBRANCH (subtype)
810 && offset >= -1024 && offset < 1024)
811 /* PC-relative CDX branch with 11-bit offset. */
813 else if (IS_CDXBRANCH (subtype) && IS_CBRANCH (subtype)
814 && offset >= -128 && offset < 128)
815 /* PC-relative CDX branch with 8-bit offset. */
817 else if (offset >= -32768 && offset < 32768)
818 /* Fits in PC-relative branch. */
820 else if (nios2_as_options.relax == relax_all)
821 /* Convert to jump. */
823 else if (nios2_as_options.relax == relax_section
824 && S_GET_SEGMENT (symbolp) == segment
825 && S_IS_DEFINED (symbolp))
826 /* Attempt a PC-relative relaxation on a branch to a defined
827 symbol in the same segment. */
829 /* The relaxation for conditional branches is offset by 4
830 bytes because we insert the inverted branch around the
832 if (IS_CBRANCH (subtype))
835 n = offset / 32767 + 1;
837 n = offset / -32768 + 1;
839 /* Bail out immediately if relaxation has failed. If we try to
840 defer the diagnostic to md_convert_frag, some pathological test
841 cases (e.g. gcc/testsuite/gcc.c-torture/compile/20001226-1.c)
842 apparently never converge. By returning 0 here we could pretend
843 to the caller that nothing has changed, but that leaves things
844 in an inconsistent state when we get to md_convert_frag. */
845 if (n > RELAX_MAX_ADDI)
847 as_bad_where (fragp->fr_file, fragp->fr_line,
848 _("branch offset out of range\n"));
849 as_fatal (_("branch relaxation failed\n"));
853 /* We cannot handle this case, diagnose overflow later. */
857 fragp->fr_subtype = subtype;
858 else if (IS_CBRANCH (subtype))
859 fragp->fr_subtype = CBRANCH_SUBTYPE (n);
861 fragp->fr_subtype = UBRANCH_SUBTYPE (n);
863 return (nios2_relax_subtype_size (fragp->fr_subtype)
864 - nios2_relax_subtype_size (subtype));
867 /* If we got here, it's probably an error. */
872 /* Complete fragp using the data from the relaxation pass. */
874 md_convert_frag (bfd *headers ATTRIBUTE_UNUSED, segT segment ATTRIBUTE_UNUSED,
877 char *buffer = fragp->fr_literal + fragp->fr_fix;
878 relax_substateT subtype = fragp->fr_subtype;
879 int n = SUBTYPE_ADDIS (subtype);
880 addressT target = fragp->fr_offset;
881 symbolS *symbolp = fragp->fr_symbol;
883 unsigned int addend_mask, addi_mask, op;
884 offsetT addend, remainder;
886 bfd_boolean is_r2 = (bfd_get_mach (stdoutput) == bfd_mach_nios2r2);
888 /* If this is a CDX branch we're not relaxing, just generate the fixup. */
889 if (IS_CDXBRANCH (subtype))
892 fix_new (fragp, fragp->fr_fix, 2, fragp->fr_symbol,
894 (IS_UBRANCH (subtype)
895 ? BFD_RELOC_NIOS2_R2_I10_1_PCREL
896 : BFD_RELOC_NIOS2_R2_T1I7_1_PCREL));
901 /* If this is a CDX branch we are relaxing, turn it into an equivalent
902 32-bit branch and then fall through to the normal non-CDX cases. */
903 if (fragp->fr_var == 2)
905 unsigned int opcode = md_chars_to_number (buffer, 2);
907 if (IS_CBRANCH (subtype))
909 unsigned int reg = nios2_r2_reg3_mappings[GET_IW_T1I7_A3 (opcode)];
910 if (GET_IW_R2_OP (opcode) == R2_OP_BNEZ_N)
911 opcode = MATCH_R2_BNE | SET_IW_F2I16_A (reg);
913 opcode = MATCH_R2_BEQ | SET_IW_F2I16_A (reg);
916 opcode = MATCH_R2_BR;
917 md_number_to_chars (buffer, opcode, 4);
921 /* If we didn't or can't relax, this is a regular branch instruction.
922 We just need to generate the fixup for the symbol and offset. */
925 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol,
926 fragp->fr_offset, 1, BFD_RELOC_16_PCREL);
931 /* Replace the cbranch at fr_fix with one that has the opposite condition
932 in order to jump around the block of instructions we'll be adding. */
933 if (IS_CBRANCH (subtype))
935 unsigned int br_opcode;
936 unsigned int old_op, new_op;
939 /* Account for the nextpc and jmp in the pc-relative case, or the two
940 load instructions and jump in the absolute case. */
941 if (nios2_as_options.relax == relax_section)
942 nbytes = (n + 2) * 4;
946 br_opcode = md_chars_to_number (buffer, 4);
949 old_op = GET_IW_R2_OP (br_opcode);
973 br_opcode = ((br_opcode & ~IW_R2_OP_SHIFTED_MASK)
974 | SET_IW_R2_OP (new_op));
975 br_opcode = br_opcode | SET_IW_F2I16_IMM16 (nbytes);
979 old_op = GET_IW_R1_OP (br_opcode);
1003 br_opcode = ((br_opcode & ~IW_R1_OP_SHIFTED_MASK)
1004 | SET_IW_R1_OP (new_op));
1005 br_opcode = br_opcode | SET_IW_I_IMM16 (nbytes);
1007 md_number_to_chars (buffer, br_opcode, 4);
1012 /* Load at for the PC-relative case. */
1013 if (nios2_as_options.relax == relax_section)
1015 /* Insert the nextpc instruction. */
1017 op = MATCH_R2_NEXTPC | SET_IW_F3X6L5_C (AT_REGNUM);
1019 op = MATCH_R1_NEXTPC | SET_IW_R_C (AT_REGNUM);
1020 md_number_to_chars (buffer, op, 4);
1024 /* We need to know whether the offset is positive or negative. */
1025 target += S_GET_VALUE (symbolp);
1026 offset = target - fragp->fr_address - fragp->fr_fix;
1032 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)addend);
1034 addend_mask = SET_IW_I_IMM16 ((unsigned int)addend);
1036 /* Insert n-1 addi instructions. */
1038 addi_mask = (MATCH_R2_ADDI
1039 | SET_IW_F2I16_B (AT_REGNUM)
1040 | SET_IW_F2I16_A (AT_REGNUM));
1042 addi_mask = (MATCH_R1_ADDI
1043 | SET_IW_I_B (AT_REGNUM)
1044 | SET_IW_I_A (AT_REGNUM));
1045 for (i = 0; i < n - 1; i ++)
1047 md_number_to_chars (buffer, addi_mask | addend_mask, 4);
1052 /* Insert the last addi instruction to hold the remainder. */
1053 remainder = offset - addend * (n - 1);
1054 gas_assert (remainder >= -32768 && remainder <= 32767);
1056 addend_mask = SET_IW_F2I16_IMM16 ((unsigned int)remainder);
1058 addend_mask = SET_IW_I_IMM16 ((unsigned int)remainder);
1059 md_number_to_chars (buffer, addi_mask | addend_mask, 4);
1064 /* Load at for the absolute case. */
1068 op = MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM) | SET_IW_F2I16_A (0);
1070 op = MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM) | SET_IW_I_A (0);
1071 md_number_to_chars (buffer, op, 4);
1072 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
1073 0, BFD_RELOC_NIOS2_HI16);
1077 op = (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
1078 | SET_IW_F2I16_A (AT_REGNUM));
1080 op = (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
1081 | SET_IW_I_A (AT_REGNUM));
1082 md_number_to_chars (buffer, op, 4);
1083 fix_new (fragp, fragp->fr_fix, 4, fragp->fr_symbol, fragp->fr_offset,
1084 0, BFD_RELOC_NIOS2_LO16);
1089 /* Insert the jmp instruction. */
1091 op = MATCH_R2_JMP | SET_IW_F3X6L5_A (AT_REGNUM);
1093 op = MATCH_R1_JMP | SET_IW_R_A (AT_REGNUM);
1094 md_number_to_chars (buffer, op, 4);
1100 /** Fixups and overflow checking. */
1102 /* Check a fixup for overflow. */
1104 nios2_check_overflow (valueT fixup, reloc_howto_type *howto)
1106 /* If there is a rightshift, check that the low-order bits are
1107 zero before applying it. */
1108 if (howto->rightshift)
1110 if ((~(~((valueT) 0) << howto->rightshift) & fixup)
1111 && howto->complain_on_overflow != complain_overflow_dont)
1113 fixup = ((signed)fixup) >> howto->rightshift;
1116 /* Check for overflow - return TRUE if overflow, FALSE if not. */
1117 switch (howto->complain_on_overflow)
1119 case complain_overflow_dont:
1121 case complain_overflow_bitfield:
1122 if ((fixup >> howto->bitsize) != 0
1123 && ((signed) fixup >> howto->bitsize) != -1)
1126 case complain_overflow_signed:
1127 if ((fixup & 0x80000000) > 0)
1129 /* Check for negative overflow. */
1130 if ((signed) fixup < (signed) (~0U << (howto->bitsize - 1)))
1135 /* Check for positive overflow. */
1136 if (fixup >= ((unsigned) 1 << (howto->bitsize - 1)))
1140 case complain_overflow_unsigned:
1141 if ((fixup >> howto->bitsize) != 0)
1145 as_bad (_("error checking for overflow - broken assembler"));
1151 /* Emit diagnostic for fixup overflow. */
1153 nios2_diagnose_overflow (valueT fixup, reloc_howto_type *howto,
1154 fixS *fixP, valueT value)
1156 if (fixP->fx_r_type == BFD_RELOC_8
1157 || fixP->fx_r_type == BFD_RELOC_16
1158 || fixP->fx_r_type == BFD_RELOC_32)
1159 /* These relocs are against data, not instructions. */
1160 as_bad_where (fixP->fx_file, fixP->fx_line,
1161 _("immediate value 0x%x truncated to 0x%x"),
1162 (unsigned int) fixup,
1163 (unsigned int) (~(~(valueT) 0 << howto->bitsize) & fixup));
1166 /* What opcode is the instruction? This will determine
1167 whether we check for overflow in immediate values
1168 and what error message we get. */
1169 const struct nios2_opcode *opcode;
1170 enum overflow_type overflow_msg_type;
1171 unsigned int range_min;
1172 unsigned int range_max;
1173 unsigned int address;
1175 opcode = nios2_find_opcode_hash (value, bfd_get_mach (stdoutput));
1176 gas_assert (opcode);
1177 gas_assert (fixP->fx_size == opcode->size);
1178 overflow_msg_type = opcode->overflow_msg;
1179 switch (overflow_msg_type)
1181 case call_target_overflow:
1183 = ((fixP->fx_frag->fr_address + fixP->fx_where) & 0xf0000000);
1184 range_max = range_min + 0x0fffffff;
1185 address = fixup | range_min;
1187 as_bad_where (fixP->fx_file, fixP->fx_line,
1188 _("call target address 0x%08x out of range 0x%08x to 0x%08x"),
1189 address, range_min, range_max);
1191 case branch_target_overflow:
1192 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
1193 as_bad_where (fixP->fx_file, fixP->fx_line,
1194 _("branch offset %d out of range %d to %d"),
1195 (int)fixup, -32768, 32767);
1197 as_bad_where (fixP->fx_file, fixP->fx_line,
1198 _("branch offset %d out of range"),
1201 case address_offset_overflow:
1202 if (opcode->format == iw_i_type || opcode->format == iw_F2I16_type)
1203 as_bad_where (fixP->fx_file, fixP->fx_line,
1204 _("%s offset %d out of range %d to %d"),
1205 opcode->name, (int)fixup, -32768, 32767);
1207 as_bad_where (fixP->fx_file, fixP->fx_line,
1208 _("%s offset %d out of range"),
1209 opcode->name, (int)fixup);
1211 case signed_immed16_overflow:
1212 as_bad_where (fixP->fx_file, fixP->fx_line,
1213 _("immediate value %d out of range %d to %d"),
1214 (int)fixup, -32768, 32767);
1216 case unsigned_immed16_overflow:
1217 as_bad_where (fixP->fx_file, fixP->fx_line,
1218 _("immediate value %u out of range %u to %u"),
1219 (unsigned int)fixup, 0, 65535);
1221 case unsigned_immed5_overflow:
1222 as_bad_where (fixP->fx_file, fixP->fx_line,
1223 _("immediate value %u out of range %u to %u"),
1224 (unsigned int)fixup, 0, 31);
1226 case signed_immed12_overflow:
1227 as_bad_where (fixP->fx_file, fixP->fx_line,
1228 _("immediate value %d out of range %d to %d"),
1229 (int)fixup, -2048, 2047);
1231 case custom_opcode_overflow:
1232 as_bad_where (fixP->fx_file, fixP->fx_line,
1233 _("custom instruction opcode %u out of range %u to %u"),
1234 (unsigned int)fixup, 0, 255);
1237 as_bad_where (fixP->fx_file, fixP->fx_line,
1238 _("overflow in immediate argument"));
1244 /* Apply a fixup to the object file. */
1246 md_apply_fix (fixS *fixP, valueT *valP, segT seg ATTRIBUTE_UNUSED)
1248 /* Assert that the fixup is one we can handle. */
1249 gas_assert (fixP != NULL && valP != NULL
1250 && (fixP->fx_r_type == BFD_RELOC_8
1251 || fixP->fx_r_type == BFD_RELOC_16
1252 || fixP->fx_r_type == BFD_RELOC_32
1253 || fixP->fx_r_type == BFD_RELOC_64
1254 || fixP->fx_r_type == BFD_RELOC_NIOS2_S16
1255 || fixP->fx_r_type == BFD_RELOC_NIOS2_U16
1256 || fixP->fx_r_type == BFD_RELOC_16_PCREL
1257 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26
1258 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM5
1259 || fixP->fx_r_type == BFD_RELOC_NIOS2_CACHE_OPX
1260 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM6
1261 || fixP->fx_r_type == BFD_RELOC_NIOS2_IMM8
1262 || fixP->fx_r_type == BFD_RELOC_NIOS2_HI16
1263 || fixP->fx_r_type == BFD_RELOC_NIOS2_LO16
1264 || fixP->fx_r_type == BFD_RELOC_NIOS2_HIADJ16
1265 || fixP->fx_r_type == BFD_RELOC_NIOS2_GPREL
1266 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1267 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY
1268 || fixP->fx_r_type == BFD_RELOC_NIOS2_UJMP
1269 || fixP->fx_r_type == BFD_RELOC_NIOS2_CJMP
1270 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALLR
1271 || fixP->fx_r_type == BFD_RELOC_NIOS2_ALIGN
1272 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT16
1273 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL16
1274 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
1275 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
1276 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
1277 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
1278 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
1279 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
1280 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
1281 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
1282 || fixP->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
1283 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL26_NOAT
1284 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
1285 || fixP->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
1286 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
1287 || fixP->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
1288 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_S12
1289 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_I10_1_PCREL
1290 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_1_PCREL
1291 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1I7_2
1292 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4
1293 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_1
1294 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T2I4_2
1295 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X1I7_2
1296 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_X2L5
1297 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_F1I5_2
1298 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_L5I4X1
1299 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6
1300 || fixP->fx_r_type == BFD_RELOC_NIOS2_R2_T1X1I6_2
1301 /* Add other relocs here as we generate them. */
1304 if (fixP->fx_r_type == BFD_RELOC_64)
1306 /* We may reach here due to .8byte directives, but we never output
1307 BFD_RELOC_64; it must be resolved. */
1308 if (fixP->fx_addsy != NULL)
1309 as_bad_where (fixP->fx_file, fixP->fx_line,
1310 _("cannot create 64-bit relocation"));
1313 md_number_to_chars (fixP->fx_frag->fr_literal + fixP->fx_where,
1320 /* The value passed in valP can be the value of a fully
1321 resolved expression, or it can be the value of a partially
1322 resolved expression. In the former case, both fixP->fx_addsy
1323 and fixP->fx_subsy are NULL, and fixP->fx_offset == *valP, and
1324 we can fix up the instruction that fixP relates to.
1325 In the latter case, one or both of fixP->fx_addsy and
1326 fixP->fx_subsy are not NULL, and fixP->fx_offset may or may not
1327 equal *valP. We don't need to check for fixP->fx_subsy being null
1328 because the generic part of the assembler generates an error if
1329 it is not an absolute symbol. */
1330 if (fixP->fx_addsy != NULL)
1331 /* Partially resolved expression. */
1333 fixP->fx_addnumber = fixP->fx_offset;
1336 switch (fixP->fx_r_type)
1338 case BFD_RELOC_NIOS2_TLS_GD16:
1339 case BFD_RELOC_NIOS2_TLS_LDM16:
1340 case BFD_RELOC_NIOS2_TLS_LDO16:
1341 case BFD_RELOC_NIOS2_TLS_IE16:
1342 case BFD_RELOC_NIOS2_TLS_LE16:
1343 case BFD_RELOC_NIOS2_TLS_DTPMOD:
1344 case BFD_RELOC_NIOS2_TLS_DTPREL:
1345 case BFD_RELOC_NIOS2_TLS_TPREL:
1346 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1353 /* Fully resolved fixup. */
1355 reloc_howto_type *howto
1356 = bfd_reloc_type_lookup (stdoutput, fixP->fx_r_type);
1359 as_bad_where (fixP->fx_file, fixP->fx_line,
1360 _("relocation is not supported"));
1363 valueT fixup = *valP;
1367 /* If this is a pc-relative relocation, we need to
1368 subtract the current offset within the object file
1369 FIXME : for some reason fixP->fx_pcrel isn't 1 when it should be
1370 so I'm using the howto structure instead to determine this. */
1371 if (howto->pc_relative == 1)
1373 fixup = (fixup - (fixP->fx_frag->fr_address + fixP->fx_where
1378 /* Get the instruction or data to be fixed up. */
1379 buf = fixP->fx_frag->fr_literal + fixP->fx_where;
1380 value = md_chars_to_number (buf, fixP->fx_size);
1382 /* Check for overflow, emitting a diagnostic if necessary. */
1383 if (nios2_check_overflow (fixup, howto))
1384 nios2_diagnose_overflow (fixup, howto, fixP, value);
1386 /* Apply the right shift. */
1387 fixup = ((signed)fixup) >> howto->rightshift;
1389 /* Truncate the fixup to right size. */
1390 switch (fixP->fx_r_type)
1392 case BFD_RELOC_NIOS2_HI16:
1393 fixup = (fixup >> 16) & 0xFFFF;
1395 case BFD_RELOC_NIOS2_LO16:
1396 fixup = fixup & 0xFFFF;
1398 case BFD_RELOC_NIOS2_HIADJ16:
1399 fixup = ((((fixup >> 16) & 0xFFFF) + ((fixup >> 15) & 0x01))
1404 int n = sizeof (fixup) * 8 - howto->bitsize;
1405 fixup = (fixup << n) >> n;
1410 /* Fix up the instruction. */
1411 value = (value & ~howto->dst_mask) | (fixup << howto->bitpos);
1412 md_number_to_chars (buf, value, fixP->fx_size);
1418 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT)
1422 && !S_IS_DEFINED (fixP->fx_addsy) && !S_IS_WEAK (fixP->fx_addsy))
1423 S_SET_WEAK (fixP->fx_addsy);
1425 else if (fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1431 /** Instruction parsing support. */
1433 /* General internal error routine. */
1436 bad_opcode (const struct nios2_opcode *op)
1438 fprintf (stderr, _("internal error: broken opcode descriptor for `%s %s'\n"),
1439 op->name, op->args);
1440 as_fatal (_("Broken assembler. No assembly attempted."));
1443 /* Special relocation directive strings. */
1445 struct nios2_special_relocS
1448 bfd_reloc_code_real_type reloc_type;
1451 /* This table is sorted so that prefix strings are listed after the longer
1452 strings that include them -- e.g., %got after %got_hiadj, etc. */
1454 struct nios2_special_relocS nios2_special_reloc[] = {
1455 {"%hiadj", BFD_RELOC_NIOS2_HIADJ16},
1456 {"%hi", BFD_RELOC_NIOS2_HI16},
1457 {"%lo", BFD_RELOC_NIOS2_LO16},
1458 {"%gprel", BFD_RELOC_NIOS2_GPREL},
1459 {"%call_lo", BFD_RELOC_NIOS2_CALL_LO},
1460 {"%call_hiadj", BFD_RELOC_NIOS2_CALL_HA},
1461 {"%call", BFD_RELOC_NIOS2_CALL16},
1462 {"%gotoff_lo", BFD_RELOC_NIOS2_GOTOFF_LO},
1463 {"%gotoff_hiadj", BFD_RELOC_NIOS2_GOTOFF_HA},
1464 {"%gotoff", BFD_RELOC_NIOS2_GOTOFF},
1465 {"%got_hiadj", BFD_RELOC_NIOS2_GOT_HA},
1466 {"%got_lo", BFD_RELOC_NIOS2_GOT_LO},
1467 {"%got", BFD_RELOC_NIOS2_GOT16},
1468 {"%tls_gd", BFD_RELOC_NIOS2_TLS_GD16},
1469 {"%tls_ldm", BFD_RELOC_NIOS2_TLS_LDM16},
1470 {"%tls_ldo", BFD_RELOC_NIOS2_TLS_LDO16},
1471 {"%tls_ie", BFD_RELOC_NIOS2_TLS_IE16},
1472 {"%tls_le", BFD_RELOC_NIOS2_TLS_LE16},
1475 #define NIOS2_NUM_SPECIAL_RELOCS \
1476 (sizeof(nios2_special_reloc)/sizeof(nios2_special_reloc[0]))
1477 const int nios2_num_special_relocs = NIOS2_NUM_SPECIAL_RELOCS;
1479 /* Creates a new nios2_insn_relocS and returns a pointer to it. */
1480 static nios2_insn_relocS *
1481 nios2_insn_reloc_new (bfd_reloc_code_real_type reloc_type, unsigned int pcrel)
1483 nios2_insn_relocS *retval;
1484 retval = XNEW (nios2_insn_relocS);
1487 as_bad (_("can't create relocation"));
1491 /* Fill out the fields with default values. */
1492 retval->reloc_next = NULL;
1493 retval->reloc_type = reloc_type;
1494 retval->reloc_pcrel = pcrel;
1498 /* Frees up memory previously allocated by nios2_insn_reloc_new(). */
1499 /* FIXME: this is never called; memory leak? */
1502 nios2_insn_reloc_destroy (nios2_insn_relocS *reloc)
1504 gas_assert (reloc != NULL);
1509 /* Look up a register name and validate it for the given regtype.
1510 Return the register mapping or NULL on failure. */
1511 static struct nios2_reg *
1512 nios2_parse_reg (const char *token, unsigned long regtype)
1514 struct nios2_reg *reg = nios2_reg_lookup (token);
1518 as_bad (_("unknown register %s"), token);
1522 /* Matched a register, but is it the wrong type? */
1523 if (!(regtype & reg->regtype))
1525 if (regtype & REG_CONTROL)
1526 as_bad (_("expecting control register"));
1527 else if (reg->regtype & REG_CONTROL)
1528 as_bad (_("illegal use of control register"));
1529 else if (reg->regtype & REG_COPROCESSOR)
1530 as_bad (_("illegal use of coprocessor register"));
1532 as_bad (_("invalid register %s"), token);
1536 /* Warn for explicit use of special registers. */
1537 if (reg->regtype & REG_NORMAL)
1539 if (!nios2_as_options.noat && reg->index == 1)
1540 as_warn (_("Register at (r1) can sometimes be corrupted by "
1541 "assembler optimizations.\n"
1542 "Use .set noat to turn off those optimizations "
1543 "(and this warning)."));
1544 if (!nios2_as_options.nobreak && reg->index == 25)
1545 as_warn (_("The debugger will corrupt bt (r25).\n"
1546 "If you don't need to debug this "
1547 "code use .set nobreak to turn off this warning."));
1548 if (!nios2_as_options.nobreak && reg->index == 30)
1549 as_warn (_("The debugger will corrupt sstatus/ba (r30).\n"
1550 "If you don't need to debug this "
1551 "code use .set nobreak to turn off this warning."));
1557 /* This function parses a reglist for ldwm/stwm and push.n/pop.n
1558 instructions, given as a brace-enclosed register list. The tokenizer
1559 has replaced commas in the token with spaces.
1560 The return value is a bitmask of registers in the set. It also
1561 sets nios2_reglist_mask and nios2_reglist_dir to allow error checking
1562 when parsing the base register. */
1564 static unsigned long nios2_reglist_mask;
1565 static int nios2_reglist_dir;
1567 static unsigned long
1568 nios2_parse_reglist (char *token, const struct nios2_opcode *op)
1570 unsigned long mask = 0;
1572 unsigned long regtype = 0;
1574 const char *regname;
1576 nios2_reglist_mask = 0;
1577 nios2_reglist_dir = 0;
1579 if (op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
1584 else if (op->match == MATCH_R2_PUSH_N)
1589 else if (op->match == MATCH_R2_POP_N)
1597 for (regname = strtok (token, "{ }");
1599 regname = strtok (NULL, "{ }"))
1602 struct nios2_reg *reg = nios2_parse_reg (regname, regtype);
1608 /* Make sure registers are listed in proper sequence. */
1613 as_bad ("duplicate register %s\n", reg->name);
1617 dir = (regno < last ? -1 : 1);
1618 else if ((dir > 0 && regno < last)
1619 || (dir < 0 && regno > last)
1620 || (op->match == MATCH_R2_PUSH_N
1621 && ! ((last == 31 && regno == 28)
1622 || (last == 31 && regno <= 23)
1623 || (last == 28 && regno <= 23)
1624 || (regno < 23 && regno == last - 1)))
1625 || (op->match == MATCH_R2_POP_N
1626 && ! ((regno == 31 && last == 28)
1627 || (regno == 31 && last <= 23)
1628 || (regno == 28 && last <= 23)
1629 || (last < 23 && last == regno - 1))))
1631 as_bad ("invalid register order");
1640 /* Check that all ldwm/stwm regs belong to the same set. */
1641 if ((op->match == MATCH_R2_LDWM || op->match == MATCH_R2_STWM)
1642 && (mask & 0x00003ffc) && (mask & 0x90ffc000))
1644 as_bad ("invalid register set in reglist");
1648 /* Check that push.n/pop.n regs include RA. */
1649 if ((op->match == MATCH_R2_PUSH_N || op->match == MATCH_R2_POP_N)
1650 && ((mask & 0x80000000) == 0))
1652 as_bad ("reglist must include ra (r31)");
1656 /* Check that there is at least one register in the set. */
1659 as_bad ("reglist must include at least one register");
1663 /* OK, reglist passed validation. */
1664 nios2_reglist_mask = mask;
1665 nios2_reglist_dir = dir;
1669 /* This function parses the base register and options used by the ldwm/stwm
1670 instructions. Returns the base register and sets the option arguments
1671 accordingly. On failure, returns NULL. */
1672 static struct nios2_reg *
1673 nios2_parse_base_register (char *str, int *direction, int *writeback, int *ret)
1676 struct nios2_reg *reg;
1683 if (strncmp (str, "--", 2) == 0)
1689 /* Extract the base register. */
1692 as_bad ("expected '(' before base register");
1697 str = strchr (str, ')');
1700 as_bad ("expected ')' after base register");
1705 reg = nios2_parse_reg (regname, REG_NORMAL);
1710 if (strncmp (str, "++", 2) == 0)
1716 /* Ensure that either -- or ++ is specified, but not both. */
1717 if (*direction == 0)
1719 as_bad ("invalid base register syntax");
1723 /* Check for options. The tokenizer has replaced commas with spaces. */
1728 if (strncmp (str, "writeback", 9) == 0)
1733 else if (strncmp (str, "ret", 3) == 0)
1740 as_bad ("invalid option syntax");
1749 /* The various nios2_assemble_* functions call this
1750 function to generate an expression from a string representing an expression.
1751 It then tries to evaluate the expression, and if it can, returns its value.
1752 If not, it creates a new nios2_insn_relocS and stores the expression and
1753 reloc_type for future use. */
1754 static unsigned long
1755 nios2_assemble_expression (const char *exprstr,
1756 nios2_insn_infoS *insn,
1757 bfd_reloc_code_real_type orig_reloc_type,
1760 nios2_insn_relocS *reloc;
1761 char *saved_line_ptr;
1762 unsigned long value = 0;
1764 bfd_reloc_code_real_type reloc_type = orig_reloc_type;
1766 gas_assert (exprstr != NULL);
1767 gas_assert (insn != NULL);
1769 /* Check for relocation operators.
1770 Change the relocation type and advance the ptr to the start of
1771 the expression proper. */
1772 for (i = 0; i < nios2_num_special_relocs; i++)
1773 if (strstr (exprstr, nios2_special_reloc[i].string) != NULL)
1775 reloc_type = nios2_special_reloc[i].reloc_type;
1776 exprstr += strlen (nios2_special_reloc[i].string) + 1;
1778 /* %lo and %hiadj have different meanings for PC-relative
1782 if (reloc_type == BFD_RELOC_NIOS2_LO16)
1783 reloc_type = BFD_RELOC_NIOS2_PCREL_LO;
1784 if (reloc_type == BFD_RELOC_NIOS2_HIADJ16)
1785 reloc_type = BFD_RELOC_NIOS2_PCREL_HA;
1791 /* No relocation allowed; we must have a constant expression. */
1792 if (orig_reloc_type == BFD_RELOC_NONE)
1796 /* Parse the expression string. */
1797 saved_line_ptr = input_line_pointer;
1798 input_line_pointer = (char *) exprstr;
1800 input_line_pointer = saved_line_ptr;
1802 /* If we don't have a constant, give an error. */
1803 if (reloc_type != orig_reloc_type || exp.X_op != O_constant)
1804 as_bad (_("expression must be constant"));
1806 value = exp.X_add_number;
1807 return (unsigned long) value;
1810 /* We potentially have a relocation. */
1811 reloc = nios2_insn_reloc_new (reloc_type, pcrel);
1812 reloc->reloc_next = insn->insn_reloc;
1813 insn->insn_reloc = reloc;
1815 /* Parse the expression string. */
1816 saved_line_ptr = input_line_pointer;
1817 input_line_pointer = (char *) exprstr;
1818 expression (&reloc->reloc_expression);
1819 input_line_pointer = saved_line_ptr;
1821 /* This is redundant as the fixup will put this into
1822 the instruction, but it is included here so that
1823 self-test mode (-r) works. */
1824 if (nios2_mode == NIOS2_MODE_TEST
1825 && reloc->reloc_expression.X_op == O_constant)
1826 value = reloc->reloc_expression.X_add_number;
1828 return (unsigned long) value;
1831 /* Encode a 3-bit register number, giving an error if this is not possible. */
1833 nios2_assemble_reg3 (const char *token)
1835 struct nios2_reg *reg = nios2_parse_reg (token, REG_3BIT);
1841 for (j = 0; j < nios2_num_r2_reg3_mappings; j++)
1842 if (nios2_r2_reg3_mappings[j] == reg->index)
1845 /* Should never get here if we passed validation. */
1846 as_bad (_("invalid register %s"), token);
1850 /* Argument assemble functions. */
1853 /* Control register index. */
1855 nios2_assemble_arg_c (const char *token, nios2_insn_infoS *insn)
1857 struct nios2_reg *reg = nios2_parse_reg (token, REG_CONTROL);
1858 const struct nios2_opcode *op = insn->insn_nios2_opcode;
1866 insn->insn_code |= SET_IW_R_IMM5 (reg->index);
1868 case iw_F3X6L5_type:
1869 insn->insn_code |= SET_IW_F3X6L5_IMM5 (reg->index);
1876 /* Destination register. */
1878 nios2_assemble_arg_d (const char *token, nios2_insn_infoS *insn)
1880 const struct nios2_opcode *op = insn->insn_nios2_opcode;
1881 unsigned long regtype = REG_NORMAL;
1882 struct nios2_reg *reg;
1884 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
1885 regtype |= REG_COPROCESSOR;
1886 reg = nios2_parse_reg (token, regtype);
1893 insn->insn_code |= SET_IW_R_C (reg->index);
1895 case iw_custom_type:
1896 insn->insn_code |= SET_IW_CUSTOM_C (reg->index);
1897 if (reg->regtype & REG_COPROCESSOR)
1898 insn->insn_code |= SET_IW_CUSTOM_READC (0);
1900 insn->insn_code |= SET_IW_CUSTOM_READC (1);
1902 case iw_F3X6L5_type:
1904 insn->insn_code |= SET_IW_F3X6L5_C (reg->index);
1907 insn->insn_code |= SET_IW_F3X8_C (reg->index);
1908 if (reg->regtype & REG_COPROCESSOR)
1909 insn->insn_code |= SET_IW_F3X8_READC (0);
1911 insn->insn_code |= SET_IW_F3X8_READC (1);
1914 insn->insn_code |= SET_IW_F2_B (reg->index);
1921 /* Source register 1. */
1923 nios2_assemble_arg_s (const char *token, nios2_insn_infoS *insn)
1925 const struct nios2_opcode *op = insn->insn_nios2_opcode;
1926 unsigned long regtype = REG_NORMAL;
1927 struct nios2_reg *reg;
1929 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
1930 regtype |= REG_COPROCESSOR;
1931 reg = nios2_parse_reg (token, regtype);
1938 if (op->match == MATCH_R1_JMP && reg->index == 31)
1939 as_bad (_("r31 cannot be used with jmp; use ret instead"));
1940 insn->insn_code |= SET_IW_R_A (reg->index);
1943 insn->insn_code |= SET_IW_I_A (reg->index);
1945 case iw_custom_type:
1946 insn->insn_code |= SET_IW_CUSTOM_A (reg->index);
1947 if (reg->regtype & REG_COPROCESSOR)
1948 insn->insn_code |= SET_IW_CUSTOM_READA (0);
1950 insn->insn_code |= SET_IW_CUSTOM_READA (1);
1953 insn->insn_code |= SET_IW_F2I16_A (reg->index);
1955 case iw_F2X4I12_type:
1956 insn->insn_code |= SET_IW_F2X4I12_A (reg->index);
1958 case iw_F1X4I12_type:
1959 insn->insn_code |= SET_IW_F1X4I12_A (reg->index);
1961 case iw_F1X4L17_type:
1962 insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
1964 case iw_F3X6L5_type:
1966 if (op->match == MATCH_R2_JMP && reg->index == 31)
1967 as_bad (_("r31 cannot be used with jmp; use ret instead"));
1968 insn->insn_code |= SET_IW_F3X6L5_A (reg->index);
1970 case iw_F2X6L10_type:
1971 insn->insn_code |= SET_IW_F2X6L10_A (reg->index);
1974 insn->insn_code |= SET_IW_F3X8_A (reg->index);
1975 if (reg->regtype & REG_COPROCESSOR)
1976 insn->insn_code |= SET_IW_F3X8_READA (0);
1978 insn->insn_code |= SET_IW_F3X8_READA (1);
1981 if (op->match == MATCH_R2_JMPR_N && reg->index == 31)
1982 as_bad (_("r31 cannot be used with jmpr.n; use ret.n instead"));
1983 insn->insn_code |= SET_IW_F1X1_A (reg->index);
1986 /* Implicit stack pointer reference. */
1987 if (reg->index != 27)
1988 as_bad (_("invalid register %s"), token);
1991 insn->insn_code |= SET_IW_F2_A (reg->index);
1998 /* Source register 2. */
2000 nios2_assemble_arg_t (const char *token, nios2_insn_infoS *insn)
2002 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2003 unsigned long regtype = REG_NORMAL;
2004 struct nios2_reg *reg;
2006 if (op->format == iw_custom_type || op->format == iw_F3X8_type)
2007 regtype |= REG_COPROCESSOR;
2008 reg = nios2_parse_reg (token, regtype);
2015 insn->insn_code |= SET_IW_R_B (reg->index);
2018 insn->insn_code |= SET_IW_I_B (reg->index);
2020 case iw_custom_type:
2021 insn->insn_code |= SET_IW_CUSTOM_B (reg->index);
2022 if (reg->regtype & REG_COPROCESSOR)
2023 insn->insn_code |= SET_IW_CUSTOM_READB (0);
2025 insn->insn_code |= SET_IW_CUSTOM_READB (1);
2028 insn->insn_code |= SET_IW_F2I16_B (reg->index);
2030 case iw_F2X4I12_type:
2031 insn->insn_code |= SET_IW_F2X4I12_B (reg->index);
2033 case iw_F3X6L5_type:
2035 insn->insn_code |= SET_IW_F3X6L5_B (reg->index);
2037 case iw_F2X6L10_type:
2038 insn->insn_code |= SET_IW_F2X6L10_B (reg->index);
2041 insn->insn_code |= SET_IW_F3X8_B (reg->index);
2042 if (reg->regtype & REG_COPROCESSOR)
2043 insn->insn_code |= SET_IW_F3X8_READB (0);
2045 insn->insn_code |= SET_IW_F3X8_READB (1);
2048 insn->insn_code |= SET_IW_F1I5_B (reg->index);
2051 insn->insn_code |= SET_IW_F2_B (reg->index);
2053 case iw_T1X1I6_type:
2054 /* Implicit zero register reference. */
2055 if (reg->index != 0)
2056 as_bad (_("invalid register %s"), token);
2064 /* Destination register w/3-bit encoding. */
2066 nios2_assemble_arg_D (const char *token, nios2_insn_infoS *insn)
2068 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2069 int reg = nios2_assemble_reg3 (token);
2074 insn->insn_code |= SET_IW_T1I7_A3 (reg);
2076 case iw_T2X1L3_type:
2077 insn->insn_code |= SET_IW_T2X1L3_B3 (reg);
2079 case iw_T2X1I3_type:
2080 insn->insn_code |= SET_IW_T2X1I3_B3 (reg);
2083 insn->insn_code |= SET_IW_T3X1_C3 (reg);
2086 /* Some instructions using this encoding take 3 register arguments,
2087 requiring the destination register to be the same as the first
2089 if (op->num_args == 3)
2090 insn->insn_code |= SET_IW_T2X3_A3 (reg);
2092 insn->insn_code |= SET_IW_T2X3_B3 (reg);
2099 /* Source register w/3-bit encoding. */
2101 nios2_assemble_arg_S (const char *token, nios2_insn_infoS *insn)
2103 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2104 int reg = nios2_assemble_reg3 (token);
2109 insn->insn_code |= SET_IW_T1I7_A3 (reg);
2112 insn->insn_code |= SET_IW_T2I4_A3 (reg);
2114 case iw_T2X1L3_type:
2115 insn->insn_code |= SET_IW_T2X1L3_A3 (reg);
2117 case iw_T2X1I3_type:
2118 insn->insn_code |= SET_IW_T2X1I3_A3 (reg);
2121 insn->insn_code |= SET_IW_T3X1_A3 (reg);
2124 /* Some instructions using this encoding take 3 register arguments,
2125 requiring the destination register to be the same as the first
2127 if (op->num_args == 3)
2129 int dreg = GET_IW_T2X3_A3 (insn->insn_code);
2131 as_bad ("source and destination registers must be the same");
2134 insn->insn_code |= SET_IW_T2X3_A3 (reg);
2136 case iw_T1X1I6_type:
2137 insn->insn_code |= SET_IW_T1X1I6_A3 (reg);
2144 /* Source register 2 w/3-bit encoding. */
2146 nios2_assemble_arg_T (const char *token, nios2_insn_infoS *insn)
2148 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2149 int reg = nios2_assemble_reg3 (token);
2154 insn->insn_code |= SET_IW_T2I4_B3 (reg);
2157 insn->insn_code |= SET_IW_T3X1_B3 (reg);
2160 insn->insn_code |= SET_IW_T2X3_B3 (reg);
2167 /* 16-bit signed immediate. */
2169 nios2_assemble_arg_i (const char *token, nios2_insn_infoS *insn)
2171 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2177 val = nios2_assemble_expression (token, insn,
2178 BFD_RELOC_NIOS2_S16, 0);
2179 insn->constant_bits |= SET_IW_I_IMM16 (val);
2182 val = nios2_assemble_expression (token, insn,
2183 BFD_RELOC_NIOS2_S16, 0);
2184 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
2191 /* 12-bit signed immediate. */
2193 nios2_assemble_arg_I (const char *token, nios2_insn_infoS *insn)
2195 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2200 case iw_F2X4I12_type:
2201 val = nios2_assemble_expression (token, insn,
2202 BFD_RELOC_NIOS2_R2_S12, 0);
2203 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
2205 case iw_F1X4I12_type:
2206 val = nios2_assemble_expression (token, insn,
2207 BFD_RELOC_NIOS2_R2_S12, 0);
2208 insn->constant_bits |= SET_IW_F2X4I12_IMM12 (val);
2215 /* 16-bit unsigned immediate. */
2217 nios2_assemble_arg_u (const char *token, nios2_insn_infoS *insn)
2219 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2225 val = nios2_assemble_expression (token, insn,
2226 BFD_RELOC_NIOS2_U16, 0);
2227 insn->constant_bits |= SET_IW_I_IMM16 (val);
2230 val = nios2_assemble_expression (token, insn,
2231 BFD_RELOC_NIOS2_U16, 0);
2232 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
2239 /* 7-bit unsigned immediate with 2-bit shift. */
2241 nios2_assemble_arg_U (const char *token, nios2_insn_infoS *insn)
2243 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2249 val = nios2_assemble_expression (token, insn,
2250 BFD_RELOC_NIOS2_R2_T1I7_2, 0);
2251 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 2);
2254 val = nios2_assemble_expression (token, insn,
2255 BFD_RELOC_NIOS2_R2_X1I7_2, 0);
2256 insn->constant_bits |= SET_IW_X1I7_IMM7 (val >> 2);
2263 /* 5-bit unsigned immediate with 2-bit shift. */
2265 nios2_assemble_arg_V (const char *token, nios2_insn_infoS *insn)
2267 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2273 val = nios2_assemble_expression (token, insn,
2274 BFD_RELOC_NIOS2_R2_F1I5_2, 0);
2275 insn->constant_bits |= SET_IW_F1I5_IMM5 (val >> 2);
2282 /* 4-bit unsigned immediate with 2-bit shift. */
2284 nios2_assemble_arg_W (const char *token, nios2_insn_infoS *insn)
2286 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2292 val = nios2_assemble_expression (token, insn,
2293 BFD_RELOC_NIOS2_R2_T2I4_2, 0);
2294 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 2);
2296 case iw_L5I4X1_type:
2297 /* This argument is optional for push.n/pop.n, and defaults to
2298 zero if unspecified. */
2302 val = nios2_assemble_expression (token, insn,
2303 BFD_RELOC_NIOS2_R2_L5I4X1, 0);
2304 insn->constant_bits |= SET_IW_L5I4X1_IMM4 (val >> 2);
2311 /* 4-bit unsigned immediate with 1-bit shift. */
2313 nios2_assemble_arg_X (const char *token, nios2_insn_infoS *insn)
2315 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2321 val = nios2_assemble_expression (token, insn,
2322 BFD_RELOC_NIOS2_R2_T2I4_1, 0);
2323 insn->constant_bits |= SET_IW_T2I4_IMM4 (val >> 1);
2330 /* 4-bit unsigned immediate without shift. */
2332 nios2_assemble_arg_Y (const char *token, nios2_insn_infoS *insn)
2334 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2340 val = nios2_assemble_expression (token, insn,
2341 BFD_RELOC_NIOS2_R2_T2I4, 0);
2342 insn->constant_bits |= SET_IW_T2I4_IMM4 (val);
2350 /* 16-bit signed immediate address offset. */
2352 nios2_assemble_arg_o (const char *token, nios2_insn_infoS *insn)
2354 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2360 val = nios2_assemble_expression (token, insn,
2361 BFD_RELOC_16_PCREL, 1);
2362 insn->constant_bits |= SET_IW_I_IMM16 (val);
2365 val = nios2_assemble_expression (token, insn,
2366 BFD_RELOC_16_PCREL, 1);
2367 insn->constant_bits |= SET_IW_F2I16_IMM16 (val);
2374 /* 10-bit signed address offset with 1-bit shift. */
2376 nios2_assemble_arg_O (const char *token, nios2_insn_infoS *insn)
2378 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2384 val = nios2_assemble_expression (token, insn,
2385 BFD_RELOC_NIOS2_R2_I10_1_PCREL, 1);
2386 insn->constant_bits |= SET_IW_I10_IMM10 (val >> 1);
2393 /* 7-bit signed address offset with 1-bit shift. */
2395 nios2_assemble_arg_P (const char *token, nios2_insn_infoS *insn)
2397 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2403 val = nios2_assemble_expression (token, insn,
2404 BFD_RELOC_NIOS2_R2_T1I7_1_PCREL, 1);
2405 insn->constant_bits |= SET_IW_T1I7_IMM7 (val >> 1);
2412 /* 5-bit unsigned immediate. */
2414 nios2_assemble_arg_j (const char *token, nios2_insn_infoS *insn)
2416 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2422 val = nios2_assemble_expression (token, insn,
2423 BFD_RELOC_NIOS2_IMM5, 0);
2424 insn->constant_bits |= SET_IW_R_IMM5 (val);
2426 case iw_F3X6L5_type:
2427 if (op->match == MATCH_R2_ENI)
2428 /* Value must be constant 0 or 1. */
2430 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2431 if (val != 0 && val != 1)
2432 as_bad ("invalid eni argument %u", val);
2433 insn->insn_code |= SET_IW_F3X6L5_IMM5 (val);
2437 val = nios2_assemble_expression (token, insn,
2438 BFD_RELOC_NIOS2_IMM5, 0);
2439 insn->constant_bits |= SET_IW_F3X6L5_IMM5 (val);
2442 case iw_F2X6L10_type:
2443 /* Only constant expression without relocation permitted for
2445 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2447 as_bad ("invalid bit position %u", val);
2448 insn->insn_code |= SET_IW_F2X6L10_MSB (val);
2451 val = nios2_assemble_expression (token, insn,
2452 BFD_RELOC_NIOS2_R2_X2L5, 0);
2453 insn->constant_bits |= SET_IW_X2L5_IMM5 (val);
2460 /* Second 5-bit unsigned immediate field. */
2462 nios2_assemble_arg_k (const char *token, nios2_insn_infoS *insn)
2464 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2469 case iw_F2X6L10_type:
2470 /* Only constant expression without relocation permitted for
2472 val = nios2_assemble_expression (token, insn,
2475 as_bad ("invalid bit position %u", val);
2476 else if (GET_IW_F2X6L10_MSB (insn->insn_code) < val)
2477 as_bad ("MSB must be greater than or equal to LSB");
2478 insn->insn_code |= SET_IW_F2X6L10_LSB (val);
2485 /* 8-bit unsigned immediate. */
2487 nios2_assemble_arg_l (const char *token, nios2_insn_infoS *insn)
2489 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2494 case iw_custom_type:
2495 val = nios2_assemble_expression (token, insn,
2496 BFD_RELOC_NIOS2_IMM8, 0);
2497 insn->constant_bits |= SET_IW_CUSTOM_N (val);
2500 val = nios2_assemble_expression (token, insn,
2501 BFD_RELOC_NIOS2_IMM8, 0);
2502 insn->constant_bits |= SET_IW_F3X8_N (val);
2509 /* 26-bit unsigned immediate. */
2511 nios2_assemble_arg_m (const char *token, nios2_insn_infoS *insn)
2513 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2519 val = nios2_assemble_expression (token, insn,
2520 (nios2_as_options.noat
2521 ? BFD_RELOC_NIOS2_CALL26_NOAT
2522 : BFD_RELOC_NIOS2_CALL26),
2524 insn->constant_bits |= SET_IW_J_IMM26 (val);
2527 val = nios2_assemble_expression (token, insn,
2528 (nios2_as_options.noat
2529 ? BFD_RELOC_NIOS2_CALL26_NOAT
2530 : BFD_RELOC_NIOS2_CALL26),
2532 insn->constant_bits |= SET_IW_L26_IMM26 (val);
2539 /* 6-bit unsigned immediate with no shifting. */
2541 nios2_assemble_arg_M (const char *token, nios2_insn_infoS *insn)
2543 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2548 case iw_T1X1I6_type:
2549 val = nios2_assemble_expression (token, insn,
2550 BFD_RELOC_NIOS2_R2_T1X1I6, 0);
2551 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val);
2558 /* 6-bit unsigned immediate with 2-bit shift. */
2560 nios2_assemble_arg_N (const char *token, nios2_insn_infoS *insn)
2562 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2567 case iw_T1X1I6_type:
2568 val = nios2_assemble_expression (token, insn,
2569 BFD_RELOC_NIOS2_R2_T1X1I6_2, 0);
2570 insn->constant_bits |= SET_IW_T1X1I6_IMM6 (val >> 2);
2578 /* Encoded enumeration for addi.n/subi.n. */
2580 nios2_assemble_arg_e (const char *token, nios2_insn_infoS *insn)
2582 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2588 case iw_T2X1I3_type:
2589 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2590 for (i = 0; i < nios2_num_r2_asi_n_mappings; i++)
2591 if (val == nios2_r2_asi_n_mappings[i])
2593 if (i == nios2_num_r2_asi_n_mappings)
2595 as_bad (_("Invalid constant operand %s"), token);
2598 insn->insn_code |= SET_IW_T2X1I3_IMM3 ((unsigned)i);
2605 /* Encoded enumeration for slli.n/srli.n. */
2607 nios2_assemble_arg_f (const char *token, nios2_insn_infoS *insn)
2609 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2615 case iw_T2X1L3_type:
2616 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2617 for (i = 0; i < nios2_num_r2_shi_n_mappings; i++)
2618 if (val == nios2_r2_shi_n_mappings[i])
2620 if (i == nios2_num_r2_shi_n_mappings)
2622 as_bad (_("Invalid constant operand %s"), token);
2625 insn->insn_code |= SET_IW_T2X1L3_SHAMT ((unsigned)i);
2632 /* Encoded enumeration for andi.n. */
2634 nios2_assemble_arg_g (const char *token, nios2_insn_infoS *insn)
2636 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2643 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2644 for (i = 0; i < nios2_num_r2_andi_n_mappings; i++)
2645 if (val == nios2_r2_andi_n_mappings[i])
2647 if (i == nios2_num_r2_andi_n_mappings)
2649 as_bad (_("Invalid constant operand %s"), token);
2652 insn->insn_code |= SET_IW_T2I4_IMM4 ((unsigned)i);
2659 /* Encoded enumeration for movi.n. */
2661 nios2_assemble_arg_h (const char *token, nios2_insn_infoS *insn)
2663 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2670 val = nios2_assemble_expression (token, insn, BFD_RELOC_NONE, 0);
2672 if ((signed) i == -1)
2678 else if (i < 0 || i > 125)
2680 as_bad (_("Invalid constant operand %s"), token);
2683 insn->insn_code |= SET_IW_T1I7_IMM7 (val);
2690 /* Encoded REGMASK for ldwm/stwm or push.n/pop.n. */
2692 nios2_assemble_arg_R (const char *token, nios2_insn_infoS *insn)
2694 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2696 char *buf = strdup (token);
2697 unsigned long reglist = nios2_parse_reglist (buf, op);
2705 case iw_F1X4L17_type:
2706 /* Encoding for ldwm/stwm. */
2707 if (reglist & 0x00003ffc)
2708 mask = reglist >> 2;
2711 insn->insn_code |= SET_IW_F1X4L17_RS (1);
2712 mask = (reglist & 0x00ffc000) >> 14;
2713 if (reglist & (1 << 28))
2715 if (reglist & (1 << 31))
2718 insn->insn_code |= SET_IW_F1X4L17_REGMASK (mask);
2721 case iw_L5I4X1_type:
2722 /* Encoding for push.n/pop.n. */
2723 if (reglist & (1 << 28))
2724 insn->insn_code |= SET_IW_L5I4X1_FP (1);
2725 mask = reglist & 0x00ff0000;
2730 for (i = 0; i < nios2_num_r2_reg_range_mappings; i++)
2731 if (nios2_r2_reg_range_mappings[i] == mask)
2733 if (i == nios2_num_r2_reg_range_mappings)
2735 as_bad ("invalid reglist");
2738 insn->insn_code |= SET_IW_L5I4X1_REGRANGE (i);
2739 insn->insn_code |= SET_IW_L5I4X1_CS (1);
2748 /* Base register for ldwm/stwm. */
2750 nios2_assemble_arg_B (const char *token, nios2_insn_infoS *insn)
2752 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2753 int direction, writeback, ret;
2754 char *str = strdup (token);
2755 struct nios2_reg *reg
2756 = nios2_parse_base_register (str, &direction, &writeback, &ret);
2764 case iw_F1X4L17_type:
2765 /* For ldwm, check to see if the base register is already inside the
2767 if (op->match == MATCH_R2_LDWM
2768 && (nios2_reglist_mask & (1 << reg->index)))
2770 as_bad ("invalid base register; %s is inside the reglist", reg->name);
2774 /* For stwm, ret option is not allowed. */
2775 if (op->match == MATCH_R2_STWM && ret)
2777 as_bad ("invalid option syntax");
2781 /* Check that the direction matches the ordering of the reglist. */
2782 if (nios2_reglist_dir && direction != nios2_reglist_dir)
2784 as_bad ("reglist order does not match increment/decrement mode");
2788 insn->insn_code |= SET_IW_F1X4L17_A (reg->index);
2790 insn->insn_code |= SET_IW_F1X4L17_ID (1);
2792 insn->insn_code |= SET_IW_F1X4L17_WB (1);
2794 insn->insn_code |= SET_IW_F1X4L17_PC (1);
2803 nios2_assemble_args (nios2_insn_infoS *insn)
2805 const struct nios2_opcode *op = insn->insn_nios2_opcode;
2807 unsigned int tokidx, ntok;
2809 /* Make sure there are enough arguments. */
2810 ntok = (op->pinfo & NIOS2_INSN_OPTARG) ? op->num_args - 1 : op->num_args;
2811 for (tokidx = 1; tokidx <= ntok; tokidx++)
2812 if (insn->insn_tokens[tokidx] == NULL)
2814 as_bad ("missing argument");
2818 for (argptr = op->args, tokidx = 1;
2819 *argptr && insn->insn_tokens[tokidx];
2829 nios2_assemble_arg_c (insn->insn_tokens[tokidx++], insn);
2833 nios2_assemble_arg_d (insn->insn_tokens[tokidx++], insn);
2837 nios2_assemble_arg_s (insn->insn_tokens[tokidx++], insn);
2841 nios2_assemble_arg_t (insn->insn_tokens[tokidx++], insn);
2845 nios2_assemble_arg_D (insn->insn_tokens[tokidx++], insn);
2849 nios2_assemble_arg_S (insn->insn_tokens[tokidx++], insn);
2853 nios2_assemble_arg_T (insn->insn_tokens[tokidx++], insn);
2857 nios2_assemble_arg_i (insn->insn_tokens[tokidx++], insn);
2861 nios2_assemble_arg_I (insn->insn_tokens[tokidx++], insn);
2865 nios2_assemble_arg_u (insn->insn_tokens[tokidx++], insn);
2869 nios2_assemble_arg_U (insn->insn_tokens[tokidx++], insn);
2873 nios2_assemble_arg_V (insn->insn_tokens[tokidx++], insn);
2877 nios2_assemble_arg_W (insn->insn_tokens[tokidx++], insn);
2881 nios2_assemble_arg_X (insn->insn_tokens[tokidx++], insn);
2885 nios2_assemble_arg_Y (insn->insn_tokens[tokidx++], insn);
2889 nios2_assemble_arg_o (insn->insn_tokens[tokidx++], insn);
2893 nios2_assemble_arg_O (insn->insn_tokens[tokidx++], insn);
2897 nios2_assemble_arg_P (insn->insn_tokens[tokidx++], insn);
2901 nios2_assemble_arg_j (insn->insn_tokens[tokidx++], insn);
2905 nios2_assemble_arg_k (insn->insn_tokens[tokidx++], insn);
2909 nios2_assemble_arg_l (insn->insn_tokens[tokidx++], insn);
2913 nios2_assemble_arg_m (insn->insn_tokens[tokidx++], insn);
2917 nios2_assemble_arg_M (insn->insn_tokens[tokidx++], insn);
2921 nios2_assemble_arg_N (insn->insn_tokens[tokidx++], insn);
2925 nios2_assemble_arg_e (insn->insn_tokens[tokidx++], insn);
2929 nios2_assemble_arg_f (insn->insn_tokens[tokidx++], insn);
2933 nios2_assemble_arg_g (insn->insn_tokens[tokidx++], insn);
2937 nios2_assemble_arg_h (insn->insn_tokens[tokidx++], insn);
2941 nios2_assemble_arg_R (insn->insn_tokens[tokidx++], insn);
2945 nios2_assemble_arg_B (insn->insn_tokens[tokidx++], insn);
2953 /* Perform argument checking. */
2954 nios2_check_assembly (insn->insn_code | insn->constant_bits,
2955 insn->insn_tokens[tokidx]);
2959 /* The function consume_arg takes a pointer into a string
2960 of instruction tokens (args) and a pointer into a string
2961 representing the expected sequence of tokens and separators.
2962 It checks whether the first argument in argstr is of the
2963 expected type, throwing an error if it is not, and returns
2964 the pointer argstr. */
2966 nios2_consume_arg (char *argstr, const char *parsestr)
2985 if (nios2_special_relocation_p (argstr))
2987 /* We zap the parentheses because we don't want them confused
2989 temp = strchr (argstr, '(');
2992 temp = strchr (argstr, ')');
2997 as_bad (_("badly formed expression near %s"), argstr);
3019 /* We can't have %hi, %lo or %hiadj here. */
3021 as_bad (_("badly formed expression near %s"), argstr);
3025 /* Register list for ldwm/stwm or push.n/pop.n. Replace the commas
3026 in the list with spaces so we don't confuse them with separators. */
3029 as_bad ("missing '{' in register list");
3032 for (temp = argstr + 1; *temp; temp++)
3036 else if (*temp == ',')
3041 as_bad ("missing '}' in register list");
3047 /* Base register and options for ldwm/stwm. This is the final argument
3048 and consumes the rest of the argument string; replace commas
3049 with spaces so that the token splitter doesn't think they are
3050 separate arguments. */
3051 for (temp = argstr; *temp; temp++)
3060 BAD_CASE (*parsestr);
3067 /* The function consume_separator takes a pointer into a string
3068 of instruction tokens (args) and a pointer into a string representing
3069 the expected sequence of tokens and separators. It finds the first
3070 instance of the character pointed to by separator in argstr, and
3071 returns a pointer to the next element of argstr, which is the
3072 following token in the sequence. */
3074 nios2_consume_separator (char *argstr, const char *separator)
3078 /* If we have a opcode reg, expr(reg) type instruction, and
3079 * we are separating the expr from the (reg), we find the last
3080 * (, just in case the expression has parentheses. */
3082 if (*separator == '(')
3083 p = strrchr (argstr, *separator);
3085 p = strchr (argstr, *separator);
3092 /* The principal argument parsing function which takes a string argstr
3093 representing the instruction arguments for insn, and extracts the argument
3094 tokens matching parsestr into parsed_args. */
3096 nios2_parse_args (nios2_insn_infoS *insn, char *argstr,
3097 const char *parsestr, char **parsed_args)
3104 bfd_boolean terminate = FALSE;
3106 /* This rest of this function is it too fragile and it mostly works,
3107 therefore special case this one. */
3108 if (*parsestr == 0 && argstr != 0)
3110 as_bad (_("too many arguments"));
3111 parsed_args[0] = NULL;
3115 while (p != NULL && !terminate && i < NIOS2_MAX_INSN_TOKENS)
3117 parsed_args[i] = nios2_consume_arg (p, parsestr);
3119 while (*parsestr == '(' || *parsestr == ')' || *parsestr == ',')
3122 p = nios2_consume_separator (p, parsestr);
3123 /* Check for missing separators. */
3124 if (!p && !(insn->insn_nios2_opcode->pinfo & NIOS2_INSN_OPTARG))
3126 as_bad (_("expecting %c near %s"), *parsestr, context);
3132 if (*parsestr == '\0')
3134 /* Check that the argument string has no trailing arguments. */
3135 end = strpbrk (p, ",");
3137 as_bad (_("too many arguments"));
3140 if (*parsestr == '\0' || (p != NULL && *p == '\0'))
3145 parsed_args[i] = NULL;
3150 /** Support for pseudo-op parsing. These are macro-like opcodes that
3151 expand into real insns by suitable fiddling with the operands. */
3153 /* Append the string modifier to the string contained in the argument at
3154 parsed_args[ndx]. */
3156 nios2_modify_arg (char **parsed_args, const char *modifier,
3157 int unused ATTRIBUTE_UNUSED, int ndx)
3159 char *tmp = parsed_args[ndx];
3161 parsed_args[ndx] = concat (tmp, modifier, (char *) NULL);
3164 /* Modify parsed_args[ndx] by negating that argument. */
3166 nios2_negate_arg (char **parsed_args, const char *modifier ATTRIBUTE_UNUSED,
3167 int unused ATTRIBUTE_UNUSED, int ndx)
3169 char *tmp = parsed_args[ndx];
3171 parsed_args[ndx] = concat ("~(", tmp, ")+1", (char *) NULL);
3174 /* The function nios2_swap_args swaps the pointers at indices index_1 and
3175 index_2 in the array parsed_args[] - this is used for operand swapping
3176 for comparison operations. */
3178 nios2_swap_args (char **parsed_args, const char *unused ATTRIBUTE_UNUSED,
3179 int index_1, int index_2)
3182 gas_assert (index_1 < NIOS2_MAX_INSN_TOKENS
3183 && index_2 < NIOS2_MAX_INSN_TOKENS);
3184 tmp = parsed_args[index_1];
3185 parsed_args[index_1] = parsed_args[index_2];
3186 parsed_args[index_2] = tmp;
3189 /* This function appends the string appnd to the array of strings in
3190 parsed_args num times starting at index start in the array. */
3192 nios2_append_arg (char **parsed_args, const char *appnd, int num,
3198 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);
3200 if (nios2_mode == NIOS2_MODE_TEST)
3201 tmp = parsed_args[start];
3205 for (i = start, count = num; count > 0; ++i, --count)
3206 parsed_args[i] = (char *) appnd;
3208 gas_assert (i == (start + num));
3209 parsed_args[i] = tmp;
3210 parsed_args[i + 1] = NULL;
3213 /* This function inserts the string insert num times in the array
3214 parsed_args, starting at the index start. */
3216 nios2_insert_arg (char **parsed_args, const char *insert, int num,
3221 gas_assert ((start + num) < NIOS2_MAX_INSN_TOKENS);
3223 /* Move the existing arguments up to create space. */
3224 for (i = NIOS2_MAX_INSN_TOKENS; i - num >= start; --i)
3225 parsed_args[i] = parsed_args[i - num];
3227 for (i = start, count = num; count > 0; ++i, --count)
3228 parsed_args[i] = (char *) insert;
3231 /* Cleanup function to free malloc'ed arg strings. */
3233 nios2_free_arg (char **parsed_args, int num ATTRIBUTE_UNUSED, int start)
3235 if (parsed_args[start])
3237 free (parsed_args[start]);
3238 parsed_args[start] = NULL;
3242 /* This function swaps the pseudo-op for a real op. */
3243 static nios2_ps_insn_infoS*
3244 nios2_translate_pseudo_insn (nios2_insn_infoS *insn)
3247 const struct nios2_opcode *op = insn->insn_nios2_opcode;
3248 nios2_ps_insn_infoS *ps_insn;
3249 unsigned int tokidx, ntok;
3251 /* Find which real insn the pseudo-op translates to and
3252 switch the insn_info ptr to point to it. */
3253 ps_insn = nios2_ps_lookup (op->name);
3255 if (ps_insn != NULL)
3257 insn->insn_nios2_opcode = nios2_opcode_lookup (ps_insn->insn);
3258 insn->insn_tokens[0] = insn->insn_nios2_opcode->name;
3260 /* Make sure there are enough arguments. */
3261 ntok = ((op->pinfo & NIOS2_INSN_OPTARG)
3262 ? op->num_args - 1 : op->num_args);
3263 for (tokidx = 1; tokidx <= ntok; tokidx++)
3264 if (insn->insn_tokens[tokidx] == NULL)
3266 as_bad ("missing argument");
3270 /* Modify the args so they work with the real insn. */
3271 ps_insn->arg_modifer_func ((char **) insn->insn_tokens,
3272 ps_insn->arg_modifier, ps_insn->num,
3276 /* we cannot recover from this. */
3277 as_fatal (_("unrecognized pseudo-instruction %s"),
3278 insn->insn_nios2_opcode->name);
3282 /* Invoke the cleanup handler for pseudo-insn ps_insn on insn. */
3284 nios2_cleanup_pseudo_insn (nios2_insn_infoS *insn,
3285 nios2_ps_insn_infoS *ps_insn)
3287 if (ps_insn->arg_cleanup_func)
3288 (ps_insn->arg_cleanup_func) ((char **) insn->insn_tokens,
3289 ps_insn->num, ps_insn->index);
3292 const nios2_ps_insn_infoS nios2_ps_insn_info_structs[] = {
3293 /* pseudo-op, real-op, arg, arg_modifier_func, num, index, arg_cleanup_func */
3294 {"mov", "add", nios2_append_arg, "zero", 1, 3, NULL},
3295 {"movi", "addi", nios2_insert_arg, "zero", 1, 2, NULL},
3296 {"movhi", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
3297 {"movui", "ori", nios2_insert_arg, "zero", 1, 2, NULL},
3298 {"movia", "orhi", nios2_insert_arg, "zero", 1, 2, NULL},
3299 {"nop", "add", nios2_append_arg, "zero", 3, 1, NULL},
3300 {"bgt", "blt", nios2_swap_args, "", 1, 2, NULL},
3301 {"bgtu", "bltu", nios2_swap_args, "", 1, 2, NULL},
3302 {"ble", "bge", nios2_swap_args, "", 1, 2, NULL},
3303 {"bleu", "bgeu", nios2_swap_args, "", 1, 2, NULL},
3304 {"cmpgt", "cmplt", nios2_swap_args, "", 2, 3, NULL},
3305 {"cmpgtu", "cmpltu", nios2_swap_args, "", 2, 3, NULL},
3306 {"cmple", "cmpge", nios2_swap_args, "", 2, 3, NULL},
3307 {"cmpleu", "cmpgeu", nios2_swap_args, "", 2, 3, NULL},
3308 {"cmpgti", "cmpgei", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3309 {"cmpgtui", "cmpgeui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3310 {"cmplei", "cmplti", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3311 {"cmpleui", "cmpltui", nios2_modify_arg, "+1", 0, 3, nios2_free_arg},
3312 {"subi", "addi", nios2_negate_arg, "", 0, 3, nios2_free_arg},
3313 {"nop.n", "mov.n", nios2_append_arg, "zero", 2, 1, NULL}
3314 /* Add further pseudo-ops here. */
3317 #define NIOS2_NUM_PSEUDO_INSNS \
3318 ((sizeof(nios2_ps_insn_info_structs)/ \
3319 sizeof(nios2_ps_insn_info_structs[0])))
3320 const int nios2_num_ps_insn_info_structs = NIOS2_NUM_PSEUDO_INSNS;
3323 /** Assembler output support. */
3325 /* Output a normal instruction. */
3327 output_insn (nios2_insn_infoS *insn)
3330 nios2_insn_relocS *reloc;
3331 f = frag_more (insn->insn_nios2_opcode->size);
3332 /* This allocates enough space for the instruction
3333 and puts it in the current frag. */
3334 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
3335 /* Emit debug info. */
3336 dwarf2_emit_insn (insn->insn_nios2_opcode->size);
3337 /* Create any fixups to be acted on later. */
3339 for (reloc = insn->insn_reloc; reloc != NULL; reloc = reloc->reloc_next)
3340 fix_new_exp (frag_now, f - frag_now->fr_literal,
3341 insn->insn_nios2_opcode->size,
3342 &reloc->reloc_expression, reloc->reloc_pcrel,
3346 /* Output an unconditional branch. */
3348 output_ubranch (nios2_insn_infoS *insn)
3350 nios2_insn_relocS *reloc = insn->insn_reloc;
3352 /* If the reloc is NULL, there was an error assembling the branch. */
3355 symbolS *symp = reloc->reloc_expression.X_add_symbol;
3356 offsetT offset = reloc->reloc_expression.X_add_number;
3358 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);
3360 /* Tag dwarf2 debug info to the address at the start of the insn.
3361 We must do it before frag_var() below closes off the frag. */
3362 dwarf2_emit_insn (0);
3364 /* We create a machine dependent frag which can grow
3365 to accommodate the largest possible instruction sequence
3366 this may generate. */
3367 f = frag_var (rs_machine_dependent,
3368 UBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
3369 (is_cdx ? CDX_UBRANCH_SUBTYPE (0) : UBRANCH_SUBTYPE (0)),
3370 symp, offset, NULL);
3372 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
3374 /* We leave fixup generation to md_convert_frag. */
3378 /* Output a conditional branch. */
3380 output_cbranch (nios2_insn_infoS *insn)
3382 nios2_insn_relocS *reloc = insn->insn_reloc;
3384 /* If the reloc is NULL, there was an error assembling the branch. */
3387 symbolS *symp = reloc->reloc_expression.X_add_symbol;
3388 offsetT offset = reloc->reloc_expression.X_add_number;
3390 bfd_boolean is_cdx = (insn->insn_nios2_opcode->size == 2);
3392 /* Tag dwarf2 debug info to the address at the start of the insn.
3393 We must do it before frag_var() below closes off the frag. */
3394 dwarf2_emit_insn (0);
3396 /* We create a machine dependent frag which can grow
3397 to accommodate the largest possible instruction sequence
3398 this may generate. */
3399 f = frag_var (rs_machine_dependent,
3400 CBRANCH_MAX_SIZE, insn->insn_nios2_opcode->size,
3401 (is_cdx ? CDX_CBRANCH_SUBTYPE (0) : CBRANCH_SUBTYPE (0)),
3402 symp, offset, NULL);
3404 md_number_to_chars (f, insn->insn_code, insn->insn_nios2_opcode->size);
3406 /* We leave fixup generation to md_convert_frag. */
3410 /* Output a call sequence. Since calls are not pc-relative for NIOS2,
3411 but are page-relative, we cannot tell at any stage in assembly
3412 whether a call will be out of range since a section may be linked
3413 at any address. So if we are relaxing, we convert all call instructions
3414 to long call sequences, and rely on the linker to relax them back to
3417 output_call (nios2_insn_infoS *insn)
3419 /* This allocates enough space for the instruction
3420 and puts it in the current frag. */
3421 char *f = frag_more (12);
3422 nios2_insn_relocS *reloc = insn->insn_reloc;
3423 const struct nios2_opcode *op = insn->insn_nios2_opcode;
3428 md_number_to_chars (f,
3429 (MATCH_R1_ORHI | SET_IW_I_B (AT_REGNUM)
3432 dwarf2_emit_insn (4);
3433 fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
3434 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
3435 md_number_to_chars (f + 4,
3436 (MATCH_R1_ORI | SET_IW_I_B (AT_REGNUM)
3437 | SET_IW_I_A (AT_REGNUM)),
3439 dwarf2_emit_insn (4);
3440 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
3441 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
3442 md_number_to_chars (f + 8, MATCH_R1_CALLR | SET_IW_R_A (AT_REGNUM), 4);
3443 dwarf2_emit_insn (4);
3446 md_number_to_chars (f,
3447 (MATCH_R2_ORHI | SET_IW_F2I16_B (AT_REGNUM)
3448 | SET_IW_F2I16_A (0)),
3450 dwarf2_emit_insn (4);
3451 fix_new_exp (frag_now, f - frag_now->fr_literal, 4,
3452 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_HI16);
3453 md_number_to_chars (f + 4,
3454 (MATCH_R2_ORI | SET_IW_F2I16_B (AT_REGNUM)
3455 | SET_IW_F2I16_A (AT_REGNUM)),
3457 dwarf2_emit_insn (4);
3458 fix_new_exp (frag_now, f - frag_now->fr_literal + 4, 4,
3459 &reloc->reloc_expression, 0, BFD_RELOC_NIOS2_LO16);
3460 md_number_to_chars (f + 8, MATCH_R2_CALLR | SET_IW_F3X6L5_A (AT_REGNUM),
3462 dwarf2_emit_insn (4);
3469 /* Output a movhi/addi pair for the movia pseudo-op. */
3471 output_movia (nios2_insn_infoS *insn)
3473 /* This allocates enough space for the instruction
3474 and puts it in the current frag. */
3475 char *f = frag_more (8);
3476 nios2_insn_relocS *reloc = insn->insn_reloc;
3477 unsigned long reg, code = 0;
3478 const struct nios2_opcode *op = insn->insn_nios2_opcode;
3480 /* If the reloc is NULL, there was an error assembling the movia. */
3486 reg = GET_IW_I_B (insn->insn_code);
3487 code = MATCH_R1_ADDI | SET_IW_I_A (reg) | SET_IW_I_B (reg);
3490 reg = GET_IW_F2I16_B (insn->insn_code);
3491 code = MATCH_R2_ADDI | SET_IW_F2I16_A (reg) | SET_IW_F2I16_B (reg);
3497 md_number_to_chars (f, insn->insn_code, 4);
3498 dwarf2_emit_insn (4);
3499 fix_new (frag_now, f - frag_now->fr_literal, 4,
3500 reloc->reloc_expression.X_add_symbol,
3501 reloc->reloc_expression.X_add_number, 0,
3502 BFD_RELOC_NIOS2_HIADJ16);
3503 md_number_to_chars (f + 4, code, 4);
3504 dwarf2_emit_insn (4);
3505 fix_new (frag_now, f + 4 - frag_now->fr_literal, 4,
3506 reloc->reloc_expression.X_add_symbol,
3507 reloc->reloc_expression.X_add_number, 0, BFD_RELOC_NIOS2_LO16);
3513 /** External interfaces. */
3515 /* Update the selected architecture based on ARCH, giving an error if
3516 ARCH is an invalid value. */
3519 nios2_use_arch (const char *arch)
3521 if (strcmp (arch, "nios2") == 0 || strcmp (arch, "r1") == 0)
3523 nios2_architecture |= EF_NIOS2_ARCH_R1;
3524 nios2_opcodes = (struct nios2_opcode *) nios2_r1_opcodes;
3525 nios2_num_opcodes = nios2_num_r1_opcodes;
3530 else if (strcmp (arch, "r2") == 0)
3532 nios2_architecture |= EF_NIOS2_ARCH_R2;
3533 nios2_opcodes = (struct nios2_opcode *) nios2_r2_opcodes;
3534 nios2_num_opcodes = nios2_num_r2_opcodes;
3540 as_bad (_("unknown architecture '%s'"), arch);
3543 /* The following functions are called by machine-independent parts of
3546 md_parse_option (int c, const char *arg ATTRIBUTE_UNUSED)
3551 /* Hidden option for self-test mode. */
3552 nios2_mode = NIOS2_MODE_TEST;
3554 case OPTION_RELAX_ALL:
3555 nios2_as_options.relax = relax_all;
3557 case OPTION_NORELAX:
3558 nios2_as_options.relax = relax_none;
3560 case OPTION_RELAX_SECTION:
3561 nios2_as_options.relax = relax_section;
3564 target_big_endian = 1;
3567 target_big_endian = 0;
3570 nios2_use_arch (arg);
3580 /* Implement TARGET_FORMAT. We can choose to be big-endian or
3581 little-endian at runtime based on a switch. */
3583 nios2_target_format (void)
3585 return target_big_endian ? "elf32-bignios2" : "elf32-littlenios2";
3588 /* Machine-dependent usage message. */
3590 md_show_usage (FILE *stream)
3592 fprintf (stream, " NIOS2 options:\n"
3593 " -relax-all replace all branch and call "
3594 "instructions with jmp and callr sequences\n"
3595 " -relax-section replace identified out of range "
3596 "branches with jmp sequences (default)\n"
3597 " -no-relax do not replace any branches or calls\n"
3598 " -EB force big-endian byte ordering\n"
3599 " -EL force little-endian byte ordering\n"
3600 " -march=ARCH enable instructions from architecture ARCH\n");
3604 /* This function is called once, at assembler startup time.
3605 It should set up all the tables, etc. that the MD part of the
3606 assembler will need. */
3611 const char *inserted;
3613 switch (nios2_architecture)
3616 case EF_NIOS2_ARCH_R1:
3617 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r1);
3619 case EF_NIOS2_ARCH_R2:
3620 if (target_big_endian)
3621 as_fatal (_("Big-endian R2 is not supported."));
3622 bfd_default_set_arch_mach (stdoutput, bfd_arch_nios2, bfd_mach_nios2r2);
3626 /* Create and fill a hashtable for the Nios II opcodes, registers and
3628 nios2_opcode_hash = hash_new ();
3629 nios2_reg_hash = hash_new ();
3630 nios2_ps_hash = hash_new ();
3632 for (i = 0; i < nios2_num_opcodes; ++i)
3635 = hash_insert (nios2_opcode_hash, nios2_opcodes[i].name,
3636 (PTR) & nios2_opcodes[i]);
3637 if (inserted != NULL)
3639 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3640 nios2_opcodes[i].name, inserted);
3641 /* Probably a memory allocation problem? Give up now. */
3642 as_fatal (_("Broken assembler. No assembly attempted."));
3646 for (i = 0; i < nios2_num_regs; ++i)
3649 = hash_insert (nios2_reg_hash, nios2_regs[i].name,
3650 (PTR) & nios2_regs[i]);
3651 if (inserted != NULL)
3653 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3654 nios2_regs[i].name, inserted);
3655 /* Probably a memory allocation problem? Give up now. */
3656 as_fatal (_("Broken assembler. No assembly attempted."));
3661 for (i = 0; i < nios2_num_ps_insn_info_structs; ++i)
3664 = hash_insert (nios2_ps_hash, nios2_ps_insn_info_structs[i].pseudo_insn,
3665 (PTR) & nios2_ps_insn_info_structs[i]);
3666 if (inserted != NULL)
3668 fprintf (stderr, _("internal error: can't hash `%s': %s\n"),
3669 nios2_ps_insn_info_structs[i].pseudo_insn, inserted);
3670 /* Probably a memory allocation problem? Give up now. */
3671 as_fatal (_("Broken assembler. No assembly attempted."));
3675 /* Assembler option defaults. */
3676 nios2_as_options.noat = FALSE;
3677 nios2_as_options.nobreak = FALSE;
3679 /* Debug information is incompatible with relaxation. */
3680 if (debug_type != DEBUG_UNSPECIFIED)
3681 nios2_as_options.relax = relax_none;
3683 /* Initialize the alignment data. */
3684 nios2_current_align_seg = now_seg;
3685 nios2_last_label = NULL;
3686 nios2_current_align = 0;
3687 nios2_min_align = 2;
3691 /* Assembles a single line of Nios II assembly language. */
3693 md_assemble (char *op_str)
3696 char *op_strdup = NULL;
3697 unsigned long saved_pinfo = 0;
3698 nios2_insn_infoS thisinsn;
3699 nios2_insn_infoS *insn = &thisinsn;
3700 bfd_boolean ps_error = FALSE;
3702 /* Make sure we are aligned on an appropriate boundary. */
3703 if (nios2_current_align < nios2_min_align)
3704 nios2_align (nios2_min_align, NULL, nios2_last_label);
3705 else if (nios2_current_align > nios2_min_align)
3706 nios2_current_align = nios2_min_align;
3707 nios2_last_label = NULL;
3709 /* We don't want to clobber to op_str
3710 because we want to be able to use it in messages. */
3711 op_strdup = strdup (op_str);
3712 insn->insn_tokens[0] = strtok (op_strdup, " ");
3713 argstr = strtok (NULL, "");
3715 /* Assemble the opcode. */
3716 insn->insn_nios2_opcode = nios2_opcode_lookup (insn->insn_tokens[0]);
3717 insn->insn_reloc = NULL;
3719 if (insn->insn_nios2_opcode != NULL)
3721 nios2_ps_insn_infoS *ps_insn = NULL;
3723 /* Note if we've seen a 16-bit instruction. */
3724 if (insn->insn_nios2_opcode->size == 2)
3725 nios2_min_align = 1;
3727 /* Set the opcode for the instruction. */
3728 insn->insn_code = insn->insn_nios2_opcode->match;
3729 insn->constant_bits = 0;
3731 /* Parse the arguments pointed to by argstr. */
3732 if (nios2_mode == NIOS2_MODE_ASSEMBLE)
3733 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args,
3734 (char **) &insn->insn_tokens[1]);
3736 nios2_parse_args (insn, argstr, insn->insn_nios2_opcode->args_test,
3737 (char **) &insn->insn_tokens[1]);
3739 /* We need to preserve the MOVIA macro as this is clobbered by
3740 translate_pseudo_insn. */
3741 if (insn->insn_nios2_opcode->pinfo == NIOS2_INSN_MACRO_MOVIA)
3742 saved_pinfo = NIOS2_INSN_MACRO_MOVIA;
3743 /* If the instruction is an pseudo-instruction, we want to replace it
3744 with its real equivalent, and then continue. */
3745 if ((insn->insn_nios2_opcode->pinfo & NIOS2_INSN_MACRO)
3746 == NIOS2_INSN_MACRO)
3748 ps_insn = nios2_translate_pseudo_insn (insn);
3753 /* If we found invalid pseudo-instruction syntax, the error's already
3754 been diagnosed in nios2_translate_pseudo_insn, so skip
3755 remaining processing. */
3758 /* Assemble the parsed arguments into the instruction word. */
3759 nios2_assemble_args (insn);
3761 /* Handle relaxation and other transformations. */
3762 if (nios2_as_options.relax != relax_none
3763 && !nios2_as_options.noat
3764 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_UBRANCH)
3765 output_ubranch (insn);
3766 else if (nios2_as_options.relax != relax_none
3767 && !nios2_as_options.noat
3768 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CBRANCH)
3769 output_cbranch (insn);
3770 else if (nios2_as_options.relax == relax_all
3771 && !nios2_as_options.noat
3772 && insn->insn_nios2_opcode->pinfo & NIOS2_INSN_CALL
3774 && ((insn->insn_reloc->reloc_type
3775 == BFD_RELOC_NIOS2_CALL26)
3776 || (insn->insn_reloc->reloc_type
3777 == BFD_RELOC_NIOS2_CALL26_NOAT)))
3779 else if (saved_pinfo == NIOS2_INSN_MACRO_MOVIA)
3780 output_movia (insn);
3784 nios2_cleanup_pseudo_insn (insn, ps_insn);
3788 /* Unrecognised instruction - error. */
3789 as_bad (_("unrecognised instruction %s"), insn->insn_tokens[0]);
3791 /* Don't leak memory. */
3795 /* Round up section size. */
3797 md_section_align (asection *seg ATTRIBUTE_UNUSED, valueT size)
3799 /* I think byte alignment is fine here. */
3803 /* Implement TC_FORCE_RELOCATION. */
3805 nios2_force_relocation (fixS *fixp)
3807 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3808 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY
3809 || fixp->fx_r_type == BFD_RELOC_NIOS2_ALIGN)
3812 return generic_force_reloc (fixp);
3815 /* Implement tc_fix_adjustable. */
3817 nios2_fix_adjustable (fixS *fixp)
3819 if (fixp->fx_addsy == NULL)
3823 /* Prevent all adjustments to global symbols. */
3824 if (OUTPUT_FLAVOR == bfd_target_elf_flavour
3825 && (S_IS_EXTERNAL (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
3828 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
3829 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
3832 /* Preserve relocations against symbols with function type. */
3833 if (symbol_get_bfdsym (fixp->fx_addsy)->flags & BSF_FUNCTION)
3836 /* Don't allow symbols to be discarded on GOT related relocs. */
3837 if (fixp->fx_r_type == BFD_RELOC_NIOS2_GOT16
3838 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL16
3839 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_LO
3840 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF_HA
3841 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_GD16
3842 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDM16
3843 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LDO16
3844 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_IE16
3845 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_LE16
3846 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPMOD
3847 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_DTPREL
3848 || fixp->fx_r_type == BFD_RELOC_NIOS2_TLS_TPREL
3849 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOTOFF
3850 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_LO
3851 || fixp->fx_r_type == BFD_RELOC_NIOS2_GOT_HA
3852 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_LO
3853 || fixp->fx_r_type == BFD_RELOC_NIOS2_CALL_HA
3860 /* Implement tc_frob_symbol. This is called in adjust_reloc_syms;
3861 it is used to remove *ABS* references from the symbol table. */
3863 nios2_frob_symbol (symbolS *symp)
3865 if ((OUTPUT_FLAVOR == bfd_target_elf_flavour
3866 && symp == section_symbol (absolute_section))
3867 || !S_IS_DEFINED (symp))
3873 /* The function tc_gen_reloc creates a relocation structure for the
3874 fixup fixp, and returns a pointer to it. This structure is passed
3875 to bfd_install_relocation so that it can be written to the object
3876 file for linking. */
3878 tc_gen_reloc (asection *section ATTRIBUTE_UNUSED, fixS *fixp)
3880 arelent *reloc = XNEW (arelent);
3881 reloc->sym_ptr_ptr = XNEW (asymbol *);
3882 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
3884 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
3885 reloc->addend = fixp->fx_offset; /* fixp->fx_addnumber; */
3889 switch (fixp->fx_r_type)
3892 fixp->fx_r_type = BFD_RELOC_16_PCREL;
3894 case BFD_RELOC_NIOS2_LO16:
3895 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_LO;
3897 case BFD_RELOC_NIOS2_HIADJ16:
3898 fixp->fx_r_type = BFD_RELOC_NIOS2_PCREL_HA;
3905 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
3906 if (reloc->howto == NULL)
3908 as_bad_where (fixp->fx_file, fixp->fx_line,
3909 _("can't represent relocation type %s"),
3910 bfd_get_reloc_code_name (fixp->fx_r_type));
3912 /* Set howto to a garbage value so that we can keep going. */
3913 reloc->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
3914 gas_assert (reloc->howto != NULL);
3920 md_pcrel_from (fixS *fixP ATTRIBUTE_UNUSED)
3925 /* Called just before the assembler exits. */
3929 /* FIXME - not yet implemented */
3932 /* Under ELF we need to default _GLOBAL_OFFSET_TABLE.
3933 Otherwise we have no need to default values of symbols. */
3935 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
3938 if (name[0] == '_' && name[1] == 'G'
3939 && strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
3943 if (symbol_find (name))
3944 as_bad ("GOT already in the symbol table");
3946 GOT_symbol = symbol_new (name, undefined_section,
3947 (valueT) 0, &zero_address_frag);
3957 /* Implement tc_frob_label. */
3959 nios2_frob_label (symbolS *lab)
3961 /* Emit dwarf information. */
3962 dwarf2_emit_label (lab);
3964 /* Update the label's address with the current output pointer. */
3965 symbol_set_frag (lab, frag_now);
3966 S_SET_VALUE (lab, (valueT) frag_now_fix ());
3968 /* Record this label for future adjustment after we find out what
3969 kind of data it references, and the required alignment therewith. */
3970 nios2_last_label = lab;
3973 /* Implement md_cons_align. */
3975 nios2_cons_align (int size)
3978 const char *pfill = NULL;
3980 while ((size >>= 1) != 0)
3983 if (subseg_text_p (now_seg))
3984 pfill = (const char *) nop32;
3988 if (nios2_auto_align_on)
3989 nios2_align (log_size, pfill, NULL);
3991 nios2_last_label = NULL;
3994 /* Map 's' to SHF_NIOS2_GPREL. */
3995 /* This is from the Alpha code tc-alpha.c. */
3997 nios2_elf_section_letter (int letter, const char **ptr_msg)
4000 return SHF_NIOS2_GPREL;
4002 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
4006 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
4007 /* This is from the Alpha code tc-alpha.c. */
4009 nios2_elf_section_flags (flagword flags, int attr, int type ATTRIBUTE_UNUSED)
4011 if (attr & SHF_NIOS2_GPREL)
4012 flags |= SEC_SMALL_DATA;
4016 /* Implement TC_PARSE_CONS_EXPRESSION to handle %tls_ldo(...) */
4017 bfd_reloc_code_real_type
4018 nios2_cons (expressionS *exp, int size)
4020 bfd_reloc_code_real_type nios2_tls_ldo_reloc = BFD_RELOC_NONE;
4023 if (input_line_pointer[0] == '%')
4025 if (strprefix (input_line_pointer + 1, "tls_ldo"))
4028 as_bad (_("Illegal operands: %%tls_ldo in %d-byte data field"),
4032 input_line_pointer += 8;
4033 nios2_tls_ldo_reloc = BFD_RELOC_NIOS2_TLS_DTPREL;
4036 if (nios2_tls_ldo_reloc != BFD_RELOC_NONE)
4039 if (input_line_pointer[0] != '(')
4040 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4044 char *end = ++input_line_pointer;
4047 for (c = *end; !is_end_of_line[c]; end++, c = *end)
4058 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4064 if (input_line_pointer != end)
4065 as_bad (_("Illegal operands: %%tls_ldo requires arguments in ()"));
4068 input_line_pointer++;
4070 c = *input_line_pointer;
4071 if (! is_end_of_line[c] && c != ',')
4072 as_bad (_("Illegal operands: garbage after %%tls_ldo()"));
4078 if (nios2_tls_ldo_reloc == BFD_RELOC_NONE)
4080 return nios2_tls_ldo_reloc;
4083 /* Implement HANDLE_ALIGN. */
4085 nios2_handle_align (fragS *fragp)
4087 /* If we are expecting to relax in the linker, then we must output a
4088 relocation to tell the linker we are aligning code. */
4089 if (nios2_as_options.relax == relax_all
4090 && (fragp->fr_type == rs_align || fragp->fr_type == rs_align_code)
4091 && fragp->fr_address + fragp->fr_fix > 0
4092 && fragp->fr_offset > 1
4093 && now_seg != bss_section)
4094 fix_new (fragp, fragp->fr_fix, 0, &abs_symbol, fragp->fr_offset, 0,
4095 BFD_RELOC_NIOS2_ALIGN);
4098 /* Implement tc_regname_to_dw2regnum, to convert REGNAME to a DWARF-2
4101 nios2_regname_to_dw2regnum (char *regname)
4103 struct nios2_reg *r = nios2_reg_lookup (regname);
4109 /* Implement tc_cfi_frame_initial_instructions, to initialize the DWARF-2
4110 unwind information for this procedure. */
4112 nios2_frame_initial_instructions (void)
4114 cfi_add_CFA_def_cfa (27, 0);
4118 /* Some special processing for a Nios II ELF file. */
4121 nios2_elf_final_processing (void)
4123 elf_elfheader (stdoutput)->e_flags = nios2_architecture;