1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
3 Copyright (C) 2002, 2003, 2004 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
28 #define PUSH_1X_WORKAROUND
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
34 /* GCC uses the some condition codes which we'll
35 implement as new polymorph instructions.
37 COND EXPL SHORT JUMP LONG JUMP
38 ===============================================
39 eq == jeq jne +4; br lab
40 ne != jne jeq +4; br lab
42 ltn honours no-overflow flag
43 ltn < jn jn +2; jmp +4; br lab
45 lt < jl jge +4; br lab
46 ltu < jlo lhs +4; br lab
52 ge >= jge jl +4; br lab
53 geu >= jhs jlo +4; br lab
54 ===============================================
56 Therefore, new opcodes are (BranchEQ -> beq; and so on...)
57 beq,bne,blt,bltn,bltu,bge,bgeu
58 'u' means unsigned compares
60 Also, we add 'jump' instruction:
61 jump UNCOND -> jmp br lab
63 They will have fmt == 4, and insn_opnumb == number of instruction. */
68 int index; /* Corresponding insn_opnumb. */
69 int sop; /* Opcode if jump length is short. */
70 long lpos; /* Label position. */
71 long lop0; /* Opcode 1 _word_ (16 bits). */
72 long lop1; /* Opcode second word. */
73 long lop2; /* Opcode third word. */
76 #define MSP430_RLC(n,i,sop,o1) \
77 {#n, i, sop, 2, (o1 + 2), 0x4010, 0}
79 static struct rcodes_s msp430_rcodes[] =
81 MSP430_RLC (beq, 0, 0x2400, 0x2000),
82 MSP430_RLC (bne, 1, 0x2000, 0x2400),
83 MSP430_RLC (blt, 2, 0x3800, 0x3400),
84 MSP430_RLC (bltu, 3, 0x2800, 0x2c00),
85 MSP430_RLC (bge, 4, 0x3400, 0x3800),
86 MSP430_RLC (bgeu, 5, 0x2c00, 0x2800),
87 {"bltn", 6, 0x3000, 3, 0x3000 + 1, 0x3c00 + 2,0x4010},
88 {"jump", 7, 0x3c00, 1, 0x4010, 0, 0},
94 /* More difficult than above and they have format 5.
97 =================================================================
98 gt > jeq +2; jge label jeq +6; jl +4; br label
99 gtu > jeq +2; jhs label jeq +6; jlo +4; br label
100 leu <= jeq label; jlo label jeq +2; jhs +4; br label
101 le <= jeq label; jl label jeq +2; jge +4; br label
102 ================================================================= */
107 int index; /* Corresponding insn_opnumb. */
108 int tlab; /* Number of labels in short mode. */
109 int op0; /* Opcode for first word of short jump. */
110 int op1; /* Opcode for second word of short jump. */
111 int lop0; /* Opcodes for long jump mode. */
116 static struct hcodes_s msp430_hcodes[] =
118 {"bgt", 0, 1, 0x2401, 0x3400, 0x2403, 0x3802, 0x4010 },
119 {"bgtu", 1, 1, 0x2401, 0x2c00, 0x2403, 0x2802, 0x4010 },
120 {"bleu", 2, 2, 0x2400, 0x2800, 0x2401, 0x2c02, 0x4010 },
121 {"ble", 3, 2, 0x2400, 0x3800, 0x2401, 0x3402, 0x4010 },
125 const char comment_chars[] = ";";
126 const char line_comment_chars[] = "#";
127 const char line_separator_chars[] = "";
128 const char EXP_CHARS[] = "eE";
129 const char FLT_CHARS[] = "dD";
131 /* Handle long expressions. */
132 extern LITTLENUM_TYPE generic_bignum[];
134 static struct hash_control *msp430_hash;
137 #define STATE_UNCOND_BRANCH 1 /* jump */
138 #define STATE_NOOV_BRANCH 3 /* bltn */
139 #define STATE_SIMPLE_BRANCH 2 /* bne, beq, etc... */
140 #define STATE_EMUL_BRANCH 4
149 #define STATE_BITS10 1 /* wild guess. short jump */
150 #define STATE_WORD 2 /* 2 bytes pc rel. addr. more */
151 #define STATE_UNDEF 3 /* cannot handle this yet. convert to word mode */
153 #define ENCODE_RELAX(what,length) (((what) << 2) + (length))
154 #define RELAX_STATE(s) ((s) & 3)
155 #define RELAX_LEN(s) ((s) >> 2)
156 #define RELAX_NEXT(a,b) ENCODE_RELAX (a, b + 1)
158 relax_typeS md_relax_table[] =
166 /* Unconditional jump. */
168 {1024, -1024, CNRL, RELAX_NEXT (STATE_UNCOND_BRANCH, STATE_BITS10)}, /* state 10 bits displ */
169 {0, 0, CUBL, RELAX_NEXT (STATE_UNCOND_BRANCH, STATE_WORD)}, /* state word */
170 {1, 1, CUBL, 0}, /* state undef */
172 /* Simple branches. */
174 {1024, -1024, CNRL, RELAX_NEXT (STATE_SIMPLE_BRANCH, STATE_BITS10)}, /* state 10 bits displ */
175 {0, 0, CSBL, RELAX_NEXT (STATE_SIMPLE_BRANCH, STATE_WORD)}, /* state word */
178 /* blt no overflow branch. */
180 {1024, -1024, CNRL, RELAX_NEXT (STATE_NOOV_BRANCH, STATE_BITS10)}, /* state 10 bits displ */
181 {0, 0, CNOL, RELAX_NEXT (STATE_NOOV_BRANCH, STATE_WORD)}, /* state word */
184 /* Emulated branches. */
186 {1020, -1020, CEBL, RELAX_NEXT (STATE_EMUL_BRANCH, STATE_BITS10)}, /* state 10 bits displ */
187 {0, 0, CNOL, RELAX_NEXT (STATE_EMUL_BRANCH, STATE_WORD)}, /* state word */
192 #define MAX_OP_LEN 256
201 #define MSP430_ISA_11 11
202 #define MSP430_ISA_110 110
203 #define MSP430_ISA_12 12
204 #define MSP430_ISA_13 13
205 #define MSP430_ISA_14 14
206 #define MSP430_ISA_15 15
207 #define MSP430_ISA_16 16
208 #define MSP430_ISA_31 31
209 #define MSP430_ISA_32 32
210 #define MSP430_ISA_33 33
211 #define MSP430_ISA_41 41
212 #define MSP430_ISA_42 42
213 #define MSP430_ISA_43 43
214 #define MSP430_ISA_44 44
216 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
217 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
219 static struct mcu_type_s mcu_types[] =
221 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
222 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
223 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
224 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
225 {"msp430x1101", MSP430_ISA_110, bfd_mach_msp110},
226 {"msp430x1111", MSP430_ISA_110, bfd_mach_msp110},
227 {"msp430x1121", MSP430_ISA_110, bfd_mach_msp110},
228 {"msp430x1122", MSP430_ISA_11, bfd_mach_msp110},
229 {"msp430x1132", MSP430_ISA_11, bfd_mach_msp110},
231 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
232 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
233 {"msp430x1222", MSP430_ISA_12, bfd_mach_msp12},
234 {"msp430x1232", MSP430_ISA_12, bfd_mach_msp12},
236 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
237 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
238 {"msp430x1331", MSP430_ISA_13, bfd_mach_msp13},
239 {"msp430x1351", MSP430_ISA_13, bfd_mach_msp13},
240 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
241 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
242 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
244 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
245 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
246 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
247 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
248 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
249 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
250 {"msp430x1610", MSP430_ISA_16, bfd_mach_msp16},
251 {"msp430x1611", MSP430_ISA_16, bfd_mach_msp16},
252 {"msp430x1612", MSP430_ISA_16, bfd_mach_msp16},
254 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
255 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
256 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
257 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
258 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
259 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
260 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
261 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
262 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
264 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
265 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
266 {"msp430x415", MSP430_ISA_41, bfd_mach_msp41},
267 {"msp430x417", MSP430_ISA_41, bfd_mach_msp41},
269 {"msp430xE423", MSP430_ISA_42, bfd_mach_msp42},
270 {"msp430xE425", MSP430_ISA_42, bfd_mach_msp42},
271 {"msp430xE427", MSP430_ISA_42, bfd_mach_msp42},
273 {"msp430xW423", MSP430_ISA_42, bfd_mach_msp42},
274 {"msp430xW425", MSP430_ISA_42, bfd_mach_msp42},
275 {"msp430xW427", MSP430_ISA_42, bfd_mach_msp42},
277 {"msp430xG437", MSP430_ISA_43, bfd_mach_msp43},
278 {"msp430xG438", MSP430_ISA_43, bfd_mach_msp43},
279 {"msp430xG439", MSP430_ISA_43, bfd_mach_msp43},
281 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
282 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
283 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
284 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
285 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
286 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
292 static struct mcu_type_s default_mcu =
293 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
295 static struct mcu_type_s * msp430_mcu = & default_mcu;
297 /* Profiling capability:
298 It is a performance hit to use gcc's profiling approach for this tiny target.
299 Even more -- jtag hardware facility does not perform any profiling functions.
300 However we've got gdb's built-in simulator where we can do anything.
301 Therefore my suggestion is:
303 We define new section ".profiler" which holds all profiling information.
304 We define new pseudo operation .profiler which will instruct assembler to
305 add new profile entry to the object file. Profile should take place at the
310 .profiler flags,function_to_profile [, cycle_corrector, extra]
312 where 'flags' is a combination of the following chars:
315 i - function is in Init section
316 f - function is in Fini section
318 c - libC standard call
319 d - stack value Demand (saved at run-time in simulator)
320 I - Interrupt service routine
325 j - long Jump/ sjlj unwind
326 a - an Arbitrary code fragment
327 t - exTra parameter saved (constant value like frame size)
328 '""' optional: "sil" == sil
330 function_to_profile - function's address
331 cycle_corrector - a value which should be added to the cycle
332 counter, zero if omitted
333 extra - some extra parameter, zero if omitted.
336 ------------------------------
340 .LFrameOffset_fxx=0x08
341 .profiler "scdP", fxx ; function entry.
342 ; we also demand stack value to be displayed
347 .profiler "cdp",fxx,0, .LFrameOffset_fxx ; check stack value at this point
348 ; (this is a prologue end)
349 ; note, that spare var filled with the farme size
352 .profiler cdE,fxx ; check stack
357 .profiler xcde,fxx,3 ; exit adds 3 to the cycle counter
358 ret ; cause 'ret' insn takes 3 cycles
359 -------------------------------
361 This profiling approach does not produce any overhead and
363 So, even profiled code can be uploaded to the MCU. */
364 #define MSP430_PROFILER_FLAG_ENTRY 1 /* s */
365 #define MSP430_PROFILER_FLAG_EXIT 2 /* x */
366 #define MSP430_PROFILER_FLAG_INITSECT 4 /* i */
367 #define MSP430_PROFILER_FLAG_FINISECT 8 /* f */
368 #define MSP430_PROFILER_FLAG_LIBCALL 0x10 /* l */
369 #define MSP430_PROFILER_FLAG_STDCALL 0x20 /* c */
370 #define MSP430_PROFILER_FLAG_STACKDMD 0x40 /* d */
371 #define MSP430_PROFILER_FLAG_ISR 0x80 /* I */
372 #define MSP430_PROFILER_FLAG_PROLSTART 0x100 /* P */
373 #define MSP430_PROFILER_FLAG_PROLEND 0x200 /* p */
374 #define MSP430_PROFILER_FLAG_EPISTART 0x400 /* E */
375 #define MSP430_PROFILER_FLAG_EPIEND 0x800 /* e */
376 #define MSP430_PROFILER_FLAG_JUMP 0x1000 /* j */
377 #define MSP430_PROFILER_FLAG_FRAGMENT 0x2000 /* a */
378 #define MSP430_PROFILER_FLAG_EXTRA 0x4000 /* t */
379 #define MSP430_PROFILER_FLAG_notyet 0x8000 /* ? */
392 for (; x; x = x >> 1)
399 /* Parse ordinary expression. */
402 parse_exp (char * s, expressionS * op)
404 input_line_pointer = s;
406 if (op->X_op == O_absent)
407 as_bad (_("missing operand"));
408 return input_line_pointer;
412 /* Delete spaces from s: X ( r 1 2) => X(r12). */
415 del_spaces (char * s)
423 while (ISSPACE (*m) && *m)
425 memmove (s, m, strlen (m) + 1);
433 skip_space (char * s)
440 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
443 extract_operand (char * from, char * to, int limit)
447 /* Drop leading whitespace. */
448 from = skip_space (from);
450 while (size < limit && *from)
452 *(to + size) = *from;
453 if (*from == ',' || *from == ';' || *from == '\n')
468 msp430_profiler (int dummy ATTRIBUTE_UNUSED)
485 s = input_line_pointer;
486 end = input_line_pointer;
488 while (*end && *end != '\n')
491 while (*s && *s != '\n')
502 as_bad (_(".profiler pseudo requires at least two operands."));
503 input_line_pointer = end;
507 input_line_pointer = extract_operand (input_line_pointer, flags, 32);
516 p_flags |= MSP430_PROFILER_FLAG_FRAGMENT;
519 p_flags |= MSP430_PROFILER_FLAG_JUMP;
522 p_flags |= MSP430_PROFILER_FLAG_PROLSTART;
525 p_flags |= MSP430_PROFILER_FLAG_PROLEND;
528 p_flags |= MSP430_PROFILER_FLAG_EPISTART;
531 p_flags |= MSP430_PROFILER_FLAG_EPIEND;
534 p_flags |= MSP430_PROFILER_FLAG_ENTRY;
537 p_flags |= MSP430_PROFILER_FLAG_EXIT;
540 p_flags |= MSP430_PROFILER_FLAG_INITSECT;
543 p_flags |= MSP430_PROFILER_FLAG_FINISECT;
546 p_flags |= MSP430_PROFILER_FLAG_LIBCALL;
549 p_flags |= MSP430_PROFILER_FLAG_STDCALL;
552 p_flags |= MSP430_PROFILER_FLAG_STACKDMD;
555 p_flags |= MSP430_PROFILER_FLAG_ISR;
558 p_flags |= MSP430_PROFILER_FLAG_EXTRA;
561 as_warn (_("unknown profiling flag - ignored."));
568 && ( ! pow2value (p_flags & ( MSP430_PROFILER_FLAG_ENTRY
569 | MSP430_PROFILER_FLAG_EXIT))
570 || ! pow2value (p_flags & ( MSP430_PROFILER_FLAG_PROLSTART
571 | MSP430_PROFILER_FLAG_PROLEND
572 | MSP430_PROFILER_FLAG_EPISTART
573 | MSP430_PROFILER_FLAG_EPIEND))
574 || ! pow2value (p_flags & ( MSP430_PROFILER_FLAG_INITSECT
575 | MSP430_PROFILER_FLAG_FINISECT))))
577 as_bad (_("ambigious flags combination - '.profiler' directive ignored."));
578 input_line_pointer = end;
582 /* Generate temp symbol which denotes current location. */
583 if (now_seg == absolute_section) /* Paranoja ? */
585 exp1.X_op = O_constant;
586 exp1.X_add_number = abs_section_offset;
587 as_warn (_("profiling in absolute section? Hm..."));
591 exp1.X_op = O_symbol;
592 exp1.X_add_symbol = symbol_temp_new_now ();
593 exp1.X_add_number = 0;
596 /* Generate a symbol which holds flags value. */
597 exp.X_op = O_constant;
598 exp.X_add_number = p_flags;
600 /* Save current section. */
604 /* Now go to .profiler section. */
605 obj_elf_change_section (".profiler", SHT_PROGBITS, 0, 0, 0, 0, 0);
608 emit_expr (& exp, 2);
610 /* Save label value. */
611 emit_expr (& exp1, 2);
615 /* Now get profiling info. */
616 halt = extract_operand (input_line_pointer, str, 1024);
617 /* Process like ".word xxx" directive. */
618 parse_exp (str, & exp);
619 emit_expr (& exp, 2);
620 input_line_pointer = halt;
623 /* Fill the rest with zeros. */
624 exp.X_op = O_constant;
625 exp.X_add_number = 0;
627 emit_expr (& exp, 2);
629 /* Return to current section. */
630 subseg_set (seg, subseg);
634 extract_word (char * from, char * to, int limit)
640 /* Drop leading whitespace. */
641 from = skip_space (from);
644 /* Find the op code end. */
645 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
647 to[size++] = *op_end++;
648 if (size + 1 >= limit)
656 #define OPTION_MMCU 'm'
659 msp430_set_arch (int dummy ATTRIBUTE_UNUSED)
661 char *str = (char *) alloca (32); /* 32 for good measure. */
663 input_line_pointer = extract_word (input_line_pointer, str, 32);
665 md_parse_option (OPTION_MMCU, str);
666 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
670 show_mcu_list (FILE * stream)
674 fprintf (stream, _("Known MCU names:\n"));
676 for (i = 0; mcu_types[i].name; i++)
677 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
679 fprintf (stream, "\n");
683 md_parse_option (int c, char * arg)
690 for (i = 0; mcu_types[i].name; ++i)
691 if (strcmp (mcu_types[i].name, arg) == 0)
694 if (!mcu_types[i].name)
696 show_mcu_list (stderr);
697 as_fatal (_("unknown MCU: %s\n"), arg);
700 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
701 msp430_mcu = &mcu_types[i];
703 as_fatal (_("redefinition of mcu type %s' to %s'"),
704 msp430_mcu->name, mcu_types[i].name);
712 const pseudo_typeS md_pseudo_table[] =
714 {"arch", msp430_set_arch, 0},
715 {"profiler", msp430_profiler, 0},
719 const char *md_shortopts = "m:";
721 struct option md_longopts[] =
723 {"mmcu", required_argument, NULL, OPTION_MMCU},
724 {NULL, no_argument, NULL, 0}
727 size_t md_longopts_size = sizeof (md_longopts);
730 md_show_usage (FILE * stream)
733 _("MSP430 options:\n"
734 " -mmcu=[msp430-name] select microcontroller type\n"
735 " msp430x110 msp430x112\n"
736 " msp430x1101 msp430x1111\n"
737 " msp430x1121 msp430x1122 msp430x1132\n"
738 " msp430x122 msp430x123\n"
739 " msp430x1222 msp430x1232\n"
740 " msp430x133 msp430x135\n"
741 " msp430x1331 msp430x1351\n"
742 " msp430x147 msp430x148 msp430x149\n"
743 " msp430x155 msp430x156 msp430x157\n"
744 " msp430x167 msp430x168 msp430x169\n"
745 " msp430x1610 msp430x1611 msp430x1612\n"
746 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
747 " msp430x323 msp430x325\n"
748 " msp430x336 msp430x337\n"
749 " msp430x412 msp430x413 msp430x415 msp430x417\n"
750 " msp430xE423 msp430xE425 msp430E427\n"
751 " msp430xW423 msp430xW425 msp430W427\n"
752 " msp430xG437 msp430xG438 msp430G439\n"
753 " msp430x435 msp430x436 msp430x437\n"
754 " msp430x447 msp430x448 msp430x449\n"));
756 show_mcu_list (stream);
760 md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
766 extract_cmd (char * from, char * to, int limit)
770 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
772 *(to + size) = *from;
782 /* Turn a string in input_line_pointer into a floating point constant
783 of type TYPE, and store the appropriate bytes in *LITP. The number
784 of LITTLENUMS emitted is stored in *SIZEP. An error message is
785 returned, or NULL on OK. */
788 md_atof (int type, char * litP, int * sizeP)
791 LITTLENUM_TYPE words[4];
792 LITTLENUM_TYPE *wordP;
805 return _("bad call to md_atof");
808 t = atof_ieee (input_line_pointer, type, words);
810 input_line_pointer = t;
812 *sizeP = prec * sizeof (LITTLENUM_TYPE);
814 /* This loop outputs the LITTLENUMs in REVERSE order. */
815 for (wordP = words + prec - 1; prec--;)
817 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
818 litP += sizeof (LITTLENUM_TYPE);
827 struct msp430_opcode_s * opcode;
828 msp430_hash = hash_new ();
830 for (opcode = msp430_opcodes; opcode->name; opcode++)
831 hash_insert (msp430_hash, opcode->name, (char *) opcode);
833 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
839 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
841 if (strlen (t) > 2 && *(t + 2) != '+')
846 if ((*t < '0' || *t > '9') && *t != '+')
859 msp430_srcoperand (struct msp430_operand_s * op,
860 char * l, int bin, int * imm_op)
864 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
871 /* Check if there is:
872 llo(x) - least significant 16 bits, x &= 0xffff
873 lhi(x) - x = (x >> 16) & 0xffff,
874 hlo(x) - x = (x >> 32) & 0xffff,
875 hhi(x) - x = (x >> 48) & 0xffff
876 The value _MUST_ be constant expression: #hlo(1231231231). */
880 if (strncasecmp (h, "#llo(", 5) == 0)
885 else if (strncasecmp (h, "#lhi(", 5) == 0)
890 else if (strncasecmp (h, "#hlo(", 5) == 0)
895 else if (strncasecmp (h, "#hhi(", 5) == 0)
900 else if (strncasecmp (h, "#lo(", 4) == 0)
905 else if (strncasecmp (h, "#hi(", 4) == 0)
911 op->reg = 0; /* Reg PC. */
913 op->ol = 1; /* Immediate will follow an instruction. */
917 parse_exp (__tl, &(op->exp));
918 if (op->exp.X_op == O_constant)
920 int x = op->exp.X_add_number;
925 op->exp.X_add_number = x;
927 else if (vshift == 1)
929 x = (x >> 16) & 0xffff;
930 op->exp.X_add_number = x;
935 op->exp.X_add_number = -1;
937 op->exp.X_add_number = 0; /* Nothing left. */
938 x = op->exp.X_add_number;
941 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
943 as_bad (_("value %d out of range. Use #lo() or #hi()"), x);
947 /* Now check constants. */
948 /* Substitute register mode with a constant generator if applicable. */
950 x = (short) x; /* Extend sign. */
982 #ifdef PUSH_1X_WORKAROUND
985 /* Remove warning as confusing.
986 as_warn(_("Hardware push bug workaround")); */
999 #ifdef PUSH_1X_WORKAROUND
1002 /* Remove warning as confusing.
1003 as_warn(_("Hardware push bug workaround")); */
1015 else if (op->exp.X_op == O_symbol)
1019 else if (op->exp.X_op == O_big)
1024 op->exp.X_op = O_constant;
1025 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1026 x = op->exp.X_add_number;
1031 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1079 /* Redudant (yet) check. */
1080 else if (op->exp.X_op == O_register)
1082 (_("Registers cannot be used within immediate expression [%s]"), l);
1084 as_bad (_("unknown operand %s"), l);
1089 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1094 op->reg = 2; /* reg 2 in absolute addr mode. */
1095 op->am = 1; /* mode As == 01 bin. */
1096 op->ol = 1; /* Immediate value followed by instruction. */
1098 parse_exp (__tl, &(op->exp));
1100 if (op->exp.X_op == O_constant)
1102 int x = op->exp.X_add_number;
1104 if (x > 65535 || x < -32768)
1106 as_bad (_("value out of range: %d"), x);
1110 else if (op->exp.X_op == O_symbol)
1114 /* Redudant (yet) check. */
1115 if (op->exp.X_op == O_register)
1117 (_("Registers cannot be used within absolute expression [%s]"), l);
1119 as_bad (_("unknown expression in operand %s"), l);
1125 /* Check if indirect register mode @Rn / postincrement @Rn+. */
1129 char *m = strchr (l, '+');
1133 as_bad (_("unknown addressing mode %s"), l);
1138 if (*t != 'r' && *t != 'R')
1140 as_bad (_("unknown addressing mode %s"), l);
1144 t++; /* Points to the reg value. */
1148 as_bad (_("Bad register name r%s"), t);
1156 *m = 0; /* strip '+' */
1158 if (op->reg < 0 || op->reg > 15)
1160 as_bad (_("MSP430 does not have %d registers"), op->reg);
1167 /* Check if register indexed X(Rn). */
1170 char *h = strrchr (l, '(');
1171 char *m = strrchr (l, ')');
1180 as_bad (_("')' required"));
1187 /* Extract a register. */
1188 t++; /* Advance pointer. */
1190 if (*t != 'r' && *t != 'R')
1193 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1200 if (op->reg > 9 || op->reg < 0)
1202 as_bad (_("unknown operator (r%s substituded as a register name"),
1209 op->reg = op->reg * 10;
1210 op->reg += *t - '0';
1214 as_bad (_("unknown operator %s"), l);
1219 as_bad (_("r2 should not be used in indexed addressing mode"));
1223 if (*(t + 1) != ')')
1225 as_bad (_("unknown operator %s"), l);
1230 /* Extract constant. */
1234 parse_exp (__tl, &(op->exp));
1235 if (op->exp.X_op == O_constant)
1237 int x = op->exp.X_add_number;
1239 if (x > 65535 || x < -32768)
1241 as_bad (_("value out of range: %d"), x);
1253 else if (op->exp.X_op == O_symbol)
1257 /* Redudant (yet) check. */
1258 if (op->exp.X_op == O_register)
1260 (_("Registers cannot be used as a prefix of indexed expression [%s]"), l);
1262 as_bad (_("unknown expression in operand %s"), l);
1270 /* Register mode 'mov r1,r2'. */
1275 /* Operand should be a register. */
1276 if (*t == 'r' || *t == 'R')
1278 int x = atoi (t + 1);
1280 if (check_reg (t + 1))
1283 if (x < 0 || x > 15)
1284 break; /* Symbolic mode. */
1295 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1298 #if 0 /* Allow expression in operand like 'a+123*(1|2)'. */
1305 /* alpha/number underline dot for labels. */
1306 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1308 as_bad (_("unknown operand %s"), l);
1315 op->reg = 0; /* PC relative... be careful. */
1319 parse_exp (__tl, &(op->exp));
1325 as_bad (_("unknown addressing mode for operand %s"), l);
1331 msp430_dstoperand (struct msp430_operand_s * op, char * l, int bin)
1334 int ret = msp430_srcoperand (op, l, bin, & dummy);
1346 parse_exp (__tl, &(op->exp));
1348 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
1350 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
1360 ("this addressing mode is not applicable for destination operand"));
1367 /* Parse instruction operands.
1368 Return binary opcode. */
1371 msp430_operands (struct msp430_opcode_s * opcode, char * line)
1373 int bin = opcode->bin_opcode; /* Opcode mask. */
1375 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
1378 struct msp430_operand_s op1, op2;
1380 static short ZEROS = 0;
1381 int byte_op, imm_op;
1383 /* Opcode is the one from opcodes table
1384 line contains something like
1389 /* Check if byte or word operation. */
1390 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
1392 bin |= BYTE_OPERATION;
1399 while (! ISSPACE (*line) && *line)
1402 if (opcode->insn_opnumb && (!*line || *line == '\n'))
1404 as_bad (_("instruction %s requires %d operand(s)"),
1405 opcode->name, opcode->insn_opnumb);
1409 memset (l1, 0, sizeof (l1));
1410 memset (l2, 0, sizeof (l2));
1411 memset (&op1, 0, sizeof (op1));
1412 memset (&op2, 0, sizeof (op2));
1416 switch (opcode->fmt)
1418 case 0: /* Emulated. */
1419 switch (opcode->insn_opnumb)
1422 /* Set/clear bits instructions. */
1424 frag = frag_more (__is);
1425 bfd_putl16 ((bfd_vma) bin, frag);
1428 /* Something which works with destination operand. */
1429 line = extract_operand (line, l1, sizeof (l1));
1430 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
1434 bin |= (op1.reg | (op1.am << 7));
1436 frag = frag_more (2 * __is);
1437 where = frag - frag_now->fr_literal;
1438 bfd_putl16 ((bfd_vma) bin, frag);
1440 if (op1.mode == OP_EXP)
1443 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
1446 fix_new_exp (frag_now, where, 2,
1447 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
1449 fix_new_exp (frag_now, where, 2,
1450 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1456 /* Shift instruction. */
1457 line = extract_operand (line, l1, sizeof (l1));
1458 strncpy (l2, l1, sizeof (l2));
1459 l2[sizeof (l2) - 1] = '\0';
1460 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
1461 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
1464 break; /* An error occurred. All warnings were done before. */
1466 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
1468 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
1469 frag = frag_more (2 * __is);
1470 where = frag - frag_now->fr_literal;
1471 bfd_putl16 ((bfd_vma) bin, frag);
1473 if (op1.mode == OP_EXP)
1475 where += 2; /* Advance 'where' as we do not know _where_. */
1476 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
1478 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
1479 fix_new_exp (frag_now, where, 2,
1480 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
1482 fix_new_exp (frag_now, where, 2,
1483 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1486 if (op2.mode == OP_EXP)
1489 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
1491 if (op2.reg) /* Not PC relative. */
1492 fix_new_exp (frag_now, where + 2, 2,
1493 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
1495 fix_new_exp (frag_now, where + 2, 2,
1496 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1501 /* Branch instruction => mov dst, r0. */
1502 line = extract_operand (line, l1, sizeof (l1));
1504 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
1511 bin |= ((op1.reg << 8) | (op1.am << 4));
1513 frag = frag_more (2 * __is);
1514 where = frag - frag_now->fr_literal;
1515 bfd_putl16 ((bfd_vma) bin, frag);
1517 if (op1.mode == OP_EXP)
1520 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
1522 if (op1.reg || (op1.reg == 0 && op1.am == 3))
1523 fix_new_exp (frag_now, where, 2,
1524 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
1526 fix_new_exp (frag_now, where, 2,
1527 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1533 case 1: /* Format 1, double operand. */
1534 line = extract_operand (line, l1, sizeof (l1));
1535 line = extract_operand (line, l2, sizeof (l2));
1536 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
1537 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
1540 break; /* Error occurred. All warnings were done before. */
1542 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
1544 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
1545 frag = frag_more (2 * __is);
1546 where = frag - frag_now->fr_literal;
1547 bfd_putl16 ((bfd_vma) bin, frag);
1549 if (op1.mode == OP_EXP)
1551 where += 2; /* Advance where as we do not know _where_. */
1552 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
1554 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
1555 fix_new_exp (frag_now, where, 2,
1556 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
1558 fix_new_exp (frag_now, where, 2,
1559 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1562 if (op2.mode == OP_EXP)
1565 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
1567 if (op2.reg) /* Not PC relative. */
1568 fix_new_exp (frag_now, where + 2, 2,
1569 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
1571 fix_new_exp (frag_now, where + 2, 2,
1572 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1576 case 2: /* Single-operand mostly instr. */
1577 if (opcode->insn_opnumb == 0)
1579 /* reti instruction. */
1580 frag = frag_more (2);
1581 bfd_putl16 ((bfd_vma) bin, frag);
1585 line = extract_operand (line, l1, sizeof (l1));
1586 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
1588 break; /* Error in operand. */
1590 bin |= op1.reg | (op1.am << 4);
1592 frag = frag_more (2 * __is);
1593 where = frag - frag_now->fr_literal;
1594 bfd_putl16 ((bfd_vma) bin, frag);
1596 if (op1.mode == OP_EXP)
1598 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
1600 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
1601 fix_new_exp (frag_now, where + 2, 2,
1602 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
1604 fix_new_exp (frag_now, where + 2, 2,
1605 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
1609 case 3: /* Conditional jumps instructions. */
1610 line = extract_operand (line, l1, sizeof (l1));
1611 /* l1 is a label. */
1620 parse_exp (m, &exp);
1621 frag = frag_more (2); /* Instr size is 1 word. */
1623 /* In order to handle something like:
1627 jz 4 ; skip next 4 bytes
1630 nop ; will jump here if r5 positive or zero
1632 jCOND -n ;assumes jump n bytes backward:
1642 jCOND $n ; jump from PC in either direction. */
1644 if (exp.X_op == O_constant)
1646 int x = exp.X_add_number;
1650 as_warn (_("Even number required. Rounded to %d"), x + 1);
1654 if ((*l1 == '$' && x > 0) || x < 0)
1659 if (x > 512 || x < -511)
1661 as_bad (_("Wrong displacement %d"), x << 1);
1666 bfd_putl16 ((bfd_vma) bin, frag);
1668 else if (exp.X_op == O_symbol && *l1 != '$')
1670 where = frag - frag_now->fr_literal;
1671 fix_new_exp (frag_now, where, 2,
1672 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
1674 bfd_putl16 ((bfd_vma) bin, frag);
1676 else if (*l1 == '$')
1678 as_bad (_("instruction requires label sans '$'"));
1684 ("instruction requires label or value in range -511:512"));
1690 as_bad (_("instruction requires label"));
1695 case 4: /* Extended jumps. */
1696 line = extract_operand (line, l1, sizeof (l1));
1702 /* Ignore absolute addressing. make it PC relative anyway. */
1703 if (*m == '#' || *m == '$')
1706 parse_exp (m, & exp);
1707 if (exp.X_op == O_symbol)
1709 /* Relaxation required. */
1710 struct rcodes_s rc = msp430_rcodes[opcode->insn_opnumb];
1712 frag = frag_more (8);
1713 bfd_putl16 ((bfd_vma) rc.sop, frag);
1714 frag = frag_variant (rs_machine_dependent, 8, 2,
1715 ENCODE_RELAX (rc.lpos, STATE_BITS10), /* Wild guess. */
1717 0, /* Offset is zero if jump dist less than 1K. */
1723 as_bad (_("instruction requires label"));
1726 case 5: /* Emulated extended branches. */
1727 line = extract_operand (line, l1, sizeof (l1));
1733 /* Ignore absolute addressing. make it PC relative anyway. */
1734 if (*m == '#' || *m == '$')
1737 parse_exp (m, & exp);
1738 if (exp.X_op == O_symbol)
1740 /* Relaxation required. */
1741 struct hcodes_s hc = msp430_hcodes[opcode->insn_opnumb];
1743 frag = frag_more (8);
1744 bfd_putl16 ((bfd_vma) hc.op0, frag);
1745 bfd_putl16 ((bfd_vma) hc.op1, frag+2);
1746 frag = frag_variant (rs_machine_dependent, 8, 2,
1747 ENCODE_RELAX (STATE_EMUL_BRANCH, STATE_BITS10), /* Wild guess. */
1749 0, /* Offset is zero if jump dist less than 1K. */
1755 as_bad (_("instruction requires label"));
1759 as_bad (_("Ilegal instruction or not implmented opcode."));
1762 input_line_pointer = line;
1767 md_assemble (char * str)
1769 struct msp430_opcode_s * opcode;
1773 str = skip_space (str); /* Skip leading spaces. */
1774 str = extract_cmd (str, cmd, sizeof (cmd));
1776 while (cmd[i] && i < sizeof (cmd))
1778 char a = TOLOWER (cmd[i]);
1785 as_bad (_("can't find opcode "));
1789 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
1793 as_bad (_("unknown opcode `%s'"), cmd);
1798 char *__t = input_line_pointer;
1800 msp430_operands (opcode, str);
1801 input_line_pointer = __t;
1805 /* GAS will call this function for each section at the end of the assembly,
1806 to permit the CPU backend to adjust the alignment of a section. */
1809 md_section_align (asection * seg, valueT addr)
1811 int align = bfd_get_section_alignment (stdoutput, seg);
1813 return ((addr + (1 << align) - 1) & (-1 << align));
1816 /* If you define this macro, it should return the offset between the
1817 address of a PC relative fixup and the position from which the PC
1818 relative adjustment should be made. On many processors, the base
1819 of a PC relative instruction is the next instruction, so this
1820 macro would return the length of an instruction. */
1823 md_pcrel_from_section (fixS * fixp, segT sec)
1825 if (fixp->fx_addsy != (symbolS *) NULL
1826 && (!S_IS_DEFINED (fixp->fx_addsy)
1827 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1830 return fixp->fx_frag->fr_address + fixp->fx_where;
1833 /* GAS will call this for each fixup. It should store the correct
1834 value in the object file. */
1837 md_apply_fix3 (fixS * fixp, valueT * valuep, segT seg)
1839 unsigned char * where;
1843 if (fixp->fx_addsy == (symbolS *) NULL)
1848 else if (fixp->fx_pcrel)
1850 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1852 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1854 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1862 value = fixp->fx_offset;
1864 if (fixp->fx_subsy != (symbolS *) NULL)
1866 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1868 value -= S_GET_VALUE (fixp->fx_subsy);
1873 /* We don't actually support subtracting a symbol. */
1874 as_bad_where (fixp->fx_file, fixp->fx_line,
1875 _("expression too complex"));
1880 switch (fixp->fx_r_type)
1883 fixp->fx_no_overflow = 1;
1885 case BFD_RELOC_MSP430_10_PCREL:
1891 /* Fetch the instruction, insert the fully resolved operand
1892 value, and stuff the instruction back again. */
1894 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1896 insn = bfd_getl16 (where);
1898 switch (fixp->fx_r_type)
1900 case BFD_RELOC_MSP430_10_PCREL:
1902 as_bad_where (fixp->fx_file, fixp->fx_line,
1903 _("odd address operand: %ld"), value);
1905 /* Jumps are in words. */
1907 --value; /* Correct PC. */
1909 if (value < -512 || value > 511)
1910 as_bad_where (fixp->fx_file, fixp->fx_line,
1911 _("operand out of range: %ld"), value);
1913 value &= 0x3ff; /* get rid of extended sign */
1914 bfd_putl16 ((bfd_vma) (value | insn), where);
1917 case BFD_RELOC_MSP430_RL_PCREL:
1918 case BFD_RELOC_MSP430_16_PCREL:
1920 as_bad_where (fixp->fx_file, fixp->fx_line,
1921 _("odd address operand: %ld"), value);
1923 /* Nothing to be corrected here. */
1924 if (value < -32768 || value > 65536)
1925 as_bad_where (fixp->fx_file, fixp->fx_line,
1926 _("operand out of range: %ld"), value);
1928 value &= 0xffff; /* Get rid of extended sign. */
1929 bfd_putl16 ((bfd_vma) value, where);
1932 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1933 /* Nothing to be corrected here. */
1934 if (value < -32768 || value > 65536)
1935 as_bad_where (fixp->fx_file, fixp->fx_line,
1936 _("operand out of range: %ld"), value);
1938 value &= 0xffff; /* Get rid of extended sign. */
1939 bfd_putl16 ((bfd_vma) value, where);
1943 bfd_putl16 ((bfd_vma) value, where);
1946 case BFD_RELOC_MSP430_16:
1948 case BFD_RELOC_MSP430_16_BYTE:
1950 bfd_putl16 ((bfd_vma) value, where);
1954 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1955 fixp->fx_line, fixp->fx_r_type);
1961 fixp->fx_addnumber = value;
1965 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1966 will pass the resulting reloc to `bfd_install_relocation'. This
1967 currently works poorly, as `bfd_install_relocation' often does the
1968 wrong thing, and instances of `tc_gen_reloc' have been written to
1969 work around the problems, which in turns makes it difficult to fix
1970 `bfd_install_relocation'. */
1972 /* If while processing a fixup, a reloc really needs to be created
1973 then it is done here. */
1976 tc_gen_reloc (asection * seg ATTRIBUTE_UNUSED, fixS * fixp)
1980 reloc = xmalloc (sizeof (arelent));
1982 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1983 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1985 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1986 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1987 if (reloc->howto == (reloc_howto_type *) NULL)
1989 as_bad_where (fixp->fx_file, fixp->fx_line,
1990 _("reloc %d not supported by object file format"),
1991 (int) fixp->fx_r_type);
1995 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1996 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1997 reloc->address = fixp->fx_offset;
1999 reloc->addend = fixp->fx_offset;
2005 md_estimate_size_before_relax (fragS * fragP ATTRIBUTE_UNUSED,
2006 asection * segment_type ATTRIBUTE_UNUSED)
2008 if (fragP->fr_symbol && S_GET_SEGMENT (fragP->fr_symbol) == segment_type)
2010 /* This is a jump -> pcrel mode. Nothing to do much here.
2011 Return value == 2. */
2013 ENCODE_RELAX (RELAX_LEN (fragP->fr_subtype), STATE_BITS10);
2015 else if (fragP->fr_symbol)
2017 /* Its got a segment, but its not ours. Even if fr_symbol is in
2018 an absolute segment, we dont know a displacement until we link
2019 object files. So it will always be long. This also applies to
2020 labels in a subsegment of current. Liker may relax it to short
2021 jump later. Return value == 8. */
2023 ENCODE_RELAX (RELAX_LEN (fragP->fr_subtype), STATE_WORD);
2027 /* We know the abs value. may be it is a jump to fixed address.
2028 Impossible in our case, cause all constants already handeled. */
2030 ENCODE_RELAX (RELAX_LEN (fragP->fr_subtype), STATE_UNDEF);
2033 return md_relax_table[fragP->fr_subtype].rlx_length;
2037 md_convert_frag (bfd * abfd ATTRIBUTE_UNUSED,
2038 asection * sec ATTRIBUTE_UNUSED,
2044 struct rcodes_s * cc = NULL;
2045 struct hcodes_s * hc = NULL;
2047 switch (fragP->fr_subtype)
2049 case ENCODE_RELAX (STATE_UNCOND_BRANCH, STATE_BITS10):
2050 case ENCODE_RELAX (STATE_SIMPLE_BRANCH, STATE_BITS10):
2051 case ENCODE_RELAX (STATE_NOOV_BRANCH, STATE_BITS10):
2052 /* We do not have to convert anything here.
2053 Just apply a fix. */
2054 rela = BFD_RELOC_MSP430_10_PCREL;
2057 case ENCODE_RELAX (STATE_UNCOND_BRANCH, STATE_WORD):
2058 case ENCODE_RELAX (STATE_UNCOND_BRANCH, STATE_UNDEF):
2059 /* Convert uncond branch jmp lab -> br lab. */
2060 cc = & msp430_rcodes[7];
2061 where = fragP->fr_literal + fragP->fr_fix;
2062 bfd_putl16 (cc->lop0, where);
2063 rela = BFD_RELOC_MSP430_RL_PCREL;
2067 case ENCODE_RELAX (STATE_SIMPLE_BRANCH, STATE_WORD):
2068 case ENCODE_RELAX (STATE_SIMPLE_BRANCH, STATE_UNDEF):
2070 /* Other simple branches. */
2071 int insn = bfd_getl16 (fragP->fr_opcode);
2074 /* Find actual instruction. */
2075 for (i = 0; i < 7 && !cc; i++)
2076 if (msp430_rcodes[i].sop == insn)
2077 cc = & msp430_rcodes[i];
2078 if (!cc || !cc->name)
2079 as_fatal (_("internal inconsistency problem in %s: insn %04lx"),
2080 __FUNCTION__, (long) insn);
2081 where = fragP->fr_literal + fragP->fr_fix;
2082 bfd_putl16 (cc->lop0, where);
2083 bfd_putl16 (cc->lop1, where + 2);
2084 rela = BFD_RELOC_MSP430_RL_PCREL;
2089 case ENCODE_RELAX (STATE_NOOV_BRANCH, STATE_WORD):
2090 case ENCODE_RELAX (STATE_NOOV_BRANCH, STATE_UNDEF):
2091 cc = & msp430_rcodes[6];
2092 where = fragP->fr_literal + fragP->fr_fix;
2093 bfd_putl16 (cc->lop0, where);
2094 bfd_putl16 (cc->lop1, where + 2);
2095 bfd_putl16 (cc->lop2, where + 4);
2096 rela = BFD_RELOC_MSP430_RL_PCREL;
2100 case ENCODE_RELAX (STATE_EMUL_BRANCH, STATE_BITS10):
2102 int insn = bfd_getl16 (fragP->fr_opcode + 2);
2105 for (i = 0; i < 4 && !hc; i++)
2106 if (msp430_hcodes[i].op1 == insn)
2107 hc = &msp430_hcodes[i];
2108 if (!hc || !hc->name)
2109 as_fatal (_("internal inconsistency problem in %s: ext. insn %04lx"),
2110 __FUNCTION__, (long) insn);
2111 rela = BFD_RELOC_MSP430_10_PCREL;
2112 /* Apply a fix for a first label if necessary.
2113 another fix will be applied to the next word of insn anyway. */
2115 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
2116 fragP->fr_offset, TRUE, rela);
2122 case ENCODE_RELAX (STATE_EMUL_BRANCH, STATE_WORD):
2123 case ENCODE_RELAX (STATE_EMUL_BRANCH, STATE_UNDEF):
2125 int insn = bfd_getl16 (fragP->fr_opcode + 2);
2128 for (i = 0; i < 4 && !hc; i++)
2129 if (msp430_hcodes[i].op1 == insn)
2130 hc = & msp430_hcodes[i];
2131 if (!hc || !hc->name)
2132 as_fatal (_("internal inconsistency problem in %s: ext. insn %04lx"),
2133 __FUNCTION__, (long) insn);
2134 rela = BFD_RELOC_MSP430_RL_PCREL;
2135 where = fragP->fr_literal + fragP->fr_fix;
2136 bfd_putl16 (hc->lop0, where);
2137 bfd_putl16 (hc->lop1, where + 2);
2138 bfd_putl16 (hc->lop2, where + 4);
2144 as_fatal (_("internal inconsistency problem in %s: %lx"),
2145 __FUNCTION__, (long) fragP->fr_subtype);
2149 /* Now apply fix. */
2150 fix_new (fragP, fragP->fr_fix, 2, fragP->fr_symbol,
2151 fragP->fr_offset, TRUE, rela);
2152 /* Just fixed 2 bytes. */
2156 /* Relax fragment. Mostly stolen from hc11 and mcore
2157 which arches I think I know. */
2160 msp430_relax_frag (segT seg ATTRIBUTE_UNUSED, fragS * fragP,
2161 long stretch ATTRIBUTE_UNUSED)
2166 const relax_typeS *this_type;
2167 const relax_typeS *start_type;
2168 relax_substateT next_state;
2169 relax_substateT this_state;
2170 const relax_typeS *table = md_relax_table;
2172 /* Nothing to be done if the frag has already max size. */
2173 if (RELAX_STATE (fragP->fr_subtype) == STATE_UNDEF
2174 || RELAX_STATE (fragP->fr_subtype) == STATE_WORD)
2177 if (RELAX_STATE (fragP->fr_subtype) == STATE_BITS10)
2179 symbolP = fragP->fr_symbol;
2180 if (symbol_resolved_p (symbolP))
2181 as_fatal (_("internal inconsistency problem in %s: resolved symbol"),
2183 /* We know the offset. calculate a distance. */
2184 aim = S_GET_VALUE (symbolP) - fragP->fr_address - fragP->fr_fix;
2187 this_state = fragP->fr_subtype;
2188 start_type = this_type = table + this_state;
2192 /* Look backwards. */
2193 for (next_state = this_type->rlx_more; next_state;)
2194 if (aim >= this_type->rlx_backward)
2198 /* Grow to next state. */
2199 this_state = next_state;
2200 this_type = table + this_state;
2201 next_state = this_type->rlx_more;
2206 /* Look forwards. */
2207 for (next_state = this_type->rlx_more; next_state;)
2208 if (aim <= this_type->rlx_forward)
2212 /* Grow to next state. */
2213 this_state = next_state;
2214 this_type = table + this_state;
2215 next_state = this_type->rlx_more;
2219 growth = this_type->rlx_length - start_type->rlx_length;
2221 fragP->fr_subtype = this_state;