1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
3 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
28 #define PUSH_1X_WORKAROUND
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
34 const char comment_chars[] = ";";
35 const char line_comment_chars[] = "#";
36 const char line_separator_chars[] = "";
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dD";
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum[];
43 static struct hash_control *msp430_hash;
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS *));
53 static inline char *skip_space
57 static void msp430_set_arch
59 static void show_mcu_list
61 static void del_spaces
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_12 12
75 #define MSP430_ISA_13 13
76 #define MSP430_ISA_14 14
77 #define MSP430_ISA_41 41
78 #define MSP430_ISA_31 31
79 #define MSP430_ISA_32 32
80 #define MSP430_ISA_33 33
81 #define MSP430_ISA_110 110
82 #define MSP430_ISA_43 43
83 #define MSP430_ISA_44 44
84 #define MSP430_ISA_15 15
85 #define MSP430_ISA_16 16
87 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
88 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
90 static struct mcu_type_s mcu_types[] =
92 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
93 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
94 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
95 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
97 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
98 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
99 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
100 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
101 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
102 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
103 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
104 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
105 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
106 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
107 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
108 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
109 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
110 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
111 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
112 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
113 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
114 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
115 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
116 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
117 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
118 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
119 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
120 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
121 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
122 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
123 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
124 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
125 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
126 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
127 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
128 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
129 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
130 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
131 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
132 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
133 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
134 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
135 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
141 static struct mcu_type_s default_mcu =
142 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
144 static struct mcu_type_s *msp430_mcu = &default_mcu;
146 const pseudo_typeS md_pseudo_table[] =
148 {"arch", msp430_set_arch, 0},
152 #define OPTION_MMCU 'm'
154 const char *md_shortopts = "m:";
156 struct option md_longopts[] =
158 {"mmcu", required_argument, NULL, OPTION_MMCU},
159 {NULL, no_argument, NULL, 0}
162 size_t md_longopts_size = sizeof (md_longopts);
165 show_mcu_list (stream)
170 fprintf (stream, _("Known MCU names:\n"));
172 for (i = 0; mcu_types[i].name; i++)
173 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
175 fprintf (stream, "\n");
179 md_show_usage (stream)
183 _("MSP430 options:\n"
184 " -mmcu=[msp430-name] select microcontroller type\n"
185 " msp430x110 msp430x112\n"
186 " msp430x1101 msp430x1111\n"
187 " msp430x1121 msp430x1122 msp430x1132\n"
188 " msp430x122 msp430x123\n"
189 " msp430x1331 msp430x1351\n"
190 " msp430x147 msp430x148 msp430x149\n"
191 " msp430x155 msp430x156 msp430x157\n"
192 " msp430x167 msp430x168 msp430x169\n"
193 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
194 " msp430x323 msp430x325\n"
195 " msp430x336 msp430x337\n"
196 " msp430x412 msp430x413\n"
197 " msp430x435 msp430x436 msp430x437\n"
198 " msp430x447 msp430x448 msp430x449\n"));
200 show_mcu_list (stream);
204 extract_word (char *from, char *to, int limit)
210 /* Drop leading whitespace. */
211 from = skip_space (from);
214 /* Find the op code end. */
215 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
217 to[size++] = *op_end++;
218 if (size + 1 >= limit)
227 msp430_set_arch (dummy)
228 int dummy ATTRIBUTE_UNUSED;
230 char *str = (char *) alloca (32); /* 32 for good measure. */
232 input_line_pointer = extract_word (input_line_pointer, str, 32);
234 md_parse_option (OPTION_MMCU, str);
235 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
239 md_parse_option (c, arg)
248 for (i = 0; mcu_types[i].name; ++i)
249 if (strcmp (mcu_types[i].name, arg) == 0)
252 if (!mcu_types[i].name)
254 show_mcu_list (stderr);
255 as_fatal (_("unknown MCU: %s\n"), arg);
258 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
259 msp430_mcu = &mcu_types[i];
261 as_fatal (_("redefinition of mcu type %s' to %s'"),
262 msp430_mcu->name, mcu_types[i].name);
270 md_undefined_symbol (name)
271 char *name ATTRIBUTE_UNUSED;
285 /* Delete spaces from s: X ( r 1 2) => X(r12). */
297 while (ISSPACE (*m) && *m)
299 memmove (s, m, strlen (m) + 1);
306 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
309 extract_operand (char *from, char *to, int limit)
313 /* Drop leading whitespace. */
314 from = skip_space (from);
316 while (size < limit && *from)
318 *(to + size) = *from;
319 if (*from == ',' || *from == ';' || *from == '\n')
334 extract_cmd (char *from, char *to, int limit)
338 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
340 *(to + size) = *from;
350 /* Turn a string in input_line_pointer into a floating point constant
351 of type TYPE, and store the appropriate bytes in *LITP. The number
352 of LITTLENUMS emitted is stored in *SIZEP. An error message is
353 returned, or NULL on OK. */
356 md_atof (type, litP, sizeP)
362 LITTLENUM_TYPE words[4];
363 LITTLENUM_TYPE *wordP;
376 return _("bad call to md_atof");
379 t = atof_ieee (input_line_pointer, type, words);
381 input_line_pointer = t;
383 *sizeP = prec * sizeof (LITTLENUM_TYPE);
385 /* This loop outputs the LITTLENUMs in REVERSE order. */
386 for (wordP = words + prec - 1; prec--;)
388 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
389 litP += sizeof (LITTLENUM_TYPE);
396 md_convert_frag (abfd, sec, fragP)
397 bfd *abfd ATTRIBUTE_UNUSED;
398 asection *sec ATTRIBUTE_UNUSED;
399 fragS *fragP ATTRIBUTE_UNUSED;
407 struct msp430_opcode_s *opcode;
408 msp430_hash = hash_new ();
410 for (opcode = msp430_opcodes; opcode->name; opcode++)
411 hash_insert (msp430_hash, opcode->name, (char *) opcode);
413 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
420 struct msp430_opcode_s *opcode;
424 str = skip_space (str); /* Skip leading spaces. */
425 str = extract_cmd (str, cmd, sizeof (cmd));
427 while (cmd[i] && i < sizeof (cmd))
429 char a = TOLOWER (cmd[i]);
436 as_bad (_("can't find opcode "));
440 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
444 as_bad (_("unknown opcode `%s'"), cmd);
449 char *__t = input_line_pointer;
450 msp430_operands (opcode, str);
451 input_line_pointer = __t;
455 /* Parse instruction operands.
456 Return binary opcode. */
459 msp430_operands (opcode, line)
460 struct msp430_opcode_s *opcode;
463 int bin = opcode->bin_opcode; /* opcode mask. */
465 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
468 struct msp430_operand_s op1, op2;
470 static short ZEROS = 0;
473 /* opcode is the one from opcodes table
474 line contains something like
479 /* Check if byte or word operation. */
480 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
482 bin |= BYTE_OPERATION;
489 while (! ISSPACE (*line) && *line)
492 if (opcode->insn_opnumb && (!*line || *line == '\n'))
494 as_bad (_("instruction %s requires %d operand(s)"),
495 opcode->name, opcode->insn_opnumb);
499 memset (l1, 0, sizeof (l1));
500 memset (l2, 0, sizeof (l2));
501 memset (&op1, 0, sizeof (op1));
502 memset (&op2, 0, sizeof (op2));
508 case 0: /* Emulated. */
509 switch (opcode->insn_opnumb)
512 /* Set/clear bits instructions. */
514 frag = frag_more (__is);
515 bfd_putl16 ((bfd_vma) bin, frag);
518 /* Something which works with destination operand. */
519 line = extract_operand (line, l1, sizeof (l1));
520 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
524 bin |= (op1.reg | (op1.am << 7));
526 frag = frag_more (2 * __is);
527 where = frag - frag_now->fr_literal;
528 bfd_putl16 ((bfd_vma) bin, frag);
530 if (op1.mode == OP_EXP)
533 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
536 fix_new_exp (frag_now, where, 2,
537 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
539 fix_new_exp (frag_now, where, 2,
540 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
548 /* Shift instruction. */
549 line = extract_operand (line, l1, sizeof (l1));
550 strncpy (l2, l1, 16);
551 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
552 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
555 break; /* An error occured. All warnings were done before. */
557 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
559 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
560 frag = frag_more (2 * __is);
561 where = frag - frag_now->fr_literal;
562 bfd_putl16 ((bfd_vma) bin, frag);
564 if (op1.mode == OP_EXP)
566 where += 2; /* Advance 'where' as we do not know _where_. */
567 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
569 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
570 fix_new_exp (frag_now, where, 2,
571 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
573 fix_new_exp (frag_now, where, 2,
574 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
577 if (op2.mode == OP_EXP)
580 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
582 if (op2.reg) /* Not PC relative. */
583 fix_new_exp (frag_now, where + 2, 2,
584 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
586 fix_new_exp (frag_now, where + 2, 2,
587 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
592 /* Branch instruction => mov dst, r0. */
593 line = extract_operand (line, l1, sizeof (l1));
595 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
602 bin |= ((op1.reg << 8) | (op1.am << 4));
604 frag = frag_more (2 * __is);
605 where = frag - frag_now->fr_literal;
606 bfd_putl16 ((bfd_vma) bin, frag);
608 if (op1.mode == OP_EXP)
611 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
613 if (op1.reg || (op1.reg == 0 && op1.am == 3))
614 fix_new_exp (frag_now, where, 2,
615 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
617 fix_new_exp (frag_now, where, 2,
618 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
624 case 1: /* Format 1, double operand. */
625 line = extract_operand (line, l1, sizeof (l1));
626 line = extract_operand (line, l2, sizeof (l2));
627 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
628 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
631 break; /* Error occured. All warnings were done before. */
633 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
635 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
636 frag = frag_more (2 * __is);
637 where = frag - frag_now->fr_literal;
638 bfd_putl16 ((bfd_vma) bin, frag);
640 if (op1.mode == OP_EXP)
642 where += 2; /* Advance where as we do not know _where_. */
643 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
645 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
646 fix_new_exp (frag_now, where, 2,
647 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
649 fix_new_exp (frag_now, where, 2,
650 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
653 if (op2.mode == OP_EXP)
656 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
658 if (op2.reg) /* Not PC relative. */
659 fix_new_exp (frag_now, where + 2, 2,
660 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
662 fix_new_exp (frag_now, where + 2, 2,
663 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
667 case 2: /* Single-operand mostly instr. */
668 if (opcode->insn_opnumb == 0)
670 /* reti instruction. */
671 frag = frag_more (2);
672 bfd_putl16 ((bfd_vma) bin, frag);
676 line = extract_operand (line, l1, sizeof (l1));
677 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
679 break; /* Error in operand. */
681 bin |= op1.reg | (op1.am << 4);
683 frag = frag_more (2 * __is);
684 where = frag - frag_now->fr_literal;
685 bfd_putl16 ((bfd_vma) bin, frag);
687 if (op1.mode == OP_EXP)
689 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
691 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
692 fix_new_exp (frag_now, where + 2, 2,
693 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
695 fix_new_exp (frag_now, where + 2, 2,
696 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
700 case 3: /* Conditional jumps instructions. */
701 line = extract_operand (line, l1, sizeof (l1));
712 frag = frag_more (2); /* Instr size is 1 word. */
714 /* In order to handle something like:
718 jz 4 ; skip next 4 bytes
721 nop ; will jump here if r5 positive or zero
723 jCOND -n ;assumes jump n bytes backward:
733 jCOND $n ; jump from PC in either direction. */
735 if (exp.X_op == O_constant)
737 int x = exp.X_add_number;
741 as_warn (_("Even number required. Rounded to %d"), x + 1);
745 if ((*l1 == '$' && x > 0) || x < 0)
750 if (x > 512 || x < -511)
752 as_bad (_("Wrong displacement %d"), x << 1);
757 bfd_putl16 ((bfd_vma) bin, frag);
759 else if (exp.X_op == O_symbol && *l1 != '$')
761 where = frag - frag_now->fr_literal;
762 fix_new_exp (frag_now, where, 2,
763 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
765 bfd_putl16 ((bfd_vma) bin, frag);
769 as_bad (_("instruction requires label sans '$'"));
775 ("instruction requires label or value in range -511:512"));
781 as_bad (_("instruction requires label"));
787 as_bad (_("Ilegal instruction or not implmented opcode."));
790 input_line_pointer = line;
795 msp430_dstoperand (op, l, bin)
796 struct msp430_operand_s *op;
801 int ret = msp430_srcoperand (op, l, bin, &dummy);
812 parse_exp (__tl, &(op->exp));
813 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
815 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
825 ("this addressing mode is not applicable for destination operand"));
836 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
838 if (strlen (t) > 2 && *(t + 2) != '+')
843 if ((*t < '0' || *t > '9') && *t != '+')
856 msp430_srcoperand (op, l, bin, imm_op)
857 struct msp430_operand_s *op;
864 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
871 /* Check if there is:
872 llo(x) - least significant 16 bits, x &= 0xffff
873 lhi(x) - x = (x >> 16) & 0xffff,
874 hlo(x) - x = (x >> 32) & 0xffff,
875 hhi(x) - x = (x >> 48) & 0xffff
876 The value _MUST_ be constant expression: #hlo(1231231231). */
880 if (strncasecmp (h, "#llo(", 5) == 0)
885 else if (strncasecmp (h, "#lhi(", 5) == 0)
890 else if (strncasecmp (h, "#hlo(", 5) == 0)
895 else if (strncasecmp (h, "#hhi(", 5) == 0)
900 else if (strncasecmp (h, "#lo(", 4) == 0)
905 else if (strncasecmp (h, "#hi(", 4) == 0)
911 op->reg = 0; /* Reg PC. */
913 op->ol = 1; /* Immediate will follow an instruction. */
916 parse_exp (__tl, &(op->exp));
917 if (op->exp.X_op == O_constant)
919 int x = op->exp.X_add_number;
924 op->exp.X_add_number = x;
926 else if (vshift == 1)
928 x = (x >> 16) & 0xffff;
929 op->exp.X_add_number = x;
934 op->exp.X_add_number = -1;
936 op->exp.X_add_number = 0; /* Nothing left. */
937 x = op->exp.X_add_number;
940 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
942 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
946 /* Now check constants. */
947 /* Substitude register mode with a constant generator if applicable. */
949 x = (short) x; /* Extend sign. */
981 #ifdef PUSH_1X_WORKAROUND
983 && (msp430_mcu->isa == MSP430_ISA_11
984 || msp430_mcu->isa == MSP430_ISA_12
985 || msp430_mcu->isa == MSP430_ISA_13
986 || msp430_mcu->isa == MSP430_ISA_14))
988 /* Remove warning as confusing.
989 as_warn(_("Hardware push bug workaround")); */
1002 #ifdef PUSH_1X_WORKAROUND
1004 && (msp430_mcu->isa == MSP430_ISA_11
1005 || msp430_mcu->isa == MSP430_ISA_12
1006 || msp430_mcu->isa == MSP430_ISA_13
1007 || msp430_mcu->isa == MSP430_ISA_14))
1009 /* Remove warning as confusing.
1010 as_warn(_("Hardware push bug workaround")); */
1022 else if (op->exp.X_op == O_symbol)
1026 else if (op->exp.X_op == O_big)
1031 op->exp.X_op = O_constant;
1032 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1033 x = op->exp.X_add_number;
1038 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1088 as_bad (_("unknown operand %s"), l);
1093 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1098 op->reg = 2; /* reg 2 in absolute addr mode. */
1099 op->am = 1; /* mode As == 01 bin. */
1100 op->ol = 1; /* Immediate value followed by instruction. */
1102 parse_exp (__tl, &(op->exp));
1104 if (op->exp.X_op == O_constant)
1106 int x = op->exp.X_add_number;
1107 if (x > 65535 || x < -32768)
1109 as_bad (_("value out of range: %d"), x);
1113 else if (op->exp.X_op == O_symbol)
1118 as_bad (_("unknown expression in operand %s"), l);
1124 /* Check if inderect register mode @Rn / postincrement @Rn+. */
1128 char *m = strchr (l, '+');
1132 as_bad (_("unknown addressing mode %s"), l);
1137 if (*t != 'r' && *t != 'R')
1139 as_bad (_("unknown addressing mode %s"), l);
1143 t++; /* Points to the reg value. */
1147 as_bad (_("Bad register name r%s"), t);
1155 *m = 0; /* strip '+' */
1157 if (op->reg < 0 || op->reg > 15)
1159 as_bad (_("MSP430 does not have %d registers"), op->reg);
1166 /* Check if register indexed X(Rn). */
1169 char *h = strrchr (l, '(');
1170 char *m = strrchr (l, ')');
1179 as_bad (_("')' required"));
1186 /* Extract a register. */
1187 t++; /* Advance pointer. */
1189 if (*t != 'r' && *t != 'R')
1192 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1199 if (op->reg > 9 || op->reg < 0)
1201 as_bad (_("unknown operator (r%s substituded as a register name"),
1208 op->reg = op->reg * 10;
1209 op->reg += *t - '0';
1213 as_bad (_("unknown operator %s"), l);
1218 as_bad (_("r2 should not be used in indexed addressing mode"));
1222 if (*(t + 1) != ')')
1224 as_bad (_("unknown operator %s"), l);
1229 /* Extract constant. */
1233 parse_exp (__tl, &(op->exp));
1234 if (op->exp.X_op == O_constant)
1236 int x = op->exp.X_add_number;
1238 if (x > 65535 || x < -32768)
1240 as_bad (_("value out of range: %d"), x);
1252 else if (op->exp.X_op == O_symbol)
1257 as_bad (_("unknown expression in operand %s"), l);
1265 /* Register mode 'mov r1,r2'. */
1270 /* Operand should be a register. */
1271 if (*t == 'r' || *t == 'R')
1273 int x = atoi (t + 1);
1275 if (check_reg (t + 1))
1278 if (x < 0 || x > 15)
1279 break; /* Symbolic mode. */
1290 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1299 /* alpha/number underline dot for labels. */
1300 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1302 as_bad (_("unknown operand %s"), l);
1309 op->reg = 0; /* PC relative... be careful. */
1313 parse_exp (__tl, &(op->exp));
1319 as_bad (_("unknown addressing mode for operand %s"), l);
1324 /* GAS will call this function for each section at the end of the assembly,
1325 to permit the CPU backend to adjust the alignment of a section. */
1328 md_section_align (seg, addr)
1332 int align = bfd_get_section_alignment (stdoutput, seg);
1334 return ((addr + (1 << align) - 1) & (-1 << align));
1337 /* If you define this macro, it should return the offset between the
1338 address of a PC relative fixup and the position from which the PC
1339 relative adjustment should be made. On many processors, the base
1340 of a PC relative instruction is the next instruction, so this
1341 macro would return the length of an instruction. */
1344 md_pcrel_from_section (fixp, sec)
1348 if (fixp->fx_addsy != (symbolS *) NULL
1349 && (!S_IS_DEFINED (fixp->fx_addsy)
1350 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1353 return fixp->fx_frag->fr_address + fixp->fx_where;
1356 /* GAS will call this for each fixup. It should store the correct
1357 value in the object file. */
1360 md_apply_fix3 (fixp, valuep, seg)
1365 unsigned char *where;
1369 if (fixp->fx_addsy == (symbolS *) NULL)
1374 else if (fixp->fx_pcrel)
1376 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1378 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1380 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1388 value = fixp->fx_offset;
1390 if (fixp->fx_subsy != (symbolS *) NULL)
1392 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1394 value -= S_GET_VALUE (fixp->fx_subsy);
1399 /* We don't actually support subtracting a symbol. */
1400 as_bad_where (fixp->fx_file, fixp->fx_line,
1401 _("expression too complex"));
1406 switch (fixp->fx_r_type)
1409 fixp->fx_no_overflow = 1;
1411 case BFD_RELOC_MSP430_10_PCREL:
1417 /* Fetch the instruction, insert the fully resolved operand
1418 value, and stuff the instruction back again. */
1420 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1422 insn = bfd_getl16 (where);
1424 switch (fixp->fx_r_type)
1426 case BFD_RELOC_MSP430_10_PCREL:
1428 as_bad_where (fixp->fx_file, fixp->fx_line,
1429 _("odd address operand: %ld"), value);
1431 /* Jumps are in words. */
1433 --value; /* Correct PC. */
1435 if (value < -512 || value > 511)
1436 as_bad_where (fixp->fx_file, fixp->fx_line,
1437 _("operand out of range: %ld"), value);
1439 value &= 0x3ff; /* get rid of extended sign */
1440 bfd_putl16 ((bfd_vma) (value | insn), where);
1443 case BFD_RELOC_MSP430_16_PCREL:
1445 as_bad_where (fixp->fx_file, fixp->fx_line,
1446 _("odd address operand: %ld"), value);
1448 /* Nothing to be corrected here. */
1449 if (value < -32768 || value > 65536)
1450 as_bad_where (fixp->fx_file, fixp->fx_line,
1451 _("operand out of range: %ld"), value);
1453 value &= 0xffff; /* Get rid of extended sign. */
1454 bfd_putl16 ((bfd_vma) value, where);
1457 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1458 /* Nothing to be corrected here. */
1459 if (value < -32768 || value > 65536)
1460 as_bad_where (fixp->fx_file, fixp->fx_line,
1461 _("operand out of range: %ld"), value);
1463 value &= 0xffff; /* Get rid of extended sign. */
1464 bfd_putl16 ((bfd_vma) value, where);
1468 bfd_putl16 ((bfd_vma) value, where);
1471 case BFD_RELOC_MSP430_16:
1473 case BFD_RELOC_MSP430_16_BYTE:
1475 bfd_putl16 ((bfd_vma) value, where);
1479 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1480 fixp->fx_line, fixp->fx_r_type);
1486 fixp->fx_addnumber = value;
1491 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1492 will pass the resulting reloc to `bfd_install_relocation'. This
1493 currently works poorly, as `bfd_install_relocation' often does the
1494 wrong thing, and instances of `tc_gen_reloc' have been written to
1495 work around the problems, which in turns makes it difficult to fix
1496 `bfd_install_relocation'. */
1498 /* If while processing a fixup, a reloc really needs to be created
1499 then it is done here. */
1502 tc_gen_reloc (seg, fixp)
1503 asection *seg ATTRIBUTE_UNUSED;
1508 reloc = (arelent *) xmalloc (sizeof (arelent));
1510 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1511 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1513 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1514 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1515 if (reloc->howto == (reloc_howto_type *) NULL)
1517 as_bad_where (fixp->fx_file, fixp->fx_line,
1518 _("reloc %d not supported by object file format"),
1519 (int) fixp->fx_r_type);
1523 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1524 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1525 reloc->address = fixp->fx_offset;
1527 reloc->addend = fixp->fx_offset;
1532 /* Parse ordinary expression. */
1539 input_line_pointer = s;
1541 if (op->X_op == O_absent)
1542 as_bad (_("missing operand"));
1543 return input_line_pointer;
1548 md_estimate_size_before_relax (fragp, seg)
1549 fragS *fragp ATTRIBUTE_UNUSED;
1550 asection *seg ATTRIBUTE_UNUSED;