1 /* tc-msp430.c -- Assembler code for the Texas Instruments MSP430
3 Copyright (C) 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Dmitry Diky <diwil@mail.ru>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
28 #define PUSH_1X_WORKAROUND
31 #include "opcode/msp430.h"
32 #include "safe-ctype.h"
34 const char comment_chars[] = ";";
35 const char line_comment_chars[] = "#";
36 const char line_separator_chars[] = "";
37 const char EXP_CHARS[] = "eE";
38 const char FLT_CHARS[] = "dD";
40 /* Handle long expressions. */
41 extern LITTLENUM_TYPE generic_bignum[];
43 static struct hash_control *msp430_hash;
45 static unsigned int msp430_operands
46 PARAMS ((struct msp430_opcode_s *, char *));
47 static int msp430_srcoperand
48 PARAMS ((struct msp430_operand_s *, char *, int, int *));
49 static int msp430_dstoperand
50 PARAMS ((struct msp430_operand_s *, char *, int));
51 static char *parse_exp
52 PARAMS ((char *, expressionS *));
53 static inline char *skip_space
57 static void msp430_set_arch
59 static void show_mcu_list
61 static void del_spaces
73 #define MSP430_ISA_11 11
74 #define MSP430_ISA_12 12
75 #define MSP430_ISA_13 13
76 #define MSP430_ISA_14 14
77 #define MSP430_ISA_41 41
78 #define MSP430_ISA_31 31
79 #define MSP430_ISA_32 32
80 #define MSP430_ISA_33 33
81 #define MSP430_ISA_110 110
82 #define MSP430_ISA_43 43
83 #define MSP430_ISA_44 44
84 #define MSP430_ISA_15 15
85 #define MSP430_ISA_16 16
87 #define CHECK_RELOC_MSP430 ((imm_op || byte_op)?BFD_RELOC_MSP430_16_BYTE:BFD_RELOC_MSP430_16)
88 #define CHECK_RELOC_MSP430_PCREL ((imm_op || byte_op)?BFD_RELOC_MSP430_16_PCREL_BYTE:BFD_RELOC_MSP430_16_PCREL)
90 static struct mcu_type_s mcu_types[] =
92 {"msp1", MSP430_ISA_11, bfd_mach_msp11},
93 {"msp2", MSP430_ISA_14, bfd_mach_msp14},
94 {"msp430x110", MSP430_ISA_11, bfd_mach_msp11},
95 {"msp430x112", MSP430_ISA_11, bfd_mach_msp11},
96 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
97 {"msp430x122", MSP430_ISA_12, bfd_mach_msp12},
98 {"msp430x1222",MSP430_ISA_12, bfd_mach_msp12},
99 {"msp430x1122",MSP430_ISA_11, bfd_mach_msp110},
100 {"msp430x1132",MSP430_ISA_11, bfd_mach_msp110},
101 {"msp430x123", MSP430_ISA_12, bfd_mach_msp12},
102 {"msp430x1232",MSP430_ISA_12, bfd_mach_msp12},
103 {"msp430x133", MSP430_ISA_13, bfd_mach_msp13},
104 {"msp430x135", MSP430_ISA_13, bfd_mach_msp13},
105 {"msp430x147", MSP430_ISA_14, bfd_mach_msp14},
106 {"msp430x148", MSP430_ISA_14, bfd_mach_msp14},
107 {"msp430x149", MSP430_ISA_14, bfd_mach_msp14},
108 {"msp430x412", MSP430_ISA_41, bfd_mach_msp41},
109 {"msp430x413", MSP430_ISA_41, bfd_mach_msp41},
110 {"msp430x311", MSP430_ISA_31, bfd_mach_msp31},
111 {"msp430x312", MSP430_ISA_31, bfd_mach_msp31},
112 {"msp430x313", MSP430_ISA_31, bfd_mach_msp31},
113 {"msp430x314", MSP430_ISA_31, bfd_mach_msp31},
114 {"msp430x315", MSP430_ISA_31, bfd_mach_msp31},
115 {"msp430x323", MSP430_ISA_32, bfd_mach_msp32},
116 {"msp430x325", MSP430_ISA_32, bfd_mach_msp32},
117 {"msp430x336", MSP430_ISA_33, bfd_mach_msp33},
118 {"msp430x337", MSP430_ISA_33, bfd_mach_msp33},
119 {"msp430x1101",MSP430_ISA_110, bfd_mach_msp110},
120 {"msp430x1111",MSP430_ISA_110, bfd_mach_msp110},
121 {"msp430x1121",MSP430_ISA_110, bfd_mach_msp110},
122 {"msp430x1331",MSP430_ISA_13, bfd_mach_msp13},
123 {"msp430x1351",MSP430_ISA_13, bfd_mach_msp13},
124 {"msp430x435", MSP430_ISA_43, bfd_mach_msp43},
125 {"msp430x436", MSP430_ISA_43, bfd_mach_msp43},
126 {"msp430x437", MSP430_ISA_43, bfd_mach_msp43},
127 {"msp430x447", MSP430_ISA_44, bfd_mach_msp44},
128 {"msp430x448", MSP430_ISA_44, bfd_mach_msp44},
129 {"msp430x449", MSP430_ISA_44, bfd_mach_msp44},
130 {"msp430x167", MSP430_ISA_16, bfd_mach_msp16},
131 {"msp430x168", MSP430_ISA_16, bfd_mach_msp16},
132 {"msp430x169", MSP430_ISA_16, bfd_mach_msp16},
133 {"msp430x155", MSP430_ISA_15, bfd_mach_msp15},
134 {"msp430x156", MSP430_ISA_15, bfd_mach_msp15},
135 {"msp430x157", MSP430_ISA_15, bfd_mach_msp15},
141 static struct mcu_type_s default_mcu =
142 { "msp430x11", MSP430_ISA_11, bfd_mach_msp11 };
144 static struct mcu_type_s *msp430_mcu = &default_mcu;
146 const pseudo_typeS md_pseudo_table[] =
148 {"arch", msp430_set_arch, 0},
152 #define OPTION_MMCU 'm'
154 const char *md_shortopts = "m:";
156 struct option md_longopts[] =
158 {"mmcu", required_argument, NULL, OPTION_MMCU},
159 {NULL, no_argument, NULL, 0}
162 size_t md_longopts_size = sizeof (md_longopts);
165 show_mcu_list (stream)
170 fprintf (stream, _("Known MCU names:\n"));
172 for (i = 0; mcu_types[i].name; i++)
173 fprintf (stream, _("\t %s\n"), mcu_types[i].name);
175 fprintf (stream, "\n");
179 md_show_usage (stream)
183 _("MSP430 options:\n"
184 " -mmcu=[msp430-name] select microcontroller type\n"
185 " msp430x110 msp430x112\n"
186 " msp430x1101 msp430x1111\n"
187 " msp430x1121 msp430x1122 msp430x1132\n"
188 " msp430x122 msp430x123\n"
189 " msp430x1222 msp430x1232\n"
190 " msp430x133 msp430x135\n"
191 " msp430x1331 msp430x1351\n"
192 " msp430x147 msp430x148 msp430x149\n"
193 " msp430x155 msp430x156 msp430x157\n"
194 " msp430x167 msp430x168 msp430x169\n"
195 " msp430x311 msp430x312 msp430x313 msp430x314 msp430x315\n"
196 " msp430x323 msp430x325\n"
197 " msp430x336 msp430x337\n"
198 " msp430x412 msp430x413\n"
199 " msp430x435 msp430x436 msp430x437\n"
200 " msp430x447 msp430x448 msp430x449\n"));
202 show_mcu_list (stream);
206 extract_word (char *from, char *to, int limit)
212 /* Drop leading whitespace. */
213 from = skip_space (from);
216 /* Find the op code end. */
217 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
219 to[size++] = *op_end++;
220 if (size + 1 >= limit)
229 msp430_set_arch (dummy)
230 int dummy ATTRIBUTE_UNUSED;
232 char *str = (char *) alloca (32); /* 32 for good measure. */
234 input_line_pointer = extract_word (input_line_pointer, str, 32);
236 md_parse_option (OPTION_MMCU, str);
237 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
241 md_parse_option (c, arg)
250 for (i = 0; mcu_types[i].name; ++i)
251 if (strcmp (mcu_types[i].name, arg) == 0)
254 if (!mcu_types[i].name)
256 show_mcu_list (stderr);
257 as_fatal (_("unknown MCU: %s\n"), arg);
260 if (msp430_mcu == &default_mcu || msp430_mcu->mach == mcu_types[i].mach)
261 msp430_mcu = &mcu_types[i];
263 as_fatal (_("redefinition of mcu type %s' to %s'"),
264 msp430_mcu->name, mcu_types[i].name);
272 md_undefined_symbol (name)
273 char *name ATTRIBUTE_UNUSED;
287 /* Delete spaces from s: X ( r 1 2) => X(r12). */
299 while (ISSPACE (*m) && *m)
301 memmove (s, m, strlen (m) + 1);
308 /* Extract one word from FROM and copy it to TO. Delimeters are ",;\n" */
311 extract_operand (char *from, char *to, int limit)
315 /* Drop leading whitespace. */
316 from = skip_space (from);
318 while (size < limit && *from)
320 *(to + size) = *from;
321 if (*from == ',' || *from == ';' || *from == '\n')
336 extract_cmd (char *from, char *to, int limit)
340 while (*from && ! ISSPACE (*from) && *from != '.' && limit > size)
342 *(to + size) = *from;
352 /* Turn a string in input_line_pointer into a floating point constant
353 of type TYPE, and store the appropriate bytes in *LITP. The number
354 of LITTLENUMS emitted is stored in *SIZEP. An error message is
355 returned, or NULL on OK. */
358 md_atof (type, litP, sizeP)
364 LITTLENUM_TYPE words[4];
365 LITTLENUM_TYPE *wordP;
378 return _("bad call to md_atof");
381 t = atof_ieee (input_line_pointer, type, words);
383 input_line_pointer = t;
385 *sizeP = prec * sizeof (LITTLENUM_TYPE);
387 /* This loop outputs the LITTLENUMs in REVERSE order. */
388 for (wordP = words + prec - 1; prec--;)
390 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
391 litP += sizeof (LITTLENUM_TYPE);
398 md_convert_frag (abfd, sec, fragP)
399 bfd *abfd ATTRIBUTE_UNUSED;
400 asection *sec ATTRIBUTE_UNUSED;
401 fragS *fragP ATTRIBUTE_UNUSED;
409 struct msp430_opcode_s *opcode;
410 msp430_hash = hash_new ();
412 for (opcode = msp430_opcodes; opcode->name; opcode++)
413 hash_insert (msp430_hash, opcode->name, (char *) opcode);
415 bfd_set_arch_mach (stdoutput, TARGET_ARCH, msp430_mcu->mach);
422 struct msp430_opcode_s *opcode;
426 str = skip_space (str); /* Skip leading spaces. */
427 str = extract_cmd (str, cmd, sizeof (cmd));
429 while (cmd[i] && i < sizeof (cmd))
431 char a = TOLOWER (cmd[i]);
438 as_bad (_("can't find opcode "));
442 opcode = (struct msp430_opcode_s *) hash_find (msp430_hash, cmd);
446 as_bad (_("unknown opcode `%s'"), cmd);
451 char *__t = input_line_pointer;
452 msp430_operands (opcode, str);
453 input_line_pointer = __t;
457 /* Parse instruction operands.
458 Return binary opcode. */
461 msp430_operands (opcode, line)
462 struct msp430_opcode_s *opcode;
465 int bin = opcode->bin_opcode; /* opcode mask. */
467 char l1[MAX_OP_LEN], l2[MAX_OP_LEN];
470 struct msp430_operand_s op1, op2;
472 static short ZEROS = 0;
475 /* opcode is the one from opcodes table
476 line contains something like
481 /* Check if byte or word operation. */
482 if (*line == '.' && TOLOWER (*(line + 1)) == 'b')
484 bin |= BYTE_OPERATION;
491 while (! ISSPACE (*line) && *line)
494 if (opcode->insn_opnumb && (!*line || *line == '\n'))
496 as_bad (_("instruction %s requires %d operand(s)"),
497 opcode->name, opcode->insn_opnumb);
501 memset (l1, 0, sizeof (l1));
502 memset (l2, 0, sizeof (l2));
503 memset (&op1, 0, sizeof (op1));
504 memset (&op2, 0, sizeof (op2));
510 case 0: /* Emulated. */
511 switch (opcode->insn_opnumb)
514 /* Set/clear bits instructions. */
516 frag = frag_more (__is);
517 bfd_putl16 ((bfd_vma) bin, frag);
520 /* Something which works with destination operand. */
521 line = extract_operand (line, l1, sizeof (l1));
522 res = msp430_dstoperand (&op1, l1, opcode->bin_opcode);
526 bin |= (op1.reg | (op1.am << 7));
528 frag = frag_more (2 * __is);
529 where = frag - frag_now->fr_literal;
530 bfd_putl16 ((bfd_vma) bin, frag);
532 if (op1.mode == OP_EXP)
535 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
538 fix_new_exp (frag_now, where, 2,
539 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
541 fix_new_exp (frag_now, where, 2,
542 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
550 /* Shift instruction. */
551 line = extract_operand (line, l1, sizeof (l1));
552 strncpy (l2, l1, 16);
553 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
554 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
557 break; /* An error occured. All warnings were done before. */
559 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
561 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
562 frag = frag_more (2 * __is);
563 where = frag - frag_now->fr_literal;
564 bfd_putl16 ((bfd_vma) bin, frag);
566 if (op1.mode == OP_EXP)
568 where += 2; /* Advance 'where' as we do not know _where_. */
569 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
571 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
572 fix_new_exp (frag_now, where, 2,
573 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
575 fix_new_exp (frag_now, where, 2,
576 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
579 if (op2.mode == OP_EXP)
582 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
584 if (op2.reg) /* Not PC relative. */
585 fix_new_exp (frag_now, where + 2, 2,
586 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
588 fix_new_exp (frag_now, where + 2, 2,
589 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
594 /* Branch instruction => mov dst, r0. */
595 line = extract_operand (line, l1, sizeof (l1));
597 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
604 bin |= ((op1.reg << 8) | (op1.am << 4));
606 frag = frag_more (2 * __is);
607 where = frag - frag_now->fr_literal;
608 bfd_putl16 ((bfd_vma) bin, frag);
610 if (op1.mode == OP_EXP)
613 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
615 if (op1.reg || (op1.reg == 0 && op1.am == 3))
616 fix_new_exp (frag_now, where, 2,
617 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
619 fix_new_exp (frag_now, where, 2,
620 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
626 case 1: /* Format 1, double operand. */
627 line = extract_operand (line, l1, sizeof (l1));
628 line = extract_operand (line, l2, sizeof (l2));
629 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
630 res += msp430_dstoperand (&op2, l2, opcode->bin_opcode);
633 break; /* Error occured. All warnings were done before. */
635 bin |= (op2.reg | (op1.reg << 8) | (op1.am << 4) | (op2.am << 7));
637 __is = 1 + op1.ol + op2.ol; /* insn size in words. */
638 frag = frag_more (2 * __is);
639 where = frag - frag_now->fr_literal;
640 bfd_putl16 ((bfd_vma) bin, frag);
642 if (op1.mode == OP_EXP)
644 where += 2; /* Advance where as we do not know _where_. */
645 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
647 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
648 fix_new_exp (frag_now, where, 2,
649 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
651 fix_new_exp (frag_now, where, 2,
652 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
655 if (op2.mode == OP_EXP)
658 bfd_putl16 ((bfd_vma) ZEROS, frag + 2 + ((__is == 3) ? 2 : 0));
660 if (op2.reg) /* Not PC relative. */
661 fix_new_exp (frag_now, where + 2, 2,
662 &(op2.exp), FALSE, CHECK_RELOC_MSP430);
664 fix_new_exp (frag_now, where + 2, 2,
665 &(op2.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
669 case 2: /* Single-operand mostly instr. */
670 if (opcode->insn_opnumb == 0)
672 /* reti instruction. */
673 frag = frag_more (2);
674 bfd_putl16 ((bfd_vma) bin, frag);
678 line = extract_operand (line, l1, sizeof (l1));
679 res = msp430_srcoperand (&op1, l1, opcode->bin_opcode, &imm_op);
681 break; /* Error in operand. */
683 bin |= op1.reg | (op1.am << 4);
685 frag = frag_more (2 * __is);
686 where = frag - frag_now->fr_literal;
687 bfd_putl16 ((bfd_vma) bin, frag);
689 if (op1.mode == OP_EXP)
691 bfd_putl16 ((bfd_vma) ZEROS, frag + 2);
693 if (op1.reg || (op1.reg == 0 && op1.am == 3)) /* Not PC relative. */
694 fix_new_exp (frag_now, where + 2, 2,
695 &(op1.exp), FALSE, CHECK_RELOC_MSP430);
697 fix_new_exp (frag_now, where + 2, 2,
698 &(op1.exp), TRUE, CHECK_RELOC_MSP430_PCREL);
702 case 3: /* Conditional jumps instructions. */
703 line = extract_operand (line, l1, sizeof (l1));
714 frag = frag_more (2); /* Instr size is 1 word. */
716 /* In order to handle something like:
720 jz 4 ; skip next 4 bytes
723 nop ; will jump here if r5 positive or zero
725 jCOND -n ;assumes jump n bytes backward:
735 jCOND $n ; jump from PC in either direction. */
737 if (exp.X_op == O_constant)
739 int x = exp.X_add_number;
743 as_warn (_("Even number required. Rounded to %d"), x + 1);
747 if ((*l1 == '$' && x > 0) || x < 0)
752 if (x > 512 || x < -511)
754 as_bad (_("Wrong displacement %d"), x << 1);
759 bfd_putl16 ((bfd_vma) bin, frag);
761 else if (exp.X_op == O_symbol && *l1 != '$')
763 where = frag - frag_now->fr_literal;
764 fix_new_exp (frag_now, where, 2,
765 &exp, TRUE, BFD_RELOC_MSP430_10_PCREL);
767 bfd_putl16 ((bfd_vma) bin, frag);
771 as_bad (_("instruction requires label sans '$'"));
777 ("instruction requires label or value in range -511:512"));
783 as_bad (_("instruction requires label"));
789 as_bad (_("Ilegal instruction or not implmented opcode."));
792 input_line_pointer = line;
797 msp430_dstoperand (op, l, bin)
798 struct msp430_operand_s *op;
803 int ret = msp430_srcoperand (op, l, bin, &dummy);
814 parse_exp (__tl, &(op->exp));
815 if (op->exp.X_op != O_constant || op->exp.X_add_number != 0)
817 as_bad (_("Internal bug. Try to use 0(r%d) instead of @r%d"),
827 ("this addressing mode is not applicable for destination operand"));
838 /* If this is a reg numb, str 't' must be a number from 0 - 15. */
840 if (strlen (t) > 2 && *(t + 2) != '+')
845 if ((*t < '0' || *t > '9') && *t != '+')
858 msp430_srcoperand (op, l, bin, imm_op)
859 struct msp430_operand_s *op;
866 /* Check if an immediate #VALUE. The hash sign should be only at the beginning! */
873 /* Check if there is:
874 llo(x) - least significant 16 bits, x &= 0xffff
875 lhi(x) - x = (x >> 16) & 0xffff,
876 hlo(x) - x = (x >> 32) & 0xffff,
877 hhi(x) - x = (x >> 48) & 0xffff
878 The value _MUST_ be constant expression: #hlo(1231231231). */
882 if (strncasecmp (h, "#llo(", 5) == 0)
887 else if (strncasecmp (h, "#lhi(", 5) == 0)
892 else if (strncasecmp (h, "#hlo(", 5) == 0)
897 else if (strncasecmp (h, "#hhi(", 5) == 0)
902 else if (strncasecmp (h, "#lo(", 4) == 0)
907 else if (strncasecmp (h, "#hi(", 4) == 0)
913 op->reg = 0; /* Reg PC. */
915 op->ol = 1; /* Immediate will follow an instruction. */
918 parse_exp (__tl, &(op->exp));
919 if (op->exp.X_op == O_constant)
921 int x = op->exp.X_add_number;
926 op->exp.X_add_number = x;
928 else if (vshift == 1)
930 x = (x >> 16) & 0xffff;
931 op->exp.X_add_number = x;
936 op->exp.X_add_number = -1;
938 op->exp.X_add_number = 0; /* Nothing left. */
939 x = op->exp.X_add_number;
942 if (op->exp.X_add_number > 65535 || op->exp.X_add_number < -32768)
944 as_bad (_("value %ld out of range. Use #lo() or #hi()"), x);
948 /* Now check constants. */
949 /* Substitude register mode with a constant generator if applicable. */
951 x = (short) x; /* Extend sign. */
983 #ifdef PUSH_1X_WORKAROUND
986 /* Remove warning as confusing.
987 as_warn(_("Hardware push bug workaround")); */
1000 #ifdef PUSH_1X_WORKAROUND
1003 /* Remove warning as confusing.
1004 as_warn(_("Hardware push bug workaround")); */
1016 else if (op->exp.X_op == O_symbol)
1020 else if (op->exp.X_op == O_big)
1025 op->exp.X_op = O_constant;
1026 op->exp.X_add_number = 0xffff & generic_bignum[vshift];
1027 x = op->exp.X_add_number;
1032 ("unknown expression in operand %s. use #llo() #lhi() #hlo() #hhi() "),
1082 as_bad (_("unknown operand %s"), l);
1087 /* Check if absolute &VALUE (assume that we can construct something like ((a&b)<<7 + 25). */
1092 op->reg = 2; /* reg 2 in absolute addr mode. */
1093 op->am = 1; /* mode As == 01 bin. */
1094 op->ol = 1; /* Immediate value followed by instruction. */
1096 parse_exp (__tl, &(op->exp));
1098 if (op->exp.X_op == O_constant)
1100 int x = op->exp.X_add_number;
1101 if (x > 65535 || x < -32768)
1103 as_bad (_("value out of range: %d"), x);
1107 else if (op->exp.X_op == O_symbol)
1112 as_bad (_("unknown expression in operand %s"), l);
1118 /* Check if inderect register mode @Rn / postincrement @Rn+. */
1122 char *m = strchr (l, '+');
1126 as_bad (_("unknown addressing mode %s"), l);
1131 if (*t != 'r' && *t != 'R')
1133 as_bad (_("unknown addressing mode %s"), l);
1137 t++; /* Points to the reg value. */
1141 as_bad (_("Bad register name r%s"), t);
1149 *m = 0; /* strip '+' */
1151 if (op->reg < 0 || op->reg > 15)
1153 as_bad (_("MSP430 does not have %d registers"), op->reg);
1160 /* Check if register indexed X(Rn). */
1163 char *h = strrchr (l, '(');
1164 char *m = strrchr (l, ')');
1173 as_bad (_("')' required"));
1180 /* Extract a register. */
1181 t++; /* Advance pointer. */
1183 if (*t != 'r' && *t != 'R')
1186 ("unknown operator %s. Did you mean X(Rn) or #[hl][hl][oi](CONST) ?"),
1193 if (op->reg > 9 || op->reg < 0)
1195 as_bad (_("unknown operator (r%s substituded as a register name"),
1202 op->reg = op->reg * 10;
1203 op->reg += *t - '0';
1207 as_bad (_("unknown operator %s"), l);
1212 as_bad (_("r2 should not be used in indexed addressing mode"));
1216 if (*(t + 1) != ')')
1218 as_bad (_("unknown operator %s"), l);
1223 /* Extract constant. */
1227 parse_exp (__tl, &(op->exp));
1228 if (op->exp.X_op == O_constant)
1230 int x = op->exp.X_add_number;
1232 if (x > 65535 || x < -32768)
1234 as_bad (_("value out of range: %d"), x);
1246 else if (op->exp.X_op == O_symbol)
1251 as_bad (_("unknown expression in operand %s"), l);
1259 /* Register mode 'mov r1,r2'. */
1264 /* Operand should be a register. */
1265 if (*t == 'r' || *t == 'R')
1267 int x = atoi (t + 1);
1269 if (check_reg (t + 1))
1272 if (x < 0 || x > 15)
1273 break; /* Symbolic mode. */
1284 /* Symbolic mode 'mov a, b' == 'mov x(pc), y(pc)'. */
1293 /* alpha/number underline dot for labels. */
1294 if (! ISALNUM (*t) && *t != '_' && *t != '.')
1296 as_bad (_("unknown operand %s"), l);
1303 op->reg = 0; /* PC relative... be careful. */
1307 parse_exp (__tl, &(op->exp));
1313 as_bad (_("unknown addressing mode for operand %s"), l);
1318 /* GAS will call this function for each section at the end of the assembly,
1319 to permit the CPU backend to adjust the alignment of a section. */
1322 md_section_align (seg, addr)
1326 int align = bfd_get_section_alignment (stdoutput, seg);
1328 return ((addr + (1 << align) - 1) & (-1 << align));
1331 /* If you define this macro, it should return the offset between the
1332 address of a PC relative fixup and the position from which the PC
1333 relative adjustment should be made. On many processors, the base
1334 of a PC relative instruction is the next instruction, so this
1335 macro would return the length of an instruction. */
1338 md_pcrel_from_section (fixp, sec)
1342 if (fixp->fx_addsy != (symbolS *) NULL
1343 && (!S_IS_DEFINED (fixp->fx_addsy)
1344 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1347 return fixp->fx_frag->fr_address + fixp->fx_where;
1350 /* GAS will call this for each fixup. It should store the correct
1351 value in the object file. */
1354 md_apply_fix3 (fixp, valuep, seg)
1359 unsigned char *where;
1363 if (fixp->fx_addsy == (symbolS *) NULL)
1368 else if (fixp->fx_pcrel)
1370 segT s = S_GET_SEGMENT (fixp->fx_addsy);
1372 if (fixp->fx_addsy && (s == seg || s == absolute_section))
1374 value = S_GET_VALUE (fixp->fx_addsy) + *valuep;
1382 value = fixp->fx_offset;
1384 if (fixp->fx_subsy != (symbolS *) NULL)
1386 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
1388 value -= S_GET_VALUE (fixp->fx_subsy);
1393 /* We don't actually support subtracting a symbol. */
1394 as_bad_where (fixp->fx_file, fixp->fx_line,
1395 _("expression too complex"));
1400 switch (fixp->fx_r_type)
1403 fixp->fx_no_overflow = 1;
1405 case BFD_RELOC_MSP430_10_PCREL:
1411 /* Fetch the instruction, insert the fully resolved operand
1412 value, and stuff the instruction back again. */
1414 where = fixp->fx_frag->fr_literal + fixp->fx_where;
1416 insn = bfd_getl16 (where);
1418 switch (fixp->fx_r_type)
1420 case BFD_RELOC_MSP430_10_PCREL:
1422 as_bad_where (fixp->fx_file, fixp->fx_line,
1423 _("odd address operand: %ld"), value);
1425 /* Jumps are in words. */
1427 --value; /* Correct PC. */
1429 if (value < -512 || value > 511)
1430 as_bad_where (fixp->fx_file, fixp->fx_line,
1431 _("operand out of range: %ld"), value);
1433 value &= 0x3ff; /* get rid of extended sign */
1434 bfd_putl16 ((bfd_vma) (value | insn), where);
1437 case BFD_RELOC_MSP430_16_PCREL:
1439 as_bad_where (fixp->fx_file, fixp->fx_line,
1440 _("odd address operand: %ld"), value);
1442 /* Nothing to be corrected here. */
1443 if (value < -32768 || value > 65536)
1444 as_bad_where (fixp->fx_file, fixp->fx_line,
1445 _("operand out of range: %ld"), value);
1447 value &= 0xffff; /* Get rid of extended sign. */
1448 bfd_putl16 ((bfd_vma) value, where);
1451 case BFD_RELOC_MSP430_16_PCREL_BYTE:
1452 /* Nothing to be corrected here. */
1453 if (value < -32768 || value > 65536)
1454 as_bad_where (fixp->fx_file, fixp->fx_line,
1455 _("operand out of range: %ld"), value);
1457 value &= 0xffff; /* Get rid of extended sign. */
1458 bfd_putl16 ((bfd_vma) value, where);
1462 bfd_putl16 ((bfd_vma) value, where);
1465 case BFD_RELOC_MSP430_16:
1467 case BFD_RELOC_MSP430_16_BYTE:
1469 bfd_putl16 ((bfd_vma) value, where);
1473 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1474 fixp->fx_line, fixp->fx_r_type);
1480 fixp->fx_addnumber = value;
1485 /* A `BFD_ASSEMBLER' GAS will call this to generate a reloc. GAS
1486 will pass the resulting reloc to `bfd_install_relocation'. This
1487 currently works poorly, as `bfd_install_relocation' often does the
1488 wrong thing, and instances of `tc_gen_reloc' have been written to
1489 work around the problems, which in turns makes it difficult to fix
1490 `bfd_install_relocation'. */
1492 /* If while processing a fixup, a reloc really needs to be created
1493 then it is done here. */
1496 tc_gen_reloc (seg, fixp)
1497 asection *seg ATTRIBUTE_UNUSED;
1502 reloc = (arelent *) xmalloc (sizeof (arelent));
1504 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1505 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1507 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1508 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1509 if (reloc->howto == (reloc_howto_type *) NULL)
1511 as_bad_where (fixp->fx_file, fixp->fx_line,
1512 _("reloc %d not supported by object file format"),
1513 (int) fixp->fx_r_type);
1517 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1518 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1519 reloc->address = fixp->fx_offset;
1521 reloc->addend = fixp->fx_offset;
1526 /* Parse ordinary expression. */
1533 input_line_pointer = s;
1535 if (op->X_op == O_absent)
1536 as_bad (_("missing operand"));
1537 return input_line_pointer;
1542 md_estimate_size_before_relax (fragp, seg)
1543 fragS *fragp ATTRIBUTE_UNUSED;
1544 asection *seg ATTRIBUTE_UNUSED;