1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003
3 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
24 #include "safe-ctype.h"
26 #include "opcode/mn10300.h"
27 #include "dwarf2dbg.h"
29 /* Structure to hold information about predefined registers. */
36 /* Generic assembler global variables which must be defined by all
39 /* Characters which always start a comment. */
40 const char comment_chars[] = "#";
42 /* Characters which start a comment at the beginning of a line. */
43 const char line_comment_chars[] = ";#";
45 /* Characters which may be used to separate multiple commands on a
47 const char line_separator_chars[] = ";";
49 /* Characters which are used to indicate an exponent in a floating
51 const char EXP_CHARS[] = "eE";
53 /* Characters which mean that a number is a floating point constant,
55 const char FLT_CHARS[] = "dD";
57 const relax_typeS md_relax_table[] = {
60 {0x7fff, -0x8000, 5, 2},
61 {0x7fffffff, -0x80000000, 7, 0},
63 /* bCC relaxing (uncommon cases) */
65 {0x7fff, -0x8000, 6, 5},
66 {0x7fffffff, -0x80000000, 8, 0},
69 {0x7fff, -0x8000, 5, 7},
70 {0x7fffffff, -0x80000000, 7, 0},
73 {0x7fff, -0x8000, 4, 9},
74 {0x7fffffff, -0x80000000, 6, 0},
78 {0x7fff, -0x8000, 3, 12},
79 {0x7fffffff, -0x80000000, 5, 0},
83 {0x7fff, -0x8000, 6, 15},
84 {0x7fffffff, -0x80000000, 8, 0},
88 /* Local functions. */
89 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
90 const struct mn10300_operand *,
91 offsetT, char *, unsigned,
93 static unsigned long check_operand PARAMS ((unsigned long,
94 const struct mn10300_operand *,
96 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
97 static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
98 static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
99 static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
100 static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
101 static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
102 static void set_arch_mach PARAMS ((int));
104 /* Set linkrelax here to avoid fixups in most sections. */
107 static int current_machine;
110 #define MAX_INSN_FIXUPS (5)
115 bfd_reloc_code_real_type reloc;
117 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
120 /* We must store the value of each register operand so that we can
121 verify that certain registers do not match. */
122 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
124 const char *md_shortopts = "";
125 struct option md_longopts[] = {
126 {NULL, no_argument, NULL, 0}
128 size_t md_longopts_size = sizeof (md_longopts);
130 /* The target specific pseudo-ops which we support. */
131 const pseudo_typeS md_pseudo_table[] =
133 { "am30", set_arch_mach, AM30 },
134 { "am33", set_arch_mach, AM33 },
135 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
136 { "mn10300", set_arch_mach, MN103 },
140 #define HAVE_AM33_2 (current_machine == AM33_2)
141 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
142 #define HAVE_AM30 (current_machine == AM30)
144 /* Opcode hash table. */
145 static struct hash_control *mn10300_hash;
147 /* This table is sorted. Suitable for searching by a binary search. */
148 static const struct reg_name data_registers[] =
155 #define DATA_REG_NAME_CNT \
156 (sizeof (data_registers) / sizeof (struct reg_name))
158 static const struct reg_name address_registers[] =
166 #define ADDRESS_REG_NAME_CNT \
167 (sizeof (address_registers) / sizeof (struct reg_name))
169 static const struct reg_name r_registers[] =
213 #define R_REG_NAME_CNT \
214 (sizeof (r_registers) / sizeof (struct reg_name))
216 static const struct reg_name xr_registers[] =
241 #define XR_REG_NAME_CNT \
242 (sizeof (xr_registers) / sizeof (struct reg_name))
244 /* We abuse the `value' field, that would be otherwise unused, to
245 encode the architecture on which (access to) the register was
246 introduced. FIXME: we should probably warn when we encounter a
247 register name when assembling for an architecture that doesn't
248 support it, before parsing it as a symbol name. */
249 static const struct reg_name other_registers[] =
258 #define OTHER_REG_NAME_CNT \
259 (sizeof (other_registers) / sizeof (struct reg_name))
261 static const struct reg_name float_registers[] =
297 #define FLOAT_REG_NAME_CNT \
298 (sizeof (float_registers) / sizeof (struct reg_name))
300 static const struct reg_name double_registers[] =
320 #define DOUBLE_REG_NAME_CNT \
321 (sizeof (double_registers) / sizeof (struct reg_name))
324 /* reg_name_search does a binary search of the given register table
325 to see if "name" is a valid regiter name. Returns the register
326 number from the array on success, or -1 on failure. */
329 reg_name_search (regs, regcount, name)
330 const struct reg_name *regs;
334 int middle, low, high;
342 middle = (low + high) / 2;
343 cmp = strcasecmp (name, regs[middle].name);
349 return regs[middle].value;
355 /* Summary of register_name().
357 * in: Input_line_pointer points to 1st char of operand.
359 * out: An expressionS.
360 * The operand may have been a register: in this case, X_op == O_register,
361 * X_add_number is set to the register number, and truth is returned.
362 * Input_line_pointer->(next non-blank) char after operand, or is in
363 * its original state.
367 r_register_name (expressionP)
368 expressionS *expressionP;
375 /* Find the spelling of the operand. */
376 start = name = input_line_pointer;
378 c = get_symbol_end ();
379 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
381 /* Put back the delimiting char. */
382 *input_line_pointer = c;
384 /* Look to see if it's in the register table. */
387 expressionP->X_op = O_register;
388 expressionP->X_add_number = reg_number;
390 /* Make the rest nice. */
391 expressionP->X_add_symbol = NULL;
392 expressionP->X_op_symbol = NULL;
397 /* Reset the line as if we had not done anything. */
398 input_line_pointer = start;
402 /* Summary of register_name().
404 * in: Input_line_pointer points to 1st char of operand.
406 * out: An expressionS.
407 * The operand may have been a register: in this case, X_op == O_register,
408 * X_add_number is set to the register number, and truth is returned.
409 * Input_line_pointer->(next non-blank) char after operand, or is in
410 * its original state.
414 xr_register_name (expressionP)
415 expressionS *expressionP;
422 /* Find the spelling of the operand. */
423 start = name = input_line_pointer;
425 c = get_symbol_end ();
426 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
428 /* Put back the delimiting char. */
429 *input_line_pointer = c;
431 /* Look to see if it's in the register table. */
434 expressionP->X_op = O_register;
435 expressionP->X_add_number = reg_number;
437 /* Make the rest nice. */
438 expressionP->X_add_symbol = NULL;
439 expressionP->X_op_symbol = NULL;
444 /* Reset the line as if we had not done anything. */
445 input_line_pointer = start;
449 /* Summary of register_name().
451 * in: Input_line_pointer points to 1st char of operand.
453 * out: An expressionS.
454 * The operand may have been a register: in this case, X_op == O_register,
455 * X_add_number is set to the register number, and truth is returned.
456 * Input_line_pointer->(next non-blank) char after operand, or is in
457 * its original state.
461 data_register_name (expressionP)
462 expressionS *expressionP;
469 /* Find the spelling of the operand. */
470 start = name = input_line_pointer;
472 c = get_symbol_end ();
473 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
475 /* Put back the delimiting char. */
476 *input_line_pointer = c;
478 /* Look to see if it's in the register table. */
481 expressionP->X_op = O_register;
482 expressionP->X_add_number = reg_number;
484 /* Make the rest nice. */
485 expressionP->X_add_symbol = NULL;
486 expressionP->X_op_symbol = NULL;
491 /* Reset the line as if we had not done anything. */
492 input_line_pointer = start;
496 /* Summary of register_name().
498 * in: Input_line_pointer points to 1st char of operand.
500 * out: An expressionS.
501 * The operand may have been a register: in this case, X_op == O_register,
502 * X_add_number is set to the register number, and truth is returned.
503 * Input_line_pointer->(next non-blank) char after operand, or is in
504 * its original state.
508 address_register_name (expressionP)
509 expressionS *expressionP;
516 /* Find the spelling of the operand. */
517 start = name = input_line_pointer;
519 c = get_symbol_end ();
520 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
522 /* Put back the delimiting char. */
523 *input_line_pointer = c;
525 /* Look to see if it's in the register table. */
528 expressionP->X_op = O_register;
529 expressionP->X_add_number = reg_number;
531 /* Make the rest nice. */
532 expressionP->X_add_symbol = NULL;
533 expressionP->X_op_symbol = NULL;
538 /* Reset the line as if we had not done anything. */
539 input_line_pointer = start;
543 /* Summary of register_name().
545 * in: Input_line_pointer points to 1st char of operand.
547 * out: An expressionS.
548 * The operand may have been a register: in this case, X_op == O_register,
549 * X_add_number is set to the register number, and truth is returned.
550 * Input_line_pointer->(next non-blank) char after operand, or is in
551 * its original state.
555 other_register_name (expressionP)
556 expressionS *expressionP;
563 /* Find the spelling of the operand. */
564 start = name = input_line_pointer;
566 c = get_symbol_end ();
567 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
569 /* Put back the delimiting char. */
570 *input_line_pointer = c;
572 /* Look to see if it's in the register table. */
574 || (reg_number == AM33 && HAVE_AM33))
576 expressionP->X_op = O_register;
577 expressionP->X_add_number = 0;
579 /* Make the rest nice. */
580 expressionP->X_add_symbol = NULL;
581 expressionP->X_op_symbol = NULL;
586 /* Reset the line as if we had not done anything. */
587 input_line_pointer = start;
591 static bfd_boolean double_register_name PARAMS ((expressionS *));
592 static bfd_boolean float_register_name PARAMS ((expressionS *));
594 /* Summary of float_register_name:
596 in: Input_line_pointer points to 1st char of operand.
599 The operand may have been a register: in this case, X_op == O_register,
600 X_add_number is set to the register number, and truth is returned.
601 Input_line_pointer->(next non-blank) char after operand, or is in
602 its original state. */
605 float_register_name (expressionP)
606 expressionS *expressionP;
613 /* Find the spelling of the operand. */
614 start = name = input_line_pointer;
616 c = get_symbol_end ();
617 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
619 /* Put back the delimiting char. */
620 * input_line_pointer = c;
622 /* Look to see if it's in the register table. */
625 expressionP->X_op = O_register;
626 expressionP->X_add_number = reg_number;
628 /* Make the rest nice. */
629 expressionP->X_add_symbol = NULL;
630 expressionP->X_op_symbol = NULL;
635 /* Reset the line as if we had not done anything. */
636 input_line_pointer = start;
640 /* Summary of double_register_name:
642 in: Input_line_pointer points to 1st char of operand.
645 The operand may have been a register: in this case, X_op == O_register,
646 X_add_number is set to the register number, and truth is returned.
647 Input_line_pointer->(next non-blank) char after operand, or is in
648 its original state. */
651 double_register_name (expressionP)
652 expressionS *expressionP;
659 /* Find the spelling of the operand. */
660 start = name = input_line_pointer;
662 c = get_symbol_end ();
663 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
665 /* Put back the delimiting char. */
666 * input_line_pointer = c;
668 /* Look to see if it's in the register table. */
671 expressionP->X_op = O_register;
672 expressionP->X_add_number = reg_number;
674 /* Make the rest nice. */
675 expressionP->X_add_symbol = NULL;
676 expressionP->X_op_symbol = NULL;
681 /* Reset the line as if we had not done anything. */
682 input_line_pointer = start;
687 md_show_usage (stream)
690 fprintf (stream, _("MN10300 options:\n\
695 md_parse_option (c, arg)
696 int c ATTRIBUTE_UNUSED;
697 char *arg ATTRIBUTE_UNUSED;
703 md_undefined_symbol (name)
704 char *name ATTRIBUTE_UNUSED;
710 md_atof (type, litp, sizep)
716 LITTLENUM_TYPE words[4];
732 return "bad call to md_atof";
735 t = atof_ieee (input_line_pointer, type, words);
737 input_line_pointer = t;
741 for (i = prec - 1; i >= 0; i--)
743 md_number_to_chars (litp, (valueT) words[i], 2);
751 md_convert_frag (abfd, sec, fragP)
752 bfd *abfd ATTRIBUTE_UNUSED;
756 static unsigned long label_count = 0;
759 subseg_change (sec, 0);
760 if (fragP->fr_subtype == 0)
762 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
763 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
767 else if (fragP->fr_subtype == 1)
769 /* Reverse the condition of the first branch. */
770 int offset = fragP->fr_fix;
771 int opcode = fragP->fr_literal[offset] & 0xff;
808 fragP->fr_literal[offset] = opcode;
810 /* Create a fixup for the reversed conditional branch. */
811 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
812 fix_new (fragP, fragP->fr_fix + 1, 1,
813 symbol_new (buf, sec, 0, fragP->fr_next),
814 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
816 /* Now create the unconditional branch + fixup to the
818 fragP->fr_literal[offset + 2] = 0xcc;
819 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
820 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
824 else if (fragP->fr_subtype == 2)
826 /* Reverse the condition of the first branch. */
827 int offset = fragP->fr_fix;
828 int opcode = fragP->fr_literal[offset] & 0xff;
865 fragP->fr_literal[offset] = opcode;
867 /* Create a fixup for the reversed conditional branch. */
868 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
869 fix_new (fragP, fragP->fr_fix + 1, 1,
870 symbol_new (buf, sec, 0, fragP->fr_next),
871 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
873 /* Now create the unconditional branch + fixup to the
875 fragP->fr_literal[offset + 2] = 0xdc;
876 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
877 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
881 else if (fragP->fr_subtype == 3)
883 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
884 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
888 else if (fragP->fr_subtype == 4)
890 /* Reverse the condition of the first branch. */
891 int offset = fragP->fr_fix;
892 int opcode = fragP->fr_literal[offset + 1] & 0xff;
911 fragP->fr_literal[offset + 1] = opcode;
913 /* Create a fixup for the reversed conditional branch. */
914 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
915 fix_new (fragP, fragP->fr_fix + 2, 1,
916 symbol_new (buf, sec, 0, fragP->fr_next),
917 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
919 /* Now create the unconditional branch + fixup to the
921 fragP->fr_literal[offset + 3] = 0xcc;
922 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
923 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
927 else if (fragP->fr_subtype == 5)
929 /* Reverse the condition of the first branch. */
930 int offset = fragP->fr_fix;
931 int opcode = fragP->fr_literal[offset + 1] & 0xff;
947 fragP->fr_literal[offset + 1] = opcode;
949 /* Create a fixup for the reversed conditional branch. */
950 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
951 fix_new (fragP, fragP->fr_fix + 2, 1,
952 symbol_new (buf, sec, 0, fragP->fr_next),
953 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
955 /* Now create the unconditional branch + fixup to the
957 fragP->fr_literal[offset + 3] = 0xdc;
958 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
959 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
963 else if (fragP->fr_subtype == 6)
965 int offset = fragP->fr_fix;
966 fragP->fr_literal[offset] = 0xcd;
967 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
968 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
972 else if (fragP->fr_subtype == 7)
974 int offset = fragP->fr_fix;
975 fragP->fr_literal[offset] = 0xdd;
976 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
977 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
979 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
980 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
984 else if (fragP->fr_subtype == 8)
986 int offset = fragP->fr_fix;
987 fragP->fr_literal[offset] = 0xfa;
988 fragP->fr_literal[offset + 1] = 0xff;
989 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
990 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
994 else if (fragP->fr_subtype == 9)
996 int offset = fragP->fr_fix;
997 fragP->fr_literal[offset] = 0xfc;
998 fragP->fr_literal[offset + 1] = 0xff;
1000 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1001 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1005 else if (fragP->fr_subtype == 10)
1007 fragP->fr_literal[fragP->fr_fix] = 0xca;
1008 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1009 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1013 else if (fragP->fr_subtype == 11)
1015 int offset = fragP->fr_fix;
1016 fragP->fr_literal[offset] = 0xcc;
1018 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1019 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1023 else if (fragP->fr_subtype == 12)
1025 int offset = fragP->fr_fix;
1026 fragP->fr_literal[offset] = 0xdc;
1028 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1029 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1033 else if (fragP->fr_subtype == 13)
1035 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1036 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1040 else if (fragP->fr_subtype == 14)
1042 /* Reverse the condition of the first branch. */
1043 int offset = fragP->fr_fix;
1044 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1093 fragP->fr_literal[offset + 1] = opcode;
1095 /* Create a fixup for the reversed conditional branch. */
1096 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1097 fix_new (fragP, fragP->fr_fix + 2, 1,
1098 symbol_new (buf, sec, 0, fragP->fr_next),
1099 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1101 /* Now create the unconditional branch + fixup to the
1103 fragP->fr_literal[offset + 3] = 0xcc;
1104 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1105 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1109 else if (fragP->fr_subtype == 15)
1111 /* Reverse the condition of the first branch. */
1112 int offset = fragP->fr_fix;
1113 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1162 fragP->fr_literal[offset + 1] = opcode;
1164 /* Create a fixup for the reversed conditional branch. */
1165 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1166 fix_new (fragP, fragP->fr_fix + 2, 1,
1167 symbol_new (buf, sec, 0, fragP->fr_next),
1168 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1170 /* Now create the unconditional branch + fixup to the
1172 fragP->fr_literal[offset + 3] = 0xdc;
1173 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1174 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1183 md_section_align (seg, addr)
1187 int align = bfd_get_section_alignment (stdoutput, seg);
1188 return ((addr + (1 << align) - 1) & (-1 << align));
1194 char *prev_name = "";
1195 register const struct mn10300_opcode *op;
1197 mn10300_hash = hash_new ();
1199 /* Insert unique names into hash table. The MN10300 instruction set
1200 has many identical opcode names that have different opcodes based
1201 on the operands. This hash table then provides a quick index to
1202 the first opcode with a particular name in the opcode table. */
1204 op = mn10300_opcodes;
1207 if (strcmp (prev_name, op->name))
1209 prev_name = (char *) op->name;
1210 hash_insert (mn10300_hash, op->name, (char *) op);
1215 /* Set the default machine type. */
1216 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
1217 as_warn (_("could not set architecture and machine"));
1219 current_machine = MN103;
1227 struct mn10300_opcode *opcode;
1228 struct mn10300_opcode *next_opcode;
1229 const unsigned char *opindex_ptr;
1230 int next_opindex, relaxable;
1231 unsigned long insn, extension, size = 0;
1236 /* Get the opcode. */
1237 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1242 /* Find the first opcode with the proper name. */
1243 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1246 as_bad (_("Unrecognized opcode: `%s'"), str);
1251 while (ISSPACE (*str))
1254 input_line_pointer = str;
1261 int extra_shift = 0;
1263 errmsg = _("Invalid opcode/operands");
1265 /* Reset the array of register operands. */
1266 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1272 insn = opcode->opcode;
1275 /* If the instruction is not available on the current machine
1276 then it can not possibly match. */
1278 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1279 && !(opcode->machine == AM33 && HAVE_AM33)
1280 && !(opcode->machine == AM30 && HAVE_AM30))
1283 for (op_idx = 1, opindex_ptr = opcode->operands;
1285 opindex_ptr++, op_idx++)
1287 const struct mn10300_operand *operand;
1290 if (next_opindex == 0)
1292 operand = &mn10300_operands[*opindex_ptr];
1296 operand = &mn10300_operands[next_opindex];
1300 while (*str == ' ' || *str == ',')
1303 if (operand->flags & MN10300_OPERAND_RELAX)
1306 /* Gather the operand. */
1307 hold = input_line_pointer;
1308 input_line_pointer = str;
1310 if (operand->flags & MN10300_OPERAND_PAREN)
1312 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1314 input_line_pointer = hold;
1318 input_line_pointer++;
1321 /* See if we can match the operands. */
1322 else if (operand->flags & MN10300_OPERAND_DREG)
1324 if (!data_register_name (&ex))
1326 input_line_pointer = hold;
1331 else if (operand->flags & MN10300_OPERAND_AREG)
1333 if (!address_register_name (&ex))
1335 input_line_pointer = hold;
1340 else if (operand->flags & MN10300_OPERAND_SP)
1342 char *start = input_line_pointer;
1343 char c = get_symbol_end ();
1345 if (strcasecmp (start, "sp") != 0)
1347 *input_line_pointer = c;
1348 input_line_pointer = hold;
1352 *input_line_pointer = c;
1355 else if (operand->flags & MN10300_OPERAND_RREG)
1357 if (!r_register_name (&ex))
1359 input_line_pointer = hold;
1364 else if (operand->flags & MN10300_OPERAND_XRREG)
1366 if (!xr_register_name (&ex))
1368 input_line_pointer = hold;
1373 else if (operand->flags & MN10300_OPERAND_FSREG)
1375 if (!float_register_name (&ex))
1377 input_line_pointer = hold;
1382 else if (operand->flags & MN10300_OPERAND_FDREG)
1384 if (!double_register_name (&ex))
1386 input_line_pointer = hold;
1391 else if (operand->flags & MN10300_OPERAND_FPCR)
1393 char *start = input_line_pointer;
1394 char c = get_symbol_end ();
1396 if (strcasecmp (start, "fpcr") != 0)
1398 *input_line_pointer = c;
1399 input_line_pointer = hold;
1403 *input_line_pointer = c;
1406 else if (operand->flags & MN10300_OPERAND_USP)
1408 char *start = input_line_pointer;
1409 char c = get_symbol_end ();
1411 if (strcasecmp (start, "usp") != 0)
1413 *input_line_pointer = c;
1414 input_line_pointer = hold;
1418 *input_line_pointer = c;
1421 else if (operand->flags & MN10300_OPERAND_SSP)
1423 char *start = input_line_pointer;
1424 char c = get_symbol_end ();
1426 if (strcasecmp (start, "ssp") != 0)
1428 *input_line_pointer = c;
1429 input_line_pointer = hold;
1433 *input_line_pointer = c;
1436 else if (operand->flags & MN10300_OPERAND_MSP)
1438 char *start = input_line_pointer;
1439 char c = get_symbol_end ();
1441 if (strcasecmp (start, "msp") != 0)
1443 *input_line_pointer = c;
1444 input_line_pointer = hold;
1448 *input_line_pointer = c;
1451 else if (operand->flags & MN10300_OPERAND_PC)
1453 char *start = input_line_pointer;
1454 char c = get_symbol_end ();
1456 if (strcasecmp (start, "pc") != 0)
1458 *input_line_pointer = c;
1459 input_line_pointer = hold;
1463 *input_line_pointer = c;
1466 else if (operand->flags & MN10300_OPERAND_EPSW)
1468 char *start = input_line_pointer;
1469 char c = get_symbol_end ();
1471 if (strcasecmp (start, "epsw") != 0)
1473 *input_line_pointer = c;
1474 input_line_pointer = hold;
1478 *input_line_pointer = c;
1481 else if (operand->flags & MN10300_OPERAND_PLUS)
1483 if (*input_line_pointer != '+')
1485 input_line_pointer = hold;
1489 input_line_pointer++;
1492 else if (operand->flags & MN10300_OPERAND_PSW)
1494 char *start = input_line_pointer;
1495 char c = get_symbol_end ();
1497 if (strcasecmp (start, "psw") != 0)
1499 *input_line_pointer = c;
1500 input_line_pointer = hold;
1504 *input_line_pointer = c;
1507 else if (operand->flags & MN10300_OPERAND_MDR)
1509 char *start = input_line_pointer;
1510 char c = get_symbol_end ();
1512 if (strcasecmp (start, "mdr") != 0)
1514 *input_line_pointer = c;
1515 input_line_pointer = hold;
1519 *input_line_pointer = c;
1522 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1524 unsigned int value = 0;
1525 if (*input_line_pointer != '[')
1527 input_line_pointer = hold;
1533 input_line_pointer++;
1535 /* We used to reject a null register list here; however,
1536 we accept it now so the compiler can emit "call"
1537 instructions for all calls to named functions.
1539 The linker can then fill in the appropriate bits for the
1540 register list and stack size or change the instruction
1541 into a "calls" if using "call" is not profitable. */
1542 while (*input_line_pointer != ']')
1547 if (*input_line_pointer == ',')
1548 input_line_pointer++;
1550 start = input_line_pointer;
1551 c = get_symbol_end ();
1553 if (strcasecmp (start, "d2") == 0)
1556 *input_line_pointer = c;
1558 else if (strcasecmp (start, "d3") == 0)
1561 *input_line_pointer = c;
1563 else if (strcasecmp (start, "a2") == 0)
1566 *input_line_pointer = c;
1568 else if (strcasecmp (start, "a3") == 0)
1571 *input_line_pointer = c;
1573 else if (strcasecmp (start, "other") == 0)
1576 *input_line_pointer = c;
1579 && strcasecmp (start, "exreg0") == 0)
1582 *input_line_pointer = c;
1585 && strcasecmp (start, "exreg1") == 0)
1588 *input_line_pointer = c;
1591 && strcasecmp (start, "exother") == 0)
1594 *input_line_pointer = c;
1597 && strcasecmp (start, "all") == 0)
1600 *input_line_pointer = c;
1604 input_line_pointer = hold;
1609 input_line_pointer++;
1610 mn10300_insert_operand (&insn, &extension, operand,
1611 value, (char *) NULL, 0, 0);
1615 else if (data_register_name (&ex))
1617 input_line_pointer = hold;
1621 else if (address_register_name (&ex))
1623 input_line_pointer = hold;
1627 else if (other_register_name (&ex))
1629 input_line_pointer = hold;
1633 else if (HAVE_AM33 && r_register_name (&ex))
1635 input_line_pointer = hold;
1639 else if (HAVE_AM33 && xr_register_name (&ex))
1641 input_line_pointer = hold;
1645 else if (HAVE_AM33_2 && float_register_name (&ex))
1647 input_line_pointer = hold;
1651 else if (HAVE_AM33_2 && double_register_name (&ex))
1653 input_line_pointer = hold;
1657 else if (*str == ')' || *str == '(')
1659 input_line_pointer = hold;
1671 errmsg = _("illegal operand");
1674 errmsg = _("missing operand");
1680 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1682 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1684 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1685 if ((operand->flags & mask) == 0)
1687 input_line_pointer = hold;
1692 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1694 else if (opcode->format == FMT_D2
1695 || opcode->format == FMT_D4
1696 || opcode->format == FMT_S2
1697 || opcode->format == FMT_S4
1698 || opcode->format == FMT_S6
1699 || opcode->format == FMT_D5)
1701 else if (opcode->format == FMT_D7)
1703 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1708 mn10300_insert_operand (&insn, &extension, operand,
1709 ex.X_add_number, (char *) NULL,
1712 /* And note the register number in the register array. */
1713 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1718 /* If this operand can be promoted, and it doesn't
1719 fit into the allocated bitfield for this insn,
1720 then promote it (ie this opcode does not match). */
1722 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1723 && !check_operand (insn, operand, ex.X_add_number))
1725 input_line_pointer = hold;
1730 mn10300_insert_operand (&insn, &extension, operand,
1731 ex.X_add_number, (char *) NULL,
1736 /* If this operand can be promoted, then this opcode didn't
1737 match since we can't know if it needed promotion! */
1738 if (operand->flags & MN10300_OPERAND_PROMOTE)
1740 input_line_pointer = hold;
1745 /* We need to generate a fixup for this expression. */
1746 if (fc >= MAX_INSN_FIXUPS)
1747 as_fatal (_("too many fixups"));
1748 fixups[fc].exp = ex;
1749 fixups[fc].opindex = *opindex_ptr;
1750 fixups[fc].reloc = BFD_RELOC_UNUSED;
1756 str = input_line_pointer;
1757 input_line_pointer = hold;
1759 while (*str == ' ' || *str == ',')
1764 /* Make sure we used all the operands! */
1768 /* If this instruction has registers that must not match, verify
1769 that they do indeed not match. */
1770 if (opcode->no_match_operands)
1774 /* Look at each operand to see if it's marked. */
1775 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1777 if ((1 << i) & opcode->no_match_operands)
1781 /* operand I is marked. Check that it does not match any
1782 operands > I which are marked. */
1783 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1785 if (((1 << j) & opcode->no_match_operands)
1786 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1788 errmsg = _("Invalid register specification.");
1800 next_opcode = opcode + 1;
1801 if (!strcmp (next_opcode->name, opcode->name))
1803 opcode = next_opcode;
1807 as_bad ("%s", errmsg);
1813 while (ISSPACE (*str))
1817 as_bad (_("junk at end of line: `%s'"), str);
1819 input_line_pointer = str;
1821 /* Determine the size of the instruction. */
1822 if (opcode->format == FMT_S0)
1825 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1828 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1831 if (opcode->format == FMT_D6)
1834 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1837 if (opcode->format == FMT_D8)
1840 if (opcode->format == FMT_D9)
1843 if (opcode->format == FMT_S4)
1846 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1849 if (opcode->format == FMT_D2)
1852 if (opcode->format == FMT_D3)
1855 if (opcode->format == FMT_D4)
1858 if (relaxable && fc > 0)
1862 /* We want to anchor the line info to the previous frag (if
1863 there isn't one, create it), so that, when the insn is
1864 resized, we still get the right address for the beginning of
1867 dwarf2_emit_insn (0);
1872 /* Handle bra specially. Basically treat it like jmp so
1873 that we automatically handle 8, 16 and 32 bit offsets
1874 correctly as well as jumps to an undefined address.
1876 It is also important to not treat it like other bCC
1877 instructions since the long forms of bra is different
1878 from other bCC instructions. */
1879 if (opcode->opcode == 0xca00)
1891 else if (size == 3 && opcode->opcode == 0xcc0000)
1893 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1895 /* bCC (uncommon cases) */
1899 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1900 fixups[0].exp.X_add_symbol,
1901 fixups[0].exp.X_add_number,
1902 (char *)fixups[0].opindex);
1904 /* This is pretty hokey. We basically just care about the
1905 opcode, so we have to write out the first word big endian.
1907 The exception is "call", which has two operands that we
1910 The first operand (the register list) happens to be in the
1911 first instruction word, and will be in the right place if
1912 we output the first word in big endian mode.
1914 The second operand (stack size) is in the extension word,
1915 and we want it to appear as the first character in the extension
1916 word (as it appears in memory). Luckily, writing the extension
1917 word in big endian format will do what we want. */
1918 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1921 number_to_chars_bigendian (f + 4, extension, 4);
1922 number_to_chars_bigendian (f + 8, 0, size - 8);
1925 number_to_chars_bigendian (f + 4, extension, size - 4);
1929 /* Allocate space for the instruction. */
1930 f = frag_more (size);
1932 /* Fill in bytes for the instruction. Note that opcode fields
1933 are written big-endian, 16 & 32bit immediates are written
1934 little endian. Egad. */
1935 if (opcode->format == FMT_S0
1936 || opcode->format == FMT_S1
1937 || opcode->format == FMT_D0
1938 || opcode->format == FMT_D6
1939 || opcode->format == FMT_D7
1940 || opcode->format == FMT_D10
1941 || opcode->format == FMT_D1)
1943 number_to_chars_bigendian (f, insn, size);
1945 else if (opcode->format == FMT_S2
1946 && opcode->opcode != 0xdf0000
1947 && opcode->opcode != 0xde0000)
1949 /* A format S2 instruction that is _not_ "ret" and "retf". */
1950 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1951 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1953 else if (opcode->format == FMT_S2)
1955 /* This must be a ret or retf, which is written entirely in
1956 big-endian format. */
1957 number_to_chars_bigendian (f, insn, 3);
1959 else if (opcode->format == FMT_S4
1960 && opcode->opcode != 0xdc000000)
1962 /* This must be a format S4 "call" instruction. What a pain. */
1963 unsigned long temp = (insn >> 8) & 0xffff;
1964 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1965 number_to_chars_littleendian (f + 1, temp, 2);
1966 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1967 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1969 else if (opcode->format == FMT_S4)
1971 /* This must be a format S4 "jmp" instruction. */
1972 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1973 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1974 number_to_chars_littleendian (f + 1, temp, 4);
1976 else if (opcode->format == FMT_S6)
1978 unsigned long temp = ((insn & 0xffffff) << 8)
1979 | ((extension >> 16) & 0xff);
1980 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1981 number_to_chars_littleendian (f + 1, temp, 4);
1982 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1983 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1985 else if (opcode->format == FMT_D2
1986 && opcode->opcode != 0xfaf80000
1987 && opcode->opcode != 0xfaf00000
1988 && opcode->opcode != 0xfaf40000)
1990 /* A format D2 instruction where the 16bit immediate is
1991 really a single 16bit value, not two 8bit values. */
1992 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1993 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1995 else if (opcode->format == FMT_D2)
1997 /* A format D2 instruction where the 16bit immediate
1998 is really two 8bit immediates. */
1999 number_to_chars_bigendian (f, insn, 4);
2001 else if (opcode->format == FMT_D3)
2003 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2004 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2005 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2007 else if (opcode->format == FMT_D4)
2009 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2011 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2012 number_to_chars_littleendian (f + 2, temp, 4);
2014 else if (opcode->format == FMT_D5)
2016 unsigned long temp = (((insn & 0xffff) << 16)
2017 | ((extension >> 8) & 0xffff));
2019 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2020 number_to_chars_littleendian (f + 2, temp, 4);
2021 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2023 else if (opcode->format == FMT_D8)
2025 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2027 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2028 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2029 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2031 else if (opcode->format == FMT_D9)
2033 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2035 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2036 number_to_chars_littleendian (f + 3, temp, 4);
2039 /* Create any fixups. */
2040 for (i = 0; i < fc; i++)
2042 const struct mn10300_operand *operand;
2044 operand = &mn10300_operands[fixups[i].opindex];
2045 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2047 reloc_howto_type *reloc_howto;
2052 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2058 size = bfd_get_reloc_size (reloc_howto);
2060 if (size < 1 || size > 4)
2064 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2065 size, &fixups[i].exp,
2066 reloc_howto->pc_relative,
2071 int reloc, pcrel, reloc_size, offset;
2074 reloc = BFD_RELOC_NONE;
2075 /* How big is the reloc? Remember SPLIT relocs are
2076 implicitly 32bits. */
2077 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2079 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2082 reloc_size = operand->bits;
2084 /* Is the reloc pc-relative? */
2085 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2087 offset = size - (reloc_size + operand->shift) / 8;
2089 /* Choose a proper BFD relocation type. */
2092 if (reloc_size == 32)
2093 reloc = BFD_RELOC_32_PCREL;
2094 else if (reloc_size == 16)
2095 reloc = BFD_RELOC_16_PCREL;
2096 else if (reloc_size == 8)
2097 reloc = BFD_RELOC_8_PCREL;
2103 if (reloc_size == 32)
2104 reloc = BFD_RELOC_32;
2105 else if (reloc_size == 16)
2106 reloc = BFD_RELOC_16;
2107 else if (reloc_size == 8)
2108 reloc = BFD_RELOC_8;
2113 /* Convert the size of the reloc into what fix_new_exp wants. */
2114 reloc_size = reloc_size / 8;
2115 if (reloc_size == 8)
2117 else if (reloc_size == 16)
2119 else if (reloc_size == 32)
2122 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2123 reloc_size, &fixups[i].exp, pcrel,
2124 ((bfd_reloc_code_real_type) reloc));
2127 fixP->fx_offset += offset;
2131 dwarf2_emit_insn (size);
2135 /* If while processing a fixup, a reloc really needs to be created
2136 then it is done here. */
2139 tc_gen_reloc (seg, fixp)
2140 asection *seg ATTRIBUTE_UNUSED;
2144 reloc = (arelent *) xmalloc (sizeof (arelent));
2146 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2147 if (reloc->howto == (reloc_howto_type *) NULL)
2149 as_bad_where (fixp->fx_file, fixp->fx_line,
2150 _("reloc %d not supported by object file format"),
2151 (int) fixp->fx_r_type);
2154 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2156 if (fixp->fx_addsy && fixp->fx_subsy)
2158 reloc->sym_ptr_ptr = NULL;
2160 /* If we got a difference between two symbols, and the
2161 subtracted symbol is in the current section, use a
2162 PC-relative relocation. If both symbols are in the same
2163 section, the difference would have already been simplified
2165 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2167 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2168 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2169 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2172 switch (fixp->fx_r_type)
2175 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2180 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2181 BFD_RELOC_16_PCREL);
2185 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2186 BFD_RELOC_24_PCREL);
2190 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2191 BFD_RELOC_32_PCREL);
2195 /* Try to compute the absolute value below. */
2200 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2201 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2203 as_bad_where (fixp->fx_file, fixp->fx_line,
2204 "Difference of symbols in different sections is not supported");
2208 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2210 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2211 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2213 switch (fixp->fx_r_type)
2216 md_number_to_chars (fixpos, reloc->addend, 1);
2220 md_number_to_chars (fixpos, reloc->addend, 2);
2224 md_number_to_chars (fixpos, reloc->addend, 3);
2228 md_number_to_chars (fixpos, reloc->addend, 4);
2232 reloc->sym_ptr_ptr = (asymbol **) &bfd_abs_symbol;
2237 if (reloc->sym_ptr_ptr)
2238 free (reloc->sym_ptr_ptr);
2244 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2245 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2246 reloc->addend = fixp->fx_offset;
2252 md_estimate_size_before_relax (fragp, seg)
2256 if (fragp->fr_subtype == 6
2257 && (!S_IS_DEFINED (fragp->fr_symbol)
2258 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2259 fragp->fr_subtype = 7;
2260 else if (fragp->fr_subtype == 8
2261 && (!S_IS_DEFINED (fragp->fr_symbol)
2262 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2263 fragp->fr_subtype = 9;
2264 else if (fragp->fr_subtype == 10
2265 && (!S_IS_DEFINED (fragp->fr_symbol)
2266 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2267 fragp->fr_subtype = 12;
2269 if (fragp->fr_subtype == 13)
2271 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2274 return md_relax_table[fragp->fr_subtype].rlx_length;
2278 md_pcrel_from (fixp)
2281 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
2283 /* The symbol is undefined. Let the linker figure it out. */
2286 return fixp->fx_frag->fr_address + fixp->fx_where;
2290 md_apply_fix3 (fixP, valP, seg)
2295 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2297 int value = (int) * valP;
2299 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2301 /* This should never happen. */
2302 if (seg->flags & SEC_ALLOC)
2305 /* The value we are passed in *valuep includes the symbol values.
2306 Since we are using BFD_ASSEMBLER, if we are doing this relocation
2307 the code in write.c is going to call bfd_install_relocation, which
2308 is also going to use the symbol value. That means that if the
2309 reloc is fully resolved we want to use *valuep since
2310 bfd_install_relocation is not being used.
2312 However, if the reloc is not fully resolved we do not want to use
2313 *valuep, and must use fx_offset instead. However, if the reloc
2314 is PC relative, we do want to use *valuep since it includes the
2315 result of md_pcrel_from. */
2316 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2317 value = fixP->fx_offset;
2319 /* If the fix is relative to a symbol which is not defined, or not
2320 in the same segment as the fix, we cannot resolve it here. */
2321 if (fixP->fx_addsy != NULL
2322 && (! S_IS_DEFINED (fixP->fx_addsy)
2323 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2329 switch (fixP->fx_r_type)
2332 case BFD_RELOC_8_PCREL:
2337 case BFD_RELOC_16_PCREL:
2342 case BFD_RELOC_32_PCREL:
2346 case BFD_RELOC_VTABLE_INHERIT:
2347 case BFD_RELOC_VTABLE_ENTRY:
2351 case BFD_RELOC_NONE:
2353 as_bad_where (fixP->fx_file, fixP->fx_line,
2354 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2357 md_number_to_chars (fixpos, value, size);
2359 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2360 if (fixP->fx_addsy == NULL)
2364 /* Return zero if the fixup in fixp should be left alone and not
2368 mn10300_fix_adjustable (fixp)
2371 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2372 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2375 /* Do not adjust relocations involving symbols in code sections,
2376 because it breaks linker relaxations. This could be fixed in the
2377 linker, but this fix is simpler, and it pretty much only affects
2378 object size a little bit. */
2379 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2385 /* Insert an operand value into an instruction. */
2388 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2389 unsigned long *insnp;
2390 unsigned long *extensionp;
2391 const struct mn10300_operand *operand;
2397 /* No need to check 32bit operands for a bit. Note that
2398 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2399 if (operand->bits != 32
2400 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2406 bits = operand->bits;
2407 if (operand->flags & MN10300_OPERAND_24BIT)
2410 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2412 max = (1 << (bits - 1)) - 1;
2413 min = - (1 << (bits - 1));
2417 max = (1 << bits) - 1;
2423 if (test < (offsetT) min || test > (offsetT) max)
2426 _("operand out of range (%s not between %ld and %ld)");
2429 sprint_value (buf, test);
2430 if (file == (char *) NULL)
2431 as_warn (err, buf, min, max);
2433 as_warn_where (file, line, err, buf, min, max);
2437 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2439 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2440 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2443 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2445 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2446 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2449 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2451 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2452 explanation of these variables. Note that FMT-implied shifts
2453 are not taken into account for FP registers. */
2454 unsigned long mask_low, mask_high;
2455 int shl_low, shr_high, shl_high;
2457 switch (operand->bits)
2460 /* Handle regular FP registers. */
2461 if (operand->shift >= 0)
2463 /* This is an `m' register. */
2464 shl_low = operand->shift;
2465 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2469 /* This is an `n' register. */
2470 shl_low = -operand->shift;
2471 shl_high = shl_low / 4;
2480 /* Handle accumulators. */
2481 shl_low = -operand->shift;
2491 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2492 | ((val & mask_low) << shl_low));
2494 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2496 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2497 << (operand->shift + shift));
2499 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2500 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2501 << (operand->shift + shift + operand->bits));
2505 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2506 << (operand->shift + shift));
2508 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2509 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2510 << (operand->shift + shift + operand->bits));
2514 static unsigned long
2515 check_operand (insn, operand, val)
2516 unsigned long insn ATTRIBUTE_UNUSED;
2517 const struct mn10300_operand *operand;
2520 /* No need to check 32bit operands for a bit. Note that
2521 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2522 if (operand->bits != 32
2523 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2529 bits = operand->bits;
2530 if (operand->flags & MN10300_OPERAND_24BIT)
2533 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2535 max = (1 << (bits - 1)) - 1;
2536 min = - (1 << (bits - 1));
2540 max = (1 << bits) - 1;
2546 if (test < (offsetT) min || test > (offsetT) max)
2555 set_arch_mach (mach)
2558 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2559 as_warn (_("could not set architecture and machine"));
2561 current_machine = mach;