1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "opcode/mn10300.h"
27 /* Structure to hold information about predefined registers. */
34 /* Generic assembler global variables which must be defined by all targets. */
36 /* Characters which always start a comment. */
37 const char comment_chars[] = "#";
39 /* Characters which start a comment at the beginning of a line. */
40 const char line_comment_chars[] = ";#";
42 /* Characters which may be used to separate multiple commands on a
44 const char line_separator_chars[] = ";";
46 /* Characters which are used to indicate an exponent in a floating
48 const char EXP_CHARS[] = "eE";
50 /* Characters which mean that a number is a floating point constant,
52 const char FLT_CHARS[] = "dD";
55 const relax_typeS md_relax_table[] = {
58 {0x7fff, -0x8000, 5, 2},
59 {0x7fffffff, -0x80000000, 7, 0},
61 /* bCC relaxing (uncommon cases) */
63 {0x7fff, -0x8000, 6, 5},
64 {0x7fffffff, -0x80000000, 8, 0},
67 {0x7fff, -0x8000, 5, 7},
68 {0x7fffffff, -0x80000000, 7, 0},
71 {0x7fff, -0x8000, 4, 9},
72 {0x7fffffff, -0x80000000, 6, 0},
76 {0x7fff, -0x8000, 3, 12},
77 {0x7fffffff, -0x80000000, 5, 0},
82 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
83 const struct mn10300_operand *,
84 offsetT, char *, unsigned,
86 static unsigned long check_operand PARAMS ((unsigned long,
87 const struct mn10300_operand *,
89 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
90 static boolean data_register_name PARAMS ((expressionS *expressionP));
91 static boolean address_register_name PARAMS ((expressionS *expressionP));
92 static boolean other_register_name PARAMS ((expressionS *expressionP));
93 static void set_arch_mach PARAMS ((int));
95 static int current_machine;
98 #define MAX_INSN_FIXUPS (5)
103 bfd_reloc_code_real_type reloc;
105 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
108 /* We must store the value of each register operand so that we can
109 verify that certain registers do not match. */
110 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
112 const char *md_shortopts = "";
113 struct option md_longopts[] = {
114 {NULL, no_argument, NULL, 0}
116 size_t md_longopts_size = sizeof(md_longopts);
118 /* The target specific pseudo-ops which we support. */
119 const pseudo_typeS md_pseudo_table[] =
121 { "am30", set_arch_mach, AM30 },
122 { "am33", set_arch_mach, AM33 },
123 { "mn10300", set_arch_mach, MN103 },
127 #define HAVE_AM33 (current_machine == AM33)
128 #define HAVE_AM30 (current_machine == AM30)
130 /* Opcode hash table. */
131 static struct hash_control *mn10300_hash;
133 /* This table is sorted. Suitable for searching by a binary search. */
134 static const struct reg_name data_registers[] =
141 #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name))
143 static const struct reg_name address_registers[] =
150 #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name))
152 static const struct reg_name r_registers[] =
195 #define R_REG_NAME_CNT (sizeof(r_registers) / sizeof(struct reg_name))
197 static const struct reg_name xr_registers[] =
221 #define XR_REG_NAME_CNT (sizeof(xr_registers) / sizeof(struct reg_name))
224 static const struct reg_name other_registers[] =
230 #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name))
232 /* reg_name_search does a binary search of the given register table
233 to see if "name" is a valid regiter name. Returns the register
234 number from the array on success, or -1 on failure. */
237 reg_name_search (regs, regcount, name)
238 const struct reg_name *regs;
242 int middle, low, high;
250 middle = (low + high) / 2;
251 cmp = strcasecmp (name, regs[middle].name);
257 return regs[middle].value;
264 /* Summary of register_name().
266 * in: Input_line_pointer points to 1st char of operand.
268 * out: A expressionS.
269 * The operand may have been a register: in this case, X_op == O_register,
270 * X_add_number is set to the register number, and truth is returned.
271 * Input_line_pointer->(next non-blank) char after operand, or is in
272 * its original state.
275 r_register_name (expressionP)
276 expressionS *expressionP;
283 /* Find the spelling of the operand */
284 start = name = input_line_pointer;
286 c = get_symbol_end ();
287 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
289 /* look to see if it's in the register table */
292 expressionP->X_op = O_register;
293 expressionP->X_add_number = reg_number;
295 /* make the rest nice */
296 expressionP->X_add_symbol = NULL;
297 expressionP->X_op_symbol = NULL;
298 *input_line_pointer = c; /* put back the delimiting char */
303 /* reset the line as if we had not done anything */
304 *input_line_pointer = c; /* put back the delimiting char */
305 input_line_pointer = start; /* reset input_line pointer */
310 /* Summary of register_name().
312 * in: Input_line_pointer points to 1st char of operand.
314 * out: A expressionS.
315 * The operand may have been a register: in this case, X_op == O_register,
316 * X_add_number is set to the register number, and truth is returned.
317 * Input_line_pointer->(next non-blank) char after operand, or is in
318 * its original state.
321 xr_register_name (expressionP)
322 expressionS *expressionP;
329 /* Find the spelling of the operand */
330 start = name = input_line_pointer;
332 c = get_symbol_end ();
333 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
335 /* look to see if it's in the register table */
338 expressionP->X_op = O_register;
339 expressionP->X_add_number = reg_number;
341 /* make the rest nice */
342 expressionP->X_add_symbol = NULL;
343 expressionP->X_op_symbol = NULL;
344 *input_line_pointer = c; /* put back the delimiting char */
349 /* reset the line as if we had not done anything */
350 *input_line_pointer = c; /* put back the delimiting char */
351 input_line_pointer = start; /* reset input_line pointer */
356 /* Summary of register_name().
358 * in: Input_line_pointer points to 1st char of operand.
360 * out: A expressionS.
361 * The operand may have been a register: in this case, X_op == O_register,
362 * X_add_number is set to the register number, and truth is returned.
363 * Input_line_pointer->(next non-blank) char after operand, or is in
364 * its original state.
367 data_register_name (expressionP)
368 expressionS *expressionP;
375 /* Find the spelling of the operand */
376 start = name = input_line_pointer;
378 c = get_symbol_end ();
379 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
381 /* look to see if it's in the register table */
384 expressionP->X_op = O_register;
385 expressionP->X_add_number = reg_number;
387 /* make the rest nice */
388 expressionP->X_add_symbol = NULL;
389 expressionP->X_op_symbol = NULL;
390 *input_line_pointer = c; /* put back the delimiting char */
395 /* reset the line as if we had not done anything */
396 *input_line_pointer = c; /* put back the delimiting char */
397 input_line_pointer = start; /* reset input_line pointer */
402 /* Summary of register_name().
404 * in: Input_line_pointer points to 1st char of operand.
406 * out: A expressionS.
407 * The operand may have been a register: in this case, X_op == O_register,
408 * X_add_number is set to the register number, and truth is returned.
409 * Input_line_pointer->(next non-blank) char after operand, or is in
410 * its original state.
413 address_register_name (expressionP)
414 expressionS *expressionP;
421 /* Find the spelling of the operand */
422 start = name = input_line_pointer;
424 c = get_symbol_end ();
425 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
427 /* look to see if it's in the register table */
430 expressionP->X_op = O_register;
431 expressionP->X_add_number = reg_number;
433 /* make the rest nice */
434 expressionP->X_add_symbol = NULL;
435 expressionP->X_op_symbol = NULL;
436 *input_line_pointer = c; /* put back the delimiting char */
441 /* reset the line as if we had not done anything */
442 *input_line_pointer = c; /* put back the delimiting char */
443 input_line_pointer = start; /* reset input_line pointer */
448 /* Summary of register_name().
450 * in: Input_line_pointer points to 1st char of operand.
452 * out: A expressionS.
453 * The operand may have been a register: in this case, X_op == O_register,
454 * X_add_number is set to the register number, and truth is returned.
455 * Input_line_pointer->(next non-blank) char after operand, or is in
456 * its original state.
459 other_register_name (expressionP)
460 expressionS *expressionP;
467 /* Find the spelling of the operand */
468 start = name = input_line_pointer;
470 c = get_symbol_end ();
471 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
473 /* look to see if it's in the register table */
476 expressionP->X_op = O_register;
477 expressionP->X_add_number = reg_number;
479 /* make the rest nice */
480 expressionP->X_add_symbol = NULL;
481 expressionP->X_op_symbol = NULL;
482 *input_line_pointer = c; /* put back the delimiting char */
487 /* reset the line as if we had not done anything */
488 *input_line_pointer = c; /* put back the delimiting char */
489 input_line_pointer = start; /* reset input_line pointer */
495 md_show_usage (stream)
498 fprintf(stream, _("MN10300 options:\n\
503 md_parse_option (c, arg)
511 md_undefined_symbol (name)
518 md_atof (type, litp, sizep)
524 LITTLENUM_TYPE words[4];
540 return "bad call to md_atof";
543 t = atof_ieee (input_line_pointer, type, words);
545 input_line_pointer = t;
549 for (i = prec - 1; i >= 0; i--)
551 md_number_to_chars (litp, (valueT) words[i], 2);
560 md_convert_frag (abfd, sec, fragP)
565 static unsigned long label_count = 0;
568 subseg_change (sec, 0);
569 if (fragP->fr_subtype == 0)
571 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
572 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
576 else if (fragP->fr_subtype == 1)
578 /* Reverse the condition of the first branch. */
579 int offset = fragP->fr_fix;
580 int opcode = fragP->fr_literal[offset] & 0xff;
617 fragP->fr_literal[offset] = opcode;
619 /* Create a fixup for the reversed conditional branch. */
620 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
621 fix_new (fragP, fragP->fr_fix + 1, 1,
622 symbol_new (buf, sec, 0, fragP->fr_next),
623 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
625 /* Now create the unconditional branch + fixup to the
627 fragP->fr_literal[offset + 2] = 0xcc;
628 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
629 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
633 else if (fragP->fr_subtype == 2)
635 /* Reverse the condition of the first branch. */
636 int offset = fragP->fr_fix;
637 int opcode = fragP->fr_literal[offset] & 0xff;
674 fragP->fr_literal[offset] = opcode;
676 /* Create a fixup for the reversed conditional branch. */
677 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
678 fix_new (fragP, fragP->fr_fix + 1, 1,
679 symbol_new (buf, sec, 0, fragP->fr_next),
680 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
682 /* Now create the unconditional branch + fixup to the
684 fragP->fr_literal[offset + 2] = 0xdc;
685 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
686 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
690 else if (fragP->fr_subtype == 3)
692 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
693 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
697 else if (fragP->fr_subtype == 4)
699 /* Reverse the condition of the first branch. */
700 int offset = fragP->fr_fix;
701 int opcode = fragP->fr_literal[offset + 1] & 0xff;
720 fragP->fr_literal[offset + 1] = opcode;
722 /* Create a fixup for the reversed conditional branch. */
723 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
724 fix_new (fragP, fragP->fr_fix + 2, 1,
725 symbol_new (buf, sec, 0, fragP->fr_next),
726 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
728 /* Now create the unconditional branch + fixup to the
730 fragP->fr_literal[offset + 3] = 0xcc;
731 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
732 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
736 else if (fragP->fr_subtype == 5)
738 /* Reverse the condition of the first branch. */
739 int offset = fragP->fr_fix;
740 int opcode = fragP->fr_literal[offset + 1] & 0xff;
756 fragP->fr_literal[offset + 1] = opcode;
758 /* Create a fixup for the reversed conditional branch. */
759 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
760 fix_new (fragP, fragP->fr_fix + 2, 1,
761 symbol_new (buf, sec, 0, fragP->fr_next),
762 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
764 /* Now create the unconditional branch + fixup to the
766 fragP->fr_literal[offset + 3] = 0xdc;
767 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
768 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
772 else if (fragP->fr_subtype == 6)
774 int offset = fragP->fr_fix;
775 fragP->fr_literal[offset] = 0xcd;
776 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
777 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
781 else if (fragP->fr_subtype == 7)
783 int offset = fragP->fr_fix;
784 fragP->fr_literal[offset] = 0xdd;
785 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
786 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
788 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
789 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
793 else if (fragP->fr_subtype == 8)
795 int offset = fragP->fr_fix;
796 fragP->fr_literal[offset] = 0xfa;
797 fragP->fr_literal[offset + 1] = 0xff;
798 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
799 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
803 else if (fragP->fr_subtype == 9)
805 int offset = fragP->fr_fix;
806 fragP->fr_literal[offset] = 0xfc;
807 fragP->fr_literal[offset + 1] = 0xff;
809 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
810 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
814 else if (fragP->fr_subtype == 10)
816 fragP->fr_literal[fragP->fr_fix] = 0xca;
817 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
818 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
822 else if (fragP->fr_subtype == 11)
824 int offset = fragP->fr_fix;
825 fragP->fr_literal[offset] = 0xcc;
827 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
828 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
832 else if (fragP->fr_subtype == 12)
834 int offset = fragP->fr_fix;
835 fragP->fr_literal[offset] = 0xdc;
837 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
838 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
847 md_section_align (seg, addr)
851 int align = bfd_get_section_alignment (stdoutput, seg);
852 return ((addr + (1 << align) - 1) & (-1 << align));
858 char *prev_name = "";
859 register const struct mn10300_opcode *op;
861 mn10300_hash = hash_new();
863 /* Insert unique names into hash table. The MN10300 instruction set
864 has many identical opcode names that have different opcodes based
865 on the operands. This hash table then provides a quick index to
866 the first opcode with a particular name in the opcode table. */
868 op = mn10300_opcodes;
871 if (strcmp (prev_name, op->name))
873 prev_name = (char *) op->name;
874 hash_insert (mn10300_hash, op->name, (char *) op);
879 /* This is both a simplification (we don't have to write md_apply_fix)
880 and support for future optimizations (branch shortening and similar
881 stuff in the linker). */
884 /* Set the default machine type. */
885 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
886 as_warn (_("could not set architecture and machine"));
888 current_machine = MN103;
896 struct mn10300_opcode *opcode;
897 struct mn10300_opcode *next_opcode;
898 const unsigned char *opindex_ptr;
899 int next_opindex, relaxable;
900 unsigned long insn, extension, size = 0;
905 /* Get the opcode. */
906 for (s = str; *s != '\0' && ! isspace (*s); s++)
911 /* find the first opcode with the proper name */
912 opcode = (struct mn10300_opcode *)hash_find (mn10300_hash, str);
915 as_bad (_("Unrecognized opcode: `%s'"), str);
920 while (isspace (*str))
923 input_line_pointer = str;
933 errmsg = _("Invalid opcode/operands");
935 /* Reset the array of register operands. */
936 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
942 insn = opcode->opcode;
945 /* If the instruction is not available on the current machine
946 then it can not possibly match. */
948 && !(opcode->machine == AM33 && HAVE_AM33)
949 && !(opcode->machine == AM30 && HAVE_AM30))
952 for (op_idx = 1, opindex_ptr = opcode->operands;
954 opindex_ptr++, op_idx++)
956 const struct mn10300_operand *operand;
959 if (next_opindex == 0)
961 operand = &mn10300_operands[*opindex_ptr];
965 operand = &mn10300_operands[next_opindex];
969 while (*str == ' ' || *str == ',')
972 if (operand->flags & MN10300_OPERAND_RELAX)
975 /* Gather the operand. */
976 hold = input_line_pointer;
977 input_line_pointer = str;
979 if (operand->flags & MN10300_OPERAND_PAREN)
981 if (*input_line_pointer != ')' && *input_line_pointer != '(')
983 input_line_pointer = hold;
987 input_line_pointer++;
990 /* See if we can match the operands. */
991 else if (operand->flags & MN10300_OPERAND_DREG)
993 if (!data_register_name (&ex))
995 input_line_pointer = hold;
1000 else if (operand->flags & MN10300_OPERAND_AREG)
1002 if (!address_register_name (&ex))
1004 input_line_pointer = hold;
1009 else if (operand->flags & MN10300_OPERAND_SP)
1011 char *start = input_line_pointer;
1012 char c = get_symbol_end ();
1014 if (strcasecmp (start, "sp") != 0)
1016 *input_line_pointer = c;
1017 input_line_pointer = hold;
1021 *input_line_pointer = c;
1024 else if (operand->flags & MN10300_OPERAND_RREG)
1026 if (!r_register_name (&ex))
1028 input_line_pointer = hold;
1033 else if (operand->flags & MN10300_OPERAND_XRREG)
1035 if (!xr_register_name (&ex))
1037 input_line_pointer = hold;
1042 else if (operand->flags & MN10300_OPERAND_USP)
1044 char *start = input_line_pointer;
1045 char c = get_symbol_end ();
1047 if (strcasecmp (start, "usp") != 0)
1049 *input_line_pointer = c;
1050 input_line_pointer = hold;
1054 *input_line_pointer = c;
1057 else if (operand->flags & MN10300_OPERAND_SSP)
1059 char *start = input_line_pointer;
1060 char c = get_symbol_end ();
1062 if (strcasecmp (start, "ssp") != 0)
1064 *input_line_pointer = c;
1065 input_line_pointer = hold;
1069 *input_line_pointer = c;
1072 else if (operand->flags & MN10300_OPERAND_MSP)
1074 char *start = input_line_pointer;
1075 char c = get_symbol_end ();
1077 if (strcasecmp (start, "msp") != 0)
1079 *input_line_pointer = c;
1080 input_line_pointer = hold;
1084 *input_line_pointer = c;
1087 else if (operand->flags & MN10300_OPERAND_PC)
1089 char *start = input_line_pointer;
1090 char c = get_symbol_end ();
1092 if (strcasecmp (start, "pc") != 0)
1094 *input_line_pointer = c;
1095 input_line_pointer = hold;
1099 *input_line_pointer = c;
1102 else if (operand->flags & MN10300_OPERAND_EPSW)
1104 char *start = input_line_pointer;
1105 char c = get_symbol_end ();
1107 if (strcasecmp (start, "epsw") != 0)
1109 *input_line_pointer = c;
1110 input_line_pointer = hold;
1114 *input_line_pointer = c;
1117 else if (operand->flags & MN10300_OPERAND_PLUS)
1119 if (*input_line_pointer != '+')
1121 input_line_pointer = hold;
1125 input_line_pointer++;
1128 else if (operand->flags & MN10300_OPERAND_PSW)
1130 char *start = input_line_pointer;
1131 char c = get_symbol_end ();
1133 if (strcasecmp (start, "psw") != 0)
1135 *input_line_pointer = c;
1136 input_line_pointer = hold;
1140 *input_line_pointer = c;
1143 else if (operand->flags & MN10300_OPERAND_MDR)
1145 char *start = input_line_pointer;
1146 char c = get_symbol_end ();
1148 if (strcasecmp (start, "mdr") != 0)
1150 *input_line_pointer = c;
1151 input_line_pointer = hold;
1155 *input_line_pointer = c;
1158 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1160 unsigned int value = 0;
1161 if (*input_line_pointer != '[')
1163 input_line_pointer = hold;
1169 input_line_pointer++;
1171 /* We used to reject a null register list here; however,
1172 we accept it now so the compiler can emit "call" instructions
1173 for all calls to named functions.
1175 The linker can then fill in the appropriate bits for the
1176 register list and stack size or change the instruction
1177 into a "calls" if using "call" is not profitable. */
1178 while (*input_line_pointer != ']')
1183 if (*input_line_pointer == ',')
1184 input_line_pointer++;
1186 start = input_line_pointer;
1187 c = get_symbol_end ();
1189 if (strcasecmp (start, "d2") == 0)
1192 *input_line_pointer = c;
1194 else if (strcasecmp (start, "d3") == 0)
1197 *input_line_pointer = c;
1199 else if (strcasecmp (start, "a2") == 0)
1202 *input_line_pointer = c;
1204 else if (strcasecmp (start, "a3") == 0)
1207 *input_line_pointer = c;
1209 else if (strcasecmp (start, "other") == 0)
1212 *input_line_pointer = c;
1215 && strcasecmp (start, "exreg0") == 0)
1218 *input_line_pointer = c;
1221 && strcasecmp (start, "exreg1") == 0)
1224 *input_line_pointer = c;
1227 && strcasecmp (start, "exother") == 0)
1230 *input_line_pointer = c;
1233 && strcasecmp (start, "all") == 0)
1236 *input_line_pointer = c;
1240 input_line_pointer = hold;
1245 input_line_pointer++;
1246 mn10300_insert_operand (&insn, &extension, operand,
1247 value, (char *) NULL, 0, 0);
1251 else if (data_register_name (&ex))
1253 input_line_pointer = hold;
1257 else if (address_register_name (&ex))
1259 input_line_pointer = hold;
1263 else if (other_register_name (&ex))
1265 input_line_pointer = hold;
1269 else if (HAVE_AM33 && r_register_name (&ex))
1271 input_line_pointer = hold;
1275 else if (HAVE_AM33 && xr_register_name (&ex))
1277 input_line_pointer = hold;
1281 else if (*str == ')' || *str == '(')
1283 input_line_pointer = hold;
1295 errmsg = _("illegal operand");
1298 errmsg = _("missing operand");
1304 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1306 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1307 if ((operand->flags & mask) == 0)
1309 input_line_pointer = hold;
1314 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1316 else if (opcode->format == FMT_D2
1317 || opcode->format == FMT_D4
1318 || opcode->format == FMT_S2
1319 || opcode->format == FMT_S4
1320 || opcode->format == FMT_S6
1321 || opcode->format == FMT_D5)
1323 else if (opcode->format == FMT_D7)
1325 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1330 mn10300_insert_operand (&insn, &extension, operand,
1331 ex.X_add_number, (char *) NULL,
1335 /* And note the register number in the register array. */
1336 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1341 /* If this operand can be promoted, and it doesn't
1342 fit into the allocated bitfield for this insn,
1343 then promote it (ie this opcode does not match). */
1345 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1346 && ! check_operand (insn, operand, ex.X_add_number))
1348 input_line_pointer = hold;
1353 mn10300_insert_operand (&insn, &extension, operand,
1354 ex.X_add_number, (char *) NULL,
1359 /* If this operand can be promoted, then this opcode didn't
1360 match since we can't know if it needed promotion! */
1361 if (operand->flags & MN10300_OPERAND_PROMOTE)
1363 input_line_pointer = hold;
1368 /* We need to generate a fixup for this expression. */
1369 if (fc >= MAX_INSN_FIXUPS)
1370 as_fatal (_("too many fixups"));
1371 fixups[fc].exp = ex;
1372 fixups[fc].opindex = *opindex_ptr;
1373 fixups[fc].reloc = BFD_RELOC_UNUSED;
1379 str = input_line_pointer;
1380 input_line_pointer = hold;
1382 while (*str == ' ' || *str == ',')
1387 /* Make sure we used all the operands! */
1391 /* If this instruction has registers that must not match, verify
1392 that they do indeed not match. */
1393 if (opcode->no_match_operands)
1397 /* Look at each operand to see if it's marked. */
1398 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1400 if ((1 << i) & opcode->no_match_operands)
1404 /* operand I is marked. Check that it does not match any
1405 operands > I which are marked. */
1406 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1408 if (((1 << j) & opcode->no_match_operands)
1409 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1411 errmsg = _("Invalid register specification.");
1423 next_opcode = opcode + 1;
1424 if (!strcmp(next_opcode->name, opcode->name))
1426 opcode = next_opcode;
1430 as_bad ("%s", errmsg);
1436 while (isspace (*str))
1440 as_bad (_("junk at end of line: `%s'"), str);
1442 input_line_pointer = str;
1444 /* Determine the size of the instruction. */
1445 if (opcode->format == FMT_S0)
1448 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1451 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1454 if (opcode->format == FMT_D6)
1457 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1460 if (opcode->format == FMT_D8)
1463 if (opcode->format == FMT_D9)
1466 if (opcode->format == FMT_S4)
1469 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1472 if (opcode->format == FMT_D2)
1475 if (opcode->format == FMT_D4)
1478 if (relaxable && fc > 0)
1485 /* Handle bra specially. Basically treat it like jmp so
1486 that we automatically handle 8, 16 and 32 bit offsets
1487 correctly as well as jumps to an undefined address.
1489 It is also important to not treat it like other bCC
1490 instructions since the long forms of bra is different
1491 from other bCC instructions. */
1492 if (opcode->opcode == 0xca00)
1504 else if (size == 3 && opcode->opcode == 0xcc0000)
1506 /* bCC (uncommon cases) */
1510 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1511 fixups[0].exp.X_add_symbol,
1512 fixups[0].exp.X_add_number,
1513 (char *)fixups[0].opindex);
1515 /* This is pretty hokey. We basically just care about the
1516 opcode, so we have to write out the first word big endian.
1518 The exception is "call", which has two operands that we
1521 The first operand (the register list) happens to be in the
1522 first instruction word, and will be in the right place if
1523 we output the first word in big endian mode.
1525 The second operand (stack size) is in the extension word,
1526 and we want it to appear as the first character in the extension
1527 word (as it appears in memory). Luckily, writing the extension
1528 word in big endian format will do what we want. */
1529 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1532 number_to_chars_bigendian (f + 4, extension, 4);
1533 number_to_chars_bigendian (f + 8, 0, size - 8);
1536 number_to_chars_bigendian (f + 4, extension, size - 4);
1540 /* Allocate space for the instruction. */
1541 f = frag_more (size);
1543 /* Fill in bytes for the instruction. Note that opcode fields
1544 are written big-endian, 16 & 32bit immediates are written
1545 little endian. Egad. */
1546 if (opcode->format == FMT_S0
1547 || opcode->format == FMT_S1
1548 || opcode->format == FMT_D0
1549 || opcode->format == FMT_D6
1550 || opcode->format == FMT_D7
1551 || opcode->format == FMT_D10
1552 || opcode->format == FMT_D1)
1554 number_to_chars_bigendian (f, insn, size);
1556 else if (opcode->format == FMT_S2
1557 && opcode->opcode != 0xdf0000
1558 && opcode->opcode != 0xde0000)
1560 /* A format S2 instruction that is _not_ "ret" and "retf". */
1561 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1562 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1564 else if (opcode->format == FMT_S2)
1566 /* This must be a ret or retf, which is written entirely in
1567 big-endian format. */
1568 number_to_chars_bigendian (f, insn, 3);
1570 else if (opcode->format == FMT_S4
1571 && opcode->opcode != 0xdc000000)
1573 /* This must be a format S4 "call" instruction. What a pain. */
1574 unsigned long temp = (insn >> 8) & 0xffff;
1575 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1576 number_to_chars_littleendian (f + 1, temp, 2);
1577 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1578 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1580 else if (opcode->format == FMT_S4)
1582 /* This must be a format S4 "jmp" instruction. */
1583 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1584 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1585 number_to_chars_littleendian (f + 1, temp, 4);
1587 else if (opcode->format == FMT_S6)
1589 unsigned long temp = ((insn & 0xffffff) << 8)
1590 | ((extension >> 16) & 0xff);
1591 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1592 number_to_chars_littleendian (f + 1, temp, 4);
1593 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1594 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1596 else if (opcode->format == FMT_D2
1597 && opcode->opcode != 0xfaf80000
1598 && opcode->opcode != 0xfaf00000
1599 && opcode->opcode != 0xfaf40000)
1601 /* A format D2 instruction where the 16bit immediate is
1602 really a single 16bit value, not two 8bit values. */
1603 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1604 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1606 else if (opcode->format == FMT_D2)
1608 /* A format D2 instruction where the 16bit immediate
1609 is really two 8bit immediates. */
1610 number_to_chars_bigendian (f, insn, 4);
1612 else if (opcode->format == FMT_D4)
1614 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1615 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1616 number_to_chars_littleendian (f + 2, temp, 4);
1618 else if (opcode->format == FMT_D5)
1620 unsigned long temp = ((insn & 0xffff) << 16)
1621 | ((extension >> 8) & 0xffff);
1622 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1623 number_to_chars_littleendian (f + 2, temp, 4);
1624 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1626 else if (opcode->format == FMT_D8)
1628 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1629 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1630 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1631 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1633 else if (opcode->format == FMT_D9)
1635 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1636 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1637 number_to_chars_littleendian (f + 3, temp, 4);
1640 /* Create any fixups. */
1641 for (i = 0; i < fc; i++)
1643 const struct mn10300_operand *operand;
1645 operand = &mn10300_operands[fixups[i].opindex];
1646 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1648 reloc_howto_type *reloc_howto;
1653 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
1658 size = bfd_get_reloc_size (reloc_howto);
1660 if (size < 1 || size > 4)
1664 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1665 size, &fixups[i].exp,
1666 reloc_howto->pc_relative,
1671 int reloc, pcrel, reloc_size, offset;
1674 reloc = BFD_RELOC_NONE;
1675 /* How big is the reloc? Remember SPLIT relocs are
1676 implicitly 32bits. */
1677 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1679 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1682 reloc_size = operand->bits;
1684 /* Is the reloc pc-relative? */
1685 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1687 /* Gross. This disgusting hack is to make sure we
1688 get the right offset for the 16/32 bit reloc in
1689 "call" instructions. Basically they're a pain
1690 because the reloc isn't at the end of the instruction. */
1691 if ((size == 5 || size == 7)
1692 && (((insn >> 24) & 0xff) == 0xcd
1693 || ((insn >> 24) & 0xff) == 0xdd))
1696 /* Similarly for certain bit instructions which don't
1697 hav their 32bit reloc at the tail of the instruction. */
1699 && (((insn >> 16) & 0xffff) == 0xfe00
1700 || ((insn >> 16) & 0xffff) == 0xfe01
1701 || ((insn >> 16) & 0xffff) == 0xfe02))
1704 offset = size - reloc_size / 8;
1706 /* Choose a proper BFD relocation type. */
1709 if (reloc_size == 32)
1710 reloc = BFD_RELOC_32_PCREL;
1711 else if (reloc_size == 16)
1712 reloc = BFD_RELOC_16_PCREL;
1713 else if (reloc_size == 8)
1714 reloc = BFD_RELOC_8_PCREL;
1720 if (reloc_size == 32)
1721 reloc = BFD_RELOC_32;
1722 else if (reloc_size == 16)
1723 reloc = BFD_RELOC_16;
1724 else if (reloc_size == 8)
1725 reloc = BFD_RELOC_8;
1730 /* Convert the size of the reloc into what fix_new_exp wants. */
1731 reloc_size = reloc_size / 8;
1732 if (reloc_size == 8)
1734 else if (reloc_size == 16)
1736 else if (reloc_size == 32)
1739 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1740 reloc_size, &fixups[i].exp, pcrel,
1741 ((bfd_reloc_code_real_type) reloc));
1744 fixP->fx_offset += offset;
1751 /* if while processing a fixup, a reloc really needs to be created */
1752 /* then it is done here */
1755 tc_gen_reloc (seg, fixp)
1760 reloc = (arelent *) xmalloc (sizeof (arelent));
1762 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1763 if (reloc->howto == (reloc_howto_type *) NULL)
1765 as_bad_where (fixp->fx_file, fixp->fx_line,
1766 _("reloc %d not supported by object file format"),
1767 (int)fixp->fx_r_type);
1770 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1772 if (fixp->fx_addsy && fixp->fx_subsy)
1775 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1776 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1778 as_bad_where (fixp->fx_file, fixp->fx_line,
1779 "Difference of symbols in different sections is not supported");
1783 reloc->sym_ptr_ptr = &bfd_abs_symbol;
1784 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1785 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1789 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof( asymbol *));
1790 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1791 reloc->addend = fixp->fx_offset;
1797 md_estimate_size_before_relax (fragp, seg)
1801 if (fragp->fr_subtype == 0)
1803 if (fragp->fr_subtype == 3)
1805 if (fragp->fr_subtype == 6)
1807 if (!S_IS_DEFINED (fragp->fr_symbol)
1808 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1810 fragp->fr_subtype = 7;
1816 if (fragp->fr_subtype == 8)
1818 if (!S_IS_DEFINED (fragp->fr_symbol)
1819 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1821 fragp->fr_subtype = 9;
1827 if (fragp->fr_subtype == 10)
1829 if (!S_IS_DEFINED (fragp->fr_symbol)
1830 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1832 fragp->fr_subtype = 12;
1841 md_pcrel_from (fixp)
1844 return fixp->fx_frag->fr_address;
1846 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1848 /* The symbol is undefined. Let the linker figure it out. */
1851 return fixp->fx_frag->fr_address + fixp->fx_where;
1856 md_apply_fix3 (fixp, valuep, seg)
1861 /* We shouldn't ever get here because linkrelax is nonzero. */
1867 /* Insert an operand value into an instruction. */
1870 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1871 unsigned long *insnp;
1872 unsigned long *extensionp;
1873 const struct mn10300_operand *operand;
1879 /* No need to check 32bit operands for a bit. Note that
1880 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1881 if (operand->bits != 32
1882 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1888 bits = operand->bits;
1889 if (operand->flags & MN10300_OPERAND_24BIT)
1892 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1894 max = (1 << (bits - 1)) - 1;
1895 min = - (1 << (bits - 1));
1899 max = (1 << bits) - 1;
1906 if (test < (offsetT) min || test > (offsetT) max)
1909 _("operand out of range (%s not between %ld and %ld)");
1912 sprint_value (buf, test);
1913 if (file == (char *) NULL)
1914 as_warn (err, buf, min, max);
1916 as_warn_where (file, line, err, buf, min, max);
1920 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1922 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1923 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1926 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1928 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1929 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1932 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1934 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1935 << (operand->shift + shift));
1937 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1938 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1939 << (operand->shift + shift + operand->bits));
1943 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1944 << (operand->shift + shift));
1946 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1947 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1948 << (operand->shift + shift + operand->bits));
1952 static unsigned long
1953 check_operand (insn, operand, val)
1955 const struct mn10300_operand *operand;
1958 /* No need to check 32bit operands for a bit. Note that
1959 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1960 if (operand->bits != 32
1961 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1967 bits = operand->bits;
1968 if (operand->flags & MN10300_OPERAND_24BIT)
1971 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1973 max = (1 << (bits - 1)) - 1;
1974 min = - (1 << (bits - 1));
1978 max = (1 << bits) - 1;
1985 if (test < (offsetT) min || test > (offsetT) max)
1994 set_arch_mach (mach)
1997 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
1998 as_warn (_("could not set architecture and machine"));
2000 current_machine = mach;