1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
3 Copyright (C) 1996, 1997 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "opcode/mn10300.h"
28 /* Structure to hold information about predefined registers. */
35 /* Generic assembler global variables which must be defined by all targets. */
37 /* Characters which always start a comment. */
38 const char comment_chars[] = "#";
40 /* Characters which start a comment at the beginning of a line. */
41 const char line_comment_chars[] = ";#";
43 /* Characters which may be used to separate multiple commands on a
45 const char line_separator_chars[] = ";";
47 /* Characters which are used to indicate an exponent in a floating
49 const char EXP_CHARS[] = "eE";
51 /* Characters which mean that a number is a floating point constant,
53 const char FLT_CHARS[] = "dD";
56 const relax_typeS md_relax_table[] = {
59 {0x7fff, -0x8000, 5, 2},
60 {0x7fffffff, -0x80000000, 7, 0},
62 /* bCC relaxing (uncommon cases) */
64 {0x7fff, -0x8000, 6, 5},
65 {0x7fffffff, -0x80000000, 8, 0},
68 {0x7fff, -0x8000, 5, 7},
69 {0x7fffffff, -0x80000000, 7, 0},
72 {0x7fff, -0x8000, 4, 9},
73 {0x7fffffff, -0x80000000, 6, 0},
77 {0x7fff, -0x8000, 3, 12},
78 {0x7fffffff, -0x80000000, 5, 0},
83 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
84 const struct mn10300_operand *,
85 offsetT, char *, unsigned,
87 static unsigned long check_operand PARAMS ((unsigned long,
88 const struct mn10300_operand *,
90 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
91 static boolean data_register_name PARAMS ((expressionS *expressionP));
92 static boolean address_register_name PARAMS ((expressionS *expressionP));
93 static boolean other_register_name PARAMS ((expressionS *expressionP));
97 #define MAX_INSN_FIXUPS (5)
102 bfd_reloc_code_real_type reloc;
104 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
107 const char *md_shortopts = "";
108 struct option md_longopts[] = {
109 {NULL, no_argument, NULL, 0}
111 size_t md_longopts_size = sizeof(md_longopts);
113 /* The target specific pseudo-ops which we support. */
114 const pseudo_typeS md_pseudo_table[] =
119 /* Opcode hash table. */
120 static struct hash_control *mn10300_hash;
122 /* This table is sorted. Suitable for searching by a binary search. */
123 static const struct reg_name data_registers[] =
130 #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name))
132 static const struct reg_name address_registers[] =
139 #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name))
141 static const struct reg_name other_registers[] =
147 #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name))
149 /* reg_name_search does a binary search of the given register table
150 to see if "name" is a valid regiter name. Returns the register
151 number from the array on success, or -1 on failure. */
154 reg_name_search (regs, regcount, name)
155 const struct reg_name *regs;
159 int middle, low, high;
167 middle = (low + high) / 2;
168 cmp = strcasecmp (name, regs[middle].name);
174 return regs[middle].value;
181 /* Summary of register_name().
183 * in: Input_line_pointer points to 1st char of operand.
185 * out: A expressionS.
186 * The operand may have been a register: in this case, X_op == O_register,
187 * X_add_number is set to the register number, and truth is returned.
188 * Input_line_pointer->(next non-blank) char after operand, or is in
189 * its original state.
192 data_register_name (expressionP)
193 expressionS *expressionP;
200 /* Find the spelling of the operand */
201 start = name = input_line_pointer;
203 c = get_symbol_end ();
204 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
206 /* look to see if it's in the register table */
209 expressionP->X_op = O_register;
210 expressionP->X_add_number = reg_number;
212 /* make the rest nice */
213 expressionP->X_add_symbol = NULL;
214 expressionP->X_op_symbol = NULL;
215 *input_line_pointer = c; /* put back the delimiting char */
220 /* reset the line as if we had not done anything */
221 *input_line_pointer = c; /* put back the delimiting char */
222 input_line_pointer = start; /* reset input_line pointer */
227 /* Summary of register_name().
229 * in: Input_line_pointer points to 1st char of operand.
231 * out: A expressionS.
232 * The operand may have been a register: in this case, X_op == O_register,
233 * X_add_number is set to the register number, and truth is returned.
234 * Input_line_pointer->(next non-blank) char after operand, or is in
235 * its original state.
238 address_register_name (expressionP)
239 expressionS *expressionP;
246 /* Find the spelling of the operand */
247 start = name = input_line_pointer;
249 c = get_symbol_end ();
250 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
252 /* look to see if it's in the register table */
255 expressionP->X_op = O_register;
256 expressionP->X_add_number = reg_number;
258 /* make the rest nice */
259 expressionP->X_add_symbol = NULL;
260 expressionP->X_op_symbol = NULL;
261 *input_line_pointer = c; /* put back the delimiting char */
266 /* reset the line as if we had not done anything */
267 *input_line_pointer = c; /* put back the delimiting char */
268 input_line_pointer = start; /* reset input_line pointer */
273 /* Summary of register_name().
275 * in: Input_line_pointer points to 1st char of operand.
277 * out: A expressionS.
278 * The operand may have been a register: in this case, X_op == O_register,
279 * X_add_number is set to the register number, and truth is returned.
280 * Input_line_pointer->(next non-blank) char after operand, or is in
281 * its original state.
284 other_register_name (expressionP)
285 expressionS *expressionP;
292 /* Find the spelling of the operand */
293 start = name = input_line_pointer;
295 c = get_symbol_end ();
296 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
298 /* look to see if it's in the register table */
301 expressionP->X_op = O_register;
302 expressionP->X_add_number = reg_number;
304 /* make the rest nice */
305 expressionP->X_add_symbol = NULL;
306 expressionP->X_op_symbol = NULL;
307 *input_line_pointer = c; /* put back the delimiting char */
312 /* reset the line as if we had not done anything */
313 *input_line_pointer = c; /* put back the delimiting char */
314 input_line_pointer = start; /* reset input_line pointer */
320 md_show_usage (stream)
323 fprintf(stream, "MN10300 options:\n\
328 md_parse_option (c, arg)
336 md_undefined_symbol (name)
343 md_atof (type, litp, sizep)
349 LITTLENUM_TYPE words[4];
365 return "bad call to md_atof";
368 t = atof_ieee (input_line_pointer, type, words);
370 input_line_pointer = t;
374 for (i = prec - 1; i >= 0; i--)
376 md_number_to_chars (litp, (valueT) words[i], 2);
385 md_convert_frag (abfd, sec, fragP)
390 static unsigned long label_count = 0;
393 subseg_change (sec, 0);
394 if (fragP->fr_subtype == 0)
396 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
397 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
401 else if (fragP->fr_subtype == 1)
403 /* Reverse the condition of the first branch. */
404 int offset = fragP->fr_fix;
405 int opcode = fragP->fr_literal[offset] & 0xff;
442 fragP->fr_literal[offset] = opcode;
444 /* Create a fixup for the reversed conditional branch. */
445 sprintf (buf, "%s_%d", FAKE_LABEL_NAME, label_count++);
446 fix_new (fragP, fragP->fr_fix + 1, 1,
447 symbol_new (buf, sec, 0, fragP->fr_next),
448 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
450 /* Now create the unconditional branch + fixup to the
452 fragP->fr_literal[offset + 2] = 0xcc;
453 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
454 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
458 else if (fragP->fr_subtype == 2)
460 /* Reverse the condition of the first branch. */
461 int offset = fragP->fr_fix;
462 int opcode = fragP->fr_literal[offset] & 0xff;
499 fragP->fr_literal[offset] = opcode;
501 /* Create a fixup for the reversed conditional branch. */
502 sprintf (buf, "%s_%d", FAKE_LABEL_NAME, label_count++);
503 fix_new (fragP, fragP->fr_fix + 1, 1,
504 symbol_new (buf, sec, 0, fragP->fr_next),
505 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
507 /* Now create the unconditional branch + fixup to the
509 fragP->fr_literal[offset + 2] = 0xdc;
510 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
511 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
515 else if (fragP->fr_subtype == 3)
517 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
518 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
522 else if (fragP->fr_subtype == 4)
524 /* Reverse the condition of the first branch. */
525 int offset = fragP->fr_fix;
526 int opcode = fragP->fr_literal[offset + 1] & 0xff;
545 fragP->fr_literal[offset + 1] = opcode;
547 /* Create a fixup for the reversed conditional branch. */
548 sprintf (buf, "%s_%d", FAKE_LABEL_NAME, label_count++);
549 fix_new (fragP, fragP->fr_fix + 2, 1,
550 symbol_new (buf, sec, 0, fragP->fr_next),
551 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
553 /* Now create the unconditional branch + fixup to the
555 fragP->fr_literal[offset + 3] = 0xcc;
556 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
557 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
561 else if (fragP->fr_subtype == 5)
563 /* Reverse the condition of the first branch. */
564 int offset = fragP->fr_fix;
565 int opcode = fragP->fr_literal[offset + 1] & 0xff;
581 fragP->fr_literal[offset + 1] = opcode;
583 /* Create a fixup for the reversed conditional branch. */
584 sprintf (buf, "%s_%d", FAKE_LABEL_NAME, label_count++);
585 fix_new (fragP, fragP->fr_fix + 2, 1,
586 symbol_new (buf, sec, 0, fragP->fr_next),
587 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
589 /* Now create the unconditional branch + fixup to the
591 fragP->fr_literal[offset + 3] = 0xdc;
592 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
593 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
597 else if (fragP->fr_subtype == 6)
599 int offset = fragP->fr_fix;
600 fragP->fr_literal[offset] = 0xcd;
601 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
602 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
606 else if (fragP->fr_subtype == 7)
608 int offset = fragP->fr_fix;
609 fragP->fr_literal[offset] = 0xdd;
610 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
611 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
613 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
614 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
618 else if (fragP->fr_subtype == 8)
620 int offset = fragP->fr_fix;
621 fragP->fr_literal[offset] = 0xfa;
622 fragP->fr_literal[offset + 1] = 0xff;
623 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
624 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
628 else if (fragP->fr_subtype == 9)
630 int offset = fragP->fr_fix;
631 fragP->fr_literal[offset] = 0xfc;
632 fragP->fr_literal[offset + 1] = 0xff;
634 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
635 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
639 else if (fragP->fr_subtype == 10)
641 fragP->fr_literal[fragP->fr_fix] = 0xca;
642 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
643 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
647 else if (fragP->fr_subtype == 11)
649 int offset = fragP->fr_fix;
650 fragP->fr_literal[offset] = 0xcc;
652 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
653 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
657 else if (fragP->fr_subtype == 12)
659 int offset = fragP->fr_fix;
660 fragP->fr_literal[offset] = 0xdc;
662 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
663 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
672 md_section_align (seg, addr)
676 int align = bfd_get_section_alignment (stdoutput, seg);
677 return ((addr + (1 << align) - 1) & (-1 << align));
683 char *prev_name = "";
684 register const struct mn10300_opcode *op;
686 mn10300_hash = hash_new();
688 /* Insert unique names into hash table. The MN10300 instruction set
689 has many identical opcode names that have different opcodes based
690 on the operands. This hash table then provides a quick index to
691 the first opcode with a particular name in the opcode table. */
693 op = mn10300_opcodes;
696 if (strcmp (prev_name, op->name))
698 prev_name = (char *) op->name;
699 hash_insert (mn10300_hash, op->name, (char *) op);
704 /* This is both a simplification (we don't have to write md_apply_fix)
705 and support for future optimizations (branch shortening and similar
706 stuff in the linker. */
715 struct mn10300_opcode *opcode;
716 struct mn10300_opcode *next_opcode;
717 const unsigned char *opindex_ptr;
718 int next_opindex, relaxable;
719 unsigned long insn, extension, size = 0;
724 /* Get the opcode. */
725 for (s = str; *s != '\0' && ! isspace (*s); s++)
730 /* find the first opcode with the proper name */
731 opcode = (struct mn10300_opcode *)hash_find (mn10300_hash, str);
734 as_bad ("Unrecognized opcode: `%s'", str);
739 while (isspace (*str))
742 input_line_pointer = str;
746 const char *errmsg = NULL;
755 insn = opcode->opcode;
757 for (op_idx = 1, opindex_ptr = opcode->operands;
759 opindex_ptr++, op_idx++)
761 const struct mn10300_operand *operand;
764 if (next_opindex == 0)
766 operand = &mn10300_operands[*opindex_ptr];
770 operand = &mn10300_operands[next_opindex];
776 while (*str == ' ' || *str == ',')
779 if (operand->flags & MN10300_OPERAND_RELAX)
782 /* Gather the operand. */
783 hold = input_line_pointer;
784 input_line_pointer = str;
786 if (operand->flags & MN10300_OPERAND_PAREN)
788 if (*input_line_pointer != ')' && *input_line_pointer != '(')
790 input_line_pointer = hold;
794 input_line_pointer++;
797 /* See if we can match the operands. */
798 else if (operand->flags & MN10300_OPERAND_DREG)
800 if (!data_register_name (&ex))
802 input_line_pointer = hold;
807 else if (operand->flags & MN10300_OPERAND_AREG)
809 if (!address_register_name (&ex))
811 input_line_pointer = hold;
816 else if (operand->flags & MN10300_OPERAND_SP)
818 char *start = input_line_pointer;
819 char c = get_symbol_end ();
821 if (strcmp (start, "sp") != 0)
823 *input_line_pointer = c;
824 input_line_pointer = hold;
828 *input_line_pointer = c;
831 else if (operand->flags & MN10300_OPERAND_PSW)
833 char *start = input_line_pointer;
834 char c = get_symbol_end ();
836 if (strcmp (start, "psw") != 0)
838 *input_line_pointer = c;
839 input_line_pointer = hold;
843 *input_line_pointer = c;
846 else if (operand->flags & MN10300_OPERAND_MDR)
848 char *start = input_line_pointer;
849 char c = get_symbol_end ();
851 if (strcmp (start, "mdr") != 0)
853 *input_line_pointer = c;
854 input_line_pointer = hold;
858 *input_line_pointer = c;
861 else if (operand->flags & MN10300_OPERAND_REG_LIST)
863 unsigned int value = 0;
864 if (*input_line_pointer != '[')
866 input_line_pointer = hold;
872 input_line_pointer++;
874 /* A null register list can not be specified. */
875 if (*input_line_pointer == ']')
877 input_line_pointer = hold;
882 while (*input_line_pointer != ']')
887 if (*input_line_pointer == ',')
888 input_line_pointer++;
890 start = input_line_pointer;
891 c = get_symbol_end ();
893 if (strcmp (start, "d2") == 0)
896 *input_line_pointer = c;
898 else if (strcmp (start, "d3") == 0)
901 *input_line_pointer = c;
903 else if (strcmp (start, "a2") == 0)
906 *input_line_pointer = c;
908 else if (strcmp (start, "a3") == 0)
911 *input_line_pointer = c;
913 else if (strcmp (start, "other") == 0)
916 *input_line_pointer = c;
920 input_line_pointer = hold;
925 input_line_pointer++;
926 mn10300_insert_operand (&insn, &extension, operand,
927 value, (char *) NULL, 0, 0);
931 else if (data_register_name (&ex))
933 input_line_pointer = hold;
937 else if (address_register_name (&ex))
939 input_line_pointer = hold;
943 else if (other_register_name (&ex))
945 input_line_pointer = hold;
949 else if (*str == ')' || *str == '(')
951 input_line_pointer = hold;
963 errmsg = "illegal operand";
966 errmsg = "missing operand";
970 & (MN10300_OPERAND_DREG | MN10300_OPERAND_AREG)) == 0)
972 input_line_pointer = hold;
977 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
979 else if (opcode->format == FMT_D2 || opcode->format == FMT_D4
980 || opcode->format == FMT_S2 || opcode->format == FMT_S4
981 || opcode->format == FMT_S6 || opcode->format == FMT_D5)
986 mn10300_insert_operand (&insn, &extension, operand,
987 ex.X_add_number, (char *) NULL,
993 /* If this operand can be promoted, and it doesn't
994 fit into the allocated bitfield for this insn,
995 then promote it (ie this opcode does not match). */
997 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
998 && ! check_operand (insn, operand, ex.X_add_number))
1000 input_line_pointer = hold;
1005 mn10300_insert_operand (&insn, &extension, operand,
1006 ex.X_add_number, (char *) NULL,
1011 /* If this operand can be promoted, then this opcode didn't
1012 match since we can't know if it needed promotion! */
1013 if (operand->flags & MN10300_OPERAND_PROMOTE)
1015 input_line_pointer = hold;
1020 /* We need to generate a fixup for this expression. */
1021 if (fc >= MAX_INSN_FIXUPS)
1022 as_fatal ("too many fixups");
1023 fixups[fc].exp = ex;
1024 fixups[fc].opindex = *opindex_ptr;
1025 fixups[fc].reloc = BFD_RELOC_UNUSED;
1031 str = input_line_pointer;
1032 input_line_pointer = hold;
1034 while (*str == ' ' || *str == ',')
1039 /* Make sure we used all the operands! */
1046 next_opcode = opcode + 1;
1047 if (!strcmp(next_opcode->name, opcode->name))
1049 opcode = next_opcode;
1053 as_bad ("%s", errmsg);
1059 while (isspace (*str))
1063 as_bad ("junk at end of line: `%s'", str);
1065 input_line_pointer = str;
1067 /* Determine the size of the instruction. */
1068 if (opcode->format == FMT_S0)
1071 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1074 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1077 if (opcode->format == FMT_S4)
1080 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1083 if (opcode->format == FMT_D2)
1086 if (opcode->format == FMT_D4)
1089 if (relaxable && fc > 0)
1103 else if (size == 3 && opcode->opcode == 0xcc0000)
1105 /* bCC (uncommon cases) */
1109 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1110 fixups[0].exp.X_add_symbol,
1111 fixups[0].exp.X_add_number,
1112 (char *)fixups[0].opindex);
1114 /* This is pretty hokey. We basically just care about the
1115 opcode, so we have to write out the first word big endian.
1117 The exception is "call", which has two operands that we
1120 The first operand (the register list) happens to be in the
1121 first instruction word, and will be in the right place if
1122 we output the first word in big endian mode.
1124 The second operand (stack size) is in the extension word,
1125 and we want it to appear as the first character in the extension
1126 word (as it appears in memory). Luckily, writing the extension
1127 word in big endian format will do what we want. */
1128 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1131 number_to_chars_bigendian (f + 4, extension, 4);
1132 number_to_chars_bigendian (f + 8, 0, size - 8);
1135 number_to_chars_bigendian (f + 4, extension, size - 4);
1139 /* Allocate space for the instruction. */
1140 f = frag_more (size);
1142 /* Fill in bytes for the instruction. Note that opcode fields
1143 are written big-endian, 16 & 32bit immediates are written
1144 little endian. Egad. */
1145 if (opcode->format == FMT_S0
1146 || opcode->format == FMT_S1
1147 || opcode->format == FMT_D0
1148 || opcode->format == FMT_D1)
1150 number_to_chars_bigendian (f, insn, size);
1152 else if (opcode->format == FMT_S2
1153 && opcode->opcode != 0xdf0000
1154 && opcode->opcode != 0xde0000)
1156 /* A format S2 instruction that is _not_ "ret" and "retf". */
1157 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1158 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1160 else if (opcode->format == FMT_S2)
1162 /* This must be a ret or retf, which is written entirely in
1163 big-endian format. */
1164 number_to_chars_bigendian (f, insn, 3);
1166 else if (opcode->format == FMT_S4
1167 && opcode->opcode != 0xdc000000)
1169 /* This must be a format S4 "call" instruction. What a pain. */
1170 unsigned long temp = (insn >> 8) & 0xffff;
1171 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1172 number_to_chars_littleendian (f + 1, temp, 2);
1173 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1174 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1176 else if (opcode->format == FMT_S4)
1178 /* This must be a format S4 "jmp" instruction. */
1179 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1180 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1181 number_to_chars_littleendian (f + 1, temp, 4);
1183 else if (opcode->format == FMT_S6)
1185 unsigned long temp = ((insn & 0xffffff) << 8)
1186 | ((extension >> 16) & 0xff);
1187 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1188 number_to_chars_littleendian (f + 1, temp, 4);
1189 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1190 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1192 else if (opcode->format == FMT_D2
1193 && opcode->opcode != 0xfaf80000
1194 && opcode->opcode != 0xfaf00000
1195 && opcode->opcode != 0xfaf40000)
1197 /* A format D2 instruction where the 16bit immediate is
1198 really a single 16bit value, not two 8bit values. */
1199 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1200 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1202 else if (opcode->format == FMT_D2)
1204 /* A format D2 instruction where the 16bit immediate
1205 is really two 8bit immediates. */
1206 number_to_chars_bigendian (f, insn, 4);
1208 else if (opcode->format == FMT_D4)
1210 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1211 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1212 number_to_chars_littleendian (f + 2, temp, 4);
1214 else if (opcode->format == FMT_D5)
1216 unsigned long temp = ((insn & 0xffff) << 16)
1217 | ((extension >> 8) & 0xffff);
1218 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1219 number_to_chars_littleendian (f + 2, temp, 4);
1220 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1223 /* Create any fixups. */
1224 for (i = 0; i < fc; i++)
1226 const struct mn10300_operand *operand;
1228 operand = &mn10300_operands[fixups[i].opindex];
1229 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1231 reloc_howto_type *reloc_howto;
1236 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
1241 size = bfd_get_reloc_size (reloc_howto);
1243 if (size < 1 || size > 4)
1247 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1248 size, &fixups[i].exp,
1249 reloc_howto->pc_relative,
1254 int reloc, pcrel, reloc_size, offset;
1257 reloc = BFD_RELOC_NONE;
1258 /* How big is the reloc? Remember SPLIT relocs are
1259 implicitly 32bits. */
1260 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1263 reloc_size = operand->bits;
1265 /* Is the reloc pc-relative? */
1266 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1268 /* Gross. This disgusting hack is to make sure we
1269 get the right offset for the 16/32 bit reloc in
1270 "call" instructions. Basically they're a pain
1271 because the reloc isn't at the end of the instruction. */
1272 if ((size == 5 || size == 7)
1273 && (((insn >> 24) & 0xff) == 0xcd
1274 || ((insn >> 24) & 0xff) == 0xdd))
1277 /* Similarly for certain bit instructions which don't
1278 hav their 32bit reloc at the tail of the instruction. */
1280 && (((insn >> 16) & 0xffff) == 0xfe00
1281 || ((insn >> 16) & 0xffff) == 0xfe01
1282 || ((insn >> 16) & 0xffff) == 0xfe02))
1285 offset = size - reloc_size / 8;
1287 /* Choose a proper BFD relocation type. */
1290 if (reloc_size == 32)
1291 reloc = BFD_RELOC_32_PCREL;
1292 else if (reloc_size == 16)
1293 reloc = BFD_RELOC_16_PCREL;
1294 else if (reloc_size == 8)
1295 reloc = BFD_RELOC_8_PCREL;
1301 if (reloc_size == 32)
1302 reloc = BFD_RELOC_32;
1303 else if (reloc_size == 16)
1304 reloc = BFD_RELOC_16;
1305 else if (reloc_size == 8)
1306 reloc = BFD_RELOC_8;
1311 /* Convert the size of the reloc into what fix_new_exp wants. */
1312 reloc_size = reloc_size / 8;
1313 if (reloc_size == 8)
1315 else if (reloc_size == 16)
1317 else if (reloc_size == 32)
1320 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1321 reloc_size, &fixups[i].exp, pcrel,
1322 ((bfd_reloc_code_real_type) reloc));
1325 fixP->fx_offset += offset;
1332 /* if while processing a fixup, a reloc really needs to be created */
1333 /* then it is done here */
1336 tc_gen_reloc (seg, fixp)
1341 reloc = (arelent *) xmalloc (sizeof (arelent));
1343 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1344 if (reloc->howto == (reloc_howto_type *) NULL)
1346 as_bad_where (fixp->fx_file, fixp->fx_line,
1347 "reloc %d not supported by object file format",
1348 (int)fixp->fx_r_type);
1351 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1353 if (fixp->fx_addsy && fixp->fx_subsy)
1355 reloc->sym_ptr_ptr = &bfd_abs_symbol;
1356 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1357 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1361 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
1362 reloc->addend = fixp->fx_offset;
1368 md_estimate_size_before_relax (fragp, seg)
1372 if (fragp->fr_subtype == 0)
1374 if (fragp->fr_subtype == 3)
1376 if (fragp->fr_subtype == 6)
1378 if (!S_IS_DEFINED (fragp->fr_symbol)
1379 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1381 fragp->fr_subtype = 7;
1387 if (fragp->fr_subtype == 8)
1389 if (!S_IS_DEFINED (fragp->fr_symbol)
1390 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1392 fragp->fr_subtype = 9;
1398 if (fragp->fr_subtype == 10)
1400 if (!S_IS_DEFINED (fragp->fr_symbol)
1401 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1403 fragp->fr_subtype = 12;
1412 md_pcrel_from (fixp)
1415 return fixp->fx_frag->fr_address;
1417 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1419 /* The symbol is undefined. Let the linker figure it out. */
1422 return fixp->fx_frag->fr_address + fixp->fx_where;
1427 md_apply_fix3 (fixp, valuep, seg)
1432 /* We shouldn't ever get here because linkrelax is nonzero. */
1438 /* Insert an operand value into an instruction. */
1441 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1442 unsigned long *insnp;
1443 unsigned long *extensionp;
1444 const struct mn10300_operand *operand;
1450 /* No need to check 32bit operands for a bit. Note that
1451 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1452 if (operand->bits != 32
1453 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1458 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1460 max = (1 << (operand->bits - 1)) - 1;
1461 min = - (1 << (operand->bits - 1));
1465 max = (1 << operand->bits) - 1;
1472 if (test < (offsetT) min || test > (offsetT) max)
1475 "operand out of range (%s not between %ld and %ld)";
1478 sprint_value (buf, test);
1479 if (file == (char *) NULL)
1480 as_warn (err, buf, min, max);
1482 as_warn_where (file, line, err, buf, min, max);
1486 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1488 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1489 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1492 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1494 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1495 << (operand->shift + shift));
1497 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1498 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1499 << (operand->shift + shift + 2));
1503 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1504 << (operand->shift + shift));
1506 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1507 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1508 << (operand->shift + shift + 2));
1512 static unsigned long
1513 check_operand (insn, operand, val)
1515 const struct mn10300_operand *operand;
1518 /* No need to check 32bit operands for a bit. Note that
1519 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1520 if (operand->bits != 32
1521 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1526 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1528 max = (1 << (operand->bits - 1)) - 1;
1529 min = - (1 << (operand->bits - 1));
1533 max = (1 << operand->bits) - 1;
1540 if (test < (offsetT) min || test > (offsetT) max)