1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996, 1997, 1998, 1999, 2000 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
25 #include "opcode/mn10300.h"
27 /* Structure to hold information about predefined registers. */
34 /* Generic assembler global variables which must be defined by all targets. */
36 /* Characters which always start a comment. */
37 const char comment_chars[] = "#";
39 /* Characters which start a comment at the beginning of a line. */
40 const char line_comment_chars[] = ";#";
42 /* Characters which may be used to separate multiple commands on a
44 const char line_separator_chars[] = ";";
46 /* Characters which are used to indicate an exponent in a floating
48 const char EXP_CHARS[] = "eE";
50 /* Characters which mean that a number is a floating point constant,
52 const char FLT_CHARS[] = "dD";
55 const relax_typeS md_relax_table[] = {
58 {0x7fff, -0x8000, 5, 2},
59 {0x7fffffff, -0x80000000, 7, 0},
61 /* bCC relaxing (uncommon cases) */
63 {0x7fff, -0x8000, 6, 5},
64 {0x7fffffff, -0x80000000, 8, 0},
67 {0x7fff, -0x8000, 5, 7},
68 {0x7fffffff, -0x80000000, 7, 0},
71 {0x7fff, -0x8000, 4, 9},
72 {0x7fffffff, -0x80000000, 6, 0},
76 {0x7fff, -0x8000, 3, 12},
77 {0x7fffffff, -0x80000000, 5, 0},
82 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
83 const struct mn10300_operand *,
84 offsetT, char *, unsigned,
86 static unsigned long check_operand PARAMS ((unsigned long,
87 const struct mn10300_operand *,
89 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
90 static boolean data_register_name PARAMS ((expressionS *expressionP));
91 static boolean address_register_name PARAMS ((expressionS *expressionP));
92 static boolean other_register_name PARAMS ((expressionS *expressionP));
93 static void set_arch_mach PARAMS ((int));
95 static int current_machine;
98 #define MAX_INSN_FIXUPS (5)
103 bfd_reloc_code_real_type reloc;
105 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
108 /* We must store the value of each register operand so that we can
109 verify that certain registers do not match. */
110 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
112 const char *md_shortopts = "";
113 struct option md_longopts[] = {
114 {NULL, no_argument, NULL, 0}
116 size_t md_longopts_size = sizeof(md_longopts);
118 /* The target specific pseudo-ops which we support. */
119 const pseudo_typeS md_pseudo_table[] =
121 { "am30", set_arch_mach, AM30 },
122 { "am33", set_arch_mach, AM33 },
123 { "mn10300", set_arch_mach, MN103 },
127 #define HAVE_AM33 (current_machine == AM33)
129 /* Opcode hash table. */
130 static struct hash_control *mn10300_hash;
132 /* This table is sorted. Suitable for searching by a binary search. */
133 static const struct reg_name data_registers[] =
140 #define DATA_REG_NAME_CNT (sizeof(data_registers) / sizeof(struct reg_name))
142 static const struct reg_name address_registers[] =
149 #define ADDRESS_REG_NAME_CNT (sizeof(address_registers) / sizeof(struct reg_name))
151 static const struct reg_name r_registers[] =
194 #define R_REG_NAME_CNT (sizeof(r_registers) / sizeof(struct reg_name))
196 static const struct reg_name xr_registers[] =
220 #define XR_REG_NAME_CNT (sizeof(xr_registers) / sizeof(struct reg_name))
223 static const struct reg_name other_registers[] =
229 #define OTHER_REG_NAME_CNT (sizeof(other_registers) / sizeof(struct reg_name))
231 /* reg_name_search does a binary search of the given register table
232 to see if "name" is a valid regiter name. Returns the register
233 number from the array on success, or -1 on failure. */
236 reg_name_search (regs, regcount, name)
237 const struct reg_name *regs;
241 int middle, low, high;
249 middle = (low + high) / 2;
250 cmp = strcasecmp (name, regs[middle].name);
256 return regs[middle].value;
263 /* Summary of register_name().
265 * in: Input_line_pointer points to 1st char of operand.
267 * out: A expressionS.
268 * The operand may have been a register: in this case, X_op == O_register,
269 * X_add_number is set to the register number, and truth is returned.
270 * Input_line_pointer->(next non-blank) char after operand, or is in
271 * its original state.
274 r_register_name (expressionP)
275 expressionS *expressionP;
282 /* Find the spelling of the operand */
283 start = name = input_line_pointer;
285 c = get_symbol_end ();
286 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
288 /* look to see if it's in the register table */
291 expressionP->X_op = O_register;
292 expressionP->X_add_number = reg_number;
294 /* make the rest nice */
295 expressionP->X_add_symbol = NULL;
296 expressionP->X_op_symbol = NULL;
297 *input_line_pointer = c; /* put back the delimiting char */
302 /* reset the line as if we had not done anything */
303 *input_line_pointer = c; /* put back the delimiting char */
304 input_line_pointer = start; /* reset input_line pointer */
309 /* Summary of register_name().
311 * in: Input_line_pointer points to 1st char of operand.
313 * out: A expressionS.
314 * The operand may have been a register: in this case, X_op == O_register,
315 * X_add_number is set to the register number, and truth is returned.
316 * Input_line_pointer->(next non-blank) char after operand, or is in
317 * its original state.
320 xr_register_name (expressionP)
321 expressionS *expressionP;
328 /* Find the spelling of the operand */
329 start = name = input_line_pointer;
331 c = get_symbol_end ();
332 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
334 /* look to see if it's in the register table */
337 expressionP->X_op = O_register;
338 expressionP->X_add_number = reg_number;
340 /* make the rest nice */
341 expressionP->X_add_symbol = NULL;
342 expressionP->X_op_symbol = NULL;
343 *input_line_pointer = c; /* put back the delimiting char */
348 /* reset the line as if we had not done anything */
349 *input_line_pointer = c; /* put back the delimiting char */
350 input_line_pointer = start; /* reset input_line pointer */
355 /* Summary of register_name().
357 * in: Input_line_pointer points to 1st char of operand.
359 * out: A expressionS.
360 * The operand may have been a register: in this case, X_op == O_register,
361 * X_add_number is set to the register number, and truth is returned.
362 * Input_line_pointer->(next non-blank) char after operand, or is in
363 * its original state.
366 data_register_name (expressionP)
367 expressionS *expressionP;
374 /* Find the spelling of the operand */
375 start = name = input_line_pointer;
377 c = get_symbol_end ();
378 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
380 /* look to see if it's in the register table */
383 expressionP->X_op = O_register;
384 expressionP->X_add_number = reg_number;
386 /* make the rest nice */
387 expressionP->X_add_symbol = NULL;
388 expressionP->X_op_symbol = NULL;
389 *input_line_pointer = c; /* put back the delimiting char */
394 /* reset the line as if we had not done anything */
395 *input_line_pointer = c; /* put back the delimiting char */
396 input_line_pointer = start; /* reset input_line pointer */
401 /* Summary of register_name().
403 * in: Input_line_pointer points to 1st char of operand.
405 * out: A expressionS.
406 * The operand may have been a register: in this case, X_op == O_register,
407 * X_add_number is set to the register number, and truth is returned.
408 * Input_line_pointer->(next non-blank) char after operand, or is in
409 * its original state.
412 address_register_name (expressionP)
413 expressionS *expressionP;
420 /* Find the spelling of the operand */
421 start = name = input_line_pointer;
423 c = get_symbol_end ();
424 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
426 /* look to see if it's in the register table */
429 expressionP->X_op = O_register;
430 expressionP->X_add_number = reg_number;
432 /* make the rest nice */
433 expressionP->X_add_symbol = NULL;
434 expressionP->X_op_symbol = NULL;
435 *input_line_pointer = c; /* put back the delimiting char */
440 /* reset the line as if we had not done anything */
441 *input_line_pointer = c; /* put back the delimiting char */
442 input_line_pointer = start; /* reset input_line pointer */
447 /* Summary of register_name().
449 * in: Input_line_pointer points to 1st char of operand.
451 * out: A expressionS.
452 * The operand may have been a register: in this case, X_op == O_register,
453 * X_add_number is set to the register number, and truth is returned.
454 * Input_line_pointer->(next non-blank) char after operand, or is in
455 * its original state.
458 other_register_name (expressionP)
459 expressionS *expressionP;
466 /* Find the spelling of the operand */
467 start = name = input_line_pointer;
469 c = get_symbol_end ();
470 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
472 /* look to see if it's in the register table */
475 expressionP->X_op = O_register;
476 expressionP->X_add_number = reg_number;
478 /* make the rest nice */
479 expressionP->X_add_symbol = NULL;
480 expressionP->X_op_symbol = NULL;
481 *input_line_pointer = c; /* put back the delimiting char */
486 /* reset the line as if we had not done anything */
487 *input_line_pointer = c; /* put back the delimiting char */
488 input_line_pointer = start; /* reset input_line pointer */
494 md_show_usage (stream)
497 fprintf(stream, _("MN10300 options:\n\
502 md_parse_option (c, arg)
510 md_undefined_symbol (name)
517 md_atof (type, litp, sizep)
523 LITTLENUM_TYPE words[4];
539 return "bad call to md_atof";
542 t = atof_ieee (input_line_pointer, type, words);
544 input_line_pointer = t;
548 for (i = prec - 1; i >= 0; i--)
550 md_number_to_chars (litp, (valueT) words[i], 2);
559 md_convert_frag (abfd, sec, fragP)
564 static unsigned long label_count = 0;
567 subseg_change (sec, 0);
568 if (fragP->fr_subtype == 0)
570 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
571 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
575 else if (fragP->fr_subtype == 1)
577 /* Reverse the condition of the first branch. */
578 int offset = fragP->fr_fix;
579 int opcode = fragP->fr_literal[offset] & 0xff;
616 fragP->fr_literal[offset] = opcode;
618 /* Create a fixup for the reversed conditional branch. */
619 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
620 fix_new (fragP, fragP->fr_fix + 1, 1,
621 symbol_new (buf, sec, 0, fragP->fr_next),
622 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
624 /* Now create the unconditional branch + fixup to the
626 fragP->fr_literal[offset + 2] = 0xcc;
627 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
628 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
632 else if (fragP->fr_subtype == 2)
634 /* Reverse the condition of the first branch. */
635 int offset = fragP->fr_fix;
636 int opcode = fragP->fr_literal[offset] & 0xff;
673 fragP->fr_literal[offset] = opcode;
675 /* Create a fixup for the reversed conditional branch. */
676 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
677 fix_new (fragP, fragP->fr_fix + 1, 1,
678 symbol_new (buf, sec, 0, fragP->fr_next),
679 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
681 /* Now create the unconditional branch + fixup to the
683 fragP->fr_literal[offset + 2] = 0xdc;
684 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
685 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
689 else if (fragP->fr_subtype == 3)
691 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
692 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
696 else if (fragP->fr_subtype == 4)
698 /* Reverse the condition of the first branch. */
699 int offset = fragP->fr_fix;
700 int opcode = fragP->fr_literal[offset + 1] & 0xff;
719 fragP->fr_literal[offset + 1] = opcode;
721 /* Create a fixup for the reversed conditional branch. */
722 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
723 fix_new (fragP, fragP->fr_fix + 2, 1,
724 symbol_new (buf, sec, 0, fragP->fr_next),
725 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
727 /* Now create the unconditional branch + fixup to the
729 fragP->fr_literal[offset + 3] = 0xcc;
730 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
731 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
735 else if (fragP->fr_subtype == 5)
737 /* Reverse the condition of the first branch. */
738 int offset = fragP->fr_fix;
739 int opcode = fragP->fr_literal[offset + 1] & 0xff;
755 fragP->fr_literal[offset + 1] = opcode;
757 /* Create a fixup for the reversed conditional branch. */
758 sprintf (buf, ".%s_%d", FAKE_LABEL_NAME, label_count++);
759 fix_new (fragP, fragP->fr_fix + 2, 1,
760 symbol_new (buf, sec, 0, fragP->fr_next),
761 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
763 /* Now create the unconditional branch + fixup to the
765 fragP->fr_literal[offset + 3] = 0xdc;
766 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
767 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
771 else if (fragP->fr_subtype == 6)
773 int offset = fragP->fr_fix;
774 fragP->fr_literal[offset] = 0xcd;
775 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
776 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
780 else if (fragP->fr_subtype == 7)
782 int offset = fragP->fr_fix;
783 fragP->fr_literal[offset] = 0xdd;
784 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
785 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
787 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
788 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
792 else if (fragP->fr_subtype == 8)
794 int offset = fragP->fr_fix;
795 fragP->fr_literal[offset] = 0xfa;
796 fragP->fr_literal[offset + 1] = 0xff;
797 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
798 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
802 else if (fragP->fr_subtype == 9)
804 int offset = fragP->fr_fix;
805 fragP->fr_literal[offset] = 0xfc;
806 fragP->fr_literal[offset + 1] = 0xff;
808 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
809 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
813 else if (fragP->fr_subtype == 10)
815 fragP->fr_literal[fragP->fr_fix] = 0xca;
816 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
817 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
821 else if (fragP->fr_subtype == 11)
823 int offset = fragP->fr_fix;
824 fragP->fr_literal[offset] = 0xcc;
826 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
827 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
831 else if (fragP->fr_subtype == 12)
833 int offset = fragP->fr_fix;
834 fragP->fr_literal[offset] = 0xdc;
836 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
837 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
846 md_section_align (seg, addr)
850 int align = bfd_get_section_alignment (stdoutput, seg);
851 return ((addr + (1 << align) - 1) & (-1 << align));
857 char *prev_name = "";
858 register const struct mn10300_opcode *op;
860 mn10300_hash = hash_new();
862 /* Insert unique names into hash table. The MN10300 instruction set
863 has many identical opcode names that have different opcodes based
864 on the operands. This hash table then provides a quick index to
865 the first opcode with a particular name in the opcode table. */
867 op = mn10300_opcodes;
870 if (strcmp (prev_name, op->name))
872 prev_name = (char *) op->name;
873 hash_insert (mn10300_hash, op->name, (char *) op);
878 /* This is both a simplification (we don't have to write md_apply_fix)
879 and support for future optimizations (branch shortening and similar
880 stuff in the linker). */
883 /* Set the default machine type. */
884 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
885 as_warn (_("could not set architecture and machine"));
887 current_machine = MN103;
895 struct mn10300_opcode *opcode;
896 struct mn10300_opcode *next_opcode;
897 const unsigned char *opindex_ptr;
898 int next_opindex, relaxable;
899 unsigned long insn, extension, size = 0;
904 /* Get the opcode. */
905 for (s = str; *s != '\0' && ! isspace (*s); s++)
910 /* find the first opcode with the proper name */
911 opcode = (struct mn10300_opcode *)hash_find (mn10300_hash, str);
914 as_bad (_("Unrecognized opcode: `%s'"), str);
919 while (isspace (*str))
922 input_line_pointer = str;
932 errmsg = _("Invalid opcode/operands");
934 /* Reset the array of register operands. */
935 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
941 insn = opcode->opcode;
944 /* If the instruction is not available on the current machine
945 then it can not possibly match. */
947 && !(opcode->machine == AM33 && HAVE_AM33))
950 for (op_idx = 1, opindex_ptr = opcode->operands;
952 opindex_ptr++, op_idx++)
954 const struct mn10300_operand *operand;
957 if (next_opindex == 0)
959 operand = &mn10300_operands[*opindex_ptr];
963 operand = &mn10300_operands[next_opindex];
967 while (*str == ' ' || *str == ',')
970 if (operand->flags & MN10300_OPERAND_RELAX)
973 /* Gather the operand. */
974 hold = input_line_pointer;
975 input_line_pointer = str;
977 if (operand->flags & MN10300_OPERAND_PAREN)
979 if (*input_line_pointer != ')' && *input_line_pointer != '(')
981 input_line_pointer = hold;
985 input_line_pointer++;
988 /* See if we can match the operands. */
989 else if (operand->flags & MN10300_OPERAND_DREG)
991 if (!data_register_name (&ex))
993 input_line_pointer = hold;
998 else if (operand->flags & MN10300_OPERAND_AREG)
1000 if (!address_register_name (&ex))
1002 input_line_pointer = hold;
1007 else if (operand->flags & MN10300_OPERAND_SP)
1009 char *start = input_line_pointer;
1010 char c = get_symbol_end ();
1012 if (strcasecmp (start, "sp") != 0)
1014 *input_line_pointer = c;
1015 input_line_pointer = hold;
1019 *input_line_pointer = c;
1022 else if (operand->flags & MN10300_OPERAND_RREG)
1024 if (!r_register_name (&ex))
1026 input_line_pointer = hold;
1031 else if (operand->flags & MN10300_OPERAND_XRREG)
1033 if (!xr_register_name (&ex))
1035 input_line_pointer = hold;
1040 else if (operand->flags & MN10300_OPERAND_USP)
1042 char *start = input_line_pointer;
1043 char c = get_symbol_end ();
1045 if (strcasecmp (start, "usp") != 0)
1047 *input_line_pointer = c;
1048 input_line_pointer = hold;
1052 *input_line_pointer = c;
1055 else if (operand->flags & MN10300_OPERAND_SSP)
1057 char *start = input_line_pointer;
1058 char c = get_symbol_end ();
1060 if (strcasecmp (start, "ssp") != 0)
1062 *input_line_pointer = c;
1063 input_line_pointer = hold;
1067 *input_line_pointer = c;
1070 else if (operand->flags & MN10300_OPERAND_MSP)
1072 char *start = input_line_pointer;
1073 char c = get_symbol_end ();
1075 if (strcasecmp (start, "msp") != 0)
1077 *input_line_pointer = c;
1078 input_line_pointer = hold;
1082 *input_line_pointer = c;
1085 else if (operand->flags & MN10300_OPERAND_PC)
1087 char *start = input_line_pointer;
1088 char c = get_symbol_end ();
1090 if (strcasecmp (start, "pc") != 0)
1092 *input_line_pointer = c;
1093 input_line_pointer = hold;
1097 *input_line_pointer = c;
1100 else if (operand->flags & MN10300_OPERAND_EPSW)
1102 char *start = input_line_pointer;
1103 char c = get_symbol_end ();
1105 if (strcasecmp (start, "epsw") != 0)
1107 *input_line_pointer = c;
1108 input_line_pointer = hold;
1112 *input_line_pointer = c;
1115 else if (operand->flags & MN10300_OPERAND_PLUS)
1117 if (*input_line_pointer != '+')
1119 input_line_pointer = hold;
1123 input_line_pointer++;
1126 else if (operand->flags & MN10300_OPERAND_PSW)
1128 char *start = input_line_pointer;
1129 char c = get_symbol_end ();
1131 if (strcasecmp (start, "psw") != 0)
1133 *input_line_pointer = c;
1134 input_line_pointer = hold;
1138 *input_line_pointer = c;
1141 else if (operand->flags & MN10300_OPERAND_MDR)
1143 char *start = input_line_pointer;
1144 char c = get_symbol_end ();
1146 if (strcasecmp (start, "mdr") != 0)
1148 *input_line_pointer = c;
1149 input_line_pointer = hold;
1153 *input_line_pointer = c;
1156 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1158 unsigned int value = 0;
1159 if (*input_line_pointer != '[')
1161 input_line_pointer = hold;
1167 input_line_pointer++;
1169 /* We used to reject a null register list here; however,
1170 we accept it now so the compiler can emit "call" instructions
1171 for all calls to named functions.
1173 The linker can then fill in the appropriate bits for the
1174 register list and stack size or change the instruction
1175 into a "calls" if using "call" is not profitable. */
1176 while (*input_line_pointer != ']')
1181 if (*input_line_pointer == ',')
1182 input_line_pointer++;
1184 start = input_line_pointer;
1185 c = get_symbol_end ();
1187 if (strcasecmp (start, "d2") == 0)
1190 *input_line_pointer = c;
1192 else if (strcasecmp (start, "d3") == 0)
1195 *input_line_pointer = c;
1197 else if (strcasecmp (start, "a2") == 0)
1200 *input_line_pointer = c;
1202 else if (strcasecmp (start, "a3") == 0)
1205 *input_line_pointer = c;
1207 else if (strcasecmp (start, "other") == 0)
1210 *input_line_pointer = c;
1213 && strcasecmp (start, "exreg0") == 0)
1216 *input_line_pointer = c;
1219 && strcasecmp (start, "exreg1") == 0)
1222 *input_line_pointer = c;
1225 && strcasecmp (start, "exother") == 0)
1228 *input_line_pointer = c;
1231 && strcasecmp (start, "all") == 0)
1234 *input_line_pointer = c;
1238 input_line_pointer = hold;
1243 input_line_pointer++;
1244 mn10300_insert_operand (&insn, &extension, operand,
1245 value, (char *) NULL, 0, 0);
1249 else if (data_register_name (&ex))
1251 input_line_pointer = hold;
1255 else if (address_register_name (&ex))
1257 input_line_pointer = hold;
1261 else if (other_register_name (&ex))
1263 input_line_pointer = hold;
1267 else if (HAVE_AM33 && r_register_name (&ex))
1269 input_line_pointer = hold;
1273 else if (HAVE_AM33 && xr_register_name (&ex))
1275 input_line_pointer = hold;
1279 else if (*str == ')' || *str == '(')
1281 input_line_pointer = hold;
1293 errmsg = _("illegal operand");
1296 errmsg = _("missing operand");
1302 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1304 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1305 if ((operand->flags & mask) == 0)
1307 input_line_pointer = hold;
1312 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1314 else if (opcode->format == FMT_D2
1315 || opcode->format == FMT_D4
1316 || opcode->format == FMT_S2
1317 || opcode->format == FMT_S4
1318 || opcode->format == FMT_S6
1319 || opcode->format == FMT_D5)
1321 else if (opcode->format == FMT_D7)
1323 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1328 mn10300_insert_operand (&insn, &extension, operand,
1329 ex.X_add_number, (char *) NULL,
1333 /* And note the register number in the register array. */
1334 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1339 /* If this operand can be promoted, and it doesn't
1340 fit into the allocated bitfield for this insn,
1341 then promote it (ie this opcode does not match). */
1343 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1344 && ! check_operand (insn, operand, ex.X_add_number))
1346 input_line_pointer = hold;
1351 mn10300_insert_operand (&insn, &extension, operand,
1352 ex.X_add_number, (char *) NULL,
1357 /* If this operand can be promoted, then this opcode didn't
1358 match since we can't know if it needed promotion! */
1359 if (operand->flags & MN10300_OPERAND_PROMOTE)
1361 input_line_pointer = hold;
1366 /* We need to generate a fixup for this expression. */
1367 if (fc >= MAX_INSN_FIXUPS)
1368 as_fatal (_("too many fixups"));
1369 fixups[fc].exp = ex;
1370 fixups[fc].opindex = *opindex_ptr;
1371 fixups[fc].reloc = BFD_RELOC_UNUSED;
1377 str = input_line_pointer;
1378 input_line_pointer = hold;
1380 while (*str == ' ' || *str == ',')
1385 /* Make sure we used all the operands! */
1389 /* If this instruction has registers that must not match, verify
1390 that they do indeed not match. */
1391 if (opcode->no_match_operands)
1395 /* Look at each operand to see if it's marked. */
1396 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1398 if ((1 << i) & opcode->no_match_operands)
1402 /* operand I is marked. Check that it does not match any
1403 operands > I which are marked. */
1404 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1406 if (((1 << j) & opcode->no_match_operands)
1407 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1409 errmsg = _("Invalid register specification.");
1421 next_opcode = opcode + 1;
1422 if (!strcmp(next_opcode->name, opcode->name))
1424 opcode = next_opcode;
1428 as_bad ("%s", errmsg);
1434 while (isspace (*str))
1438 as_bad (_("junk at end of line: `%s'"), str);
1440 input_line_pointer = str;
1442 /* Determine the size of the instruction. */
1443 if (opcode->format == FMT_S0)
1446 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1449 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1452 if (opcode->format == FMT_D6)
1455 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1458 if (opcode->format == FMT_D8)
1461 if (opcode->format == FMT_D9)
1464 if (opcode->format == FMT_S4)
1467 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1470 if (opcode->format == FMT_D2)
1473 if (opcode->format == FMT_D4)
1476 if (relaxable && fc > 0)
1483 /* Handle bra specially. Basically treat it like jmp so
1484 that we automatically handle 8, 16 and 32 bit offsets
1485 correctly as well as jumps to an undefined address.
1487 It is also important to not treat it like other bCC
1488 instructions since the long forms of bra is different
1489 from other bCC instructions. */
1490 if (opcode->opcode == 0xca00)
1502 else if (size == 3 && opcode->opcode == 0xcc0000)
1504 /* bCC (uncommon cases) */
1508 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1509 fixups[0].exp.X_add_symbol,
1510 fixups[0].exp.X_add_number,
1511 (char *)fixups[0].opindex);
1513 /* This is pretty hokey. We basically just care about the
1514 opcode, so we have to write out the first word big endian.
1516 The exception is "call", which has two operands that we
1519 The first operand (the register list) happens to be in the
1520 first instruction word, and will be in the right place if
1521 we output the first word in big endian mode.
1523 The second operand (stack size) is in the extension word,
1524 and we want it to appear as the first character in the extension
1525 word (as it appears in memory). Luckily, writing the extension
1526 word in big endian format will do what we want. */
1527 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1530 number_to_chars_bigendian (f + 4, extension, 4);
1531 number_to_chars_bigendian (f + 8, 0, size - 8);
1534 number_to_chars_bigendian (f + 4, extension, size - 4);
1538 /* Allocate space for the instruction. */
1539 f = frag_more (size);
1541 /* Fill in bytes for the instruction. Note that opcode fields
1542 are written big-endian, 16 & 32bit immediates are written
1543 little endian. Egad. */
1544 if (opcode->format == FMT_S0
1545 || opcode->format == FMT_S1
1546 || opcode->format == FMT_D0
1547 || opcode->format == FMT_D6
1548 || opcode->format == FMT_D7
1549 || opcode->format == FMT_D10
1550 || opcode->format == FMT_D1)
1552 number_to_chars_bigendian (f, insn, size);
1554 else if (opcode->format == FMT_S2
1555 && opcode->opcode != 0xdf0000
1556 && opcode->opcode != 0xde0000)
1558 /* A format S2 instruction that is _not_ "ret" and "retf". */
1559 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1560 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1562 else if (opcode->format == FMT_S2)
1564 /* This must be a ret or retf, which is written entirely in
1565 big-endian format. */
1566 number_to_chars_bigendian (f, insn, 3);
1568 else if (opcode->format == FMT_S4
1569 && opcode->opcode != 0xdc000000)
1571 /* This must be a format S4 "call" instruction. What a pain. */
1572 unsigned long temp = (insn >> 8) & 0xffff;
1573 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1574 number_to_chars_littleendian (f + 1, temp, 2);
1575 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1576 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1578 else if (opcode->format == FMT_S4)
1580 /* This must be a format S4 "jmp" instruction. */
1581 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1582 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1583 number_to_chars_littleendian (f + 1, temp, 4);
1585 else if (opcode->format == FMT_S6)
1587 unsigned long temp = ((insn & 0xffffff) << 8)
1588 | ((extension >> 16) & 0xff);
1589 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1590 number_to_chars_littleendian (f + 1, temp, 4);
1591 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
1592 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1594 else if (opcode->format == FMT_D2
1595 && opcode->opcode != 0xfaf80000
1596 && opcode->opcode != 0xfaf00000
1597 && opcode->opcode != 0xfaf40000)
1599 /* A format D2 instruction where the 16bit immediate is
1600 really a single 16bit value, not two 8bit values. */
1601 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1602 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
1604 else if (opcode->format == FMT_D2)
1606 /* A format D2 instruction where the 16bit immediate
1607 is really two 8bit immediates. */
1608 number_to_chars_bigendian (f, insn, 4);
1610 else if (opcode->format == FMT_D4)
1612 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
1613 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1614 number_to_chars_littleendian (f + 2, temp, 4);
1616 else if (opcode->format == FMT_D5)
1618 unsigned long temp = ((insn & 0xffff) << 16)
1619 | ((extension >> 8) & 0xffff);
1620 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
1621 number_to_chars_littleendian (f + 2, temp, 4);
1622 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
1624 else if (opcode->format == FMT_D8)
1626 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
1627 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1628 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
1629 number_to_chars_littleendian (f + 4, temp >> 8, 2);
1631 else if (opcode->format == FMT_D9)
1633 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
1634 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
1635 number_to_chars_littleendian (f + 3, temp, 4);
1638 /* Create any fixups. */
1639 for (i = 0; i < fc; i++)
1641 const struct mn10300_operand *operand;
1643 operand = &mn10300_operands[fixups[i].opindex];
1644 if (fixups[i].reloc != BFD_RELOC_UNUSED)
1646 reloc_howto_type *reloc_howto;
1651 reloc_howto = bfd_reloc_type_lookup (stdoutput, fixups[i].reloc);
1656 size = bfd_get_reloc_size (reloc_howto);
1658 if (size < 1 || size > 4)
1662 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1663 size, &fixups[i].exp,
1664 reloc_howto->pc_relative,
1669 int reloc, pcrel, reloc_size, offset;
1672 reloc = BFD_RELOC_NONE;
1673 /* How big is the reloc? Remember SPLIT relocs are
1674 implicitly 32bits. */
1675 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1677 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1680 reloc_size = operand->bits;
1682 /* Is the reloc pc-relative? */
1683 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
1685 /* Gross. This disgusting hack is to make sure we
1686 get the right offset for the 16/32 bit reloc in
1687 "call" instructions. Basically they're a pain
1688 because the reloc isn't at the end of the instruction. */
1689 if ((size == 5 || size == 7)
1690 && (((insn >> 24) & 0xff) == 0xcd
1691 || ((insn >> 24) & 0xff) == 0xdd))
1694 /* Similarly for certain bit instructions which don't
1695 hav their 32bit reloc at the tail of the instruction. */
1697 && (((insn >> 16) & 0xffff) == 0xfe00
1698 || ((insn >> 16) & 0xffff) == 0xfe01
1699 || ((insn >> 16) & 0xffff) == 0xfe02))
1702 offset = size - reloc_size / 8;
1704 /* Choose a proper BFD relocation type. */
1707 if (reloc_size == 32)
1708 reloc = BFD_RELOC_32_PCREL;
1709 else if (reloc_size == 16)
1710 reloc = BFD_RELOC_16_PCREL;
1711 else if (reloc_size == 8)
1712 reloc = BFD_RELOC_8_PCREL;
1718 if (reloc_size == 32)
1719 reloc = BFD_RELOC_32;
1720 else if (reloc_size == 16)
1721 reloc = BFD_RELOC_16;
1722 else if (reloc_size == 8)
1723 reloc = BFD_RELOC_8;
1728 /* Convert the size of the reloc into what fix_new_exp wants. */
1729 reloc_size = reloc_size / 8;
1730 if (reloc_size == 8)
1732 else if (reloc_size == 16)
1734 else if (reloc_size == 32)
1737 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
1738 reloc_size, &fixups[i].exp, pcrel,
1739 ((bfd_reloc_code_real_type) reloc));
1742 fixP->fx_offset += offset;
1749 /* if while processing a fixup, a reloc really needs to be created */
1750 /* then it is done here */
1753 tc_gen_reloc (seg, fixp)
1758 reloc = (arelent *) xmalloc (sizeof (arelent));
1760 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1761 if (reloc->howto == (reloc_howto_type *) NULL)
1763 as_bad_where (fixp->fx_file, fixp->fx_line,
1764 _("reloc %d not supported by object file format"),
1765 (int)fixp->fx_r_type);
1768 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1770 if (fixp->fx_addsy && fixp->fx_subsy)
1773 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1774 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1776 as_bad_where (fixp->fx_file, fixp->fx_line,
1777 "Difference of symbols in different sections is not supported");
1781 reloc->sym_ptr_ptr = &bfd_abs_symbol;
1782 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
1783 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
1787 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof( asymbol *));
1788 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1789 reloc->addend = fixp->fx_offset;
1795 md_estimate_size_before_relax (fragp, seg)
1799 if (fragp->fr_subtype == 0)
1801 if (fragp->fr_subtype == 3)
1803 if (fragp->fr_subtype == 6)
1805 if (!S_IS_DEFINED (fragp->fr_symbol)
1806 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1808 fragp->fr_subtype = 7;
1814 if (fragp->fr_subtype == 8)
1816 if (!S_IS_DEFINED (fragp->fr_symbol)
1817 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1819 fragp->fr_subtype = 9;
1825 if (fragp->fr_subtype == 10)
1827 if (!S_IS_DEFINED (fragp->fr_symbol)
1828 || seg != S_GET_SEGMENT (fragp->fr_symbol))
1830 fragp->fr_subtype = 12;
1839 md_pcrel_from (fixp)
1842 return fixp->fx_frag->fr_address;
1844 if (fixp->fx_addsy != (symbolS *) NULL && ! S_IS_DEFINED (fixp->fx_addsy))
1846 /* The symbol is undefined. Let the linker figure it out. */
1849 return fixp->fx_frag->fr_address + fixp->fx_where;
1854 md_apply_fix3 (fixp, valuep, seg)
1859 /* We shouldn't ever get here because linkrelax is nonzero. */
1865 /* Insert an operand value into an instruction. */
1868 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
1869 unsigned long *insnp;
1870 unsigned long *extensionp;
1871 const struct mn10300_operand *operand;
1877 /* No need to check 32bit operands for a bit. Note that
1878 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1879 if (operand->bits != 32
1880 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1886 bits = operand->bits;
1887 if (operand->flags & MN10300_OPERAND_24BIT)
1890 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1892 max = (1 << (bits - 1)) - 1;
1893 min = - (1 << (bits - 1));
1897 max = (1 << bits) - 1;
1904 if (test < (offsetT) min || test > (offsetT) max)
1907 _("operand out of range (%s not between %ld and %ld)");
1910 sprint_value (buf, test);
1911 if (file == (char *) NULL)
1912 as_warn (err, buf, min, max);
1914 as_warn_where (file, line, err, buf, min, max);
1918 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1920 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1921 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1924 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1926 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1927 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1930 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1932 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1933 << (operand->shift + shift));
1935 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1936 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1937 << (operand->shift + shift + operand->bits));
1941 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1942 << (operand->shift + shift));
1944 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1945 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1946 << (operand->shift + shift + operand->bits));
1950 static unsigned long
1951 check_operand (insn, operand, val)
1953 const struct mn10300_operand *operand;
1956 /* No need to check 32bit operands for a bit. Note that
1957 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1958 if (operand->bits != 32
1959 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1965 bits = operand->bits;
1966 if (operand->flags & MN10300_OPERAND_24BIT)
1969 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1971 max = (1 << (bits - 1)) - 1;
1972 min = - (1 << (bits - 1));
1976 max = (1 << bits) - 1;
1983 if (test < (offsetT) min || test > (offsetT) max)
1992 set_arch_mach (mach)
1995 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
1996 as_warn (_("could not set architecture and machine"));
1998 current_machine = mach;