1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
3 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 3, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
20 Boston, MA 02110-1301, USA. */
23 #include "safe-ctype.h"
25 #include "opcode/mn10300.h"
26 #include "dwarf2dbg.h"
28 /* Structure to hold information about predefined registers. */
35 /* Generic assembler global variables which must be defined by all
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
44 /* Characters which may be used to separate multiple commands on a
46 const char line_separator_chars[] = ";";
48 /* Characters which are used to indicate an exponent in a floating
50 const char EXP_CHARS[] = "eE";
52 /* Characters which mean that a number is a floating point constant,
54 const char FLT_CHARS[] = "dD";
56 const relax_typeS md_relax_table[] =
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
92 /* Local functions. */
93 static void mn10300_insert_operand PARAMS ((unsigned long *, unsigned long *,
94 const struct mn10300_operand *,
95 offsetT, char *, unsigned,
97 static unsigned long check_operand PARAMS ((unsigned long,
98 const struct mn10300_operand *,
100 static int reg_name_search PARAMS ((const struct reg_name *, int, const char *));
101 static bfd_boolean data_register_name PARAMS ((expressionS *expressionP));
102 static bfd_boolean address_register_name PARAMS ((expressionS *expressionP));
103 static bfd_boolean other_register_name PARAMS ((expressionS *expressionP));
104 static bfd_boolean r_register_name PARAMS ((expressionS *expressionP));
105 static bfd_boolean xr_register_name PARAMS ((expressionS *expressionP));
106 static void set_arch_mach PARAMS ((int));
108 /* Set linkrelax here to avoid fixups in most sections. */
111 static int current_machine;
114 #define MAX_INSN_FIXUPS (5)
119 bfd_reloc_code_real_type reloc;
121 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
124 /* We must store the value of each register operand so that we can
125 verify that certain registers do not match. */
126 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
128 const char *md_shortopts = "";
129 struct option md_longopts[] = {
130 {NULL, no_argument, NULL, 0}
132 size_t md_longopts_size = sizeof (md_longopts);
134 /* The target specific pseudo-ops which we support. */
135 const pseudo_typeS md_pseudo_table[] =
137 { "am30", set_arch_mach, AM30 },
138 { "am33", set_arch_mach, AM33 },
139 { "am33_2", (void (*) PARAMS ((int))) set_arch_mach, AM33_2 },
140 { "mn10300", set_arch_mach, MN103 },
144 #define HAVE_AM33_2 (current_machine == AM33_2)
145 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
146 #define HAVE_AM30 (current_machine == AM30)
148 /* Opcode hash table. */
149 static struct hash_control *mn10300_hash;
151 /* This table is sorted. Suitable for searching by a binary search. */
152 static const struct reg_name data_registers[] =
159 #define DATA_REG_NAME_CNT \
160 (sizeof (data_registers) / sizeof (struct reg_name))
162 static const struct reg_name address_registers[] =
170 #define ADDRESS_REG_NAME_CNT \
171 (sizeof (address_registers) / sizeof (struct reg_name))
173 static const struct reg_name r_registers[] =
217 #define R_REG_NAME_CNT \
218 (sizeof (r_registers) / sizeof (struct reg_name))
220 static const struct reg_name xr_registers[] =
245 #define XR_REG_NAME_CNT \
246 (sizeof (xr_registers) / sizeof (struct reg_name))
248 /* We abuse the `value' field, that would be otherwise unused, to
249 encode the architecture on which (access to) the register was
250 introduced. FIXME: we should probably warn when we encounter a
251 register name when assembling for an architecture that doesn't
252 support it, before parsing it as a symbol name. */
253 static const struct reg_name other_registers[] =
262 #define OTHER_REG_NAME_CNT \
263 (sizeof (other_registers) / sizeof (struct reg_name))
265 static const struct reg_name float_registers[] =
301 #define FLOAT_REG_NAME_CNT \
302 (sizeof (float_registers) / sizeof (struct reg_name))
304 static const struct reg_name double_registers[] =
324 #define DOUBLE_REG_NAME_CNT \
325 (sizeof (double_registers) / sizeof (struct reg_name))
328 /* reg_name_search does a binary search of the given register table
329 to see if "name" is a valid regiter name. Returns the register
330 number from the array on success, or -1 on failure. */
333 reg_name_search (regs, regcount, name)
334 const struct reg_name *regs;
338 int middle, low, high;
346 middle = (low + high) / 2;
347 cmp = strcasecmp (name, regs[middle].name);
353 return regs[middle].value;
359 /* Summary of register_name().
361 * in: Input_line_pointer points to 1st char of operand.
363 * out: An expressionS.
364 * The operand may have been a register: in this case, X_op == O_register,
365 * X_add_number is set to the register number, and truth is returned.
366 * Input_line_pointer->(next non-blank) char after operand, or is in
367 * its original state.
371 r_register_name (expressionP)
372 expressionS *expressionP;
379 /* Find the spelling of the operand. */
380 start = name = input_line_pointer;
382 c = get_symbol_end ();
383 reg_number = reg_name_search (r_registers, R_REG_NAME_CNT, name);
385 /* Put back the delimiting char. */
386 *input_line_pointer = c;
388 /* Look to see if it's in the register table. */
391 expressionP->X_op = O_register;
392 expressionP->X_add_number = reg_number;
394 /* Make the rest nice. */
395 expressionP->X_add_symbol = NULL;
396 expressionP->X_op_symbol = NULL;
401 /* Reset the line as if we had not done anything. */
402 input_line_pointer = start;
406 /* Summary of register_name().
408 * in: Input_line_pointer points to 1st char of operand.
410 * out: An expressionS.
411 * The operand may have been a register: in this case, X_op == O_register,
412 * X_add_number is set to the register number, and truth is returned.
413 * Input_line_pointer->(next non-blank) char after operand, or is in
414 * its original state.
418 xr_register_name (expressionP)
419 expressionS *expressionP;
426 /* Find the spelling of the operand. */
427 start = name = input_line_pointer;
429 c = get_symbol_end ();
430 reg_number = reg_name_search (xr_registers, XR_REG_NAME_CNT, name);
432 /* Put back the delimiting char. */
433 *input_line_pointer = c;
435 /* Look to see if it's in the register table. */
438 expressionP->X_op = O_register;
439 expressionP->X_add_number = reg_number;
441 /* Make the rest nice. */
442 expressionP->X_add_symbol = NULL;
443 expressionP->X_op_symbol = NULL;
448 /* Reset the line as if we had not done anything. */
449 input_line_pointer = start;
453 /* Summary of register_name().
455 * in: Input_line_pointer points to 1st char of operand.
457 * out: An expressionS.
458 * The operand may have been a register: in this case, X_op == O_register,
459 * X_add_number is set to the register number, and truth is returned.
460 * Input_line_pointer->(next non-blank) char after operand, or is in
461 * its original state.
465 data_register_name (expressionP)
466 expressionS *expressionP;
473 /* Find the spelling of the operand. */
474 start = name = input_line_pointer;
476 c = get_symbol_end ();
477 reg_number = reg_name_search (data_registers, DATA_REG_NAME_CNT, name);
479 /* Put back the delimiting char. */
480 *input_line_pointer = c;
482 /* Look to see if it's in the register table. */
485 expressionP->X_op = O_register;
486 expressionP->X_add_number = reg_number;
488 /* Make the rest nice. */
489 expressionP->X_add_symbol = NULL;
490 expressionP->X_op_symbol = NULL;
495 /* Reset the line as if we had not done anything. */
496 input_line_pointer = start;
500 /* Summary of register_name().
502 * in: Input_line_pointer points to 1st char of operand.
504 * out: An expressionS.
505 * The operand may have been a register: in this case, X_op == O_register,
506 * X_add_number is set to the register number, and truth is returned.
507 * Input_line_pointer->(next non-blank) char after operand, or is in
508 * its original state.
512 address_register_name (expressionP)
513 expressionS *expressionP;
520 /* Find the spelling of the operand. */
521 start = name = input_line_pointer;
523 c = get_symbol_end ();
524 reg_number = reg_name_search (address_registers, ADDRESS_REG_NAME_CNT, name);
526 /* Put back the delimiting char. */
527 *input_line_pointer = c;
529 /* Look to see if it's in the register table. */
532 expressionP->X_op = O_register;
533 expressionP->X_add_number = reg_number;
535 /* Make the rest nice. */
536 expressionP->X_add_symbol = NULL;
537 expressionP->X_op_symbol = NULL;
542 /* Reset the line as if we had not done anything. */
543 input_line_pointer = start;
547 /* Summary of register_name().
549 * in: Input_line_pointer points to 1st char of operand.
551 * out: An expressionS.
552 * The operand may have been a register: in this case, X_op == O_register,
553 * X_add_number is set to the register number, and truth is returned.
554 * Input_line_pointer->(next non-blank) char after operand, or is in
555 * its original state.
559 other_register_name (expressionP)
560 expressionS *expressionP;
567 /* Find the spelling of the operand. */
568 start = name = input_line_pointer;
570 c = get_symbol_end ();
571 reg_number = reg_name_search (other_registers, OTHER_REG_NAME_CNT, name);
573 /* Put back the delimiting char. */
574 *input_line_pointer = c;
576 /* Look to see if it's in the register table. */
578 || (reg_number == AM33 && HAVE_AM33))
580 expressionP->X_op = O_register;
581 expressionP->X_add_number = 0;
583 /* Make the rest nice. */
584 expressionP->X_add_symbol = NULL;
585 expressionP->X_op_symbol = NULL;
590 /* Reset the line as if we had not done anything. */
591 input_line_pointer = start;
595 static bfd_boolean double_register_name PARAMS ((expressionS *));
596 static bfd_boolean float_register_name PARAMS ((expressionS *));
598 /* Summary of float_register_name:
600 in: Input_line_pointer points to 1st char of operand.
603 The operand may have been a register: in this case, X_op == O_register,
604 X_add_number is set to the register number, and truth is returned.
605 Input_line_pointer->(next non-blank) char after operand, or is in
606 its original state. */
609 float_register_name (expressionP)
610 expressionS *expressionP;
617 /* Find the spelling of the operand. */
618 start = name = input_line_pointer;
620 c = get_symbol_end ();
621 reg_number = reg_name_search (float_registers, FLOAT_REG_NAME_CNT, name);
623 /* Put back the delimiting char. */
624 * input_line_pointer = c;
626 /* Look to see if it's in the register table. */
629 expressionP->X_op = O_register;
630 expressionP->X_add_number = reg_number;
632 /* Make the rest nice. */
633 expressionP->X_add_symbol = NULL;
634 expressionP->X_op_symbol = NULL;
639 /* Reset the line as if we had not done anything. */
640 input_line_pointer = start;
644 /* Summary of double_register_name:
646 in: Input_line_pointer points to 1st char of operand.
649 The operand may have been a register: in this case, X_op == O_register,
650 X_add_number is set to the register number, and truth is returned.
651 Input_line_pointer->(next non-blank) char after operand, or is in
652 its original state. */
655 double_register_name (expressionP)
656 expressionS *expressionP;
663 /* Find the spelling of the operand. */
664 start = name = input_line_pointer;
666 c = get_symbol_end ();
667 reg_number = reg_name_search (double_registers, DOUBLE_REG_NAME_CNT, name);
669 /* Put back the delimiting char. */
670 * input_line_pointer = c;
672 /* Look to see if it's in the register table. */
675 expressionP->X_op = O_register;
676 expressionP->X_add_number = reg_number;
678 /* Make the rest nice. */
679 expressionP->X_add_symbol = NULL;
680 expressionP->X_op_symbol = NULL;
685 /* Reset the line as if we had not done anything. */
686 input_line_pointer = start;
691 md_show_usage (stream)
694 fprintf (stream, _("MN10300 assembler options:\n\
699 md_parse_option (c, arg)
700 int c ATTRIBUTE_UNUSED;
701 char *arg ATTRIBUTE_UNUSED;
707 md_undefined_symbol (name)
708 char *name ATTRIBUTE_UNUSED;
714 md_atof (type, litp, sizep)
720 LITTLENUM_TYPE words[4];
736 return "bad call to md_atof";
739 t = atof_ieee (input_line_pointer, type, words);
741 input_line_pointer = t;
745 for (i = prec - 1; i >= 0; i--)
747 md_number_to_chars (litp, (valueT) words[i], 2);
755 md_convert_frag (abfd, sec, fragP)
756 bfd *abfd ATTRIBUTE_UNUSED;
760 static unsigned long label_count = 0;
763 subseg_change (sec, 0);
764 if (fragP->fr_subtype == 0)
766 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
767 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
771 else if (fragP->fr_subtype == 1)
773 /* Reverse the condition of the first branch. */
774 int offset = fragP->fr_fix;
775 int opcode = fragP->fr_literal[offset] & 0xff;
812 fragP->fr_literal[offset] = opcode;
814 /* Create a fixup for the reversed conditional branch. */
815 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
816 fix_new (fragP, fragP->fr_fix + 1, 1,
817 symbol_new (buf, sec, 0, fragP->fr_next),
818 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
820 /* Now create the unconditional branch + fixup to the
822 fragP->fr_literal[offset + 2] = 0xcc;
823 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
824 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
828 else if (fragP->fr_subtype == 2)
830 /* Reverse the condition of the first branch. */
831 int offset = fragP->fr_fix;
832 int opcode = fragP->fr_literal[offset] & 0xff;
869 fragP->fr_literal[offset] = opcode;
871 /* Create a fixup for the reversed conditional branch. */
872 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
873 fix_new (fragP, fragP->fr_fix + 1, 1,
874 symbol_new (buf, sec, 0, fragP->fr_next),
875 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
877 /* Now create the unconditional branch + fixup to the
879 fragP->fr_literal[offset + 2] = 0xdc;
880 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
881 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
885 else if (fragP->fr_subtype == 3)
887 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
888 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
892 else if (fragP->fr_subtype == 4)
894 /* Reverse the condition of the first branch. */
895 int offset = fragP->fr_fix;
896 int opcode = fragP->fr_literal[offset + 1] & 0xff;
915 fragP->fr_literal[offset + 1] = opcode;
917 /* Create a fixup for the reversed conditional branch. */
918 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
919 fix_new (fragP, fragP->fr_fix + 2, 1,
920 symbol_new (buf, sec, 0, fragP->fr_next),
921 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
923 /* Now create the unconditional branch + fixup to the
925 fragP->fr_literal[offset + 3] = 0xcc;
926 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
927 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
931 else if (fragP->fr_subtype == 5)
933 /* Reverse the condition of the first branch. */
934 int offset = fragP->fr_fix;
935 int opcode = fragP->fr_literal[offset + 1] & 0xff;
951 fragP->fr_literal[offset + 1] = opcode;
953 /* Create a fixup for the reversed conditional branch. */
954 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
955 fix_new (fragP, fragP->fr_fix + 2, 1,
956 symbol_new (buf, sec, 0, fragP->fr_next),
957 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
959 /* Now create the unconditional branch + fixup to the
961 fragP->fr_literal[offset + 3] = 0xdc;
962 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
963 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
967 else if (fragP->fr_subtype == 6)
969 int offset = fragP->fr_fix;
970 fragP->fr_literal[offset] = 0xcd;
971 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
972 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
976 else if (fragP->fr_subtype == 7)
978 int offset = fragP->fr_fix;
979 fragP->fr_literal[offset] = 0xdd;
980 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
981 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
983 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
984 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
988 else if (fragP->fr_subtype == 8)
990 int offset = fragP->fr_fix;
991 fragP->fr_literal[offset] = 0xfa;
992 fragP->fr_literal[offset + 1] = 0xff;
993 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
994 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
998 else if (fragP->fr_subtype == 9)
1000 int offset = fragP->fr_fix;
1001 fragP->fr_literal[offset] = 0xfc;
1002 fragP->fr_literal[offset + 1] = 0xff;
1004 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
1005 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
1009 else if (fragP->fr_subtype == 10)
1011 fragP->fr_literal[fragP->fr_fix] = 0xca;
1012 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
1013 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
1017 else if (fragP->fr_subtype == 11)
1019 int offset = fragP->fr_fix;
1020 fragP->fr_literal[offset] = 0xcc;
1022 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
1023 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1027 else if (fragP->fr_subtype == 12)
1029 int offset = fragP->fr_fix;
1030 fragP->fr_literal[offset] = 0xdc;
1032 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
1033 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1037 else if (fragP->fr_subtype == 13)
1039 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
1040 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1044 else if (fragP->fr_subtype == 14)
1046 /* Reverse the condition of the first branch. */
1047 int offset = fragP->fr_fix;
1048 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1097 fragP->fr_literal[offset + 1] = opcode;
1099 /* Create a fixup for the reversed conditional branch. */
1100 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1101 fix_new (fragP, fragP->fr_fix + 2, 1,
1102 symbol_new (buf, sec, 0, fragP->fr_next),
1103 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1105 /* Now create the unconditional branch + fixup to the
1107 fragP->fr_literal[offset + 3] = 0xcc;
1108 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
1109 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
1113 else if (fragP->fr_subtype == 15)
1115 /* Reverse the condition of the first branch. */
1116 int offset = fragP->fr_fix;
1117 int opcode = fragP->fr_literal[offset + 1] & 0xff;
1166 fragP->fr_literal[offset + 1] = opcode;
1168 /* Create a fixup for the reversed conditional branch. */
1169 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
1170 fix_new (fragP, fragP->fr_fix + 2, 1,
1171 symbol_new (buf, sec, 0, fragP->fr_next),
1172 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
1174 /* Now create the unconditional branch + fixup to the
1176 fragP->fr_literal[offset + 3] = 0xdc;
1177 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
1178 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
1187 md_section_align (seg, addr)
1191 int align = bfd_get_section_alignment (stdoutput, seg);
1192 return ((addr + (1 << align) - 1) & (-1 << align));
1198 char *prev_name = "";
1199 register const struct mn10300_opcode *op;
1201 mn10300_hash = hash_new ();
1203 /* Insert unique names into hash table. The MN10300 instruction set
1204 has many identical opcode names that have different opcodes based
1205 on the operands. This hash table then provides a quick index to
1206 the first opcode with a particular name in the opcode table. */
1208 op = mn10300_opcodes;
1211 if (strcmp (prev_name, op->name))
1213 prev_name = (char *) op->name;
1214 hash_insert (mn10300_hash, op->name, (char *) op);
1219 /* Set the default machine type. */
1221 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
1222 as_warn (_("could not set architecture and machine"));
1224 current_machine = AM33_2;
1226 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
1227 as_warn (_("could not set architecture and machine"));
1229 current_machine = MN103;
1233 static symbolS *GOT_symbol;
1235 static inline int mn10300_check_fixup PARAMS ((struct mn10300_fixup *));
1236 static inline int mn10300_PIC_related_p PARAMS ((symbolS *));
1239 mn10300_PIC_related_p (sym)
1247 if (sym == GOT_symbol)
1250 exp = symbol_get_value_expression (sym);
1252 return (exp->X_op == O_PIC_reloc
1253 || mn10300_PIC_related_p (exp->X_add_symbol)
1254 || mn10300_PIC_related_p (exp->X_op_symbol));
1258 mn10300_check_fixup (fixup)
1259 struct mn10300_fixup *fixup;
1261 expressionS *exp = &fixup->exp;
1267 case O_subtract: /* If we're sufficiently unlucky that the label
1268 and the expression that references it happen
1269 to end up in different frags, the subtract
1270 won't be simplified within expression(). */
1271 /* The PIC-related operand must be the first operand of a sum. */
1272 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
1275 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1276 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1278 exp = symbol_get_value_expression (exp->X_add_symbol);
1282 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
1283 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
1287 fixup->reloc = exp->X_md;
1288 exp->X_op = O_symbol;
1289 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1290 && fixup->opindex >= 0
1291 && (mn10300_operands[fixup->opindex].flags
1292 & MN10300_OPERAND_RELAX))
1297 return (mn10300_PIC_related_p (exp->X_add_symbol)
1298 || mn10300_PIC_related_p (exp->X_op_symbol));
1305 mn10300_cons_fix_new (frag, off, size, exp)
1310 struct mn10300_fixup fixup;
1314 fixup.reloc = BFD_RELOC_UNUSED;
1316 mn10300_check_fixup (&fixup);
1318 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1322 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1326 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1335 else if (fixup.reloc == BFD_RELOC_UNUSED)
1339 fixup.reloc = BFD_RELOC_8;
1343 fixup.reloc = BFD_RELOC_16;
1347 fixup.reloc = BFD_RELOC_24;
1351 fixup.reloc = BFD_RELOC_32;
1360 as_bad (_("unsupported BFD relocation size %u"), size);
1361 fixup.reloc = BFD_RELOC_UNUSED;
1364 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1372 struct mn10300_opcode *opcode;
1373 struct mn10300_opcode *next_opcode;
1374 const unsigned char *opindex_ptr;
1375 int next_opindex, relaxable;
1376 unsigned long insn, extension, size = 0;
1381 /* Get the opcode. */
1382 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1387 /* Find the first opcode with the proper name. */
1388 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1391 as_bad (_("Unrecognized opcode: `%s'"), str);
1396 while (ISSPACE (*str))
1399 input_line_pointer = str;
1406 int extra_shift = 0;
1408 errmsg = _("Invalid opcode/operands");
1410 /* Reset the array of register operands. */
1411 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1417 insn = opcode->opcode;
1420 /* If the instruction is not available on the current machine
1421 then it can not possibly match. */
1423 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1424 && !(opcode->machine == AM33 && HAVE_AM33)
1425 && !(opcode->machine == AM30 && HAVE_AM30))
1428 for (op_idx = 1, opindex_ptr = opcode->operands;
1430 opindex_ptr++, op_idx++)
1432 const struct mn10300_operand *operand;
1435 if (next_opindex == 0)
1437 operand = &mn10300_operands[*opindex_ptr];
1441 operand = &mn10300_operands[next_opindex];
1445 while (*str == ' ' || *str == ',')
1448 if (operand->flags & MN10300_OPERAND_RELAX)
1451 /* Gather the operand. */
1452 hold = input_line_pointer;
1453 input_line_pointer = str;
1455 if (operand->flags & MN10300_OPERAND_PAREN)
1457 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1459 input_line_pointer = hold;
1463 input_line_pointer++;
1466 /* See if we can match the operands. */
1467 else if (operand->flags & MN10300_OPERAND_DREG)
1469 if (!data_register_name (&ex))
1471 input_line_pointer = hold;
1476 else if (operand->flags & MN10300_OPERAND_AREG)
1478 if (!address_register_name (&ex))
1480 input_line_pointer = hold;
1485 else if (operand->flags & MN10300_OPERAND_SP)
1487 char *start = input_line_pointer;
1488 char c = get_symbol_end ();
1490 if (strcasecmp (start, "sp") != 0)
1492 *input_line_pointer = c;
1493 input_line_pointer = hold;
1497 *input_line_pointer = c;
1500 else if (operand->flags & MN10300_OPERAND_RREG)
1502 if (!r_register_name (&ex))
1504 input_line_pointer = hold;
1509 else if (operand->flags & MN10300_OPERAND_XRREG)
1511 if (!xr_register_name (&ex))
1513 input_line_pointer = hold;
1518 else if (operand->flags & MN10300_OPERAND_FSREG)
1520 if (!float_register_name (&ex))
1522 input_line_pointer = hold;
1527 else if (operand->flags & MN10300_OPERAND_FDREG)
1529 if (!double_register_name (&ex))
1531 input_line_pointer = hold;
1536 else if (operand->flags & MN10300_OPERAND_FPCR)
1538 char *start = input_line_pointer;
1539 char c = get_symbol_end ();
1541 if (strcasecmp (start, "fpcr") != 0)
1543 *input_line_pointer = c;
1544 input_line_pointer = hold;
1548 *input_line_pointer = c;
1551 else if (operand->flags & MN10300_OPERAND_USP)
1553 char *start = input_line_pointer;
1554 char c = get_symbol_end ();
1556 if (strcasecmp (start, "usp") != 0)
1558 *input_line_pointer = c;
1559 input_line_pointer = hold;
1563 *input_line_pointer = c;
1566 else if (operand->flags & MN10300_OPERAND_SSP)
1568 char *start = input_line_pointer;
1569 char c = get_symbol_end ();
1571 if (strcasecmp (start, "ssp") != 0)
1573 *input_line_pointer = c;
1574 input_line_pointer = hold;
1578 *input_line_pointer = c;
1581 else if (operand->flags & MN10300_OPERAND_MSP)
1583 char *start = input_line_pointer;
1584 char c = get_symbol_end ();
1586 if (strcasecmp (start, "msp") != 0)
1588 *input_line_pointer = c;
1589 input_line_pointer = hold;
1593 *input_line_pointer = c;
1596 else if (operand->flags & MN10300_OPERAND_PC)
1598 char *start = input_line_pointer;
1599 char c = get_symbol_end ();
1601 if (strcasecmp (start, "pc") != 0)
1603 *input_line_pointer = c;
1604 input_line_pointer = hold;
1608 *input_line_pointer = c;
1611 else if (operand->flags & MN10300_OPERAND_EPSW)
1613 char *start = input_line_pointer;
1614 char c = get_symbol_end ();
1616 if (strcasecmp (start, "epsw") != 0)
1618 *input_line_pointer = c;
1619 input_line_pointer = hold;
1623 *input_line_pointer = c;
1626 else if (operand->flags & MN10300_OPERAND_PLUS)
1628 if (*input_line_pointer != '+')
1630 input_line_pointer = hold;
1634 input_line_pointer++;
1637 else if (operand->flags & MN10300_OPERAND_PSW)
1639 char *start = input_line_pointer;
1640 char c = get_symbol_end ();
1642 if (strcasecmp (start, "psw") != 0)
1644 *input_line_pointer = c;
1645 input_line_pointer = hold;
1649 *input_line_pointer = c;
1652 else if (operand->flags & MN10300_OPERAND_MDR)
1654 char *start = input_line_pointer;
1655 char c = get_symbol_end ();
1657 if (strcasecmp (start, "mdr") != 0)
1659 *input_line_pointer = c;
1660 input_line_pointer = hold;
1664 *input_line_pointer = c;
1667 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1669 unsigned int value = 0;
1670 if (*input_line_pointer != '[')
1672 input_line_pointer = hold;
1678 input_line_pointer++;
1680 /* We used to reject a null register list here; however,
1681 we accept it now so the compiler can emit "call"
1682 instructions for all calls to named functions.
1684 The linker can then fill in the appropriate bits for the
1685 register list and stack size or change the instruction
1686 into a "calls" if using "call" is not profitable. */
1687 while (*input_line_pointer != ']')
1692 if (*input_line_pointer == ',')
1693 input_line_pointer++;
1695 start = input_line_pointer;
1696 c = get_symbol_end ();
1698 if (strcasecmp (start, "d2") == 0)
1701 *input_line_pointer = c;
1703 else if (strcasecmp (start, "d3") == 0)
1706 *input_line_pointer = c;
1708 else if (strcasecmp (start, "a2") == 0)
1711 *input_line_pointer = c;
1713 else if (strcasecmp (start, "a3") == 0)
1716 *input_line_pointer = c;
1718 else if (strcasecmp (start, "other") == 0)
1721 *input_line_pointer = c;
1724 && strcasecmp (start, "exreg0") == 0)
1727 *input_line_pointer = c;
1730 && strcasecmp (start, "exreg1") == 0)
1733 *input_line_pointer = c;
1736 && strcasecmp (start, "exother") == 0)
1739 *input_line_pointer = c;
1742 && strcasecmp (start, "all") == 0)
1745 *input_line_pointer = c;
1749 input_line_pointer = hold;
1754 input_line_pointer++;
1755 mn10300_insert_operand (&insn, &extension, operand,
1756 value, (char *) NULL, 0, 0);
1760 else if (data_register_name (&ex))
1762 input_line_pointer = hold;
1766 else if (address_register_name (&ex))
1768 input_line_pointer = hold;
1772 else if (other_register_name (&ex))
1774 input_line_pointer = hold;
1778 else if (HAVE_AM33 && r_register_name (&ex))
1780 input_line_pointer = hold;
1784 else if (HAVE_AM33 && xr_register_name (&ex))
1786 input_line_pointer = hold;
1790 else if (HAVE_AM33_2 && float_register_name (&ex))
1792 input_line_pointer = hold;
1796 else if (HAVE_AM33_2 && double_register_name (&ex))
1798 input_line_pointer = hold;
1802 else if (*str == ')' || *str == '(')
1804 input_line_pointer = hold;
1816 errmsg = _("illegal operand");
1819 errmsg = _("missing operand");
1825 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1827 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1829 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1830 if ((operand->flags & mask) == 0)
1832 input_line_pointer = hold;
1837 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1839 else if (opcode->format == FMT_D2
1840 || opcode->format == FMT_D4
1841 || opcode->format == FMT_S2
1842 || opcode->format == FMT_S4
1843 || opcode->format == FMT_S6
1844 || opcode->format == FMT_D5)
1846 else if (opcode->format == FMT_D7)
1848 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1853 mn10300_insert_operand (&insn, &extension, operand,
1854 ex.X_add_number, (char *) NULL,
1857 /* And note the register number in the register array. */
1858 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1863 /* If this operand can be promoted, and it doesn't
1864 fit into the allocated bitfield for this insn,
1865 then promote it (ie this opcode does not match). */
1867 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1868 && !check_operand (insn, operand, ex.X_add_number))
1870 input_line_pointer = hold;
1875 mn10300_insert_operand (&insn, &extension, operand,
1876 ex.X_add_number, (char *) NULL,
1881 /* If this operand can be promoted, then this opcode didn't
1882 match since we can't know if it needed promotion! */
1883 if (operand->flags & MN10300_OPERAND_PROMOTE)
1885 input_line_pointer = hold;
1890 /* We need to generate a fixup for this expression. */
1891 if (fc >= MAX_INSN_FIXUPS)
1892 as_fatal (_("too many fixups"));
1893 fixups[fc].exp = ex;
1894 fixups[fc].opindex = *opindex_ptr;
1895 fixups[fc].reloc = BFD_RELOC_UNUSED;
1896 if (mn10300_check_fixup (& fixups[fc]))
1903 str = input_line_pointer;
1904 input_line_pointer = hold;
1906 while (*str == ' ' || *str == ',')
1911 /* Make sure we used all the operands! */
1915 /* If this instruction has registers that must not match, verify
1916 that they do indeed not match. */
1917 if (opcode->no_match_operands)
1921 /* Look at each operand to see if it's marked. */
1922 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1924 if ((1 << i) & opcode->no_match_operands)
1928 /* operand I is marked. Check that it does not match any
1929 operands > I which are marked. */
1930 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1932 if (((1 << j) & opcode->no_match_operands)
1933 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1935 errmsg = _("Invalid register specification.");
1947 next_opcode = opcode + 1;
1948 if (!strcmp (next_opcode->name, opcode->name))
1950 opcode = next_opcode;
1954 as_bad ("%s", errmsg);
1960 while (ISSPACE (*str))
1964 as_bad (_("junk at end of line: `%s'"), str);
1966 input_line_pointer = str;
1968 /* Determine the size of the instruction. */
1969 if (opcode->format == FMT_S0)
1972 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1975 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1978 if (opcode->format == FMT_D6)
1981 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1984 if (opcode->format == FMT_D8)
1987 if (opcode->format == FMT_D9)
1990 if (opcode->format == FMT_S4)
1993 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1996 if (opcode->format == FMT_D2)
1999 if (opcode->format == FMT_D3)
2002 if (opcode->format == FMT_D4)
2005 if (relaxable && fc > 0)
2007 /* On a 64-bit host the size of an 'int' is not the same
2008 as the size of a pointer, so we need a union to convert
2009 the opindex field of the fr_cgen structure into a char *
2010 so that it can be stored in the frag. We do not have
2011 to worry about loosing accuracy as we are not going to
2012 be even close to the 32bit limit of the int. */
2021 /* We want to anchor the line info to the previous frag (if
2022 there isn't one, create it), so that, when the insn is
2023 resized, we still get the right address for the beginning of
2026 dwarf2_emit_insn (0);
2031 /* Handle bra specially. Basically treat it like jmp so
2032 that we automatically handle 8, 16 and 32 bit offsets
2033 correctly as well as jumps to an undefined address.
2035 It is also important to not treat it like other bCC
2036 instructions since the long forms of bra is different
2037 from other bCC instructions. */
2038 if (opcode->opcode == 0xca00)
2050 else if (size == 3 && opcode->opcode == 0xcc0000)
2052 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
2054 /* bCC (uncommon cases) */
2058 opindex_converter.opindex = fixups[0].opindex;
2059 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
2060 fixups[0].exp.X_add_symbol,
2061 fixups[0].exp.X_add_number,
2062 opindex_converter.ptr);
2064 /* This is pretty hokey. We basically just care about the
2065 opcode, so we have to write out the first word big endian.
2067 The exception is "call", which has two operands that we
2070 The first operand (the register list) happens to be in the
2071 first instruction word, and will be in the right place if
2072 we output the first word in big endian mode.
2074 The second operand (stack size) is in the extension word,
2075 and we want it to appear as the first character in the extension
2076 word (as it appears in memory). Luckily, writing the extension
2077 word in big endian format will do what we want. */
2078 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
2081 number_to_chars_bigendian (f + 4, extension, 4);
2082 number_to_chars_bigendian (f + 8, 0, size - 8);
2085 number_to_chars_bigendian (f + 4, extension, size - 4);
2089 /* Allocate space for the instruction. */
2090 f = frag_more (size);
2092 /* Fill in bytes for the instruction. Note that opcode fields
2093 are written big-endian, 16 & 32bit immediates are written
2094 little endian. Egad. */
2095 if (opcode->format == FMT_S0
2096 || opcode->format == FMT_S1
2097 || opcode->format == FMT_D0
2098 || opcode->format == FMT_D6
2099 || opcode->format == FMT_D7
2100 || opcode->format == FMT_D10
2101 || opcode->format == FMT_D1)
2103 number_to_chars_bigendian (f, insn, size);
2105 else if (opcode->format == FMT_S2
2106 && opcode->opcode != 0xdf0000
2107 && opcode->opcode != 0xde0000)
2109 /* A format S2 instruction that is _not_ "ret" and "retf". */
2110 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
2111 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
2113 else if (opcode->format == FMT_S2)
2115 /* This must be a ret or retf, which is written entirely in
2116 big-endian format. */
2117 number_to_chars_bigendian (f, insn, 3);
2119 else if (opcode->format == FMT_S4
2120 && opcode->opcode != 0xdc000000)
2122 /* This must be a format S4 "call" instruction. What a pain. */
2123 unsigned long temp = (insn >> 8) & 0xffff;
2124 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2125 number_to_chars_littleendian (f + 1, temp, 2);
2126 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
2127 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2129 else if (opcode->format == FMT_S4)
2131 /* This must be a format S4 "jmp" instruction. */
2132 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
2133 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2134 number_to_chars_littleendian (f + 1, temp, 4);
2136 else if (opcode->format == FMT_S6)
2138 unsigned long temp = ((insn & 0xffffff) << 8)
2139 | ((extension >> 16) & 0xff);
2140 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
2141 number_to_chars_littleendian (f + 1, temp, 4);
2142 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2143 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2145 else if (opcode->format == FMT_D2
2146 && opcode->opcode != 0xfaf80000
2147 && opcode->opcode != 0xfaf00000
2148 && opcode->opcode != 0xfaf40000)
2150 /* A format D2 instruction where the 16bit immediate is
2151 really a single 16bit value, not two 8bit values. */
2152 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2153 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2155 else if (opcode->format == FMT_D2)
2157 /* A format D2 instruction where the 16bit immediate
2158 is really two 8bit immediates. */
2159 number_to_chars_bigendian (f, insn, 4);
2161 else if (opcode->format == FMT_D3)
2163 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2164 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2165 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2167 else if (opcode->format == FMT_D4)
2169 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2171 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2172 number_to_chars_littleendian (f + 2, temp, 4);
2174 else if (opcode->format == FMT_D5)
2176 unsigned long temp = (((insn & 0xffff) << 16)
2177 | ((extension >> 8) & 0xffff));
2179 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2180 number_to_chars_littleendian (f + 2, temp, 4);
2181 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2183 else if (opcode->format == FMT_D8)
2185 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2187 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2188 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2189 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2191 else if (opcode->format == FMT_D9)
2193 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2195 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2196 number_to_chars_littleendian (f + 3, temp, 4);
2199 /* Create any fixups. */
2200 for (i = 0; i < fc; i++)
2202 const struct mn10300_operand *operand;
2204 operand = &mn10300_operands[fixups[i].opindex];
2205 if (fixups[i].reloc != BFD_RELOC_UNUSED
2206 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2207 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2208 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2209 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2211 reloc_howto_type *reloc_howto;
2216 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2222 size = bfd_get_reloc_size (reloc_howto);
2224 if (size < 1 || size > 4)
2228 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2229 size, &fixups[i].exp,
2230 reloc_howto->pc_relative,
2235 int reloc, pcrel, reloc_size, offset;
2238 reloc = BFD_RELOC_NONE;
2239 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2240 reloc = fixups[i].reloc;
2241 /* How big is the reloc? Remember SPLIT relocs are
2242 implicitly 32bits. */
2243 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2245 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2248 reloc_size = operand->bits;
2250 /* Is the reloc pc-relative? */
2251 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2252 if (reloc != BFD_RELOC_NONE)
2253 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2255 offset = size - (reloc_size + operand->shift) / 8;
2257 /* Choose a proper BFD relocation type. */
2258 if (reloc != BFD_RELOC_NONE)
2262 if (reloc_size == 32)
2263 reloc = BFD_RELOC_32_PCREL;
2264 else if (reloc_size == 16)
2265 reloc = BFD_RELOC_16_PCREL;
2266 else if (reloc_size == 8)
2267 reloc = BFD_RELOC_8_PCREL;
2273 if (reloc_size == 32)
2274 reloc = BFD_RELOC_32;
2275 else if (reloc_size == 16)
2276 reloc = BFD_RELOC_16;
2277 else if (reloc_size == 8)
2278 reloc = BFD_RELOC_8;
2283 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2284 reloc_size / 8, &fixups[i].exp, pcrel,
2285 ((bfd_reloc_code_real_type) reloc));
2288 fixP->fx_offset += offset;
2292 dwarf2_emit_insn (size);
2296 /* If while processing a fixup, a reloc really needs to be created
2297 then it is done here. */
2300 tc_gen_reloc (seg, fixp)
2301 asection *seg ATTRIBUTE_UNUSED;
2305 reloc = (arelent *) xmalloc (sizeof (arelent));
2307 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2308 if (reloc->howto == (reloc_howto_type *) NULL)
2310 as_bad_where (fixp->fx_file, fixp->fx_line,
2311 _("reloc %d not supported by object file format"),
2312 (int) fixp->fx_r_type);
2315 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2318 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2320 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2324 if (fixp->fx_addsy && fixp->fx_subsy)
2326 reloc->sym_ptr_ptr = NULL;
2328 /* If we got a difference between two symbols, and the
2329 subtracted symbol is in the current section, use a
2330 PC-relative relocation. If both symbols are in the same
2331 section, the difference would have already been simplified
2333 if (S_GET_SEGMENT (fixp->fx_subsy) == seg)
2335 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2336 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2337 reloc->addend = (reloc->address - S_GET_VALUE (fixp->fx_subsy)
2340 switch (fixp->fx_r_type)
2343 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2348 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2349 BFD_RELOC_16_PCREL);
2353 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2354 BFD_RELOC_24_PCREL);
2358 reloc->howto = bfd_reloc_type_lookup (stdoutput,
2359 BFD_RELOC_32_PCREL);
2363 /* Try to compute the absolute value below. */
2368 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2369 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2371 as_bad_where (fixp->fx_file, fixp->fx_line,
2372 "Difference of symbols in different sections is not supported");
2376 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2378 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2379 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2381 switch (fixp->fx_r_type)
2384 md_number_to_chars (fixpos, reloc->addend, 1);
2388 md_number_to_chars (fixpos, reloc->addend, 2);
2392 md_number_to_chars (fixpos, reloc->addend, 3);
2396 md_number_to_chars (fixpos, reloc->addend, 4);
2401 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2406 if (reloc->sym_ptr_ptr)
2407 free (reloc->sym_ptr_ptr);
2413 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2414 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2415 reloc->addend = fixp->fx_offset;
2421 md_estimate_size_before_relax (fragp, seg)
2425 if (fragp->fr_subtype == 6
2426 && (!S_IS_DEFINED (fragp->fr_symbol)
2427 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2428 fragp->fr_subtype = 7;
2429 else if (fragp->fr_subtype == 8
2430 && (!S_IS_DEFINED (fragp->fr_symbol)
2431 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2432 fragp->fr_subtype = 9;
2433 else if (fragp->fr_subtype == 10
2434 && (!S_IS_DEFINED (fragp->fr_symbol)
2435 || seg != S_GET_SEGMENT (fragp->fr_symbol)))
2436 fragp->fr_subtype = 12;
2438 if (fragp->fr_subtype == 13)
2440 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2443 return md_relax_table[fragp->fr_subtype].rlx_length;
2447 md_pcrel_from (fixp)
2450 if (fixp->fx_addsy != (symbolS *) NULL && !S_IS_DEFINED (fixp->fx_addsy))
2452 /* The symbol is undefined. Let the linker figure it out. */
2455 return fixp->fx_frag->fr_address + fixp->fx_where;
2459 md_apply_fix (fixP, valP, seg)
2464 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2466 int value = (int) * valP;
2468 assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2470 /* This should never happen. */
2471 if (seg->flags & SEC_ALLOC)
2474 /* The value we are passed in *valuep includes the symbol values.
2475 If we are doing this relocation the code in write.c is going to
2476 call bfd_install_relocation, which is also going to use the symbol
2477 value. That means that if the reloc is fully resolved we want to
2478 use *valuep since bfd_install_relocation is not being used.
2480 However, if the reloc is not fully resolved we do not want to use
2481 *valuep, and must use fx_offset instead. However, if the reloc
2482 is PC relative, we do want to use *valuep since it includes the
2483 result of md_pcrel_from. */
2484 if (fixP->fx_addsy != (symbolS *) NULL && ! fixP->fx_pcrel)
2485 value = fixP->fx_offset;
2487 /* If the fix is relative to a symbol which is not defined, or not
2488 in the same segment as the fix, we cannot resolve it here. */
2489 if (fixP->fx_addsy != NULL
2490 && (! S_IS_DEFINED (fixP->fx_addsy)
2491 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2497 switch (fixP->fx_r_type)
2500 case BFD_RELOC_8_PCREL:
2505 case BFD_RELOC_16_PCREL:
2510 case BFD_RELOC_32_PCREL:
2514 case BFD_RELOC_VTABLE_INHERIT:
2515 case BFD_RELOC_VTABLE_ENTRY:
2519 case BFD_RELOC_NONE:
2521 as_bad_where (fixP->fx_file, fixP->fx_line,
2522 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2525 md_number_to_chars (fixpos, value, size);
2527 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2528 if (fixP->fx_addsy == NULL)
2532 /* Return zero if the fixup in fixp should be left alone and not
2536 mn10300_fix_adjustable (fixp)
2539 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2542 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
2543 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
2546 /* Do not adjust relocations involving symbols in code sections,
2547 because it breaks linker relaxations. This could be fixed in the
2548 linker, but this fix is simpler, and it pretty much only affects
2549 object size a little bit. */
2550 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2553 /* Likewise, do not adjust symbols that won't be merged, or debug
2554 symbols, because they too break relaxation. We do want to adjust
2555 other mergable symbols, like .rodata, because code relaxations
2556 need section-relative symbols to properly relax them. */
2557 if (! (S_GET_SEGMENT(fixp->fx_addsy)->flags & SEC_MERGE))
2559 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2565 /* Insert an operand value into an instruction. */
2568 mn10300_insert_operand (insnp, extensionp, operand, val, file, line, shift)
2569 unsigned long *insnp;
2570 unsigned long *extensionp;
2571 const struct mn10300_operand *operand;
2577 /* No need to check 32bit operands for a bit. Note that
2578 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2579 if (operand->bits != 32
2580 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2586 bits = operand->bits;
2587 if (operand->flags & MN10300_OPERAND_24BIT)
2590 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2592 max = (1 << (bits - 1)) - 1;
2593 min = - (1 << (bits - 1));
2597 max = (1 << bits) - 1;
2603 if (test < (offsetT) min || test > (offsetT) max)
2604 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
2607 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2609 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
2610 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
2613 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2615 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
2616 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
2619 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
2621 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
2622 explanation of these variables. Note that FMT-implied shifts
2623 are not taken into account for FP registers. */
2624 unsigned long mask_low, mask_high;
2625 int shl_low, shr_high, shl_high;
2627 switch (operand->bits)
2630 /* Handle regular FP registers. */
2631 if (operand->shift >= 0)
2633 /* This is an `m' register. */
2634 shl_low = operand->shift;
2635 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
2639 /* This is an `n' register. */
2640 shl_low = -operand->shift;
2641 shl_high = shl_low / 4;
2650 /* Handle accumulators. */
2651 shl_low = -operand->shift;
2661 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
2662 | ((val & mask_low) << shl_low));
2664 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
2666 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2667 << (operand->shift + shift));
2669 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2670 *insnp |= (((long) val & ((1 << operand->bits) - 1))
2671 << (operand->shift + shift + operand->bits));
2675 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2676 << (operand->shift + shift));
2678 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
2679 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
2680 << (operand->shift + shift + operand->bits));
2684 static unsigned long
2685 check_operand (insn, operand, val)
2686 unsigned long insn ATTRIBUTE_UNUSED;
2687 const struct mn10300_operand *operand;
2690 /* No need to check 32bit operands for a bit. Note that
2691 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
2692 if (operand->bits != 32
2693 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
2699 bits = operand->bits;
2700 if (operand->flags & MN10300_OPERAND_24BIT)
2703 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
2705 max = (1 << (bits - 1)) - 1;
2706 min = - (1 << (bits - 1));
2710 max = (1 << bits) - 1;
2716 if (test < (offsetT) min || test > (offsetT) max)
2725 set_arch_mach (mach)
2728 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2729 as_warn (_("could not set architecture and machine"));
2731 current_machine = mach;
2734 static inline char * mn10300_end_of_match PARAMS ((char *, char *));
2736 static inline char *
2737 mn10300_end_of_match (cont, what)
2740 int len = strlen (what);
2742 if (strncmp (cont, what, strlen (what)) == 0
2743 && ! is_part_of_name (cont[len]))
2750 mn10300_parse_name (name, exprP, mode, nextcharP)
2753 enum expr_mode mode;
2756 char *next = input_line_pointer;
2761 exprP->X_op_symbol = NULL;
2763 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2766 GOT_symbol = symbol_find_or_make (name);
2768 exprP->X_add_symbol = GOT_symbol;
2770 /* If we have an absolute symbol or a reg,
2771 then we know its value now. */
2772 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2773 if (mode != expr_defer && segment == absolute_section)
2775 exprP->X_op = O_constant;
2776 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2777 exprP->X_add_symbol = NULL;
2779 else if (mode != expr_defer && segment == reg_section)
2781 exprP->X_op = O_register;
2782 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2783 exprP->X_add_symbol = NULL;
2787 exprP->X_op = O_symbol;
2788 exprP->X_add_number = 0;
2794 exprP->X_add_symbol = symbol_find_or_make (name);
2796 if (*nextcharP != '@')
2798 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2799 reloc_type = BFD_RELOC_32_GOTOFF;
2800 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2801 reloc_type = BFD_RELOC_MN10300_GOT32;
2802 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2803 reloc_type = BFD_RELOC_32_PLT_PCREL;
2807 *input_line_pointer = *nextcharP;
2808 input_line_pointer = next_end;
2809 *nextcharP = *input_line_pointer;
2810 *input_line_pointer = '\0';
2812 exprP->X_op = O_PIC_reloc;
2813 exprP->X_add_number = 0;
2814 exprP->X_md = reloc_type;