1 /* tc-mn10300.c -- Assembler code for the Matsushita 10300
2 Copyright (C) 1996-2018 Free Software Foundation, Inc.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
19 Boston, MA 02110-1301, USA. */
22 #include "safe-ctype.h"
24 #include "opcode/mn10300.h"
25 #include "dwarf2dbg.h"
26 #include "libiberty.h"
28 /* Structure to hold information about predefined registers. */
35 /* Generic assembler global variables which must be defined by all
38 /* Characters which always start a comment. */
39 const char comment_chars[] = "#";
41 /* Characters which start a comment at the beginning of a line. */
42 const char line_comment_chars[] = ";#";
44 /* Characters which may be used to separate multiple commands on a
46 const char line_separator_chars[] = ";";
48 /* Characters which are used to indicate an exponent in a floating
50 const char EXP_CHARS[] = "eE";
52 /* Characters which mean that a number is a floating point constant,
54 const char FLT_CHARS[] = "dD";
56 const relax_typeS md_relax_table[] =
58 /* The plus values for the bCC and fBCC instructions in the table below
59 are because the branch instruction is translated into a jump
60 instruction that is now +2 or +3 bytes further on in memory, and the
61 correct size of jump instruction must be selected. */
64 {0x7fff + 2, -0x8000 + 2, 5, 2},
65 {0x7fffffff, -0x80000000, 7, 0},
67 /* bCC relaxing (uncommon cases for 3byte length instructions) */
69 {0x7fff + 3, -0x8000 + 3, 6, 5},
70 {0x7fffffff, -0x80000000, 8, 0},
73 {0x7fff, -0x8000, 5, 7},
74 {0x7fffffff, -0x80000000, 7, 0},
77 {0x7fff, -0x8000, 4, 9},
78 {0x7fffffff, -0x80000000, 6, 0},
82 {0x7fff, -0x8000, 3, 12},
83 {0x7fffffff, -0x80000000, 5, 0},
87 {0x7fff + 3, -0x8000 + 3, 6, 15},
88 {0x7fffffff, -0x80000000, 8, 0},
92 static int current_machine;
95 #define MAX_INSN_FIXUPS 5
101 bfd_reloc_code_real_type reloc;
103 struct mn10300_fixup fixups[MAX_INSN_FIXUPS];
106 /* We must store the value of each register operand so that we can
107 verify that certain registers do not match. */
108 int mn10300_reg_operands[MN10300_MAX_OPERANDS];
110 const char *md_shortopts = "";
112 struct option md_longopts[] =
114 {NULL, no_argument, NULL, 0}
117 size_t md_longopts_size = sizeof (md_longopts);
119 #define HAVE_AM33_2 (current_machine == AM33_2)
120 #define HAVE_AM33 (current_machine == AM33 || HAVE_AM33_2)
121 #define HAVE_AM30 (current_machine == AM30)
123 /* Opcode hash table. */
124 static struct hash_control *mn10300_hash;
126 /* This table is sorted. Suitable for searching by a binary search. */
127 static const struct reg_name data_registers[] =
135 static const struct reg_name address_registers[] =
143 static const struct reg_name r_registers[] =
187 static const struct reg_name xr_registers[] =
212 static const struct reg_name float_registers[] =
248 static const struct reg_name double_registers[] =
268 /* We abuse the `value' field, that would be otherwise unused, to
269 encode the architecture on which (access to) the register was
270 introduced. FIXME: we should probably warn when we encounter a
271 register name when assembling for an architecture that doesn't
272 support it, before parsing it as a symbol name. */
273 static const struct reg_name other_registers[] =
284 #define OTHER_REG_NAME_CNT ARRAY_SIZE (other_registers)
286 /* Perform a binary search of the given register table REGS to see
287 if NAME is a valid register name. Returns the register number from
288 the array on success, or -1 on failure. */
291 reg_name_search (const struct reg_name *regs,
304 middle = (low + high) / 2;
305 cmp = strcasecmp (name, regs[middle].name);
311 return regs[middle].value;
318 /* Looks at the current position in the input line to see if it is
319 the name of a register in TABLE. If it is, then the name is
320 converted into an expression returned in EXPRESSIONP (with X_op
321 set to O_register and X_add_number set to the register number), the
322 input pointer is left pointing at the first non-blank character after
323 the name and the function returns TRUE. Otherwise the input pointer
324 is left alone and the function returns FALSE. */
327 get_register_name (expressionS * expressionP,
328 const struct reg_name * table,
336 /* Find the spelling of the operand. */
337 start = input_line_pointer;
339 c = get_symbol_name (&name);
340 reg_number = reg_name_search (table, table_length, name);
342 /* Put back the delimiting char. */
343 (void) restore_line_pointer (c);
345 /* Look to see if it's in the register table. */
348 expressionP->X_op = O_register;
349 expressionP->X_add_number = reg_number;
351 /* Make the rest nice. */
352 expressionP->X_add_symbol = NULL;
353 expressionP->X_op_symbol = NULL;
358 /* Reset the line as if we had not done anything. */
359 input_line_pointer = start;
364 r_register_name (expressionS *expressionP)
366 return get_register_name (expressionP, r_registers, ARRAY_SIZE (r_registers));
371 xr_register_name (expressionS *expressionP)
373 return get_register_name (expressionP, xr_registers, ARRAY_SIZE (xr_registers));
377 data_register_name (expressionS *expressionP)
379 return get_register_name (expressionP, data_registers, ARRAY_SIZE (data_registers));
383 address_register_name (expressionS *expressionP)
385 return get_register_name (expressionP, address_registers, ARRAY_SIZE (address_registers));
389 float_register_name (expressionS *expressionP)
391 return get_register_name (expressionP, float_registers, ARRAY_SIZE (float_registers));
395 double_register_name (expressionS *expressionP)
397 return get_register_name (expressionP, double_registers, ARRAY_SIZE (double_registers));
401 other_register_name (expressionS *expressionP)
408 /* Find the spelling of the operand. */
409 start = input_line_pointer;
411 c = get_symbol_name (&name);
412 reg_number = reg_name_search (other_registers, ARRAY_SIZE (other_registers), name);
414 /* Put back the delimiting char. */
415 (void) restore_line_pointer (c);
417 /* Look to see if it's in the register table. */
419 || (reg_number == AM33 && HAVE_AM33))
421 expressionP->X_op = O_register;
422 expressionP->X_add_number = 0;
424 /* Make the rest nice. */
425 expressionP->X_add_symbol = NULL;
426 expressionP->X_op_symbol = NULL;
431 /* Reset the line as if we had not done anything. */
432 input_line_pointer = start;
437 md_show_usage (FILE *stream)
439 fprintf (stream, _("MN10300 assembler options:\n\
444 md_parse_option (int c ATTRIBUTE_UNUSED, const char *arg ATTRIBUTE_UNUSED)
450 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
456 md_atof (int type, char *litp, int *sizep)
458 return ieee_md_atof (type, litp, sizep, FALSE);
462 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
466 static unsigned long label_count = 0;
469 subseg_change (sec, 0);
470 if (fragP->fr_subtype == 0)
472 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
473 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
477 else if (fragP->fr_subtype == 1)
479 /* Reverse the condition of the first branch. */
480 int offset = fragP->fr_fix;
481 int opcode = fragP->fr_literal[offset] & 0xff;
518 fragP->fr_literal[offset] = opcode;
520 /* Create a fixup for the reversed conditional branch. */
521 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
522 fix_new (fragP, fragP->fr_fix + 1, 1,
523 symbol_new (buf, sec, 0, fragP->fr_next),
524 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
526 /* Now create the unconditional branch + fixup to the
528 fragP->fr_literal[offset + 2] = 0xcc;
529 fix_new (fragP, fragP->fr_fix + 3, 2, fragP->fr_symbol,
530 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
534 else if (fragP->fr_subtype == 2)
536 /* Reverse the condition of the first branch. */
537 int offset = fragP->fr_fix;
538 int opcode = fragP->fr_literal[offset] & 0xff;
575 fragP->fr_literal[offset] = opcode;
577 /* Create a fixup for the reversed conditional branch. */
578 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
579 fix_new (fragP, fragP->fr_fix + 1, 1,
580 symbol_new (buf, sec, 0, fragP->fr_next),
581 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
583 /* Now create the unconditional branch + fixup to the
585 fragP->fr_literal[offset + 2] = 0xdc;
586 fix_new (fragP, fragP->fr_fix + 3, 4, fragP->fr_symbol,
587 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
591 else if (fragP->fr_subtype == 3)
593 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
594 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
598 else if (fragP->fr_subtype == 4)
600 /* Reverse the condition of the first branch. */
601 int offset = fragP->fr_fix;
602 int opcode = fragP->fr_literal[offset + 1] & 0xff;
621 fragP->fr_literal[offset + 1] = opcode;
623 /* Create a fixup for the reversed conditional branch. */
624 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
625 fix_new (fragP, fragP->fr_fix + 2, 1,
626 symbol_new (buf, sec, 0, fragP->fr_next),
627 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
629 /* Now create the unconditional branch + fixup to the
631 fragP->fr_literal[offset + 3] = 0xcc;
632 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
633 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
637 else if (fragP->fr_subtype == 5)
639 /* Reverse the condition of the first branch. */
640 int offset = fragP->fr_fix;
641 int opcode = fragP->fr_literal[offset + 1] & 0xff;
657 fragP->fr_literal[offset + 1] = opcode;
659 /* Create a fixup for the reversed conditional branch. */
660 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
661 fix_new (fragP, fragP->fr_fix + 2, 1,
662 symbol_new (buf, sec, 0, fragP->fr_next),
663 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
665 /* Now create the unconditional branch + fixup to the
667 fragP->fr_literal[offset + 3] = 0xdc;
668 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
669 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
673 else if (fragP->fr_subtype == 6)
675 int offset = fragP->fr_fix;
677 fragP->fr_literal[offset] = 0xcd;
678 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
679 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
683 else if (fragP->fr_subtype == 7)
685 int offset = fragP->fr_fix;
687 fragP->fr_literal[offset] = 0xdd;
688 fragP->fr_literal[offset + 5] = fragP->fr_literal[offset + 3];
689 fragP->fr_literal[offset + 6] = fragP->fr_literal[offset + 4];
690 fragP->fr_literal[offset + 3] = 0;
691 fragP->fr_literal[offset + 4] = 0;
693 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
694 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
698 else if (fragP->fr_subtype == 8)
700 int offset = fragP->fr_fix;
702 fragP->fr_literal[offset] = 0xfa;
703 fragP->fr_literal[offset + 1] = 0xff;
704 fix_new (fragP, fragP->fr_fix + 2, 2, fragP->fr_symbol,
705 fragP->fr_offset + 2, 1, BFD_RELOC_16_PCREL);
709 else if (fragP->fr_subtype == 9)
711 int offset = fragP->fr_fix;
713 fragP->fr_literal[offset] = 0xfc;
714 fragP->fr_literal[offset + 1] = 0xff;
716 fix_new (fragP, fragP->fr_fix + 2, 4, fragP->fr_symbol,
717 fragP->fr_offset + 2, 1, BFD_RELOC_32_PCREL);
721 else if (fragP->fr_subtype == 10)
723 fragP->fr_literal[fragP->fr_fix] = 0xca;
724 fix_new (fragP, fragP->fr_fix + 1, 1, fragP->fr_symbol,
725 fragP->fr_offset + 1, 1, BFD_RELOC_8_PCREL);
729 else if (fragP->fr_subtype == 11)
731 int offset = fragP->fr_fix;
733 fragP->fr_literal[offset] = 0xcc;
735 fix_new (fragP, fragP->fr_fix + 1, 2, fragP->fr_symbol,
736 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
740 else if (fragP->fr_subtype == 12)
742 int offset = fragP->fr_fix;
744 fragP->fr_literal[offset] = 0xdc;
746 fix_new (fragP, fragP->fr_fix + 1, 4, fragP->fr_symbol,
747 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
751 else if (fragP->fr_subtype == 13)
753 fix_new (fragP, fragP->fr_fix + 2, 1, fragP->fr_symbol,
754 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
758 else if (fragP->fr_subtype == 14)
760 /* Reverse the condition of the first branch. */
761 int offset = fragP->fr_fix;
762 int opcode = fragP->fr_literal[offset + 1] & 0xff;
811 fragP->fr_literal[offset + 1] = opcode;
813 /* Create a fixup for the reversed conditional branch. */
814 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
815 fix_new (fragP, fragP->fr_fix + 2, 1,
816 symbol_new (buf, sec, 0, fragP->fr_next),
817 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
819 /* Now create the unconditional branch + fixup to the
821 fragP->fr_literal[offset + 3] = 0xcc;
822 fix_new (fragP, fragP->fr_fix + 4, 2, fragP->fr_symbol,
823 fragP->fr_offset + 1, 1, BFD_RELOC_16_PCREL);
827 else if (fragP->fr_subtype == 15)
829 /* Reverse the condition of the first branch. */
830 int offset = fragP->fr_fix;
831 int opcode = fragP->fr_literal[offset + 1] & 0xff;
880 fragP->fr_literal[offset + 1] = opcode;
882 /* Create a fixup for the reversed conditional branch. */
883 sprintf (buf, ".%s_%ld", FAKE_LABEL_NAME, label_count++);
884 fix_new (fragP, fragP->fr_fix + 2, 1,
885 symbol_new (buf, sec, 0, fragP->fr_next),
886 fragP->fr_offset + 2, 1, BFD_RELOC_8_PCREL);
888 /* Now create the unconditional branch + fixup to the
890 fragP->fr_literal[offset + 3] = 0xdc;
891 fix_new (fragP, fragP->fr_fix + 4, 4, fragP->fr_symbol,
892 fragP->fr_offset + 1, 1, BFD_RELOC_32_PCREL);
901 md_section_align (asection *seg, valueT addr)
903 int align = bfd_get_section_alignment (stdoutput, seg);
905 return ((addr + (1 << align) - 1) & -(1 << align));
911 const char *prev_name = "";
912 const struct mn10300_opcode *op;
914 mn10300_hash = hash_new ();
916 /* Insert unique names into hash table. The MN10300 instruction set
917 has many identical opcode names that have different opcodes based
918 on the operands. This hash table then provides a quick index to
919 the first opcode with a particular name in the opcode table. */
921 op = mn10300_opcodes;
924 if (strcmp (prev_name, op->name))
926 prev_name = (char *) op->name;
927 hash_insert (mn10300_hash, op->name, (char *) op);
932 /* Set the default machine type. */
934 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, AM33_2))
935 as_warn (_("could not set architecture and machine"));
937 current_machine = AM33_2;
939 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, MN103))
940 as_warn (_("could not set architecture and machine"));
942 current_machine = MN103;
945 /* Set linkrelax here to avoid fixups in most sections. */
949 static symbolS *GOT_symbol;
952 mn10300_PIC_related_p (symbolS *sym)
959 if (sym == GOT_symbol)
962 exp = symbol_get_value_expression (sym);
964 return (exp->X_op == O_PIC_reloc
965 || mn10300_PIC_related_p (exp->X_add_symbol)
966 || mn10300_PIC_related_p (exp->X_op_symbol));
970 mn10300_check_fixup (struct mn10300_fixup *fixup)
972 expressionS *exp = &fixup->exp;
978 case O_subtract: /* If we're sufficiently unlucky that the label
979 and the expression that references it happen
980 to end up in different frags, the subtract
981 won't be simplified within expression(). */
982 /* The PIC-related operand must be the first operand of a sum. */
983 if (exp != &fixup->exp || mn10300_PIC_related_p (exp->X_op_symbol))
986 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
987 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
989 exp = symbol_get_value_expression (exp->X_add_symbol);
993 if (exp->X_add_symbol && exp->X_add_symbol == GOT_symbol)
994 fixup->reloc = BFD_RELOC_32_GOT_PCREL;
998 fixup->reloc = exp->X_md;
999 exp->X_op = O_symbol;
1000 if (fixup->reloc == BFD_RELOC_32_PLT_PCREL
1001 && fixup->opindex >= 0
1002 && (mn10300_operands[fixup->opindex].flags
1003 & MN10300_OPERAND_RELAX))
1008 return (mn10300_PIC_related_p (exp->X_add_symbol)
1009 || mn10300_PIC_related_p (exp->X_op_symbol));
1016 mn10300_cons_fix_new (fragS *frag, int off, int size, expressionS *exp,
1017 bfd_reloc_code_real_type r ATTRIBUTE_UNUSED)
1019 struct mn10300_fixup fixup;
1023 fixup.reloc = BFD_RELOC_UNUSED;
1025 mn10300_check_fixup (&fixup);
1027 if (fixup.reloc == BFD_RELOC_MN10300_GOT32)
1031 fixup.reloc = BFD_RELOC_MN10300_GOT16;
1035 fixup.reloc = BFD_RELOC_MN10300_GOT24;
1044 else if (fixup.reloc == BFD_RELOC_UNUSED)
1048 fixup.reloc = BFD_RELOC_8;
1052 fixup.reloc = BFD_RELOC_16;
1056 fixup.reloc = BFD_RELOC_24;
1060 fixup.reloc = BFD_RELOC_32;
1069 as_bad (_("unsupported BFD relocation size %u"), size);
1070 fixup.reloc = BFD_RELOC_UNUSED;
1073 fix_new_exp (frag, off, size, &fixup.exp, 0, fixup.reloc);
1077 check_operand (const struct mn10300_operand *operand,
1080 /* No need to check 32bit operands for a bit. Note that
1081 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1082 if (operand->bits != 32
1083 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1089 bits = operand->bits;
1090 if (operand->flags & MN10300_OPERAND_24BIT)
1093 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1095 max = (1 << (bits - 1)) - 1;
1096 min = - (1 << (bits - 1));
1100 max = (1 << bits) - 1;
1106 if (test < (offsetT) min || test > (offsetT) max)
1112 /* Insert an operand value into an instruction. */
1115 mn10300_insert_operand (unsigned long *insnp,
1116 unsigned long *extensionp,
1117 const struct mn10300_operand *operand,
1123 /* No need to check 32bit operands for a bit. Note that
1124 MN10300_OPERAND_SPLIT is an implicit 32bit operand. */
1125 if (operand->bits != 32
1126 && (operand->flags & MN10300_OPERAND_SPLIT) == 0)
1132 bits = operand->bits;
1133 if (operand->flags & MN10300_OPERAND_24BIT)
1136 if ((operand->flags & MN10300_OPERAND_SIGNED) != 0)
1138 max = (1 << (bits - 1)) - 1;
1139 min = - (1 << (bits - 1));
1143 max = (1 << bits) - 1;
1149 if (test < (offsetT) min || test > (offsetT) max)
1150 as_warn_value_out_of_range (_("operand"), test, (offsetT) min, (offsetT) max, file, line);
1153 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
1155 *insnp |= (val >> (32 - operand->bits)) & ((1 << operand->bits) - 1);
1156 *extensionp |= ((val & ((1 << (32 - operand->bits)) - 1))
1159 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
1161 *insnp |= (val >> (24 - operand->bits)) & ((1 << operand->bits) - 1);
1162 *extensionp |= ((val & ((1 << (24 - operand->bits)) - 1))
1165 else if ((operand->flags & (MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG)))
1167 /* See devo/opcodes/m10300-opc.c just before #define FSM0 for an
1168 explanation of these variables. Note that FMT-implied shifts
1169 are not taken into account for FP registers. */
1170 unsigned long mask_low, mask_high;
1171 int shl_low, shr_high, shl_high;
1173 switch (operand->bits)
1176 /* Handle regular FP registers. */
1177 if (operand->shift >= 0)
1179 /* This is an `m' register. */
1180 shl_low = operand->shift;
1181 shl_high = 8 + (8 & shl_low) + (shl_low & 4) / 4;
1185 /* This is an `n' register. */
1186 shl_low = -operand->shift;
1187 shl_high = shl_low / 4;
1196 /* Handle accumulators. */
1197 shl_low = -operand->shift;
1207 *insnp |= ((((val & mask_high) >> shr_high) << shl_high)
1208 | ((val & mask_low) << shl_low));
1210 else if ((operand->flags & MN10300_OPERAND_EXTENDED) == 0)
1212 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1213 << (operand->shift + shift));
1215 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1216 *insnp |= (((long) val & ((1 << operand->bits) - 1))
1217 << (operand->shift + shift + operand->bits));
1221 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1222 << (operand->shift + shift));
1224 if ((operand->flags & MN10300_OPERAND_REPEATED) != 0)
1225 *extensionp |= (((long) val & ((1 << operand->bits) - 1))
1226 << (operand->shift + shift + operand->bits));
1231 md_assemble (char *str)
1234 struct mn10300_opcode *opcode;
1235 struct mn10300_opcode *next_opcode;
1236 const unsigned char *opindex_ptr;
1237 int next_opindex, relaxable;
1238 unsigned long insn, extension, size = 0;
1243 /* Get the opcode. */
1244 for (s = str; *s != '\0' && !ISSPACE (*s); s++)
1249 /* Find the first opcode with the proper name. */
1250 opcode = (struct mn10300_opcode *) hash_find (mn10300_hash, str);
1253 as_bad (_("Unrecognized opcode: `%s'"), str);
1258 while (ISSPACE (*str))
1261 input_line_pointer = str;
1268 int extra_shift = 0;
1270 errmsg = _("Invalid opcode/operands");
1272 /* Reset the array of register operands. */
1273 memset (mn10300_reg_operands, -1, sizeof (mn10300_reg_operands));
1279 insn = opcode->opcode;
1282 /* If the instruction is not available on the current machine
1283 then it can not possibly match. */
1285 && !(opcode->machine == AM33_2 && HAVE_AM33_2)
1286 && !(opcode->machine == AM33 && HAVE_AM33)
1287 && !(opcode->machine == AM30 && HAVE_AM30))
1290 for (op_idx = 1, opindex_ptr = opcode->operands;
1292 opindex_ptr++, op_idx++)
1294 const struct mn10300_operand *operand;
1297 if (next_opindex == 0)
1299 operand = &mn10300_operands[*opindex_ptr];
1303 operand = &mn10300_operands[next_opindex];
1307 while (*str == ' ' || *str == ',')
1310 if (operand->flags & MN10300_OPERAND_RELAX)
1313 /* Gather the operand. */
1314 hold = input_line_pointer;
1315 input_line_pointer = str;
1317 if (operand->flags & MN10300_OPERAND_PAREN)
1319 if (*input_line_pointer != ')' && *input_line_pointer != '(')
1321 input_line_pointer = hold;
1325 input_line_pointer++;
1328 /* See if we can match the operands. */
1329 else if (operand->flags & MN10300_OPERAND_DREG)
1331 if (!data_register_name (&ex))
1333 input_line_pointer = hold;
1338 else if (operand->flags & MN10300_OPERAND_AREG)
1340 if (!address_register_name (&ex))
1342 input_line_pointer = hold;
1347 else if (operand->flags & MN10300_OPERAND_SP)
1350 char c = get_symbol_name (&start);
1352 if (strcasecmp (start, "sp") != 0)
1354 (void) restore_line_pointer (c);
1355 input_line_pointer = hold;
1359 (void) restore_line_pointer (c);
1362 else if (operand->flags & MN10300_OPERAND_RREG)
1364 if (!r_register_name (&ex))
1366 input_line_pointer = hold;
1371 else if (operand->flags & MN10300_OPERAND_XRREG)
1373 if (!xr_register_name (&ex))
1375 input_line_pointer = hold;
1380 else if (operand->flags & MN10300_OPERAND_FSREG)
1382 if (!float_register_name (&ex))
1384 input_line_pointer = hold;
1389 else if (operand->flags & MN10300_OPERAND_FDREG)
1391 if (!double_register_name (&ex))
1393 input_line_pointer = hold;
1398 else if (operand->flags & MN10300_OPERAND_FPCR)
1401 char c = get_symbol_name (&start);
1403 if (strcasecmp (start, "fpcr") != 0)
1405 (void) restore_line_pointer (c);
1406 input_line_pointer = hold;
1410 (void) restore_line_pointer (c);
1413 else if (operand->flags & MN10300_OPERAND_USP)
1416 char c = get_symbol_name (&start);
1418 if (strcasecmp (start, "usp") != 0)
1420 (void) restore_line_pointer (c);
1421 input_line_pointer = hold;
1425 (void) restore_line_pointer (c);
1428 else if (operand->flags & MN10300_OPERAND_SSP)
1431 char c = get_symbol_name (&start);
1433 if (strcasecmp (start, "ssp") != 0)
1435 (void) restore_line_pointer (c);
1436 input_line_pointer = hold;
1440 (void) restore_line_pointer (c);
1443 else if (operand->flags & MN10300_OPERAND_MSP)
1446 char c = get_symbol_name (&start);
1448 if (strcasecmp (start, "msp") != 0)
1450 (void) restore_line_pointer (c);
1451 input_line_pointer = hold;
1455 (void) restore_line_pointer (c);
1458 else if (operand->flags & MN10300_OPERAND_PC)
1461 char c = get_symbol_name (&start);
1463 if (strcasecmp (start, "pc") != 0)
1465 (void) restore_line_pointer (c);
1466 input_line_pointer = hold;
1470 (void) restore_line_pointer (c);
1473 else if (operand->flags & MN10300_OPERAND_EPSW)
1476 char c = get_symbol_name (&start);
1478 if (strcasecmp (start, "epsw") != 0)
1480 (void) restore_line_pointer (c);
1481 input_line_pointer = hold;
1485 (void) restore_line_pointer (c);
1488 else if (operand->flags & MN10300_OPERAND_PLUS)
1490 if (*input_line_pointer != '+')
1492 input_line_pointer = hold;
1496 input_line_pointer++;
1499 else if (operand->flags & MN10300_OPERAND_PSW)
1502 char c = get_symbol_name (&start);
1504 if (strcasecmp (start, "psw") != 0)
1506 (void) restore_line_pointer (c);
1507 input_line_pointer = hold;
1511 (void) restore_line_pointer (c);
1514 else if (operand->flags & MN10300_OPERAND_MDR)
1517 char c = get_symbol_name (&start);
1519 if (strcasecmp (start, "mdr") != 0)
1521 (void) restore_line_pointer (c);
1522 input_line_pointer = hold;
1526 (void) restore_line_pointer (c);
1529 else if (operand->flags & MN10300_OPERAND_REG_LIST)
1531 unsigned int value = 0;
1532 if (*input_line_pointer != '[')
1534 input_line_pointer = hold;
1540 input_line_pointer++;
1542 /* We used to reject a null register list here; however,
1543 we accept it now so the compiler can emit "call"
1544 instructions for all calls to named functions.
1546 The linker can then fill in the appropriate bits for the
1547 register list and stack size or change the instruction
1548 into a "calls" if using "call" is not profitable. */
1549 while (*input_line_pointer != ']')
1554 if (*input_line_pointer == ',')
1555 input_line_pointer++;
1557 c = get_symbol_name (&start);
1559 if (strcasecmp (start, "d2") == 0)
1562 (void) restore_line_pointer (c);
1564 else if (strcasecmp (start, "d3") == 0)
1567 (void) restore_line_pointer (c);
1569 else if (strcasecmp (start, "a2") == 0)
1572 (void) restore_line_pointer (c);
1574 else if (strcasecmp (start, "a3") == 0)
1577 (void) restore_line_pointer (c);
1579 else if (strcasecmp (start, "other") == 0)
1582 (void) restore_line_pointer (c);
1585 && strcasecmp (start, "exreg0") == 0)
1588 (void) restore_line_pointer (c);
1591 && strcasecmp (start, "exreg1") == 0)
1594 (void) restore_line_pointer (c);
1597 && strcasecmp (start, "exother") == 0)
1600 (void) restore_line_pointer (c);
1603 && strcasecmp (start, "all") == 0)
1606 (void) restore_line_pointer (c);
1610 input_line_pointer = hold;
1615 input_line_pointer++;
1616 mn10300_insert_operand (& insn, & extension, operand,
1621 else if (data_register_name (&ex))
1623 input_line_pointer = hold;
1627 else if (address_register_name (&ex))
1629 input_line_pointer = hold;
1633 else if (other_register_name (&ex))
1635 input_line_pointer = hold;
1639 else if (HAVE_AM33 && r_register_name (&ex))
1641 input_line_pointer = hold;
1645 else if (HAVE_AM33 && xr_register_name (&ex))
1647 input_line_pointer = hold;
1651 else if (HAVE_AM33_2 && float_register_name (&ex))
1653 input_line_pointer = hold;
1657 else if (HAVE_AM33_2 && double_register_name (&ex))
1659 input_line_pointer = hold;
1663 else if (*str == ')' || *str == '(')
1665 input_line_pointer = hold;
1677 errmsg = _("illegal operand");
1680 errmsg = _("missing operand");
1686 mask = MN10300_OPERAND_DREG | MN10300_OPERAND_AREG;
1688 mask |= MN10300_OPERAND_RREG | MN10300_OPERAND_XRREG;
1690 mask |= MN10300_OPERAND_FSREG | MN10300_OPERAND_FDREG;
1691 if ((operand->flags & mask) == 0)
1693 input_line_pointer = hold;
1698 if (opcode->format == FMT_D1 || opcode->format == FMT_S1)
1700 else if (opcode->format == FMT_D2
1701 || opcode->format == FMT_D4
1702 || opcode->format == FMT_S2
1703 || opcode->format == FMT_S4
1704 || opcode->format == FMT_S6
1705 || opcode->format == FMT_D5)
1707 else if (opcode->format == FMT_D7)
1709 else if (opcode->format == FMT_D8 || opcode->format == FMT_D9)
1714 mn10300_insert_operand (& insn, & extension, operand,
1715 ex.X_add_number, NULL,
1718 /* And note the register number in the register array. */
1719 mn10300_reg_operands[op_idx - 1] = ex.X_add_number;
1724 /* If this operand can be promoted, and it doesn't
1725 fit into the allocated bitfield for this insn,
1726 then promote it (ie this opcode does not match). */
1728 & (MN10300_OPERAND_PROMOTE | MN10300_OPERAND_RELAX)
1729 && !check_operand (operand, ex.X_add_number))
1731 input_line_pointer = hold;
1736 mn10300_insert_operand (& insn, & extension, operand,
1737 ex.X_add_number, NULL, 0, 0);
1741 /* If this operand can be promoted, then this opcode didn't
1742 match since we can't know if it needed promotion! */
1743 if (operand->flags & MN10300_OPERAND_PROMOTE)
1745 input_line_pointer = hold;
1750 /* We need to generate a fixup for this expression. */
1751 if (fc >= MAX_INSN_FIXUPS)
1752 as_fatal (_("too many fixups"));
1753 fixups[fc].exp = ex;
1754 fixups[fc].opindex = *opindex_ptr;
1755 fixups[fc].reloc = BFD_RELOC_UNUSED;
1756 if (mn10300_check_fixup (& fixups[fc]))
1763 str = input_line_pointer;
1764 input_line_pointer = hold;
1766 while (*str == ' ' || *str == ',')
1770 /* Make sure we used all the operands! */
1774 /* If this instruction has registers that must not match, verify
1775 that they do indeed not match. */
1776 if (opcode->no_match_operands)
1778 /* Look at each operand to see if it's marked. */
1779 for (i = 0; i < MN10300_MAX_OPERANDS; i++)
1781 if ((1 << i) & opcode->no_match_operands)
1785 /* operand I is marked. Check that it does not match any
1786 operands > I which are marked. */
1787 for (j = i + 1; j < MN10300_MAX_OPERANDS; j++)
1789 if (((1 << j) & opcode->no_match_operands)
1790 && mn10300_reg_operands[i] == mn10300_reg_operands[j])
1792 errmsg = _("Invalid register specification.");
1804 next_opcode = opcode + 1;
1805 if (!strcmp (next_opcode->name, opcode->name))
1807 opcode = next_opcode;
1811 as_bad ("%s", errmsg);
1817 while (ISSPACE (*str))
1821 as_bad (_("junk at end of line: `%s'"), str);
1823 input_line_pointer = str;
1825 /* Determine the size of the instruction. */
1826 if (opcode->format == FMT_S0)
1829 if (opcode->format == FMT_S1 || opcode->format == FMT_D0)
1832 if (opcode->format == FMT_S2 || opcode->format == FMT_D1)
1835 if (opcode->format == FMT_D6)
1838 if (opcode->format == FMT_D7 || opcode->format == FMT_D10)
1841 if (opcode->format == FMT_D8)
1844 if (opcode->format == FMT_D9)
1847 if (opcode->format == FMT_S4)
1850 if (opcode->format == FMT_S6 || opcode->format == FMT_D5)
1853 if (opcode->format == FMT_D2)
1856 if (opcode->format == FMT_D3)
1859 if (opcode->format == FMT_D4)
1862 if (relaxable && fc > 0)
1864 /* On a 64-bit host the size of an 'int' is not the same
1865 as the size of a pointer, so we need a union to convert
1866 the opindex field of the fr_cgen structure into a char *
1867 so that it can be stored in the frag. We do not have
1868 to worry about losing accuracy as we are not going to
1869 be even close to the 32bit limit of the int. */
1878 /* We want to anchor the line info to the previous frag (if
1879 there isn't one, create it), so that, when the insn is
1880 resized, we still get the right address for the beginning of
1883 dwarf2_emit_insn (0);
1888 /* Handle bra specially. Basically treat it like jmp so
1889 that we automatically handle 8, 16 and 32 bit offsets
1890 correctly as well as jumps to an undefined address.
1892 It is also important to not treat it like other bCC
1893 instructions since the long forms of bra is different
1894 from other bCC instructions. */
1895 if (opcode->opcode == 0xca00)
1907 else if (size == 3 && opcode->opcode == 0xcc0000)
1909 else if (size == 3 && (opcode->opcode & 0xfff000) == 0xf8d000)
1911 /* bCC (uncommon cases) */
1915 opindex_converter.opindex = fixups[0].opindex;
1916 f = frag_var (rs_machine_dependent, 8, 8 - size, type,
1917 fixups[0].exp.X_add_symbol,
1918 fixups[0].exp.X_add_number,
1919 opindex_converter.ptr);
1921 /* This is pretty hokey. We basically just care about the
1922 opcode, so we have to write out the first word big endian.
1924 The exception is "call", which has two operands that we
1927 The first operand (the register list) happens to be in the
1928 first instruction word, and will be in the right place if
1929 we output the first word in big endian mode.
1931 The second operand (stack size) is in the extension word,
1932 and we want it to appear as the first character in the extension
1933 word (as it appears in memory). Luckily, writing the extension
1934 word in big endian format will do what we want. */
1935 number_to_chars_bigendian (f, insn, size > 4 ? 4 : size);
1938 number_to_chars_bigendian (f + 4, extension, 4);
1939 number_to_chars_bigendian (f + 8, 0, size - 8);
1942 number_to_chars_bigendian (f + 4, extension, size - 4);
1946 /* Allocate space for the instruction. */
1947 f = frag_more (size);
1949 /* Fill in bytes for the instruction. Note that opcode fields
1950 are written big-endian, 16 & 32bit immediates are written
1951 little endian. Egad. */
1952 if (opcode->format == FMT_S0
1953 || opcode->format == FMT_S1
1954 || opcode->format == FMT_D0
1955 || opcode->format == FMT_D6
1956 || opcode->format == FMT_D7
1957 || opcode->format == FMT_D10
1958 || opcode->format == FMT_D1)
1960 number_to_chars_bigendian (f, insn, size);
1962 else if (opcode->format == FMT_S2
1963 && opcode->opcode != 0xdf0000
1964 && opcode->opcode != 0xde0000)
1966 /* A format S2 instruction that is _not_ "ret" and "retf". */
1967 number_to_chars_bigendian (f, (insn >> 16) & 0xff, 1);
1968 number_to_chars_littleendian (f + 1, insn & 0xffff, 2);
1970 else if (opcode->format == FMT_S2)
1972 /* This must be a ret or retf, which is written entirely in
1973 big-endian format. */
1974 number_to_chars_bigendian (f, insn, 3);
1976 else if (opcode->format == FMT_S4
1977 && opcode->opcode != 0xdc000000)
1979 /* This must be a format S4 "call" instruction. What a pain. */
1980 unsigned long temp = (insn >> 8) & 0xffff;
1981 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1982 number_to_chars_littleendian (f + 1, temp, 2);
1983 number_to_chars_bigendian (f + 3, insn & 0xff, 1);
1984 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
1986 else if (opcode->format == FMT_S4)
1988 /* This must be a format S4 "jmp" instruction. */
1989 unsigned long temp = ((insn & 0xffffff) << 8) | (extension & 0xff);
1990 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1991 number_to_chars_littleendian (f + 1, temp, 4);
1993 else if (opcode->format == FMT_S6)
1995 unsigned long temp = ((insn & 0xffffff) << 8)
1996 | ((extension >> 16) & 0xff);
1997 number_to_chars_bigendian (f, (insn >> 24) & 0xff, 1);
1998 number_to_chars_littleendian (f + 1, temp, 4);
1999 number_to_chars_bigendian (f + 5, (extension >> 8) & 0xff, 1);
2000 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2002 else if (opcode->format == FMT_D2
2003 && opcode->opcode != 0xfaf80000
2004 && opcode->opcode != 0xfaf00000
2005 && opcode->opcode != 0xfaf40000)
2007 /* A format D2 instruction where the 16bit immediate is
2008 really a single 16bit value, not two 8bit values. */
2009 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2010 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2012 else if (opcode->format == FMT_D2)
2014 /* A format D2 instruction where the 16bit immediate
2015 is really two 8bit immediates. */
2016 number_to_chars_bigendian (f, insn, 4);
2018 else if (opcode->format == FMT_D3)
2020 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2021 number_to_chars_littleendian (f + 2, insn & 0xffff, 2);
2022 number_to_chars_bigendian (f + 4, extension & 0xff, 1);
2024 else if (opcode->format == FMT_D4)
2026 unsigned long temp = ((insn & 0xffff) << 16) | (extension & 0xffff);
2028 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2029 number_to_chars_littleendian (f + 2, temp, 4);
2031 else if (opcode->format == FMT_D5)
2033 unsigned long temp = (((insn & 0xffff) << 16)
2034 | ((extension >> 8) & 0xffff));
2036 number_to_chars_bigendian (f, (insn >> 16) & 0xffff, 2);
2037 number_to_chars_littleendian (f + 2, temp, 4);
2038 number_to_chars_bigendian (f + 6, extension & 0xff, 1);
2040 else if (opcode->format == FMT_D8)
2042 unsigned long temp = ((insn & 0xff) << 16) | (extension & 0xffff);
2044 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2045 number_to_chars_bigendian (f + 3, (temp & 0xff), 1);
2046 number_to_chars_littleendian (f + 4, temp >> 8, 2);
2048 else if (opcode->format == FMT_D9)
2050 unsigned long temp = ((insn & 0xff) << 24) | (extension & 0xffffff);
2052 number_to_chars_bigendian (f, (insn >> 8) & 0xffffff, 3);
2053 number_to_chars_littleendian (f + 3, temp, 4);
2056 /* Create any fixups. */
2057 for (i = 0; i < fc; i++)
2059 const struct mn10300_operand *operand;
2062 operand = &mn10300_operands[fixups[i].opindex];
2063 if (fixups[i].reloc != BFD_RELOC_UNUSED
2064 && fixups[i].reloc != BFD_RELOC_32_GOT_PCREL
2065 && fixups[i].reloc != BFD_RELOC_32_GOTOFF
2066 && fixups[i].reloc != BFD_RELOC_32_PLT_PCREL
2067 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GD
2068 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LD
2069 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LDO
2070 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_GOTIE
2071 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_IE
2072 && fixups[i].reloc != BFD_RELOC_MN10300_TLS_LE
2073 && fixups[i].reloc != BFD_RELOC_MN10300_GOT32)
2075 reloc_howto_type *reloc_howto;
2078 reloc_howto = bfd_reloc_type_lookup (stdoutput,
2084 reloc_size = bfd_get_reloc_size (reloc_howto);
2086 if (reloc_size < 1 || reloc_size > 4)
2090 fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2091 reloc_size, &fixups[i].exp,
2092 reloc_howto->pc_relative,
2097 int reloc, pcrel, offset;
2100 reloc = BFD_RELOC_NONE;
2101 if (fixups[i].reloc != BFD_RELOC_UNUSED)
2102 reloc = fixups[i].reloc;
2103 /* How big is the reloc? Remember SPLIT relocs are
2104 implicitly 32bits. */
2105 if ((operand->flags & MN10300_OPERAND_SPLIT) != 0)
2107 else if ((operand->flags & MN10300_OPERAND_24BIT) != 0)
2110 reloc_size = operand->bits;
2112 /* Is the reloc pc-relative? */
2113 pcrel = (operand->flags & MN10300_OPERAND_PCREL) != 0;
2114 if (reloc != BFD_RELOC_NONE)
2115 pcrel = bfd_reloc_type_lookup (stdoutput, reloc)->pc_relative;
2117 offset = size - (reloc_size + operand->shift) / 8;
2119 /* Choose a proper BFD relocation type. */
2120 if (reloc != BFD_RELOC_NONE)
2124 if (reloc_size == 32)
2125 reloc = BFD_RELOC_32_PCREL;
2126 else if (reloc_size == 16)
2127 reloc = BFD_RELOC_16_PCREL;
2128 else if (reloc_size == 8)
2129 reloc = BFD_RELOC_8_PCREL;
2135 if (reloc_size == 32)
2136 reloc = BFD_RELOC_32;
2137 else if (reloc_size == 16)
2138 reloc = BFD_RELOC_16;
2139 else if (reloc_size == 8)
2140 reloc = BFD_RELOC_8;
2145 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal + offset,
2146 reloc_size / 8, &fixups[i].exp, pcrel,
2147 ((bfd_reloc_code_real_type) reloc));
2150 fixP->fx_offset += offset;
2154 dwarf2_emit_insn (size);
2157 /* Label this frag as one that contains instructions. */
2158 frag_now->tc_frag_data = TRUE;
2161 /* If while processing a fixup, a reloc really needs to be created
2162 then it is done here. */
2165 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED, fixS *fixp)
2167 static arelent * no_relocs = NULL;
2168 static arelent * relocs[MAX_RELOC_EXPANSION + 1];
2171 reloc = XNEW (arelent);
2173 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
2174 if (reloc->howto == NULL)
2176 as_bad_where (fixp->fx_file, fixp->fx_line,
2177 _("reloc %d not supported by object file format"),
2178 (int) fixp->fx_r_type);
2183 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
2188 && S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
2190 fixp->fx_offset -= S_GET_VALUE (fixp->fx_subsy);
2191 fixp->fx_subsy = NULL;
2194 if (fixp->fx_addsy && fixp->fx_subsy)
2196 asection *asec, *ssec;
2198 asec = S_GET_SEGMENT (fixp->fx_addsy);
2199 ssec = S_GET_SEGMENT (fixp->fx_subsy);
2201 /* If we have a difference between two (non-absolute) symbols we must
2202 generate two relocs (one for each symbol) and allow the linker to
2203 resolve them - relaxation may change the distances between symbols,
2204 even local symbols defined in the same section. */
2205 if (ssec != absolute_section || asec != absolute_section)
2207 arelent * reloc2 = XNEW (arelent);
2212 reloc2->address = reloc->address;
2213 reloc2->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_MN10300_SYM_DIFF);
2214 reloc2->addend = - S_GET_VALUE (fixp->fx_subsy);
2215 reloc2->sym_ptr_ptr = XNEW (asymbol *);
2216 *reloc2->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_subsy);
2218 reloc->addend = fixp->fx_offset;
2219 if (asec == absolute_section)
2221 reloc->addend += S_GET_VALUE (fixp->fx_addsy);
2222 reloc->sym_ptr_ptr = bfd_abs_section_ptr->symbol_ptr_ptr;
2226 reloc->sym_ptr_ptr = XNEW (asymbol *);
2227 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2236 char *fixpos = fixp->fx_where + fixp->fx_frag->fr_literal;
2238 reloc->addend = (S_GET_VALUE (fixp->fx_addsy)
2239 - S_GET_VALUE (fixp->fx_subsy) + fixp->fx_offset);
2241 switch (fixp->fx_r_type)
2244 md_number_to_chars (fixpos, reloc->addend, 1);
2248 md_number_to_chars (fixpos, reloc->addend, 2);
2252 md_number_to_chars (fixpos, reloc->addend, 3);
2256 md_number_to_chars (fixpos, reloc->addend, 4);
2261 = (asymbol **) bfd_abs_section_ptr->symbol_ptr_ptr;
2271 reloc->sym_ptr_ptr = XNEW (asymbol *);
2272 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2273 reloc->addend = fixp->fx_offset;
2278 /* Returns true iff the symbol attached to the frag is at a known location
2279 in the given section, (and hence the relocation to it can be relaxed by
2281 static inline bfd_boolean
2282 has_known_symbol_location (fragS * fragp, asection * sec)
2284 symbolS * sym = fragp->fr_symbol;
2287 && S_IS_DEFINED (sym)
2288 && ! S_IS_WEAK (sym)
2289 && S_GET_SEGMENT (sym) == sec;
2293 md_estimate_size_before_relax (fragS *fragp, asection *seg)
2295 if (fragp->fr_subtype == 6
2296 && ! has_known_symbol_location (fragp, seg))
2297 fragp->fr_subtype = 7;
2298 else if (fragp->fr_subtype == 8
2299 && ! has_known_symbol_location (fragp, seg))
2300 fragp->fr_subtype = 9;
2301 else if (fragp->fr_subtype == 10
2302 && ! has_known_symbol_location (fragp, seg))
2303 fragp->fr_subtype = 12;
2305 if (fragp->fr_subtype == 13)
2308 if (fragp->fr_subtype >= sizeof (md_relax_table) / sizeof (md_relax_table[0]))
2311 return md_relax_table[fragp->fr_subtype].rlx_length;
2315 md_pcrel_from (fixS *fixp)
2317 if (fixp->fx_addsy != (symbolS *) NULL
2318 && (!S_IS_DEFINED (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)))
2319 /* The symbol is undefined or weak. Let the linker figure it out. */
2322 return fixp->fx_frag->fr_address + fixp->fx_where;
2326 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
2328 char * fixpos = fixP->fx_where + fixP->fx_frag->fr_literal;
2330 int value = (int) * valP;
2332 gas_assert (fixP->fx_r_type < BFD_RELOC_UNUSED);
2334 /* This should never happen. */
2335 if (seg->flags & SEC_ALLOC)
2338 /* The value we are passed in *valuep includes the symbol values.
2339 If we are doing this relocation the code in write.c is going to
2340 call bfd_install_relocation, which is also going to use the symbol
2341 value. That means that if the reloc is fully resolved we want to
2342 use *valuep since bfd_install_relocation is not being used.
2344 However, if the reloc is not fully resolved we do not want to use
2345 *valuep, and must use fx_offset instead. However, if the reloc
2346 is PC relative, we do want to use *valuep since it includes the
2347 result of md_pcrel_from. */
2348 if (fixP->fx_addsy != NULL && ! fixP->fx_pcrel)
2349 value = fixP->fx_offset;
2351 /* If the fix is relative to a symbol which is not defined, or not
2352 in the same segment as the fix, we cannot resolve it here. */
2353 if (fixP->fx_addsy != NULL
2354 && (! S_IS_DEFINED (fixP->fx_addsy)
2355 || (S_GET_SEGMENT (fixP->fx_addsy) != seg)))
2361 switch (fixP->fx_r_type)
2364 case BFD_RELOC_8_PCREL:
2369 case BFD_RELOC_16_PCREL:
2374 case BFD_RELOC_32_PCREL:
2378 case BFD_RELOC_VTABLE_INHERIT:
2379 case BFD_RELOC_VTABLE_ENTRY:
2383 case BFD_RELOC_MN10300_ALIGN:
2387 case BFD_RELOC_NONE:
2389 as_bad_where (fixP->fx_file, fixP->fx_line,
2390 _("Bad relocation fixup type (%d)"), fixP->fx_r_type);
2393 md_number_to_chars (fixpos, value, size);
2395 /* If a symbol remains, pass the fixup, as a reloc, onto the linker. */
2396 if (fixP->fx_addsy == NULL)
2400 /* Return zero if the fixup in fixp should be left alone and not
2404 mn10300_fix_adjustable (struct fix *fixp)
2408 if (TC_FORCE_RELOCATION_LOCAL (fixp))
2411 /* Non-relative relocs can (and must) be adjusted if they do
2412 not meet the criteria below, or the generic criteria. */
2413 else if (TC_FORCE_RELOCATION (fixp))
2416 /* Do not adjust relocations involving symbols in code sections,
2417 because it breaks linker relaxations. This could be fixed in the
2418 linker, but this fix is simpler, and it pretty much only affects
2419 object size a little bit. */
2420 if (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_CODE)
2423 /* Likewise, do not adjust symbols that won't be merged, or debug
2424 symbols, because they too break relaxation. We do want to adjust
2425 other mergeable symbols, like .rodata, because code relaxations
2426 need section-relative symbols to properly relax them. */
2427 if (! (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
2430 if (strncmp (S_GET_SEGMENT (fixp->fx_addsy)->name, ".debug", 6) == 0)
2437 set_arch_mach (int mach)
2439 if (!bfd_set_arch_mach (stdoutput, bfd_arch_mn10300, mach))
2440 as_warn (_("could not set architecture and machine"));
2442 current_machine = mach;
2445 static inline char *
2446 mn10300_end_of_match (char *cont, const char *what)
2448 int len = strlen (what);
2450 if (strncmp (cont, what, strlen (what)) == 0
2451 && ! is_part_of_name (cont[len]))
2458 mn10300_parse_name (char const *name,
2460 enum expr_mode mode,
2463 char *next = input_line_pointer;
2468 exprP->X_op_symbol = NULL;
2470 if (strcmp (name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2473 GOT_symbol = symbol_find_or_make (name);
2475 exprP->X_add_symbol = GOT_symbol;
2477 /* If we have an absolute symbol or a reg,
2478 then we know its value now. */
2479 segment = S_GET_SEGMENT (exprP->X_add_symbol);
2480 if (mode != expr_defer && segment == absolute_section)
2482 exprP->X_op = O_constant;
2483 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2484 exprP->X_add_symbol = NULL;
2486 else if (mode != expr_defer && segment == reg_section)
2488 exprP->X_op = O_register;
2489 exprP->X_add_number = S_GET_VALUE (exprP->X_add_symbol);
2490 exprP->X_add_symbol = NULL;
2494 exprP->X_op = O_symbol;
2495 exprP->X_add_number = 0;
2501 exprP->X_add_symbol = symbol_find_or_make (name);
2503 if (*nextcharP != '@')
2505 else if ((next_end = mn10300_end_of_match (next + 1, "GOTOFF")))
2506 reloc_type = BFD_RELOC_32_GOTOFF;
2507 else if ((next_end = mn10300_end_of_match (next + 1, "GOT")))
2508 reloc_type = BFD_RELOC_MN10300_GOT32;
2509 else if ((next_end = mn10300_end_of_match (next + 1, "PLT")))
2510 reloc_type = BFD_RELOC_32_PLT_PCREL;
2511 else if ((next_end = mn10300_end_of_match (next + 1, "tlsgd")))
2512 reloc_type = BFD_RELOC_MN10300_TLS_GD;
2513 else if ((next_end = mn10300_end_of_match (next + 1, "tlsldm")))
2514 reloc_type = BFD_RELOC_MN10300_TLS_LD;
2515 else if ((next_end = mn10300_end_of_match (next + 1, "dtpoff")))
2516 reloc_type = BFD_RELOC_MN10300_TLS_LDO;
2517 else if ((next_end = mn10300_end_of_match (next + 1, "gotntpoff")))
2518 reloc_type = BFD_RELOC_MN10300_TLS_GOTIE;
2519 else if ((next_end = mn10300_end_of_match (next + 1, "indntpoff")))
2520 reloc_type = BFD_RELOC_MN10300_TLS_IE;
2521 else if ((next_end = mn10300_end_of_match (next + 1, "tpoff")))
2522 reloc_type = BFD_RELOC_MN10300_TLS_LE;
2526 *input_line_pointer = *nextcharP;
2527 input_line_pointer = next_end;
2528 *nextcharP = *input_line_pointer;
2529 *input_line_pointer = '\0';
2531 exprP->X_op = O_PIC_reloc;
2532 exprP->X_add_number = 0;
2533 exprP->X_md = reloc_type;
2538 /* The target specific pseudo-ops which we support. */
2539 const pseudo_typeS md_pseudo_table[] =
2541 { "am30", set_arch_mach, AM30 },
2542 { "am33", set_arch_mach, AM33 },
2543 { "am33_2", set_arch_mach, AM33_2 },
2544 { "mn10300", set_arch_mach, MN103 },
2548 /* Returns FALSE if there is some mn10300 specific reason why the
2549 subtraction of two same-section symbols cannot be computed by
2553 mn10300_allow_local_subtract (expressionS * left, expressionS * right, segT section)
2560 /* If we are not performing linker relaxation then we have nothing
2565 /* If the symbols are not in a code section then they are OK. */
2566 if ((section->flags & SEC_CODE) == 0)
2569 /* Otherwise we have to scan the fragments between the two symbols.
2570 If any instructions are found then we have to assume that linker
2571 relaxation may change their size and so we must delay resolving
2572 the subtraction until the final link. */
2573 left_frag = symbol_get_frag (left->X_add_symbol);
2574 right_frag = symbol_get_frag (right->X_add_symbol);
2576 if (left_frag == right_frag)
2577 return ! left_frag->tc_frag_data;
2580 for (frag = left_frag; frag != NULL; frag = frag->fr_next)
2582 if (frag->tc_frag_data)
2584 if (frag == right_frag)
2589 for (frag = right_frag; frag != NULL; frag = frag->fr_next)
2591 if (frag->tc_frag_data)
2593 if (frag == left_frag)
2598 /* The two symbols are on disjoint fragment chains
2599 - we cannot possibly compute their difference. */
2605 /* When relaxing, we need to output a reloc for any .align directive
2606 that requests alignment to a two byte boundary or larger. */
2609 mn10300_handle_align (fragS *frag)
2612 && (frag->fr_type == rs_align
2613 || frag->fr_type == rs_align_code)
2614 && frag->fr_address + frag->fr_fix > 0
2615 && frag->fr_offset > 1
2616 && now_seg != bss_section
2617 /* Do not create relocs for the merging sections - such
2618 relocs will prevent the contents from being merged. */
2619 && (bfd_get_section_flags (now_seg->owner, now_seg) & SEC_MERGE) == 0)
2620 /* Create a new fixup to record the alignment request. The symbol is
2621 irrelevant but must be present so we use the absolute section symbol.
2622 The offset from the symbol is used to record the power-of-two alignment
2623 value. The size is set to 0 because the frag may already be aligned,
2624 thus causing cvt_frag_to_fill to reduce the size of the frag to zero. */
2625 fix_new (frag, frag->fr_fix, 0, & abs_symbol, frag->fr_offset, FALSE,
2626 BFD_RELOC_MN10300_ALIGN);
2630 mn10300_force_relocation (struct fix * fixp)
2634 || fixp->fx_r_type == BFD_RELOC_MN10300_ALIGN))
2637 return generic_force_reloc (fixp);