1 /* tc-m32r.c -- Assembler for the Mitsubishi M32R.
2 Copyright (C) 1996, 1997 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 /* Non-null if last insn was a 16 bit insn on a 32 bit boundary
28 (i.e. was the first of two 16 bit insns). */
29 static const struct cgen_insn *prev_insn = NULL;
31 /* Non-zero if we've seen a relaxable insn since the last 32 bit
33 static int seen_relaxable_p = 0;
35 /* Non-zero if -relax specified, in which case sufficient relocs are output
36 for the linker to do relaxing.
37 We do simple forms of relaxing internally, but they are always done.
38 This flag does not apply to them. */
39 static int m32r_relax;
41 /* If non-NULL, pointer to cpu description file to read.
42 This allows runtime additions to the assembler. */
43 static char *m32r_cpu_desc;
45 /* stuff for .scomm symbols. */
46 static segT sbss_section;
47 static asection scom_section;
48 static asymbol scom_symbol;
50 const char comment_chars[] = ";";
51 const char line_comment_chars[] = "#";
52 const char line_separator_chars[] = "";
53 const char EXP_CHARS[] = "eE";
54 const char FLT_CHARS[] = "dD";
56 /* Relocations against symbols are done in two
57 parts, with a HI relocation and a LO relocation. Each relocation
58 has only 16 bits of space to store an addend. This means that in
59 order for the linker to handle carries correctly, it must be able
60 to locate both the HI and the LO relocation. This means that the
61 relocations must appear in order in the relocation table.
63 In order to implement this, we keep track of each unmatched HI
64 relocation. We then sort them so that they immediately precede the
65 corresponding LO relocation. */
70 struct m32r_hi_fixup *next;
73 /* The section this fixup is in. */
77 /* The list of unmatched HI relocs. */
79 static struct m32r_hi_fixup *m32r_hi_fixup_list;
81 static void m32r_record_hi16 PARAMS ((int, fixS *, segT seg));
83 const char *md_shortopts = "";
85 struct option md_longopts[] = {
86 #if 0 /* not supported yet */
87 #define OPTION_RELAX (OPTION_MD_BASE)
88 {"relax", no_argument, NULL, OPTION_RELAX},
89 #define OPTION_CPU_DESC (OPTION_MD_BASE + 1)
90 {"cpu-desc", required_argument, NULL, OPTION_CPU_DESC},
92 {NULL, no_argument, NULL, 0}
94 size_t md_longopts_size = sizeof(md_longopts);
97 md_parse_option (c, arg)
103 #if 0 /* not supported yet */
107 case OPTION_CPU_DESC:
118 md_show_usage (stream)
121 fprintf (stream, "M32R options:\n");
124 --relax create linker relaxable code\n");
126 --cpu-desc provide runtime cpu description file\n");
128 fprintf (stream, "[none]\n");
132 static void fill_insn PARAMS ((int));
133 static void m32r_scomm PARAMS ((int));
135 /* Set by md_assemble for use by m32r_fill_insn. */
136 static subsegT prev_subseg;
137 static segT prev_seg;
139 /* The target specific pseudo-ops which we support. */
140 const pseudo_typeS md_pseudo_table[] =
143 { "fillinsn", fill_insn, 0 },
144 { "scomm", m32r_scomm, 0 },
148 /* FIXME: Should be machine generated. */
149 #define NOP_INSN 0x7000
150 #define PAR_NOP_INSN 0xf000 /* can only be used in 2nd slot */
152 /* When we align the .text section, insert the correct NOP pattern.
153 N is the power of 2 alignment. LEN is the length of pattern FILL.
154 MAX is the maximum number of characters to skip when doing the alignment,
155 or 0 if there is no maximum. */
158 m32r_do_align (n, fill, len, max)
164 if ((fill == NULL || (*fill == 0 && len == 1))
165 && (now_seg->flags & SEC_CODE) != 0
166 /* Only do this special handling if aligning to at least a
169 /* Only do this special handling if we're allowed to emit at
171 && (max == 0 || max > 1))
173 static const unsigned char nop_pattern[] = { 0xf0, 0x00 };
176 /* First align to a 2 byte boundary, in case there is an odd .byte. */
177 /* FIXME: How much memory will cause gas to use when assembling a big
178 program? Perhaps we can avoid the frag_align call? */
179 frag_align (1, 0, 0);
181 /* Next align to a 4 byte boundary (we know n >= 2) using a parallel
183 frag_align_pattern (2, nop_pattern, sizeof nop_pattern, 0);
184 /* If doing larger alignments use a repeating sequence of appropriate
188 static const unsigned char multi_nop_pattern[] = { 0x70, 0x00, 0xf0, 0x00 };
189 frag_align_pattern (n, multi_nop_pattern, sizeof multi_nop_pattern,
199 assemble_nop (opcode)
202 char *f = frag_more (2);
203 md_number_to_chars (f, opcode, 2);
206 /* If the last instruction was the first of 2 16 bit insns,
207 output a nop to move the PC to a 32 bit boundary.
209 This is done via an alignment specification since branch relaxing
210 may make it unnecessary.
212 Internally, we need to output one of these each time a 32 bit insn is
213 seen after an insn that is relaxable. */
219 (void) m32r_do_align (2, NULL, 0, 0);
221 seen_relaxable_p = 0;
224 /* Cover function to fill_insn called after a label and at end of assembly.
226 The result is always 1: we're called in a conditional to see if the
227 current line is a label. */
230 m32r_fill_insn (done)
236 if (prev_seg != NULL)
240 subseg_set (prev_seg, prev_subseg);
242 subseg_set (seg, subseg);
254 /* Initialize the `cgen' interface. */
255 CGEN_SYM (init_asm) (0 /* mach number */,
256 target_big_endian ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE);
258 #if 0 /* not supported yet */
259 /* If a runtime cpu description file was provided, parse it. */
260 if (m32r_cpu_desc != NULL)
264 errmsg = cgen_read_cpu_file (m32r_cpu_desc);
266 as_bad ("%s: %s", m32r_cpu_desc, errmsg);
270 /* Save the current subseg so we can restore it [it's the default one and
271 we don't want the initial section to be .sbss. */
275 /* The sbss section is for local .scomm symbols. */
276 sbss_section = subseg_new (".sbss", 0);
277 /* This is copied from perform_an_assembly_pass. */
278 applicable = bfd_applicable_section_flags (stdoutput);
279 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
280 #if 0 /* What does this do? [see perform_an_assembly_pass] */
281 seg_info (bss_section)->bss = 1;
284 subseg_set (seg, subseg);
286 /* We must construct a fake section similar to bfd_com_section
287 but with the name .scommon. */
288 scom_section = bfd_com_section;
289 scom_section.name = ".scommon";
290 scom_section.output_section = &scom_section;
291 scom_section.symbol = &scom_symbol;
292 scom_section.symbol_ptr_ptr = &scom_section.symbol;
293 scom_symbol = *bfd_com_section.symbol;
294 scom_symbol.name = ".scommon";
295 scom_symbol.section = &scom_section;
303 cgen_insn_t buffer[CGEN_MAX_INSN_SIZE / sizeof (cgen_insn_t)];
305 char buffer[CGEN_MAX_INSN_SIZE];
307 struct cgen_fields fields;
308 const struct cgen_insn *insn;
310 insn = CGEN_SYM (assemble_insn) (str, &fields, buffer);
314 if (CGEN_INSN_BITSIZE (insn) == 32)
316 /* 32 bit insns must live on 32 bit boundaries. */
317 /* FIXME: If calling fill_insn too many times turns us into a memory
318 pig, can we call assemble_nop instead of !seen_relaxable_p? */
319 if (prev_insn || seen_relaxable_p)
321 cgen_asm_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields));
325 /* Keep track of whether we've seen a pair of 16 bit insns.
326 PREV_INSN is NULL when we're on a 32 bit boundary. */
331 cgen_asm_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields));
333 /* If the insn needs the following one to be on a 32 bit boundary
334 (e.g. subroutine calls), fill this insn's slot. */
336 && CGEN_INSN_ATTR (insn, CGEN_INSN_FILL_SLOT) != 0)
340 /* If this is a relaxable insn (can be replaced with a larger version)
341 mark the fact so that we can emit an alignment directive for a following
342 32 bit insn if we see one. */
343 if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0)
344 seen_relaxable_p = 1;
346 /* Set these so m32r_fill_insn can use them. */
348 prev_subseg = now_subseg;
351 /* The syntax in the manual says constants begin with '#'.
352 We just ignore it. */
355 md_operand (expressionP)
356 expressionS *expressionP;
358 if (*input_line_pointer == '#')
360 input_line_pointer++;
361 expression (expressionP);
366 md_section_align (segment, size)
370 int align = bfd_get_section_alignment (stdoutput, segment);
371 return ((size + (1 << align) - 1) & (-1 << align));
375 md_undefined_symbol (name)
381 /* .scomm pseudo-op handler.
383 This is a new pseudo-op to handle putting objects in .scommon.
384 By doing this the linker won't need to do any work and more importantly
385 it removes the implicit -G arg necessary to correctly link the object file.
396 register symbolS *symbolP;
400 name = input_line_pointer;
401 c = get_symbol_end ();
403 /* just after name is now '\0' */
404 p = input_line_pointer;
407 if (*input_line_pointer != ',')
409 as_bad ("Expected comma after symbol-name: rest of line ignored.");
410 ignore_rest_of_line ();
414 input_line_pointer++; /* skip ',' */
415 if ((size = get_absolute_expression ()) < 0)
417 as_warn (".SCOMMon length (%ld.) <0! Ignored.", (long) size);
418 ignore_rest_of_line ();
422 /* The third argument to .scomm is the alignment. */
423 if (*input_line_pointer != ',')
427 ++input_line_pointer;
428 align = get_absolute_expression ();
431 as_warn ("ignoring bad alignment");
435 /* Convert to a power of 2 alignment. */
438 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
442 as_bad ("Common alignment not a power of 2");
443 ignore_rest_of_line ();
451 symbolP = symbol_find_or_make (name);
454 if (S_IS_DEFINED (symbolP))
456 as_bad ("Ignoring attempt to re-define symbol `%s'.",
457 S_GET_NAME (symbolP));
458 ignore_rest_of_line ();
462 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
464 as_bad ("Length of .scomm \"%s\" is already %ld. Not changed to %ld.",
465 S_GET_NAME (symbolP),
466 (long) S_GET_VALUE (symbolP),
469 ignore_rest_of_line ();
475 segT old_sec = now_seg;
476 int old_subsec = now_subseg;
479 record_alignment (sbss_section, align2);
480 subseg_set (sbss_section, 0);
482 frag_align (align2, 0, 0);
483 if (S_GET_SEGMENT (symbolP) == sbss_section)
484 symbolP->sy_frag->fr_symbol = 0;
485 symbolP->sy_frag = frag_now;
486 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
489 S_SET_SIZE (symbolP, size);
490 S_SET_SEGMENT (symbolP, sbss_section);
491 S_CLEAR_EXTERNAL (symbolP);
492 subseg_set (old_sec, old_subsec);
496 S_SET_VALUE (symbolP, (valueT) size);
497 S_SET_ALIGN (symbolP, align2);
498 S_SET_EXTERNAL (symbolP);
499 S_SET_SEGMENT (symbolP, &scom_section);
502 demand_empty_rest_of_line ();
505 /* Interface to relax_segment. */
507 /* FIXME: Build table by hand, get it working, then machine generate. */
509 const relax_typeS md_relax_table[] =
512 1) most positive reach of this state,
513 2) most negative reach of this state,
514 3) how many bytes this mode will add to the size of the current frag
515 4) which index into the table to try if we can't fit into this one. */
517 /* The first entry must be unused because an `rlx_more' value of zero ends
521 /* The displacement used by GAS is from the end of the 2 byte insn,
522 so we subtract 2 from the following. */
523 /* 16 bit insn, 8 bit disp -> 10 bit range.
524 This doesn't handle a branch in the right slot at the border:
525 the "& -4" isn't taken into account. It's not important enough to
526 complicate things over it, so we subtract an extra 2 (or + 2 in -ve
528 {511 - 2 - 2, -512 - 2 + 2, 0, 2 },
529 /* 32 bit insn, 24 bit disp -> 26 bit range. */
530 {0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
531 /* Same thing, but with leading nop for alignment. */
532 {0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
536 m32r_relax_frag (fragP, stretch)
540 /* Address of branch insn. */
541 long address = fragP->fr_address + fragP->fr_fix - 2;
544 /* Keep 32 bit insns aligned on 32 bit boundaries. */
545 if (fragP->fr_subtype == 2)
547 if ((address & 3) != 0)
549 fragP->fr_subtype = 3;
553 else if (fragP->fr_subtype == 3)
555 if ((address & 3) == 0)
557 fragP->fr_subtype = 2;
563 growth = relax_frag (fragP, stretch);
565 /* Long jump on odd halfword boundary? */
566 if (fragP->fr_subtype == 2 && (address & 3) != 0)
568 fragP->fr_subtype = 3;
576 /* Return an initial guess of the length by which a fragment must grow to
577 hold a branch to reach its destination.
578 Also updates fr_type/fr_subtype as necessary.
580 Called just before doing relaxation.
581 Any symbol that is now undefined will not become defined.
582 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
583 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
584 Although it may not be explicit in the frag, pretend fr_var starts with a
588 md_estimate_size_before_relax (fragP, segment)
592 int old_fr_fix = fragP->fr_fix;
593 char *opcode = fragP->fr_opcode;
595 /* The only thing we have to handle here are symbols outside of the
596 current segment. They may be undefined or in a different segment in
597 which case linker scripts may place them anywhere.
598 However, we can't finish the fragment here and emit the reloc as insn
599 alignment requirements may move the insn about. */
601 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
603 /* The symbol is undefined in this segment.
604 Change the relaxation subtype to the max allowable and leave
605 all further handling to md_convert_frag. */
606 fragP->fr_subtype = 2;
608 #if 0 /* Can't use this, but leave in for illustration. */
609 /* Change 16 bit insn to 32 bit insn. */
612 /* Increase known (fixed) size of fragment. */
615 /* Create a relocation for it. */
616 fix_new (fragP, old_fr_fix, 4,
618 fragP->fr_offset, 1 /* pcrel */,
619 /* FIXME: Can't use a real BFD reloc here.
620 cgen_md_apply_fix3 can't handle it. */
621 BFD_RELOC_M32R_26_PCREL);
623 /* Mark this fragment as finished. */
630 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
633 /* *fragP has been relaxed to its final size, and now needs to have
634 the bytes inside it modified to conform to the new size.
636 Called after relaxation is finished.
637 fragP->fr_type == rs_machine_dependent.
638 fragP->fr_subtype is the subtype of what the address relaxed to. */
641 md_convert_frag (abfd, sec, fragP)
646 char *opcode, *displacement;
647 int target_address, opcode_address, extension, addend;
649 opcode = fragP->fr_opcode;
651 /* Address opcode resides at in file space. */
652 opcode_address = fragP->fr_address + fragP->fr_fix - 2;
654 switch (fragP->fr_subtype)
658 displacement = &opcode[1];
663 displacement = &opcode[1];
666 opcode[2] = opcode[0] | 0x80;
667 md_number_to_chars (opcode, PAR_NOP_INSN, 2);
670 displacement = &opcode[3];
676 if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
678 /* symbol must be resolved by linker */
679 if (fragP->fr_offset & 3)
680 as_warn ("Addend to unresolved symbol not on word boundary.");
681 addend = fragP->fr_offset >> 2;
685 /* Address we want to reach in file space. */
686 target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
687 target_address += fragP->fr_symbol->sy_frag->fr_address;
688 addend = (target_address - (opcode_address & -4)) >> 2;
691 /* Create a relocation for symbols that must be resolved by the linker.
692 Otherwise output the completed insn. */
694 if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
696 assert (fragP->fr_subtype != 1);
697 assert (fragP->fr_targ.cgen.insn != 0);
698 cgen_record_fixup (fragP,
699 /* Offset of branch insn in frag. */
700 fragP->fr_fix + extension - 4,
701 fragP->fr_targ.cgen.insn,
703 /* FIXME: quick hack */
705 CGEN_OPERAND_ENTRY (fragP->fr_targ.cgen.opindex),
707 CGEN_OPERAND_ENTRY (M32R_OPERAND_DISP24),
709 fragP->fr_targ.cgen.opinfo,
710 fragP->fr_symbol, fragP->fr_offset);
713 #define SIZE_FROM_RELAX_STATE(n) ((n) == 1 ? 1 : 3)
715 md_number_to_chars (displacement, (valueT) addend,
716 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
718 fragP->fr_fix += extension;
721 /* Functions concerning relocs. */
723 /* The location from which a PC relative jump should be calculated,
724 given a PC relative reloc. */
727 md_pcrel_from_section (fixP, sec)
731 if (fixP->fx_addsy != (symbolS *) NULL
732 && (! S_IS_DEFINED (fixP->fx_addsy)
733 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
735 /* The symbol is undefined (or is defined but not in this section).
736 Let the linker figure it out. */
740 return (fixP->fx_frag->fr_address + fixP->fx_where) & -4L;
743 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
744 Returns BFD_RELOC_NONE if no reloc type can be found.
745 *FIXP may be modified if desired. */
747 bfd_reloc_code_real_type
748 CGEN_SYM (lookup_reloc) (insn, operand, fixP)
749 const struct cgen_insn *insn;
750 const struct cgen_operand *operand;
753 switch (CGEN_OPERAND_TYPE (operand))
755 case M32R_OPERAND_DISP8 : return BFD_RELOC_M32R_10_PCREL;
756 case M32R_OPERAND_DISP16 : return BFD_RELOC_M32R_18_PCREL;
757 case M32R_OPERAND_DISP24 : return BFD_RELOC_M32R_26_PCREL;
758 case M32R_OPERAND_UIMM24 : return BFD_RELOC_M32R_24;
759 case M32R_OPERAND_HI16 :
760 case M32R_OPERAND_SLO16 :
761 case M32R_OPERAND_ULO16 :
762 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
763 if (fixP->tc_fix_data.opinfo != 0)
764 return fixP->tc_fix_data.opinfo;
767 return BFD_RELOC_NONE;
770 /* Called while parsing an instruction to create a fixup.
771 We need to check for HI16 relocs and queue them up for later sorting. */
774 m32r_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
777 const struct cgen_insn *insn;
779 const struct cgen_operand *operand;
783 fixS *fixP = cgen_record_fixup_exp (frag, where, insn, length,
784 operand, opinfo, exp);
786 switch (CGEN_OPERAND_TYPE (operand))
788 case M32R_OPERAND_HI16 :
789 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
790 if (fixP->tc_fix_data.opinfo == BFD_RELOC_M32R_HI16_SLO
791 || fixP->tc_fix_data.opinfo == BFD_RELOC_M32R_HI16_ULO)
792 m32r_record_hi16 (fixP->tc_fix_data.opinfo, fixP, now_seg);
799 /* Record a HI16 reloc for later matching with its LO16 cousin. */
802 m32r_record_hi16 (reloc_type, fixP, seg)
807 struct m32r_hi_fixup *hi_fixup;
809 assert (reloc_type == BFD_RELOC_M32R_HI16_SLO
810 || reloc_type == BFD_RELOC_M32R_HI16_ULO);
812 hi_fixup = ((struct m32r_hi_fixup *)
813 xmalloc (sizeof (struct m32r_hi_fixup)));
814 hi_fixup->fixp = fixP;
815 hi_fixup->seg = now_seg;
816 hi_fixup->next = m32r_hi_fixup_list;
817 m32r_hi_fixup_list = hi_fixup;
820 /* Return BFD reloc type from opinfo field in a fixS.
821 It's tricky using fx_r_type in m32r_frob_file because the values
822 are BFD_RELOC_UNUSED + operand number. */
823 #define FX_OPINFO_R_TYPE(f) ((f)->tc_fix_data.opinfo)
825 /* Sort any unmatched HI16 relocs so that they immediately precede
826 the corresponding LO16 reloc. This is called before md_apply_fix and
832 struct m32r_hi_fixup *l;
834 for (l = m32r_hi_fixup_list; l != NULL; l = l->next)
836 segment_info_type *seginfo;
839 assert (FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_SLO
840 || FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_ULO);
842 /* Check quickly whether the next fixup happens to be a matching low. */
843 if (l->fixp->fx_next != NULL
844 && FX_OPINFO_R_TYPE (l->fixp->fx_next) == BFD_RELOC_M32R_LO16
845 && l->fixp->fx_addsy == l->fixp->fx_next->fx_addsy
846 && l->fixp->fx_offset == l->fixp->fx_next->fx_offset)
849 /* Look through the fixups for this segment for a matching `low'.
850 When we find one, move the high/shigh just in front of it. We do
851 this in two passes. In the first pass, we try to find a
852 unique `low'. In the second pass, we permit multiple high's
853 relocs for a single `low'. */
854 seginfo = seg_info (l->seg);
855 for (pass = 0; pass < 2; pass++)
860 for (f = seginfo->fix_root; f != NULL; f = f->fx_next)
862 /* Check whether this is a `low' fixup which matches l->fixp. */
863 if (FX_OPINFO_R_TYPE (f) == BFD_RELOC_M32R_LO16
864 && f->fx_addsy == l->fixp->fx_addsy
865 && f->fx_offset == l->fixp->fx_offset
868 || (FX_OPINFO_R_TYPE (prev) != BFD_RELOC_M32R_HI16_SLO
869 && FX_OPINFO_R_TYPE (prev) != BFD_RELOC_M32R_HI16_ULO)
870 || prev->fx_addsy != f->fx_addsy
871 || prev->fx_offset != f->fx_offset))
875 /* Move l->fixp before f. */
876 for (pf = &seginfo->fix_root;
878 pf = &(*pf)->fx_next)
879 assert (*pf != NULL);
881 *pf = l->fixp->fx_next;
883 l->fixp->fx_next = f;
885 seginfo->fix_root = l->fixp;
887 prev->fx_next = l->fixp;
899 as_warn_where (l->fixp->fx_file, l->fixp->fx_line,
900 "Unmatched high/shigh reloc");
905 /* See whether we need to force a relocation into the output file.
906 This is used to force out switch and PC relative relocations when
910 m32r_force_relocation (fix)
916 return (fix->fx_pcrel
920 /* Write a value out to the object file, using the appropriate endianness. */
923 md_number_to_chars (buf, val, n)
928 if (target_big_endian)
929 number_to_chars_bigendian (buf, val, n);
931 number_to_chars_littleendian (buf, val, n);
934 /* Turn a string in input_line_pointer into a floating point constant of type
935 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
936 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
939 /* Equal to MAX_PRECISION in atof-ieee.c */
940 #define MAX_LITTLENUMS 6
943 md_atof (type, litP, sizeP)
949 LITTLENUM_TYPE words[MAX_LITTLENUMS];
950 LITTLENUM_TYPE *wordP;
970 /* FIXME: Some targets allow other format chars for bigger sizes here. */
974 return "Bad call to md_atof()";
977 t = atof_ieee (input_line_pointer, type, words);
979 input_line_pointer = t;
980 *sizeP = prec * sizeof (LITTLENUM_TYPE);
982 if (target_big_endian)
984 for (i = 0; i < prec; i++)
986 md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
987 litP += sizeof (LITTLENUM_TYPE);
992 for (i = prec - 1; i >= 0; i--)
994 md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
995 litP += sizeof (LITTLENUM_TYPE);