1 /* tc-m32r.c -- Assembler for the Mitsubishi M32R.
2 Copyright (C) 1996, 1997 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
27 /* Non-null if last insn was a 16 bit insn on a 32 bit boundary
28 (i.e. was the first of two 16 bit insns). */
29 static const struct cgen_insn *prev_insn = NULL;
31 /* Non-zero if we've seen a relaxable insn since the last 32 bit
33 static int seen_relaxable_p = 0;
35 /* Non-zero if -relax specified, in which case sufficient relocs are output
36 for the linker to do relaxing.
37 We do simple forms of relaxing internally, but they are always done.
38 This flag does not apply to them. */
39 static int m32r_relax;
41 /* If non-NULL, pointer to cpu description file to read.
42 This allows runtime additions to the assembler. */
43 static char *m32r_cpu_desc;
45 /* stuff for .scomm symbols. */
46 static segT sbss_section;
47 static asection scom_section;
48 static asymbol scom_symbol;
50 const char comment_chars[] = ";";
51 const char line_comment_chars[] = "#";
52 const char line_separator_chars[] = "";
53 const char EXP_CHARS[] = "eE";
54 const char FLT_CHARS[] = "dD";
56 /* Relocations against symbols are done in two
57 parts, with a HI relocation and a LO relocation. Each relocation
58 has only 16 bits of space to store an addend. This means that in
59 order for the linker to handle carries correctly, it must be able
60 to locate both the HI and the LO relocation. This means that the
61 relocations must appear in order in the relocation table.
63 In order to implement this, we keep track of each unmatched HI
64 relocation. We then sort them so that they immediately precede the
65 corresponding LO relocation. */
70 struct m32r_hi_fixup *next;
73 /* The section this fixup is in. */
77 /* The list of unmatched HI relocs. */
79 static struct m32r_hi_fixup *m32r_hi_fixup_list;
81 static void m32r_record_hi16 PARAMS ((int, fixS *, segT seg));
83 const char *md_shortopts = "";
85 struct option md_longopts[] = {
86 #if 0 /* not supported yet */
87 #define OPTION_RELAX (OPTION_MD_BASE)
88 {"relax", no_argument, NULL, OPTION_RELAX},
89 #define OPTION_CPU_DESC (OPTION_MD_BASE + 1)
90 {"cpu-desc", required_argument, NULL, OPTION_CPU_DESC},
92 {NULL, no_argument, NULL, 0}
94 size_t md_longopts_size = sizeof(md_longopts);
97 md_parse_option (c, arg)
103 #if 0 /* not supported yet */
107 case OPTION_CPU_DESC:
118 md_show_usage (stream)
121 fprintf (stream, "M32R options:\n");
124 --relax create linker relaxable code\n");
126 --cpu-desc provide runtime cpu description file\n");
128 fprintf (stream, "[none]\n");
132 static void fill_insn PARAMS ((int));
133 static void m32r_scomm PARAMS ((int));
135 /* Set by md_assemble for use by m32r_fill_insn. */
136 static subsegT prev_subseg;
137 static segT prev_seg;
139 /* The target specific pseudo-ops which we support. */
140 const pseudo_typeS md_pseudo_table[] =
143 { "fillinsn", fill_insn, 0 },
144 { "scomm", m32r_scomm, 0 },
148 /* FIXME: Should be machine generated. */
149 #define NOP_INSN 0x7000
150 #define PAR_NOP_INSN 0xf000 /* can only be used in 2nd slot */
152 /* When we align the .text section, insert the correct NOP pattern.
153 N is the power of 2 alignment. LEN is the length of pattern FILL.
154 MAX is the maximum number of characters to skip when doing the alignment,
155 or 0 if there is no maximum. */
158 m32r_do_align (n, fill, len, max)
164 if ((fill == NULL || (*fill == 0 && len == 1))
165 && (now_seg->flags & SEC_CODE) != 0
166 /* Only do this special handling if aligning to at least a
169 /* Only do this special handling if we're allowed to emit at
171 && (max == 0 || max > 1))
173 static const unsigned char nop_pattern[] = { 0xf0, 0x00 };
176 /* First align to a 2 byte boundary, in case there is an odd .byte. */
177 /* FIXME: How much memory will cause gas to use when assembling a big
178 program? Perhaps we can avoid the frag_align call? */
179 frag_align (1, 0, 0);
181 /* Next align to a 4 byte boundary (we know n >= 2) using a parallel
183 frag_align_pattern (2, nop_pattern, sizeof nop_pattern, 0);
184 /* If doing larger alignments use a repeating sequence of appropriate
188 static const unsigned char multi_nop_pattern[] = { 0x70, 0x00, 0xf0, 0x00 };
189 frag_align_pattern (n, multi_nop_pattern, sizeof multi_nop_pattern,
199 assemble_nop (opcode)
202 char *f = frag_more (2);
203 md_number_to_chars (f, opcode, 2);
206 /* If the last instruction was the first of 2 16 bit insns,
207 output a nop to move the PC to a 32 bit boundary.
209 This is done via an alignment specification since branch relaxing
210 may make it unnecessary.
212 Internally, we need to output one of these each time a 32 bit insn is
213 seen after an insn that is relaxable. */
219 (void) m32r_do_align (2, NULL, 0, 0);
221 seen_relaxable_p = 0;
224 /* Cover function to fill_insn called after a label and at end of assembly.
226 The result is always 1: we're called in a conditional to see if the
227 current line is a label. */
230 m32r_fill_insn (done)
236 if (prev_seg != NULL)
240 subseg_set (prev_seg, prev_subseg);
242 subseg_set (seg, subseg);
254 /* Initialize the `cgen' interface. */
256 /* This is a callback from cgen to gas to parse operands. */
257 cgen_asm_parse_operand_fn = cgen_asm_parse_operand;
258 /* Set the machine number and endian. */
259 CGEN_SYM (init_asm) (0 /* mach number */,
260 target_big_endian ? CGEN_ENDIAN_BIG : CGEN_ENDIAN_LITTLE);
262 #if 0 /* not supported yet */
263 /* If a runtime cpu description file was provided, parse it. */
264 if (m32r_cpu_desc != NULL)
268 errmsg = cgen_read_cpu_file (m32r_cpu_desc);
270 as_bad ("%s: %s", m32r_cpu_desc, errmsg);
274 /* Save the current subseg so we can restore it [it's the default one and
275 we don't want the initial section to be .sbss. */
279 /* The sbss section is for local .scomm symbols. */
280 sbss_section = subseg_new (".sbss", 0);
281 /* This is copied from perform_an_assembly_pass. */
282 applicable = bfd_applicable_section_flags (stdoutput);
283 bfd_set_section_flags (stdoutput, sbss_section, applicable & SEC_ALLOC);
284 #if 0 /* What does this do? [see perform_an_assembly_pass] */
285 seg_info (bss_section)->bss = 1;
288 subseg_set (seg, subseg);
290 /* We must construct a fake section similar to bfd_com_section
291 but with the name .scommon. */
292 scom_section = bfd_com_section;
293 scom_section.name = ".scommon";
294 scom_section.output_section = &scom_section;
295 scom_section.symbol = &scom_symbol;
296 scom_section.symbol_ptr_ptr = &scom_section.symbol;
297 scom_symbol = *bfd_com_section.symbol;
298 scom_symbol.name = ".scommon";
299 scom_symbol.section = &scom_section;
307 cgen_insn_t buffer[CGEN_MAX_INSN_SIZE / sizeof (cgen_insn_t)];
309 char buffer[CGEN_MAX_INSN_SIZE];
311 struct cgen_fields fields;
312 const struct cgen_insn *insn;
315 /* Initialize GAS's cgen interface for a new instruction. */
316 cgen_asm_init_parse ();
318 insn = CGEN_SYM (assemble_insn) (str, &fields, buffer, &errmsg);
325 if (CGEN_INSN_BITSIZE (insn) == 32)
327 /* 32 bit insns must live on 32 bit boundaries. */
328 /* FIXME: If calling fill_insn too many times turns us into a memory
329 pig, can we call assemble_nop instead of !seen_relaxable_p? */
330 if (prev_insn || seen_relaxable_p)
332 cgen_asm_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields));
336 /* Keep track of whether we've seen a pair of 16 bit insns.
337 PREV_INSN is NULL when we're on a 32 bit boundary. */
342 cgen_asm_finish_insn (insn, buffer, CGEN_FIELDS_BITSIZE (&fields));
344 /* If the insn needs the following one to be on a 32 bit boundary
345 (e.g. subroutine calls), fill this insn's slot. */
347 && CGEN_INSN_ATTR (insn, CGEN_INSN_FILL_SLOT) != 0)
351 /* If this is a relaxable insn (can be replaced with a larger version)
352 mark the fact so that we can emit an alignment directive for a following
353 32 bit insn if we see one. */
354 if (CGEN_INSN_ATTR (insn, CGEN_INSN_RELAXABLE) != 0)
355 seen_relaxable_p = 1;
357 /* Set these so m32r_fill_insn can use them. */
359 prev_subseg = now_subseg;
362 /* The syntax in the manual says constants begin with '#'.
363 We just ignore it. */
366 md_operand (expressionP)
367 expressionS *expressionP;
369 if (*input_line_pointer == '#')
371 input_line_pointer++;
372 expression (expressionP);
377 md_section_align (segment, size)
381 int align = bfd_get_section_alignment (stdoutput, segment);
382 return ((size + (1 << align) - 1) & (-1 << align));
386 md_undefined_symbol (name)
392 /* .scomm pseudo-op handler.
394 This is a new pseudo-op to handle putting objects in .scommon.
395 By doing this the linker won't need to do any work and more importantly
396 it removes the implicit -G arg necessary to correctly link the object file.
407 register symbolS *symbolP;
411 name = input_line_pointer;
412 c = get_symbol_end ();
414 /* just after name is now '\0' */
415 p = input_line_pointer;
418 if (*input_line_pointer != ',')
420 as_bad ("Expected comma after symbol-name: rest of line ignored.");
421 ignore_rest_of_line ();
425 input_line_pointer++; /* skip ',' */
426 if ((size = get_absolute_expression ()) < 0)
428 as_warn (".SCOMMon length (%ld.) <0! Ignored.", (long) size);
429 ignore_rest_of_line ();
433 /* The third argument to .scomm is the alignment. */
434 if (*input_line_pointer != ',')
438 ++input_line_pointer;
439 align = get_absolute_expression ();
442 as_warn ("ignoring bad alignment");
446 /* Convert to a power of 2 alignment. */
449 for (align2 = 0; (align & 1) == 0; align >>= 1, ++align2)
453 as_bad ("Common alignment not a power of 2");
454 ignore_rest_of_line ();
462 symbolP = symbol_find_or_make (name);
465 if (S_IS_DEFINED (symbolP))
467 as_bad ("Ignoring attempt to re-define symbol `%s'.",
468 S_GET_NAME (symbolP));
469 ignore_rest_of_line ();
473 if (S_GET_VALUE (symbolP) && S_GET_VALUE (symbolP) != (valueT) size)
475 as_bad ("Length of .scomm \"%s\" is already %ld. Not changed to %ld.",
476 S_GET_NAME (symbolP),
477 (long) S_GET_VALUE (symbolP),
480 ignore_rest_of_line ();
486 segT old_sec = now_seg;
487 int old_subsec = now_subseg;
490 record_alignment (sbss_section, align2);
491 subseg_set (sbss_section, 0);
493 frag_align (align2, 0, 0);
494 if (S_GET_SEGMENT (symbolP) == sbss_section)
495 symbolP->sy_frag->fr_symbol = 0;
496 symbolP->sy_frag = frag_now;
497 pfrag = frag_var (rs_org, 1, 1, (relax_substateT) 0, symbolP, size,
500 S_SET_SIZE (symbolP, size);
501 S_SET_SEGMENT (symbolP, sbss_section);
502 S_CLEAR_EXTERNAL (symbolP);
503 subseg_set (old_sec, old_subsec);
507 S_SET_VALUE (symbolP, (valueT) size);
508 S_SET_ALIGN (symbolP, align2);
509 S_SET_EXTERNAL (symbolP);
510 S_SET_SEGMENT (symbolP, &scom_section);
513 demand_empty_rest_of_line ();
516 /* Interface to relax_segment. */
518 /* FIXME: Build table by hand, get it working, then machine generate. */
520 const relax_typeS md_relax_table[] =
523 1) most positive reach of this state,
524 2) most negative reach of this state,
525 3) how many bytes this mode will add to the size of the current frag
526 4) which index into the table to try if we can't fit into this one. */
528 /* The first entry must be unused because an `rlx_more' value of zero ends
532 /* The displacement used by GAS is from the end of the 2 byte insn,
533 so we subtract 2 from the following. */
534 /* 16 bit insn, 8 bit disp -> 10 bit range.
535 This doesn't handle a branch in the right slot at the border:
536 the "& -4" isn't taken into account. It's not important enough to
537 complicate things over it, so we subtract an extra 2 (or + 2 in -ve
539 {511 - 2 - 2, -512 - 2 + 2, 0, 2 },
540 /* 32 bit insn, 24 bit disp -> 26 bit range. */
541 {0x2000000 - 1 - 2, -0x2000000 - 2, 2, 0 },
542 /* Same thing, but with leading nop for alignment. */
543 {0x2000000 - 1 - 2, -0x2000000 - 2, 4, 0 }
547 m32r_relax_frag (fragP, stretch)
551 /* Address of branch insn. */
552 long address = fragP->fr_address + fragP->fr_fix - 2;
555 /* Keep 32 bit insns aligned on 32 bit boundaries. */
556 if (fragP->fr_subtype == 2)
558 if ((address & 3) != 0)
560 fragP->fr_subtype = 3;
564 else if (fragP->fr_subtype == 3)
566 if ((address & 3) == 0)
568 fragP->fr_subtype = 2;
574 growth = relax_frag (fragP, stretch);
576 /* Long jump on odd halfword boundary? */
577 if (fragP->fr_subtype == 2 && (address & 3) != 0)
579 fragP->fr_subtype = 3;
587 /* Return an initial guess of the length by which a fragment must grow to
588 hold a branch to reach its destination.
589 Also updates fr_type/fr_subtype as necessary.
591 Called just before doing relaxation.
592 Any symbol that is now undefined will not become defined.
593 The guess for fr_var is ACTUALLY the growth beyond fr_fix.
594 Whatever we do to grow fr_fix or fr_var contributes to our returned value.
595 Although it may not be explicit in the frag, pretend fr_var starts with a
599 md_estimate_size_before_relax (fragP, segment)
603 int old_fr_fix = fragP->fr_fix;
604 char *opcode = fragP->fr_opcode;
606 /* The only thing we have to handle here are symbols outside of the
607 current segment. They may be undefined or in a different segment in
608 which case linker scripts may place them anywhere.
609 However, we can't finish the fragment here and emit the reloc as insn
610 alignment requirements may move the insn about. */
612 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
614 /* The symbol is undefined in this segment.
615 Change the relaxation subtype to the max allowable and leave
616 all further handling to md_convert_frag. */
617 fragP->fr_subtype = 2;
619 #if 0 /* Can't use this, but leave in for illustration. */
620 /* Change 16 bit insn to 32 bit insn. */
623 /* Increase known (fixed) size of fragment. */
626 /* Create a relocation for it. */
627 fix_new (fragP, old_fr_fix, 4,
629 fragP->fr_offset, 1 /* pcrel */,
630 /* FIXME: Can't use a real BFD reloc here.
631 cgen_md_apply_fix3 can't handle it. */
632 BFD_RELOC_M32R_26_PCREL);
634 /* Mark this fragment as finished. */
641 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
644 /* *fragP has been relaxed to its final size, and now needs to have
645 the bytes inside it modified to conform to the new size.
647 Called after relaxation is finished.
648 fragP->fr_type == rs_machine_dependent.
649 fragP->fr_subtype is the subtype of what the address relaxed to. */
652 md_convert_frag (abfd, sec, fragP)
657 char *opcode, *displacement;
658 int target_address, opcode_address, extension, addend;
660 opcode = fragP->fr_opcode;
662 /* Address opcode resides at in file space. */
663 opcode_address = fragP->fr_address + fragP->fr_fix - 2;
665 switch (fragP->fr_subtype)
669 displacement = &opcode[1];
674 displacement = &opcode[1];
677 opcode[2] = opcode[0] | 0x80;
678 md_number_to_chars (opcode, PAR_NOP_INSN, 2);
681 displacement = &opcode[3];
687 if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
689 /* symbol must be resolved by linker */
690 if (fragP->fr_offset & 3)
691 as_warn ("Addend to unresolved symbol not on word boundary.");
692 addend = fragP->fr_offset >> 2;
696 /* Address we want to reach in file space. */
697 target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
698 target_address += fragP->fr_symbol->sy_frag->fr_address;
699 addend = (target_address - (opcode_address & -4)) >> 2;
702 /* Create a relocation for symbols that must be resolved by the linker.
703 Otherwise output the completed insn. */
705 if (S_GET_SEGMENT (fragP->fr_symbol) != sec)
707 assert (fragP->fr_subtype != 1);
708 assert (fragP->fr_targ.cgen.insn != 0);
709 cgen_record_fixup (fragP,
710 /* Offset of branch insn in frag. */
711 fragP->fr_fix + extension - 4,
712 fragP->fr_targ.cgen.insn,
714 /* FIXME: quick hack */
716 CGEN_OPERAND_ENTRY (fragP->fr_targ.cgen.opindex),
718 CGEN_OPERAND_ENTRY (M32R_OPERAND_DISP24),
720 fragP->fr_targ.cgen.opinfo,
721 fragP->fr_symbol, fragP->fr_offset);
724 #define SIZE_FROM_RELAX_STATE(n) ((n) == 1 ? 1 : 3)
726 md_number_to_chars (displacement, (valueT) addend,
727 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
729 fragP->fr_fix += extension;
732 /* Functions concerning relocs. */
734 /* The location from which a PC relative jump should be calculated,
735 given a PC relative reloc. */
738 md_pcrel_from_section (fixP, sec)
742 if (fixP->fx_addsy != (symbolS *) NULL
743 && (! S_IS_DEFINED (fixP->fx_addsy)
744 || S_GET_SEGMENT (fixP->fx_addsy) != sec))
746 /* The symbol is undefined (or is defined but not in this section).
747 Let the linker figure it out. */
751 return (fixP->fx_frag->fr_address + fixP->fx_where) & -4L;
754 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
755 Returns BFD_RELOC_NONE if no reloc type can be found.
756 *FIXP may be modified if desired. */
758 bfd_reloc_code_real_type
759 CGEN_SYM (lookup_reloc) (insn, operand, fixP)
760 const struct cgen_insn *insn;
761 const struct cgen_operand *operand;
764 switch (CGEN_OPERAND_TYPE (operand))
766 case M32R_OPERAND_DISP8 : return BFD_RELOC_M32R_10_PCREL;
767 case M32R_OPERAND_DISP16 : return BFD_RELOC_M32R_18_PCREL;
768 case M32R_OPERAND_DISP24 : return BFD_RELOC_M32R_26_PCREL;
769 case M32R_OPERAND_UIMM24 : return BFD_RELOC_M32R_24;
770 case M32R_OPERAND_HI16 :
771 case M32R_OPERAND_SLO16 :
772 case M32R_OPERAND_ULO16 :
773 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
774 if (fixP->tc_fix_data.opinfo != 0)
775 return fixP->tc_fix_data.opinfo;
778 return BFD_RELOC_NONE;
781 /* Called while parsing an instruction to create a fixup.
782 We need to check for HI16 relocs and queue them up for later sorting. */
785 m32r_cgen_record_fixup_exp (frag, where, insn, length, operand, opinfo, exp)
788 const struct cgen_insn *insn;
790 const struct cgen_operand *operand;
794 fixS *fixP = cgen_record_fixup_exp (frag, where, insn, length,
795 operand, opinfo, exp);
797 switch (CGEN_OPERAND_TYPE (operand))
799 case M32R_OPERAND_HI16 :
800 /* If low/high/shigh/sda was used, it is recorded in `opinfo'. */
801 if (fixP->tc_fix_data.opinfo == BFD_RELOC_M32R_HI16_SLO
802 || fixP->tc_fix_data.opinfo == BFD_RELOC_M32R_HI16_ULO)
803 m32r_record_hi16 (fixP->tc_fix_data.opinfo, fixP, now_seg);
810 /* Record a HI16 reloc for later matching with its LO16 cousin. */
813 m32r_record_hi16 (reloc_type, fixP, seg)
818 struct m32r_hi_fixup *hi_fixup;
820 assert (reloc_type == BFD_RELOC_M32R_HI16_SLO
821 || reloc_type == BFD_RELOC_M32R_HI16_ULO);
823 hi_fixup = ((struct m32r_hi_fixup *)
824 xmalloc (sizeof (struct m32r_hi_fixup)));
825 hi_fixup->fixp = fixP;
826 hi_fixup->seg = now_seg;
827 hi_fixup->next = m32r_hi_fixup_list;
828 m32r_hi_fixup_list = hi_fixup;
831 /* Return BFD reloc type from opinfo field in a fixS.
832 It's tricky using fx_r_type in m32r_frob_file because the values
833 are BFD_RELOC_UNUSED + operand number. */
834 #define FX_OPINFO_R_TYPE(f) ((f)->tc_fix_data.opinfo)
836 /* Sort any unmatched HI16 relocs so that they immediately precede
837 the corresponding LO16 reloc. This is called before md_apply_fix and
843 struct m32r_hi_fixup *l;
845 for (l = m32r_hi_fixup_list; l != NULL; l = l->next)
847 segment_info_type *seginfo;
850 assert (FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_SLO
851 || FX_OPINFO_R_TYPE (l->fixp) == BFD_RELOC_M32R_HI16_ULO);
853 /* Check quickly whether the next fixup happens to be a matching low. */
854 if (l->fixp->fx_next != NULL
855 && FX_OPINFO_R_TYPE (l->fixp->fx_next) == BFD_RELOC_M32R_LO16
856 && l->fixp->fx_addsy == l->fixp->fx_next->fx_addsy
857 && l->fixp->fx_offset == l->fixp->fx_next->fx_offset)
860 /* Look through the fixups for this segment for a matching `low'.
861 When we find one, move the high/shigh just in front of it. We do
862 this in two passes. In the first pass, we try to find a
863 unique `low'. In the second pass, we permit multiple high's
864 relocs for a single `low'. */
865 seginfo = seg_info (l->seg);
866 for (pass = 0; pass < 2; pass++)
871 for (f = seginfo->fix_root; f != NULL; f = f->fx_next)
873 /* Check whether this is a `low' fixup which matches l->fixp. */
874 if (FX_OPINFO_R_TYPE (f) == BFD_RELOC_M32R_LO16
875 && f->fx_addsy == l->fixp->fx_addsy
876 && f->fx_offset == l->fixp->fx_offset
879 || (FX_OPINFO_R_TYPE (prev) != BFD_RELOC_M32R_HI16_SLO
880 && FX_OPINFO_R_TYPE (prev) != BFD_RELOC_M32R_HI16_ULO)
881 || prev->fx_addsy != f->fx_addsy
882 || prev->fx_offset != f->fx_offset))
886 /* Move l->fixp before f. */
887 for (pf = &seginfo->fix_root;
889 pf = &(*pf)->fx_next)
890 assert (*pf != NULL);
892 *pf = l->fixp->fx_next;
894 l->fixp->fx_next = f;
896 seginfo->fix_root = l->fixp;
898 prev->fx_next = l->fixp;
910 as_warn_where (l->fixp->fx_file, l->fixp->fx_line,
911 "Unmatched high/shigh reloc");
916 /* See whether we need to force a relocation into the output file.
917 This is used to force out switch and PC relative relocations when
921 m32r_force_relocation (fix)
927 return (fix->fx_pcrel
931 /* Write a value out to the object file, using the appropriate endianness. */
934 md_number_to_chars (buf, val, n)
939 if (target_big_endian)
940 number_to_chars_bigendian (buf, val, n);
942 number_to_chars_littleendian (buf, val, n);
945 /* Turn a string in input_line_pointer into a floating point constant of type
946 type, and store the appropriate bytes in *litP. The number of LITTLENUMS
947 emitted is stored in *sizeP . An error message is returned, or NULL on OK.
950 /* Equal to MAX_PRECISION in atof-ieee.c */
951 #define MAX_LITTLENUMS 6
954 md_atof (type, litP, sizeP)
960 LITTLENUM_TYPE words[MAX_LITTLENUMS];
961 LITTLENUM_TYPE *wordP;
981 /* FIXME: Some targets allow other format chars for bigger sizes here. */
985 return "Bad call to md_atof()";
988 t = atof_ieee (input_line_pointer, type, words);
990 input_line_pointer = t;
991 *sizeP = prec * sizeof (LITTLENUM_TYPE);
993 if (target_big_endian)
995 for (i = 0; i < prec; i++)
997 md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
998 litP += sizeof (LITTLENUM_TYPE);
1003 for (i = prec - 1; i >= 0; i--)
1005 md_number_to_chars (litP, (valueT) words[i], sizeof (LITTLENUM_TYPE));
1006 litP += sizeof (LITTLENUM_TYPE);