1 /* tc-lm32.c - Lattice Mico32 assembler.
2 Copyright 2008 Free Software Foundation, Inc.
3 Contributed by Jon Beniston <jon@beniston.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License along
18 with GAS; see the file COPYING. If not, write to the Free Software
19 Foundation, 51 Franklin Street - Fifth Floor, Boston,
20 MA 02110-1301, USA. */
26 #include "safe-ctype.h"
29 #include "safe-ctype.h"
30 #include "opcodes/lm32-desc.h"
31 #include "opcodes/lm32-opc.h"
37 const CGEN_INSN *insn;
38 const CGEN_INSN *orig_insn;
41 CGEN_INSN_INT buffer [1];
42 #define INSN_VALUE(buf) (*(buf))
44 unsigned char buffer[CGEN_MAX_INSN_SIZE];
45 #define INSN_VALUE(buf) (buf)
50 fixS *fixups[GAS_CGEN_MAX_FIXUPS];
51 int indices[MAX_OPERAND_INSTANCES];
54 /* Configuration options */
56 #define LM_CFG_MULTIPLIY_ENABLED 0x0001
57 #define LM_CFG_DIVIDE_ENABLED 0x0002
58 #define LM_CFG_BARREL_SHIFT_ENABLED 0x0004
59 #define LM_CFG_SIGN_EXTEND_ENABLED 0x0008
60 #define LM_CFG_USER_ENABLED 0x0010
61 #define LM_CFG_ICACHE_ENABLED 0x0020
62 #define LM_CFG_DCACHE_ENABLED 0x0040
63 #define LM_CFG_BREAK_ENABLED 0x0080
65 static unsigned config = 0U;
67 /* Target specific assembler tokens / delimiters. */
69 const char comment_chars[] = "#";
70 const char line_comment_chars[] = "#";
71 const char line_separator_chars[] = ";";
72 const char EXP_CHARS[] = "eE";
73 const char FLT_CHARS[] = "dD";
75 /* Target specific assembly directives. */
77 const pseudo_typeS md_pseudo_table[] =
79 { "align", s_align_bytes, 0 },
84 {(char *)0 , (void(*)(int))0, 0}
87 /* Target specific command line options. */
89 const char * md_shortopts = "";
91 struct option md_longopts[] =
93 #define OPTION_MULTIPLY_ENABLED (OPTION_MD_BASE + 1)
94 { "mmultiply-enabled", no_argument, NULL, OPTION_MULTIPLY_ENABLED },
95 #define OPTION_DIVIDE_ENABLED (OPTION_MD_BASE + 2)
96 { "mdivide-enabled", no_argument, NULL, OPTION_DIVIDE_ENABLED },
97 #define OPTION_BARREL_SHIFT_ENABLED (OPTION_MD_BASE + 3)
98 { "mbarrel-shift-enabled", no_argument, NULL, OPTION_BARREL_SHIFT_ENABLED },
99 #define OPTION_SIGN_EXTEND_ENABLED (OPTION_MD_BASE + 4)
100 { "msign-extend-enabled", no_argument, NULL, OPTION_SIGN_EXTEND_ENABLED },
101 #define OPTION_USER_ENABLED (OPTION_MD_BASE + 5)
102 { "muser-enabled", no_argument, NULL, OPTION_USER_ENABLED },
103 #define OPTION_ICACHE_ENABLED (OPTION_MD_BASE + 6)
104 { "micache-enabled", no_argument, NULL, OPTION_ICACHE_ENABLED },
105 #define OPTION_DCACHE_ENABLED (OPTION_MD_BASE + 7)
106 { "mdcache-enabled", no_argument, NULL, OPTION_DCACHE_ENABLED },
107 #define OPTION_BREAK_ENABLED (OPTION_MD_BASE + 8)
108 { "mbreak-enabled", no_argument, NULL, OPTION_BREAK_ENABLED },
109 #define OPTION_ALL_ENABLED (OPTION_MD_BASE + 9)
110 { "mall-enabled", no_argument, NULL, OPTION_ALL_ENABLED },
113 size_t md_longopts_size = sizeof (md_longopts);
115 /* Display architecture specific options. */
118 md_show_usage (FILE * fp)
120 fprintf (fp, "LM32 specific options:\n"
121 " -mmultiply-enabled enable multiply instructions\n"
122 " -mdivide-enabled enable divide and modulus instructions\n"
123 " -mbarrel-shift-enabled enable multi-bit shift instructions\n"
124 " -msign-extend-enabled enable sign-extension instructions\n"
125 " -muser-enabled enable user-defined instructions\n"
126 " -micache-enabled enable instruction cache instructions\n"
127 " -mdcache-enabled enable data cache instructions\n"
128 " -mbreak-enabled enable the break instruction\n"
129 " -mall-enabled enable all optional instructions\n"
133 /* Parse command line options. */
136 md_parse_option (int c, char * arg ATTRIBUTE_UNUSED)
140 case OPTION_MULTIPLY_ENABLED:
141 config |= LM_CFG_MULTIPLIY_ENABLED;
143 case OPTION_DIVIDE_ENABLED:
144 config |= LM_CFG_DIVIDE_ENABLED;
146 case OPTION_BARREL_SHIFT_ENABLED:
147 config |= LM_CFG_BARREL_SHIFT_ENABLED;
149 case OPTION_SIGN_EXTEND_ENABLED:
150 config |= LM_CFG_SIGN_EXTEND_ENABLED;
152 case OPTION_USER_ENABLED:
153 config |= LM_CFG_USER_ENABLED;
155 case OPTION_ICACHE_ENABLED:
156 config |= LM_CFG_ICACHE_ENABLED;
158 case OPTION_DCACHE_ENABLED:
159 config |= LM_CFG_DCACHE_ENABLED;
161 case OPTION_BREAK_ENABLED:
162 config |= LM_CFG_BREAK_ENABLED;
164 case OPTION_ALL_ENABLED:
165 config |= LM_CFG_MULTIPLIY_ENABLED;
166 config |= LM_CFG_DIVIDE_ENABLED;
167 config |= LM_CFG_BARREL_SHIFT_ENABLED;
168 config |= LM_CFG_SIGN_EXTEND_ENABLED;
169 config |= LM_CFG_USER_ENABLED;
170 config |= LM_CFG_ICACHE_ENABLED;
171 config |= LM_CFG_DCACHE_ENABLED;
172 config |= LM_CFG_BREAK_ENABLED;
180 /* Do any architecture specific initialisation. */
185 /* Initialize the `cgen' interface. */
187 /* Set the machine number and endian. */
188 gas_cgen_cpu_desc = lm32_cgen_cpu_open (CGEN_CPU_OPEN_MACHS, 0,
189 CGEN_CPU_OPEN_ENDIAN,
192 lm32_cgen_init_asm (gas_cgen_cpu_desc);
194 /* This is a callback from cgen to gas to parse operands. */
195 cgen_set_parse_operand_fn (gas_cgen_cpu_desc, gas_cgen_parse_operand);
197 if (! bfd_set_arch_mach (stdoutput, bfd_arch_lm32, bfd_mach_lm32))
198 as_warn (_("could not set architecture and machine"));
201 /* Turn an integer of n bytes (in val) into a stream of bytes appropriate
202 for use in the a.out file, and stores them in the array pointed to by buf. */
205 md_number_to_chars (char * buf, valueT val, int n)
207 if (target_big_endian)
208 number_to_chars_bigendian (buf, val, n);
210 number_to_chars_littleendian (buf, val, n);
213 /* Turn a string in input_line_pointer into a floating point constant
214 of type TYPE, and store the appropriate bytes in *LITP. The number
215 of LITTLENUMS emitted is stored in *SIZEP. An error message is
216 returned, or NULL on OK. */
219 md_atof (int type, char *litP, int *sizeP)
223 LITTLENUM_TYPE words[4];
237 return _("bad call to md_atof");
240 t = atof_ieee (input_line_pointer, type, words);
242 input_line_pointer = t;
244 *sizeP = prec * sizeof (LITTLENUM_TYPE);
246 if (target_big_endian)
248 for (i = 0; i < prec; i++)
250 md_number_to_chars (litP, (valueT) words[i],
251 sizeof (LITTLENUM_TYPE));
252 litP += sizeof (LITTLENUM_TYPE);
257 for (i = prec - 1; i >= 0; i--)
259 md_number_to_chars (litP, (valueT) words[i],
260 sizeof (LITTLENUM_TYPE));
261 litP += sizeof (LITTLENUM_TYPE);
268 /* Called for each undefined symbol. */
271 md_undefined_symbol (char * name ATTRIBUTE_UNUSED)
276 /* Round up a section size to the appropriate boundary. */
279 md_section_align (asection *seg, valueT addr)
281 int align = bfd_get_section_alignment (stdoutput, seg);
282 return ((addr + (1 << align) - 1) & (-1 << align));
285 /* This function assembles the instructions. It emits the frags/bytes to the
286 sections and creates the relocation entries. */
289 md_assemble (char * str)
294 /* Initialize GAS's cgen interface for a new instruction. */
295 gas_cgen_init_parse ();
297 insn.insn = lm32_cgen_assemble_insn
298 (gas_cgen_cpu_desc, str, &insn.fields, insn.buffer, &errmsg);
302 as_bad ("%s", errmsg);
306 gas_cgen_finish_insn (insn.insn, insn.buffer,
307 CGEN_FIELDS_BITSIZE (&insn.fields), 1, NULL);
310 /* Return the bfd reloc type for OPERAND of INSN at fixup FIXP.
311 Returns BFD_RELOC_NONE if no reloc type can be found.
312 *FIXP may be modified if desired. */
314 bfd_reloc_code_real_type
315 md_cgen_lookup_reloc (const CGEN_INSN *insn ATTRIBUTE_UNUSED,
316 const CGEN_OPERAND *operand,
317 fixS *fixP ATTRIBUTE_UNUSED)
319 switch (operand->type)
321 case LM32_OPERAND_GOT16:
322 return BFD_RELOC_LM32_16_GOT;
323 case LM32_OPERAND_GOTOFFHI16:
324 return BFD_RELOC_LM32_GOTOFF_HI16;
325 case LM32_OPERAND_GOTOFFLO16:
326 return BFD_RELOC_LM32_GOTOFF_LO16;
327 case LM32_OPERAND_GP16:
328 return BFD_RELOC_GPREL16;
329 case LM32_OPERAND_LO16:
330 return BFD_RELOC_LO16;
331 case LM32_OPERAND_HI16:
332 return BFD_RELOC_HI16;
333 case LM32_OPERAND_BRANCH:
334 return BFD_RELOC_LM32_BRANCH;
335 case LM32_OPERAND_CALL:
336 return BFD_RELOC_LM32_CALL;
340 return BFD_RELOC_NONE;
343 /* Return the position from which the PC relative adjustment for a PC relative
344 fixup should be made. */
347 md_pcrel_from (fixS *fixP)
349 /* Shouldn't get called. */
351 /* Return address of current instruction. */
352 return fixP->fx_where + fixP->fx_frag->fr_address;
355 /* The location from which a PC relative jump should be calculated,
356 given a PC relative reloc. */
359 md_pcrel_from_section (fixS * fixP, segT sec)
361 if ((fixP->fx_addsy != (symbolS *) NULL)
362 && (! S_IS_DEFINED (fixP->fx_addsy)
363 || (S_GET_SEGMENT (fixP->fx_addsy) != sec)))
365 /* The symbol is undefined (or is defined but not in this section).
366 Let the linker figure it out. */
370 /*fprintf(stderr, "%s extern %d local %d\n", S_GET_NAME (fixP->fx_addsy), S_IS_EXTERN (fixP->fx_addsy), S_IS_LOCAL (fixP->fx_addsy));*/
371 /* FIXME: Weak problem? */
372 if ((fixP->fx_addsy != (symbolS *) NULL)
373 && S_IS_EXTERNAL (fixP->fx_addsy))
375 /* If the symbol is external, let the linker handle it. */
379 return fixP->fx_where + fixP->fx_frag->fr_address;
382 /* Return true if we can partially resolve a relocation now. */
385 lm32_fix_adjustable (fixS * fixP)
387 /* We need the symbol name for the VTABLE entries */
388 if (fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
389 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
395 /* Relaxation isn't required/supported on this target. */
398 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
399 asection *seg ATTRIBUTE_UNUSED)
406 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
407 asection *sec ATTRIBUTE_UNUSED,
408 fragS *fragP ATTRIBUTE_UNUSED)
414 md_apply_fix (fixS * fixP, valueT * valP, segT seg)
416 /* Fix for weak symbols. Why do we have fx_addsy for weak symbols? */
417 if (fixP->fx_addsy != NULL && S_IS_WEAK (fixP->fx_addsy))
420 gas_cgen_md_apply_fix (fixP, valP, seg);