1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template[N][N][N];
585 /* Resource dependencies currently in effect */
587 int depind; /* dependency index */
588 const struct ia64_dependency *dependency; /* actual dependency */
589 unsigned specific:1, /* is this a specific bit/regno? */
590 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
591 int index; /* specific regno/bit within dependency */
592 int note; /* optional qualifying note (0 if none) */
596 int insn_srlz; /* current insn serialization state */
597 int data_srlz; /* current data serialization state */
598 int qp_regno; /* qualifying predicate for this usage */
599 char *file; /* what file marked this dependency */
600 unsigned int line; /* what line marked this dependency */
601 struct mem_offset mem_offset; /* optional memory offset hint */
602 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
603 int path; /* corresponding code entry index */
605 static int regdepslen = 0;
606 static int regdepstotlen = 0;
607 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex {
616 } *qp_mutexes = NULL; /* QP mutex bitmasks */
617 static int qp_mutexeslen = 0;
618 static int qp_mutexestotlen = 0;
619 static valueT qp_safe_across_calls = 0;
621 /* Current state of PR implications */
622 static struct qp_imply {
625 unsigned p2_branched:1;
627 } *qp_implies = NULL;
628 static int qp_implieslen = 0;
629 static int qp_impliestotlen = 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values[128] = {{ 1, 0, 0 }};
639 /* Remember the alignment frag. */
640 static fragS *align_frag;
642 /* These are the routines required to output the various types of
645 /* A slot_number is a frag address plus the slot index (0-2). We use the
646 frag address here so that if there is a section switch in the middle of
647 a function, then instructions emitted to a different section are not
648 counted. Since there may be more than one frag for a function, this
649 means we also need to keep track of which frag this address belongs to
650 so we can compute inter-frag distances. This also nicely solves the
651 problem with nops emitted for align directives, which can't easily be
652 counted, but can easily be derived from frag sizes. */
654 typedef struct unw_rec_list {
656 unsigned long slot_number;
658 unsigned long next_slot_number;
659 fragS *next_slot_frag;
660 struct unw_rec_list *next;
663 #define SLOT_NUM_NOT_SET (unsigned)-1
665 /* Linked list of saved prologue counts. A very poor
666 implementation of a map from label numbers to prologue counts. */
667 typedef struct label_prologue_count
669 struct label_prologue_count *next;
670 unsigned long label_number;
671 unsigned int prologue_count;
672 } label_prologue_count;
676 /* Maintain a list of unwind entries for the current function. */
680 /* Any unwind entires that should be attached to the current slot
681 that an insn is being constructed for. */
682 unw_rec_list *current_entry;
684 /* These are used to create the unwind table entry for this function. */
687 symbolS *info; /* pointer to unwind info */
688 symbolS *personality_routine;
690 subsegT saved_text_subseg;
691 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
693 /* TRUE if processing unwind directives in a prologue region. */
696 unsigned int prologue_count; /* number of .prologues seen so far */
697 /* Prologue counts at previous .label_state directives. */
698 struct label_prologue_count * saved_prologue_counts;
701 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
703 /* Forward declarations: */
704 static int ar_is_in_integer_unit PARAMS ((int regnum));
705 static void set_section PARAMS ((char *name));
706 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
707 unsigned int, unsigned int));
708 static void dot_align (int);
709 static void dot_radix PARAMS ((int));
710 static void dot_special_section PARAMS ((int));
711 static void dot_proc PARAMS ((int));
712 static void dot_fframe PARAMS ((int));
713 static void dot_vframe PARAMS ((int));
714 static void dot_vframesp PARAMS ((int));
715 static void dot_vframepsp PARAMS ((int));
716 static void dot_save PARAMS ((int));
717 static void dot_restore PARAMS ((int));
718 static void dot_restorereg PARAMS ((int));
719 static void dot_restorereg_p PARAMS ((int));
720 static void dot_handlerdata PARAMS ((int));
721 static void dot_unwentry PARAMS ((int));
722 static void dot_altrp PARAMS ((int));
723 static void dot_savemem PARAMS ((int));
724 static void dot_saveg PARAMS ((int));
725 static void dot_savef PARAMS ((int));
726 static void dot_saveb PARAMS ((int));
727 static void dot_savegf PARAMS ((int));
728 static void dot_spill PARAMS ((int));
729 static void dot_spillreg PARAMS ((int));
730 static void dot_spillmem PARAMS ((int));
731 static void dot_spillreg_p PARAMS ((int));
732 static void dot_spillmem_p PARAMS ((int));
733 static void dot_label_state PARAMS ((int));
734 static void dot_copy_state PARAMS ((int));
735 static void dot_unwabi PARAMS ((int));
736 static void dot_personality PARAMS ((int));
737 static void dot_body PARAMS ((int));
738 static void dot_prologue PARAMS ((int));
739 static void dot_endp PARAMS ((int));
740 static void dot_template PARAMS ((int));
741 static void dot_regstk PARAMS ((int));
742 static void dot_rot PARAMS ((int));
743 static void dot_byteorder PARAMS ((int));
744 static void dot_psr PARAMS ((int));
745 static void dot_alias PARAMS ((int));
746 static void dot_ln PARAMS ((int));
747 static char *parse_section_name PARAMS ((void));
748 static void dot_xdata PARAMS ((int));
749 static void stmt_float_cons PARAMS ((int));
750 static void stmt_cons_ua PARAMS ((int));
751 static void dot_xfloat_cons PARAMS ((int));
752 static void dot_xstringer PARAMS ((int));
753 static void dot_xdata_ua PARAMS ((int));
754 static void dot_xfloat_cons_ua PARAMS ((int));
755 static void print_prmask PARAMS ((valueT mask));
756 static void dot_pred_rel PARAMS ((int));
757 static void dot_reg_val PARAMS ((int));
758 static void dot_dv_mode PARAMS ((int));
759 static void dot_entry PARAMS ((int));
760 static void dot_mem_offset PARAMS ((int));
761 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
762 static symbolS *declare_register PARAMS ((const char *name, int regnum));
763 static void declare_register_set PARAMS ((const char *, int, int));
764 static unsigned int operand_width PARAMS ((enum ia64_opnd));
765 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
768 static int parse_operand PARAMS ((expressionS *e));
769 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
770 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
771 static void build_insn PARAMS ((struct slot *, bfd_vma *));
772 static void emit_one_bundle PARAMS ((void));
773 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
774 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
775 bfd_reloc_code_real_type r_type));
776 static void insn_group_break PARAMS ((int, int, int));
777 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
778 struct rsrc *, int depind, int path));
779 static void add_qp_mutex PARAMS((valueT mask));
780 static void add_qp_imply PARAMS((int p1, int p2));
781 static void clear_qp_branch_flag PARAMS((valueT mask));
782 static void clear_qp_mutex PARAMS((valueT mask));
783 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
784 static int has_suffix_p PARAMS((const char *, const char *));
785 static void clear_register_values PARAMS ((void));
786 static void print_dependency PARAMS ((const char *action, int depind));
787 static void instruction_serialization PARAMS ((void));
788 static void data_serialization PARAMS ((void));
789 static void remove_marked_resource PARAMS ((struct rsrc *));
790 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
791 static int is_taken_branch PARAMS ((struct ia64_opcode *));
792 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
793 static int depends_on PARAMS ((int, struct ia64_opcode *));
794 static int specify_resource PARAMS ((const struct ia64_dependency *,
795 struct ia64_opcode *, int, struct rsrc [], int, int));
796 static int check_dv PARAMS((struct ia64_opcode *idesc));
797 static void check_dependencies PARAMS((struct ia64_opcode *));
798 static void mark_resources PARAMS((struct ia64_opcode *));
799 static void update_dependencies PARAMS((struct ia64_opcode *));
800 static void note_register_values PARAMS((struct ia64_opcode *));
801 static int qp_mutex PARAMS ((int, int, int));
802 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
803 static void output_vbyte_mem PARAMS ((int, char *, char *));
804 static void count_output PARAMS ((int, char *, char *));
805 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
806 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
807 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
808 static void output_P1_format PARAMS ((vbyte_func, int));
809 static void output_P2_format PARAMS ((vbyte_func, int, int));
810 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
811 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
812 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
813 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
814 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
815 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
816 static void output_P9_format PARAMS ((vbyte_func, int, int));
817 static void output_P10_format PARAMS ((vbyte_func, int, int));
818 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
819 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
820 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
821 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
822 static char format_ab_reg PARAMS ((int, int));
823 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
825 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
826 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
828 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
829 static unw_rec_list *output_endp PARAMS ((void));
830 static unw_rec_list *output_prologue PARAMS ((void));
831 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
832 static unw_rec_list *output_body PARAMS ((void));
833 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
834 static unw_rec_list *output_mem_stack_v PARAMS ((void));
835 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
836 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_rp_when PARAMS ((void));
838 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
840 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
841 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
842 static unw_rec_list *output_pfs_when PARAMS ((void));
843 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
844 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
845 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
846 static unw_rec_list *output_preds_when PARAMS ((void));
847 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
848 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
849 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
850 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
851 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
853 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
854 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
855 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
856 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
857 static unw_rec_list *output_unat_when PARAMS ((void));
858 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
859 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
860 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
861 static unw_rec_list *output_lc_when PARAMS ((void));
862 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
863 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
864 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
865 static unw_rec_list *output_fpsr_when PARAMS ((void));
866 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
870 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
871 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
872 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
873 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
874 static unw_rec_list *output_bsp_when PARAMS ((void));
875 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
876 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
877 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
878 static unw_rec_list *output_bspstore_when PARAMS ((void));
879 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
880 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
881 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
882 static unw_rec_list *output_rnat_when PARAMS ((void));
883 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
884 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
885 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
886 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
887 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
888 static unw_rec_list *output_label_state PARAMS ((unsigned long));
889 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
890 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
891 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
892 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
896 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
898 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
899 unsigned int, unsigned int));
900 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
901 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
902 static int calc_record_size PARAMS ((unw_rec_list *));
903 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
904 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
905 unsigned long, fragS *,
907 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
908 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
909 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
910 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
911 static void generate_unwind_image PARAMS ((const char *));
912 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
913 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
914 static void free_saved_prologue_counts PARAMS ((void));
916 /* Build the unwind section name by appending the (possibly stripped)
917 text section NAME to the unwind PREFIX. The resulting string
918 pointer is assigned to RESULT. The string is allocated on the
919 stack, so this must be a macro... */
920 #define make_unw_section_name(special, text_name, result) \
922 const char *_prefix = special_section_name[special]; \
923 const char *_suffix = text_name; \
924 size_t _prefix_len, _suffix_len; \
926 if (strncmp (text_name, ".gnu.linkonce.t.", \
927 sizeof (".gnu.linkonce.t.") - 1) == 0) \
929 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
930 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
932 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
933 _result = alloca (_prefix_len + _suffix_len + 1); \
934 memcpy (_result, _prefix, _prefix_len); \
935 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
936 _result[_prefix_len + _suffix_len] = '\0'; \
941 /* Determine if application register REGNUM resides in the integer
942 unit (as opposed to the memory unit). */
944 ar_is_in_integer_unit (reg)
949 return (reg == 64 /* pfs */
950 || reg == 65 /* lc */
951 || reg == 66 /* ec */
952 /* ??? ias accepts and puts these in the integer unit. */
953 || (reg >= 112 && reg <= 127));
956 /* Switch to section NAME and create section if necessary. It's
957 rather ugly that we have to manipulate input_line_pointer but I
958 don't see any other way to accomplish the same thing without
959 changing obj-elf.c (which may be the Right Thing, in the end). */
964 char *saved_input_line_pointer;
966 saved_input_line_pointer = input_line_pointer;
967 input_line_pointer = name;
969 input_line_pointer = saved_input_line_pointer;
972 /* Map 's' to SHF_IA_64_SHORT. */
975 ia64_elf_section_letter (letter, ptr_msg)
980 return SHF_IA_64_SHORT;
981 else if (letter == 'o')
982 return SHF_LINK_ORDER;
984 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
988 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
991 ia64_elf_section_flags (flags, attr, type)
993 int attr, type ATTRIBUTE_UNUSED;
995 if (attr & SHF_IA_64_SHORT)
996 flags |= SEC_SMALL_DATA;
1001 ia64_elf_section_type (str, len)
1005 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1007 if (STREQ (ELF_STRING_ia64_unwind_info))
1008 return SHT_PROGBITS;
1010 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1011 return SHT_PROGBITS;
1013 if (STREQ (ELF_STRING_ia64_unwind))
1014 return SHT_IA_64_UNWIND;
1016 if (STREQ (ELF_STRING_ia64_unwind_once))
1017 return SHT_IA_64_UNWIND;
1019 if (STREQ ("unwind"))
1020 return SHT_IA_64_UNWIND;
1022 if (STREQ ("init_array"))
1023 return SHT_INIT_ARRAY;
1025 if (STREQ ("fini_array"))
1026 return SHT_FINI_ARRAY;
1033 set_regstack (ins, locs, outs, rots)
1034 unsigned int ins, locs, outs, rots;
1036 /* Size of frame. */
1039 sof = ins + locs + outs;
1042 as_bad ("Size of frame exceeds maximum of 96 registers");
1047 as_warn ("Size of rotating registers exceeds frame size");
1050 md.in.base = REG_GR + 32;
1051 md.loc.base = md.in.base + ins;
1052 md.out.base = md.loc.base + locs;
1054 md.in.num_regs = ins;
1055 md.loc.num_regs = locs;
1056 md.out.num_regs = outs;
1057 md.rot.num_regs = rots;
1064 struct label_fix *lfix;
1066 subsegT saved_subseg;
1069 if (!md.last_text_seg)
1072 saved_seg = now_seg;
1073 saved_subseg = now_subseg;
1075 subseg_set (md.last_text_seg, 0);
1077 while (md.num_slots_in_use > 0)
1078 emit_one_bundle (); /* force out queued instructions */
1080 /* In case there are labels following the last instruction, resolve
1082 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1084 S_SET_VALUE (lfix->sym, frag_now_fix ());
1085 symbol_set_frag (lfix->sym, frag_now);
1087 CURR_SLOT.label_fixups = 0;
1088 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1090 S_SET_VALUE (lfix->sym, frag_now_fix ());
1091 symbol_set_frag (lfix->sym, frag_now);
1093 CURR_SLOT.tag_fixups = 0;
1095 /* In case there are unwind directives following the last instruction,
1096 resolve those now. We only handle prologue, body, and endp directives
1097 here. Give an error for others. */
1098 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1100 switch (ptr->r.type)
1106 ptr->slot_number = (unsigned long) frag_more (0);
1107 ptr->slot_frag = frag_now;
1110 /* Allow any record which doesn't have a "t" field (i.e.,
1111 doesn't relate to a particular instruction). */
1127 as_bad (_("Unwind directive not followed by an instruction."));
1131 unwind.current_entry = NULL;
1133 subseg_set (saved_seg, saved_subseg);
1135 if (md.qp.X_op == O_register)
1136 as_bad ("qualifying predicate not followed by instruction");
1140 ia64_do_align (int nbytes)
1142 char *saved_input_line_pointer = input_line_pointer;
1144 input_line_pointer = "";
1145 s_align_bytes (nbytes);
1146 input_line_pointer = saved_input_line_pointer;
1150 ia64_cons_align (nbytes)
1155 char *saved_input_line_pointer = input_line_pointer;
1156 input_line_pointer = "";
1157 s_align_bytes (nbytes);
1158 input_line_pointer = saved_input_line_pointer;
1162 /* Output COUNT bytes to a memory location. */
1163 static unsigned char *vbyte_mem_ptr = NULL;
1166 output_vbyte_mem (count, ptr, comment)
1169 char *comment ATTRIBUTE_UNUSED;
1172 if (vbyte_mem_ptr == NULL)
1177 for (x = 0; x < count; x++)
1178 *(vbyte_mem_ptr++) = ptr[x];
1181 /* Count the number of bytes required for records. */
1182 static int vbyte_count = 0;
1184 count_output (count, ptr, comment)
1186 char *ptr ATTRIBUTE_UNUSED;
1187 char *comment ATTRIBUTE_UNUSED;
1189 vbyte_count += count;
1193 output_R1_format (f, rtype, rlen)
1195 unw_record_type rtype;
1202 output_R3_format (f, rtype, rlen);
1208 else if (rtype != prologue)
1209 as_bad ("record type is not valid");
1211 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1212 (*f) (1, &byte, NULL);
1216 output_R2_format (f, mask, grsave, rlen)
1223 mask = (mask & 0x0f);
1224 grsave = (grsave & 0x7f);
1226 bytes[0] = (UNW_R2 | (mask >> 1));
1227 bytes[1] = (((mask & 0x01) << 7) | grsave);
1228 count += output_leb128 (bytes + 2, rlen, 0);
1229 (*f) (count, bytes, NULL);
1233 output_R3_format (f, rtype, rlen)
1235 unw_record_type rtype;
1242 output_R1_format (f, rtype, rlen);
1248 else if (rtype != prologue)
1249 as_bad ("record type is not valid");
1250 bytes[0] = (UNW_R3 | r);
1251 count = output_leb128 (bytes + 1, rlen, 0);
1252 (*f) (count + 1, bytes, NULL);
1256 output_P1_format (f, brmask)
1261 byte = UNW_P1 | (brmask & 0x1f);
1262 (*f) (1, &byte, NULL);
1266 output_P2_format (f, brmask, gr)
1272 brmask = (brmask & 0x1f);
1273 bytes[0] = UNW_P2 | (brmask >> 1);
1274 bytes[1] = (((brmask & 1) << 7) | gr);
1275 (*f) (2, bytes, NULL);
1279 output_P3_format (f, rtype, reg)
1281 unw_record_type rtype;
1326 as_bad ("Invalid record type for P3 format.");
1328 bytes[0] = (UNW_P3 | (r >> 1));
1329 bytes[1] = (((r & 1) << 7) | reg);
1330 (*f) (2, bytes, NULL);
1334 output_P4_format (f, imask, imask_size)
1336 unsigned char *imask;
1337 unsigned long imask_size;
1340 (*f) (imask_size, imask, NULL);
1344 output_P5_format (f, grmask, frmask)
1347 unsigned long frmask;
1350 grmask = (grmask & 0x0f);
1353 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1354 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1355 bytes[3] = (frmask & 0x000000ff);
1356 (*f) (4, bytes, NULL);
1360 output_P6_format (f, rtype, rmask)
1362 unw_record_type rtype;
1368 if (rtype == gr_mem)
1370 else if (rtype != fr_mem)
1371 as_bad ("Invalid record type for format P6");
1372 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1373 (*f) (1, &byte, NULL);
1377 output_P7_format (f, rtype, w1, w2)
1379 unw_record_type rtype;
1386 count += output_leb128 (bytes + 1, w1, 0);
1391 count += output_leb128 (bytes + count, w2 >> 4, 0);
1441 bytes[0] = (UNW_P7 | r);
1442 (*f) (count, bytes, NULL);
1446 output_P8_format (f, rtype, t)
1448 unw_record_type rtype;
1487 case bspstore_psprel:
1490 case bspstore_sprel:
1502 case priunat_when_gr:
1505 case priunat_psprel:
1511 case priunat_when_mem:
1518 count += output_leb128 (bytes + 2, t, 0);
1519 (*f) (count, bytes, NULL);
1523 output_P9_format (f, grmask, gr)
1530 bytes[1] = (grmask & 0x0f);
1531 bytes[2] = (gr & 0x7f);
1532 (*f) (3, bytes, NULL);
1536 output_P10_format (f, abi, context)
1543 bytes[1] = (abi & 0xff);
1544 bytes[2] = (context & 0xff);
1545 (*f) (3, bytes, NULL);
1549 output_B1_format (f, rtype, label)
1551 unw_record_type rtype;
1552 unsigned long label;
1558 output_B4_format (f, rtype, label);
1561 if (rtype == copy_state)
1563 else if (rtype != label_state)
1564 as_bad ("Invalid record type for format B1");
1566 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1567 (*f) (1, &byte, NULL);
1571 output_B2_format (f, ecount, t)
1573 unsigned long ecount;
1580 output_B3_format (f, ecount, t);
1583 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1584 count += output_leb128 (bytes + 1, t, 0);
1585 (*f) (count, bytes, NULL);
1589 output_B3_format (f, ecount, t)
1591 unsigned long ecount;
1598 output_B2_format (f, ecount, t);
1602 count += output_leb128 (bytes + 1, t, 0);
1603 count += output_leb128 (bytes + count, ecount, 0);
1604 (*f) (count, bytes, NULL);
1608 output_B4_format (f, rtype, label)
1610 unw_record_type rtype;
1611 unsigned long label;
1618 output_B1_format (f, rtype, label);
1622 if (rtype == copy_state)
1624 else if (rtype != label_state)
1625 as_bad ("Invalid record type for format B1");
1627 bytes[0] = (UNW_B4 | (r << 3));
1628 count += output_leb128 (bytes + 1, label, 0);
1629 (*f) (count, bytes, NULL);
1633 format_ab_reg (ab, reg)
1640 ret = (ab << 5) | reg;
1645 output_X1_format (f, rtype, ab, reg, t, w1)
1647 unw_record_type rtype;
1657 if (rtype == spill_sprel)
1659 else if (rtype != spill_psprel)
1660 as_bad ("Invalid record type for format X1");
1661 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1662 count += output_leb128 (bytes + 2, t, 0);
1663 count += output_leb128 (bytes + count, w1, 0);
1664 (*f) (count, bytes, NULL);
1668 output_X2_format (f, ab, reg, x, y, treg, t)
1677 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1678 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1679 count += output_leb128 (bytes + 3, t, 0);
1680 (*f) (count, bytes, NULL);
1684 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1686 unw_record_type rtype;
1697 if (rtype == spill_sprel_p)
1699 else if (rtype != spill_psprel_p)
1700 as_bad ("Invalid record type for format X3");
1701 bytes[1] = ((r << 7) | (qp & 0x3f));
1702 bytes[2] = format_ab_reg (ab, reg);
1703 count += output_leb128 (bytes + 3, t, 0);
1704 count += output_leb128 (bytes + count, w1, 0);
1705 (*f) (count, bytes, NULL);
1709 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1719 bytes[1] = (qp & 0x3f);
1720 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1721 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1722 count += output_leb128 (bytes + 4, t, 0);
1723 (*f) (count, bytes, NULL);
1726 /* This function allocates a record list structure, and initializes fields. */
1728 static unw_rec_list *
1729 alloc_record (unw_record_type t)
1732 ptr = xmalloc (sizeof (*ptr));
1734 ptr->slot_number = SLOT_NUM_NOT_SET;
1736 ptr->next_slot_number = 0;
1737 ptr->next_slot_frag = 0;
1741 /* Dummy unwind record used for calculating the length of the last prologue or
1744 static unw_rec_list *
1747 unw_rec_list *ptr = alloc_record (endp);
1751 static unw_rec_list *
1754 unw_rec_list *ptr = alloc_record (prologue);
1755 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1759 static unw_rec_list *
1760 output_prologue_gr (saved_mask, reg)
1761 unsigned int saved_mask;
1764 unw_rec_list *ptr = alloc_record (prologue_gr);
1765 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1766 ptr->r.record.r.grmask = saved_mask;
1767 ptr->r.record.r.grsave = reg;
1771 static unw_rec_list *
1774 unw_rec_list *ptr = alloc_record (body);
1778 static unw_rec_list *
1779 output_mem_stack_f (size)
1782 unw_rec_list *ptr = alloc_record (mem_stack_f);
1783 ptr->r.record.p.size = size;
1787 static unw_rec_list *
1788 output_mem_stack_v ()
1790 unw_rec_list *ptr = alloc_record (mem_stack_v);
1794 static unw_rec_list *
1798 unw_rec_list *ptr = alloc_record (psp_gr);
1799 ptr->r.record.p.gr = gr;
1803 static unw_rec_list *
1804 output_psp_sprel (offset)
1805 unsigned int offset;
1807 unw_rec_list *ptr = alloc_record (psp_sprel);
1808 ptr->r.record.p.spoff = offset / 4;
1812 static unw_rec_list *
1815 unw_rec_list *ptr = alloc_record (rp_when);
1819 static unw_rec_list *
1823 unw_rec_list *ptr = alloc_record (rp_gr);
1824 ptr->r.record.p.gr = gr;
1828 static unw_rec_list *
1832 unw_rec_list *ptr = alloc_record (rp_br);
1833 ptr->r.record.p.br = br;
1837 static unw_rec_list *
1838 output_rp_psprel (offset)
1839 unsigned int offset;
1841 unw_rec_list *ptr = alloc_record (rp_psprel);
1842 ptr->r.record.p.pspoff = offset / 4;
1846 static unw_rec_list *
1847 output_rp_sprel (offset)
1848 unsigned int offset;
1850 unw_rec_list *ptr = alloc_record (rp_sprel);
1851 ptr->r.record.p.spoff = offset / 4;
1855 static unw_rec_list *
1858 unw_rec_list *ptr = alloc_record (pfs_when);
1862 static unw_rec_list *
1866 unw_rec_list *ptr = alloc_record (pfs_gr);
1867 ptr->r.record.p.gr = gr;
1871 static unw_rec_list *
1872 output_pfs_psprel (offset)
1873 unsigned int offset;
1875 unw_rec_list *ptr = alloc_record (pfs_psprel);
1876 ptr->r.record.p.pspoff = offset / 4;
1880 static unw_rec_list *
1881 output_pfs_sprel (offset)
1882 unsigned int offset;
1884 unw_rec_list *ptr = alloc_record (pfs_sprel);
1885 ptr->r.record.p.spoff = offset / 4;
1889 static unw_rec_list *
1890 output_preds_when ()
1892 unw_rec_list *ptr = alloc_record (preds_when);
1896 static unw_rec_list *
1897 output_preds_gr (gr)
1900 unw_rec_list *ptr = alloc_record (preds_gr);
1901 ptr->r.record.p.gr = gr;
1905 static unw_rec_list *
1906 output_preds_psprel (offset)
1907 unsigned int offset;
1909 unw_rec_list *ptr = alloc_record (preds_psprel);
1910 ptr->r.record.p.pspoff = offset / 4;
1914 static unw_rec_list *
1915 output_preds_sprel (offset)
1916 unsigned int offset;
1918 unw_rec_list *ptr = alloc_record (preds_sprel);
1919 ptr->r.record.p.spoff = offset / 4;
1923 static unw_rec_list *
1924 output_fr_mem (mask)
1927 unw_rec_list *ptr = alloc_record (fr_mem);
1928 ptr->r.record.p.rmask = mask;
1932 static unw_rec_list *
1933 output_frgr_mem (gr_mask, fr_mask)
1934 unsigned int gr_mask;
1935 unsigned int fr_mask;
1937 unw_rec_list *ptr = alloc_record (frgr_mem);
1938 ptr->r.record.p.grmask = gr_mask;
1939 ptr->r.record.p.frmask = fr_mask;
1943 static unw_rec_list *
1944 output_gr_gr (mask, reg)
1948 unw_rec_list *ptr = alloc_record (gr_gr);
1949 ptr->r.record.p.grmask = mask;
1950 ptr->r.record.p.gr = reg;
1954 static unw_rec_list *
1955 output_gr_mem (mask)
1958 unw_rec_list *ptr = alloc_record (gr_mem);
1959 ptr->r.record.p.rmask = mask;
1963 static unw_rec_list *
1964 output_br_mem (unsigned int mask)
1966 unw_rec_list *ptr = alloc_record (br_mem);
1967 ptr->r.record.p.brmask = mask;
1971 static unw_rec_list *
1972 output_br_gr (save_mask, reg)
1973 unsigned int save_mask;
1976 unw_rec_list *ptr = alloc_record (br_gr);
1977 ptr->r.record.p.brmask = save_mask;
1978 ptr->r.record.p.gr = reg;
1982 static unw_rec_list *
1983 output_spill_base (offset)
1984 unsigned int offset;
1986 unw_rec_list *ptr = alloc_record (spill_base);
1987 ptr->r.record.p.pspoff = offset / 4;
1991 static unw_rec_list *
1994 unw_rec_list *ptr = alloc_record (unat_when);
1998 static unw_rec_list *
2002 unw_rec_list *ptr = alloc_record (unat_gr);
2003 ptr->r.record.p.gr = gr;
2007 static unw_rec_list *
2008 output_unat_psprel (offset)
2009 unsigned int offset;
2011 unw_rec_list *ptr = alloc_record (unat_psprel);
2012 ptr->r.record.p.pspoff = offset / 4;
2016 static unw_rec_list *
2017 output_unat_sprel (offset)
2018 unsigned int offset;
2020 unw_rec_list *ptr = alloc_record (unat_sprel);
2021 ptr->r.record.p.spoff = offset / 4;
2025 static unw_rec_list *
2028 unw_rec_list *ptr = alloc_record (lc_when);
2032 static unw_rec_list *
2036 unw_rec_list *ptr = alloc_record (lc_gr);
2037 ptr->r.record.p.gr = gr;
2041 static unw_rec_list *
2042 output_lc_psprel (offset)
2043 unsigned int offset;
2045 unw_rec_list *ptr = alloc_record (lc_psprel);
2046 ptr->r.record.p.pspoff = offset / 4;
2050 static unw_rec_list *
2051 output_lc_sprel (offset)
2052 unsigned int offset;
2054 unw_rec_list *ptr = alloc_record (lc_sprel);
2055 ptr->r.record.p.spoff = offset / 4;
2059 static unw_rec_list *
2062 unw_rec_list *ptr = alloc_record (fpsr_when);
2066 static unw_rec_list *
2070 unw_rec_list *ptr = alloc_record (fpsr_gr);
2071 ptr->r.record.p.gr = gr;
2075 static unw_rec_list *
2076 output_fpsr_psprel (offset)
2077 unsigned int offset;
2079 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2080 ptr->r.record.p.pspoff = offset / 4;
2084 static unw_rec_list *
2085 output_fpsr_sprel (offset)
2086 unsigned int offset;
2088 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2089 ptr->r.record.p.spoff = offset / 4;
2093 static unw_rec_list *
2094 output_priunat_when_gr ()
2096 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2100 static unw_rec_list *
2101 output_priunat_when_mem ()
2103 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2107 static unw_rec_list *
2108 output_priunat_gr (gr)
2111 unw_rec_list *ptr = alloc_record (priunat_gr);
2112 ptr->r.record.p.gr = gr;
2116 static unw_rec_list *
2117 output_priunat_psprel (offset)
2118 unsigned int offset;
2120 unw_rec_list *ptr = alloc_record (priunat_psprel);
2121 ptr->r.record.p.pspoff = offset / 4;
2125 static unw_rec_list *
2126 output_priunat_sprel (offset)
2127 unsigned int offset;
2129 unw_rec_list *ptr = alloc_record (priunat_sprel);
2130 ptr->r.record.p.spoff = offset / 4;
2134 static unw_rec_list *
2137 unw_rec_list *ptr = alloc_record (bsp_when);
2141 static unw_rec_list *
2145 unw_rec_list *ptr = alloc_record (bsp_gr);
2146 ptr->r.record.p.gr = gr;
2150 static unw_rec_list *
2151 output_bsp_psprel (offset)
2152 unsigned int offset;
2154 unw_rec_list *ptr = alloc_record (bsp_psprel);
2155 ptr->r.record.p.pspoff = offset / 4;
2159 static unw_rec_list *
2160 output_bsp_sprel (offset)
2161 unsigned int offset;
2163 unw_rec_list *ptr = alloc_record (bsp_sprel);
2164 ptr->r.record.p.spoff = offset / 4;
2168 static unw_rec_list *
2169 output_bspstore_when ()
2171 unw_rec_list *ptr = alloc_record (bspstore_when);
2175 static unw_rec_list *
2176 output_bspstore_gr (gr)
2179 unw_rec_list *ptr = alloc_record (bspstore_gr);
2180 ptr->r.record.p.gr = gr;
2184 static unw_rec_list *
2185 output_bspstore_psprel (offset)
2186 unsigned int offset;
2188 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2189 ptr->r.record.p.pspoff = offset / 4;
2193 static unw_rec_list *
2194 output_bspstore_sprel (offset)
2195 unsigned int offset;
2197 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2198 ptr->r.record.p.spoff = offset / 4;
2202 static unw_rec_list *
2205 unw_rec_list *ptr = alloc_record (rnat_when);
2209 static unw_rec_list *
2213 unw_rec_list *ptr = alloc_record (rnat_gr);
2214 ptr->r.record.p.gr = gr;
2218 static unw_rec_list *
2219 output_rnat_psprel (offset)
2220 unsigned int offset;
2222 unw_rec_list *ptr = alloc_record (rnat_psprel);
2223 ptr->r.record.p.pspoff = offset / 4;
2227 static unw_rec_list *
2228 output_rnat_sprel (offset)
2229 unsigned int offset;
2231 unw_rec_list *ptr = alloc_record (rnat_sprel);
2232 ptr->r.record.p.spoff = offset / 4;
2236 static unw_rec_list *
2237 output_unwabi (abi, context)
2239 unsigned long context;
2241 unw_rec_list *ptr = alloc_record (unwabi);
2242 ptr->r.record.p.abi = abi;
2243 ptr->r.record.p.context = context;
2247 static unw_rec_list *
2248 output_epilogue (unsigned long ecount)
2250 unw_rec_list *ptr = alloc_record (epilogue);
2251 ptr->r.record.b.ecount = ecount;
2255 static unw_rec_list *
2256 output_label_state (unsigned long label)
2258 unw_rec_list *ptr = alloc_record (label_state);
2259 ptr->r.record.b.label = label;
2263 static unw_rec_list *
2264 output_copy_state (unsigned long label)
2266 unw_rec_list *ptr = alloc_record (copy_state);
2267 ptr->r.record.b.label = label;
2271 static unw_rec_list *
2272 output_spill_psprel (ab, reg, offset)
2275 unsigned int offset;
2277 unw_rec_list *ptr = alloc_record (spill_psprel);
2278 ptr->r.record.x.ab = ab;
2279 ptr->r.record.x.reg = reg;
2280 ptr->r.record.x.pspoff = offset / 4;
2284 static unw_rec_list *
2285 output_spill_sprel (ab, reg, offset)
2288 unsigned int offset;
2290 unw_rec_list *ptr = alloc_record (spill_sprel);
2291 ptr->r.record.x.ab = ab;
2292 ptr->r.record.x.reg = reg;
2293 ptr->r.record.x.spoff = offset / 4;
2297 static unw_rec_list *
2298 output_spill_psprel_p (ab, reg, offset, predicate)
2301 unsigned int offset;
2302 unsigned int predicate;
2304 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2305 ptr->r.record.x.ab = ab;
2306 ptr->r.record.x.reg = reg;
2307 ptr->r.record.x.pspoff = offset / 4;
2308 ptr->r.record.x.qp = predicate;
2312 static unw_rec_list *
2313 output_spill_sprel_p (ab, reg, offset, predicate)
2316 unsigned int offset;
2317 unsigned int predicate;
2319 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2320 ptr->r.record.x.ab = ab;
2321 ptr->r.record.x.reg = reg;
2322 ptr->r.record.x.spoff = offset / 4;
2323 ptr->r.record.x.qp = predicate;
2327 static unw_rec_list *
2328 output_spill_reg (ab, reg, targ_reg, xy)
2331 unsigned int targ_reg;
2334 unw_rec_list *ptr = alloc_record (spill_reg);
2335 ptr->r.record.x.ab = ab;
2336 ptr->r.record.x.reg = reg;
2337 ptr->r.record.x.treg = targ_reg;
2338 ptr->r.record.x.xy = xy;
2342 static unw_rec_list *
2343 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2346 unsigned int targ_reg;
2348 unsigned int predicate;
2350 unw_rec_list *ptr = alloc_record (spill_reg_p);
2351 ptr->r.record.x.ab = ab;
2352 ptr->r.record.x.reg = reg;
2353 ptr->r.record.x.treg = targ_reg;
2354 ptr->r.record.x.xy = xy;
2355 ptr->r.record.x.qp = predicate;
2359 /* Given a unw_rec_list process the correct format with the
2360 specified function. */
2363 process_one_record (ptr, f)
2367 unsigned long fr_mask, gr_mask;
2369 switch (ptr->r.type)
2371 /* This is a dummy record that takes up no space in the output. */
2379 /* These are taken care of by prologue/prologue_gr. */
2384 if (ptr->r.type == prologue_gr)
2385 output_R2_format (f, ptr->r.record.r.grmask,
2386 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2388 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2390 /* Output descriptor(s) for union of register spills (if any). */
2391 gr_mask = ptr->r.record.r.mask.gr_mem;
2392 fr_mask = ptr->r.record.r.mask.fr_mem;
2395 if ((fr_mask & ~0xfUL) == 0)
2396 output_P6_format (f, fr_mem, fr_mask);
2399 output_P5_format (f, gr_mask, fr_mask);
2404 output_P6_format (f, gr_mem, gr_mask);
2405 if (ptr->r.record.r.mask.br_mem)
2406 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2408 /* output imask descriptor if necessary: */
2409 if (ptr->r.record.r.mask.i)
2410 output_P4_format (f, ptr->r.record.r.mask.i,
2411 ptr->r.record.r.imask_size);
2415 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2419 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2420 ptr->r.record.p.size);
2433 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2436 output_P3_format (f, rp_br, ptr->r.record.p.br);
2439 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2447 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2456 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2466 case bspstore_sprel:
2468 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2471 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2474 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2477 as_bad ("spill_mask record unimplemented.");
2479 case priunat_when_gr:
2480 case priunat_when_mem:
2484 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2486 case priunat_psprel:
2488 case bspstore_psprel:
2490 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2493 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2496 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2500 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2503 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2504 ptr->r.record.x.reg, ptr->r.record.x.t,
2505 ptr->r.record.x.pspoff);
2508 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2509 ptr->r.record.x.reg, ptr->r.record.x.t,
2510 ptr->r.record.x.spoff);
2513 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2514 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2515 ptr->r.record.x.treg, ptr->r.record.x.t);
2517 case spill_psprel_p:
2518 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2519 ptr->r.record.x.ab, ptr->r.record.x.reg,
2520 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2523 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2524 ptr->r.record.x.ab, ptr->r.record.x.reg,
2525 ptr->r.record.x.t, ptr->r.record.x.spoff);
2528 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2529 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2530 ptr->r.record.x.xy, ptr->r.record.x.treg,
2534 as_bad ("record_type_not_valid");
2539 /* Given a unw_rec_list list, process all the records with
2540 the specified function. */
2542 process_unw_records (list, f)
2547 for (ptr = list; ptr; ptr = ptr->next)
2548 process_one_record (ptr, f);
2551 /* Determine the size of a record list in bytes. */
2553 calc_record_size (list)
2557 process_unw_records (list, count_output);
2561 /* Update IMASK bitmask to reflect the fact that one or more registers
2562 of type TYPE are saved starting at instruction with index T. If N
2563 bits are set in REGMASK, it is assumed that instructions T through
2564 T+N-1 save these registers.
2568 1: instruction saves next fp reg
2569 2: instruction saves next general reg
2570 3: instruction saves next branch reg */
2572 set_imask (region, regmask, t, type)
2573 unw_rec_list *region;
2574 unsigned long regmask;
2578 unsigned char *imask;
2579 unsigned long imask_size;
2583 imask = region->r.record.r.mask.i;
2584 imask_size = region->r.record.r.imask_size;
2587 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2588 imask = xmalloc (imask_size);
2589 memset (imask, 0, imask_size);
2591 region->r.record.r.imask_size = imask_size;
2592 region->r.record.r.mask.i = imask;
2596 pos = 2 * (3 - t % 4);
2599 if (i >= imask_size)
2601 as_bad ("Ignoring attempt to spill beyond end of region");
2605 imask[i] |= (type & 0x3) << pos;
2607 regmask &= (regmask - 1);
2617 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2618 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2619 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2623 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2624 unsigned long slot_addr;
2626 unsigned long first_addr;
2630 unsigned long index = 0;
2632 /* First time we are called, the initial address and frag are invalid. */
2633 if (first_addr == 0)
2636 /* If the two addresses are in different frags, then we need to add in
2637 the remaining size of this frag, and then the entire size of intermediate
2639 while (slot_frag != first_frag)
2641 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2645 /* We can get the final addresses only during and after
2647 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2648 index += 3 * ((first_frag->fr_next->fr_address
2649 - first_frag->fr_address
2650 - first_frag->fr_fix) >> 4);
2653 /* We don't know what the final addresses will be. We try our
2654 best to estimate. */
2655 switch (first_frag->fr_type)
2661 as_fatal ("only constant space allocation is supported");
2667 /* Take alignment into account. Assume the worst case
2668 before relaxation. */
2669 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2673 if (first_frag->fr_symbol)
2675 as_fatal ("only constant offsets are supported");
2679 index += 3 * (first_frag->fr_offset >> 4);
2683 /* Add in the full size of the frag converted to instruction slots. */
2684 index += 3 * (first_frag->fr_fix >> 4);
2685 /* Subtract away the initial part before first_addr. */
2686 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2687 + ((first_addr & 0x3) - (start_addr & 0x3)));
2689 /* Move to the beginning of the next frag. */
2690 first_frag = first_frag->fr_next;
2691 first_addr = (unsigned long) &first_frag->fr_literal;
2694 /* Add in the used part of the last frag. */
2695 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2696 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2700 /* Optimize unwind record directives. */
2702 static unw_rec_list *
2703 optimize_unw_records (list)
2709 /* If the only unwind record is ".prologue" or ".prologue" followed
2710 by ".body", then we can optimize the unwind directives away. */
2711 if (list->r.type == prologue
2712 && (list->next->r.type == endp
2713 || (list->next->r.type == body && list->next->next->r.type == endp)))
2719 /* Given a complete record list, process any records which have
2720 unresolved fields, (ie length counts for a prologue). After
2721 this has been run, all necessary information should be available
2722 within each record to generate an image. */
2725 fixup_unw_records (list, before_relax)
2729 unw_rec_list *ptr, *region = 0;
2730 unsigned long first_addr = 0, rlen = 0, t;
2731 fragS *first_frag = 0;
2733 for (ptr = list; ptr; ptr = ptr->next)
2735 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2736 as_bad (" Insn slot not set in unwind record.");
2737 t = slot_index (ptr->slot_number, ptr->slot_frag,
2738 first_addr, first_frag, before_relax);
2739 switch (ptr->r.type)
2747 unsigned long last_addr = 0;
2748 fragS *last_frag = NULL;
2750 first_addr = ptr->slot_number;
2751 first_frag = ptr->slot_frag;
2752 /* Find either the next body/prologue start, or the end of
2753 the function, and determine the size of the region. */
2754 for (last = ptr->next; last != NULL; last = last->next)
2755 if (last->r.type == prologue || last->r.type == prologue_gr
2756 || last->r.type == body || last->r.type == endp)
2758 last_addr = last->slot_number;
2759 last_frag = last->slot_frag;
2762 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2764 rlen = ptr->r.record.r.rlen = size;
2765 if (ptr->r.type == body)
2766 /* End of region. */
2773 ptr->r.record.b.t = rlen - 1 - t;
2784 case priunat_when_gr:
2785 case priunat_when_mem:
2789 ptr->r.record.p.t = t;
2797 case spill_psprel_p:
2798 ptr->r.record.x.t = t;
2804 as_bad ("frgr_mem record before region record!\n");
2807 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2808 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2809 set_imask (region, ptr->r.record.p.frmask, t, 1);
2810 set_imask (region, ptr->r.record.p.grmask, t, 2);
2815 as_bad ("fr_mem record before region record!\n");
2818 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2819 set_imask (region, ptr->r.record.p.rmask, t, 1);
2824 as_bad ("gr_mem record before region record!\n");
2827 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2828 set_imask (region, ptr->r.record.p.rmask, t, 2);
2833 as_bad ("br_mem record before region record!\n");
2836 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2837 set_imask (region, ptr->r.record.p.brmask, t, 3);
2843 as_bad ("gr_gr record before region record!\n");
2846 set_imask (region, ptr->r.record.p.grmask, t, 2);
2851 as_bad ("br_gr record before region record!\n");
2854 set_imask (region, ptr->r.record.p.brmask, t, 3);
2863 /* Estimate the size of a frag before relaxing. We only have one type of frag
2864 to handle here, which is the unwind info frag. */
2867 ia64_estimate_size_before_relax (fragS *frag,
2868 asection *segtype ATTRIBUTE_UNUSED)
2873 /* ??? This code is identical to the first part of ia64_convert_frag. */
2874 list = (unw_rec_list *) frag->fr_opcode;
2875 fixup_unw_records (list, 0);
2877 len = calc_record_size (list);
2878 /* pad to pointer-size boundary. */
2879 pad = len % md.pointer_size;
2881 len += md.pointer_size - pad;
2882 /* Add 8 for the header + a pointer for the personality offset. */
2883 size = len + 8 + md.pointer_size;
2885 /* fr_var carries the max_chars that we created the fragment with.
2886 We must, of course, have allocated enough memory earlier. */
2887 assert (frag->fr_var >= size);
2889 return frag->fr_fix + size;
2892 /* This function converts a rs_machine_dependent variant frag into a
2893 normal fill frag with the unwind image from the the record list. */
2895 ia64_convert_frag (fragS *frag)
2901 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2902 list = (unw_rec_list *) frag->fr_opcode;
2903 fixup_unw_records (list, 0);
2905 len = calc_record_size (list);
2906 /* pad to pointer-size boundary. */
2907 pad = len % md.pointer_size;
2909 len += md.pointer_size - pad;
2910 /* Add 8 for the header + a pointer for the personality offset. */
2911 size = len + 8 + md.pointer_size;
2913 /* fr_var carries the max_chars that we created the fragment with.
2914 We must, of course, have allocated enough memory earlier. */
2915 assert (frag->fr_var >= size);
2917 /* Initialize the header area. fr_offset is initialized with
2918 unwind.personality_routine. */
2919 if (frag->fr_offset)
2921 if (md.flags & EF_IA_64_ABI64)
2922 flag_value = (bfd_vma) 3 << 32;
2924 /* 32-bit unwind info block. */
2925 flag_value = (bfd_vma) 0x1003 << 32;
2930 md_number_to_chars (frag->fr_literal,
2931 (((bfd_vma) 1 << 48) /* Version. */
2932 | flag_value /* U & E handler flags. */
2933 | (len / md.pointer_size)), /* Length. */
2936 /* Skip the header. */
2937 vbyte_mem_ptr = frag->fr_literal + 8;
2938 process_unw_records (list, output_vbyte_mem);
2940 /* Fill the padding bytes with zeros. */
2942 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2943 md.pointer_size - pad);
2945 frag->fr_fix += size;
2946 frag->fr_type = rs_fill;
2948 frag->fr_offset = 0;
2952 convert_expr_to_ab_reg (e, ab, regp)
2959 if (e->X_op != O_register)
2962 reg = e->X_add_number;
2963 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2966 *regp = reg - REG_GR;
2968 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2969 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2972 *regp = reg - REG_FR;
2974 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2977 *regp = reg - REG_BR;
2984 case REG_PR: *regp = 0; break;
2985 case REG_PSP: *regp = 1; break;
2986 case REG_PRIUNAT: *regp = 2; break;
2987 case REG_BR + 0: *regp = 3; break;
2988 case REG_AR + AR_BSP: *regp = 4; break;
2989 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2990 case REG_AR + AR_RNAT: *regp = 6; break;
2991 case REG_AR + AR_UNAT: *regp = 7; break;
2992 case REG_AR + AR_FPSR: *regp = 8; break;
2993 case REG_AR + AR_PFS: *regp = 9; break;
2994 case REG_AR + AR_LC: *regp = 10; break;
3004 convert_expr_to_xy_reg (e, xy, regp)
3011 if (e->X_op != O_register)
3014 reg = e->X_add_number;
3016 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3019 *regp = reg - REG_GR;
3021 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3024 *regp = reg - REG_FR;
3026 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3029 *regp = reg - REG_BR;
3039 /* The current frag is an alignment frag. */
3040 align_frag = frag_now;
3041 s_align_bytes (arg);
3046 int dummy ATTRIBUTE_UNUSED;
3051 radix = *input_line_pointer++;
3053 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3055 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3056 ignore_rest_of_line ();
3061 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3063 dot_special_section (which)
3066 set_section ((char *) special_section_name[which]);
3070 add_unwind_entry (ptr)
3074 unwind.tail->next = ptr;
3079 /* The current entry can in fact be a chain of unwind entries. */
3080 if (unwind.current_entry == NULL)
3081 unwind.current_entry = ptr;
3086 int dummy ATTRIBUTE_UNUSED;
3092 if (e.X_op != O_constant)
3093 as_bad ("Operand to .fframe must be a constant");
3095 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3100 int dummy ATTRIBUTE_UNUSED;
3106 reg = e.X_add_number - REG_GR;
3107 if (e.X_op == O_register && reg < 128)
3109 add_unwind_entry (output_mem_stack_v ());
3110 if (! (unwind.prologue_mask & 2))
3111 add_unwind_entry (output_psp_gr (reg));
3114 as_bad ("First operand to .vframe must be a general register");
3118 dot_vframesp (dummy)
3119 int dummy ATTRIBUTE_UNUSED;
3124 if (e.X_op == O_constant)
3126 add_unwind_entry (output_mem_stack_v ());
3127 add_unwind_entry (output_psp_sprel (e.X_add_number));
3130 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3134 dot_vframepsp (dummy)
3135 int dummy ATTRIBUTE_UNUSED;
3140 if (e.X_op == O_constant)
3142 add_unwind_entry (output_mem_stack_v ());
3143 add_unwind_entry (output_psp_sprel (e.X_add_number));
3146 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3151 int dummy ATTRIBUTE_UNUSED;
3157 sep = parse_operand (&e1);
3159 as_bad ("No second operand to .save");
3160 sep = parse_operand (&e2);
3162 reg1 = e1.X_add_number;
3163 reg2 = e2.X_add_number - REG_GR;
3165 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3166 if (e1.X_op == O_register)
3168 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3172 case REG_AR + AR_BSP:
3173 add_unwind_entry (output_bsp_when ());
3174 add_unwind_entry (output_bsp_gr (reg2));
3176 case REG_AR + AR_BSPSTORE:
3177 add_unwind_entry (output_bspstore_when ());
3178 add_unwind_entry (output_bspstore_gr (reg2));
3180 case REG_AR + AR_RNAT:
3181 add_unwind_entry (output_rnat_when ());
3182 add_unwind_entry (output_rnat_gr (reg2));
3184 case REG_AR + AR_UNAT:
3185 add_unwind_entry (output_unat_when ());
3186 add_unwind_entry (output_unat_gr (reg2));
3188 case REG_AR + AR_FPSR:
3189 add_unwind_entry (output_fpsr_when ());
3190 add_unwind_entry (output_fpsr_gr (reg2));
3192 case REG_AR + AR_PFS:
3193 add_unwind_entry (output_pfs_when ());
3194 if (! (unwind.prologue_mask & 4))
3195 add_unwind_entry (output_pfs_gr (reg2));
3197 case REG_AR + AR_LC:
3198 add_unwind_entry (output_lc_when ());
3199 add_unwind_entry (output_lc_gr (reg2));
3202 add_unwind_entry (output_rp_when ());
3203 if (! (unwind.prologue_mask & 8))
3204 add_unwind_entry (output_rp_gr (reg2));
3207 add_unwind_entry (output_preds_when ());
3208 if (! (unwind.prologue_mask & 1))
3209 add_unwind_entry (output_preds_gr (reg2));
3212 add_unwind_entry (output_priunat_when_gr ());
3213 add_unwind_entry (output_priunat_gr (reg2));
3216 as_bad ("First operand not a valid register");
3220 as_bad (" Second operand not a valid register");
3223 as_bad ("First operand not a register");
3228 int dummy ATTRIBUTE_UNUSED;
3231 unsigned long ecount; /* # of _additional_ regions to pop */
3234 sep = parse_operand (&e1);
3235 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3237 as_bad ("First operand to .restore must be stack pointer (sp)");
3243 parse_operand (&e2);
3244 if (e2.X_op != O_constant || e2.X_add_number < 0)
3246 as_bad ("Second operand to .restore must be a constant >= 0");
3249 ecount = e2.X_add_number;
3252 ecount = unwind.prologue_count - 1;
3254 if (ecount >= unwind.prologue_count)
3256 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3257 ecount + 1, unwind.prologue_count);
3261 add_unwind_entry (output_epilogue (ecount));
3263 if (ecount < unwind.prologue_count)
3264 unwind.prologue_count -= ecount + 1;
3266 unwind.prologue_count = 0;
3270 dot_restorereg (dummy)
3271 int dummy ATTRIBUTE_UNUSED;
3273 unsigned int ab, reg;
3278 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3280 as_bad ("First operand to .restorereg must be a preserved register");
3283 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3287 dot_restorereg_p (dummy)
3288 int dummy ATTRIBUTE_UNUSED;
3290 unsigned int qp, ab, reg;
3294 sep = parse_operand (&e1);
3297 as_bad ("No second operand to .restorereg.p");
3301 parse_operand (&e2);
3303 qp = e1.X_add_number - REG_P;
3304 if (e1.X_op != O_register || qp > 63)
3306 as_bad ("First operand to .restorereg.p must be a predicate");
3310 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3312 as_bad ("Second operand to .restorereg.p must be a preserved register");
3315 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3319 generate_unwind_image (text_name)
3320 const char *text_name;
3325 /* Mark the end of the unwind info, so that we can compute the size of the
3326 last unwind region. */
3327 add_unwind_entry (output_endp ());
3329 /* Force out pending instructions, to make sure all unwind records have
3330 a valid slot_number field. */
3331 ia64_flush_insns ();
3333 /* Generate the unwind record. */
3334 list = optimize_unw_records (unwind.list);
3335 fixup_unw_records (list, 1);
3336 size = calc_record_size (list);
3338 if (size > 0 || unwind.force_unwind_entry)
3340 unwind.force_unwind_entry = 0;
3341 /* pad to pointer-size boundary. */
3342 pad = size % md.pointer_size;
3344 size += md.pointer_size - pad;
3345 /* Add 8 for the header + a pointer for the personality
3347 size += 8 + md.pointer_size;
3350 /* If there are unwind records, switch sections, and output the info. */
3355 bfd_reloc_code_real_type reloc;
3357 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name);
3358 set_section (sec_name);
3359 bfd_set_section_flags (stdoutput, now_seg,
3360 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3362 /* Make sure the section has 4 byte alignment for ILP32 and
3363 8 byte alignment for LP64. */
3364 frag_align (md.pointer_size_shift, 0, 0);
3365 record_alignment (now_seg, md.pointer_size_shift);
3367 /* Set expression which points to start of unwind descriptor area. */
3368 unwind.info = expr_build_dot ();
3370 frag_var (rs_machine_dependent, size, size, 0, 0,
3371 (offsetT) unwind.personality_routine, (char *) list);
3373 /* Add the personality address to the image. */
3374 if (unwind.personality_routine != 0)
3376 exp.X_op = O_symbol;
3377 exp.X_add_symbol = unwind.personality_routine;
3378 exp.X_add_number = 0;
3380 if (md.flags & EF_IA_64_BE)
3382 if (md.flags & EF_IA_64_ABI64)
3383 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3385 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3389 if (md.flags & EF_IA_64_ABI64)
3390 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3392 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3395 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3396 md.pointer_size, &exp, 0, reloc);
3397 unwind.personality_routine = 0;
3401 free_saved_prologue_counts ();
3402 unwind.list = unwind.tail = unwind.current_entry = NULL;
3406 dot_handlerdata (dummy)
3407 int dummy ATTRIBUTE_UNUSED;
3409 const char *text_name = segment_name (now_seg);
3411 /* If text section name starts with ".text" (which it should),
3412 strip this prefix off. */
3413 if (strcmp (text_name, ".text") == 0)
3416 unwind.force_unwind_entry = 1;
3418 /* Remember which segment we're in so we can switch back after .endp */
3419 unwind.saved_text_seg = now_seg;
3420 unwind.saved_text_subseg = now_subseg;
3422 /* Generate unwind info into unwind-info section and then leave that
3423 section as the currently active one so dataXX directives go into
3424 the language specific data area of the unwind info block. */
3425 generate_unwind_image (text_name);
3426 demand_empty_rest_of_line ();
3430 dot_unwentry (dummy)
3431 int dummy ATTRIBUTE_UNUSED;
3433 unwind.force_unwind_entry = 1;
3434 demand_empty_rest_of_line ();
3439 int dummy ATTRIBUTE_UNUSED;
3445 reg = e.X_add_number - REG_BR;
3446 if (e.X_op == O_register && reg < 8)
3447 add_unwind_entry (output_rp_br (reg));
3449 as_bad ("First operand not a valid branch register");
3453 dot_savemem (psprel)
3460 sep = parse_operand (&e1);
3462 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3463 sep = parse_operand (&e2);
3465 reg1 = e1.X_add_number;
3466 val = e2.X_add_number;
3468 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3469 if (e1.X_op == O_register)
3471 if (e2.X_op == O_constant)
3475 case REG_AR + AR_BSP:
3476 add_unwind_entry (output_bsp_when ());
3477 add_unwind_entry ((psprel
3479 : output_bsp_sprel) (val));
3481 case REG_AR + AR_BSPSTORE:
3482 add_unwind_entry (output_bspstore_when ());
3483 add_unwind_entry ((psprel
3484 ? output_bspstore_psprel
3485 : output_bspstore_sprel) (val));
3487 case REG_AR + AR_RNAT:
3488 add_unwind_entry (output_rnat_when ());
3489 add_unwind_entry ((psprel
3490 ? output_rnat_psprel
3491 : output_rnat_sprel) (val));
3493 case REG_AR + AR_UNAT:
3494 add_unwind_entry (output_unat_when ());
3495 add_unwind_entry ((psprel
3496 ? output_unat_psprel
3497 : output_unat_sprel) (val));
3499 case REG_AR + AR_FPSR:
3500 add_unwind_entry (output_fpsr_when ());
3501 add_unwind_entry ((psprel
3502 ? output_fpsr_psprel
3503 : output_fpsr_sprel) (val));
3505 case REG_AR + AR_PFS:
3506 add_unwind_entry (output_pfs_when ());
3507 add_unwind_entry ((psprel
3509 : output_pfs_sprel) (val));
3511 case REG_AR + AR_LC:
3512 add_unwind_entry (output_lc_when ());
3513 add_unwind_entry ((psprel
3515 : output_lc_sprel) (val));
3518 add_unwind_entry (output_rp_when ());
3519 add_unwind_entry ((psprel
3521 : output_rp_sprel) (val));
3524 add_unwind_entry (output_preds_when ());
3525 add_unwind_entry ((psprel
3526 ? output_preds_psprel
3527 : output_preds_sprel) (val));
3530 add_unwind_entry (output_priunat_when_mem ());
3531 add_unwind_entry ((psprel
3532 ? output_priunat_psprel
3533 : output_priunat_sprel) (val));
3536 as_bad ("First operand not a valid register");
3540 as_bad (" Second operand not a valid constant");
3543 as_bad ("First operand not a register");
3548 int dummy ATTRIBUTE_UNUSED;
3552 sep = parse_operand (&e1);
3554 parse_operand (&e2);
3556 if (e1.X_op != O_constant)
3557 as_bad ("First operand to .save.g must be a constant.");
3560 int grmask = e1.X_add_number;
3562 add_unwind_entry (output_gr_mem (grmask));
3565 int reg = e2.X_add_number - REG_GR;
3566 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3567 add_unwind_entry (output_gr_gr (grmask, reg));
3569 as_bad ("Second operand is an invalid register.");
3576 int dummy ATTRIBUTE_UNUSED;
3580 sep = parse_operand (&e1);
3582 if (e1.X_op != O_constant)
3583 as_bad ("Operand to .save.f must be a constant.");
3585 add_unwind_entry (output_fr_mem (e1.X_add_number));
3590 int dummy ATTRIBUTE_UNUSED;
3597 sep = parse_operand (&e1);
3598 if (e1.X_op != O_constant)
3600 as_bad ("First operand to .save.b must be a constant.");
3603 brmask = e1.X_add_number;
3607 sep = parse_operand (&e2);
3608 reg = e2.X_add_number - REG_GR;
3609 if (e2.X_op != O_register || reg > 127)
3611 as_bad ("Second operand to .save.b must be a general register.");
3614 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3617 add_unwind_entry (output_br_mem (brmask));
3619 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3620 ignore_rest_of_line ();
3625 int dummy ATTRIBUTE_UNUSED;
3629 sep = parse_operand (&e1);
3631 parse_operand (&e2);
3633 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3634 as_bad ("Both operands of .save.gf must be constants.");
3637 int grmask = e1.X_add_number;
3638 int frmask = e2.X_add_number;
3639 add_unwind_entry (output_frgr_mem (grmask, frmask));
3645 int dummy ATTRIBUTE_UNUSED;
3650 sep = parse_operand (&e);
3651 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3652 ignore_rest_of_line ();
3654 if (e.X_op != O_constant)
3655 as_bad ("Operand to .spill must be a constant");
3657 add_unwind_entry (output_spill_base (e.X_add_number));
3661 dot_spillreg (dummy)
3662 int dummy ATTRIBUTE_UNUSED;
3664 int sep, ab, xy, reg, treg;
3667 sep = parse_operand (&e1);
3670 as_bad ("No second operand to .spillreg");
3674 parse_operand (&e2);
3676 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3678 as_bad ("First operand to .spillreg must be a preserved register");
3682 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3684 as_bad ("Second operand to .spillreg must be a register");
3688 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3692 dot_spillmem (psprel)
3698 sep = parse_operand (&e1);
3701 as_bad ("Second operand missing");
3705 parse_operand (&e2);
3707 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3709 as_bad ("First operand to .spill%s must be a preserved register",
3710 psprel ? "psp" : "sp");
3714 if (e2.X_op != O_constant)
3716 as_bad ("Second operand to .spill%s must be a constant",
3717 psprel ? "psp" : "sp");
3722 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3724 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3728 dot_spillreg_p (dummy)
3729 int dummy ATTRIBUTE_UNUSED;
3731 int sep, ab, xy, reg, treg;
3732 expressionS e1, e2, e3;
3735 sep = parse_operand (&e1);
3738 as_bad ("No second and third operand to .spillreg.p");
3742 sep = parse_operand (&e2);
3745 as_bad ("No third operand to .spillreg.p");
3749 parse_operand (&e3);
3751 qp = e1.X_add_number - REG_P;
3753 if (e1.X_op != O_register || qp > 63)
3755 as_bad ("First operand to .spillreg.p must be a predicate");
3759 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3761 as_bad ("Second operand to .spillreg.p must be a preserved register");
3765 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3767 as_bad ("Third operand to .spillreg.p must be a register");
3771 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3775 dot_spillmem_p (psprel)
3778 expressionS e1, e2, e3;
3782 sep = parse_operand (&e1);
3785 as_bad ("Second operand missing");
3789 parse_operand (&e2);
3792 as_bad ("Second operand missing");
3796 parse_operand (&e3);
3798 qp = e1.X_add_number - REG_P;
3799 if (e1.X_op != O_register || qp > 63)
3801 as_bad ("First operand to .spill%s_p must be a predicate",
3802 psprel ? "psp" : "sp");
3806 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3808 as_bad ("Second operand to .spill%s_p must be a preserved register",
3809 psprel ? "psp" : "sp");
3813 if (e3.X_op != O_constant)
3815 as_bad ("Third operand to .spill%s_p must be a constant",
3816 psprel ? "psp" : "sp");
3821 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3823 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3827 get_saved_prologue_count (lbl)
3830 label_prologue_count *lpc = unwind.saved_prologue_counts;
3832 while (lpc != NULL && lpc->label_number != lbl)
3836 return lpc->prologue_count;
3838 as_bad ("Missing .label_state %ld", lbl);
3843 save_prologue_count (lbl, count)
3847 label_prologue_count *lpc = unwind.saved_prologue_counts;
3849 while (lpc != NULL && lpc->label_number != lbl)
3853 lpc->prologue_count = count;
3856 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3858 new_lpc->next = unwind.saved_prologue_counts;
3859 new_lpc->label_number = lbl;
3860 new_lpc->prologue_count = count;
3861 unwind.saved_prologue_counts = new_lpc;
3866 free_saved_prologue_counts ()
3868 label_prologue_count *lpc = unwind.saved_prologue_counts;
3869 label_prologue_count *next;
3878 unwind.saved_prologue_counts = NULL;
3882 dot_label_state (dummy)
3883 int dummy ATTRIBUTE_UNUSED;
3888 if (e.X_op != O_constant)
3890 as_bad ("Operand to .label_state must be a constant");
3893 add_unwind_entry (output_label_state (e.X_add_number));
3894 save_prologue_count (e.X_add_number, unwind.prologue_count);
3898 dot_copy_state (dummy)
3899 int dummy ATTRIBUTE_UNUSED;
3904 if (e.X_op != O_constant)
3906 as_bad ("Operand to .copy_state must be a constant");
3909 add_unwind_entry (output_copy_state (e.X_add_number));
3910 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3915 int dummy ATTRIBUTE_UNUSED;
3920 sep = parse_operand (&e1);
3923 as_bad ("Second operand to .unwabi missing");
3926 sep = parse_operand (&e2);
3927 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3928 ignore_rest_of_line ();
3930 if (e1.X_op != O_constant)
3932 as_bad ("First operand to .unwabi must be a constant");
3936 if (e2.X_op != O_constant)
3938 as_bad ("Second operand to .unwabi must be a constant");
3942 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
3946 dot_personality (dummy)
3947 int dummy ATTRIBUTE_UNUSED;
3951 name = input_line_pointer;
3952 c = get_symbol_end ();
3953 p = input_line_pointer;
3954 unwind.personality_routine = symbol_find_or_make (name);
3955 unwind.force_unwind_entry = 1;
3958 demand_empty_rest_of_line ();
3963 int dummy ATTRIBUTE_UNUSED;
3968 unwind.proc_start = expr_build_dot ();
3969 /* Parse names of main and alternate entry points and mark them as
3970 function symbols: */
3974 name = input_line_pointer;
3975 c = get_symbol_end ();
3976 p = input_line_pointer;
3977 sym = symbol_find_or_make (name);
3978 if (unwind.proc_start == 0)
3980 unwind.proc_start = sym;
3982 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3985 if (*input_line_pointer != ',')
3987 ++input_line_pointer;
3989 demand_empty_rest_of_line ();
3992 unwind.prologue_count = 0;
3993 unwind.list = unwind.tail = unwind.current_entry = NULL;
3994 unwind.personality_routine = 0;
3999 int dummy ATTRIBUTE_UNUSED;
4001 unwind.prologue = 0;
4002 unwind.prologue_mask = 0;
4004 add_unwind_entry (output_body ());
4005 demand_empty_rest_of_line ();
4009 dot_prologue (dummy)
4010 int dummy ATTRIBUTE_UNUSED;
4013 int mask = 0, grsave = 0;
4015 if (!is_it_end_of_statement ())
4018 sep = parse_operand (&e1);
4020 as_bad ("No second operand to .prologue");
4021 sep = parse_operand (&e2);
4022 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4023 ignore_rest_of_line ();
4025 if (e1.X_op == O_constant)
4027 mask = e1.X_add_number;
4029 if (e2.X_op == O_constant)
4030 grsave = e2.X_add_number;
4031 else if (e2.X_op == O_register
4032 && (grsave = e2.X_add_number - REG_GR) < 128)
4035 as_bad ("Second operand not a constant or general register");
4037 add_unwind_entry (output_prologue_gr (mask, grsave));
4040 as_bad ("First operand not a constant");
4043 add_unwind_entry (output_prologue ());
4045 unwind.prologue = 1;
4046 unwind.prologue_mask = mask;
4047 ++unwind.prologue_count;
4052 int dummy ATTRIBUTE_UNUSED;
4056 int bytes_per_address;
4059 subsegT saved_subseg;
4060 const char *sec_name, *text_name;
4064 if (unwind.saved_text_seg)
4066 saved_seg = unwind.saved_text_seg;
4067 saved_subseg = unwind.saved_text_subseg;
4068 unwind.saved_text_seg = NULL;
4072 saved_seg = now_seg;
4073 saved_subseg = now_subseg;
4077 Use a slightly ugly scheme to derive the unwind section names from
4078 the text section name:
4080 text sect. unwind table sect.
4081 name: name: comments:
4082 ---------- ----------------- --------------------------------
4084 .text.foo .IA_64.unwind.text.foo
4085 .foo .IA_64.unwind.foo
4087 .gnu.linkonce.ia64unw.foo
4088 _info .IA_64.unwind_info gas issues error message (ditto)
4089 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4091 This mapping is done so that:
4093 (a) An object file with unwind info only in .text will use
4094 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4095 This follows the letter of the ABI and also ensures backwards
4096 compatibility with older toolchains.
4098 (b) An object file with unwind info in multiple text sections
4099 will use separate unwind sections for each text section.
4100 This allows us to properly set the "sh_info" and "sh_link"
4101 fields in SHT_IA_64_UNWIND as required by the ABI and also
4102 lets GNU ld support programs with multiple segments
4103 containing unwind info (as might be the case for certain
4104 embedded applications).
4106 (c) An error is issued if there would be a name clash.
4108 text_name = segment_name (saved_seg);
4109 if (strncmp (text_name, "_info", 5) == 0)
4111 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4113 ignore_rest_of_line ();
4116 if (strcmp (text_name, ".text") == 0)
4119 insn_group_break (1, 0, 0);
4121 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4123 generate_unwind_image (text_name);
4125 if (unwind.info || unwind.force_unwind_entry)
4127 subseg_set (md.last_text_seg, 0);
4128 unwind.proc_end = expr_build_dot ();
4130 make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name);
4131 set_section ((char *) sec_name);
4132 bfd_set_section_flags (stdoutput, now_seg,
4133 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
4135 /* Make sure that section has 4 byte alignment for ILP32 and
4136 8 byte alignment for LP64. */
4137 record_alignment (now_seg, md.pointer_size_shift);
4139 /* Need space for 3 pointers for procedure start, procedure end,
4141 ptr = frag_more (3 * md.pointer_size);
4142 where = frag_now_fix () - (3 * md.pointer_size);
4143 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4145 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4146 e.X_op = O_pseudo_fixup;
4147 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4149 e.X_add_symbol = unwind.proc_start;
4150 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4152 e.X_op = O_pseudo_fixup;
4153 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4155 e.X_add_symbol = unwind.proc_end;
4156 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4157 bytes_per_address, &e);
4161 e.X_op = O_pseudo_fixup;
4162 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4164 e.X_add_symbol = unwind.info;
4165 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4166 bytes_per_address, &e);
4169 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4173 subseg_set (saved_seg, saved_subseg);
4175 /* Parse names of main and alternate entry points and set symbol sizes. */
4179 name = input_line_pointer;
4180 c = get_symbol_end ();
4181 p = input_line_pointer;
4182 sym = symbol_find (name);
4183 if (sym && unwind.proc_start
4184 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4185 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4187 fragS *fr = symbol_get_frag (unwind.proc_start);
4188 fragS *frag = symbol_get_frag (sym);
4190 /* Check whether the function label is at or beyond last
4192 while (fr && fr != frag)
4196 if (frag == frag_now && SEG_NORMAL (now_seg))
4197 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4200 symbol_get_obj (sym)->size =
4201 (expressionS *) xmalloc (sizeof (expressionS));
4202 symbol_get_obj (sym)->size->X_op = O_subtract;
4203 symbol_get_obj (sym)->size->X_add_symbol
4204 = symbol_new (FAKE_LABEL_NAME, now_seg,
4205 frag_now_fix (), frag_now);
4206 symbol_get_obj (sym)->size->X_op_symbol = sym;
4207 symbol_get_obj (sym)->size->X_add_number = 0;
4213 if (*input_line_pointer != ',')
4215 ++input_line_pointer;
4217 demand_empty_rest_of_line ();
4218 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4222 dot_template (template)
4225 CURR_SLOT.user_template = template;
4230 int dummy ATTRIBUTE_UNUSED;
4232 int ins, locs, outs, rots;
4234 if (is_it_end_of_statement ())
4235 ins = locs = outs = rots = 0;
4238 ins = get_absolute_expression ();
4239 if (*input_line_pointer++ != ',')
4241 locs = get_absolute_expression ();
4242 if (*input_line_pointer++ != ',')
4244 outs = get_absolute_expression ();
4245 if (*input_line_pointer++ != ',')
4247 rots = get_absolute_expression ();
4249 set_regstack (ins, locs, outs, rots);
4253 as_bad ("Comma expected");
4254 ignore_rest_of_line ();
4261 unsigned num_regs, num_alloced = 0;
4262 struct dynreg **drpp, *dr;
4263 int ch, base_reg = 0;
4269 case DYNREG_GR: base_reg = REG_GR + 32; break;
4270 case DYNREG_FR: base_reg = REG_FR + 32; break;
4271 case DYNREG_PR: base_reg = REG_P + 16; break;
4275 /* First, remove existing names from hash table. */
4276 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4278 hash_delete (md.dynreg_hash, dr->name);
4282 drpp = &md.dynreg[type];
4285 start = input_line_pointer;
4286 ch = get_symbol_end ();
4287 *input_line_pointer = ch;
4288 len = (input_line_pointer - start);
4291 if (*input_line_pointer != '[')
4293 as_bad ("Expected '['");
4296 ++input_line_pointer; /* skip '[' */
4298 num_regs = get_absolute_expression ();
4300 if (*input_line_pointer++ != ']')
4302 as_bad ("Expected ']'");
4307 num_alloced += num_regs;
4311 if (num_alloced > md.rot.num_regs)
4313 as_bad ("Used more than the declared %d rotating registers",
4319 if (num_alloced > 96)
4321 as_bad ("Used more than the available 96 rotating registers");
4326 if (num_alloced > 48)
4328 as_bad ("Used more than the available 48 rotating registers");
4337 name = obstack_alloc (¬es, len + 1);
4338 memcpy (name, start, len);
4343 *drpp = obstack_alloc (¬es, sizeof (*dr));
4344 memset (*drpp, 0, sizeof (*dr));
4349 dr->num_regs = num_regs;
4350 dr->base = base_reg;
4352 base_reg += num_regs;
4354 if (hash_insert (md.dynreg_hash, name, dr))
4356 as_bad ("Attempt to redefine register set `%s'", name);
4360 if (*input_line_pointer != ',')
4362 ++input_line_pointer; /* skip comma */
4365 demand_empty_rest_of_line ();
4369 ignore_rest_of_line ();
4373 dot_byteorder (byteorder)
4376 segment_info_type *seginfo = seg_info (now_seg);
4378 if (byteorder == -1)
4380 if (seginfo->tc_segment_info_data.endian == 0)
4381 seginfo->tc_segment_info_data.endian
4382 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4383 byteorder = seginfo->tc_segment_info_data.endian == 1;
4386 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4388 if (target_big_endian != byteorder)
4390 target_big_endian = byteorder;
4391 if (target_big_endian)
4393 ia64_number_to_chars = number_to_chars_bigendian;
4394 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4398 ia64_number_to_chars = number_to_chars_littleendian;
4399 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4406 int dummy ATTRIBUTE_UNUSED;
4413 option = input_line_pointer;
4414 ch = get_symbol_end ();
4415 if (strcmp (option, "lsb") == 0)
4416 md.flags &= ~EF_IA_64_BE;
4417 else if (strcmp (option, "msb") == 0)
4418 md.flags |= EF_IA_64_BE;
4419 else if (strcmp (option, "abi32") == 0)
4420 md.flags &= ~EF_IA_64_ABI64;
4421 else if (strcmp (option, "abi64") == 0)
4422 md.flags |= EF_IA_64_ABI64;
4424 as_bad ("Unknown psr option `%s'", option);
4425 *input_line_pointer = ch;
4428 if (*input_line_pointer != ',')
4431 ++input_line_pointer;
4434 demand_empty_rest_of_line ();
4439 int dummy ATTRIBUTE_UNUSED;
4441 new_logical_line (0, get_absolute_expression ());
4442 demand_empty_rest_of_line ();
4446 parse_section_name ()
4452 if (*input_line_pointer != '"')
4454 as_bad ("Missing section name");
4455 ignore_rest_of_line ();
4458 name = demand_copy_C_string (&len);
4461 ignore_rest_of_line ();
4465 if (*input_line_pointer != ',')
4467 as_bad ("Comma expected after section name");
4468 ignore_rest_of_line ();
4471 ++input_line_pointer; /* skip comma */
4479 char *name = parse_section_name ();
4483 md.keep_pending_output = 1;
4486 obj_elf_previous (0);
4487 md.keep_pending_output = 0;
4490 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4493 stmt_float_cons (kind)
4514 ia64_do_align (alignment);
4522 int saved_auto_align = md.auto_align;
4526 md.auto_align = saved_auto_align;
4530 dot_xfloat_cons (kind)
4533 char *name = parse_section_name ();
4537 md.keep_pending_output = 1;
4539 stmt_float_cons (kind);
4540 obj_elf_previous (0);
4541 md.keep_pending_output = 0;
4545 dot_xstringer (zero)
4548 char *name = parse_section_name ();
4552 md.keep_pending_output = 1;
4555 obj_elf_previous (0);
4556 md.keep_pending_output = 0;
4563 int saved_auto_align = md.auto_align;
4564 char *name = parse_section_name ();
4568 md.keep_pending_output = 1;
4572 md.auto_align = saved_auto_align;
4573 obj_elf_previous (0);
4574 md.keep_pending_output = 0;
4578 dot_xfloat_cons_ua (kind)
4581 int saved_auto_align = md.auto_align;
4582 char *name = parse_section_name ();
4586 md.keep_pending_output = 1;
4589 stmt_float_cons (kind);
4590 md.auto_align = saved_auto_align;
4591 obj_elf_previous (0);
4592 md.keep_pending_output = 0;
4595 /* .reg.val <regname>,value */
4599 int dummy ATTRIBUTE_UNUSED;
4604 if (reg.X_op != O_register)
4606 as_bad (_("Register name expected"));
4607 ignore_rest_of_line ();
4609 else if (*input_line_pointer++ != ',')
4611 as_bad (_("Comma expected"));
4612 ignore_rest_of_line ();
4616 valueT value = get_absolute_expression ();
4617 int regno = reg.X_add_number;
4618 if (regno < REG_GR || regno > REG_GR + 128)
4619 as_warn (_("Register value annotation ignored"));
4622 gr_values[regno - REG_GR].known = 1;
4623 gr_values[regno - REG_GR].value = value;
4624 gr_values[regno - REG_GR].path = md.path;
4627 demand_empty_rest_of_line ();
4630 /* select dv checking mode
4635 A stop is inserted when changing modes
4642 if (md.manual_bundling)
4643 as_warn (_("Directive invalid within a bundle"));
4645 if (type == 'E' || type == 'A')
4646 md.mode_explicitly_set = 0;
4648 md.mode_explicitly_set = 1;
4655 if (md.explicit_mode)
4656 insn_group_break (1, 0, 0);
4657 md.explicit_mode = 0;
4661 if (!md.explicit_mode)
4662 insn_group_break (1, 0, 0);
4663 md.explicit_mode = 1;
4667 if (md.explicit_mode != md.default_explicit_mode)
4668 insn_group_break (1, 0, 0);
4669 md.explicit_mode = md.default_explicit_mode;
4670 md.mode_explicitly_set = 0;
4681 for (regno = 0; regno < 64; regno++)
4683 if (mask & ((valueT) 1 << regno))
4685 fprintf (stderr, "%s p%d", comma, regno);
4692 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4693 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4694 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4695 .pred.safe_across_calls p1 [, p2 [,...]]
4704 int p1 = -1, p2 = -1;
4708 if (*input_line_pointer != '"')
4710 as_bad (_("Missing predicate relation type"));
4711 ignore_rest_of_line ();
4717 char *form = demand_copy_C_string (&len);
4718 if (strcmp (form, "mutex") == 0)
4720 else if (strcmp (form, "clear") == 0)
4722 else if (strcmp (form, "imply") == 0)
4726 as_bad (_("Unrecognized predicate relation type"));
4727 ignore_rest_of_line ();
4731 if (*input_line_pointer == ',')
4732 ++input_line_pointer;
4742 if (TOUPPER (*input_line_pointer) != 'P'
4743 || (regno = atoi (++input_line_pointer)) < 0
4746 as_bad (_("Predicate register expected"));
4747 ignore_rest_of_line ();
4750 while (ISDIGIT (*input_line_pointer))
4751 ++input_line_pointer;
4758 as_warn (_("Duplicate predicate register ignored"));
4761 /* See if it's a range. */
4762 if (*input_line_pointer == '-')
4765 ++input_line_pointer;
4767 if (TOUPPER (*input_line_pointer) != 'P'
4768 || (regno = atoi (++input_line_pointer)) < 0
4771 as_bad (_("Predicate register expected"));
4772 ignore_rest_of_line ();
4775 while (ISDIGIT (*input_line_pointer))
4776 ++input_line_pointer;
4780 as_bad (_("Bad register range"));
4781 ignore_rest_of_line ();
4792 if (*input_line_pointer != ',')
4794 ++input_line_pointer;
4803 clear_qp_mutex (mask);
4804 clear_qp_implies (mask, (valueT) 0);
4807 if (count != 2 || p1 == -1 || p2 == -1)
4808 as_bad (_("Predicate source and target required"));
4809 else if (p1 == 0 || p2 == 0)
4810 as_bad (_("Use of p0 is not valid in this context"));
4812 add_qp_imply (p1, p2);
4817 as_bad (_("At least two PR arguments expected"));
4822 as_bad (_("Use of p0 is not valid in this context"));
4825 add_qp_mutex (mask);
4828 /* note that we don't override any existing relations */
4831 as_bad (_("At least one PR argument expected"));
4836 fprintf (stderr, "Safe across calls: ");
4837 print_prmask (mask);
4838 fprintf (stderr, "\n");
4840 qp_safe_across_calls = mask;
4843 demand_empty_rest_of_line ();
4846 /* .entry label [, label [, ...]]
4847 Hint to DV code that the given labels are to be considered entry points.
4848 Otherwise, only global labels are considered entry points. */
4852 int dummy ATTRIBUTE_UNUSED;
4861 name = input_line_pointer;
4862 c = get_symbol_end ();
4863 symbolP = symbol_find_or_make (name);
4865 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4867 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4870 *input_line_pointer = c;
4872 c = *input_line_pointer;
4875 input_line_pointer++;
4877 if (*input_line_pointer == '\n')
4883 demand_empty_rest_of_line ();
4886 /* .mem.offset offset, base
4887 "base" is used to distinguish between offsets from a different base. */
4890 dot_mem_offset (dummy)
4891 int dummy ATTRIBUTE_UNUSED;
4893 md.mem_offset.hint = 1;
4894 md.mem_offset.offset = get_absolute_expression ();
4895 if (*input_line_pointer != ',')
4897 as_bad (_("Comma expected"));
4898 ignore_rest_of_line ();
4901 ++input_line_pointer;
4902 md.mem_offset.base = get_absolute_expression ();
4903 demand_empty_rest_of_line ();
4906 /* ia64-specific pseudo-ops: */
4907 const pseudo_typeS md_pseudo_table[] =
4909 { "radix", dot_radix, 0 },
4910 { "lcomm", s_lcomm_bytes, 1 },
4911 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4912 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4913 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4914 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4915 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4916 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4917 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4918 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4919 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4920 { "proc", dot_proc, 0 },
4921 { "body", dot_body, 0 },
4922 { "prologue", dot_prologue, 0 },
4923 { "endp", dot_endp, 0 },
4925 { "fframe", dot_fframe, 0 },
4926 { "vframe", dot_vframe, 0 },
4927 { "vframesp", dot_vframesp, 0 },
4928 { "vframepsp", dot_vframepsp, 0 },
4929 { "save", dot_save, 0 },
4930 { "restore", dot_restore, 0 },
4931 { "restorereg", dot_restorereg, 0 },
4932 { "restorereg.p", dot_restorereg_p, 0 },
4933 { "handlerdata", dot_handlerdata, 0 },
4934 { "unwentry", dot_unwentry, 0 },
4935 { "altrp", dot_altrp, 0 },
4936 { "savesp", dot_savemem, 0 },
4937 { "savepsp", dot_savemem, 1 },
4938 { "save.g", dot_saveg, 0 },
4939 { "save.f", dot_savef, 0 },
4940 { "save.b", dot_saveb, 0 },
4941 { "save.gf", dot_savegf, 0 },
4942 { "spill", dot_spill, 0 },
4943 { "spillreg", dot_spillreg, 0 },
4944 { "spillsp", dot_spillmem, 0 },
4945 { "spillpsp", dot_spillmem, 1 },
4946 { "spillreg.p", dot_spillreg_p, 0 },
4947 { "spillsp.p", dot_spillmem_p, 0 },
4948 { "spillpsp.p", dot_spillmem_p, 1 },
4949 { "label_state", dot_label_state, 0 },
4950 { "copy_state", dot_copy_state, 0 },
4951 { "unwabi", dot_unwabi, 0 },
4952 { "personality", dot_personality, 0 },
4954 { "estate", dot_estate, 0 },
4956 { "mii", dot_template, 0x0 },
4957 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
4958 { "mlx", dot_template, 0x2 },
4959 { "mmi", dot_template, 0x4 },
4960 { "mfi", dot_template, 0x6 },
4961 { "mmf", dot_template, 0x7 },
4962 { "mib", dot_template, 0x8 },
4963 { "mbb", dot_template, 0x9 },
4964 { "bbb", dot_template, 0xb },
4965 { "mmb", dot_template, 0xc },
4966 { "mfb", dot_template, 0xe },
4968 { "lb", dot_scope, 0 },
4969 { "le", dot_scope, 1 },
4971 { "align", dot_align, 0 },
4972 { "regstk", dot_regstk, 0 },
4973 { "rotr", dot_rot, DYNREG_GR },
4974 { "rotf", dot_rot, DYNREG_FR },
4975 { "rotp", dot_rot, DYNREG_PR },
4976 { "lsb", dot_byteorder, 0 },
4977 { "msb", dot_byteorder, 1 },
4978 { "psr", dot_psr, 0 },
4979 { "alias", dot_alias, 0 },
4980 { "secalias", dot_alias, 1 },
4981 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
4983 { "xdata1", dot_xdata, 1 },
4984 { "xdata2", dot_xdata, 2 },
4985 { "xdata4", dot_xdata, 4 },
4986 { "xdata8", dot_xdata, 8 },
4987 { "xreal4", dot_xfloat_cons, 'f' },
4988 { "xreal8", dot_xfloat_cons, 'd' },
4989 { "xreal10", dot_xfloat_cons, 'x' },
4990 { "xreal16", dot_xfloat_cons, 'X' },
4991 { "xstring", dot_xstringer, 0 },
4992 { "xstringz", dot_xstringer, 1 },
4994 /* unaligned versions: */
4995 { "xdata2.ua", dot_xdata_ua, 2 },
4996 { "xdata4.ua", dot_xdata_ua, 4 },
4997 { "xdata8.ua", dot_xdata_ua, 8 },
4998 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
4999 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5000 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5001 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5003 /* annotations/DV checking support */
5004 { "entry", dot_entry, 0 },
5005 { "mem.offset", dot_mem_offset, 0 },
5006 { "pred.rel", dot_pred_rel, 0 },
5007 { "pred.rel.clear", dot_pred_rel, 'c' },
5008 { "pred.rel.imply", dot_pred_rel, 'i' },
5009 { "pred.rel.mutex", dot_pred_rel, 'm' },
5010 { "pred.safe_across_calls", dot_pred_rel, 's' },
5011 { "reg.val", dot_reg_val, 0 },
5012 { "auto", dot_dv_mode, 'a' },
5013 { "explicit", dot_dv_mode, 'e' },
5014 { "default", dot_dv_mode, 'd' },
5016 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5017 IA-64 aligns data allocation pseudo-ops by default, so we have to
5018 tell it that these ones are supposed to be unaligned. Long term,
5019 should rewrite so that only IA-64 specific data allocation pseudo-ops
5020 are aligned by default. */
5021 {"2byte", stmt_cons_ua, 2},
5022 {"4byte", stmt_cons_ua, 4},
5023 {"8byte", stmt_cons_ua, 8},
5028 static const struct pseudo_opcode
5031 void (*handler) (int);
5036 /* these are more like pseudo-ops, but don't start with a dot */
5037 { "data1", cons, 1 },
5038 { "data2", cons, 2 },
5039 { "data4", cons, 4 },
5040 { "data8", cons, 8 },
5041 { "data16", cons, 16 },
5042 { "real4", stmt_float_cons, 'f' },
5043 { "real8", stmt_float_cons, 'd' },
5044 { "real10", stmt_float_cons, 'x' },
5045 { "real16", stmt_float_cons, 'X' },
5046 { "string", stringer, 0 },
5047 { "stringz", stringer, 1 },
5049 /* unaligned versions: */
5050 { "data2.ua", stmt_cons_ua, 2 },
5051 { "data4.ua", stmt_cons_ua, 4 },
5052 { "data8.ua", stmt_cons_ua, 8 },
5053 { "data16.ua", stmt_cons_ua, 16 },
5054 { "real4.ua", float_cons, 'f' },
5055 { "real8.ua", float_cons, 'd' },
5056 { "real10.ua", float_cons, 'x' },
5057 { "real16.ua", float_cons, 'X' },
5060 /* Declare a register by creating a symbol for it and entering it in
5061 the symbol table. */
5064 declare_register (name, regnum)
5071 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5073 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5075 as_fatal ("Inserting \"%s\" into register table failed: %s",
5082 declare_register_set (prefix, num_regs, base_regnum)
5090 for (i = 0; i < num_regs; ++i)
5092 sprintf (name, "%s%u", prefix, i);
5093 declare_register (name, base_regnum + i);
5098 operand_width (opnd)
5099 enum ia64_opnd opnd;
5101 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5102 unsigned int bits = 0;
5106 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5107 bits += odesc->field[i].bits;
5112 static enum operand_match_result
5113 operand_match (idesc, index, e)
5114 const struct ia64_opcode *idesc;
5118 enum ia64_opnd opnd = idesc->operands[index];
5119 int bits, relocatable = 0;
5120 struct insn_fix *fix;
5127 case IA64_OPND_AR_CCV:
5128 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5129 return OPERAND_MATCH;
5132 case IA64_OPND_AR_CSD:
5133 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5134 return OPERAND_MATCH;
5137 case IA64_OPND_AR_PFS:
5138 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5139 return OPERAND_MATCH;
5143 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5144 return OPERAND_MATCH;
5148 if (e->X_op == O_register && e->X_add_number == REG_IP)
5149 return OPERAND_MATCH;
5153 if (e->X_op == O_register && e->X_add_number == REG_PR)
5154 return OPERAND_MATCH;
5157 case IA64_OPND_PR_ROT:
5158 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5159 return OPERAND_MATCH;
5163 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5164 return OPERAND_MATCH;
5167 case IA64_OPND_PSR_L:
5168 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5169 return OPERAND_MATCH;
5172 case IA64_OPND_PSR_UM:
5173 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5174 return OPERAND_MATCH;
5178 if (e->X_op == O_constant)
5180 if (e->X_add_number == 1)
5181 return OPERAND_MATCH;
5183 return OPERAND_OUT_OF_RANGE;
5188 if (e->X_op == O_constant)
5190 if (e->X_add_number == 8)
5191 return OPERAND_MATCH;
5193 return OPERAND_OUT_OF_RANGE;
5198 if (e->X_op == O_constant)
5200 if (e->X_add_number == 16)
5201 return OPERAND_MATCH;
5203 return OPERAND_OUT_OF_RANGE;
5207 /* register operands: */
5210 if (e->X_op == O_register && e->X_add_number >= REG_AR
5211 && e->X_add_number < REG_AR + 128)
5212 return OPERAND_MATCH;
5217 if (e->X_op == O_register && e->X_add_number >= REG_BR
5218 && e->X_add_number < REG_BR + 8)
5219 return OPERAND_MATCH;
5223 if (e->X_op == O_register && e->X_add_number >= REG_CR
5224 && e->X_add_number < REG_CR + 128)
5225 return OPERAND_MATCH;
5232 if (e->X_op == O_register && e->X_add_number >= REG_FR
5233 && e->X_add_number < REG_FR + 128)
5234 return OPERAND_MATCH;
5239 if (e->X_op == O_register && e->X_add_number >= REG_P
5240 && e->X_add_number < REG_P + 64)
5241 return OPERAND_MATCH;
5247 if (e->X_op == O_register && e->X_add_number >= REG_GR
5248 && e->X_add_number < REG_GR + 128)
5249 return OPERAND_MATCH;
5252 case IA64_OPND_R3_2:
5253 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5255 if (e->X_add_number < REG_GR + 4)
5256 return OPERAND_MATCH;
5257 else if (e->X_add_number < REG_GR + 128)
5258 return OPERAND_OUT_OF_RANGE;
5262 /* indirect operands: */
5263 case IA64_OPND_CPUID_R3:
5264 case IA64_OPND_DBR_R3:
5265 case IA64_OPND_DTR_R3:
5266 case IA64_OPND_ITR_R3:
5267 case IA64_OPND_IBR_R3:
5268 case IA64_OPND_MSR_R3:
5269 case IA64_OPND_PKR_R3:
5270 case IA64_OPND_PMC_R3:
5271 case IA64_OPND_PMD_R3:
5272 case IA64_OPND_RR_R3:
5273 if (e->X_op == O_index && e->X_op_symbol
5274 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5275 == opnd - IA64_OPND_CPUID_R3))
5276 return OPERAND_MATCH;
5280 if (e->X_op == O_index && !e->X_op_symbol)
5281 return OPERAND_MATCH;
5284 /* immediate operands: */
5285 case IA64_OPND_CNT2a:
5286 case IA64_OPND_LEN4:
5287 case IA64_OPND_LEN6:
5288 bits = operand_width (idesc->operands[index]);
5289 if (e->X_op == O_constant)
5291 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5292 return OPERAND_MATCH;
5294 return OPERAND_OUT_OF_RANGE;
5298 case IA64_OPND_CNT2b:
5299 if (e->X_op == O_constant)
5301 if ((bfd_vma) (e->X_add_number - 1) < 3)
5302 return OPERAND_MATCH;
5304 return OPERAND_OUT_OF_RANGE;
5308 case IA64_OPND_CNT2c:
5309 val = e->X_add_number;
5310 if (e->X_op == O_constant)
5312 if ((val == 0 || val == 7 || val == 15 || val == 16))
5313 return OPERAND_MATCH;
5315 return OPERAND_OUT_OF_RANGE;
5320 /* SOR must be an integer multiple of 8 */
5321 if (e->X_op == O_constant && e->X_add_number & 0x7)
5322 return OPERAND_OUT_OF_RANGE;
5325 if (e->X_op == O_constant)
5327 if ((bfd_vma) e->X_add_number <= 96)
5328 return OPERAND_MATCH;
5330 return OPERAND_OUT_OF_RANGE;
5334 case IA64_OPND_IMMU62:
5335 if (e->X_op == O_constant)
5337 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5338 return OPERAND_MATCH;
5340 return OPERAND_OUT_OF_RANGE;
5344 /* FIXME -- need 62-bit relocation type */
5345 as_bad (_("62-bit relocation not yet implemented"));
5349 case IA64_OPND_IMMU64:
5350 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5351 || e->X_op == O_subtract)
5353 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5354 fix->code = BFD_RELOC_IA64_IMM64;
5355 if (e->X_op != O_subtract)
5357 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5358 if (e->X_op == O_pseudo_fixup)
5362 fix->opnd = idesc->operands[index];
5365 ++CURR_SLOT.num_fixups;
5366 return OPERAND_MATCH;
5368 else if (e->X_op == O_constant)
5369 return OPERAND_MATCH;
5372 case IA64_OPND_CCNT5:
5373 case IA64_OPND_CNT5:
5374 case IA64_OPND_CNT6:
5375 case IA64_OPND_CPOS6a:
5376 case IA64_OPND_CPOS6b:
5377 case IA64_OPND_CPOS6c:
5378 case IA64_OPND_IMMU2:
5379 case IA64_OPND_IMMU7a:
5380 case IA64_OPND_IMMU7b:
5381 case IA64_OPND_IMMU21:
5382 case IA64_OPND_IMMU24:
5383 case IA64_OPND_MBTYPE4:
5384 case IA64_OPND_MHTYPE8:
5385 case IA64_OPND_POS6:
5386 bits = operand_width (idesc->operands[index]);
5387 if (e->X_op == O_constant)
5389 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5390 return OPERAND_MATCH;
5392 return OPERAND_OUT_OF_RANGE;
5396 case IA64_OPND_IMMU9:
5397 bits = operand_width (idesc->operands[index]);
5398 if (e->X_op == O_constant)
5400 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5402 int lobits = e->X_add_number & 0x3;
5403 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5404 e->X_add_number |= (bfd_vma) 0x3;
5405 return OPERAND_MATCH;
5408 return OPERAND_OUT_OF_RANGE;
5412 case IA64_OPND_IMM44:
5413 /* least 16 bits must be zero */
5414 if ((e->X_add_number & 0xffff) != 0)
5415 /* XXX technically, this is wrong: we should not be issuing warning
5416 messages until we're sure this instruction pattern is going to
5418 as_warn (_("lower 16 bits of mask ignored"));
5420 if (e->X_op == O_constant)
5422 if (((e->X_add_number >= 0
5423 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5424 || (e->X_add_number < 0
5425 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5428 if (e->X_add_number >= 0
5429 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5431 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5433 return OPERAND_MATCH;
5436 return OPERAND_OUT_OF_RANGE;
5440 case IA64_OPND_IMM17:
5441 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5442 if (e->X_op == O_constant)
5444 if (((e->X_add_number >= 0
5445 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5446 || (e->X_add_number < 0
5447 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5450 if (e->X_add_number >= 0
5451 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5453 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5455 return OPERAND_MATCH;
5458 return OPERAND_OUT_OF_RANGE;
5462 case IA64_OPND_IMM14:
5463 case IA64_OPND_IMM22:
5465 case IA64_OPND_IMM1:
5466 case IA64_OPND_IMM8:
5467 case IA64_OPND_IMM8U4:
5468 case IA64_OPND_IMM8M1:
5469 case IA64_OPND_IMM8M1U4:
5470 case IA64_OPND_IMM8M1U8:
5471 case IA64_OPND_IMM9a:
5472 case IA64_OPND_IMM9b:
5473 bits = operand_width (idesc->operands[index]);
5474 if (relocatable && (e->X_op == O_symbol
5475 || e->X_op == O_subtract
5476 || e->X_op == O_pseudo_fixup))
5478 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5480 if (idesc->operands[index] == IA64_OPND_IMM14)
5481 fix->code = BFD_RELOC_IA64_IMM14;
5483 fix->code = BFD_RELOC_IA64_IMM22;
5485 if (e->X_op != O_subtract)
5487 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5488 if (e->X_op == O_pseudo_fixup)
5492 fix->opnd = idesc->operands[index];
5495 ++CURR_SLOT.num_fixups;
5496 return OPERAND_MATCH;
5498 else if (e->X_op != O_constant
5499 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5500 return OPERAND_MISMATCH;
5502 if (opnd == IA64_OPND_IMM8M1U4)
5504 /* Zero is not valid for unsigned compares that take an adjusted
5505 constant immediate range. */
5506 if (e->X_add_number == 0)
5507 return OPERAND_OUT_OF_RANGE;
5509 /* Sign-extend 32-bit unsigned numbers, so that the following range
5510 checks will work. */
5511 val = e->X_add_number;
5512 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5513 && ((val & ((bfd_vma) 1 << 31)) != 0))
5514 val = ((val << 32) >> 32);
5516 /* Check for 0x100000000. This is valid because
5517 0x100000000-1 is the same as ((uint32_t) -1). */
5518 if (val == ((bfd_signed_vma) 1 << 32))
5519 return OPERAND_MATCH;
5523 else if (opnd == IA64_OPND_IMM8M1U8)
5525 /* Zero is not valid for unsigned compares that take an adjusted
5526 constant immediate range. */
5527 if (e->X_add_number == 0)
5528 return OPERAND_OUT_OF_RANGE;
5530 /* Check for 0x10000000000000000. */
5531 if (e->X_op == O_big)
5533 if (generic_bignum[0] == 0
5534 && generic_bignum[1] == 0
5535 && generic_bignum[2] == 0
5536 && generic_bignum[3] == 0
5537 && generic_bignum[4] == 1)
5538 return OPERAND_MATCH;
5540 return OPERAND_OUT_OF_RANGE;
5543 val = e->X_add_number - 1;
5545 else if (opnd == IA64_OPND_IMM8M1)
5546 val = e->X_add_number - 1;
5547 else if (opnd == IA64_OPND_IMM8U4)
5549 /* Sign-extend 32-bit unsigned numbers, so that the following range
5550 checks will work. */
5551 val = e->X_add_number;
5552 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5553 && ((val & ((bfd_vma) 1 << 31)) != 0))
5554 val = ((val << 32) >> 32);
5557 val = e->X_add_number;
5559 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5560 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5561 return OPERAND_MATCH;
5563 return OPERAND_OUT_OF_RANGE;
5565 case IA64_OPND_INC3:
5566 /* +/- 1, 4, 8, 16 */
5567 val = e->X_add_number;
5570 if (e->X_op == O_constant)
5572 if ((val == 1 || val == 4 || val == 8 || val == 16))
5573 return OPERAND_MATCH;
5575 return OPERAND_OUT_OF_RANGE;
5579 case IA64_OPND_TGT25:
5580 case IA64_OPND_TGT25b:
5581 case IA64_OPND_TGT25c:
5582 case IA64_OPND_TGT64:
5583 if (e->X_op == O_symbol)
5585 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5586 if (opnd == IA64_OPND_TGT25)
5587 fix->code = BFD_RELOC_IA64_PCREL21F;
5588 else if (opnd == IA64_OPND_TGT25b)
5589 fix->code = BFD_RELOC_IA64_PCREL21M;
5590 else if (opnd == IA64_OPND_TGT25c)
5591 fix->code = BFD_RELOC_IA64_PCREL21B;
5592 else if (opnd == IA64_OPND_TGT64)
5593 fix->code = BFD_RELOC_IA64_PCREL60B;
5597 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5598 fix->opnd = idesc->operands[index];
5601 ++CURR_SLOT.num_fixups;
5602 return OPERAND_MATCH;
5604 case IA64_OPND_TAG13:
5605 case IA64_OPND_TAG13b:
5609 return OPERAND_MATCH;
5612 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5613 /* There are no external relocs for TAG13/TAG13b fields, so we
5614 create a dummy reloc. This will not live past md_apply_fix3. */
5615 fix->code = BFD_RELOC_UNUSED;
5616 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5617 fix->opnd = idesc->operands[index];
5620 ++CURR_SLOT.num_fixups;
5621 return OPERAND_MATCH;
5628 case IA64_OPND_LDXMOV:
5629 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5630 fix->code = BFD_RELOC_IA64_LDXMOV;
5631 fix->opnd = idesc->operands[index];
5634 ++CURR_SLOT.num_fixups;
5635 return OPERAND_MATCH;
5640 return OPERAND_MISMATCH;
5649 memset (e, 0, sizeof (*e));
5652 if (*input_line_pointer != '}')
5654 sep = *input_line_pointer++;
5658 if (!md.manual_bundling)
5659 as_warn ("Found '}' when manual bundling is off");
5661 CURR_SLOT.manual_bundling_off = 1;
5662 md.manual_bundling = 0;
5668 /* Returns the next entry in the opcode table that matches the one in
5669 IDESC, and frees the entry in IDESC. If no matching entry is
5670 found, NULL is returned instead. */
5672 static struct ia64_opcode *
5673 get_next_opcode (struct ia64_opcode *idesc)
5675 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5676 ia64_free_opcode (idesc);
5680 /* Parse the operands for the opcode and find the opcode variant that
5681 matches the specified operands, or NULL if no match is possible. */
5683 static struct ia64_opcode *
5684 parse_operands (idesc)
5685 struct ia64_opcode *idesc;
5687 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5688 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5689 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5690 enum operand_match_result result;
5692 char *first_arg = 0, *end, *saved_input_pointer;
5695 assert (strlen (idesc->name) <= 128);
5697 strcpy (mnemonic, idesc->name);
5698 if (idesc->operands[2] == IA64_OPND_SOF)
5700 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5701 can't parse the first operand until we have parsed the
5702 remaining operands of the "alloc" instruction. */
5704 first_arg = input_line_pointer;
5705 end = strchr (input_line_pointer, '=');
5708 as_bad ("Expected separator `='");
5711 input_line_pointer = end + 1;
5716 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5718 sep = parse_operand (CURR_SLOT.opnd + i);
5719 if (CURR_SLOT.opnd[i].X_op == O_absent)
5724 if (sep != '=' && sep != ',')
5729 if (num_outputs > 0)
5730 as_bad ("Duplicate equal sign (=) in instruction");
5732 num_outputs = i + 1;
5737 as_bad ("Illegal operand separator `%c'", sep);
5741 if (idesc->operands[2] == IA64_OPND_SOF)
5743 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5744 know (strcmp (idesc->name, "alloc") == 0);
5745 if (num_operands == 5 /* first_arg not included in this count! */
5746 && CURR_SLOT.opnd[2].X_op == O_constant
5747 && CURR_SLOT.opnd[3].X_op == O_constant
5748 && CURR_SLOT.opnd[4].X_op == O_constant
5749 && CURR_SLOT.opnd[5].X_op == O_constant)
5751 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5752 CURR_SLOT.opnd[3].X_add_number,
5753 CURR_SLOT.opnd[4].X_add_number,
5754 CURR_SLOT.opnd[5].X_add_number);
5756 /* now we can parse the first arg: */
5757 saved_input_pointer = input_line_pointer;
5758 input_line_pointer = first_arg;
5759 sep = parse_operand (CURR_SLOT.opnd + 0);
5761 --num_outputs; /* force error */
5762 input_line_pointer = saved_input_pointer;
5764 CURR_SLOT.opnd[2].X_add_number = sof;
5765 CURR_SLOT.opnd[3].X_add_number
5766 = sof - CURR_SLOT.opnd[4].X_add_number;
5767 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5771 highest_unmatched_operand = 0;
5772 curr_out_of_range_pos = -1;
5774 expected_operand = idesc->operands[0];
5775 for (; idesc; idesc = get_next_opcode (idesc))
5777 if (num_outputs != idesc->num_outputs)
5778 continue; /* mismatch in # of outputs */
5780 CURR_SLOT.num_fixups = 0;
5782 /* Try to match all operands. If we see an out-of-range operand,
5783 then continue trying to match the rest of the operands, since if
5784 the rest match, then this idesc will give the best error message. */
5786 out_of_range_pos = -1;
5787 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5789 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5790 if (result != OPERAND_MATCH)
5792 if (result != OPERAND_OUT_OF_RANGE)
5794 if (out_of_range_pos < 0)
5795 /* remember position of the first out-of-range operand: */
5796 out_of_range_pos = i;
5800 /* If we did not match all operands, or if at least one operand was
5801 out-of-range, then this idesc does not match. Keep track of which
5802 idesc matched the most operands before failing. If we have two
5803 idescs that failed at the same position, and one had an out-of-range
5804 operand, then prefer the out-of-range operand. Thus if we have
5805 "add r0=0x1000000,r1" we get an error saying the constant is out
5806 of range instead of an error saying that the constant should have been
5809 if (i != num_operands || out_of_range_pos >= 0)
5811 if (i > highest_unmatched_operand
5812 || (i == highest_unmatched_operand
5813 && out_of_range_pos > curr_out_of_range_pos))
5815 highest_unmatched_operand = i;
5816 if (out_of_range_pos >= 0)
5818 expected_operand = idesc->operands[out_of_range_pos];
5819 error_pos = out_of_range_pos;
5823 expected_operand = idesc->operands[i];
5826 curr_out_of_range_pos = out_of_range_pos;
5831 if (num_operands < NELEMS (idesc->operands)
5832 && idesc->operands[num_operands])
5833 continue; /* mismatch in number of arguments */
5839 if (expected_operand)
5840 as_bad ("Operand %u of `%s' should be %s",
5841 error_pos + 1, mnemonic,
5842 elf64_ia64_operands[expected_operand].desc);
5844 as_bad ("Operand mismatch");
5850 /* Keep track of state necessary to determine whether a NOP is necessary
5851 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5852 detect a case where additional NOPs may be necessary. */
5854 errata_nop_necessary_p (slot, insn_unit)
5856 enum ia64_unit insn_unit;
5859 struct group *this_group = md.last_groups + md.group_idx;
5860 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5861 struct ia64_opcode *idesc = slot->idesc;
5863 /* Test whether this could be the first insn in a problematic sequence. */
5864 if (insn_unit == IA64_UNIT_F)
5866 for (i = 0; i < idesc->num_outputs; i++)
5867 if (idesc->operands[i] == IA64_OPND_P1
5868 || idesc->operands[i] == IA64_OPND_P2)
5870 int regno = slot->opnd[i].X_add_number - REG_P;
5871 /* Ignore invalid operands; they generate errors elsewhere. */
5874 this_group->p_reg_set[regno] = 1;
5878 /* Test whether this could be the second insn in a problematic sequence. */
5879 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5880 && prev_group->p_reg_set[slot->qp_regno])
5882 for (i = 0; i < idesc->num_outputs; i++)
5883 if (idesc->operands[i] == IA64_OPND_R1
5884 || idesc->operands[i] == IA64_OPND_R2
5885 || idesc->operands[i] == IA64_OPND_R3)
5887 int regno = slot->opnd[i].X_add_number - REG_GR;
5888 /* Ignore invalid operands; they generate errors elsewhere. */
5891 if (strncmp (idesc->name, "add", 3) != 0
5892 && strncmp (idesc->name, "sub", 3) != 0
5893 && strncmp (idesc->name, "shladd", 6) != 0
5894 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5895 this_group->g_reg_set_conditionally[regno] = 1;
5899 /* Test whether this could be the third insn in a problematic sequence. */
5900 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5902 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5903 idesc->operands[i] == IA64_OPND_R3
5904 /* For mov indirect. */
5905 || idesc->operands[i] == IA64_OPND_RR_R3
5906 || idesc->operands[i] == IA64_OPND_DBR_R3
5907 || idesc->operands[i] == IA64_OPND_IBR_R3
5908 || idesc->operands[i] == IA64_OPND_PKR_R3
5909 || idesc->operands[i] == IA64_OPND_PMC_R3
5910 || idesc->operands[i] == IA64_OPND_PMD_R3
5911 || idesc->operands[i] == IA64_OPND_MSR_R3
5912 || idesc->operands[i] == IA64_OPND_CPUID_R3
5914 || idesc->operands[i] == IA64_OPND_ITR_R3
5915 || idesc->operands[i] == IA64_OPND_DTR_R3
5916 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5917 || idesc->operands[i] == IA64_OPND_MR3)
5919 int regno = slot->opnd[i].X_add_number - REG_GR;
5920 /* Ignore invalid operands; they generate errors elsewhere. */
5923 if (idesc->operands[i] == IA64_OPND_R3)
5925 if (strcmp (idesc->name, "fc") != 0
5926 && strcmp (idesc->name, "tak") != 0
5927 && strcmp (idesc->name, "thash") != 0
5928 && strcmp (idesc->name, "tpa") != 0
5929 && strcmp (idesc->name, "ttag") != 0
5930 && strncmp (idesc->name, "ptr", 3) != 0
5931 && strncmp (idesc->name, "ptc", 3) != 0
5932 && strncmp (idesc->name, "probe", 5) != 0)
5935 if (prev_group->g_reg_set_conditionally[regno])
5943 build_insn (slot, insnp)
5947 const struct ia64_operand *odesc, *o2desc;
5948 struct ia64_opcode *idesc = slot->idesc;
5949 bfd_signed_vma insn, val;
5953 insn = idesc->opcode | slot->qp_regno;
5955 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
5957 if (slot->opnd[i].X_op == O_register
5958 || slot->opnd[i].X_op == O_constant
5959 || slot->opnd[i].X_op == O_index)
5960 val = slot->opnd[i].X_add_number;
5961 else if (slot->opnd[i].X_op == O_big)
5963 /* This must be the value 0x10000000000000000. */
5964 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
5970 switch (idesc->operands[i])
5972 case IA64_OPND_IMMU64:
5973 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
5974 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
5975 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
5976 | (((val >> 63) & 0x1) << 36));
5979 case IA64_OPND_IMMU62:
5980 val &= 0x3fffffffffffffffULL;
5981 if (val != slot->opnd[i].X_add_number)
5982 as_warn (_("Value truncated to 62 bits"));
5983 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
5984 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
5987 case IA64_OPND_TGT64:
5989 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
5990 insn |= ((((val >> 59) & 0x1) << 36)
5991 | (((val >> 0) & 0xfffff) << 13));
6022 case IA64_OPND_R3_2:
6023 case IA64_OPND_CPUID_R3:
6024 case IA64_OPND_DBR_R3:
6025 case IA64_OPND_DTR_R3:
6026 case IA64_OPND_ITR_R3:
6027 case IA64_OPND_IBR_R3:
6029 case IA64_OPND_MSR_R3:
6030 case IA64_OPND_PKR_R3:
6031 case IA64_OPND_PMC_R3:
6032 case IA64_OPND_PMD_R3:
6033 case IA64_OPND_RR_R3:
6041 odesc = elf64_ia64_operands + idesc->operands[i];
6042 err = (*odesc->insert) (odesc, val, &insn);
6044 as_bad_where (slot->src_file, slot->src_line,
6045 "Bad operand value: %s", err);
6046 if (idesc->flags & IA64_OPCODE_PSEUDO)
6048 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6049 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6051 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6052 (*o2desc->insert) (o2desc, val, &insn);
6054 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6055 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6056 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6058 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6059 (*o2desc->insert) (o2desc, 64 - val, &insn);
6069 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6070 unsigned int manual_bundling = 0;
6071 enum ia64_unit required_unit, insn_unit = 0;
6072 enum ia64_insn_type type[3], insn_type;
6073 unsigned int template, orig_template;
6074 bfd_vma insn[3] = { -1, -1, -1 };
6075 struct ia64_opcode *idesc;
6076 int end_of_insn_group = 0, user_template = -1;
6077 int n, i, j, first, curr;
6078 unw_rec_list *ptr, *last_ptr, *end_ptr;
6079 bfd_vma t0 = 0, t1 = 0;
6080 struct label_fix *lfix;
6081 struct insn_fix *ifix;
6086 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6087 know (first >= 0 & first < NUM_SLOTS);
6088 n = MIN (3, md.num_slots_in_use);
6090 /* Determine template: user user_template if specified, best match
6093 if (md.slot[first].user_template >= 0)
6094 user_template = template = md.slot[first].user_template;
6097 /* Auto select appropriate template. */
6098 memset (type, 0, sizeof (type));
6100 for (i = 0; i < n; ++i)
6102 if (md.slot[curr].label_fixups && i != 0)
6104 type[i] = md.slot[curr].idesc->type;
6105 curr = (curr + 1) % NUM_SLOTS;
6107 template = best_template[type[0]][type[1]][type[2]];
6110 /* initialize instructions with appropriate nops: */
6111 for (i = 0; i < 3; ++i)
6112 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6116 /* now fill in slots with as many insns as possible: */
6118 idesc = md.slot[curr].idesc;
6119 end_of_insn_group = 0;
6120 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6122 /* If we have unwind records, we may need to update some now. */
6123 ptr = md.slot[curr].unwind_record;
6126 /* Find the last prologue/body record in the list for the current
6127 insn, and set the slot number for all records up to that point.
6128 This needs to be done now, because prologue/body records refer to
6129 the current point, not the point after the instruction has been
6130 issued. This matters because there may have been nops emitted
6131 meanwhile. Any non-prologue non-body record followed by a
6132 prologue/body record must also refer to the current point. */
6134 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6135 for (; ptr != end_ptr; ptr = ptr->next)
6136 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6137 || ptr->r.type == body)
6141 /* Make last_ptr point one after the last prologue/body
6143 last_ptr = last_ptr->next;
6144 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6147 ptr->slot_number = (unsigned long) f + i;
6148 ptr->slot_frag = frag_now;
6150 /* Remove the initialized records, so that we won't accidentally
6151 update them again if we insert a nop and continue. */
6152 md.slot[curr].unwind_record = last_ptr;
6156 if (idesc->flags & IA64_OPCODE_SLOT2)
6158 if (manual_bundling && i != 2)
6159 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6160 "`%s' must be last in bundle", idesc->name);
6164 if (idesc->flags & IA64_OPCODE_LAST)
6167 unsigned int required_template;
6169 /* If we need a stop bit after an M slot, our only choice is
6170 template 5 (M;;MI). If we need a stop bit after a B
6171 slot, our only choice is to place it at the end of the
6172 bundle, because the only available templates are MIB,
6173 MBB, BBB, MMB, and MFB. We don't handle anything other
6174 than M and B slots because these are the only kind of
6175 instructions that can have the IA64_OPCODE_LAST bit set. */
6176 required_template = template;
6177 switch (idesc->type)
6181 required_template = 5;
6189 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6190 "Internal error: don't know how to force %s to end"
6191 "of instruction group", idesc->name);
6195 if (manual_bundling && i != required_slot)
6196 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6197 "`%s' must be last in instruction group",
6199 if (required_slot < i)
6200 /* Can't fit this instruction. */
6204 if (required_template != template)
6206 /* If we switch the template, we need to reset the NOPs
6207 after slot i. The slot-types of the instructions ahead
6208 of i never change, so we don't need to worry about
6209 changing NOPs in front of this slot. */
6210 for (j = i; j < 3; ++j)
6211 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6213 template = required_template;
6215 if (curr != first && md.slot[curr].label_fixups)
6217 if (manual_bundling_on)
6218 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6219 "Label must be first in a bundle");
6220 /* This insn must go into the first slot of a bundle. */
6224 manual_bundling_on = md.slot[curr].manual_bundling_on;
6225 manual_bundling_off = md.slot[curr].manual_bundling_off;
6227 if (manual_bundling_on)
6230 manual_bundling = 1;
6232 break; /* need to start a new bundle */
6235 if (end_of_insn_group && md.num_slots_in_use >= 1)
6237 /* We need an instruction group boundary in the middle of a
6238 bundle. See if we can switch to an other template with
6239 an appropriate boundary. */
6241 orig_template = template;
6242 if (i == 1 && (user_template == 4
6243 || (user_template < 0
6244 && (ia64_templ_desc[template].exec_unit[0]
6248 end_of_insn_group = 0;
6250 else if (i == 2 && (user_template == 0
6251 || (user_template < 0
6252 && (ia64_templ_desc[template].exec_unit[1]
6254 /* This test makes sure we don't switch the template if
6255 the next instruction is one that needs to be first in
6256 an instruction group. Since all those instructions are
6257 in the M group, there is no way such an instruction can
6258 fit in this bundle even if we switch the template. The
6259 reason we have to check for this is that otherwise we
6260 may end up generating "MI;;I M.." which has the deadly
6261 effect that the second M instruction is no longer the
6262 first in the bundle! --davidm 99/12/16 */
6263 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6266 end_of_insn_group = 0;
6268 else if (curr != first)
6269 /* can't fit this insn */
6272 if (template != orig_template)
6273 /* if we switch the template, we need to reset the NOPs
6274 after slot i. The slot-types of the instructions ahead
6275 of i never change, so we don't need to worry about
6276 changing NOPs in front of this slot. */
6277 for (j = i; j < 3; ++j)
6278 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6280 required_unit = ia64_templ_desc[template].exec_unit[i];
6282 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6283 if (idesc->type == IA64_TYPE_DYN)
6285 if ((strcmp (idesc->name, "nop") == 0)
6286 || (strcmp (idesc->name, "hint") == 0)
6287 || (strcmp (idesc->name, "break") == 0))
6288 insn_unit = required_unit;
6289 else if (strcmp (idesc->name, "chk.s") == 0)
6291 insn_unit = IA64_UNIT_M;
6292 if (required_unit == IA64_UNIT_I)
6293 insn_unit = IA64_UNIT_I;
6296 as_fatal ("emit_one_bundle: unexpected dynamic op");
6298 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6299 ia64_free_opcode (idesc);
6300 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6302 know (!idesc->next); /* no resolved dynamic ops have collisions */
6307 insn_type = idesc->type;
6308 insn_unit = IA64_UNIT_NIL;
6312 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6313 insn_unit = required_unit;
6315 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6316 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6317 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6318 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6319 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6324 if (insn_unit != required_unit)
6326 if (required_unit == IA64_UNIT_L
6327 && insn_unit == IA64_UNIT_I
6328 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6330 /* we got ourselves an MLX template but the current
6331 instruction isn't an X-unit, or an I-unit instruction
6332 that can go into the X slot of an MLX template. Duh. */
6333 if (md.num_slots_in_use >= NUM_SLOTS)
6335 as_bad_where (md.slot[curr].src_file,
6336 md.slot[curr].src_line,
6337 "`%s' can't go in X slot of "
6338 "MLX template", idesc->name);
6339 /* drop this insn so we don't livelock: */
6340 --md.num_slots_in_use;
6344 continue; /* try next slot */
6350 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6351 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6354 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6355 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6357 build_insn (md.slot + curr, insn + i);
6359 ptr = md.slot[curr].unwind_record;
6362 /* Set slot numbers for all remaining unwind records belonging to the
6363 current insn. There can not be any prologue/body unwind records
6365 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6366 for (; ptr != end_ptr; ptr = ptr->next)
6368 ptr->slot_number = (unsigned long) f + i;
6369 ptr->slot_frag = frag_now;
6371 md.slot[curr].unwind_record = NULL;
6374 if (required_unit == IA64_UNIT_L)
6377 /* skip one slot for long/X-unit instructions */
6380 --md.num_slots_in_use;
6382 /* now is a good time to fix up the labels for this insn: */
6383 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6385 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6386 symbol_set_frag (lfix->sym, frag_now);
6388 /* and fix up the tags also. */
6389 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6391 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6392 symbol_set_frag (lfix->sym, frag_now);
6395 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6397 ifix = md.slot[curr].fixup + j;
6398 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6399 &ifix->expr, ifix->is_pcrel, ifix->code);
6400 fix->tc_fix_data.opnd = ifix->opnd;
6401 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6402 fix->fx_file = md.slot[curr].src_file;
6403 fix->fx_line = md.slot[curr].src_line;
6406 end_of_insn_group = md.slot[curr].end_of_insn_group;
6408 if (end_of_insn_group)
6410 md.group_idx = (md.group_idx + 1) % 3;
6411 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6415 ia64_free_opcode (md.slot[curr].idesc);
6416 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6417 md.slot[curr].user_template = -1;
6419 if (manual_bundling_off)
6421 manual_bundling = 0;
6424 curr = (curr + 1) % NUM_SLOTS;
6425 idesc = md.slot[curr].idesc;
6427 if (manual_bundling)
6429 if (md.num_slots_in_use > 0)
6430 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6431 "`%s' does not fit into %s template",
6432 idesc->name, ia64_templ_desc[template].name);
6434 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6435 "Missing '}' at end of file");
6437 know (md.num_slots_in_use < NUM_SLOTS);
6439 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6440 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6442 number_to_chars_littleendian (f + 0, t0, 8);
6443 number_to_chars_littleendian (f + 8, t1, 8);
6447 unwind.list->next_slot_number = (unsigned long) f + 16;
6448 unwind.list->next_slot_frag = frag_now;
6453 md_parse_option (c, arg)
6460 /* Switches from the Intel assembler. */
6462 if (strcmp (arg, "ilp64") == 0
6463 || strcmp (arg, "lp64") == 0
6464 || strcmp (arg, "p64") == 0)
6466 md.flags |= EF_IA_64_ABI64;
6468 else if (strcmp (arg, "ilp32") == 0)
6470 md.flags &= ~EF_IA_64_ABI64;
6472 else if (strcmp (arg, "le") == 0)
6474 md.flags &= ~EF_IA_64_BE;
6476 else if (strcmp (arg, "be") == 0)
6478 md.flags |= EF_IA_64_BE;
6485 if (strcmp (arg, "so") == 0)
6487 /* Suppress signon message. */
6489 else if (strcmp (arg, "pi") == 0)
6491 /* Reject privileged instructions. FIXME */
6493 else if (strcmp (arg, "us") == 0)
6495 /* Allow union of signed and unsigned range. FIXME */
6497 else if (strcmp (arg, "close_fcalls") == 0)
6499 /* Do not resolve global function calls. */
6506 /* temp[="prefix"] Insert temporary labels into the object file
6507 symbol table prefixed by "prefix".
6508 Default prefix is ":temp:".
6513 /* indirect=<tgt> Assume unannotated indirect branches behavior
6514 according to <tgt> --
6515 exit: branch out from the current context (default)
6516 labels: all labels in context may be branch targets
6518 if (strncmp (arg, "indirect=", 9) != 0)
6523 /* -X conflicts with an ignored option, use -x instead */
6525 if (!arg || strcmp (arg, "explicit") == 0)
6527 /* set default mode to explicit */
6528 md.default_explicit_mode = 1;
6531 else if (strcmp (arg, "auto") == 0)
6533 md.default_explicit_mode = 0;
6535 else if (strcmp (arg, "debug") == 0)
6539 else if (strcmp (arg, "debugx") == 0)
6541 md.default_explicit_mode = 1;
6546 as_bad (_("Unrecognized option '-x%s'"), arg);
6551 /* nops Print nops statistics. */
6554 /* GNU specific switches for gcc. */
6555 case OPTION_MCONSTANT_GP:
6556 md.flags |= EF_IA_64_CONS_GP;
6559 case OPTION_MAUTO_PIC:
6560 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6571 md_show_usage (stream)
6576 --mconstant-gp mark output file as using the constant-GP model\n\
6577 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6578 --mauto-pic mark output file as using the constant-GP model\n\
6579 without function descriptors (sets ELF header flag\n\
6580 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6581 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6582 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6583 -x | -xexplicit turn on dependency violation checking (default)\n\
6584 -xauto automagically remove dependency violations\n\
6585 -xdebug debug dependency violation checker\n"),
6590 ia64_after_parse_args ()
6592 if (debug_type == DEBUG_STABS)
6593 as_fatal (_("--gstabs is not supported for ia64"));
6596 /* Return true if TYPE fits in TEMPL at SLOT. */
6599 match (int templ, int type, int slot)
6601 enum ia64_unit unit;
6604 unit = ia64_templ_desc[templ].exec_unit[slot];
6607 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6609 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6611 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6612 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6613 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6614 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6615 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6616 default: result = 0; break;
6621 /* Add a bit of extra goodness if a nop of type F or B would fit
6622 in TEMPL at SLOT. */
6625 extra_goodness (int templ, int slot)
6627 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6629 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6634 /* This function is called once, at assembler startup time. It sets
6635 up all the tables, etc. that the MD part of the assembler will need
6636 that can be determined before arguments are parsed. */
6640 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6645 md.explicit_mode = md.default_explicit_mode;
6647 bfd_set_section_alignment (stdoutput, text_section, 4);
6649 /* Make sure function pointers get initialized. */
6650 target_big_endian = -1;
6651 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6653 alias_hash = hash_new ();
6654 alias_name_hash = hash_new ();
6655 secalias_hash = hash_new ();
6656 secalias_name_hash = hash_new ();
6658 pseudo_func[FUNC_DTP_MODULE].u.sym =
6659 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6660 &zero_address_frag);
6662 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6663 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6664 &zero_address_frag);
6666 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6667 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6668 &zero_address_frag);
6670 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6671 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6672 &zero_address_frag);
6674 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6675 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6676 &zero_address_frag);
6678 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6679 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6680 &zero_address_frag);
6682 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6683 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6684 &zero_address_frag);
6686 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6687 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6688 &zero_address_frag);
6690 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6691 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6692 &zero_address_frag);
6694 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6695 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6696 &zero_address_frag);
6698 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6699 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6700 &zero_address_frag);
6702 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6703 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6704 &zero_address_frag);
6706 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6707 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6708 &zero_address_frag);
6710 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6711 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6712 &zero_address_frag);
6714 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6715 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6716 &zero_address_frag);
6718 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6719 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6720 &zero_address_frag);
6722 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6723 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6724 &zero_address_frag);
6726 /* Compute the table of best templates. We compute goodness as a
6727 base 4 value, in which each match counts for 3, each F counts
6728 for 2, each B counts for 1. This should maximize the number of
6729 F and B nops in the chosen bundles, which is good because these
6730 pipelines are least likely to be overcommitted. */
6731 for (i = 0; i < IA64_NUM_TYPES; ++i)
6732 for (j = 0; j < IA64_NUM_TYPES; ++j)
6733 for (k = 0; k < IA64_NUM_TYPES; ++k)
6736 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6739 if (match (t, i, 0))
6741 if (match (t, j, 1))
6743 if (match (t, k, 2))
6744 goodness = 3 + 3 + 3;
6746 goodness = 3 + 3 + extra_goodness (t, 2);
6748 else if (match (t, j, 2))
6749 goodness = 3 + 3 + extra_goodness (t, 1);
6753 goodness += extra_goodness (t, 1);
6754 goodness += extra_goodness (t, 2);
6757 else if (match (t, i, 1))
6759 if (match (t, j, 2))
6762 goodness = 3 + extra_goodness (t, 2);
6764 else if (match (t, i, 2))
6765 goodness = 3 + extra_goodness (t, 1);
6767 if (goodness > best)
6770 best_template[i][j][k] = t;
6775 for (i = 0; i < NUM_SLOTS; ++i)
6776 md.slot[i].user_template = -1;
6778 md.pseudo_hash = hash_new ();
6779 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6781 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6782 (void *) (pseudo_opcode + i));
6784 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6785 pseudo_opcode[i].name, err);
6788 md.reg_hash = hash_new ();
6789 md.dynreg_hash = hash_new ();
6790 md.const_hash = hash_new ();
6791 md.entry_hash = hash_new ();
6793 /* general registers: */
6796 for (i = 0; i < total; ++i)
6798 sprintf (name, "r%d", i - REG_GR);
6799 md.regsym[i] = declare_register (name, i);
6802 /* floating point registers: */
6804 for (; i < total; ++i)
6806 sprintf (name, "f%d", i - REG_FR);
6807 md.regsym[i] = declare_register (name, i);
6810 /* application registers: */
6813 for (; i < total; ++i)
6815 sprintf (name, "ar%d", i - REG_AR);
6816 md.regsym[i] = declare_register (name, i);
6819 /* control registers: */
6822 for (; i < total; ++i)
6824 sprintf (name, "cr%d", i - REG_CR);
6825 md.regsym[i] = declare_register (name, i);
6828 /* predicate registers: */
6830 for (; i < total; ++i)
6832 sprintf (name, "p%d", i - REG_P);
6833 md.regsym[i] = declare_register (name, i);
6836 /* branch registers: */
6838 for (; i < total; ++i)
6840 sprintf (name, "b%d", i - REG_BR);
6841 md.regsym[i] = declare_register (name, i);
6844 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6845 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6846 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6847 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6848 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6849 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6850 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6852 for (i = 0; i < NELEMS (indirect_reg); ++i)
6854 regnum = indirect_reg[i].regnum;
6855 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6858 /* define synonyms for application registers: */
6859 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6860 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6861 REG_AR + ar[i - REG_AR].regnum);
6863 /* define synonyms for control registers: */
6864 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6865 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6866 REG_CR + cr[i - REG_CR].regnum);
6868 declare_register ("gp", REG_GR + 1);
6869 declare_register ("sp", REG_GR + 12);
6870 declare_register ("rp", REG_BR + 0);
6872 /* pseudo-registers used to specify unwind info: */
6873 declare_register ("psp", REG_PSP);
6875 declare_register_set ("ret", 4, REG_GR + 8);
6876 declare_register_set ("farg", 8, REG_FR + 8);
6877 declare_register_set ("fret", 8, REG_FR + 8);
6879 for (i = 0; i < NELEMS (const_bits); ++i)
6881 err = hash_insert (md.const_hash, const_bits[i].name,
6882 (PTR) (const_bits + i));
6884 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6888 /* Set the architecture and machine depending on defaults and command line
6890 if (md.flags & EF_IA_64_ABI64)
6891 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6893 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6896 as_warn (_("Could not set architecture and machine"));
6898 /* Set the pointer size and pointer shift size depending on md.flags */
6900 if (md.flags & EF_IA_64_ABI64)
6902 md.pointer_size = 8; /* pointers are 8 bytes */
6903 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6907 md.pointer_size = 4; /* pointers are 4 bytes */
6908 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6911 md.mem_offset.hint = 0;
6914 md.entry_labels = NULL;
6917 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6918 because that is called after md_parse_option which is where we do the
6919 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6920 default endianness. */
6923 ia64_init (argc, argv)
6924 int argc ATTRIBUTE_UNUSED;
6925 char **argv ATTRIBUTE_UNUSED;
6927 md.flags = MD_FLAGS_DEFAULT;
6930 /* Return a string for the target object file format. */
6933 ia64_target_format ()
6935 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6937 if (md.flags & EF_IA_64_BE)
6939 if (md.flags & EF_IA_64_ABI64)
6940 #if defined(TE_AIX50)
6941 return "elf64-ia64-aix-big";
6942 #elif defined(TE_HPUX)
6943 return "elf64-ia64-hpux-big";
6945 return "elf64-ia64-big";
6948 #if defined(TE_AIX50)
6949 return "elf32-ia64-aix-big";
6950 #elif defined(TE_HPUX)
6951 return "elf32-ia64-hpux-big";
6953 return "elf32-ia64-big";
6958 if (md.flags & EF_IA_64_ABI64)
6960 return "elf64-ia64-aix-little";
6962 return "elf64-ia64-little";
6966 return "elf32-ia64-aix-little";
6968 return "elf32-ia64-little";
6973 return "unknown-format";
6977 ia64_end_of_source ()
6979 /* terminate insn group upon reaching end of file: */
6980 insn_group_break (1, 0, 0);
6982 /* emits slots we haven't written yet: */
6983 ia64_flush_insns ();
6985 bfd_set_private_flags (stdoutput, md.flags);
6987 md.mem_offset.hint = 0;
6993 if (md.qp.X_op == O_register)
6994 as_bad ("qualifying predicate not followed by instruction");
6995 md.qp.X_op = O_absent;
6997 if (ignore_input ())
7000 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7002 if (md.detect_dv && !md.explicit_mode)
7003 as_warn (_("Explicit stops are ignored in auto mode"));
7005 insn_group_break (1, 0, 0);
7009 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7011 static int defining_tag = 0;
7014 ia64_unrecognized_line (ch)
7020 expression (&md.qp);
7021 if (*input_line_pointer++ != ')')
7023 as_bad ("Expected ')'");
7026 if (md.qp.X_op != O_register)
7028 as_bad ("Qualifying predicate expected");
7031 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7033 as_bad ("Predicate register expected");
7039 if (md.manual_bundling)
7040 as_warn ("Found '{' when manual bundling is already turned on");
7042 CURR_SLOT.manual_bundling_on = 1;
7043 md.manual_bundling = 1;
7045 /* Bundling is only acceptable in explicit mode
7046 or when in default automatic mode. */
7047 if (md.detect_dv && !md.explicit_mode)
7049 if (!md.mode_explicitly_set
7050 && !md.default_explicit_mode)
7053 as_warn (_("Found '{' after explicit switch to automatic mode"));
7058 if (!md.manual_bundling)
7059 as_warn ("Found '}' when manual bundling is off");
7061 PREV_SLOT.manual_bundling_off = 1;
7062 md.manual_bundling = 0;
7064 /* switch back to automatic mode, if applicable */
7067 && !md.mode_explicitly_set
7068 && !md.default_explicit_mode)
7071 /* Allow '{' to follow on the same line. We also allow ";;", but that
7072 happens automatically because ';' is an end of line marker. */
7074 if (input_line_pointer[0] == '{')
7076 input_line_pointer++;
7077 return ia64_unrecognized_line ('{');
7080 demand_empty_rest_of_line ();
7090 if (md.qp.X_op == O_register)
7092 as_bad ("Tag must come before qualifying predicate.");
7096 /* This implements just enough of read_a_source_file in read.c to
7097 recognize labels. */
7098 if (is_name_beginner (*input_line_pointer))
7100 s = input_line_pointer;
7101 c = get_symbol_end ();
7103 else if (LOCAL_LABELS_FB
7104 && ISDIGIT (*input_line_pointer))
7107 while (ISDIGIT (*input_line_pointer))
7108 temp = (temp * 10) + *input_line_pointer++ - '0';
7109 fb_label_instance_inc (temp);
7110 s = fb_label_name (temp, 0);
7111 c = *input_line_pointer;
7120 /* Put ':' back for error messages' sake. */
7121 *input_line_pointer++ = ':';
7122 as_bad ("Expected ':'");
7129 /* Put ':' back for error messages' sake. */
7130 *input_line_pointer++ = ':';
7131 if (*input_line_pointer++ != ']')
7133 as_bad ("Expected ']'");
7138 as_bad ("Tag name expected");
7148 /* Not a valid line. */
7153 ia64_frob_label (sym)
7156 struct label_fix *fix;
7158 /* Tags need special handling since they are not bundle breaks like
7162 fix = obstack_alloc (¬es, sizeof (*fix));
7164 fix->next = CURR_SLOT.tag_fixups;
7165 CURR_SLOT.tag_fixups = fix;
7170 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7172 md.last_text_seg = now_seg;
7173 fix = obstack_alloc (¬es, sizeof (*fix));
7175 fix->next = CURR_SLOT.label_fixups;
7176 CURR_SLOT.label_fixups = fix;
7178 /* Keep track of how many code entry points we've seen. */
7179 if (md.path == md.maxpaths)
7182 md.entry_labels = (const char **)
7183 xrealloc ((void *) md.entry_labels,
7184 md.maxpaths * sizeof (char *));
7186 md.entry_labels[md.path++] = S_GET_NAME (sym);
7191 /* The HP-UX linker will give unresolved symbol errors for symbols
7192 that are declared but unused. This routine removes declared,
7193 unused symbols from an object. */
7195 ia64_frob_symbol (sym)
7198 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7199 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7200 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7201 && ! S_IS_EXTERNAL (sym)))
7208 ia64_flush_pending_output ()
7210 if (!md.keep_pending_output
7211 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7213 /* ??? This causes many unnecessary stop bits to be emitted.
7214 Unfortunately, it isn't clear if it is safe to remove this. */
7215 insn_group_break (1, 0, 0);
7216 ia64_flush_insns ();
7220 /* Do ia64-specific expression optimization. All that's done here is
7221 to transform index expressions that are either due to the indexing
7222 of rotating registers or due to the indexing of indirect register
7225 ia64_optimize_expr (l, op, r)
7234 if (l->X_op == O_register && r->X_op == O_constant)
7236 num_regs = (l->X_add_number >> 16);
7237 if ((unsigned) r->X_add_number >= num_regs)
7240 as_bad ("No current frame");
7242 as_bad ("Index out of range 0..%u", num_regs - 1);
7243 r->X_add_number = 0;
7245 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7248 else if (l->X_op == O_register && r->X_op == O_register)
7250 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7251 || l->X_add_number == IND_MEM)
7253 as_bad ("Indirect register set name expected");
7254 l->X_add_number = IND_CPUID;
7257 l->X_op_symbol = md.regsym[l->X_add_number];
7258 l->X_add_number = r->X_add_number;
7266 ia64_parse_name (name, e)
7270 struct const_desc *cdesc;
7271 struct dynreg *dr = 0;
7272 unsigned int regnum;
7276 /* first see if NAME is a known register name: */
7277 sym = hash_find (md.reg_hash, name);
7280 e->X_op = O_register;
7281 e->X_add_number = S_GET_VALUE (sym);
7285 cdesc = hash_find (md.const_hash, name);
7288 e->X_op = O_constant;
7289 e->X_add_number = cdesc->value;
7293 /* check for inN, locN, or outN: */
7297 if (name[1] == 'n' && ISDIGIT (name[2]))
7305 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7313 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7326 /* The name is inN, locN, or outN; parse the register number. */
7327 regnum = strtoul (name, &end, 10);
7328 if (end > name && *end == '\0')
7330 if ((unsigned) regnum >= dr->num_regs)
7333 as_bad ("No current frame");
7335 as_bad ("Register number out of range 0..%u",
7339 e->X_op = O_register;
7340 e->X_add_number = dr->base + regnum;
7345 if ((dr = hash_find (md.dynreg_hash, name)))
7347 /* We've got ourselves the name of a rotating register set.
7348 Store the base register number in the low 16 bits of
7349 X_add_number and the size of the register set in the top 16
7351 e->X_op = O_register;
7352 e->X_add_number = dr->base | (dr->num_regs << 16);
7358 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7361 ia64_canonicalize_symbol_name (name)
7364 size_t len = strlen (name);
7365 if (len > 1 && name[len - 1] == '#')
7366 name[len - 1] = '\0';
7370 /* Return true if idesc is a conditional branch instruction. This excludes
7371 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7372 because they always read/write resources regardless of the value of the
7373 qualifying predicate. br.ia must always use p0, and hence is always
7374 taken. Thus this function returns true for branches which can fall
7375 through, and which use no resources if they do fall through. */
7378 is_conditional_branch (idesc)
7379 struct ia64_opcode *idesc;
7381 /* br is a conditional branch. Everything that starts with br. except
7382 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7383 Everything that starts with brl is a conditional branch. */
7384 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7385 && (idesc->name[2] == '\0'
7386 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7387 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7388 || idesc->name[2] == 'l'
7389 /* br.cond, br.call, br.clr */
7390 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7391 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7392 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7395 /* Return whether the given opcode is a taken branch. If there's any doubt,
7399 is_taken_branch (idesc)
7400 struct ia64_opcode *idesc;
7402 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7403 || strncmp (idesc->name, "br.ia", 5) == 0);
7406 /* Return whether the given opcode is an interruption or rfi. If there's any
7407 doubt, returns zero. */
7410 is_interruption_or_rfi (idesc)
7411 struct ia64_opcode *idesc;
7413 if (strcmp (idesc->name, "rfi") == 0)
7418 /* Returns the index of the given dependency in the opcode's list of chks, or
7419 -1 if there is no dependency. */
7422 depends_on (depind, idesc)
7424 struct ia64_opcode *idesc;
7427 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7428 for (i = 0; i < dep->nchks; i++)
7430 if (depind == DEP (dep->chks[i]))
7436 /* Determine a set of specific resources used for a particular resource
7437 class. Returns the number of specific resources identified For those
7438 cases which are not determinable statically, the resource returned is
7441 Meanings of value in 'NOTE':
7442 1) only read/write when the register number is explicitly encoded in the
7444 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7445 accesses CFM when qualifying predicate is in the rotating region.
7446 3) general register value is used to specify an indirect register; not
7447 determinable statically.
7448 4) only read the given resource when bits 7:0 of the indirect index
7449 register value does not match the register number of the resource; not
7450 determinable statically.
7451 5) all rules are implementation specific.
7452 6) only when both the index specified by the reader and the index specified
7453 by the writer have the same value in bits 63:61; not determinable
7455 7) only access the specified resource when the corresponding mask bit is
7457 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7458 only read when these insns reference FR2-31
7459 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7460 written when these insns write FR32-127
7461 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7463 11) The target predicates are written independently of PR[qp], but source
7464 registers are only read if PR[qp] is true. Since the state of PR[qp]
7465 cannot statically be determined, all source registers are marked used.
7466 12) This insn only reads the specified predicate register when that
7467 register is the PR[qp].
7468 13) This reference to ld-c only applies to teh GR whose value is loaded
7469 with data returned from memory, not the post-incremented address register.
7470 14) The RSE resource includes the implementation-specific RSE internal
7471 state resources. At least one (and possibly more) of these resources are
7472 read by each instruction listed in IC:rse-readers. At least one (and
7473 possibly more) of these resources are written by each insn listed in
7475 15+16) Represents reserved instructions, which the assembler does not
7478 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7479 this code; there are no dependency violations based on memory access.
7482 #define MAX_SPECS 256
7487 specify_resource (dep, idesc, type, specs, note, path)
7488 const struct ia64_dependency *dep;
7489 struct ia64_opcode *idesc;
7490 int type; /* is this a DV chk or a DV reg? */
7491 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7492 int note; /* resource note for this insn's usage */
7493 int path; /* which execution path to examine */
7500 if (dep->mode == IA64_DV_WAW
7501 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7502 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7505 /* template for any resources we identify */
7506 tmpl.dependency = dep;
7508 tmpl.insn_srlz = tmpl.data_srlz = 0;
7509 tmpl.qp_regno = CURR_SLOT.qp_regno;
7510 tmpl.link_to_qp_branch = 1;
7511 tmpl.mem_offset.hint = 0;
7514 tmpl.cmp_type = CMP_NONE;
7517 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7518 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7519 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7521 /* we don't need to track these */
7522 if (dep->semantics == IA64_DVS_NONE)
7525 switch (dep->specifier)
7530 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7532 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7533 if (regno >= 0 && regno <= 7)
7535 specs[count] = tmpl;
7536 specs[count++].index = regno;
7542 for (i = 0; i < 8; i++)
7544 specs[count] = tmpl;
7545 specs[count++].index = i;
7554 case IA64_RS_AR_UNAT:
7555 /* This is a mov =AR or mov AR= instruction. */
7556 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7558 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7559 if (regno == AR_UNAT)
7561 specs[count++] = tmpl;
7566 /* This is a spill/fill, or other instruction that modifies the
7569 /* Unless we can determine the specific bits used, mark the whole
7570 thing; bits 8:3 of the memory address indicate the bit used in
7571 UNAT. The .mem.offset hint may be used to eliminate a small
7572 subset of conflicts. */
7573 specs[count] = tmpl;
7574 if (md.mem_offset.hint)
7577 fprintf (stderr, " Using hint for spill/fill\n");
7578 /* The index isn't actually used, just set it to something
7579 approximating the bit index. */
7580 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7581 specs[count].mem_offset.hint = 1;
7582 specs[count].mem_offset.offset = md.mem_offset.offset;
7583 specs[count++].mem_offset.base = md.mem_offset.base;
7587 specs[count++].specific = 0;
7595 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7597 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7598 if ((regno >= 8 && regno <= 15)
7599 || (regno >= 20 && regno <= 23)
7600 || (regno >= 31 && regno <= 39)
7601 || (regno >= 41 && regno <= 47)
7602 || (regno >= 67 && regno <= 111))
7604 specs[count] = tmpl;
7605 specs[count++].index = regno;
7618 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7620 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7621 if ((regno >= 48 && regno <= 63)
7622 || (regno >= 112 && regno <= 127))
7624 specs[count] = tmpl;
7625 specs[count++].index = regno;
7631 for (i = 48; i < 64; i++)
7633 specs[count] = tmpl;
7634 specs[count++].index = i;
7636 for (i = 112; i < 128; i++)
7638 specs[count] = tmpl;
7639 specs[count++].index = i;
7657 for (i = 0; i < idesc->num_outputs; i++)
7658 if (idesc->operands[i] == IA64_OPND_B1
7659 || idesc->operands[i] == IA64_OPND_B2)
7661 specs[count] = tmpl;
7662 specs[count++].index =
7663 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7668 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7669 if (idesc->operands[i] == IA64_OPND_B1
7670 || idesc->operands[i] == IA64_OPND_B2)
7672 specs[count] = tmpl;
7673 specs[count++].index =
7674 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7680 case IA64_RS_CPUID: /* four or more registers */
7683 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7685 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7686 if (regno >= 0 && regno < NELEMS (gr_values)
7689 specs[count] = tmpl;
7690 specs[count++].index = gr_values[regno].value & 0xFF;
7694 specs[count] = tmpl;
7695 specs[count++].specific = 0;
7705 case IA64_RS_DBR: /* four or more registers */
7708 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7710 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7711 if (regno >= 0 && regno < NELEMS (gr_values)
7714 specs[count] = tmpl;
7715 specs[count++].index = gr_values[regno].value & 0xFF;
7719 specs[count] = tmpl;
7720 specs[count++].specific = 0;
7724 else if (note == 0 && !rsrc_write)
7726 specs[count] = tmpl;
7727 specs[count++].specific = 0;
7735 case IA64_RS_IBR: /* four or more registers */
7738 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7740 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7741 if (regno >= 0 && regno < NELEMS (gr_values)
7744 specs[count] = tmpl;
7745 specs[count++].index = gr_values[regno].value & 0xFF;
7749 specs[count] = tmpl;
7750 specs[count++].specific = 0;
7763 /* These are implementation specific. Force all references to
7764 conflict with all other references. */
7765 specs[count] = tmpl;
7766 specs[count++].specific = 0;
7774 case IA64_RS_PKR: /* 16 or more registers */
7775 if (note == 3 || note == 4)
7777 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7779 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7780 if (regno >= 0 && regno < NELEMS (gr_values)
7785 specs[count] = tmpl;
7786 specs[count++].index = gr_values[regno].value & 0xFF;
7789 for (i = 0; i < NELEMS (gr_values); i++)
7791 /* Uses all registers *except* the one in R3. */
7792 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7794 specs[count] = tmpl;
7795 specs[count++].index = i;
7801 specs[count] = tmpl;
7802 specs[count++].specific = 0;
7809 specs[count] = tmpl;
7810 specs[count++].specific = 0;
7814 case IA64_RS_PMC: /* four or more registers */
7817 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7818 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7821 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7823 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7824 if (regno >= 0 && regno < NELEMS (gr_values)
7827 specs[count] = tmpl;
7828 specs[count++].index = gr_values[regno].value & 0xFF;
7832 specs[count] = tmpl;
7833 specs[count++].specific = 0;
7843 case IA64_RS_PMD: /* four or more registers */
7846 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7848 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7849 if (regno >= 0 && regno < NELEMS (gr_values)
7852 specs[count] = tmpl;
7853 specs[count++].index = gr_values[regno].value & 0xFF;
7857 specs[count] = tmpl;
7858 specs[count++].specific = 0;
7868 case IA64_RS_RR: /* eight registers */
7871 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7873 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7874 if (regno >= 0 && regno < NELEMS (gr_values)
7877 specs[count] = tmpl;
7878 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7882 specs[count] = tmpl;
7883 specs[count++].specific = 0;
7887 else if (note == 0 && !rsrc_write)
7889 specs[count] = tmpl;
7890 specs[count++].specific = 0;
7898 case IA64_RS_CR_IRR:
7901 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7902 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7904 && idesc->operands[1] == IA64_OPND_CR3
7907 for (i = 0; i < 4; i++)
7909 specs[count] = tmpl;
7910 specs[count++].index = CR_IRR0 + i;
7916 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7917 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7919 && regno <= CR_IRR3)
7921 specs[count] = tmpl;
7922 specs[count++].index = regno;
7931 case IA64_RS_CR_LRR:
7938 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7939 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7940 && (regno == CR_LRR0 || regno == CR_LRR1))
7942 specs[count] = tmpl;
7943 specs[count++].index = regno;
7951 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
7953 specs[count] = tmpl;
7954 specs[count++].index =
7955 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7970 else if (rsrc_write)
7972 if (dep->specifier == IA64_RS_FRb
7973 && idesc->operands[0] == IA64_OPND_F1)
7975 specs[count] = tmpl;
7976 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
7981 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7983 if (idesc->operands[i] == IA64_OPND_F2
7984 || idesc->operands[i] == IA64_OPND_F3
7985 || idesc->operands[i] == IA64_OPND_F4)
7987 specs[count] = tmpl;
7988 specs[count++].index =
7989 CURR_SLOT.opnd[i].X_add_number - REG_FR;
7998 /* This reference applies only to the GR whose value is loaded with
7999 data returned from memory. */
8000 specs[count] = tmpl;
8001 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8007 for (i = 0; i < idesc->num_outputs; i++)
8008 if (idesc->operands[i] == IA64_OPND_R1
8009 || idesc->operands[i] == IA64_OPND_R2
8010 || idesc->operands[i] == IA64_OPND_R3)
8012 specs[count] = tmpl;
8013 specs[count++].index =
8014 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8016 if (idesc->flags & IA64_OPCODE_POSTINC)
8017 for (i = 0; i < NELEMS (idesc->operands); i++)
8018 if (idesc->operands[i] == IA64_OPND_MR3)
8020 specs[count] = tmpl;
8021 specs[count++].index =
8022 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8027 /* Look for anything that reads a GR. */
8028 for (i = 0; i < NELEMS (idesc->operands); i++)
8030 if (idesc->operands[i] == IA64_OPND_MR3
8031 || idesc->operands[i] == IA64_OPND_CPUID_R3
8032 || idesc->operands[i] == IA64_OPND_DBR_R3
8033 || idesc->operands[i] == IA64_OPND_IBR_R3
8034 || idesc->operands[i] == IA64_OPND_MSR_R3
8035 || idesc->operands[i] == IA64_OPND_PKR_R3
8036 || idesc->operands[i] == IA64_OPND_PMC_R3
8037 || idesc->operands[i] == IA64_OPND_PMD_R3
8038 || idesc->operands[i] == IA64_OPND_RR_R3
8039 || ((i >= idesc->num_outputs)
8040 && (idesc->operands[i] == IA64_OPND_R1
8041 || idesc->operands[i] == IA64_OPND_R2
8042 || idesc->operands[i] == IA64_OPND_R3
8043 /* addl source register. */
8044 || idesc->operands[i] == IA64_OPND_R3_2)))
8046 specs[count] = tmpl;
8047 specs[count++].index =
8048 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8059 /* This is the same as IA64_RS_PRr, except that the register range is
8060 from 1 - 15, and there are no rotating register reads/writes here. */
8064 for (i = 1; i < 16; i++)
8066 specs[count] = tmpl;
8067 specs[count++].index = i;
8073 /* Mark only those registers indicated by the mask. */
8076 mask = CURR_SLOT.opnd[2].X_add_number;
8077 for (i = 1; i < 16; i++)
8078 if (mask & ((valueT) 1 << i))
8080 specs[count] = tmpl;
8081 specs[count++].index = i;
8089 else if (note == 11) /* note 11 implies note 1 as well */
8093 for (i = 0; i < idesc->num_outputs; i++)
8095 if (idesc->operands[i] == IA64_OPND_P1
8096 || idesc->operands[i] == IA64_OPND_P2)
8098 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8099 if (regno >= 1 && regno < 16)
8101 specs[count] = tmpl;
8102 specs[count++].index = regno;
8112 else if (note == 12)
8114 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8116 specs[count] = tmpl;
8117 specs[count++].index = CURR_SLOT.qp_regno;
8124 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8125 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8126 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8127 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8129 if ((idesc->operands[0] == IA64_OPND_P1
8130 || idesc->operands[0] == IA64_OPND_P2)
8131 && p1 >= 1 && p1 < 16)
8133 specs[count] = tmpl;
8134 specs[count].cmp_type =
8135 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8136 specs[count++].index = p1;
8138 if ((idesc->operands[1] == IA64_OPND_P1
8139 || idesc->operands[1] == IA64_OPND_P2)
8140 && p2 >= 1 && p2 < 16)
8142 specs[count] = tmpl;
8143 specs[count].cmp_type =
8144 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8145 specs[count++].index = p2;
8150 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8152 specs[count] = tmpl;
8153 specs[count++].index = CURR_SLOT.qp_regno;
8155 if (idesc->operands[1] == IA64_OPND_PR)
8157 for (i = 1; i < 16; i++)
8159 specs[count] = tmpl;
8160 specs[count++].index = i;
8171 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8172 simplified cases of this. */
8176 for (i = 16; i < 63; i++)
8178 specs[count] = tmpl;
8179 specs[count++].index = i;
8185 /* Mark only those registers indicated by the mask. */
8187 && idesc->operands[0] == IA64_OPND_PR)
8189 mask = CURR_SLOT.opnd[2].X_add_number;
8190 if (mask & ((valueT) 1 << 16))
8191 for (i = 16; i < 63; i++)
8193 specs[count] = tmpl;
8194 specs[count++].index = i;
8198 && idesc->operands[0] == IA64_OPND_PR_ROT)
8200 for (i = 16; i < 63; i++)
8202 specs[count] = tmpl;
8203 specs[count++].index = i;
8211 else if (note == 11) /* note 11 implies note 1 as well */
8215 for (i = 0; i < idesc->num_outputs; i++)
8217 if (idesc->operands[i] == IA64_OPND_P1
8218 || idesc->operands[i] == IA64_OPND_P2)
8220 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8221 if (regno >= 16 && regno < 63)
8223 specs[count] = tmpl;
8224 specs[count++].index = regno;
8234 else if (note == 12)
8236 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8238 specs[count] = tmpl;
8239 specs[count++].index = CURR_SLOT.qp_regno;
8246 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8247 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8248 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8249 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8251 if ((idesc->operands[0] == IA64_OPND_P1
8252 || idesc->operands[0] == IA64_OPND_P2)
8253 && p1 >= 16 && p1 < 63)
8255 specs[count] = tmpl;
8256 specs[count].cmp_type =
8257 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8258 specs[count++].index = p1;
8260 if ((idesc->operands[1] == IA64_OPND_P1
8261 || idesc->operands[1] == IA64_OPND_P2)
8262 && p2 >= 16 && p2 < 63)
8264 specs[count] = tmpl;
8265 specs[count].cmp_type =
8266 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8267 specs[count++].index = p2;
8272 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8274 specs[count] = tmpl;
8275 specs[count++].index = CURR_SLOT.qp_regno;
8277 if (idesc->operands[1] == IA64_OPND_PR)
8279 for (i = 16; i < 63; i++)
8281 specs[count] = tmpl;
8282 specs[count++].index = i;
8294 /* Verify that the instruction is using the PSR bit indicated in
8298 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8300 if (dep->regindex < 6)
8302 specs[count++] = tmpl;
8305 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8307 if (dep->regindex < 32
8308 || dep->regindex == 35
8309 || dep->regindex == 36
8310 || (!rsrc_write && dep->regindex == PSR_CPL))
8312 specs[count++] = tmpl;
8315 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8317 if (dep->regindex < 32
8318 || dep->regindex == 35
8319 || dep->regindex == 36
8320 || (rsrc_write && dep->regindex == PSR_CPL))
8322 specs[count++] = tmpl;
8327 /* Several PSR bits have very specific dependencies. */
8328 switch (dep->regindex)
8331 specs[count++] = tmpl;
8336 specs[count++] = tmpl;
8340 /* Only certain CR accesses use PSR.ic */
8341 if (idesc->operands[0] == IA64_OPND_CR3
8342 || idesc->operands[1] == IA64_OPND_CR3)
8345 ((idesc->operands[0] == IA64_OPND_CR3)
8348 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8363 specs[count++] = tmpl;
8372 specs[count++] = tmpl;
8376 /* Only some AR accesses use cpl */
8377 if (idesc->operands[0] == IA64_OPND_AR3
8378 || idesc->operands[1] == IA64_OPND_AR3)
8381 ((idesc->operands[0] == IA64_OPND_AR3)
8384 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8391 && regno <= AR_K7))))
8393 specs[count++] = tmpl;
8398 specs[count++] = tmpl;
8408 if (idesc->operands[0] == IA64_OPND_IMMU24)
8410 mask = CURR_SLOT.opnd[0].X_add_number;
8416 if (mask & ((valueT) 1 << dep->regindex))
8418 specs[count++] = tmpl;
8423 int min = dep->regindex == PSR_DFL ? 2 : 32;
8424 int max = dep->regindex == PSR_DFL ? 31 : 127;
8425 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8426 for (i = 0; i < NELEMS (idesc->operands); i++)
8428 if (idesc->operands[i] == IA64_OPND_F1
8429 || idesc->operands[i] == IA64_OPND_F2
8430 || idesc->operands[i] == IA64_OPND_F3
8431 || idesc->operands[i] == IA64_OPND_F4)
8433 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8434 if (reg >= min && reg <= max)
8436 specs[count++] = tmpl;
8443 int min = dep->regindex == PSR_MFL ? 2 : 32;
8444 int max = dep->regindex == PSR_MFL ? 31 : 127;
8445 /* mfh is read on writes to FR32-127; mfl is read on writes to
8447 for (i = 0; i < idesc->num_outputs; i++)
8449 if (idesc->operands[i] == IA64_OPND_F1)
8451 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8452 if (reg >= min && reg <= max)
8454 specs[count++] = tmpl;
8459 else if (note == 10)
8461 for (i = 0; i < NELEMS (idesc->operands); i++)
8463 if (idesc->operands[i] == IA64_OPND_R1
8464 || idesc->operands[i] == IA64_OPND_R2
8465 || idesc->operands[i] == IA64_OPND_R3)
8467 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8468 if (regno >= 16 && regno <= 31)
8470 specs[count++] = tmpl;
8481 case IA64_RS_AR_FPSR:
8482 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8484 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8485 if (regno == AR_FPSR)
8487 specs[count++] = tmpl;
8492 specs[count++] = tmpl;
8497 /* Handle all AR[REG] resources */
8498 if (note == 0 || note == 1)
8500 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8501 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8502 && regno == dep->regindex)
8504 specs[count++] = tmpl;
8506 /* other AR[REG] resources may be affected by AR accesses */
8507 else if (idesc->operands[0] == IA64_OPND_AR3)
8510 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8511 switch (dep->regindex)
8517 if (regno == AR_BSPSTORE)
8519 specs[count++] = tmpl;
8523 (regno == AR_BSPSTORE
8524 || regno == AR_RNAT))
8526 specs[count++] = tmpl;
8531 else if (idesc->operands[1] == IA64_OPND_AR3)
8534 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8535 switch (dep->regindex)
8540 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8542 specs[count++] = tmpl;
8549 specs[count++] = tmpl;
8559 /* Handle all CR[REG] resources */
8560 if (note == 0 || note == 1)
8562 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8564 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8565 if (regno == dep->regindex)
8567 specs[count++] = tmpl;
8569 else if (!rsrc_write)
8571 /* Reads from CR[IVR] affect other resources. */
8572 if (regno == CR_IVR)
8574 if ((dep->regindex >= CR_IRR0
8575 && dep->regindex <= CR_IRR3)
8576 || dep->regindex == CR_TPR)
8578 specs[count++] = tmpl;
8585 specs[count++] = tmpl;
8594 case IA64_RS_INSERVICE:
8595 /* look for write of EOI (67) or read of IVR (65) */
8596 if ((idesc->operands[0] == IA64_OPND_CR3
8597 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8598 || (idesc->operands[1] == IA64_OPND_CR3
8599 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8601 specs[count++] = tmpl;
8608 specs[count++] = tmpl;
8619 specs[count++] = tmpl;
8623 /* Check if any of the registers accessed are in the rotating region.
8624 mov to/from pr accesses CFM only when qp_regno is in the rotating
8626 for (i = 0; i < NELEMS (idesc->operands); i++)
8628 if (idesc->operands[i] == IA64_OPND_R1
8629 || idesc->operands[i] == IA64_OPND_R2
8630 || idesc->operands[i] == IA64_OPND_R3)
8632 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8633 /* Assumes that md.rot.num_regs is always valid */
8634 if (md.rot.num_regs > 0
8636 && num < 31 + md.rot.num_regs)
8638 specs[count] = tmpl;
8639 specs[count++].specific = 0;
8642 else if (idesc->operands[i] == IA64_OPND_F1
8643 || idesc->operands[i] == IA64_OPND_F2
8644 || idesc->operands[i] == IA64_OPND_F3
8645 || idesc->operands[i] == IA64_OPND_F4)
8647 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8650 specs[count] = tmpl;
8651 specs[count++].specific = 0;
8654 else if (idesc->operands[i] == IA64_OPND_P1
8655 || idesc->operands[i] == IA64_OPND_P2)
8657 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8660 specs[count] = tmpl;
8661 specs[count++].specific = 0;
8665 if (CURR_SLOT.qp_regno > 15)
8667 specs[count] = tmpl;
8668 specs[count++].specific = 0;
8673 /* This is the same as IA64_RS_PRr, except simplified to account for
8674 the fact that there is only one register. */
8678 specs[count++] = tmpl;
8683 if (idesc->operands[2] == IA64_OPND_IMM17)
8684 mask = CURR_SLOT.opnd[2].X_add_number;
8685 if (mask & ((valueT) 1 << 63))
8686 specs[count++] = tmpl;
8688 else if (note == 11)
8690 if ((idesc->operands[0] == IA64_OPND_P1
8691 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8692 || (idesc->operands[1] == IA64_OPND_P2
8693 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8695 specs[count++] = tmpl;
8698 else if (note == 12)
8700 if (CURR_SLOT.qp_regno == 63)
8702 specs[count++] = tmpl;
8709 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8710 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8711 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8712 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8715 && (idesc->operands[0] == IA64_OPND_P1
8716 || idesc->operands[0] == IA64_OPND_P2))
8718 specs[count] = tmpl;
8719 specs[count++].cmp_type =
8720 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8723 && (idesc->operands[1] == IA64_OPND_P1
8724 || idesc->operands[1] == IA64_OPND_P2))
8726 specs[count] = tmpl;
8727 specs[count++].cmp_type =
8728 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8733 if (CURR_SLOT.qp_regno == 63)
8735 specs[count++] = tmpl;
8746 /* FIXME we can identify some individual RSE written resources, but RSE
8747 read resources have not yet been completely identified, so for now
8748 treat RSE as a single resource */
8749 if (strncmp (idesc->name, "mov", 3) == 0)
8753 if (idesc->operands[0] == IA64_OPND_AR3
8754 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8756 specs[count] = tmpl;
8757 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8762 if (idesc->operands[0] == IA64_OPND_AR3)
8764 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8765 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8767 specs[count++] = tmpl;
8770 else if (idesc->operands[1] == IA64_OPND_AR3)
8772 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8773 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8774 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8776 specs[count++] = tmpl;
8783 specs[count++] = tmpl;
8788 /* FIXME -- do any of these need to be non-specific? */
8789 specs[count++] = tmpl;
8793 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8800 /* Clear branch flags on marked resources. This breaks the link between the
8801 QP of the marking instruction and a subsequent branch on the same QP. */
8804 clear_qp_branch_flag (mask)
8808 for (i = 0; i < regdepslen; i++)
8810 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8811 if ((bit & mask) != 0)
8813 regdeps[i].link_to_qp_branch = 0;
8818 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8819 any mutexes which contain one of the PRs and create new ones when
8823 update_qp_mutex (valueT mask)
8829 while (i < qp_mutexeslen)
8831 if ((qp_mutexes[i].prmask & mask) != 0)
8833 /* If it destroys and creates the same mutex, do nothing. */
8834 if (qp_mutexes[i].prmask == mask
8835 && qp_mutexes[i].path == md.path)
8846 fprintf (stderr, " Clearing mutex relation");
8847 print_prmask (qp_mutexes[i].prmask);
8848 fprintf (stderr, "\n");
8851 /* Deal with the old mutex with more than 3+ PRs only if
8852 the new mutex on the same execution path with it.
8854 FIXME: The 3+ mutex support is incomplete.
8855 dot_pred_rel () may be a better place to fix it. */
8856 if (qp_mutexes[i].path == md.path)
8858 /* If it is a proper subset of the mutex, create a
8861 && (qp_mutexes[i].prmask & mask) == mask)
8864 qp_mutexes[i].prmask &= ~mask;
8865 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8867 /* Modify the mutex if there are more than one
8875 /* Remove the mutex. */
8876 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8884 add_qp_mutex (mask);
8889 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8891 Any changes to a PR clears the mutex relations which include that PR. */
8894 clear_qp_mutex (mask)
8900 while (i < qp_mutexeslen)
8902 if ((qp_mutexes[i].prmask & mask) != 0)
8906 fprintf (stderr, " Clearing mutex relation");
8907 print_prmask (qp_mutexes[i].prmask);
8908 fprintf (stderr, "\n");
8910 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8917 /* Clear implies relations which contain PRs in the given masks.
8918 P1_MASK indicates the source of the implies relation, while P2_MASK
8919 indicates the implied PR. */
8922 clear_qp_implies (p1_mask, p2_mask)
8929 while (i < qp_implieslen)
8931 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8932 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8935 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8936 qp_implies[i].p1, qp_implies[i].p2);
8937 qp_implies[i] = qp_implies[--qp_implieslen];
8944 /* Add the PRs specified to the list of implied relations. */
8947 add_qp_imply (p1, p2)
8954 /* p0 is not meaningful here. */
8955 if (p1 == 0 || p2 == 0)
8961 /* If it exists already, ignore it. */
8962 for (i = 0; i < qp_implieslen; i++)
8964 if (qp_implies[i].p1 == p1
8965 && qp_implies[i].p2 == p2
8966 && qp_implies[i].path == md.path
8967 && !qp_implies[i].p2_branched)
8971 if (qp_implieslen == qp_impliestotlen)
8973 qp_impliestotlen += 20;
8974 qp_implies = (struct qp_imply *)
8975 xrealloc ((void *) qp_implies,
8976 qp_impliestotlen * sizeof (struct qp_imply));
8979 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
8980 qp_implies[qp_implieslen].p1 = p1;
8981 qp_implies[qp_implieslen].p2 = p2;
8982 qp_implies[qp_implieslen].path = md.path;
8983 qp_implies[qp_implieslen++].p2_branched = 0;
8985 /* Add in the implied transitive relations; for everything that p2 implies,
8986 make p1 imply that, too; for everything that implies p1, make it imply p2
8988 for (i = 0; i < qp_implieslen; i++)
8990 if (qp_implies[i].p1 == p2)
8991 add_qp_imply (p1, qp_implies[i].p2);
8992 if (qp_implies[i].p2 == p1)
8993 add_qp_imply (qp_implies[i].p1, p2);
8995 /* Add in mutex relations implied by this implies relation; for each mutex
8996 relation containing p2, duplicate it and replace p2 with p1. */
8997 bit = (valueT) 1 << p1;
8998 mask = (valueT) 1 << p2;
8999 for (i = 0; i < qp_mutexeslen; i++)
9001 if (qp_mutexes[i].prmask & mask)
9002 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9006 /* Add the PRs specified in the mask to the mutex list; this means that only
9007 one of the PRs can be true at any time. PR0 should never be included in
9017 if (qp_mutexeslen == qp_mutexestotlen)
9019 qp_mutexestotlen += 20;
9020 qp_mutexes = (struct qpmutex *)
9021 xrealloc ((void *) qp_mutexes,
9022 qp_mutexestotlen * sizeof (struct qpmutex));
9026 fprintf (stderr, " Registering mutex on");
9027 print_prmask (mask);
9028 fprintf (stderr, "\n");
9030 qp_mutexes[qp_mutexeslen].path = md.path;
9031 qp_mutexes[qp_mutexeslen++].prmask = mask;
9035 has_suffix_p (name, suffix)
9039 size_t namelen = strlen (name);
9040 size_t sufflen = strlen (suffix);
9042 if (namelen <= sufflen)
9044 return strcmp (name + namelen - sufflen, suffix) == 0;
9048 clear_register_values ()
9052 fprintf (stderr, " Clearing register values\n");
9053 for (i = 1; i < NELEMS (gr_values); i++)
9054 gr_values[i].known = 0;
9057 /* Keep track of register values/changes which affect DV tracking.
9059 optimization note: should add a flag to classes of insns where otherwise we
9060 have to examine a group of strings to identify them. */
9063 note_register_values (idesc)
9064 struct ia64_opcode *idesc;
9066 valueT qp_changemask = 0;
9069 /* Invalidate values for registers being written to. */
9070 for (i = 0; i < idesc->num_outputs; i++)
9072 if (idesc->operands[i] == IA64_OPND_R1
9073 || idesc->operands[i] == IA64_OPND_R2
9074 || idesc->operands[i] == IA64_OPND_R3)
9076 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9077 if (regno > 0 && regno < NELEMS (gr_values))
9078 gr_values[regno].known = 0;
9080 else if (idesc->operands[i] == IA64_OPND_R3_2)
9082 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9083 if (regno > 0 && regno < 4)
9084 gr_values[regno].known = 0;
9086 else if (idesc->operands[i] == IA64_OPND_P1
9087 || idesc->operands[i] == IA64_OPND_P2)
9089 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9090 qp_changemask |= (valueT) 1 << regno;
9092 else if (idesc->operands[i] == IA64_OPND_PR)
9094 if (idesc->operands[2] & (valueT) 0x10000)
9095 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9097 qp_changemask = idesc->operands[2];
9100 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9102 if (idesc->operands[1] & ((valueT) 1 << 43))
9103 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9105 qp_changemask = idesc->operands[1];
9106 qp_changemask &= ~(valueT) 0xFFFF;
9111 /* Always clear qp branch flags on any PR change. */
9112 /* FIXME there may be exceptions for certain compares. */
9113 clear_qp_branch_flag (qp_changemask);
9115 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9116 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9118 qp_changemask |= ~(valueT) 0xFFFF;
9119 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9121 for (i = 32; i < 32 + md.rot.num_regs; i++)
9122 gr_values[i].known = 0;
9124 clear_qp_mutex (qp_changemask);
9125 clear_qp_implies (qp_changemask, qp_changemask);
9127 /* After a call, all register values are undefined, except those marked
9129 else if (strncmp (idesc->name, "br.call", 6) == 0
9130 || strncmp (idesc->name, "brl.call", 7) == 0)
9132 /* FIXME keep GR values which are marked as "safe_across_calls" */
9133 clear_register_values ();
9134 clear_qp_mutex (~qp_safe_across_calls);
9135 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9136 clear_qp_branch_flag (~qp_safe_across_calls);
9138 else if (is_interruption_or_rfi (idesc)
9139 || is_taken_branch (idesc))
9141 clear_register_values ();
9142 clear_qp_mutex (~(valueT) 0);
9143 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9145 /* Look for mutex and implies relations. */
9146 else if ((idesc->operands[0] == IA64_OPND_P1
9147 || idesc->operands[0] == IA64_OPND_P2)
9148 && (idesc->operands[1] == IA64_OPND_P1
9149 || idesc->operands[1] == IA64_OPND_P2))
9151 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9152 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9153 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9154 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9156 /* If both PRs are PR0, we can't really do anything. */
9157 if (p1 == 0 && p2 == 0)
9160 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9162 /* In general, clear mutexes and implies which include P1 or P2,
9163 with the following exceptions. */
9164 else if (has_suffix_p (idesc->name, ".or.andcm")
9165 || has_suffix_p (idesc->name, ".and.orcm"))
9167 clear_qp_implies (p2mask, p1mask);
9169 else if (has_suffix_p (idesc->name, ".andcm")
9170 || has_suffix_p (idesc->name, ".and"))
9172 clear_qp_implies (0, p1mask | p2mask);
9174 else if (has_suffix_p (idesc->name, ".orcm")
9175 || has_suffix_p (idesc->name, ".or"))
9177 clear_qp_mutex (p1mask | p2mask);
9178 clear_qp_implies (p1mask | p2mask, 0);
9184 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9186 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9187 if (p1 == 0 || p2 == 0)
9188 clear_qp_mutex (p1mask | p2mask);
9190 added = update_qp_mutex (p1mask | p2mask);
9192 if (CURR_SLOT.qp_regno == 0
9193 || has_suffix_p (idesc->name, ".unc"))
9195 if (added == 0 && p1 && p2)
9196 add_qp_mutex (p1mask | p2mask);
9197 if (CURR_SLOT.qp_regno != 0)
9200 add_qp_imply (p1, CURR_SLOT.qp_regno);
9202 add_qp_imply (p2, CURR_SLOT.qp_regno);
9207 /* Look for mov imm insns into GRs. */
9208 else if (idesc->operands[0] == IA64_OPND_R1
9209 && (idesc->operands[1] == IA64_OPND_IMM22
9210 || idesc->operands[1] == IA64_OPND_IMMU64)
9211 && (strcmp (idesc->name, "mov") == 0
9212 || strcmp (idesc->name, "movl") == 0))
9214 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9215 if (regno > 0 && regno < NELEMS (gr_values))
9217 gr_values[regno].known = 1;
9218 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9219 gr_values[regno].path = md.path;
9222 fprintf (stderr, " Know gr%d = ", regno);
9223 fprintf_vma (stderr, gr_values[regno].value);
9224 fputs ("\n", stderr);
9230 clear_qp_mutex (qp_changemask);
9231 clear_qp_implies (qp_changemask, qp_changemask);
9235 /* Return whether the given predicate registers are currently mutex. */
9238 qp_mutex (p1, p2, path)
9248 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9249 for (i = 0; i < qp_mutexeslen; i++)
9251 if (qp_mutexes[i].path >= path
9252 && (qp_mutexes[i].prmask & mask) == mask)
9259 /* Return whether the given resource is in the given insn's list of chks
9260 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9264 resources_match (rs, idesc, note, qp_regno, path)
9266 struct ia64_opcode *idesc;
9271 struct rsrc specs[MAX_SPECS];
9274 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9275 we don't need to check. One exception is note 11, which indicates that
9276 target predicates are written regardless of PR[qp]. */
9277 if (qp_mutex (rs->qp_regno, qp_regno, path)
9281 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9284 /* UNAT checking is a bit more specific than other resources */
9285 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9286 && specs[count].mem_offset.hint
9287 && rs->mem_offset.hint)
9289 if (rs->mem_offset.base == specs[count].mem_offset.base)
9291 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9292 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9299 /* Skip apparent PR write conflicts where both writes are an AND or both
9300 writes are an OR. */
9301 if (rs->dependency->specifier == IA64_RS_PR
9302 || rs->dependency->specifier == IA64_RS_PRr
9303 || rs->dependency->specifier == IA64_RS_PR63)
9305 if (specs[count].cmp_type != CMP_NONE
9306 && specs[count].cmp_type == rs->cmp_type)
9309 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9310 dv_mode[rs->dependency->mode],
9311 rs->dependency->specifier != IA64_RS_PR63 ?
9312 specs[count].index : 63);
9317 " %s on parallel compare conflict %s vs %s on PR%d\n",
9318 dv_mode[rs->dependency->mode],
9319 dv_cmp_type[rs->cmp_type],
9320 dv_cmp_type[specs[count].cmp_type],
9321 rs->dependency->specifier != IA64_RS_PR63 ?
9322 specs[count].index : 63);
9326 /* If either resource is not specific, conservatively assume a conflict
9328 if (!specs[count].specific || !rs->specific)
9330 else if (specs[count].index == rs->index)
9335 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9341 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9342 insert a stop to create the break. Update all resource dependencies
9343 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9344 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9345 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9349 insn_group_break (insert_stop, qp_regno, save_current)
9356 if (insert_stop && md.num_slots_in_use > 0)
9357 PREV_SLOT.end_of_insn_group = 1;
9361 fprintf (stderr, " Insn group break%s",
9362 (insert_stop ? " (w/stop)" : ""));
9364 fprintf (stderr, " effective for QP=%d", qp_regno);
9365 fprintf (stderr, "\n");
9369 while (i < regdepslen)
9371 const struct ia64_dependency *dep = regdeps[i].dependency;
9374 && regdeps[i].qp_regno != qp_regno)
9381 && CURR_SLOT.src_file == regdeps[i].file
9382 && CURR_SLOT.src_line == regdeps[i].line)
9388 /* clear dependencies which are automatically cleared by a stop, or
9389 those that have reached the appropriate state of insn serialization */
9390 if (dep->semantics == IA64_DVS_IMPLIED
9391 || dep->semantics == IA64_DVS_IMPLIEDF
9392 || regdeps[i].insn_srlz == STATE_SRLZ)
9394 print_dependency ("Removing", i);
9395 regdeps[i] = regdeps[--regdepslen];
9399 if (dep->semantics == IA64_DVS_DATA
9400 || dep->semantics == IA64_DVS_INSTR
9401 || dep->semantics == IA64_DVS_SPECIFIC)
9403 if (regdeps[i].insn_srlz == STATE_NONE)
9404 regdeps[i].insn_srlz = STATE_STOP;
9405 if (regdeps[i].data_srlz == STATE_NONE)
9406 regdeps[i].data_srlz = STATE_STOP;
9413 /* Add the given resource usage spec to the list of active dependencies. */
9416 mark_resource (idesc, dep, spec, depind, path)
9417 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9418 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9423 if (regdepslen == regdepstotlen)
9425 regdepstotlen += 20;
9426 regdeps = (struct rsrc *)
9427 xrealloc ((void *) regdeps,
9428 regdepstotlen * sizeof (struct rsrc));
9431 regdeps[regdepslen] = *spec;
9432 regdeps[regdepslen].depind = depind;
9433 regdeps[regdepslen].path = path;
9434 regdeps[regdepslen].file = CURR_SLOT.src_file;
9435 regdeps[regdepslen].line = CURR_SLOT.src_line;
9437 print_dependency ("Adding", regdepslen);
9443 print_dependency (action, depind)
9449 fprintf (stderr, " %s %s '%s'",
9450 action, dv_mode[(regdeps[depind].dependency)->mode],
9451 (regdeps[depind].dependency)->name);
9452 if (regdeps[depind].specific && regdeps[depind].index != 0)
9453 fprintf (stderr, " (%d)", regdeps[depind].index);
9454 if (regdeps[depind].mem_offset.hint)
9456 fputs (" ", stderr);
9457 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9458 fputs ("+", stderr);
9459 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9461 fprintf (stderr, "\n");
9466 instruction_serialization ()
9470 fprintf (stderr, " Instruction serialization\n");
9471 for (i = 0; i < regdepslen; i++)
9472 if (regdeps[i].insn_srlz == STATE_STOP)
9473 regdeps[i].insn_srlz = STATE_SRLZ;
9477 data_serialization ()
9481 fprintf (stderr, " Data serialization\n");
9482 while (i < regdepslen)
9484 if (regdeps[i].data_srlz == STATE_STOP
9485 /* Note: as of 991210, all "other" dependencies are cleared by a
9486 data serialization. This might change with new tables */
9487 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9489 print_dependency ("Removing", i);
9490 regdeps[i] = regdeps[--regdepslen];
9497 /* Insert stops and serializations as needed to avoid DVs. */
9500 remove_marked_resource (rs)
9503 switch (rs->dependency->semantics)
9505 case IA64_DVS_SPECIFIC:
9507 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9508 /* ...fall through... */
9509 case IA64_DVS_INSTR:
9511 fprintf (stderr, "Inserting instr serialization\n");
9512 if (rs->insn_srlz < STATE_STOP)
9513 insn_group_break (1, 0, 0);
9514 if (rs->insn_srlz < STATE_SRLZ)
9516 int oldqp = CURR_SLOT.qp_regno;
9517 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9518 /* Manually jam a srlz.i insn into the stream */
9519 CURR_SLOT.qp_regno = 0;
9520 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9521 instruction_serialization ();
9522 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9523 if (++md.num_slots_in_use >= NUM_SLOTS)
9525 CURR_SLOT.qp_regno = oldqp;
9526 CURR_SLOT.idesc = oldidesc;
9528 insn_group_break (1, 0, 0);
9530 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9531 "other" types of DV are eliminated
9532 by a data serialization */
9535 fprintf (stderr, "Inserting data serialization\n");
9536 if (rs->data_srlz < STATE_STOP)
9537 insn_group_break (1, 0, 0);
9539 int oldqp = CURR_SLOT.qp_regno;
9540 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9541 /* Manually jam a srlz.d insn into the stream */
9542 CURR_SLOT.qp_regno = 0;
9543 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9544 data_serialization ();
9545 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9546 if (++md.num_slots_in_use >= NUM_SLOTS)
9548 CURR_SLOT.qp_regno = oldqp;
9549 CURR_SLOT.idesc = oldidesc;
9552 case IA64_DVS_IMPLIED:
9553 case IA64_DVS_IMPLIEDF:
9555 fprintf (stderr, "Inserting stop\n");
9556 insn_group_break (1, 0, 0);
9563 /* Check the resources used by the given opcode against the current dependency
9566 The check is run once for each execution path encountered. In this case,
9567 a unique execution path is the sequence of instructions following a code
9568 entry point, e.g. the following has three execution paths, one starting
9569 at L0, one at L1, and one at L2.
9578 check_dependencies (idesc)
9579 struct ia64_opcode *idesc;
9581 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9585 /* Note that the number of marked resources may change within the
9586 loop if in auto mode. */
9588 while (i < regdepslen)
9590 struct rsrc *rs = ®deps[i];
9591 const struct ia64_dependency *dep = rs->dependency;
9596 if (dep->semantics == IA64_DVS_NONE
9597 || (chkind = depends_on (rs->depind, idesc)) == -1)
9603 note = NOTE (opdeps->chks[chkind]);
9605 /* Check this resource against each execution path seen thus far. */
9606 for (path = 0; path <= md.path; path++)
9610 /* If the dependency wasn't on the path being checked, ignore it. */
9611 if (rs->path < path)
9614 /* If the QP for this insn implies a QP which has branched, don't
9615 bother checking. Ed. NOTE: I don't think this check is terribly
9616 useful; what's the point of generating code which will only be
9617 reached if its QP is zero?
9618 This code was specifically inserted to handle the following code,
9619 based on notes from Intel's DV checking code, where p1 implies p2.
9625 if (CURR_SLOT.qp_regno != 0)
9629 for (implies = 0; implies < qp_implieslen; implies++)
9631 if (qp_implies[implies].path >= path
9632 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9633 && qp_implies[implies].p2_branched)
9643 if ((matchtype = resources_match (rs, idesc, note,
9644 CURR_SLOT.qp_regno, path)) != 0)
9647 char pathmsg[256] = "";
9648 char indexmsg[256] = "";
9649 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9652 sprintf (pathmsg, " when entry is at label '%s'",
9653 md.entry_labels[path - 1]);
9654 if (rs->specific && rs->index != 0)
9655 sprintf (indexmsg, ", specific resource number is %d",
9657 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9659 (certain ? "violates" : "may violate"),
9660 dv_mode[dep->mode], dep->name,
9661 dv_sem[dep->semantics],
9664 if (md.explicit_mode)
9666 as_warn ("%s", msg);
9668 as_warn (_("Only the first path encountering the conflict "
9670 as_warn_where (rs->file, rs->line,
9671 _("This is the location of the "
9672 "conflicting usage"));
9673 /* Don't bother checking other paths, to avoid duplicating
9680 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9682 remove_marked_resource (rs);
9684 /* since the set of dependencies has changed, start over */
9685 /* FIXME -- since we're removing dvs as we go, we
9686 probably don't really need to start over... */
9699 /* Register new dependencies based on the given opcode. */
9702 mark_resources (idesc)
9703 struct ia64_opcode *idesc;
9706 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9707 int add_only_qp_reads = 0;
9709 /* A conditional branch only uses its resources if it is taken; if it is
9710 taken, we stop following that path. The other branch types effectively
9711 *always* write their resources. If it's not taken, register only QP
9713 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9715 add_only_qp_reads = 1;
9719 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9721 for (i = 0; i < opdeps->nregs; i++)
9723 const struct ia64_dependency *dep;
9724 struct rsrc specs[MAX_SPECS];
9729 dep = ia64_find_dependency (opdeps->regs[i]);
9730 note = NOTE (opdeps->regs[i]);
9732 if (add_only_qp_reads
9733 && !(dep->mode == IA64_DV_WAR
9734 && (dep->specifier == IA64_RS_PR
9735 || dep->specifier == IA64_RS_PRr
9736 || dep->specifier == IA64_RS_PR63)))
9739 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9742 if (md.debug_dv && !count)
9743 fprintf (stderr, " No %s %s usage found (path %d)\n",
9744 dv_mode[dep->mode], dep->name, md.path);
9749 mark_resource (idesc, dep, &specs[count],
9750 DEP (opdeps->regs[i]), md.path);
9753 /* The execution path may affect register values, which may in turn
9754 affect which indirect-access resources are accessed. */
9755 switch (dep->specifier)
9767 for (path = 0; path < md.path; path++)
9769 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9771 mark_resource (idesc, dep, &specs[count],
9772 DEP (opdeps->regs[i]), path);
9779 /* Remove dependencies when they no longer apply. */
9782 update_dependencies (idesc)
9783 struct ia64_opcode *idesc;
9787 if (strcmp (idesc->name, "srlz.i") == 0)
9789 instruction_serialization ();
9791 else if (strcmp (idesc->name, "srlz.d") == 0)
9793 data_serialization ();
9795 else if (is_interruption_or_rfi (idesc)
9796 || is_taken_branch (idesc))
9798 /* Although technically the taken branch doesn't clear dependencies
9799 which require a srlz.[id], we don't follow the branch; the next
9800 instruction is assumed to start with a clean slate. */
9804 else if (is_conditional_branch (idesc)
9805 && CURR_SLOT.qp_regno != 0)
9807 int is_call = strstr (idesc->name, ".call") != NULL;
9809 for (i = 0; i < qp_implieslen; i++)
9811 /* If the conditional branch's predicate is implied by the predicate
9812 in an existing dependency, remove that dependency. */
9813 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9816 /* Note that this implied predicate takes a branch so that if
9817 a later insn generates a DV but its predicate implies this
9818 one, we can avoid the false DV warning. */
9819 qp_implies[i].p2_branched = 1;
9820 while (depind < regdepslen)
9822 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9824 print_dependency ("Removing", depind);
9825 regdeps[depind] = regdeps[--regdepslen];
9832 /* Any marked resources which have this same predicate should be
9833 cleared, provided that the QP hasn't been modified between the
9834 marking instruction and the branch. */
9837 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9842 while (i < regdepslen)
9844 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9845 && regdeps[i].link_to_qp_branch
9846 && (regdeps[i].file != CURR_SLOT.src_file
9847 || regdeps[i].line != CURR_SLOT.src_line))
9849 /* Treat like a taken branch */
9850 print_dependency ("Removing", i);
9851 regdeps[i] = regdeps[--regdepslen];
9860 /* Examine the current instruction for dependency violations. */
9864 struct ia64_opcode *idesc;
9868 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9869 idesc->name, CURR_SLOT.src_line,
9870 idesc->dependencies->nchks,
9871 idesc->dependencies->nregs);
9874 /* Look through the list of currently marked resources; if the current
9875 instruction has the dependency in its chks list which uses that resource,
9876 check against the specific resources used. */
9877 check_dependencies (idesc);
9879 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9880 then add them to the list of marked resources. */
9881 mark_resources (idesc);
9883 /* There are several types of dependency semantics, and each has its own
9884 requirements for being cleared
9886 Instruction serialization (insns separated by interruption, rfi, or
9887 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9889 Data serialization (instruction serialization, or writer + srlz.d +
9890 reader, where writer and srlz.d are in separate groups) clears
9891 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9892 always be the case).
9894 Instruction group break (groups separated by stop, taken branch,
9895 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9897 update_dependencies (idesc);
9899 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9900 warning. Keep track of as many as possible that are useful. */
9901 note_register_values (idesc);
9903 /* We don't need or want this anymore. */
9904 md.mem_offset.hint = 0;
9909 /* Translate one line of assembly. Pseudo ops and labels do not show
9915 char *saved_input_line_pointer, *mnemonic;
9916 const struct pseudo_opcode *pdesc;
9917 struct ia64_opcode *idesc;
9918 unsigned char qp_regno;
9922 saved_input_line_pointer = input_line_pointer;
9923 input_line_pointer = str;
9925 /* extract the opcode (mnemonic): */
9927 mnemonic = input_line_pointer;
9928 ch = get_symbol_end ();
9929 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9932 *input_line_pointer = ch;
9933 (*pdesc->handler) (pdesc->arg);
9937 /* Find the instruction descriptor matching the arguments. */
9939 idesc = ia64_find_opcode (mnemonic);
9940 *input_line_pointer = ch;
9943 as_bad ("Unknown opcode `%s'", mnemonic);
9947 idesc = parse_operands (idesc);
9951 /* Handle the dynamic ops we can handle now: */
9952 if (idesc->type == IA64_TYPE_DYN)
9954 if (strcmp (idesc->name, "add") == 0)
9956 if (CURR_SLOT.opnd[2].X_op == O_register
9957 && CURR_SLOT.opnd[2].X_add_number < 4)
9961 ia64_free_opcode (idesc);
9962 idesc = ia64_find_opcode (mnemonic);
9964 know (!idesc->next);
9967 else if (strcmp (idesc->name, "mov") == 0)
9969 enum ia64_opnd opnd1, opnd2;
9972 opnd1 = idesc->operands[0];
9973 opnd2 = idesc->operands[1];
9974 if (opnd1 == IA64_OPND_AR3)
9976 else if (opnd2 == IA64_OPND_AR3)
9980 if (CURR_SLOT.opnd[rop].X_op == O_register
9981 && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
9985 ia64_free_opcode (idesc);
9986 idesc = ia64_find_opcode (mnemonic);
9987 while (idesc != NULL
9988 && (idesc->operands[0] != opnd1
9989 || idesc->operands[1] != opnd2))
9990 idesc = get_next_opcode (idesc);
9995 if (md.qp.X_op == O_register)
9997 qp_regno = md.qp.X_add_number - REG_P;
9998 md.qp.X_op = O_absent;
10001 flags = idesc->flags;
10003 if ((flags & IA64_OPCODE_FIRST) != 0)
10005 /* The alignment frag has to end with a stop bit only if the
10006 next instruction after the alignment directive has to be
10007 the first instruction in an instruction group. */
10010 while (align_frag->fr_type != rs_align_code)
10012 align_frag = align_frag->fr_next;
10013 assert (align_frag);
10015 if (align_frag->fr_next == frag_now)
10016 align_frag->tc_frag_data = 1;
10019 insn_group_break (1, 0, 0);
10023 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10025 as_bad ("`%s' cannot be predicated", idesc->name);
10029 /* Build the instruction. */
10030 CURR_SLOT.qp_regno = qp_regno;
10031 CURR_SLOT.idesc = idesc;
10032 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10033 dwarf2_where (&CURR_SLOT.debug_line);
10035 /* Add unwind entry, if there is one. */
10036 if (unwind.current_entry)
10038 CURR_SLOT.unwind_record = unwind.current_entry;
10039 unwind.current_entry = NULL;
10042 /* Check for dependency violations. */
10046 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10047 if (++md.num_slots_in_use >= NUM_SLOTS)
10048 emit_one_bundle ();
10050 if ((flags & IA64_OPCODE_LAST) != 0)
10051 insn_group_break (1, 0, 0);
10053 md.last_text_seg = now_seg;
10056 input_line_pointer = saved_input_line_pointer;
10059 /* Called when symbol NAME cannot be found in the symbol table.
10060 Should be used for dynamic valued symbols only. */
10063 md_undefined_symbol (name)
10064 char *name ATTRIBUTE_UNUSED;
10069 /* Called for any expression that can not be recognized. When the
10070 function is called, `input_line_pointer' will point to the start of
10077 enum pseudo_type pseudo_type;
10082 switch (*input_line_pointer)
10085 /* Find what relocation pseudo-function we're dealing with. */
10087 ch = *++input_line_pointer;
10088 for (i = 0; i < NELEMS (pseudo_func); ++i)
10089 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10091 len = strlen (pseudo_func[i].name);
10092 if (strncmp (pseudo_func[i].name + 1,
10093 input_line_pointer + 1, len - 1) == 0
10094 && !is_part_of_name (input_line_pointer[len]))
10096 input_line_pointer += len;
10097 pseudo_type = pseudo_func[i].type;
10101 switch (pseudo_type)
10103 case PSEUDO_FUNC_RELOC:
10104 SKIP_WHITESPACE ();
10105 if (*input_line_pointer != '(')
10107 as_bad ("Expected '('");
10111 ++input_line_pointer;
10113 if (*input_line_pointer++ != ')')
10115 as_bad ("Missing ')'");
10118 if (e->X_op != O_symbol)
10120 if (e->X_op != O_pseudo_fixup)
10122 as_bad ("Not a symbolic expression");
10125 if (i != FUNC_LT_RELATIVE)
10127 as_bad ("Illegal combination of relocation functions");
10130 switch (S_GET_VALUE (e->X_op_symbol))
10132 case FUNC_FPTR_RELATIVE:
10133 i = FUNC_LT_FPTR_RELATIVE; break;
10134 case FUNC_DTP_MODULE:
10135 i = FUNC_LT_DTP_MODULE; break;
10136 case FUNC_DTP_RELATIVE:
10137 i = FUNC_LT_DTP_RELATIVE; break;
10138 case FUNC_TP_RELATIVE:
10139 i = FUNC_LT_TP_RELATIVE; break;
10141 as_bad ("Illegal combination of relocation functions");
10145 /* Make sure gas doesn't get rid of local symbols that are used
10147 e->X_op = O_pseudo_fixup;
10148 e->X_op_symbol = pseudo_func[i].u.sym;
10151 case PSEUDO_FUNC_CONST:
10152 e->X_op = O_constant;
10153 e->X_add_number = pseudo_func[i].u.ival;
10156 case PSEUDO_FUNC_REG:
10157 e->X_op = O_register;
10158 e->X_add_number = pseudo_func[i].u.ival;
10162 name = input_line_pointer - 1;
10164 as_bad ("Unknown pseudo function `%s'", name);
10170 ++input_line_pointer;
10172 if (*input_line_pointer != ']')
10174 as_bad ("Closing bracket misssing");
10179 if (e->X_op != O_register)
10180 as_bad ("Register expected as index");
10182 ++input_line_pointer;
10193 ignore_rest_of_line ();
10196 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10197 a section symbol plus some offset. For relocs involving @fptr(),
10198 directives we don't want such adjustments since we need to have the
10199 original symbol's name in the reloc. */
10201 ia64_fix_adjustable (fix)
10204 /* Prevent all adjustments to global symbols */
10205 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10208 switch (fix->fx_r_type)
10210 case BFD_RELOC_IA64_FPTR64I:
10211 case BFD_RELOC_IA64_FPTR32MSB:
10212 case BFD_RELOC_IA64_FPTR32LSB:
10213 case BFD_RELOC_IA64_FPTR64MSB:
10214 case BFD_RELOC_IA64_FPTR64LSB:
10215 case BFD_RELOC_IA64_LTOFF_FPTR22:
10216 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10226 ia64_force_relocation (fix)
10229 switch (fix->fx_r_type)
10231 case BFD_RELOC_IA64_FPTR64I:
10232 case BFD_RELOC_IA64_FPTR32MSB:
10233 case BFD_RELOC_IA64_FPTR32LSB:
10234 case BFD_RELOC_IA64_FPTR64MSB:
10235 case BFD_RELOC_IA64_FPTR64LSB:
10237 case BFD_RELOC_IA64_LTOFF22:
10238 case BFD_RELOC_IA64_LTOFF64I:
10239 case BFD_RELOC_IA64_LTOFF_FPTR22:
10240 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10241 case BFD_RELOC_IA64_PLTOFF22:
10242 case BFD_RELOC_IA64_PLTOFF64I:
10243 case BFD_RELOC_IA64_PLTOFF64MSB:
10244 case BFD_RELOC_IA64_PLTOFF64LSB:
10246 case BFD_RELOC_IA64_LTOFF22X:
10247 case BFD_RELOC_IA64_LDXMOV:
10254 return generic_force_reloc (fix);
10257 /* Decide from what point a pc-relative relocation is relative to,
10258 relative to the pc-relative fixup. Er, relatively speaking. */
10260 ia64_pcrel_from_section (fix, sec)
10264 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10266 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10273 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10275 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10279 expr.X_op = O_pseudo_fixup;
10280 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10281 expr.X_add_number = 0;
10282 expr.X_add_symbol = symbol;
10283 emit_expr (&expr, size);
10286 /* This is called whenever some data item (not an instruction) needs a
10287 fixup. We pick the right reloc code depending on the byteorder
10288 currently in effect. */
10290 ia64_cons_fix_new (f, where, nbytes, exp)
10296 bfd_reloc_code_real_type code;
10301 /* There are no reloc for 8 and 16 bit quantities, but we allow
10302 them here since they will work fine as long as the expression
10303 is fully defined at the end of the pass over the source file. */
10304 case 1: code = BFD_RELOC_8; break;
10305 case 2: code = BFD_RELOC_16; break;
10307 if (target_big_endian)
10308 code = BFD_RELOC_IA64_DIR32MSB;
10310 code = BFD_RELOC_IA64_DIR32LSB;
10314 /* In 32-bit mode, data8 could mean function descriptors too. */
10315 if (exp->X_op == O_pseudo_fixup
10316 && exp->X_op_symbol
10317 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10318 && !(md.flags & EF_IA_64_ABI64))
10320 if (target_big_endian)
10321 code = BFD_RELOC_IA64_IPLTMSB;
10323 code = BFD_RELOC_IA64_IPLTLSB;
10324 exp->X_op = O_symbol;
10329 if (target_big_endian)
10330 code = BFD_RELOC_IA64_DIR64MSB;
10332 code = BFD_RELOC_IA64_DIR64LSB;
10337 if (exp->X_op == O_pseudo_fixup
10338 && exp->X_op_symbol
10339 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10341 if (target_big_endian)
10342 code = BFD_RELOC_IA64_IPLTMSB;
10344 code = BFD_RELOC_IA64_IPLTLSB;
10345 exp->X_op = O_symbol;
10351 as_bad ("Unsupported fixup size %d", nbytes);
10352 ignore_rest_of_line ();
10356 if (exp->X_op == O_pseudo_fixup)
10358 exp->X_op = O_symbol;
10359 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10360 /* ??? If code unchanged, unsupported. */
10363 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10364 /* We need to store the byte order in effect in case we're going
10365 to fix an 8 or 16 bit relocation (for which there no real
10366 relocs available). See md_apply_fix3(). */
10367 fix->tc_fix_data.bigendian = target_big_endian;
10370 /* Return the actual relocation we wish to associate with the pseudo
10371 reloc described by SYM and R_TYPE. SYM should be one of the
10372 symbols in the pseudo_func array, or NULL. */
10374 static bfd_reloc_code_real_type
10375 ia64_gen_real_reloc_type (sym, r_type)
10376 struct symbol *sym;
10377 bfd_reloc_code_real_type r_type;
10379 bfd_reloc_code_real_type new = 0;
10386 switch (S_GET_VALUE (sym))
10388 case FUNC_FPTR_RELATIVE:
10391 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10392 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10393 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10394 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10395 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10400 case FUNC_GP_RELATIVE:
10403 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10404 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10405 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10406 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10407 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10408 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10413 case FUNC_LT_RELATIVE:
10416 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10417 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10422 case FUNC_LT_RELATIVE_X:
10425 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10430 case FUNC_PC_RELATIVE:
10433 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10434 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10435 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10436 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10437 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10438 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10443 case FUNC_PLT_RELATIVE:
10446 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10447 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10448 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10449 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10454 case FUNC_SEC_RELATIVE:
10457 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10458 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10459 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10460 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10465 case FUNC_SEG_RELATIVE:
10468 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10469 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10470 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10471 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10476 case FUNC_LTV_RELATIVE:
10479 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10480 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10481 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10482 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10487 case FUNC_LT_FPTR_RELATIVE:
10490 case BFD_RELOC_IA64_IMM22:
10491 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10492 case BFD_RELOC_IA64_IMM64:
10493 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10499 case FUNC_TP_RELATIVE:
10502 case BFD_RELOC_IA64_IMM14:
10503 new = BFD_RELOC_IA64_TPREL14; break;
10504 case BFD_RELOC_IA64_IMM22:
10505 new = BFD_RELOC_IA64_TPREL22; break;
10506 case BFD_RELOC_IA64_IMM64:
10507 new = BFD_RELOC_IA64_TPREL64I; break;
10513 case FUNC_LT_TP_RELATIVE:
10516 case BFD_RELOC_IA64_IMM22:
10517 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10523 case FUNC_LT_DTP_MODULE:
10526 case BFD_RELOC_IA64_IMM22:
10527 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10533 case FUNC_DTP_RELATIVE:
10536 case BFD_RELOC_IA64_DIR64MSB:
10537 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10538 case BFD_RELOC_IA64_DIR64LSB:
10539 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10540 case BFD_RELOC_IA64_IMM14:
10541 new = BFD_RELOC_IA64_DTPREL14; break;
10542 case BFD_RELOC_IA64_IMM22:
10543 new = BFD_RELOC_IA64_DTPREL22; break;
10544 case BFD_RELOC_IA64_IMM64:
10545 new = BFD_RELOC_IA64_DTPREL64I; break;
10551 case FUNC_LT_DTP_RELATIVE:
10554 case BFD_RELOC_IA64_IMM22:
10555 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10561 case FUNC_IPLT_RELOC:
10568 /* Hmmmm. Should this ever occur? */
10575 /* Here is where generate the appropriate reloc for pseudo relocation
10578 ia64_validate_fix (fix)
10581 switch (fix->fx_r_type)
10583 case BFD_RELOC_IA64_FPTR64I:
10584 case BFD_RELOC_IA64_FPTR32MSB:
10585 case BFD_RELOC_IA64_FPTR64LSB:
10586 case BFD_RELOC_IA64_LTOFF_FPTR22:
10587 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10588 if (fix->fx_offset != 0)
10589 as_bad_where (fix->fx_file, fix->fx_line,
10590 "No addend allowed in @fptr() relocation");
10598 fix_insn (fix, odesc, value)
10600 const struct ia64_operand *odesc;
10603 bfd_vma insn[3], t0, t1, control_bits;
10608 slot = fix->fx_where & 0x3;
10609 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10611 /* Bundles are always in little-endian byte order */
10612 t0 = bfd_getl64 (fixpos);
10613 t1 = bfd_getl64 (fixpos + 8);
10614 control_bits = t0 & 0x1f;
10615 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10616 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10617 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10620 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10622 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10623 insn[2] |= (((value & 0x7f) << 13)
10624 | (((value >> 7) & 0x1ff) << 27)
10625 | (((value >> 16) & 0x1f) << 22)
10626 | (((value >> 21) & 0x1) << 21)
10627 | (((value >> 63) & 0x1) << 36));
10629 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10631 if (value & ~0x3fffffffffffffffULL)
10632 err = "integer operand out of range";
10633 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10634 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10636 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10639 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10640 insn[2] |= ((((value >> 59) & 0x1) << 36)
10641 | (((value >> 0) & 0xfffff) << 13));
10644 err = (*odesc->insert) (odesc, value, insn + slot);
10647 as_bad_where (fix->fx_file, fix->fx_line, err);
10649 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10650 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10651 number_to_chars_littleendian (fixpos + 0, t0, 8);
10652 number_to_chars_littleendian (fixpos + 8, t1, 8);
10655 /* Attempt to simplify or even eliminate a fixup. The return value is
10656 ignored; perhaps it was once meaningful, but now it is historical.
10657 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10659 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10663 md_apply_fix3 (fix, valP, seg)
10666 segT seg ATTRIBUTE_UNUSED;
10669 valueT value = *valP;
10671 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10675 switch (fix->fx_r_type)
10677 case BFD_RELOC_IA64_DIR32MSB:
10678 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10681 case BFD_RELOC_IA64_DIR32LSB:
10682 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10685 case BFD_RELOC_IA64_DIR64MSB:
10686 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10689 case BFD_RELOC_IA64_DIR64LSB:
10690 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10699 switch (fix->fx_r_type)
10701 case BFD_RELOC_UNUSED:
10702 /* This must be a TAG13 or TAG13b operand. There are no external
10703 relocs defined for them, so we must give an error. */
10704 as_bad_where (fix->fx_file, fix->fx_line,
10705 "%s must have a constant value",
10706 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10710 case BFD_RELOC_IA64_TPREL14:
10711 case BFD_RELOC_IA64_TPREL22:
10712 case BFD_RELOC_IA64_TPREL64I:
10713 case BFD_RELOC_IA64_LTOFF_TPREL22:
10714 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10715 case BFD_RELOC_IA64_DTPREL14:
10716 case BFD_RELOC_IA64_DTPREL22:
10717 case BFD_RELOC_IA64_DTPREL64I:
10718 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10719 S_SET_THREAD_LOCAL (fix->fx_addsy);
10726 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10728 if (fix->tc_fix_data.bigendian)
10729 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10731 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10736 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10741 /* Generate the BFD reloc to be stuck in the object file from the
10742 fixup used internally in the assembler. */
10745 tc_gen_reloc (sec, fixp)
10746 asection *sec ATTRIBUTE_UNUSED;
10751 reloc = xmalloc (sizeof (*reloc));
10752 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10753 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10754 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10755 reloc->addend = fixp->fx_offset;
10756 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10760 as_bad_where (fixp->fx_file, fixp->fx_line,
10761 "Cannot represent %s relocation in object file",
10762 bfd_get_reloc_code_name (fixp->fx_r_type));
10767 /* Turn a string in input_line_pointer into a floating point constant
10768 of type TYPE, and store the appropriate bytes in *LIT. The number
10769 of LITTLENUMS emitted is stored in *SIZE. An error message is
10770 returned, or NULL on OK. */
10772 #define MAX_LITTLENUMS 5
10775 md_atof (type, lit, size)
10780 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10810 return "Bad call to MD_ATOF()";
10812 t = atof_ieee (input_line_pointer, type, words);
10814 input_line_pointer = t;
10816 (*ia64_float_to_chars) (lit, words, prec);
10820 /* It is 10 byte floating point with 6 byte padding. */
10821 memset (&lit [10], 0, 6);
10822 *size = 8 * sizeof (LITTLENUM_TYPE);
10825 *size = prec * sizeof (LITTLENUM_TYPE);
10830 /* Handle ia64 specific semantics of the align directive. */
10833 ia64_md_do_align (n, fill, len, max)
10834 int n ATTRIBUTE_UNUSED;
10835 const char *fill ATTRIBUTE_UNUSED;
10836 int len ATTRIBUTE_UNUSED;
10837 int max ATTRIBUTE_UNUSED;
10839 if (subseg_text_p (now_seg))
10840 ia64_flush_insns ();
10843 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10844 of an rs_align_code fragment. */
10847 ia64_handle_align (fragp)
10850 /* Use mfi bundle of nops with no stop bits. */
10851 static const unsigned char le_nop[]
10852 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10853 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10854 static const unsigned char le_nop_stop[]
10855 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10856 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10860 const unsigned char *nop;
10862 if (fragp->fr_type != rs_align_code)
10865 /* Check if this frag has to end with a stop bit. */
10866 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10868 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10869 p = fragp->fr_literal + fragp->fr_fix;
10871 /* If no paddings are needed, we check if we need a stop bit. */
10872 if (!bytes && fragp->tc_frag_data)
10874 if (fragp->fr_fix < 16)
10875 as_bad_where (fragp->fr_file, fragp->fr_line,
10876 _("Can't add stop bit to mark end of instruction group"));
10878 /* Bundles are always in little-endian byte order. Make sure
10879 the previous bundle has the stop bit. */
10883 /* Make sure we are on a 16-byte boundary, in case someone has been
10884 putting data into a text section. */
10887 int fix = bytes & 15;
10888 memset (p, 0, fix);
10891 fragp->fr_fix += fix;
10894 /* Instruction bundles are always little-endian. */
10895 memcpy (p, nop, 16);
10896 fragp->fr_var = 16;
10900 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10905 number_to_chars_bigendian (lit, (long) (*words++),
10906 sizeof (LITTLENUM_TYPE));
10907 lit += sizeof (LITTLENUM_TYPE);
10912 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
10917 number_to_chars_littleendian (lit, (long) (words[prec]),
10918 sizeof (LITTLENUM_TYPE));
10919 lit += sizeof (LITTLENUM_TYPE);
10924 ia64_elf_section_change_hook (void)
10926 dot_byteorder (-1);
10929 /* Check if a label should be made global. */
10931 ia64_check_label (symbolS *label)
10933 if (*input_line_pointer == ':')
10935 S_SET_EXTERNAL (label);
10936 input_line_pointer++;
10940 /* Used to remember where .alias and .secalias directives are seen. We
10941 will rename symbol and section names when we are about to output
10942 the relocatable file. */
10945 char *file; /* The file where the directive is seen. */
10946 unsigned int line; /* The line number the directive is at. */
10947 const char *name; /* The orignale name of the symbol. */
10950 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10951 .secalias. Otherwise, it is .alias. */
10953 dot_alias (int section)
10955 char *name, *alias;
10959 const char *error_string;
10962 struct hash_control *ahash, *nhash;
10965 name = input_line_pointer;
10966 delim = get_symbol_end ();
10967 end_name = input_line_pointer;
10970 if (name == end_name)
10972 as_bad (_("expected symbol name"));
10973 discard_rest_of_line ();
10977 SKIP_WHITESPACE ();
10979 if (*input_line_pointer != ',')
10982 as_bad (_("expected comma after \"%s\""), name);
10984 ignore_rest_of_line ();
10988 input_line_pointer++;
10991 /* We call demand_copy_C_string to check if alias string is valid.
10992 There should be a closing `"' and no `\0' in the string. */
10993 alias = demand_copy_C_string (&len);
10996 ignore_rest_of_line ();
11000 /* Make a copy of name string. */
11001 len = strlen (name) + 1;
11002 obstack_grow (¬es, name, len);
11003 name = obstack_finish (¬es);
11008 ahash = secalias_hash;
11009 nhash = secalias_name_hash;
11014 ahash = alias_hash;
11015 nhash = alias_name_hash;
11018 /* Check if alias has been used before. */
11019 h = (struct alias *) hash_find (ahash, alias);
11022 if (strcmp (h->name, name))
11023 as_bad (_("`%s' is already the alias of %s `%s'"),
11024 alias, kind, h->name);
11028 /* Check if name already has an alias. */
11029 a = (const char *) hash_find (nhash, name);
11032 if (strcmp (a, alias))
11033 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11037 h = (struct alias *) xmalloc (sizeof (struct alias));
11038 as_where (&h->file, &h->line);
11041 error_string = hash_jam (ahash, alias, (PTR) h);
11044 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11045 alias, kind, error_string);
11049 error_string = hash_jam (nhash, name, (PTR) alias);
11052 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11053 alias, kind, error_string);
11055 obstack_free (¬es, name);
11056 obstack_free (¬es, alias);
11059 demand_empty_rest_of_line ();
11062 /* It renames the original symbol name to its alias. */
11064 do_alias (const char *alias, PTR value)
11066 struct alias *h = (struct alias *) value;
11067 symbolS *sym = symbol_find (h->name);
11070 as_warn_where (h->file, h->line,
11071 _("symbol `%s' aliased to `%s' is not used"),
11074 S_SET_NAME (sym, (char *) alias);
11077 /* Called from write_object_file. */
11079 ia64_adjust_symtab (void)
11081 hash_traverse (alias_hash, do_alias);
11084 /* It renames the original section name to its alias. */
11086 do_secalias (const char *alias, PTR value)
11088 struct alias *h = (struct alias *) value;
11089 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11092 as_warn_where (h->file, h->line,
11093 _("section `%s' aliased to `%s' is not used"),
11099 /* Called from write_object_file. */
11101 ia64_frob_file (void)
11103 hash_traverse (secalias_hash, do_secalias);