1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template[N][N][N];
585 /* Resource dependencies currently in effect */
587 int depind; /* dependency index */
588 const struct ia64_dependency *dependency; /* actual dependency */
589 unsigned specific:1, /* is this a specific bit/regno? */
590 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
591 int index; /* specific regno/bit within dependency */
592 int note; /* optional qualifying note (0 if none) */
596 int insn_srlz; /* current insn serialization state */
597 int data_srlz; /* current data serialization state */
598 int qp_regno; /* qualifying predicate for this usage */
599 char *file; /* what file marked this dependency */
600 unsigned int line; /* what line marked this dependency */
601 struct mem_offset mem_offset; /* optional memory offset hint */
602 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
603 int path; /* corresponding code entry index */
605 static int regdepslen = 0;
606 static int regdepstotlen = 0;
607 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex {
616 } *qp_mutexes = NULL; /* QP mutex bitmasks */
617 static int qp_mutexeslen = 0;
618 static int qp_mutexestotlen = 0;
619 static valueT qp_safe_across_calls = 0;
621 /* Current state of PR implications */
622 static struct qp_imply {
625 unsigned p2_branched:1;
627 } *qp_implies = NULL;
628 static int qp_implieslen = 0;
629 static int qp_impliestotlen = 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values[128] = {{ 1, 0, 0 }};
639 /* These are the routines required to output the various types of
642 /* A slot_number is a frag address plus the slot index (0-2). We use the
643 frag address here so that if there is a section switch in the middle of
644 a function, then instructions emitted to a different section are not
645 counted. Since there may be more than one frag for a function, this
646 means we also need to keep track of which frag this address belongs to
647 so we can compute inter-frag distances. This also nicely solves the
648 problem with nops emitted for align directives, which can't easily be
649 counted, but can easily be derived from frag sizes. */
651 typedef struct unw_rec_list {
653 unsigned long slot_number;
655 unsigned long next_slot_number;
656 fragS *next_slot_frag;
657 struct unw_rec_list *next;
660 #define SLOT_NUM_NOT_SET (unsigned)-1
662 /* Linked list of saved prologue counts. A very poor
663 implementation of a map from label numbers to prologue counts. */
664 typedef struct label_prologue_count
666 struct label_prologue_count *next;
667 unsigned long label_number;
668 unsigned int prologue_count;
669 } label_prologue_count;
673 /* Maintain a list of unwind entries for the current function. */
677 /* Any unwind entires that should be attached to the current slot
678 that an insn is being constructed for. */
679 unw_rec_list *current_entry;
681 /* These are used to create the unwind table entry for this function. */
684 symbolS *info; /* pointer to unwind info */
685 symbolS *personality_routine;
687 subsegT saved_text_subseg;
688 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
690 /* TRUE if processing unwind directives in a prologue region. */
693 unsigned int prologue_count; /* number of .prologues seen so far */
694 /* Prologue counts at previous .label_state directives. */
695 struct label_prologue_count * saved_prologue_counts;
698 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
700 /* Forward declarations: */
701 static int ar_is_in_integer_unit PARAMS ((int regnum));
702 static void set_section PARAMS ((char *name));
703 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
704 unsigned int, unsigned int));
705 static void dot_radix PARAMS ((int));
706 static void dot_special_section PARAMS ((int));
707 static void dot_proc PARAMS ((int));
708 static void dot_fframe PARAMS ((int));
709 static void dot_vframe PARAMS ((int));
710 static void dot_vframesp PARAMS ((int));
711 static void dot_vframepsp PARAMS ((int));
712 static void dot_save PARAMS ((int));
713 static void dot_restore PARAMS ((int));
714 static void dot_restorereg PARAMS ((int));
715 static void dot_restorereg_p PARAMS ((int));
716 static void dot_handlerdata PARAMS ((int));
717 static void dot_unwentry PARAMS ((int));
718 static void dot_altrp PARAMS ((int));
719 static void dot_savemem PARAMS ((int));
720 static void dot_saveg PARAMS ((int));
721 static void dot_savef PARAMS ((int));
722 static void dot_saveb PARAMS ((int));
723 static void dot_savegf PARAMS ((int));
724 static void dot_spill PARAMS ((int));
725 static void dot_spillreg PARAMS ((int));
726 static void dot_spillmem PARAMS ((int));
727 static void dot_spillreg_p PARAMS ((int));
728 static void dot_spillmem_p PARAMS ((int));
729 static void dot_label_state PARAMS ((int));
730 static void dot_copy_state PARAMS ((int));
731 static void dot_unwabi PARAMS ((int));
732 static void dot_personality PARAMS ((int));
733 static void dot_body PARAMS ((int));
734 static void dot_prologue PARAMS ((int));
735 static void dot_endp PARAMS ((int));
736 static void dot_template PARAMS ((int));
737 static void dot_regstk PARAMS ((int));
738 static void dot_rot PARAMS ((int));
739 static void dot_byteorder PARAMS ((int));
740 static void dot_psr PARAMS ((int));
741 static void dot_alias PARAMS ((int));
742 static void dot_ln PARAMS ((int));
743 static char *parse_section_name PARAMS ((void));
744 static void dot_xdata PARAMS ((int));
745 static void stmt_float_cons PARAMS ((int));
746 static void stmt_cons_ua PARAMS ((int));
747 static void dot_xfloat_cons PARAMS ((int));
748 static void dot_xstringer PARAMS ((int));
749 static void dot_xdata_ua PARAMS ((int));
750 static void dot_xfloat_cons_ua PARAMS ((int));
751 static void print_prmask PARAMS ((valueT mask));
752 static void dot_pred_rel PARAMS ((int));
753 static void dot_reg_val PARAMS ((int));
754 static void dot_dv_mode PARAMS ((int));
755 static void dot_entry PARAMS ((int));
756 static void dot_mem_offset PARAMS ((int));
757 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
758 static symbolS *declare_register PARAMS ((const char *name, int regnum));
759 static void declare_register_set PARAMS ((const char *, int, int));
760 static unsigned int operand_width PARAMS ((enum ia64_opnd));
761 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
764 static int parse_operand PARAMS ((expressionS *e));
765 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
766 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
767 static void build_insn PARAMS ((struct slot *, bfd_vma *));
768 static void emit_one_bundle PARAMS ((void));
769 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
770 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
771 bfd_reloc_code_real_type r_type));
772 static void insn_group_break PARAMS ((int, int, int));
773 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
774 struct rsrc *, int depind, int path));
775 static void add_qp_mutex PARAMS((valueT mask));
776 static void add_qp_imply PARAMS((int p1, int p2));
777 static void clear_qp_branch_flag PARAMS((valueT mask));
778 static void clear_qp_mutex PARAMS((valueT mask));
779 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
780 static int has_suffix_p PARAMS((const char *, const char *));
781 static void clear_register_values PARAMS ((void));
782 static void print_dependency PARAMS ((const char *action, int depind));
783 static void instruction_serialization PARAMS ((void));
784 static void data_serialization PARAMS ((void));
785 static void remove_marked_resource PARAMS ((struct rsrc *));
786 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
787 static int is_taken_branch PARAMS ((struct ia64_opcode *));
788 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
789 static int depends_on PARAMS ((int, struct ia64_opcode *));
790 static int specify_resource PARAMS ((const struct ia64_dependency *,
791 struct ia64_opcode *, int, struct rsrc [], int, int));
792 static int check_dv PARAMS((struct ia64_opcode *idesc));
793 static void check_dependencies PARAMS((struct ia64_opcode *));
794 static void mark_resources PARAMS((struct ia64_opcode *));
795 static void update_dependencies PARAMS((struct ia64_opcode *));
796 static void note_register_values PARAMS((struct ia64_opcode *));
797 static int qp_mutex PARAMS ((int, int, int));
798 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
799 static void output_vbyte_mem PARAMS ((int, char *, char *));
800 static void count_output PARAMS ((int, char *, char *));
801 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
802 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
803 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
804 static void output_P1_format PARAMS ((vbyte_func, int));
805 static void output_P2_format PARAMS ((vbyte_func, int, int));
806 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
807 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
808 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
809 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
810 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
811 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
812 static void output_P9_format PARAMS ((vbyte_func, int, int));
813 static void output_P10_format PARAMS ((vbyte_func, int, int));
814 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
817 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818 static char format_ab_reg PARAMS ((int, int));
819 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
821 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
822 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
824 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
825 static unw_rec_list *output_endp PARAMS ((void));
826 static unw_rec_list *output_prologue PARAMS ((void));
827 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
828 static unw_rec_list *output_body PARAMS ((void));
829 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
830 static unw_rec_list *output_mem_stack_v PARAMS ((void));
831 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
832 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
833 static unw_rec_list *output_rp_when PARAMS ((void));
834 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
837 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
838 static unw_rec_list *output_pfs_when PARAMS ((void));
839 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
841 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
842 static unw_rec_list *output_preds_when PARAMS ((void));
843 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
845 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
846 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
847 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
849 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
851 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
853 static unw_rec_list *output_unat_when PARAMS ((void));
854 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
856 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
857 static unw_rec_list *output_lc_when PARAMS ((void));
858 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
860 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
861 static unw_rec_list *output_fpsr_when PARAMS ((void));
862 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
864 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
865 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
866 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
867 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
869 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
870 static unw_rec_list *output_bsp_when PARAMS ((void));
871 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
874 static unw_rec_list *output_bspstore_when PARAMS ((void));
875 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
877 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
878 static unw_rec_list *output_rnat_when PARAMS ((void));
879 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
881 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
882 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
883 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
884 static unw_rec_list *output_label_state PARAMS ((unsigned long));
885 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
886 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
888 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
890 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
892 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
894 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
895 unsigned int, unsigned int));
896 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
897 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
898 static int calc_record_size PARAMS ((unw_rec_list *));
899 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
900 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
901 unsigned long, fragS *,
903 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
904 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
905 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
907 static void generate_unwind_image PARAMS ((const char *));
908 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
909 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
910 static void free_saved_prologue_counts PARAMS ((void));
912 /* Build the unwind section name by appending the (possibly stripped)
913 text section NAME to the unwind PREFIX. The resulting string
914 pointer is assigned to RESULT. The string is allocated on the
915 stack, so this must be a macro... */
916 #define make_unw_section_name(special, text_name, result) \
918 const char *_prefix = special_section_name[special]; \
919 const char *_suffix = text_name; \
920 size_t _prefix_len, _suffix_len; \
922 if (strncmp (text_name, ".gnu.linkonce.t.", \
923 sizeof (".gnu.linkonce.t.") - 1) == 0) \
925 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
926 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
928 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
929 _result = alloca (_prefix_len + _suffix_len + 1); \
930 memcpy (_result, _prefix, _prefix_len); \
931 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
932 _result[_prefix_len + _suffix_len] = '\0'; \
937 /* Determine if application register REGNUM resides in the integer
938 unit (as opposed to the memory unit). */
940 ar_is_in_integer_unit (reg)
945 return (reg == 64 /* pfs */
946 || reg == 65 /* lc */
947 || reg == 66 /* ec */
948 /* ??? ias accepts and puts these in the integer unit. */
949 || (reg >= 112 && reg <= 127));
952 /* Switch to section NAME and create section if necessary. It's
953 rather ugly that we have to manipulate input_line_pointer but I
954 don't see any other way to accomplish the same thing without
955 changing obj-elf.c (which may be the Right Thing, in the end). */
960 char *saved_input_line_pointer;
962 saved_input_line_pointer = input_line_pointer;
963 input_line_pointer = name;
965 input_line_pointer = saved_input_line_pointer;
968 /* Map 's' to SHF_IA_64_SHORT. */
971 ia64_elf_section_letter (letter, ptr_msg)
976 return SHF_IA_64_SHORT;
977 else if (letter == 'o')
978 return SHF_LINK_ORDER;
980 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
984 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
987 ia64_elf_section_flags (flags, attr, type)
989 int attr, type ATTRIBUTE_UNUSED;
991 if (attr & SHF_IA_64_SHORT)
992 flags |= SEC_SMALL_DATA;
997 ia64_elf_section_type (str, len)
1001 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1003 if (STREQ (ELF_STRING_ia64_unwind_info))
1004 return SHT_PROGBITS;
1006 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1007 return SHT_PROGBITS;
1009 if (STREQ (ELF_STRING_ia64_unwind))
1010 return SHT_IA_64_UNWIND;
1012 if (STREQ (ELF_STRING_ia64_unwind_once))
1013 return SHT_IA_64_UNWIND;
1015 if (STREQ ("unwind"))
1016 return SHT_IA_64_UNWIND;
1018 if (STREQ ("init_array"))
1019 return SHT_INIT_ARRAY;
1021 if (STREQ ("fini_array"))
1022 return SHT_FINI_ARRAY;
1029 set_regstack (ins, locs, outs, rots)
1030 unsigned int ins, locs, outs, rots;
1032 /* Size of frame. */
1035 sof = ins + locs + outs;
1038 as_bad ("Size of frame exceeds maximum of 96 registers");
1043 as_warn ("Size of rotating registers exceeds frame size");
1046 md.in.base = REG_GR + 32;
1047 md.loc.base = md.in.base + ins;
1048 md.out.base = md.loc.base + locs;
1050 md.in.num_regs = ins;
1051 md.loc.num_regs = locs;
1052 md.out.num_regs = outs;
1053 md.rot.num_regs = rots;
1060 struct label_fix *lfix;
1062 subsegT saved_subseg;
1065 if (!md.last_text_seg)
1068 saved_seg = now_seg;
1069 saved_subseg = now_subseg;
1071 subseg_set (md.last_text_seg, 0);
1073 while (md.num_slots_in_use > 0)
1074 emit_one_bundle (); /* force out queued instructions */
1076 /* In case there are labels following the last instruction, resolve
1078 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1080 S_SET_VALUE (lfix->sym, frag_now_fix ());
1081 symbol_set_frag (lfix->sym, frag_now);
1083 CURR_SLOT.label_fixups = 0;
1084 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1086 S_SET_VALUE (lfix->sym, frag_now_fix ());
1087 symbol_set_frag (lfix->sym, frag_now);
1089 CURR_SLOT.tag_fixups = 0;
1091 /* In case there are unwind directives following the last instruction,
1092 resolve those now. We only handle prologue, body, and endp directives
1093 here. Give an error for others. */
1094 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1096 switch (ptr->r.type)
1102 ptr->slot_number = (unsigned long) frag_more (0);
1103 ptr->slot_frag = frag_now;
1106 /* Allow any record which doesn't have a "t" field (i.e.,
1107 doesn't relate to a particular instruction). */
1123 as_bad (_("Unwind directive not followed by an instruction."));
1127 unwind.current_entry = NULL;
1129 subseg_set (saved_seg, saved_subseg);
1131 if (md.qp.X_op == O_register)
1132 as_bad ("qualifying predicate not followed by instruction");
1136 ia64_do_align (nbytes)
1139 char *saved_input_line_pointer = input_line_pointer;
1141 input_line_pointer = "";
1142 s_align_bytes (nbytes);
1143 input_line_pointer = saved_input_line_pointer;
1147 ia64_cons_align (nbytes)
1152 char *saved_input_line_pointer = input_line_pointer;
1153 input_line_pointer = "";
1154 s_align_bytes (nbytes);
1155 input_line_pointer = saved_input_line_pointer;
1159 /* Output COUNT bytes to a memory location. */
1160 static unsigned char *vbyte_mem_ptr = NULL;
1163 output_vbyte_mem (count, ptr, comment)
1166 char *comment ATTRIBUTE_UNUSED;
1169 if (vbyte_mem_ptr == NULL)
1174 for (x = 0; x < count; x++)
1175 *(vbyte_mem_ptr++) = ptr[x];
1178 /* Count the number of bytes required for records. */
1179 static int vbyte_count = 0;
1181 count_output (count, ptr, comment)
1183 char *ptr ATTRIBUTE_UNUSED;
1184 char *comment ATTRIBUTE_UNUSED;
1186 vbyte_count += count;
1190 output_R1_format (f, rtype, rlen)
1192 unw_record_type rtype;
1199 output_R3_format (f, rtype, rlen);
1205 else if (rtype != prologue)
1206 as_bad ("record type is not valid");
1208 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1209 (*f) (1, &byte, NULL);
1213 output_R2_format (f, mask, grsave, rlen)
1220 mask = (mask & 0x0f);
1221 grsave = (grsave & 0x7f);
1223 bytes[0] = (UNW_R2 | (mask >> 1));
1224 bytes[1] = (((mask & 0x01) << 7) | grsave);
1225 count += output_leb128 (bytes + 2, rlen, 0);
1226 (*f) (count, bytes, NULL);
1230 output_R3_format (f, rtype, rlen)
1232 unw_record_type rtype;
1239 output_R1_format (f, rtype, rlen);
1245 else if (rtype != prologue)
1246 as_bad ("record type is not valid");
1247 bytes[0] = (UNW_R3 | r);
1248 count = output_leb128 (bytes + 1, rlen, 0);
1249 (*f) (count + 1, bytes, NULL);
1253 output_P1_format (f, brmask)
1258 byte = UNW_P1 | (brmask & 0x1f);
1259 (*f) (1, &byte, NULL);
1263 output_P2_format (f, brmask, gr)
1269 brmask = (brmask & 0x1f);
1270 bytes[0] = UNW_P2 | (brmask >> 1);
1271 bytes[1] = (((brmask & 1) << 7) | gr);
1272 (*f) (2, bytes, NULL);
1276 output_P3_format (f, rtype, reg)
1278 unw_record_type rtype;
1323 as_bad ("Invalid record type for P3 format.");
1325 bytes[0] = (UNW_P3 | (r >> 1));
1326 bytes[1] = (((r & 1) << 7) | reg);
1327 (*f) (2, bytes, NULL);
1331 output_P4_format (f, imask, imask_size)
1333 unsigned char *imask;
1334 unsigned long imask_size;
1337 (*f) (imask_size, imask, NULL);
1341 output_P5_format (f, grmask, frmask)
1344 unsigned long frmask;
1347 grmask = (grmask & 0x0f);
1350 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1351 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1352 bytes[3] = (frmask & 0x000000ff);
1353 (*f) (4, bytes, NULL);
1357 output_P6_format (f, rtype, rmask)
1359 unw_record_type rtype;
1365 if (rtype == gr_mem)
1367 else if (rtype != fr_mem)
1368 as_bad ("Invalid record type for format P6");
1369 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1370 (*f) (1, &byte, NULL);
1374 output_P7_format (f, rtype, w1, w2)
1376 unw_record_type rtype;
1383 count += output_leb128 (bytes + 1, w1, 0);
1388 count += output_leb128 (bytes + count, w2 >> 4, 0);
1438 bytes[0] = (UNW_P7 | r);
1439 (*f) (count, bytes, NULL);
1443 output_P8_format (f, rtype, t)
1445 unw_record_type rtype;
1484 case bspstore_psprel:
1487 case bspstore_sprel:
1499 case priunat_when_gr:
1502 case priunat_psprel:
1508 case priunat_when_mem:
1515 count += output_leb128 (bytes + 2, t, 0);
1516 (*f) (count, bytes, NULL);
1520 output_P9_format (f, grmask, gr)
1527 bytes[1] = (grmask & 0x0f);
1528 bytes[2] = (gr & 0x7f);
1529 (*f) (3, bytes, NULL);
1533 output_P10_format (f, abi, context)
1540 bytes[1] = (abi & 0xff);
1541 bytes[2] = (context & 0xff);
1542 (*f) (3, bytes, NULL);
1546 output_B1_format (f, rtype, label)
1548 unw_record_type rtype;
1549 unsigned long label;
1555 output_B4_format (f, rtype, label);
1558 if (rtype == copy_state)
1560 else if (rtype != label_state)
1561 as_bad ("Invalid record type for format B1");
1563 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1564 (*f) (1, &byte, NULL);
1568 output_B2_format (f, ecount, t)
1570 unsigned long ecount;
1577 output_B3_format (f, ecount, t);
1580 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1581 count += output_leb128 (bytes + 1, t, 0);
1582 (*f) (count, bytes, NULL);
1586 output_B3_format (f, ecount, t)
1588 unsigned long ecount;
1595 output_B2_format (f, ecount, t);
1599 count += output_leb128 (bytes + 1, t, 0);
1600 count += output_leb128 (bytes + count, ecount, 0);
1601 (*f) (count, bytes, NULL);
1605 output_B4_format (f, rtype, label)
1607 unw_record_type rtype;
1608 unsigned long label;
1615 output_B1_format (f, rtype, label);
1619 if (rtype == copy_state)
1621 else if (rtype != label_state)
1622 as_bad ("Invalid record type for format B1");
1624 bytes[0] = (UNW_B4 | (r << 3));
1625 count += output_leb128 (bytes + 1, label, 0);
1626 (*f) (count, bytes, NULL);
1630 format_ab_reg (ab, reg)
1637 ret = (ab << 5) | reg;
1642 output_X1_format (f, rtype, ab, reg, t, w1)
1644 unw_record_type rtype;
1654 if (rtype == spill_sprel)
1656 else if (rtype != spill_psprel)
1657 as_bad ("Invalid record type for format X1");
1658 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1659 count += output_leb128 (bytes + 2, t, 0);
1660 count += output_leb128 (bytes + count, w1, 0);
1661 (*f) (count, bytes, NULL);
1665 output_X2_format (f, ab, reg, x, y, treg, t)
1674 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1675 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1676 count += output_leb128 (bytes + 3, t, 0);
1677 (*f) (count, bytes, NULL);
1681 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1683 unw_record_type rtype;
1694 if (rtype == spill_sprel_p)
1696 else if (rtype != spill_psprel_p)
1697 as_bad ("Invalid record type for format X3");
1698 bytes[1] = ((r << 7) | (qp & 0x3f));
1699 bytes[2] = format_ab_reg (ab, reg);
1700 count += output_leb128 (bytes + 3, t, 0);
1701 count += output_leb128 (bytes + count, w1, 0);
1702 (*f) (count, bytes, NULL);
1706 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1716 bytes[1] = (qp & 0x3f);
1717 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1718 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1719 count += output_leb128 (bytes + 4, t, 0);
1720 (*f) (count, bytes, NULL);
1723 /* This function allocates a record list structure, and initializes fields. */
1725 static unw_rec_list *
1726 alloc_record (unw_record_type t)
1729 ptr = xmalloc (sizeof (*ptr));
1731 ptr->slot_number = SLOT_NUM_NOT_SET;
1733 ptr->next_slot_number = 0;
1734 ptr->next_slot_frag = 0;
1738 /* Dummy unwind record used for calculating the length of the last prologue or
1741 static unw_rec_list *
1744 unw_rec_list *ptr = alloc_record (endp);
1748 static unw_rec_list *
1751 unw_rec_list *ptr = alloc_record (prologue);
1752 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1756 static unw_rec_list *
1757 output_prologue_gr (saved_mask, reg)
1758 unsigned int saved_mask;
1761 unw_rec_list *ptr = alloc_record (prologue_gr);
1762 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1763 ptr->r.record.r.grmask = saved_mask;
1764 ptr->r.record.r.grsave = reg;
1768 static unw_rec_list *
1771 unw_rec_list *ptr = alloc_record (body);
1775 static unw_rec_list *
1776 output_mem_stack_f (size)
1779 unw_rec_list *ptr = alloc_record (mem_stack_f);
1780 ptr->r.record.p.size = size;
1784 static unw_rec_list *
1785 output_mem_stack_v ()
1787 unw_rec_list *ptr = alloc_record (mem_stack_v);
1791 static unw_rec_list *
1795 unw_rec_list *ptr = alloc_record (psp_gr);
1796 ptr->r.record.p.gr = gr;
1800 static unw_rec_list *
1801 output_psp_sprel (offset)
1802 unsigned int offset;
1804 unw_rec_list *ptr = alloc_record (psp_sprel);
1805 ptr->r.record.p.spoff = offset / 4;
1809 static unw_rec_list *
1812 unw_rec_list *ptr = alloc_record (rp_when);
1816 static unw_rec_list *
1820 unw_rec_list *ptr = alloc_record (rp_gr);
1821 ptr->r.record.p.gr = gr;
1825 static unw_rec_list *
1829 unw_rec_list *ptr = alloc_record (rp_br);
1830 ptr->r.record.p.br = br;
1834 static unw_rec_list *
1835 output_rp_psprel (offset)
1836 unsigned int offset;
1838 unw_rec_list *ptr = alloc_record (rp_psprel);
1839 ptr->r.record.p.pspoff = offset / 4;
1843 static unw_rec_list *
1844 output_rp_sprel (offset)
1845 unsigned int offset;
1847 unw_rec_list *ptr = alloc_record (rp_sprel);
1848 ptr->r.record.p.spoff = offset / 4;
1852 static unw_rec_list *
1855 unw_rec_list *ptr = alloc_record (pfs_when);
1859 static unw_rec_list *
1863 unw_rec_list *ptr = alloc_record (pfs_gr);
1864 ptr->r.record.p.gr = gr;
1868 static unw_rec_list *
1869 output_pfs_psprel (offset)
1870 unsigned int offset;
1872 unw_rec_list *ptr = alloc_record (pfs_psprel);
1873 ptr->r.record.p.pspoff = offset / 4;
1877 static unw_rec_list *
1878 output_pfs_sprel (offset)
1879 unsigned int offset;
1881 unw_rec_list *ptr = alloc_record (pfs_sprel);
1882 ptr->r.record.p.spoff = offset / 4;
1886 static unw_rec_list *
1887 output_preds_when ()
1889 unw_rec_list *ptr = alloc_record (preds_when);
1893 static unw_rec_list *
1894 output_preds_gr (gr)
1897 unw_rec_list *ptr = alloc_record (preds_gr);
1898 ptr->r.record.p.gr = gr;
1902 static unw_rec_list *
1903 output_preds_psprel (offset)
1904 unsigned int offset;
1906 unw_rec_list *ptr = alloc_record (preds_psprel);
1907 ptr->r.record.p.pspoff = offset / 4;
1911 static unw_rec_list *
1912 output_preds_sprel (offset)
1913 unsigned int offset;
1915 unw_rec_list *ptr = alloc_record (preds_sprel);
1916 ptr->r.record.p.spoff = offset / 4;
1920 static unw_rec_list *
1921 output_fr_mem (mask)
1924 unw_rec_list *ptr = alloc_record (fr_mem);
1925 ptr->r.record.p.rmask = mask;
1929 static unw_rec_list *
1930 output_frgr_mem (gr_mask, fr_mask)
1931 unsigned int gr_mask;
1932 unsigned int fr_mask;
1934 unw_rec_list *ptr = alloc_record (frgr_mem);
1935 ptr->r.record.p.grmask = gr_mask;
1936 ptr->r.record.p.frmask = fr_mask;
1940 static unw_rec_list *
1941 output_gr_gr (mask, reg)
1945 unw_rec_list *ptr = alloc_record (gr_gr);
1946 ptr->r.record.p.grmask = mask;
1947 ptr->r.record.p.gr = reg;
1951 static unw_rec_list *
1952 output_gr_mem (mask)
1955 unw_rec_list *ptr = alloc_record (gr_mem);
1956 ptr->r.record.p.rmask = mask;
1960 static unw_rec_list *
1961 output_br_mem (unsigned int mask)
1963 unw_rec_list *ptr = alloc_record (br_mem);
1964 ptr->r.record.p.brmask = mask;
1968 static unw_rec_list *
1969 output_br_gr (save_mask, reg)
1970 unsigned int save_mask;
1973 unw_rec_list *ptr = alloc_record (br_gr);
1974 ptr->r.record.p.brmask = save_mask;
1975 ptr->r.record.p.gr = reg;
1979 static unw_rec_list *
1980 output_spill_base (offset)
1981 unsigned int offset;
1983 unw_rec_list *ptr = alloc_record (spill_base);
1984 ptr->r.record.p.pspoff = offset / 4;
1988 static unw_rec_list *
1991 unw_rec_list *ptr = alloc_record (unat_when);
1995 static unw_rec_list *
1999 unw_rec_list *ptr = alloc_record (unat_gr);
2000 ptr->r.record.p.gr = gr;
2004 static unw_rec_list *
2005 output_unat_psprel (offset)
2006 unsigned int offset;
2008 unw_rec_list *ptr = alloc_record (unat_psprel);
2009 ptr->r.record.p.pspoff = offset / 4;
2013 static unw_rec_list *
2014 output_unat_sprel (offset)
2015 unsigned int offset;
2017 unw_rec_list *ptr = alloc_record (unat_sprel);
2018 ptr->r.record.p.spoff = offset / 4;
2022 static unw_rec_list *
2025 unw_rec_list *ptr = alloc_record (lc_when);
2029 static unw_rec_list *
2033 unw_rec_list *ptr = alloc_record (lc_gr);
2034 ptr->r.record.p.gr = gr;
2038 static unw_rec_list *
2039 output_lc_psprel (offset)
2040 unsigned int offset;
2042 unw_rec_list *ptr = alloc_record (lc_psprel);
2043 ptr->r.record.p.pspoff = offset / 4;
2047 static unw_rec_list *
2048 output_lc_sprel (offset)
2049 unsigned int offset;
2051 unw_rec_list *ptr = alloc_record (lc_sprel);
2052 ptr->r.record.p.spoff = offset / 4;
2056 static unw_rec_list *
2059 unw_rec_list *ptr = alloc_record (fpsr_when);
2063 static unw_rec_list *
2067 unw_rec_list *ptr = alloc_record (fpsr_gr);
2068 ptr->r.record.p.gr = gr;
2072 static unw_rec_list *
2073 output_fpsr_psprel (offset)
2074 unsigned int offset;
2076 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2077 ptr->r.record.p.pspoff = offset / 4;
2081 static unw_rec_list *
2082 output_fpsr_sprel (offset)
2083 unsigned int offset;
2085 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2086 ptr->r.record.p.spoff = offset / 4;
2090 static unw_rec_list *
2091 output_priunat_when_gr ()
2093 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2097 static unw_rec_list *
2098 output_priunat_when_mem ()
2100 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2104 static unw_rec_list *
2105 output_priunat_gr (gr)
2108 unw_rec_list *ptr = alloc_record (priunat_gr);
2109 ptr->r.record.p.gr = gr;
2113 static unw_rec_list *
2114 output_priunat_psprel (offset)
2115 unsigned int offset;
2117 unw_rec_list *ptr = alloc_record (priunat_psprel);
2118 ptr->r.record.p.pspoff = offset / 4;
2122 static unw_rec_list *
2123 output_priunat_sprel (offset)
2124 unsigned int offset;
2126 unw_rec_list *ptr = alloc_record (priunat_sprel);
2127 ptr->r.record.p.spoff = offset / 4;
2131 static unw_rec_list *
2134 unw_rec_list *ptr = alloc_record (bsp_when);
2138 static unw_rec_list *
2142 unw_rec_list *ptr = alloc_record (bsp_gr);
2143 ptr->r.record.p.gr = gr;
2147 static unw_rec_list *
2148 output_bsp_psprel (offset)
2149 unsigned int offset;
2151 unw_rec_list *ptr = alloc_record (bsp_psprel);
2152 ptr->r.record.p.pspoff = offset / 4;
2156 static unw_rec_list *
2157 output_bsp_sprel (offset)
2158 unsigned int offset;
2160 unw_rec_list *ptr = alloc_record (bsp_sprel);
2161 ptr->r.record.p.spoff = offset / 4;
2165 static unw_rec_list *
2166 output_bspstore_when ()
2168 unw_rec_list *ptr = alloc_record (bspstore_when);
2172 static unw_rec_list *
2173 output_bspstore_gr (gr)
2176 unw_rec_list *ptr = alloc_record (bspstore_gr);
2177 ptr->r.record.p.gr = gr;
2181 static unw_rec_list *
2182 output_bspstore_psprel (offset)
2183 unsigned int offset;
2185 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2186 ptr->r.record.p.pspoff = offset / 4;
2190 static unw_rec_list *
2191 output_bspstore_sprel (offset)
2192 unsigned int offset;
2194 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2195 ptr->r.record.p.spoff = offset / 4;
2199 static unw_rec_list *
2202 unw_rec_list *ptr = alloc_record (rnat_when);
2206 static unw_rec_list *
2210 unw_rec_list *ptr = alloc_record (rnat_gr);
2211 ptr->r.record.p.gr = gr;
2215 static unw_rec_list *
2216 output_rnat_psprel (offset)
2217 unsigned int offset;
2219 unw_rec_list *ptr = alloc_record (rnat_psprel);
2220 ptr->r.record.p.pspoff = offset / 4;
2224 static unw_rec_list *
2225 output_rnat_sprel (offset)
2226 unsigned int offset;
2228 unw_rec_list *ptr = alloc_record (rnat_sprel);
2229 ptr->r.record.p.spoff = offset / 4;
2233 static unw_rec_list *
2234 output_unwabi (abi, context)
2236 unsigned long context;
2238 unw_rec_list *ptr = alloc_record (unwabi);
2239 ptr->r.record.p.abi = abi;
2240 ptr->r.record.p.context = context;
2244 static unw_rec_list *
2245 output_epilogue (unsigned long ecount)
2247 unw_rec_list *ptr = alloc_record (epilogue);
2248 ptr->r.record.b.ecount = ecount;
2252 static unw_rec_list *
2253 output_label_state (unsigned long label)
2255 unw_rec_list *ptr = alloc_record (label_state);
2256 ptr->r.record.b.label = label;
2260 static unw_rec_list *
2261 output_copy_state (unsigned long label)
2263 unw_rec_list *ptr = alloc_record (copy_state);
2264 ptr->r.record.b.label = label;
2268 static unw_rec_list *
2269 output_spill_psprel (ab, reg, offset)
2272 unsigned int offset;
2274 unw_rec_list *ptr = alloc_record (spill_psprel);
2275 ptr->r.record.x.ab = ab;
2276 ptr->r.record.x.reg = reg;
2277 ptr->r.record.x.pspoff = offset / 4;
2281 static unw_rec_list *
2282 output_spill_sprel (ab, reg, offset)
2285 unsigned int offset;
2287 unw_rec_list *ptr = alloc_record (spill_sprel);
2288 ptr->r.record.x.ab = ab;
2289 ptr->r.record.x.reg = reg;
2290 ptr->r.record.x.spoff = offset / 4;
2294 static unw_rec_list *
2295 output_spill_psprel_p (ab, reg, offset, predicate)
2298 unsigned int offset;
2299 unsigned int predicate;
2301 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2302 ptr->r.record.x.ab = ab;
2303 ptr->r.record.x.reg = reg;
2304 ptr->r.record.x.pspoff = offset / 4;
2305 ptr->r.record.x.qp = predicate;
2309 static unw_rec_list *
2310 output_spill_sprel_p (ab, reg, offset, predicate)
2313 unsigned int offset;
2314 unsigned int predicate;
2316 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2317 ptr->r.record.x.ab = ab;
2318 ptr->r.record.x.reg = reg;
2319 ptr->r.record.x.spoff = offset / 4;
2320 ptr->r.record.x.qp = predicate;
2324 static unw_rec_list *
2325 output_spill_reg (ab, reg, targ_reg, xy)
2328 unsigned int targ_reg;
2331 unw_rec_list *ptr = alloc_record (spill_reg);
2332 ptr->r.record.x.ab = ab;
2333 ptr->r.record.x.reg = reg;
2334 ptr->r.record.x.treg = targ_reg;
2335 ptr->r.record.x.xy = xy;
2339 static unw_rec_list *
2340 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2343 unsigned int targ_reg;
2345 unsigned int predicate;
2347 unw_rec_list *ptr = alloc_record (spill_reg_p);
2348 ptr->r.record.x.ab = ab;
2349 ptr->r.record.x.reg = reg;
2350 ptr->r.record.x.treg = targ_reg;
2351 ptr->r.record.x.xy = xy;
2352 ptr->r.record.x.qp = predicate;
2356 /* Given a unw_rec_list process the correct format with the
2357 specified function. */
2360 process_one_record (ptr, f)
2364 unsigned long fr_mask, gr_mask;
2366 switch (ptr->r.type)
2368 /* This is a dummy record that takes up no space in the output. */
2376 /* These are taken care of by prologue/prologue_gr. */
2381 if (ptr->r.type == prologue_gr)
2382 output_R2_format (f, ptr->r.record.r.grmask,
2383 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2385 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2387 /* Output descriptor(s) for union of register spills (if any). */
2388 gr_mask = ptr->r.record.r.mask.gr_mem;
2389 fr_mask = ptr->r.record.r.mask.fr_mem;
2392 if ((fr_mask & ~0xfUL) == 0)
2393 output_P6_format (f, fr_mem, fr_mask);
2396 output_P5_format (f, gr_mask, fr_mask);
2401 output_P6_format (f, gr_mem, gr_mask);
2402 if (ptr->r.record.r.mask.br_mem)
2403 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2405 /* output imask descriptor if necessary: */
2406 if (ptr->r.record.r.mask.i)
2407 output_P4_format (f, ptr->r.record.r.mask.i,
2408 ptr->r.record.r.imask_size);
2412 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2416 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2417 ptr->r.record.p.size);
2430 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2433 output_P3_format (f, rp_br, ptr->r.record.p.br);
2436 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2444 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2453 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2463 case bspstore_sprel:
2465 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2468 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2471 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2474 as_bad ("spill_mask record unimplemented.");
2476 case priunat_when_gr:
2477 case priunat_when_mem:
2481 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2483 case priunat_psprel:
2485 case bspstore_psprel:
2487 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2490 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2493 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2497 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2500 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2501 ptr->r.record.x.reg, ptr->r.record.x.t,
2502 ptr->r.record.x.pspoff);
2505 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2506 ptr->r.record.x.reg, ptr->r.record.x.t,
2507 ptr->r.record.x.spoff);
2510 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2511 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2512 ptr->r.record.x.treg, ptr->r.record.x.t);
2514 case spill_psprel_p:
2515 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2516 ptr->r.record.x.ab, ptr->r.record.x.reg,
2517 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2520 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2521 ptr->r.record.x.ab, ptr->r.record.x.reg,
2522 ptr->r.record.x.t, ptr->r.record.x.spoff);
2525 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2526 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2527 ptr->r.record.x.xy, ptr->r.record.x.treg,
2531 as_bad ("record_type_not_valid");
2536 /* Given a unw_rec_list list, process all the records with
2537 the specified function. */
2539 process_unw_records (list, f)
2544 for (ptr = list; ptr; ptr = ptr->next)
2545 process_one_record (ptr, f);
2548 /* Determine the size of a record list in bytes. */
2550 calc_record_size (list)
2554 process_unw_records (list, count_output);
2558 /* Update IMASK bitmask to reflect the fact that one or more registers
2559 of type TYPE are saved starting at instruction with index T. If N
2560 bits are set in REGMASK, it is assumed that instructions T through
2561 T+N-1 save these registers.
2565 1: instruction saves next fp reg
2566 2: instruction saves next general reg
2567 3: instruction saves next branch reg */
2569 set_imask (region, regmask, t, type)
2570 unw_rec_list *region;
2571 unsigned long regmask;
2575 unsigned char *imask;
2576 unsigned long imask_size;
2580 imask = region->r.record.r.mask.i;
2581 imask_size = region->r.record.r.imask_size;
2584 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2585 imask = xmalloc (imask_size);
2586 memset (imask, 0, imask_size);
2588 region->r.record.r.imask_size = imask_size;
2589 region->r.record.r.mask.i = imask;
2593 pos = 2 * (3 - t % 4);
2596 if (i >= imask_size)
2598 as_bad ("Ignoring attempt to spill beyond end of region");
2602 imask[i] |= (type & 0x3) << pos;
2604 regmask &= (regmask - 1);
2614 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2615 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2616 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2620 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2621 unsigned long slot_addr;
2623 unsigned long first_addr;
2627 unsigned long index = 0;
2629 /* First time we are called, the initial address and frag are invalid. */
2630 if (first_addr == 0)
2633 /* If the two addresses are in different frags, then we need to add in
2634 the remaining size of this frag, and then the entire size of intermediate
2636 while (slot_frag != first_frag)
2638 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2642 /* We can get the final addresses only during and after
2644 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2645 index += 3 * ((first_frag->fr_next->fr_address
2646 - first_frag->fr_address
2647 - first_frag->fr_fix) >> 4);
2650 /* We don't know what the final addresses will be. We try our
2651 best to estimate. */
2652 switch (first_frag->fr_type)
2658 as_fatal ("only constant space allocation is supported");
2664 /* Take alignment into account. Assume the worst case
2665 before relaxation. */
2666 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2670 if (first_frag->fr_symbol)
2672 as_fatal ("only constant offsets are supported");
2676 index += 3 * (first_frag->fr_offset >> 4);
2680 /* Add in the full size of the frag converted to instruction slots. */
2681 index += 3 * (first_frag->fr_fix >> 4);
2682 /* Subtract away the initial part before first_addr. */
2683 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2684 + ((first_addr & 0x3) - (start_addr & 0x3)));
2686 /* Move to the beginning of the next frag. */
2687 first_frag = first_frag->fr_next;
2688 first_addr = (unsigned long) &first_frag->fr_literal;
2691 /* Add in the used part of the last frag. */
2692 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2693 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2697 /* Optimize unwind record directives. */
2699 static unw_rec_list *
2700 optimize_unw_records (list)
2706 /* If the only unwind record is ".prologue" or ".prologue" followed
2707 by ".body", then we can optimize the unwind directives away. */
2708 if (list->r.type == prologue
2709 && (list->next->r.type == endp
2710 || (list->next->r.type == body && list->next->next->r.type == endp)))
2716 /* Given a complete record list, process any records which have
2717 unresolved fields, (ie length counts for a prologue). After
2718 this has been run, all necessary information should be available
2719 within each record to generate an image. */
2722 fixup_unw_records (list, before_relax)
2726 unw_rec_list *ptr, *region = 0;
2727 unsigned long first_addr = 0, rlen = 0, t;
2728 fragS *first_frag = 0;
2730 for (ptr = list; ptr; ptr = ptr->next)
2732 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2733 as_bad (" Insn slot not set in unwind record.");
2734 t = slot_index (ptr->slot_number, ptr->slot_frag,
2735 first_addr, first_frag, before_relax);
2736 switch (ptr->r.type)
2744 unsigned long last_addr = 0;
2745 fragS *last_frag = NULL;
2747 first_addr = ptr->slot_number;
2748 first_frag = ptr->slot_frag;
2749 /* Find either the next body/prologue start, or the end of
2750 the function, and determine the size of the region. */
2751 for (last = ptr->next; last != NULL; last = last->next)
2752 if (last->r.type == prologue || last->r.type == prologue_gr
2753 || last->r.type == body || last->r.type == endp)
2755 last_addr = last->slot_number;
2756 last_frag = last->slot_frag;
2759 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2761 rlen = ptr->r.record.r.rlen = size;
2762 if (ptr->r.type == body)
2763 /* End of region. */
2770 ptr->r.record.b.t = rlen - 1 - t;
2781 case priunat_when_gr:
2782 case priunat_when_mem:
2786 ptr->r.record.p.t = t;
2794 case spill_psprel_p:
2795 ptr->r.record.x.t = t;
2801 as_bad ("frgr_mem record before region record!\n");
2804 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2805 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2806 set_imask (region, ptr->r.record.p.frmask, t, 1);
2807 set_imask (region, ptr->r.record.p.grmask, t, 2);
2812 as_bad ("fr_mem record before region record!\n");
2815 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2816 set_imask (region, ptr->r.record.p.rmask, t, 1);
2821 as_bad ("gr_mem record before region record!\n");
2824 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2825 set_imask (region, ptr->r.record.p.rmask, t, 2);
2830 as_bad ("br_mem record before region record!\n");
2833 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2834 set_imask (region, ptr->r.record.p.brmask, t, 3);
2840 as_bad ("gr_gr record before region record!\n");
2843 set_imask (region, ptr->r.record.p.grmask, t, 2);
2848 as_bad ("br_gr record before region record!\n");
2851 set_imask (region, ptr->r.record.p.brmask, t, 3);
2860 /* Estimate the size of a frag before relaxing. We only have one type of frag
2861 to handle here, which is the unwind info frag. */
2864 ia64_estimate_size_before_relax (fragS *frag,
2865 asection *segtype ATTRIBUTE_UNUSED)
2870 /* ??? This code is identical to the first part of ia64_convert_frag. */
2871 list = (unw_rec_list *) frag->fr_opcode;
2872 fixup_unw_records (list, 0);
2874 len = calc_record_size (list);
2875 /* pad to pointer-size boundary. */
2876 pad = len % md.pointer_size;
2878 len += md.pointer_size - pad;
2879 /* Add 8 for the header + a pointer for the personality offset. */
2880 size = len + 8 + md.pointer_size;
2882 /* fr_var carries the max_chars that we created the fragment with.
2883 We must, of course, have allocated enough memory earlier. */
2884 assert (frag->fr_var >= size);
2886 return frag->fr_fix + size;
2889 /* This function converts a rs_machine_dependent variant frag into a
2890 normal fill frag with the unwind image from the the record list. */
2892 ia64_convert_frag (fragS *frag)
2898 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2899 list = (unw_rec_list *) frag->fr_opcode;
2900 fixup_unw_records (list, 0);
2902 len = calc_record_size (list);
2903 /* pad to pointer-size boundary. */
2904 pad = len % md.pointer_size;
2906 len += md.pointer_size - pad;
2907 /* Add 8 for the header + a pointer for the personality offset. */
2908 size = len + 8 + md.pointer_size;
2910 /* fr_var carries the max_chars that we created the fragment with.
2911 We must, of course, have allocated enough memory earlier. */
2912 assert (frag->fr_var >= size);
2914 /* Initialize the header area. fr_offset is initialized with
2915 unwind.personality_routine. */
2916 if (frag->fr_offset)
2918 if (md.flags & EF_IA_64_ABI64)
2919 flag_value = (bfd_vma) 3 << 32;
2921 /* 32-bit unwind info block. */
2922 flag_value = (bfd_vma) 0x1003 << 32;
2927 md_number_to_chars (frag->fr_literal,
2928 (((bfd_vma) 1 << 48) /* Version. */
2929 | flag_value /* U & E handler flags. */
2930 | (len / md.pointer_size)), /* Length. */
2933 /* Skip the header. */
2934 vbyte_mem_ptr = frag->fr_literal + 8;
2935 process_unw_records (list, output_vbyte_mem);
2937 /* Fill the padding bytes with zeros. */
2939 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2940 md.pointer_size - pad);
2942 frag->fr_fix += size;
2943 frag->fr_type = rs_fill;
2945 frag->fr_offset = 0;
2949 convert_expr_to_ab_reg (e, ab, regp)
2956 if (e->X_op != O_register)
2959 reg = e->X_add_number;
2960 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2963 *regp = reg - REG_GR;
2965 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2966 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2969 *regp = reg - REG_FR;
2971 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2974 *regp = reg - REG_BR;
2981 case REG_PR: *regp = 0; break;
2982 case REG_PSP: *regp = 1; break;
2983 case REG_PRIUNAT: *regp = 2; break;
2984 case REG_BR + 0: *regp = 3; break;
2985 case REG_AR + AR_BSP: *regp = 4; break;
2986 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2987 case REG_AR + AR_RNAT: *regp = 6; break;
2988 case REG_AR + AR_UNAT: *regp = 7; break;
2989 case REG_AR + AR_FPSR: *regp = 8; break;
2990 case REG_AR + AR_PFS: *regp = 9; break;
2991 case REG_AR + AR_LC: *regp = 10; break;
3001 convert_expr_to_xy_reg (e, xy, regp)
3008 if (e->X_op != O_register)
3011 reg = e->X_add_number;
3013 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3016 *regp = reg - REG_GR;
3018 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3021 *regp = reg - REG_FR;
3023 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3026 *regp = reg - REG_BR;
3035 int dummy ATTRIBUTE_UNUSED;
3040 radix = *input_line_pointer++;
3042 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3044 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3045 ignore_rest_of_line ();
3050 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3052 dot_special_section (which)
3055 set_section ((char *) special_section_name[which]);
3059 add_unwind_entry (ptr)
3063 unwind.tail->next = ptr;
3068 /* The current entry can in fact be a chain of unwind entries. */
3069 if (unwind.current_entry == NULL)
3070 unwind.current_entry = ptr;
3075 int dummy ATTRIBUTE_UNUSED;
3081 if (e.X_op != O_constant)
3082 as_bad ("Operand to .fframe must be a constant");
3084 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3089 int dummy ATTRIBUTE_UNUSED;
3095 reg = e.X_add_number - REG_GR;
3096 if (e.X_op == O_register && reg < 128)
3098 add_unwind_entry (output_mem_stack_v ());
3099 if (! (unwind.prologue_mask & 2))
3100 add_unwind_entry (output_psp_gr (reg));
3103 as_bad ("First operand to .vframe must be a general register");
3107 dot_vframesp (dummy)
3108 int dummy ATTRIBUTE_UNUSED;
3113 if (e.X_op == O_constant)
3115 add_unwind_entry (output_mem_stack_v ());
3116 add_unwind_entry (output_psp_sprel (e.X_add_number));
3119 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3123 dot_vframepsp (dummy)
3124 int dummy ATTRIBUTE_UNUSED;
3129 if (e.X_op == O_constant)
3131 add_unwind_entry (output_mem_stack_v ());
3132 add_unwind_entry (output_psp_sprel (e.X_add_number));
3135 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3140 int dummy ATTRIBUTE_UNUSED;
3146 sep = parse_operand (&e1);
3148 as_bad ("No second operand to .save");
3149 sep = parse_operand (&e2);
3151 reg1 = e1.X_add_number;
3152 reg2 = e2.X_add_number - REG_GR;
3154 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3155 if (e1.X_op == O_register)
3157 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3161 case REG_AR + AR_BSP:
3162 add_unwind_entry (output_bsp_when ());
3163 add_unwind_entry (output_bsp_gr (reg2));
3165 case REG_AR + AR_BSPSTORE:
3166 add_unwind_entry (output_bspstore_when ());
3167 add_unwind_entry (output_bspstore_gr (reg2));
3169 case REG_AR + AR_RNAT:
3170 add_unwind_entry (output_rnat_when ());
3171 add_unwind_entry (output_rnat_gr (reg2));
3173 case REG_AR + AR_UNAT:
3174 add_unwind_entry (output_unat_when ());
3175 add_unwind_entry (output_unat_gr (reg2));
3177 case REG_AR + AR_FPSR:
3178 add_unwind_entry (output_fpsr_when ());
3179 add_unwind_entry (output_fpsr_gr (reg2));
3181 case REG_AR + AR_PFS:
3182 add_unwind_entry (output_pfs_when ());
3183 if (! (unwind.prologue_mask & 4))
3184 add_unwind_entry (output_pfs_gr (reg2));
3186 case REG_AR + AR_LC:
3187 add_unwind_entry (output_lc_when ());
3188 add_unwind_entry (output_lc_gr (reg2));
3191 add_unwind_entry (output_rp_when ());
3192 if (! (unwind.prologue_mask & 8))
3193 add_unwind_entry (output_rp_gr (reg2));
3196 add_unwind_entry (output_preds_when ());
3197 if (! (unwind.prologue_mask & 1))
3198 add_unwind_entry (output_preds_gr (reg2));
3201 add_unwind_entry (output_priunat_when_gr ());
3202 add_unwind_entry (output_priunat_gr (reg2));
3205 as_bad ("First operand not a valid register");
3209 as_bad (" Second operand not a valid register");
3212 as_bad ("First operand not a register");
3217 int dummy ATTRIBUTE_UNUSED;
3220 unsigned long ecount; /* # of _additional_ regions to pop */
3223 sep = parse_operand (&e1);
3224 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3226 as_bad ("First operand to .restore must be stack pointer (sp)");
3232 parse_operand (&e2);
3233 if (e2.X_op != O_constant || e2.X_add_number < 0)
3235 as_bad ("Second operand to .restore must be a constant >= 0");
3238 ecount = e2.X_add_number;
3241 ecount = unwind.prologue_count - 1;
3243 if (ecount >= unwind.prologue_count)
3245 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3246 ecount + 1, unwind.prologue_count);
3250 add_unwind_entry (output_epilogue (ecount));
3252 if (ecount < unwind.prologue_count)
3253 unwind.prologue_count -= ecount + 1;
3255 unwind.prologue_count = 0;
3259 dot_restorereg (dummy)
3260 int dummy ATTRIBUTE_UNUSED;
3262 unsigned int ab, reg;
3267 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3269 as_bad ("First operand to .restorereg must be a preserved register");
3272 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3276 dot_restorereg_p (dummy)
3277 int dummy ATTRIBUTE_UNUSED;
3279 unsigned int qp, ab, reg;
3283 sep = parse_operand (&e1);
3286 as_bad ("No second operand to .restorereg.p");
3290 parse_operand (&e2);
3292 qp = e1.X_add_number - REG_P;
3293 if (e1.X_op != O_register || qp > 63)
3295 as_bad ("First operand to .restorereg.p must be a predicate");
3299 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3301 as_bad ("Second operand to .restorereg.p must be a preserved register");
3304 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3308 generate_unwind_image (text_name)
3309 const char *text_name;
3314 /* Mark the end of the unwind info, so that we can compute the size of the
3315 last unwind region. */
3316 add_unwind_entry (output_endp ());
3318 /* Force out pending instructions, to make sure all unwind records have
3319 a valid slot_number field. */
3320 ia64_flush_insns ();
3322 /* Generate the unwind record. */
3323 list = optimize_unw_records (unwind.list);
3324 fixup_unw_records (list, 1);
3325 size = calc_record_size (list);
3327 if (size > 0 || unwind.force_unwind_entry)
3329 unwind.force_unwind_entry = 0;
3330 /* pad to pointer-size boundary. */
3331 pad = size % md.pointer_size;
3333 size += md.pointer_size - pad;
3334 /* Add 8 for the header + a pointer for the personality
3336 size += 8 + md.pointer_size;
3339 /* If there are unwind records, switch sections, and output the info. */
3344 bfd_reloc_code_real_type reloc;
3346 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name);
3347 set_section (sec_name);
3348 bfd_set_section_flags (stdoutput, now_seg,
3349 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3351 /* Make sure the section has 4 byte alignment for ILP32 and
3352 8 byte alignment for LP64. */
3353 frag_align (md.pointer_size_shift, 0, 0);
3354 record_alignment (now_seg, md.pointer_size_shift);
3356 /* Set expression which points to start of unwind descriptor area. */
3357 unwind.info = expr_build_dot ();
3359 frag_var (rs_machine_dependent, size, size, 0, 0,
3360 (offsetT) unwind.personality_routine, (char *) list);
3362 /* Add the personality address to the image. */
3363 if (unwind.personality_routine != 0)
3365 exp.X_op = O_symbol;
3366 exp.X_add_symbol = unwind.personality_routine;
3367 exp.X_add_number = 0;
3369 if (md.flags & EF_IA_64_BE)
3371 if (md.flags & EF_IA_64_ABI64)
3372 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3374 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3378 if (md.flags & EF_IA_64_ABI64)
3379 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3381 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3384 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3385 md.pointer_size, &exp, 0, reloc);
3386 unwind.personality_routine = 0;
3390 free_saved_prologue_counts ();
3391 unwind.list = unwind.tail = unwind.current_entry = NULL;
3395 dot_handlerdata (dummy)
3396 int dummy ATTRIBUTE_UNUSED;
3398 const char *text_name = segment_name (now_seg);
3400 /* If text section name starts with ".text" (which it should),
3401 strip this prefix off. */
3402 if (strcmp (text_name, ".text") == 0)
3405 unwind.force_unwind_entry = 1;
3407 /* Remember which segment we're in so we can switch back after .endp */
3408 unwind.saved_text_seg = now_seg;
3409 unwind.saved_text_subseg = now_subseg;
3411 /* Generate unwind info into unwind-info section and then leave that
3412 section as the currently active one so dataXX directives go into
3413 the language specific data area of the unwind info block. */
3414 generate_unwind_image (text_name);
3415 demand_empty_rest_of_line ();
3419 dot_unwentry (dummy)
3420 int dummy ATTRIBUTE_UNUSED;
3422 unwind.force_unwind_entry = 1;
3423 demand_empty_rest_of_line ();
3428 int dummy ATTRIBUTE_UNUSED;
3434 reg = e.X_add_number - REG_BR;
3435 if (e.X_op == O_register && reg < 8)
3436 add_unwind_entry (output_rp_br (reg));
3438 as_bad ("First operand not a valid branch register");
3442 dot_savemem (psprel)
3449 sep = parse_operand (&e1);
3451 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3452 sep = parse_operand (&e2);
3454 reg1 = e1.X_add_number;
3455 val = e2.X_add_number;
3457 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3458 if (e1.X_op == O_register)
3460 if (e2.X_op == O_constant)
3464 case REG_AR + AR_BSP:
3465 add_unwind_entry (output_bsp_when ());
3466 add_unwind_entry ((psprel
3468 : output_bsp_sprel) (val));
3470 case REG_AR + AR_BSPSTORE:
3471 add_unwind_entry (output_bspstore_when ());
3472 add_unwind_entry ((psprel
3473 ? output_bspstore_psprel
3474 : output_bspstore_sprel) (val));
3476 case REG_AR + AR_RNAT:
3477 add_unwind_entry (output_rnat_when ());
3478 add_unwind_entry ((psprel
3479 ? output_rnat_psprel
3480 : output_rnat_sprel) (val));
3482 case REG_AR + AR_UNAT:
3483 add_unwind_entry (output_unat_when ());
3484 add_unwind_entry ((psprel
3485 ? output_unat_psprel
3486 : output_unat_sprel) (val));
3488 case REG_AR + AR_FPSR:
3489 add_unwind_entry (output_fpsr_when ());
3490 add_unwind_entry ((psprel
3491 ? output_fpsr_psprel
3492 : output_fpsr_sprel) (val));
3494 case REG_AR + AR_PFS:
3495 add_unwind_entry (output_pfs_when ());
3496 add_unwind_entry ((psprel
3498 : output_pfs_sprel) (val));
3500 case REG_AR + AR_LC:
3501 add_unwind_entry (output_lc_when ());
3502 add_unwind_entry ((psprel
3504 : output_lc_sprel) (val));
3507 add_unwind_entry (output_rp_when ());
3508 add_unwind_entry ((psprel
3510 : output_rp_sprel) (val));
3513 add_unwind_entry (output_preds_when ());
3514 add_unwind_entry ((psprel
3515 ? output_preds_psprel
3516 : output_preds_sprel) (val));
3519 add_unwind_entry (output_priunat_when_mem ());
3520 add_unwind_entry ((psprel
3521 ? output_priunat_psprel
3522 : output_priunat_sprel) (val));
3525 as_bad ("First operand not a valid register");
3529 as_bad (" Second operand not a valid constant");
3532 as_bad ("First operand not a register");
3537 int dummy ATTRIBUTE_UNUSED;
3541 sep = parse_operand (&e1);
3543 parse_operand (&e2);
3545 if (e1.X_op != O_constant)
3546 as_bad ("First operand to .save.g must be a constant.");
3549 int grmask = e1.X_add_number;
3551 add_unwind_entry (output_gr_mem (grmask));
3554 int reg = e2.X_add_number - REG_GR;
3555 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3556 add_unwind_entry (output_gr_gr (grmask, reg));
3558 as_bad ("Second operand is an invalid register.");
3565 int dummy ATTRIBUTE_UNUSED;
3569 sep = parse_operand (&e1);
3571 if (e1.X_op != O_constant)
3572 as_bad ("Operand to .save.f must be a constant.");
3574 add_unwind_entry (output_fr_mem (e1.X_add_number));
3579 int dummy ATTRIBUTE_UNUSED;
3586 sep = parse_operand (&e1);
3587 if (e1.X_op != O_constant)
3589 as_bad ("First operand to .save.b must be a constant.");
3592 brmask = e1.X_add_number;
3596 sep = parse_operand (&e2);
3597 reg = e2.X_add_number - REG_GR;
3598 if (e2.X_op != O_register || reg > 127)
3600 as_bad ("Second operand to .save.b must be a general register.");
3603 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3606 add_unwind_entry (output_br_mem (brmask));
3608 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3609 ignore_rest_of_line ();
3614 int dummy ATTRIBUTE_UNUSED;
3618 sep = parse_operand (&e1);
3620 parse_operand (&e2);
3622 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3623 as_bad ("Both operands of .save.gf must be constants.");
3626 int grmask = e1.X_add_number;
3627 int frmask = e2.X_add_number;
3628 add_unwind_entry (output_frgr_mem (grmask, frmask));
3634 int dummy ATTRIBUTE_UNUSED;
3639 sep = parse_operand (&e);
3640 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3641 ignore_rest_of_line ();
3643 if (e.X_op != O_constant)
3644 as_bad ("Operand to .spill must be a constant");
3646 add_unwind_entry (output_spill_base (e.X_add_number));
3650 dot_spillreg (dummy)
3651 int dummy ATTRIBUTE_UNUSED;
3653 int sep, ab, xy, reg, treg;
3656 sep = parse_operand (&e1);
3659 as_bad ("No second operand to .spillreg");
3663 parse_operand (&e2);
3665 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3667 as_bad ("First operand to .spillreg must be a preserved register");
3671 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3673 as_bad ("Second operand to .spillreg must be a register");
3677 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3681 dot_spillmem (psprel)
3687 sep = parse_operand (&e1);
3690 as_bad ("Second operand missing");
3694 parse_operand (&e2);
3696 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3698 as_bad ("First operand to .spill%s must be a preserved register",
3699 psprel ? "psp" : "sp");
3703 if (e2.X_op != O_constant)
3705 as_bad ("Second operand to .spill%s must be a constant",
3706 psprel ? "psp" : "sp");
3711 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3713 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3717 dot_spillreg_p (dummy)
3718 int dummy ATTRIBUTE_UNUSED;
3720 int sep, ab, xy, reg, treg;
3721 expressionS e1, e2, e3;
3724 sep = parse_operand (&e1);
3727 as_bad ("No second and third operand to .spillreg.p");
3731 sep = parse_operand (&e2);
3734 as_bad ("No third operand to .spillreg.p");
3738 parse_operand (&e3);
3740 qp = e1.X_add_number - REG_P;
3742 if (e1.X_op != O_register || qp > 63)
3744 as_bad ("First operand to .spillreg.p must be a predicate");
3748 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3750 as_bad ("Second operand to .spillreg.p must be a preserved register");
3754 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3756 as_bad ("Third operand to .spillreg.p must be a register");
3760 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3764 dot_spillmem_p (psprel)
3767 expressionS e1, e2, e3;
3771 sep = parse_operand (&e1);
3774 as_bad ("Second operand missing");
3778 parse_operand (&e2);
3781 as_bad ("Second operand missing");
3785 parse_operand (&e3);
3787 qp = e1.X_add_number - REG_P;
3788 if (e1.X_op != O_register || qp > 63)
3790 as_bad ("First operand to .spill%s_p must be a predicate",
3791 psprel ? "psp" : "sp");
3795 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3797 as_bad ("Second operand to .spill%s_p must be a preserved register",
3798 psprel ? "psp" : "sp");
3802 if (e3.X_op != O_constant)
3804 as_bad ("Third operand to .spill%s_p must be a constant",
3805 psprel ? "psp" : "sp");
3810 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3812 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3816 get_saved_prologue_count (lbl)
3819 label_prologue_count *lpc = unwind.saved_prologue_counts;
3821 while (lpc != NULL && lpc->label_number != lbl)
3825 return lpc->prologue_count;
3827 as_bad ("Missing .label_state %ld", lbl);
3832 save_prologue_count (lbl, count)
3836 label_prologue_count *lpc = unwind.saved_prologue_counts;
3838 while (lpc != NULL && lpc->label_number != lbl)
3842 lpc->prologue_count = count;
3845 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3847 new_lpc->next = unwind.saved_prologue_counts;
3848 new_lpc->label_number = lbl;
3849 new_lpc->prologue_count = count;
3850 unwind.saved_prologue_counts = new_lpc;
3855 free_saved_prologue_counts ()
3857 label_prologue_count *lpc = unwind.saved_prologue_counts;
3858 label_prologue_count *next;
3867 unwind.saved_prologue_counts = NULL;
3871 dot_label_state (dummy)
3872 int dummy ATTRIBUTE_UNUSED;
3877 if (e.X_op != O_constant)
3879 as_bad ("Operand to .label_state must be a constant");
3882 add_unwind_entry (output_label_state (e.X_add_number));
3883 save_prologue_count (e.X_add_number, unwind.prologue_count);
3887 dot_copy_state (dummy)
3888 int dummy ATTRIBUTE_UNUSED;
3893 if (e.X_op != O_constant)
3895 as_bad ("Operand to .copy_state must be a constant");
3898 add_unwind_entry (output_copy_state (e.X_add_number));
3899 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3904 int dummy ATTRIBUTE_UNUSED;
3909 sep = parse_operand (&e1);
3912 as_bad ("Second operand to .unwabi missing");
3915 sep = parse_operand (&e2);
3916 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3917 ignore_rest_of_line ();
3919 if (e1.X_op != O_constant)
3921 as_bad ("First operand to .unwabi must be a constant");
3925 if (e2.X_op != O_constant)
3927 as_bad ("Second operand to .unwabi must be a constant");
3931 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
3935 dot_personality (dummy)
3936 int dummy ATTRIBUTE_UNUSED;
3940 name = input_line_pointer;
3941 c = get_symbol_end ();
3942 p = input_line_pointer;
3943 unwind.personality_routine = symbol_find_or_make (name);
3944 unwind.force_unwind_entry = 1;
3947 demand_empty_rest_of_line ();
3952 int dummy ATTRIBUTE_UNUSED;
3957 unwind.proc_start = expr_build_dot ();
3958 /* Parse names of main and alternate entry points and mark them as
3959 function symbols: */
3963 name = input_line_pointer;
3964 c = get_symbol_end ();
3965 p = input_line_pointer;
3966 sym = symbol_find_or_make (name);
3967 if (unwind.proc_start == 0)
3969 unwind.proc_start = sym;
3971 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3974 if (*input_line_pointer != ',')
3976 ++input_line_pointer;
3978 demand_empty_rest_of_line ();
3981 unwind.prologue_count = 0;
3982 unwind.list = unwind.tail = unwind.current_entry = NULL;
3983 unwind.personality_routine = 0;
3988 int dummy ATTRIBUTE_UNUSED;
3990 unwind.prologue = 0;
3991 unwind.prologue_mask = 0;
3993 add_unwind_entry (output_body ());
3994 demand_empty_rest_of_line ();
3998 dot_prologue (dummy)
3999 int dummy ATTRIBUTE_UNUSED;
4002 int mask = 0, grsave = 0;
4004 if (!is_it_end_of_statement ())
4007 sep = parse_operand (&e1);
4009 as_bad ("No second operand to .prologue");
4010 sep = parse_operand (&e2);
4011 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4012 ignore_rest_of_line ();
4014 if (e1.X_op == O_constant)
4016 mask = e1.X_add_number;
4018 if (e2.X_op == O_constant)
4019 grsave = e2.X_add_number;
4020 else if (e2.X_op == O_register
4021 && (grsave = e2.X_add_number - REG_GR) < 128)
4024 as_bad ("Second operand not a constant or general register");
4026 add_unwind_entry (output_prologue_gr (mask, grsave));
4029 as_bad ("First operand not a constant");
4032 add_unwind_entry (output_prologue ());
4034 unwind.prologue = 1;
4035 unwind.prologue_mask = mask;
4036 ++unwind.prologue_count;
4041 int dummy ATTRIBUTE_UNUSED;
4045 int bytes_per_address;
4048 subsegT saved_subseg;
4049 const char *sec_name, *text_name;
4053 if (unwind.saved_text_seg)
4055 saved_seg = unwind.saved_text_seg;
4056 saved_subseg = unwind.saved_text_subseg;
4057 unwind.saved_text_seg = NULL;
4061 saved_seg = now_seg;
4062 saved_subseg = now_subseg;
4066 Use a slightly ugly scheme to derive the unwind section names from
4067 the text section name:
4069 text sect. unwind table sect.
4070 name: name: comments:
4071 ---------- ----------------- --------------------------------
4073 .text.foo .IA_64.unwind.text.foo
4074 .foo .IA_64.unwind.foo
4076 .gnu.linkonce.ia64unw.foo
4077 _info .IA_64.unwind_info gas issues error message (ditto)
4078 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4080 This mapping is done so that:
4082 (a) An object file with unwind info only in .text will use
4083 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4084 This follows the letter of the ABI and also ensures backwards
4085 compatibility with older toolchains.
4087 (b) An object file with unwind info in multiple text sections
4088 will use separate unwind sections for each text section.
4089 This allows us to properly set the "sh_info" and "sh_link"
4090 fields in SHT_IA_64_UNWIND as required by the ABI and also
4091 lets GNU ld support programs with multiple segments
4092 containing unwind info (as might be the case for certain
4093 embedded applications).
4095 (c) An error is issued if there would be a name clash.
4097 text_name = segment_name (saved_seg);
4098 if (strncmp (text_name, "_info", 5) == 0)
4100 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4102 ignore_rest_of_line ();
4105 if (strcmp (text_name, ".text") == 0)
4108 insn_group_break (1, 0, 0);
4110 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4112 generate_unwind_image (text_name);
4114 if (unwind.info || unwind.force_unwind_entry)
4116 subseg_set (md.last_text_seg, 0);
4117 unwind.proc_end = expr_build_dot ();
4119 make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name);
4120 set_section ((char *) sec_name);
4121 bfd_set_section_flags (stdoutput, now_seg,
4122 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
4124 /* Make sure that section has 4 byte alignment for ILP32 and
4125 8 byte alignment for LP64. */
4126 record_alignment (now_seg, md.pointer_size_shift);
4128 /* Need space for 3 pointers for procedure start, procedure end,
4130 ptr = frag_more (3 * md.pointer_size);
4131 where = frag_now_fix () - (3 * md.pointer_size);
4132 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4134 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4135 e.X_op = O_pseudo_fixup;
4136 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4138 e.X_add_symbol = unwind.proc_start;
4139 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4141 e.X_op = O_pseudo_fixup;
4142 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4144 e.X_add_symbol = unwind.proc_end;
4145 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4146 bytes_per_address, &e);
4150 e.X_op = O_pseudo_fixup;
4151 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4153 e.X_add_symbol = unwind.info;
4154 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4155 bytes_per_address, &e);
4158 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4162 subseg_set (saved_seg, saved_subseg);
4164 /* Parse names of main and alternate entry points and set symbol sizes. */
4168 name = input_line_pointer;
4169 c = get_symbol_end ();
4170 p = input_line_pointer;
4171 sym = symbol_find (name);
4172 if (sym && unwind.proc_start
4173 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4174 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4176 fragS *fr = symbol_get_frag (unwind.proc_start);
4177 fragS *frag = symbol_get_frag (sym);
4179 /* Check whether the function label is at or beyond last
4181 while (fr && fr != frag)
4185 if (frag == frag_now && SEG_NORMAL (now_seg))
4186 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4189 symbol_get_obj (sym)->size =
4190 (expressionS *) xmalloc (sizeof (expressionS));
4191 symbol_get_obj (sym)->size->X_op = O_subtract;
4192 symbol_get_obj (sym)->size->X_add_symbol
4193 = symbol_new (FAKE_LABEL_NAME, now_seg,
4194 frag_now_fix (), frag_now);
4195 symbol_get_obj (sym)->size->X_op_symbol = sym;
4196 symbol_get_obj (sym)->size->X_add_number = 0;
4202 if (*input_line_pointer != ',')
4204 ++input_line_pointer;
4206 demand_empty_rest_of_line ();
4207 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4211 dot_template (template)
4214 CURR_SLOT.user_template = template;
4219 int dummy ATTRIBUTE_UNUSED;
4221 int ins, locs, outs, rots;
4223 if (is_it_end_of_statement ())
4224 ins = locs = outs = rots = 0;
4227 ins = get_absolute_expression ();
4228 if (*input_line_pointer++ != ',')
4230 locs = get_absolute_expression ();
4231 if (*input_line_pointer++ != ',')
4233 outs = get_absolute_expression ();
4234 if (*input_line_pointer++ != ',')
4236 rots = get_absolute_expression ();
4238 set_regstack (ins, locs, outs, rots);
4242 as_bad ("Comma expected");
4243 ignore_rest_of_line ();
4250 unsigned num_regs, num_alloced = 0;
4251 struct dynreg **drpp, *dr;
4252 int ch, base_reg = 0;
4258 case DYNREG_GR: base_reg = REG_GR + 32; break;
4259 case DYNREG_FR: base_reg = REG_FR + 32; break;
4260 case DYNREG_PR: base_reg = REG_P + 16; break;
4264 /* First, remove existing names from hash table. */
4265 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4267 hash_delete (md.dynreg_hash, dr->name);
4271 drpp = &md.dynreg[type];
4274 start = input_line_pointer;
4275 ch = get_symbol_end ();
4276 *input_line_pointer = ch;
4277 len = (input_line_pointer - start);
4280 if (*input_line_pointer != '[')
4282 as_bad ("Expected '['");
4285 ++input_line_pointer; /* skip '[' */
4287 num_regs = get_absolute_expression ();
4289 if (*input_line_pointer++ != ']')
4291 as_bad ("Expected ']'");
4296 num_alloced += num_regs;
4300 if (num_alloced > md.rot.num_regs)
4302 as_bad ("Used more than the declared %d rotating registers",
4308 if (num_alloced > 96)
4310 as_bad ("Used more than the available 96 rotating registers");
4315 if (num_alloced > 48)
4317 as_bad ("Used more than the available 48 rotating registers");
4326 name = obstack_alloc (¬es, len + 1);
4327 memcpy (name, start, len);
4332 *drpp = obstack_alloc (¬es, sizeof (*dr));
4333 memset (*drpp, 0, sizeof (*dr));
4338 dr->num_regs = num_regs;
4339 dr->base = base_reg;
4341 base_reg += num_regs;
4343 if (hash_insert (md.dynreg_hash, name, dr))
4345 as_bad ("Attempt to redefine register set `%s'", name);
4349 if (*input_line_pointer != ',')
4351 ++input_line_pointer; /* skip comma */
4354 demand_empty_rest_of_line ();
4358 ignore_rest_of_line ();
4362 dot_byteorder (byteorder)
4365 segment_info_type *seginfo = seg_info (now_seg);
4367 if (byteorder == -1)
4369 if (seginfo->tc_segment_info_data.endian == 0)
4370 seginfo->tc_segment_info_data.endian
4371 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4372 byteorder = seginfo->tc_segment_info_data.endian == 1;
4375 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4377 if (target_big_endian != byteorder)
4379 target_big_endian = byteorder;
4380 if (target_big_endian)
4382 ia64_number_to_chars = number_to_chars_bigendian;
4383 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4387 ia64_number_to_chars = number_to_chars_littleendian;
4388 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4395 int dummy ATTRIBUTE_UNUSED;
4402 option = input_line_pointer;
4403 ch = get_symbol_end ();
4404 if (strcmp (option, "lsb") == 0)
4405 md.flags &= ~EF_IA_64_BE;
4406 else if (strcmp (option, "msb") == 0)
4407 md.flags |= EF_IA_64_BE;
4408 else if (strcmp (option, "abi32") == 0)
4409 md.flags &= ~EF_IA_64_ABI64;
4410 else if (strcmp (option, "abi64") == 0)
4411 md.flags |= EF_IA_64_ABI64;
4413 as_bad ("Unknown psr option `%s'", option);
4414 *input_line_pointer = ch;
4417 if (*input_line_pointer != ',')
4420 ++input_line_pointer;
4423 demand_empty_rest_of_line ();
4428 int dummy ATTRIBUTE_UNUSED;
4430 new_logical_line (0, get_absolute_expression ());
4431 demand_empty_rest_of_line ();
4435 parse_section_name ()
4441 if (*input_line_pointer != '"')
4443 as_bad ("Missing section name");
4444 ignore_rest_of_line ();
4447 name = demand_copy_C_string (&len);
4450 ignore_rest_of_line ();
4454 if (*input_line_pointer != ',')
4456 as_bad ("Comma expected after section name");
4457 ignore_rest_of_line ();
4460 ++input_line_pointer; /* skip comma */
4468 char *name = parse_section_name ();
4472 md.keep_pending_output = 1;
4475 obj_elf_previous (0);
4476 md.keep_pending_output = 0;
4479 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4482 stmt_float_cons (kind)
4503 ia64_do_align (alignment);
4511 int saved_auto_align = md.auto_align;
4515 md.auto_align = saved_auto_align;
4519 dot_xfloat_cons (kind)
4522 char *name = parse_section_name ();
4526 md.keep_pending_output = 1;
4528 stmt_float_cons (kind);
4529 obj_elf_previous (0);
4530 md.keep_pending_output = 0;
4534 dot_xstringer (zero)
4537 char *name = parse_section_name ();
4541 md.keep_pending_output = 1;
4544 obj_elf_previous (0);
4545 md.keep_pending_output = 0;
4552 int saved_auto_align = md.auto_align;
4553 char *name = parse_section_name ();
4557 md.keep_pending_output = 1;
4561 md.auto_align = saved_auto_align;
4562 obj_elf_previous (0);
4563 md.keep_pending_output = 0;
4567 dot_xfloat_cons_ua (kind)
4570 int saved_auto_align = md.auto_align;
4571 char *name = parse_section_name ();
4575 md.keep_pending_output = 1;
4578 stmt_float_cons (kind);
4579 md.auto_align = saved_auto_align;
4580 obj_elf_previous (0);
4581 md.keep_pending_output = 0;
4584 /* .reg.val <regname>,value */
4588 int dummy ATTRIBUTE_UNUSED;
4593 if (reg.X_op != O_register)
4595 as_bad (_("Register name expected"));
4596 ignore_rest_of_line ();
4598 else if (*input_line_pointer++ != ',')
4600 as_bad (_("Comma expected"));
4601 ignore_rest_of_line ();
4605 valueT value = get_absolute_expression ();
4606 int regno = reg.X_add_number;
4607 if (regno < REG_GR || regno > REG_GR + 128)
4608 as_warn (_("Register value annotation ignored"));
4611 gr_values[regno - REG_GR].known = 1;
4612 gr_values[regno - REG_GR].value = value;
4613 gr_values[regno - REG_GR].path = md.path;
4616 demand_empty_rest_of_line ();
4619 /* select dv checking mode
4624 A stop is inserted when changing modes
4631 if (md.manual_bundling)
4632 as_warn (_("Directive invalid within a bundle"));
4634 if (type == 'E' || type == 'A')
4635 md.mode_explicitly_set = 0;
4637 md.mode_explicitly_set = 1;
4644 if (md.explicit_mode)
4645 insn_group_break (1, 0, 0);
4646 md.explicit_mode = 0;
4650 if (!md.explicit_mode)
4651 insn_group_break (1, 0, 0);
4652 md.explicit_mode = 1;
4656 if (md.explicit_mode != md.default_explicit_mode)
4657 insn_group_break (1, 0, 0);
4658 md.explicit_mode = md.default_explicit_mode;
4659 md.mode_explicitly_set = 0;
4670 for (regno = 0; regno < 64; regno++)
4672 if (mask & ((valueT) 1 << regno))
4674 fprintf (stderr, "%s p%d", comma, regno);
4681 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4682 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4683 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4684 .pred.safe_across_calls p1 [, p2 [,...]]
4693 int p1 = -1, p2 = -1;
4697 if (*input_line_pointer != '"')
4699 as_bad (_("Missing predicate relation type"));
4700 ignore_rest_of_line ();
4706 char *form = demand_copy_C_string (&len);
4707 if (strcmp (form, "mutex") == 0)
4709 else if (strcmp (form, "clear") == 0)
4711 else if (strcmp (form, "imply") == 0)
4715 as_bad (_("Unrecognized predicate relation type"));
4716 ignore_rest_of_line ();
4720 if (*input_line_pointer == ',')
4721 ++input_line_pointer;
4731 if (TOUPPER (*input_line_pointer) != 'P'
4732 || (regno = atoi (++input_line_pointer)) < 0
4735 as_bad (_("Predicate register expected"));
4736 ignore_rest_of_line ();
4739 while (ISDIGIT (*input_line_pointer))
4740 ++input_line_pointer;
4747 as_warn (_("Duplicate predicate register ignored"));
4750 /* See if it's a range. */
4751 if (*input_line_pointer == '-')
4754 ++input_line_pointer;
4756 if (TOUPPER (*input_line_pointer) != 'P'
4757 || (regno = atoi (++input_line_pointer)) < 0
4760 as_bad (_("Predicate register expected"));
4761 ignore_rest_of_line ();
4764 while (ISDIGIT (*input_line_pointer))
4765 ++input_line_pointer;
4769 as_bad (_("Bad register range"));
4770 ignore_rest_of_line ();
4781 if (*input_line_pointer != ',')
4783 ++input_line_pointer;
4792 clear_qp_mutex (mask);
4793 clear_qp_implies (mask, (valueT) 0);
4796 if (count != 2 || p1 == -1 || p2 == -1)
4797 as_bad (_("Predicate source and target required"));
4798 else if (p1 == 0 || p2 == 0)
4799 as_bad (_("Use of p0 is not valid in this context"));
4801 add_qp_imply (p1, p2);
4806 as_bad (_("At least two PR arguments expected"));
4811 as_bad (_("Use of p0 is not valid in this context"));
4814 add_qp_mutex (mask);
4817 /* note that we don't override any existing relations */
4820 as_bad (_("At least one PR argument expected"));
4825 fprintf (stderr, "Safe across calls: ");
4826 print_prmask (mask);
4827 fprintf (stderr, "\n");
4829 qp_safe_across_calls = mask;
4832 demand_empty_rest_of_line ();
4835 /* .entry label [, label [, ...]]
4836 Hint to DV code that the given labels are to be considered entry points.
4837 Otherwise, only global labels are considered entry points. */
4841 int dummy ATTRIBUTE_UNUSED;
4850 name = input_line_pointer;
4851 c = get_symbol_end ();
4852 symbolP = symbol_find_or_make (name);
4854 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4856 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4859 *input_line_pointer = c;
4861 c = *input_line_pointer;
4864 input_line_pointer++;
4866 if (*input_line_pointer == '\n')
4872 demand_empty_rest_of_line ();
4875 /* .mem.offset offset, base
4876 "base" is used to distinguish between offsets from a different base. */
4879 dot_mem_offset (dummy)
4880 int dummy ATTRIBUTE_UNUSED;
4882 md.mem_offset.hint = 1;
4883 md.mem_offset.offset = get_absolute_expression ();
4884 if (*input_line_pointer != ',')
4886 as_bad (_("Comma expected"));
4887 ignore_rest_of_line ();
4890 ++input_line_pointer;
4891 md.mem_offset.base = get_absolute_expression ();
4892 demand_empty_rest_of_line ();
4895 /* ia64-specific pseudo-ops: */
4896 const pseudo_typeS md_pseudo_table[] =
4898 { "radix", dot_radix, 0 },
4899 { "lcomm", s_lcomm_bytes, 1 },
4900 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4901 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4902 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4903 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4904 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4905 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4906 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4907 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4908 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4909 { "proc", dot_proc, 0 },
4910 { "body", dot_body, 0 },
4911 { "prologue", dot_prologue, 0 },
4912 { "endp", dot_endp, 0 },
4914 { "fframe", dot_fframe, 0 },
4915 { "vframe", dot_vframe, 0 },
4916 { "vframesp", dot_vframesp, 0 },
4917 { "vframepsp", dot_vframepsp, 0 },
4918 { "save", dot_save, 0 },
4919 { "restore", dot_restore, 0 },
4920 { "restorereg", dot_restorereg, 0 },
4921 { "restorereg.p", dot_restorereg_p, 0 },
4922 { "handlerdata", dot_handlerdata, 0 },
4923 { "unwentry", dot_unwentry, 0 },
4924 { "altrp", dot_altrp, 0 },
4925 { "savesp", dot_savemem, 0 },
4926 { "savepsp", dot_savemem, 1 },
4927 { "save.g", dot_saveg, 0 },
4928 { "save.f", dot_savef, 0 },
4929 { "save.b", dot_saveb, 0 },
4930 { "save.gf", dot_savegf, 0 },
4931 { "spill", dot_spill, 0 },
4932 { "spillreg", dot_spillreg, 0 },
4933 { "spillsp", dot_spillmem, 0 },
4934 { "spillpsp", dot_spillmem, 1 },
4935 { "spillreg.p", dot_spillreg_p, 0 },
4936 { "spillsp.p", dot_spillmem_p, 0 },
4937 { "spillpsp.p", dot_spillmem_p, 1 },
4938 { "label_state", dot_label_state, 0 },
4939 { "copy_state", dot_copy_state, 0 },
4940 { "unwabi", dot_unwabi, 0 },
4941 { "personality", dot_personality, 0 },
4943 { "estate", dot_estate, 0 },
4945 { "mii", dot_template, 0x0 },
4946 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
4947 { "mlx", dot_template, 0x2 },
4948 { "mmi", dot_template, 0x4 },
4949 { "mfi", dot_template, 0x6 },
4950 { "mmf", dot_template, 0x7 },
4951 { "mib", dot_template, 0x8 },
4952 { "mbb", dot_template, 0x9 },
4953 { "bbb", dot_template, 0xb },
4954 { "mmb", dot_template, 0xc },
4955 { "mfb", dot_template, 0xe },
4957 { "lb", dot_scope, 0 },
4958 { "le", dot_scope, 1 },
4960 { "align", s_align_bytes, 0 },
4961 { "regstk", dot_regstk, 0 },
4962 { "rotr", dot_rot, DYNREG_GR },
4963 { "rotf", dot_rot, DYNREG_FR },
4964 { "rotp", dot_rot, DYNREG_PR },
4965 { "lsb", dot_byteorder, 0 },
4966 { "msb", dot_byteorder, 1 },
4967 { "psr", dot_psr, 0 },
4968 { "alias", dot_alias, 0 },
4969 { "secalias", dot_alias, 1 },
4970 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
4972 { "xdata1", dot_xdata, 1 },
4973 { "xdata2", dot_xdata, 2 },
4974 { "xdata4", dot_xdata, 4 },
4975 { "xdata8", dot_xdata, 8 },
4976 { "xreal4", dot_xfloat_cons, 'f' },
4977 { "xreal8", dot_xfloat_cons, 'd' },
4978 { "xreal10", dot_xfloat_cons, 'x' },
4979 { "xreal16", dot_xfloat_cons, 'X' },
4980 { "xstring", dot_xstringer, 0 },
4981 { "xstringz", dot_xstringer, 1 },
4983 /* unaligned versions: */
4984 { "xdata2.ua", dot_xdata_ua, 2 },
4985 { "xdata4.ua", dot_xdata_ua, 4 },
4986 { "xdata8.ua", dot_xdata_ua, 8 },
4987 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
4988 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
4989 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
4990 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
4992 /* annotations/DV checking support */
4993 { "entry", dot_entry, 0 },
4994 { "mem.offset", dot_mem_offset, 0 },
4995 { "pred.rel", dot_pred_rel, 0 },
4996 { "pred.rel.clear", dot_pred_rel, 'c' },
4997 { "pred.rel.imply", dot_pred_rel, 'i' },
4998 { "pred.rel.mutex", dot_pred_rel, 'm' },
4999 { "pred.safe_across_calls", dot_pred_rel, 's' },
5000 { "reg.val", dot_reg_val, 0 },
5001 { "auto", dot_dv_mode, 'a' },
5002 { "explicit", dot_dv_mode, 'e' },
5003 { "default", dot_dv_mode, 'd' },
5005 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5006 IA-64 aligns data allocation pseudo-ops by default, so we have to
5007 tell it that these ones are supposed to be unaligned. Long term,
5008 should rewrite so that only IA-64 specific data allocation pseudo-ops
5009 are aligned by default. */
5010 {"2byte", stmt_cons_ua, 2},
5011 {"4byte", stmt_cons_ua, 4},
5012 {"8byte", stmt_cons_ua, 8},
5017 static const struct pseudo_opcode
5020 void (*handler) (int);
5025 /* these are more like pseudo-ops, but don't start with a dot */
5026 { "data1", cons, 1 },
5027 { "data2", cons, 2 },
5028 { "data4", cons, 4 },
5029 { "data8", cons, 8 },
5030 { "data16", cons, 16 },
5031 { "real4", stmt_float_cons, 'f' },
5032 { "real8", stmt_float_cons, 'd' },
5033 { "real10", stmt_float_cons, 'x' },
5034 { "real16", stmt_float_cons, 'X' },
5035 { "string", stringer, 0 },
5036 { "stringz", stringer, 1 },
5038 /* unaligned versions: */
5039 { "data2.ua", stmt_cons_ua, 2 },
5040 { "data4.ua", stmt_cons_ua, 4 },
5041 { "data8.ua", stmt_cons_ua, 8 },
5042 { "data16.ua", stmt_cons_ua, 16 },
5043 { "real4.ua", float_cons, 'f' },
5044 { "real8.ua", float_cons, 'd' },
5045 { "real10.ua", float_cons, 'x' },
5046 { "real16.ua", float_cons, 'X' },
5049 /* Declare a register by creating a symbol for it and entering it in
5050 the symbol table. */
5053 declare_register (name, regnum)
5060 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5062 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5064 as_fatal ("Inserting \"%s\" into register table failed: %s",
5071 declare_register_set (prefix, num_regs, base_regnum)
5079 for (i = 0; i < num_regs; ++i)
5081 sprintf (name, "%s%u", prefix, i);
5082 declare_register (name, base_regnum + i);
5087 operand_width (opnd)
5088 enum ia64_opnd opnd;
5090 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5091 unsigned int bits = 0;
5095 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5096 bits += odesc->field[i].bits;
5101 static enum operand_match_result
5102 operand_match (idesc, index, e)
5103 const struct ia64_opcode *idesc;
5107 enum ia64_opnd opnd = idesc->operands[index];
5108 int bits, relocatable = 0;
5109 struct insn_fix *fix;
5116 case IA64_OPND_AR_CCV:
5117 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5118 return OPERAND_MATCH;
5121 case IA64_OPND_AR_CSD:
5122 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5123 return OPERAND_MATCH;
5126 case IA64_OPND_AR_PFS:
5127 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5128 return OPERAND_MATCH;
5132 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5133 return OPERAND_MATCH;
5137 if (e->X_op == O_register && e->X_add_number == REG_IP)
5138 return OPERAND_MATCH;
5142 if (e->X_op == O_register && e->X_add_number == REG_PR)
5143 return OPERAND_MATCH;
5146 case IA64_OPND_PR_ROT:
5147 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5148 return OPERAND_MATCH;
5152 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5153 return OPERAND_MATCH;
5156 case IA64_OPND_PSR_L:
5157 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5158 return OPERAND_MATCH;
5161 case IA64_OPND_PSR_UM:
5162 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5163 return OPERAND_MATCH;
5167 if (e->X_op == O_constant)
5169 if (e->X_add_number == 1)
5170 return OPERAND_MATCH;
5172 return OPERAND_OUT_OF_RANGE;
5177 if (e->X_op == O_constant)
5179 if (e->X_add_number == 8)
5180 return OPERAND_MATCH;
5182 return OPERAND_OUT_OF_RANGE;
5187 if (e->X_op == O_constant)
5189 if (e->X_add_number == 16)
5190 return OPERAND_MATCH;
5192 return OPERAND_OUT_OF_RANGE;
5196 /* register operands: */
5199 if (e->X_op == O_register && e->X_add_number >= REG_AR
5200 && e->X_add_number < REG_AR + 128)
5201 return OPERAND_MATCH;
5206 if (e->X_op == O_register && e->X_add_number >= REG_BR
5207 && e->X_add_number < REG_BR + 8)
5208 return OPERAND_MATCH;
5212 if (e->X_op == O_register && e->X_add_number >= REG_CR
5213 && e->X_add_number < REG_CR + 128)
5214 return OPERAND_MATCH;
5221 if (e->X_op == O_register && e->X_add_number >= REG_FR
5222 && e->X_add_number < REG_FR + 128)
5223 return OPERAND_MATCH;
5228 if (e->X_op == O_register && e->X_add_number >= REG_P
5229 && e->X_add_number < REG_P + 64)
5230 return OPERAND_MATCH;
5236 if (e->X_op == O_register && e->X_add_number >= REG_GR
5237 && e->X_add_number < REG_GR + 128)
5238 return OPERAND_MATCH;
5241 case IA64_OPND_R3_2:
5242 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5244 if (e->X_add_number < REG_GR + 4)
5245 return OPERAND_MATCH;
5246 else if (e->X_add_number < REG_GR + 128)
5247 return OPERAND_OUT_OF_RANGE;
5251 /* indirect operands: */
5252 case IA64_OPND_CPUID_R3:
5253 case IA64_OPND_DBR_R3:
5254 case IA64_OPND_DTR_R3:
5255 case IA64_OPND_ITR_R3:
5256 case IA64_OPND_IBR_R3:
5257 case IA64_OPND_MSR_R3:
5258 case IA64_OPND_PKR_R3:
5259 case IA64_OPND_PMC_R3:
5260 case IA64_OPND_PMD_R3:
5261 case IA64_OPND_RR_R3:
5262 if (e->X_op == O_index && e->X_op_symbol
5263 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5264 == opnd - IA64_OPND_CPUID_R3))
5265 return OPERAND_MATCH;
5269 if (e->X_op == O_index && !e->X_op_symbol)
5270 return OPERAND_MATCH;
5273 /* immediate operands: */
5274 case IA64_OPND_CNT2a:
5275 case IA64_OPND_LEN4:
5276 case IA64_OPND_LEN6:
5277 bits = operand_width (idesc->operands[index]);
5278 if (e->X_op == O_constant)
5280 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5281 return OPERAND_MATCH;
5283 return OPERAND_OUT_OF_RANGE;
5287 case IA64_OPND_CNT2b:
5288 if (e->X_op == O_constant)
5290 if ((bfd_vma) (e->X_add_number - 1) < 3)
5291 return OPERAND_MATCH;
5293 return OPERAND_OUT_OF_RANGE;
5297 case IA64_OPND_CNT2c:
5298 val = e->X_add_number;
5299 if (e->X_op == O_constant)
5301 if ((val == 0 || val == 7 || val == 15 || val == 16))
5302 return OPERAND_MATCH;
5304 return OPERAND_OUT_OF_RANGE;
5309 /* SOR must be an integer multiple of 8 */
5310 if (e->X_op == O_constant && e->X_add_number & 0x7)
5311 return OPERAND_OUT_OF_RANGE;
5314 if (e->X_op == O_constant)
5316 if ((bfd_vma) e->X_add_number <= 96)
5317 return OPERAND_MATCH;
5319 return OPERAND_OUT_OF_RANGE;
5323 case IA64_OPND_IMMU62:
5324 if (e->X_op == O_constant)
5326 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5327 return OPERAND_MATCH;
5329 return OPERAND_OUT_OF_RANGE;
5333 /* FIXME -- need 62-bit relocation type */
5334 as_bad (_("62-bit relocation not yet implemented"));
5338 case IA64_OPND_IMMU64:
5339 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5340 || e->X_op == O_subtract)
5342 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5343 fix->code = BFD_RELOC_IA64_IMM64;
5344 if (e->X_op != O_subtract)
5346 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5347 if (e->X_op == O_pseudo_fixup)
5351 fix->opnd = idesc->operands[index];
5354 ++CURR_SLOT.num_fixups;
5355 return OPERAND_MATCH;
5357 else if (e->X_op == O_constant)
5358 return OPERAND_MATCH;
5361 case IA64_OPND_CCNT5:
5362 case IA64_OPND_CNT5:
5363 case IA64_OPND_CNT6:
5364 case IA64_OPND_CPOS6a:
5365 case IA64_OPND_CPOS6b:
5366 case IA64_OPND_CPOS6c:
5367 case IA64_OPND_IMMU2:
5368 case IA64_OPND_IMMU7a:
5369 case IA64_OPND_IMMU7b:
5370 case IA64_OPND_IMMU21:
5371 case IA64_OPND_IMMU24:
5372 case IA64_OPND_MBTYPE4:
5373 case IA64_OPND_MHTYPE8:
5374 case IA64_OPND_POS6:
5375 bits = operand_width (idesc->operands[index]);
5376 if (e->X_op == O_constant)
5378 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5379 return OPERAND_MATCH;
5381 return OPERAND_OUT_OF_RANGE;
5385 case IA64_OPND_IMMU9:
5386 bits = operand_width (idesc->operands[index]);
5387 if (e->X_op == O_constant)
5389 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5391 int lobits = e->X_add_number & 0x3;
5392 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5393 e->X_add_number |= (bfd_vma) 0x3;
5394 return OPERAND_MATCH;
5397 return OPERAND_OUT_OF_RANGE;
5401 case IA64_OPND_IMM44:
5402 /* least 16 bits must be zero */
5403 if ((e->X_add_number & 0xffff) != 0)
5404 /* XXX technically, this is wrong: we should not be issuing warning
5405 messages until we're sure this instruction pattern is going to
5407 as_warn (_("lower 16 bits of mask ignored"));
5409 if (e->X_op == O_constant)
5411 if (((e->X_add_number >= 0
5412 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5413 || (e->X_add_number < 0
5414 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5417 if (e->X_add_number >= 0
5418 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5420 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5422 return OPERAND_MATCH;
5425 return OPERAND_OUT_OF_RANGE;
5429 case IA64_OPND_IMM17:
5430 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5431 if (e->X_op == O_constant)
5433 if (((e->X_add_number >= 0
5434 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5435 || (e->X_add_number < 0
5436 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5439 if (e->X_add_number >= 0
5440 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5442 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5444 return OPERAND_MATCH;
5447 return OPERAND_OUT_OF_RANGE;
5451 case IA64_OPND_IMM14:
5452 case IA64_OPND_IMM22:
5454 case IA64_OPND_IMM1:
5455 case IA64_OPND_IMM8:
5456 case IA64_OPND_IMM8U4:
5457 case IA64_OPND_IMM8M1:
5458 case IA64_OPND_IMM8M1U4:
5459 case IA64_OPND_IMM8M1U8:
5460 case IA64_OPND_IMM9a:
5461 case IA64_OPND_IMM9b:
5462 bits = operand_width (idesc->operands[index]);
5463 if (relocatable && (e->X_op == O_symbol
5464 || e->X_op == O_subtract
5465 || e->X_op == O_pseudo_fixup))
5467 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5469 if (idesc->operands[index] == IA64_OPND_IMM14)
5470 fix->code = BFD_RELOC_IA64_IMM14;
5472 fix->code = BFD_RELOC_IA64_IMM22;
5474 if (e->X_op != O_subtract)
5476 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5477 if (e->X_op == O_pseudo_fixup)
5481 fix->opnd = idesc->operands[index];
5484 ++CURR_SLOT.num_fixups;
5485 return OPERAND_MATCH;
5487 else if (e->X_op != O_constant
5488 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5489 return OPERAND_MISMATCH;
5491 if (opnd == IA64_OPND_IMM8M1U4)
5493 /* Zero is not valid for unsigned compares that take an adjusted
5494 constant immediate range. */
5495 if (e->X_add_number == 0)
5496 return OPERAND_OUT_OF_RANGE;
5498 /* Sign-extend 32-bit unsigned numbers, so that the following range
5499 checks will work. */
5500 val = e->X_add_number;
5501 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5502 && ((val & ((bfd_vma) 1 << 31)) != 0))
5503 val = ((val << 32) >> 32);
5505 /* Check for 0x100000000. This is valid because
5506 0x100000000-1 is the same as ((uint32_t) -1). */
5507 if (val == ((bfd_signed_vma) 1 << 32))
5508 return OPERAND_MATCH;
5512 else if (opnd == IA64_OPND_IMM8M1U8)
5514 /* Zero is not valid for unsigned compares that take an adjusted
5515 constant immediate range. */
5516 if (e->X_add_number == 0)
5517 return OPERAND_OUT_OF_RANGE;
5519 /* Check for 0x10000000000000000. */
5520 if (e->X_op == O_big)
5522 if (generic_bignum[0] == 0
5523 && generic_bignum[1] == 0
5524 && generic_bignum[2] == 0
5525 && generic_bignum[3] == 0
5526 && generic_bignum[4] == 1)
5527 return OPERAND_MATCH;
5529 return OPERAND_OUT_OF_RANGE;
5532 val = e->X_add_number - 1;
5534 else if (opnd == IA64_OPND_IMM8M1)
5535 val = e->X_add_number - 1;
5536 else if (opnd == IA64_OPND_IMM8U4)
5538 /* Sign-extend 32-bit unsigned numbers, so that the following range
5539 checks will work. */
5540 val = e->X_add_number;
5541 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5542 && ((val & ((bfd_vma) 1 << 31)) != 0))
5543 val = ((val << 32) >> 32);
5546 val = e->X_add_number;
5548 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5549 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5550 return OPERAND_MATCH;
5552 return OPERAND_OUT_OF_RANGE;
5554 case IA64_OPND_INC3:
5555 /* +/- 1, 4, 8, 16 */
5556 val = e->X_add_number;
5559 if (e->X_op == O_constant)
5561 if ((val == 1 || val == 4 || val == 8 || val == 16))
5562 return OPERAND_MATCH;
5564 return OPERAND_OUT_OF_RANGE;
5568 case IA64_OPND_TGT25:
5569 case IA64_OPND_TGT25b:
5570 case IA64_OPND_TGT25c:
5571 case IA64_OPND_TGT64:
5572 if (e->X_op == O_symbol)
5574 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5575 if (opnd == IA64_OPND_TGT25)
5576 fix->code = BFD_RELOC_IA64_PCREL21F;
5577 else if (opnd == IA64_OPND_TGT25b)
5578 fix->code = BFD_RELOC_IA64_PCREL21M;
5579 else if (opnd == IA64_OPND_TGT25c)
5580 fix->code = BFD_RELOC_IA64_PCREL21B;
5581 else if (opnd == IA64_OPND_TGT64)
5582 fix->code = BFD_RELOC_IA64_PCREL60B;
5586 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5587 fix->opnd = idesc->operands[index];
5590 ++CURR_SLOT.num_fixups;
5591 return OPERAND_MATCH;
5593 case IA64_OPND_TAG13:
5594 case IA64_OPND_TAG13b:
5598 return OPERAND_MATCH;
5601 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5602 /* There are no external relocs for TAG13/TAG13b fields, so we
5603 create a dummy reloc. This will not live past md_apply_fix3. */
5604 fix->code = BFD_RELOC_UNUSED;
5605 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5606 fix->opnd = idesc->operands[index];
5609 ++CURR_SLOT.num_fixups;
5610 return OPERAND_MATCH;
5617 case IA64_OPND_LDXMOV:
5618 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5619 fix->code = BFD_RELOC_IA64_LDXMOV;
5620 fix->opnd = idesc->operands[index];
5623 ++CURR_SLOT.num_fixups;
5624 return OPERAND_MATCH;
5629 return OPERAND_MISMATCH;
5638 memset (e, 0, sizeof (*e));
5641 if (*input_line_pointer != '}')
5643 sep = *input_line_pointer++;
5647 if (!md.manual_bundling)
5648 as_warn ("Found '}' when manual bundling is off");
5650 CURR_SLOT.manual_bundling_off = 1;
5651 md.manual_bundling = 0;
5657 /* Returns the next entry in the opcode table that matches the one in
5658 IDESC, and frees the entry in IDESC. If no matching entry is
5659 found, NULL is returned instead. */
5661 static struct ia64_opcode *
5662 get_next_opcode (struct ia64_opcode *idesc)
5664 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5665 ia64_free_opcode (idesc);
5669 /* Parse the operands for the opcode and find the opcode variant that
5670 matches the specified operands, or NULL if no match is possible. */
5672 static struct ia64_opcode *
5673 parse_operands (idesc)
5674 struct ia64_opcode *idesc;
5676 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5677 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5678 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5679 enum operand_match_result result;
5681 char *first_arg = 0, *end, *saved_input_pointer;
5684 assert (strlen (idesc->name) <= 128);
5686 strcpy (mnemonic, idesc->name);
5687 if (idesc->operands[2] == IA64_OPND_SOF)
5689 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5690 can't parse the first operand until we have parsed the
5691 remaining operands of the "alloc" instruction. */
5693 first_arg = input_line_pointer;
5694 end = strchr (input_line_pointer, '=');
5697 as_bad ("Expected separator `='");
5700 input_line_pointer = end + 1;
5705 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5707 sep = parse_operand (CURR_SLOT.opnd + i);
5708 if (CURR_SLOT.opnd[i].X_op == O_absent)
5713 if (sep != '=' && sep != ',')
5718 if (num_outputs > 0)
5719 as_bad ("Duplicate equal sign (=) in instruction");
5721 num_outputs = i + 1;
5726 as_bad ("Illegal operand separator `%c'", sep);
5730 if (idesc->operands[2] == IA64_OPND_SOF)
5732 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5733 know (strcmp (idesc->name, "alloc") == 0);
5734 if (num_operands == 5 /* first_arg not included in this count! */
5735 && CURR_SLOT.opnd[2].X_op == O_constant
5736 && CURR_SLOT.opnd[3].X_op == O_constant
5737 && CURR_SLOT.opnd[4].X_op == O_constant
5738 && CURR_SLOT.opnd[5].X_op == O_constant)
5740 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5741 CURR_SLOT.opnd[3].X_add_number,
5742 CURR_SLOT.opnd[4].X_add_number,
5743 CURR_SLOT.opnd[5].X_add_number);
5745 /* now we can parse the first arg: */
5746 saved_input_pointer = input_line_pointer;
5747 input_line_pointer = first_arg;
5748 sep = parse_operand (CURR_SLOT.opnd + 0);
5750 --num_outputs; /* force error */
5751 input_line_pointer = saved_input_pointer;
5753 CURR_SLOT.opnd[2].X_add_number = sof;
5754 CURR_SLOT.opnd[3].X_add_number
5755 = sof - CURR_SLOT.opnd[4].X_add_number;
5756 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5760 highest_unmatched_operand = 0;
5761 curr_out_of_range_pos = -1;
5763 expected_operand = idesc->operands[0];
5764 for (; idesc; idesc = get_next_opcode (idesc))
5766 if (num_outputs != idesc->num_outputs)
5767 continue; /* mismatch in # of outputs */
5769 CURR_SLOT.num_fixups = 0;
5771 /* Try to match all operands. If we see an out-of-range operand,
5772 then continue trying to match the rest of the operands, since if
5773 the rest match, then this idesc will give the best error message. */
5775 out_of_range_pos = -1;
5776 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5778 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5779 if (result != OPERAND_MATCH)
5781 if (result != OPERAND_OUT_OF_RANGE)
5783 if (out_of_range_pos < 0)
5784 /* remember position of the first out-of-range operand: */
5785 out_of_range_pos = i;
5789 /* If we did not match all operands, or if at least one operand was
5790 out-of-range, then this idesc does not match. Keep track of which
5791 idesc matched the most operands before failing. If we have two
5792 idescs that failed at the same position, and one had an out-of-range
5793 operand, then prefer the out-of-range operand. Thus if we have
5794 "add r0=0x1000000,r1" we get an error saying the constant is out
5795 of range instead of an error saying that the constant should have been
5798 if (i != num_operands || out_of_range_pos >= 0)
5800 if (i > highest_unmatched_operand
5801 || (i == highest_unmatched_operand
5802 && out_of_range_pos > curr_out_of_range_pos))
5804 highest_unmatched_operand = i;
5805 if (out_of_range_pos >= 0)
5807 expected_operand = idesc->operands[out_of_range_pos];
5808 error_pos = out_of_range_pos;
5812 expected_operand = idesc->operands[i];
5815 curr_out_of_range_pos = out_of_range_pos;
5820 if (num_operands < NELEMS (idesc->operands)
5821 && idesc->operands[num_operands])
5822 continue; /* mismatch in number of arguments */
5828 if (expected_operand)
5829 as_bad ("Operand %u of `%s' should be %s",
5830 error_pos + 1, mnemonic,
5831 elf64_ia64_operands[expected_operand].desc);
5833 as_bad ("Operand mismatch");
5839 /* Keep track of state necessary to determine whether a NOP is necessary
5840 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5841 detect a case where additional NOPs may be necessary. */
5843 errata_nop_necessary_p (slot, insn_unit)
5845 enum ia64_unit insn_unit;
5848 struct group *this_group = md.last_groups + md.group_idx;
5849 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5850 struct ia64_opcode *idesc = slot->idesc;
5852 /* Test whether this could be the first insn in a problematic sequence. */
5853 if (insn_unit == IA64_UNIT_F)
5855 for (i = 0; i < idesc->num_outputs; i++)
5856 if (idesc->operands[i] == IA64_OPND_P1
5857 || idesc->operands[i] == IA64_OPND_P2)
5859 int regno = slot->opnd[i].X_add_number - REG_P;
5860 /* Ignore invalid operands; they generate errors elsewhere. */
5863 this_group->p_reg_set[regno] = 1;
5867 /* Test whether this could be the second insn in a problematic sequence. */
5868 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5869 && prev_group->p_reg_set[slot->qp_regno])
5871 for (i = 0; i < idesc->num_outputs; i++)
5872 if (idesc->operands[i] == IA64_OPND_R1
5873 || idesc->operands[i] == IA64_OPND_R2
5874 || idesc->operands[i] == IA64_OPND_R3)
5876 int regno = slot->opnd[i].X_add_number - REG_GR;
5877 /* Ignore invalid operands; they generate errors elsewhere. */
5880 if (strncmp (idesc->name, "add", 3) != 0
5881 && strncmp (idesc->name, "sub", 3) != 0
5882 && strncmp (idesc->name, "shladd", 6) != 0
5883 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5884 this_group->g_reg_set_conditionally[regno] = 1;
5888 /* Test whether this could be the third insn in a problematic sequence. */
5889 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5891 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5892 idesc->operands[i] == IA64_OPND_R3
5893 /* For mov indirect. */
5894 || idesc->operands[i] == IA64_OPND_RR_R3
5895 || idesc->operands[i] == IA64_OPND_DBR_R3
5896 || idesc->operands[i] == IA64_OPND_IBR_R3
5897 || idesc->operands[i] == IA64_OPND_PKR_R3
5898 || idesc->operands[i] == IA64_OPND_PMC_R3
5899 || idesc->operands[i] == IA64_OPND_PMD_R3
5900 || idesc->operands[i] == IA64_OPND_MSR_R3
5901 || idesc->operands[i] == IA64_OPND_CPUID_R3
5903 || idesc->operands[i] == IA64_OPND_ITR_R3
5904 || idesc->operands[i] == IA64_OPND_DTR_R3
5905 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5906 || idesc->operands[i] == IA64_OPND_MR3)
5908 int regno = slot->opnd[i].X_add_number - REG_GR;
5909 /* Ignore invalid operands; they generate errors elsewhere. */
5912 if (idesc->operands[i] == IA64_OPND_R3)
5914 if (strcmp (idesc->name, "fc") != 0
5915 && strcmp (idesc->name, "tak") != 0
5916 && strcmp (idesc->name, "thash") != 0
5917 && strcmp (idesc->name, "tpa") != 0
5918 && strcmp (idesc->name, "ttag") != 0
5919 && strncmp (idesc->name, "ptr", 3) != 0
5920 && strncmp (idesc->name, "ptc", 3) != 0
5921 && strncmp (idesc->name, "probe", 5) != 0)
5924 if (prev_group->g_reg_set_conditionally[regno])
5932 build_insn (slot, insnp)
5936 const struct ia64_operand *odesc, *o2desc;
5937 struct ia64_opcode *idesc = slot->idesc;
5938 bfd_signed_vma insn, val;
5942 insn = idesc->opcode | slot->qp_regno;
5944 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
5946 if (slot->opnd[i].X_op == O_register
5947 || slot->opnd[i].X_op == O_constant
5948 || slot->opnd[i].X_op == O_index)
5949 val = slot->opnd[i].X_add_number;
5950 else if (slot->opnd[i].X_op == O_big)
5952 /* This must be the value 0x10000000000000000. */
5953 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
5959 switch (idesc->operands[i])
5961 case IA64_OPND_IMMU64:
5962 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
5963 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
5964 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
5965 | (((val >> 63) & 0x1) << 36));
5968 case IA64_OPND_IMMU62:
5969 val &= 0x3fffffffffffffffULL;
5970 if (val != slot->opnd[i].X_add_number)
5971 as_warn (_("Value truncated to 62 bits"));
5972 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
5973 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
5976 case IA64_OPND_TGT64:
5978 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
5979 insn |= ((((val >> 59) & 0x1) << 36)
5980 | (((val >> 0) & 0xfffff) << 13));
6011 case IA64_OPND_R3_2:
6012 case IA64_OPND_CPUID_R3:
6013 case IA64_OPND_DBR_R3:
6014 case IA64_OPND_DTR_R3:
6015 case IA64_OPND_ITR_R3:
6016 case IA64_OPND_IBR_R3:
6018 case IA64_OPND_MSR_R3:
6019 case IA64_OPND_PKR_R3:
6020 case IA64_OPND_PMC_R3:
6021 case IA64_OPND_PMD_R3:
6022 case IA64_OPND_RR_R3:
6030 odesc = elf64_ia64_operands + idesc->operands[i];
6031 err = (*odesc->insert) (odesc, val, &insn);
6033 as_bad_where (slot->src_file, slot->src_line,
6034 "Bad operand value: %s", err);
6035 if (idesc->flags & IA64_OPCODE_PSEUDO)
6037 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6038 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6040 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6041 (*o2desc->insert) (o2desc, val, &insn);
6043 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6044 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6045 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6047 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6048 (*o2desc->insert) (o2desc, 64 - val, &insn);
6058 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6059 unsigned int manual_bundling = 0;
6060 enum ia64_unit required_unit, insn_unit = 0;
6061 enum ia64_insn_type type[3], insn_type;
6062 unsigned int template, orig_template;
6063 bfd_vma insn[3] = { -1, -1, -1 };
6064 struct ia64_opcode *idesc;
6065 int end_of_insn_group = 0, user_template = -1;
6066 int n, i, j, first, curr;
6067 unw_rec_list *ptr, *last_ptr, *end_ptr;
6068 bfd_vma t0 = 0, t1 = 0;
6069 struct label_fix *lfix;
6070 struct insn_fix *ifix;
6075 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6076 know (first >= 0 & first < NUM_SLOTS);
6077 n = MIN (3, md.num_slots_in_use);
6079 /* Determine template: user user_template if specified, best match
6082 if (md.slot[first].user_template >= 0)
6083 user_template = template = md.slot[first].user_template;
6086 /* Auto select appropriate template. */
6087 memset (type, 0, sizeof (type));
6089 for (i = 0; i < n; ++i)
6091 if (md.slot[curr].label_fixups && i != 0)
6093 type[i] = md.slot[curr].idesc->type;
6094 curr = (curr + 1) % NUM_SLOTS;
6096 template = best_template[type[0]][type[1]][type[2]];
6099 /* initialize instructions with appropriate nops: */
6100 for (i = 0; i < 3; ++i)
6101 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6105 /* now fill in slots with as many insns as possible: */
6107 idesc = md.slot[curr].idesc;
6108 end_of_insn_group = 0;
6109 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6111 /* If we have unwind records, we may need to update some now. */
6112 ptr = md.slot[curr].unwind_record;
6115 /* Find the last prologue/body record in the list for the current
6116 insn, and set the slot number for all records up to that point.
6117 This needs to be done now, because prologue/body records refer to
6118 the current point, not the point after the instruction has been
6119 issued. This matters because there may have been nops emitted
6120 meanwhile. Any non-prologue non-body record followed by a
6121 prologue/body record must also refer to the current point. */
6123 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6124 for (; ptr != end_ptr; ptr = ptr->next)
6125 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6126 || ptr->r.type == body)
6130 /* Make last_ptr point one after the last prologue/body
6132 last_ptr = last_ptr->next;
6133 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6136 ptr->slot_number = (unsigned long) f + i;
6137 ptr->slot_frag = frag_now;
6139 /* Remove the initialized records, so that we won't accidentally
6140 update them again if we insert a nop and continue. */
6141 md.slot[curr].unwind_record = last_ptr;
6145 if (idesc->flags & IA64_OPCODE_SLOT2)
6147 if (manual_bundling && i != 2)
6148 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6149 "`%s' must be last in bundle", idesc->name);
6153 if (idesc->flags & IA64_OPCODE_LAST)
6156 unsigned int required_template;
6158 /* If we need a stop bit after an M slot, our only choice is
6159 template 5 (M;;MI). If we need a stop bit after a B
6160 slot, our only choice is to place it at the end of the
6161 bundle, because the only available templates are MIB,
6162 MBB, BBB, MMB, and MFB. We don't handle anything other
6163 than M and B slots because these are the only kind of
6164 instructions that can have the IA64_OPCODE_LAST bit set. */
6165 required_template = template;
6166 switch (idesc->type)
6170 required_template = 5;
6178 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6179 "Internal error: don't know how to force %s to end"
6180 "of instruction group", idesc->name);
6184 if (manual_bundling && i != required_slot)
6185 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6186 "`%s' must be last in instruction group",
6188 if (required_slot < i)
6189 /* Can't fit this instruction. */
6193 if (required_template != template)
6195 /* If we switch the template, we need to reset the NOPs
6196 after slot i. The slot-types of the instructions ahead
6197 of i never change, so we don't need to worry about
6198 changing NOPs in front of this slot. */
6199 for (j = i; j < 3; ++j)
6200 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6202 template = required_template;
6204 if (curr != first && md.slot[curr].label_fixups)
6206 if (manual_bundling_on)
6207 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6208 "Label must be first in a bundle");
6209 /* This insn must go into the first slot of a bundle. */
6213 manual_bundling_on = md.slot[curr].manual_bundling_on;
6214 manual_bundling_off = md.slot[curr].manual_bundling_off;
6216 if (manual_bundling_on)
6219 manual_bundling = 1;
6221 break; /* need to start a new bundle */
6224 if (end_of_insn_group && md.num_slots_in_use >= 1)
6226 /* We need an instruction group boundary in the middle of a
6227 bundle. See if we can switch to an other template with
6228 an appropriate boundary. */
6230 orig_template = template;
6231 if (i == 1 && (user_template == 4
6232 || (user_template < 0
6233 && (ia64_templ_desc[template].exec_unit[0]
6237 end_of_insn_group = 0;
6239 else if (i == 2 && (user_template == 0
6240 || (user_template < 0
6241 && (ia64_templ_desc[template].exec_unit[1]
6243 /* This test makes sure we don't switch the template if
6244 the next instruction is one that needs to be first in
6245 an instruction group. Since all those instructions are
6246 in the M group, there is no way such an instruction can
6247 fit in this bundle even if we switch the template. The
6248 reason we have to check for this is that otherwise we
6249 may end up generating "MI;;I M.." which has the deadly
6250 effect that the second M instruction is no longer the
6251 first in the bundle! --davidm 99/12/16 */
6252 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6255 end_of_insn_group = 0;
6257 else if (curr != first)
6258 /* can't fit this insn */
6261 if (template != orig_template)
6262 /* if we switch the template, we need to reset the NOPs
6263 after slot i. The slot-types of the instructions ahead
6264 of i never change, so we don't need to worry about
6265 changing NOPs in front of this slot. */
6266 for (j = i; j < 3; ++j)
6267 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6269 required_unit = ia64_templ_desc[template].exec_unit[i];
6271 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6272 if (idesc->type == IA64_TYPE_DYN)
6274 if ((strcmp (idesc->name, "nop") == 0)
6275 || (strcmp (idesc->name, "hint") == 0)
6276 || (strcmp (idesc->name, "break") == 0))
6277 insn_unit = required_unit;
6278 else if (strcmp (idesc->name, "chk.s") == 0)
6280 insn_unit = IA64_UNIT_M;
6281 if (required_unit == IA64_UNIT_I)
6282 insn_unit = IA64_UNIT_I;
6285 as_fatal ("emit_one_bundle: unexpected dynamic op");
6287 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6288 ia64_free_opcode (idesc);
6289 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6291 know (!idesc->next); /* no resolved dynamic ops have collisions */
6296 insn_type = idesc->type;
6297 insn_unit = IA64_UNIT_NIL;
6301 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6302 insn_unit = required_unit;
6304 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6305 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6306 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6307 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6308 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6313 if (insn_unit != required_unit)
6315 if (required_unit == IA64_UNIT_L
6316 && insn_unit == IA64_UNIT_I
6317 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6319 /* we got ourselves an MLX template but the current
6320 instruction isn't an X-unit, or an I-unit instruction
6321 that can go into the X slot of an MLX template. Duh. */
6322 if (md.num_slots_in_use >= NUM_SLOTS)
6324 as_bad_where (md.slot[curr].src_file,
6325 md.slot[curr].src_line,
6326 "`%s' can't go in X slot of "
6327 "MLX template", idesc->name);
6328 /* drop this insn so we don't livelock: */
6329 --md.num_slots_in_use;
6333 continue; /* try next slot */
6339 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6340 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6343 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6344 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6346 build_insn (md.slot + curr, insn + i);
6348 ptr = md.slot[curr].unwind_record;
6351 /* Set slot numbers for all remaining unwind records belonging to the
6352 current insn. There can not be any prologue/body unwind records
6354 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6355 for (; ptr != end_ptr; ptr = ptr->next)
6357 ptr->slot_number = (unsigned long) f + i;
6358 ptr->slot_frag = frag_now;
6360 md.slot[curr].unwind_record = NULL;
6363 if (required_unit == IA64_UNIT_L)
6366 /* skip one slot for long/X-unit instructions */
6369 --md.num_slots_in_use;
6371 /* now is a good time to fix up the labels for this insn: */
6372 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6374 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6375 symbol_set_frag (lfix->sym, frag_now);
6377 /* and fix up the tags also. */
6378 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6380 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6381 symbol_set_frag (lfix->sym, frag_now);
6384 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6386 ifix = md.slot[curr].fixup + j;
6387 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6388 &ifix->expr, ifix->is_pcrel, ifix->code);
6389 fix->tc_fix_data.opnd = ifix->opnd;
6390 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6391 fix->fx_file = md.slot[curr].src_file;
6392 fix->fx_line = md.slot[curr].src_line;
6395 end_of_insn_group = md.slot[curr].end_of_insn_group;
6397 if (end_of_insn_group)
6399 md.group_idx = (md.group_idx + 1) % 3;
6400 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6404 ia64_free_opcode (md.slot[curr].idesc);
6405 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6406 md.slot[curr].user_template = -1;
6408 if (manual_bundling_off)
6410 manual_bundling = 0;
6413 curr = (curr + 1) % NUM_SLOTS;
6414 idesc = md.slot[curr].idesc;
6416 if (manual_bundling)
6418 if (md.num_slots_in_use > 0)
6419 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6420 "`%s' does not fit into %s template",
6421 idesc->name, ia64_templ_desc[template].name);
6423 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6424 "Missing '}' at end of file");
6426 know (md.num_slots_in_use < NUM_SLOTS);
6428 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6429 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6431 number_to_chars_littleendian (f + 0, t0, 8);
6432 number_to_chars_littleendian (f + 8, t1, 8);
6436 unwind.list->next_slot_number = (unsigned long) f + 16;
6437 unwind.list->next_slot_frag = frag_now;
6442 md_parse_option (c, arg)
6449 /* Switches from the Intel assembler. */
6451 if (strcmp (arg, "ilp64") == 0
6452 || strcmp (arg, "lp64") == 0
6453 || strcmp (arg, "p64") == 0)
6455 md.flags |= EF_IA_64_ABI64;
6457 else if (strcmp (arg, "ilp32") == 0)
6459 md.flags &= ~EF_IA_64_ABI64;
6461 else if (strcmp (arg, "le") == 0)
6463 md.flags &= ~EF_IA_64_BE;
6465 else if (strcmp (arg, "be") == 0)
6467 md.flags |= EF_IA_64_BE;
6474 if (strcmp (arg, "so") == 0)
6476 /* Suppress signon message. */
6478 else if (strcmp (arg, "pi") == 0)
6480 /* Reject privileged instructions. FIXME */
6482 else if (strcmp (arg, "us") == 0)
6484 /* Allow union of signed and unsigned range. FIXME */
6486 else if (strcmp (arg, "close_fcalls") == 0)
6488 /* Do not resolve global function calls. */
6495 /* temp[="prefix"] Insert temporary labels into the object file
6496 symbol table prefixed by "prefix".
6497 Default prefix is ":temp:".
6502 /* indirect=<tgt> Assume unannotated indirect branches behavior
6503 according to <tgt> --
6504 exit: branch out from the current context (default)
6505 labels: all labels in context may be branch targets
6507 if (strncmp (arg, "indirect=", 9) != 0)
6512 /* -X conflicts with an ignored option, use -x instead */
6514 if (!arg || strcmp (arg, "explicit") == 0)
6516 /* set default mode to explicit */
6517 md.default_explicit_mode = 1;
6520 else if (strcmp (arg, "auto") == 0)
6522 md.default_explicit_mode = 0;
6524 else if (strcmp (arg, "debug") == 0)
6528 else if (strcmp (arg, "debugx") == 0)
6530 md.default_explicit_mode = 1;
6535 as_bad (_("Unrecognized option '-x%s'"), arg);
6540 /* nops Print nops statistics. */
6543 /* GNU specific switches for gcc. */
6544 case OPTION_MCONSTANT_GP:
6545 md.flags |= EF_IA_64_CONS_GP;
6548 case OPTION_MAUTO_PIC:
6549 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6560 md_show_usage (stream)
6565 --mconstant-gp mark output file as using the constant-GP model\n\
6566 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6567 --mauto-pic mark output file as using the constant-GP model\n\
6568 without function descriptors (sets ELF header flag\n\
6569 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6570 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6571 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6572 -x | -xexplicit turn on dependency violation checking (default)\n\
6573 -xauto automagically remove dependency violations\n\
6574 -xdebug debug dependency violation checker\n"),
6579 ia64_after_parse_args ()
6581 if (debug_type == DEBUG_STABS)
6582 as_fatal (_("--gstabs is not supported for ia64"));
6585 /* Return true if TYPE fits in TEMPL at SLOT. */
6588 match (int templ, int type, int slot)
6590 enum ia64_unit unit;
6593 unit = ia64_templ_desc[templ].exec_unit[slot];
6596 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6598 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6600 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6601 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6602 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6603 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6604 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6605 default: result = 0; break;
6610 /* Add a bit of extra goodness if a nop of type F or B would fit
6611 in TEMPL at SLOT. */
6614 extra_goodness (int templ, int slot)
6616 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6618 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6623 /* This function is called once, at assembler startup time. It sets
6624 up all the tables, etc. that the MD part of the assembler will need
6625 that can be determined before arguments are parsed. */
6629 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6634 md.explicit_mode = md.default_explicit_mode;
6636 bfd_set_section_alignment (stdoutput, text_section, 4);
6638 /* Make sure function pointers get initialized. */
6639 target_big_endian = -1;
6640 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6642 alias_hash = hash_new ();
6643 alias_name_hash = hash_new ();
6644 secalias_hash = hash_new ();
6645 secalias_name_hash = hash_new ();
6647 pseudo_func[FUNC_DTP_MODULE].u.sym =
6648 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6649 &zero_address_frag);
6651 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6652 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6653 &zero_address_frag);
6655 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6656 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6657 &zero_address_frag);
6659 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6660 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6661 &zero_address_frag);
6663 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6664 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6665 &zero_address_frag);
6667 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6668 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6669 &zero_address_frag);
6671 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6672 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6673 &zero_address_frag);
6675 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6676 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6677 &zero_address_frag);
6679 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6680 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6681 &zero_address_frag);
6683 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6684 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6685 &zero_address_frag);
6687 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6688 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6689 &zero_address_frag);
6691 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6692 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6693 &zero_address_frag);
6695 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6696 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6697 &zero_address_frag);
6699 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6700 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6701 &zero_address_frag);
6703 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6704 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6705 &zero_address_frag);
6707 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6708 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6709 &zero_address_frag);
6711 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6712 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6713 &zero_address_frag);
6715 /* Compute the table of best templates. We compute goodness as a
6716 base 4 value, in which each match counts for 3, each F counts
6717 for 2, each B counts for 1. This should maximize the number of
6718 F and B nops in the chosen bundles, which is good because these
6719 pipelines are least likely to be overcommitted. */
6720 for (i = 0; i < IA64_NUM_TYPES; ++i)
6721 for (j = 0; j < IA64_NUM_TYPES; ++j)
6722 for (k = 0; k < IA64_NUM_TYPES; ++k)
6725 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6728 if (match (t, i, 0))
6730 if (match (t, j, 1))
6732 if (match (t, k, 2))
6733 goodness = 3 + 3 + 3;
6735 goodness = 3 + 3 + extra_goodness (t, 2);
6737 else if (match (t, j, 2))
6738 goodness = 3 + 3 + extra_goodness (t, 1);
6742 goodness += extra_goodness (t, 1);
6743 goodness += extra_goodness (t, 2);
6746 else if (match (t, i, 1))
6748 if (match (t, j, 2))
6751 goodness = 3 + extra_goodness (t, 2);
6753 else if (match (t, i, 2))
6754 goodness = 3 + extra_goodness (t, 1);
6756 if (goodness > best)
6759 best_template[i][j][k] = t;
6764 for (i = 0; i < NUM_SLOTS; ++i)
6765 md.slot[i].user_template = -1;
6767 md.pseudo_hash = hash_new ();
6768 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6770 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6771 (void *) (pseudo_opcode + i));
6773 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6774 pseudo_opcode[i].name, err);
6777 md.reg_hash = hash_new ();
6778 md.dynreg_hash = hash_new ();
6779 md.const_hash = hash_new ();
6780 md.entry_hash = hash_new ();
6782 /* general registers: */
6785 for (i = 0; i < total; ++i)
6787 sprintf (name, "r%d", i - REG_GR);
6788 md.regsym[i] = declare_register (name, i);
6791 /* floating point registers: */
6793 for (; i < total; ++i)
6795 sprintf (name, "f%d", i - REG_FR);
6796 md.regsym[i] = declare_register (name, i);
6799 /* application registers: */
6802 for (; i < total; ++i)
6804 sprintf (name, "ar%d", i - REG_AR);
6805 md.regsym[i] = declare_register (name, i);
6808 /* control registers: */
6811 for (; i < total; ++i)
6813 sprintf (name, "cr%d", i - REG_CR);
6814 md.regsym[i] = declare_register (name, i);
6817 /* predicate registers: */
6819 for (; i < total; ++i)
6821 sprintf (name, "p%d", i - REG_P);
6822 md.regsym[i] = declare_register (name, i);
6825 /* branch registers: */
6827 for (; i < total; ++i)
6829 sprintf (name, "b%d", i - REG_BR);
6830 md.regsym[i] = declare_register (name, i);
6833 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6834 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6835 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6836 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6837 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6838 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6839 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6841 for (i = 0; i < NELEMS (indirect_reg); ++i)
6843 regnum = indirect_reg[i].regnum;
6844 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6847 /* define synonyms for application registers: */
6848 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6849 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6850 REG_AR + ar[i - REG_AR].regnum);
6852 /* define synonyms for control registers: */
6853 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6854 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6855 REG_CR + cr[i - REG_CR].regnum);
6857 declare_register ("gp", REG_GR + 1);
6858 declare_register ("sp", REG_GR + 12);
6859 declare_register ("rp", REG_BR + 0);
6861 /* pseudo-registers used to specify unwind info: */
6862 declare_register ("psp", REG_PSP);
6864 declare_register_set ("ret", 4, REG_GR + 8);
6865 declare_register_set ("farg", 8, REG_FR + 8);
6866 declare_register_set ("fret", 8, REG_FR + 8);
6868 for (i = 0; i < NELEMS (const_bits); ++i)
6870 err = hash_insert (md.const_hash, const_bits[i].name,
6871 (PTR) (const_bits + i));
6873 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6877 /* Set the architecture and machine depending on defaults and command line
6879 if (md.flags & EF_IA_64_ABI64)
6880 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6882 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6885 as_warn (_("Could not set architecture and machine"));
6887 /* Set the pointer size and pointer shift size depending on md.flags */
6889 if (md.flags & EF_IA_64_ABI64)
6891 md.pointer_size = 8; /* pointers are 8 bytes */
6892 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6896 md.pointer_size = 4; /* pointers are 4 bytes */
6897 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6900 md.mem_offset.hint = 0;
6903 md.entry_labels = NULL;
6906 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6907 because that is called after md_parse_option which is where we do the
6908 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6909 default endianness. */
6912 ia64_init (argc, argv)
6913 int argc ATTRIBUTE_UNUSED;
6914 char **argv ATTRIBUTE_UNUSED;
6916 md.flags = MD_FLAGS_DEFAULT;
6919 /* Return a string for the target object file format. */
6922 ia64_target_format ()
6924 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6926 if (md.flags & EF_IA_64_BE)
6928 if (md.flags & EF_IA_64_ABI64)
6929 #if defined(TE_AIX50)
6930 return "elf64-ia64-aix-big";
6931 #elif defined(TE_HPUX)
6932 return "elf64-ia64-hpux-big";
6934 return "elf64-ia64-big";
6937 #if defined(TE_AIX50)
6938 return "elf32-ia64-aix-big";
6939 #elif defined(TE_HPUX)
6940 return "elf32-ia64-hpux-big";
6942 return "elf32-ia64-big";
6947 if (md.flags & EF_IA_64_ABI64)
6949 return "elf64-ia64-aix-little";
6951 return "elf64-ia64-little";
6955 return "elf32-ia64-aix-little";
6957 return "elf32-ia64-little";
6962 return "unknown-format";
6966 ia64_end_of_source ()
6968 /* terminate insn group upon reaching end of file: */
6969 insn_group_break (1, 0, 0);
6971 /* emits slots we haven't written yet: */
6972 ia64_flush_insns ();
6974 bfd_set_private_flags (stdoutput, md.flags);
6976 md.mem_offset.hint = 0;
6982 if (md.qp.X_op == O_register)
6983 as_bad ("qualifying predicate not followed by instruction");
6984 md.qp.X_op = O_absent;
6986 if (ignore_input ())
6989 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
6991 if (md.detect_dv && !md.explicit_mode)
6992 as_warn (_("Explicit stops are ignored in auto mode"));
6994 insn_group_break (1, 0, 0);
6998 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7000 static int defining_tag = 0;
7003 ia64_unrecognized_line (ch)
7009 expression (&md.qp);
7010 if (*input_line_pointer++ != ')')
7012 as_bad ("Expected ')'");
7015 if (md.qp.X_op != O_register)
7017 as_bad ("Qualifying predicate expected");
7020 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7022 as_bad ("Predicate register expected");
7028 if (md.manual_bundling)
7029 as_warn ("Found '{' when manual bundling is already turned on");
7031 CURR_SLOT.manual_bundling_on = 1;
7032 md.manual_bundling = 1;
7034 /* Bundling is only acceptable in explicit mode
7035 or when in default automatic mode. */
7036 if (md.detect_dv && !md.explicit_mode)
7038 if (!md.mode_explicitly_set
7039 && !md.default_explicit_mode)
7042 as_warn (_("Found '{' after explicit switch to automatic mode"));
7047 if (!md.manual_bundling)
7048 as_warn ("Found '}' when manual bundling is off");
7050 PREV_SLOT.manual_bundling_off = 1;
7051 md.manual_bundling = 0;
7053 /* switch back to automatic mode, if applicable */
7056 && !md.mode_explicitly_set
7057 && !md.default_explicit_mode)
7060 /* Allow '{' to follow on the same line. We also allow ";;", but that
7061 happens automatically because ';' is an end of line marker. */
7063 if (input_line_pointer[0] == '{')
7065 input_line_pointer++;
7066 return ia64_unrecognized_line ('{');
7069 demand_empty_rest_of_line ();
7079 if (md.qp.X_op == O_register)
7081 as_bad ("Tag must come before qualifying predicate.");
7085 /* This implements just enough of read_a_source_file in read.c to
7086 recognize labels. */
7087 if (is_name_beginner (*input_line_pointer))
7089 s = input_line_pointer;
7090 c = get_symbol_end ();
7092 else if (LOCAL_LABELS_FB
7093 && ISDIGIT (*input_line_pointer))
7096 while (ISDIGIT (*input_line_pointer))
7097 temp = (temp * 10) + *input_line_pointer++ - '0';
7098 fb_label_instance_inc (temp);
7099 s = fb_label_name (temp, 0);
7100 c = *input_line_pointer;
7109 /* Put ':' back for error messages' sake. */
7110 *input_line_pointer++ = ':';
7111 as_bad ("Expected ':'");
7118 /* Put ':' back for error messages' sake. */
7119 *input_line_pointer++ = ':';
7120 if (*input_line_pointer++ != ']')
7122 as_bad ("Expected ']'");
7127 as_bad ("Tag name expected");
7137 /* Not a valid line. */
7142 ia64_frob_label (sym)
7145 struct label_fix *fix;
7147 /* Tags need special handling since they are not bundle breaks like
7151 fix = obstack_alloc (¬es, sizeof (*fix));
7153 fix->next = CURR_SLOT.tag_fixups;
7154 CURR_SLOT.tag_fixups = fix;
7159 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7161 md.last_text_seg = now_seg;
7162 fix = obstack_alloc (¬es, sizeof (*fix));
7164 fix->next = CURR_SLOT.label_fixups;
7165 CURR_SLOT.label_fixups = fix;
7167 /* Keep track of how many code entry points we've seen. */
7168 if (md.path == md.maxpaths)
7171 md.entry_labels = (const char **)
7172 xrealloc ((void *) md.entry_labels,
7173 md.maxpaths * sizeof (char *));
7175 md.entry_labels[md.path++] = S_GET_NAME (sym);
7180 /* The HP-UX linker will give unresolved symbol errors for symbols
7181 that are declared but unused. This routine removes declared,
7182 unused symbols from an object. */
7184 ia64_frob_symbol (sym)
7187 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7188 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7189 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7190 && ! S_IS_EXTERNAL (sym)))
7197 ia64_flush_pending_output ()
7199 if (!md.keep_pending_output
7200 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7202 /* ??? This causes many unnecessary stop bits to be emitted.
7203 Unfortunately, it isn't clear if it is safe to remove this. */
7204 insn_group_break (1, 0, 0);
7205 ia64_flush_insns ();
7209 /* Do ia64-specific expression optimization. All that's done here is
7210 to transform index expressions that are either due to the indexing
7211 of rotating registers or due to the indexing of indirect register
7214 ia64_optimize_expr (l, op, r)
7223 if (l->X_op == O_register && r->X_op == O_constant)
7225 num_regs = (l->X_add_number >> 16);
7226 if ((unsigned) r->X_add_number >= num_regs)
7229 as_bad ("No current frame");
7231 as_bad ("Index out of range 0..%u", num_regs - 1);
7232 r->X_add_number = 0;
7234 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7237 else if (l->X_op == O_register && r->X_op == O_register)
7239 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7240 || l->X_add_number == IND_MEM)
7242 as_bad ("Indirect register set name expected");
7243 l->X_add_number = IND_CPUID;
7246 l->X_op_symbol = md.regsym[l->X_add_number];
7247 l->X_add_number = r->X_add_number;
7255 ia64_parse_name (name, e)
7259 struct const_desc *cdesc;
7260 struct dynreg *dr = 0;
7261 unsigned int regnum;
7265 /* first see if NAME is a known register name: */
7266 sym = hash_find (md.reg_hash, name);
7269 e->X_op = O_register;
7270 e->X_add_number = S_GET_VALUE (sym);
7274 cdesc = hash_find (md.const_hash, name);
7277 e->X_op = O_constant;
7278 e->X_add_number = cdesc->value;
7282 /* check for inN, locN, or outN: */
7286 if (name[1] == 'n' && ISDIGIT (name[2]))
7294 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7302 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7315 /* The name is inN, locN, or outN; parse the register number. */
7316 regnum = strtoul (name, &end, 10);
7317 if (end > name && *end == '\0')
7319 if ((unsigned) regnum >= dr->num_regs)
7322 as_bad ("No current frame");
7324 as_bad ("Register number out of range 0..%u",
7328 e->X_op = O_register;
7329 e->X_add_number = dr->base + regnum;
7334 if ((dr = hash_find (md.dynreg_hash, name)))
7336 /* We've got ourselves the name of a rotating register set.
7337 Store the base register number in the low 16 bits of
7338 X_add_number and the size of the register set in the top 16
7340 e->X_op = O_register;
7341 e->X_add_number = dr->base | (dr->num_regs << 16);
7347 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7350 ia64_canonicalize_symbol_name (name)
7353 size_t len = strlen (name);
7354 if (len > 1 && name[len - 1] == '#')
7355 name[len - 1] = '\0';
7359 /* Return true if idesc is a conditional branch instruction. This excludes
7360 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7361 because they always read/write resources regardless of the value of the
7362 qualifying predicate. br.ia must always use p0, and hence is always
7363 taken. Thus this function returns true for branches which can fall
7364 through, and which use no resources if they do fall through. */
7367 is_conditional_branch (idesc)
7368 struct ia64_opcode *idesc;
7370 /* br is a conditional branch. Everything that starts with br. except
7371 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7372 Everything that starts with brl is a conditional branch. */
7373 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7374 && (idesc->name[2] == '\0'
7375 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7376 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7377 || idesc->name[2] == 'l'
7378 /* br.cond, br.call, br.clr */
7379 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7380 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7381 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7384 /* Return whether the given opcode is a taken branch. If there's any doubt,
7388 is_taken_branch (idesc)
7389 struct ia64_opcode *idesc;
7391 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7392 || strncmp (idesc->name, "br.ia", 5) == 0);
7395 /* Return whether the given opcode is an interruption or rfi. If there's any
7396 doubt, returns zero. */
7399 is_interruption_or_rfi (idesc)
7400 struct ia64_opcode *idesc;
7402 if (strcmp (idesc->name, "rfi") == 0)
7407 /* Returns the index of the given dependency in the opcode's list of chks, or
7408 -1 if there is no dependency. */
7411 depends_on (depind, idesc)
7413 struct ia64_opcode *idesc;
7416 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7417 for (i = 0; i < dep->nchks; i++)
7419 if (depind == DEP (dep->chks[i]))
7425 /* Determine a set of specific resources used for a particular resource
7426 class. Returns the number of specific resources identified For those
7427 cases which are not determinable statically, the resource returned is
7430 Meanings of value in 'NOTE':
7431 1) only read/write when the register number is explicitly encoded in the
7433 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7434 accesses CFM when qualifying predicate is in the rotating region.
7435 3) general register value is used to specify an indirect register; not
7436 determinable statically.
7437 4) only read the given resource when bits 7:0 of the indirect index
7438 register value does not match the register number of the resource; not
7439 determinable statically.
7440 5) all rules are implementation specific.
7441 6) only when both the index specified by the reader and the index specified
7442 by the writer have the same value in bits 63:61; not determinable
7444 7) only access the specified resource when the corresponding mask bit is
7446 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7447 only read when these insns reference FR2-31
7448 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7449 written when these insns write FR32-127
7450 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7452 11) The target predicates are written independently of PR[qp], but source
7453 registers are only read if PR[qp] is true. Since the state of PR[qp]
7454 cannot statically be determined, all source registers are marked used.
7455 12) This insn only reads the specified predicate register when that
7456 register is the PR[qp].
7457 13) This reference to ld-c only applies to teh GR whose value is loaded
7458 with data returned from memory, not the post-incremented address register.
7459 14) The RSE resource includes the implementation-specific RSE internal
7460 state resources. At least one (and possibly more) of these resources are
7461 read by each instruction listed in IC:rse-readers. At least one (and
7462 possibly more) of these resources are written by each insn listed in
7464 15+16) Represents reserved instructions, which the assembler does not
7467 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7468 this code; there are no dependency violations based on memory access.
7471 #define MAX_SPECS 256
7476 specify_resource (dep, idesc, type, specs, note, path)
7477 const struct ia64_dependency *dep;
7478 struct ia64_opcode *idesc;
7479 int type; /* is this a DV chk or a DV reg? */
7480 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7481 int note; /* resource note for this insn's usage */
7482 int path; /* which execution path to examine */
7489 if (dep->mode == IA64_DV_WAW
7490 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7491 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7494 /* template for any resources we identify */
7495 tmpl.dependency = dep;
7497 tmpl.insn_srlz = tmpl.data_srlz = 0;
7498 tmpl.qp_regno = CURR_SLOT.qp_regno;
7499 tmpl.link_to_qp_branch = 1;
7500 tmpl.mem_offset.hint = 0;
7503 tmpl.cmp_type = CMP_NONE;
7506 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7507 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7508 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7510 /* we don't need to track these */
7511 if (dep->semantics == IA64_DVS_NONE)
7514 switch (dep->specifier)
7519 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7521 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7522 if (regno >= 0 && regno <= 7)
7524 specs[count] = tmpl;
7525 specs[count++].index = regno;
7531 for (i = 0; i < 8; i++)
7533 specs[count] = tmpl;
7534 specs[count++].index = i;
7543 case IA64_RS_AR_UNAT:
7544 /* This is a mov =AR or mov AR= instruction. */
7545 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7547 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7548 if (regno == AR_UNAT)
7550 specs[count++] = tmpl;
7555 /* This is a spill/fill, or other instruction that modifies the
7558 /* Unless we can determine the specific bits used, mark the whole
7559 thing; bits 8:3 of the memory address indicate the bit used in
7560 UNAT. The .mem.offset hint may be used to eliminate a small
7561 subset of conflicts. */
7562 specs[count] = tmpl;
7563 if (md.mem_offset.hint)
7566 fprintf (stderr, " Using hint for spill/fill\n");
7567 /* The index isn't actually used, just set it to something
7568 approximating the bit index. */
7569 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7570 specs[count].mem_offset.hint = 1;
7571 specs[count].mem_offset.offset = md.mem_offset.offset;
7572 specs[count++].mem_offset.base = md.mem_offset.base;
7576 specs[count++].specific = 0;
7584 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7586 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7587 if ((regno >= 8 && regno <= 15)
7588 || (regno >= 20 && regno <= 23)
7589 || (regno >= 31 && regno <= 39)
7590 || (regno >= 41 && regno <= 47)
7591 || (regno >= 67 && regno <= 111))
7593 specs[count] = tmpl;
7594 specs[count++].index = regno;
7607 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7609 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7610 if ((regno >= 48 && regno <= 63)
7611 || (regno >= 112 && regno <= 127))
7613 specs[count] = tmpl;
7614 specs[count++].index = regno;
7620 for (i = 48; i < 64; i++)
7622 specs[count] = tmpl;
7623 specs[count++].index = i;
7625 for (i = 112; i < 128; i++)
7627 specs[count] = tmpl;
7628 specs[count++].index = i;
7646 for (i = 0; i < idesc->num_outputs; i++)
7647 if (idesc->operands[i] == IA64_OPND_B1
7648 || idesc->operands[i] == IA64_OPND_B2)
7650 specs[count] = tmpl;
7651 specs[count++].index =
7652 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7657 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7658 if (idesc->operands[i] == IA64_OPND_B1
7659 || idesc->operands[i] == IA64_OPND_B2)
7661 specs[count] = tmpl;
7662 specs[count++].index =
7663 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7669 case IA64_RS_CPUID: /* four or more registers */
7672 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7674 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7675 if (regno >= 0 && regno < NELEMS (gr_values)
7678 specs[count] = tmpl;
7679 specs[count++].index = gr_values[regno].value & 0xFF;
7683 specs[count] = tmpl;
7684 specs[count++].specific = 0;
7694 case IA64_RS_DBR: /* four or more registers */
7697 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7699 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7700 if (regno >= 0 && regno < NELEMS (gr_values)
7703 specs[count] = tmpl;
7704 specs[count++].index = gr_values[regno].value & 0xFF;
7708 specs[count] = tmpl;
7709 specs[count++].specific = 0;
7713 else if (note == 0 && !rsrc_write)
7715 specs[count] = tmpl;
7716 specs[count++].specific = 0;
7724 case IA64_RS_IBR: /* four or more registers */
7727 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7729 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7730 if (regno >= 0 && regno < NELEMS (gr_values)
7733 specs[count] = tmpl;
7734 specs[count++].index = gr_values[regno].value & 0xFF;
7738 specs[count] = tmpl;
7739 specs[count++].specific = 0;
7752 /* These are implementation specific. Force all references to
7753 conflict with all other references. */
7754 specs[count] = tmpl;
7755 specs[count++].specific = 0;
7763 case IA64_RS_PKR: /* 16 or more registers */
7764 if (note == 3 || note == 4)
7766 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7768 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7769 if (regno >= 0 && regno < NELEMS (gr_values)
7774 specs[count] = tmpl;
7775 specs[count++].index = gr_values[regno].value & 0xFF;
7778 for (i = 0; i < NELEMS (gr_values); i++)
7780 /* Uses all registers *except* the one in R3. */
7781 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7783 specs[count] = tmpl;
7784 specs[count++].index = i;
7790 specs[count] = tmpl;
7791 specs[count++].specific = 0;
7798 specs[count] = tmpl;
7799 specs[count++].specific = 0;
7803 case IA64_RS_PMC: /* four or more registers */
7806 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7807 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7810 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7812 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7813 if (regno >= 0 && regno < NELEMS (gr_values)
7816 specs[count] = tmpl;
7817 specs[count++].index = gr_values[regno].value & 0xFF;
7821 specs[count] = tmpl;
7822 specs[count++].specific = 0;
7832 case IA64_RS_PMD: /* four or more registers */
7835 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7837 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7838 if (regno >= 0 && regno < NELEMS (gr_values)
7841 specs[count] = tmpl;
7842 specs[count++].index = gr_values[regno].value & 0xFF;
7846 specs[count] = tmpl;
7847 specs[count++].specific = 0;
7857 case IA64_RS_RR: /* eight registers */
7860 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7862 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7863 if (regno >= 0 && regno < NELEMS (gr_values)
7866 specs[count] = tmpl;
7867 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7871 specs[count] = tmpl;
7872 specs[count++].specific = 0;
7876 else if (note == 0 && !rsrc_write)
7878 specs[count] = tmpl;
7879 specs[count++].specific = 0;
7887 case IA64_RS_CR_IRR:
7890 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7891 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7893 && idesc->operands[1] == IA64_OPND_CR3
7896 for (i = 0; i < 4; i++)
7898 specs[count] = tmpl;
7899 specs[count++].index = CR_IRR0 + i;
7905 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7906 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7908 && regno <= CR_IRR3)
7910 specs[count] = tmpl;
7911 specs[count++].index = regno;
7920 case IA64_RS_CR_LRR:
7927 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7928 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7929 && (regno == CR_LRR0 || regno == CR_LRR1))
7931 specs[count] = tmpl;
7932 specs[count++].index = regno;
7940 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
7942 specs[count] = tmpl;
7943 specs[count++].index =
7944 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7959 else if (rsrc_write)
7961 if (dep->specifier == IA64_RS_FRb
7962 && idesc->operands[0] == IA64_OPND_F1)
7964 specs[count] = tmpl;
7965 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
7970 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7972 if (idesc->operands[i] == IA64_OPND_F2
7973 || idesc->operands[i] == IA64_OPND_F3
7974 || idesc->operands[i] == IA64_OPND_F4)
7976 specs[count] = tmpl;
7977 specs[count++].index =
7978 CURR_SLOT.opnd[i].X_add_number - REG_FR;
7987 /* This reference applies only to the GR whose value is loaded with
7988 data returned from memory. */
7989 specs[count] = tmpl;
7990 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
7996 for (i = 0; i < idesc->num_outputs; i++)
7997 if (idesc->operands[i] == IA64_OPND_R1
7998 || idesc->operands[i] == IA64_OPND_R2
7999 || idesc->operands[i] == IA64_OPND_R3)
8001 specs[count] = tmpl;
8002 specs[count++].index =
8003 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8005 if (idesc->flags & IA64_OPCODE_POSTINC)
8006 for (i = 0; i < NELEMS (idesc->operands); i++)
8007 if (idesc->operands[i] == IA64_OPND_MR3)
8009 specs[count] = tmpl;
8010 specs[count++].index =
8011 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8016 /* Look for anything that reads a GR. */
8017 for (i = 0; i < NELEMS (idesc->operands); i++)
8019 if (idesc->operands[i] == IA64_OPND_MR3
8020 || idesc->operands[i] == IA64_OPND_CPUID_R3
8021 || idesc->operands[i] == IA64_OPND_DBR_R3
8022 || idesc->operands[i] == IA64_OPND_IBR_R3
8023 || idesc->operands[i] == IA64_OPND_MSR_R3
8024 || idesc->operands[i] == IA64_OPND_PKR_R3
8025 || idesc->operands[i] == IA64_OPND_PMC_R3
8026 || idesc->operands[i] == IA64_OPND_PMD_R3
8027 || idesc->operands[i] == IA64_OPND_RR_R3
8028 || ((i >= idesc->num_outputs)
8029 && (idesc->operands[i] == IA64_OPND_R1
8030 || idesc->operands[i] == IA64_OPND_R2
8031 || idesc->operands[i] == IA64_OPND_R3
8032 /* addl source register. */
8033 || idesc->operands[i] == IA64_OPND_R3_2)))
8035 specs[count] = tmpl;
8036 specs[count++].index =
8037 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8048 /* This is the same as IA64_RS_PRr, except that the register range is
8049 from 1 - 15, and there are no rotating register reads/writes here. */
8053 for (i = 1; i < 16; i++)
8055 specs[count] = tmpl;
8056 specs[count++].index = i;
8062 /* Mark only those registers indicated by the mask. */
8065 mask = CURR_SLOT.opnd[2].X_add_number;
8066 for (i = 1; i < 16; i++)
8067 if (mask & ((valueT) 1 << i))
8069 specs[count] = tmpl;
8070 specs[count++].index = i;
8078 else if (note == 11) /* note 11 implies note 1 as well */
8082 for (i = 0; i < idesc->num_outputs; i++)
8084 if (idesc->operands[i] == IA64_OPND_P1
8085 || idesc->operands[i] == IA64_OPND_P2)
8087 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8088 if (regno >= 1 && regno < 16)
8090 specs[count] = tmpl;
8091 specs[count++].index = regno;
8101 else if (note == 12)
8103 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8105 specs[count] = tmpl;
8106 specs[count++].index = CURR_SLOT.qp_regno;
8113 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8114 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8115 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8116 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8118 if ((idesc->operands[0] == IA64_OPND_P1
8119 || idesc->operands[0] == IA64_OPND_P2)
8120 && p1 >= 1 && p1 < 16)
8122 specs[count] = tmpl;
8123 specs[count].cmp_type =
8124 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8125 specs[count++].index = p1;
8127 if ((idesc->operands[1] == IA64_OPND_P1
8128 || idesc->operands[1] == IA64_OPND_P2)
8129 && p2 >= 1 && p2 < 16)
8131 specs[count] = tmpl;
8132 specs[count].cmp_type =
8133 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8134 specs[count++].index = p2;
8139 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8141 specs[count] = tmpl;
8142 specs[count++].index = CURR_SLOT.qp_regno;
8144 if (idesc->operands[1] == IA64_OPND_PR)
8146 for (i = 1; i < 16; i++)
8148 specs[count] = tmpl;
8149 specs[count++].index = i;
8160 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8161 simplified cases of this. */
8165 for (i = 16; i < 63; i++)
8167 specs[count] = tmpl;
8168 specs[count++].index = i;
8174 /* Mark only those registers indicated by the mask. */
8176 && idesc->operands[0] == IA64_OPND_PR)
8178 mask = CURR_SLOT.opnd[2].X_add_number;
8179 if (mask & ((valueT) 1 << 16))
8180 for (i = 16; i < 63; i++)
8182 specs[count] = tmpl;
8183 specs[count++].index = i;
8187 && idesc->operands[0] == IA64_OPND_PR_ROT)
8189 for (i = 16; i < 63; i++)
8191 specs[count] = tmpl;
8192 specs[count++].index = i;
8200 else if (note == 11) /* note 11 implies note 1 as well */
8204 for (i = 0; i < idesc->num_outputs; i++)
8206 if (idesc->operands[i] == IA64_OPND_P1
8207 || idesc->operands[i] == IA64_OPND_P2)
8209 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8210 if (regno >= 16 && regno < 63)
8212 specs[count] = tmpl;
8213 specs[count++].index = regno;
8223 else if (note == 12)
8225 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8227 specs[count] = tmpl;
8228 specs[count++].index = CURR_SLOT.qp_regno;
8235 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8236 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8237 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8238 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8240 if ((idesc->operands[0] == IA64_OPND_P1
8241 || idesc->operands[0] == IA64_OPND_P2)
8242 && p1 >= 16 && p1 < 63)
8244 specs[count] = tmpl;
8245 specs[count].cmp_type =
8246 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8247 specs[count++].index = p1;
8249 if ((idesc->operands[1] == IA64_OPND_P1
8250 || idesc->operands[1] == IA64_OPND_P2)
8251 && p2 >= 16 && p2 < 63)
8253 specs[count] = tmpl;
8254 specs[count].cmp_type =
8255 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8256 specs[count++].index = p2;
8261 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8263 specs[count] = tmpl;
8264 specs[count++].index = CURR_SLOT.qp_regno;
8266 if (idesc->operands[1] == IA64_OPND_PR)
8268 for (i = 16; i < 63; i++)
8270 specs[count] = tmpl;
8271 specs[count++].index = i;
8283 /* Verify that the instruction is using the PSR bit indicated in
8287 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8289 if (dep->regindex < 6)
8291 specs[count++] = tmpl;
8294 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8296 if (dep->regindex < 32
8297 || dep->regindex == 35
8298 || dep->regindex == 36
8299 || (!rsrc_write && dep->regindex == PSR_CPL))
8301 specs[count++] = tmpl;
8304 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8306 if (dep->regindex < 32
8307 || dep->regindex == 35
8308 || dep->regindex == 36
8309 || (rsrc_write && dep->regindex == PSR_CPL))
8311 specs[count++] = tmpl;
8316 /* Several PSR bits have very specific dependencies. */
8317 switch (dep->regindex)
8320 specs[count++] = tmpl;
8325 specs[count++] = tmpl;
8329 /* Only certain CR accesses use PSR.ic */
8330 if (idesc->operands[0] == IA64_OPND_CR3
8331 || idesc->operands[1] == IA64_OPND_CR3)
8334 ((idesc->operands[0] == IA64_OPND_CR3)
8337 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8352 specs[count++] = tmpl;
8361 specs[count++] = tmpl;
8365 /* Only some AR accesses use cpl */
8366 if (idesc->operands[0] == IA64_OPND_AR3
8367 || idesc->operands[1] == IA64_OPND_AR3)
8370 ((idesc->operands[0] == IA64_OPND_AR3)
8373 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8380 && regno <= AR_K7))))
8382 specs[count++] = tmpl;
8387 specs[count++] = tmpl;
8397 if (idesc->operands[0] == IA64_OPND_IMMU24)
8399 mask = CURR_SLOT.opnd[0].X_add_number;
8405 if (mask & ((valueT) 1 << dep->regindex))
8407 specs[count++] = tmpl;
8412 int min = dep->regindex == PSR_DFL ? 2 : 32;
8413 int max = dep->regindex == PSR_DFL ? 31 : 127;
8414 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8415 for (i = 0; i < NELEMS (idesc->operands); i++)
8417 if (idesc->operands[i] == IA64_OPND_F1
8418 || idesc->operands[i] == IA64_OPND_F2
8419 || idesc->operands[i] == IA64_OPND_F3
8420 || idesc->operands[i] == IA64_OPND_F4)
8422 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8423 if (reg >= min && reg <= max)
8425 specs[count++] = tmpl;
8432 int min = dep->regindex == PSR_MFL ? 2 : 32;
8433 int max = dep->regindex == PSR_MFL ? 31 : 127;
8434 /* mfh is read on writes to FR32-127; mfl is read on writes to
8436 for (i = 0; i < idesc->num_outputs; i++)
8438 if (idesc->operands[i] == IA64_OPND_F1)
8440 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8441 if (reg >= min && reg <= max)
8443 specs[count++] = tmpl;
8448 else if (note == 10)
8450 for (i = 0; i < NELEMS (idesc->operands); i++)
8452 if (idesc->operands[i] == IA64_OPND_R1
8453 || idesc->operands[i] == IA64_OPND_R2
8454 || idesc->operands[i] == IA64_OPND_R3)
8456 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8457 if (regno >= 16 && regno <= 31)
8459 specs[count++] = tmpl;
8470 case IA64_RS_AR_FPSR:
8471 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8473 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8474 if (regno == AR_FPSR)
8476 specs[count++] = tmpl;
8481 specs[count++] = tmpl;
8486 /* Handle all AR[REG] resources */
8487 if (note == 0 || note == 1)
8489 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8490 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8491 && regno == dep->regindex)
8493 specs[count++] = tmpl;
8495 /* other AR[REG] resources may be affected by AR accesses */
8496 else if (idesc->operands[0] == IA64_OPND_AR3)
8499 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8500 switch (dep->regindex)
8506 if (regno == AR_BSPSTORE)
8508 specs[count++] = tmpl;
8512 (regno == AR_BSPSTORE
8513 || regno == AR_RNAT))
8515 specs[count++] = tmpl;
8520 else if (idesc->operands[1] == IA64_OPND_AR3)
8523 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8524 switch (dep->regindex)
8529 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8531 specs[count++] = tmpl;
8538 specs[count++] = tmpl;
8548 /* Handle all CR[REG] resources */
8549 if (note == 0 || note == 1)
8551 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8553 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8554 if (regno == dep->regindex)
8556 specs[count++] = tmpl;
8558 else if (!rsrc_write)
8560 /* Reads from CR[IVR] affect other resources. */
8561 if (regno == CR_IVR)
8563 if ((dep->regindex >= CR_IRR0
8564 && dep->regindex <= CR_IRR3)
8565 || dep->regindex == CR_TPR)
8567 specs[count++] = tmpl;
8574 specs[count++] = tmpl;
8583 case IA64_RS_INSERVICE:
8584 /* look for write of EOI (67) or read of IVR (65) */
8585 if ((idesc->operands[0] == IA64_OPND_CR3
8586 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8587 || (idesc->operands[1] == IA64_OPND_CR3
8588 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8590 specs[count++] = tmpl;
8597 specs[count++] = tmpl;
8608 specs[count++] = tmpl;
8612 /* Check if any of the registers accessed are in the rotating region.
8613 mov to/from pr accesses CFM only when qp_regno is in the rotating
8615 for (i = 0; i < NELEMS (idesc->operands); i++)
8617 if (idesc->operands[i] == IA64_OPND_R1
8618 || idesc->operands[i] == IA64_OPND_R2
8619 || idesc->operands[i] == IA64_OPND_R3)
8621 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8622 /* Assumes that md.rot.num_regs is always valid */
8623 if (md.rot.num_regs > 0
8625 && num < 31 + md.rot.num_regs)
8627 specs[count] = tmpl;
8628 specs[count++].specific = 0;
8631 else if (idesc->operands[i] == IA64_OPND_F1
8632 || idesc->operands[i] == IA64_OPND_F2
8633 || idesc->operands[i] == IA64_OPND_F3
8634 || idesc->operands[i] == IA64_OPND_F4)
8636 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8639 specs[count] = tmpl;
8640 specs[count++].specific = 0;
8643 else if (idesc->operands[i] == IA64_OPND_P1
8644 || idesc->operands[i] == IA64_OPND_P2)
8646 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8649 specs[count] = tmpl;
8650 specs[count++].specific = 0;
8654 if (CURR_SLOT.qp_regno > 15)
8656 specs[count] = tmpl;
8657 specs[count++].specific = 0;
8662 /* This is the same as IA64_RS_PRr, except simplified to account for
8663 the fact that there is only one register. */
8667 specs[count++] = tmpl;
8672 if (idesc->operands[2] == IA64_OPND_IMM17)
8673 mask = CURR_SLOT.opnd[2].X_add_number;
8674 if (mask & ((valueT) 1 << 63))
8675 specs[count++] = tmpl;
8677 else if (note == 11)
8679 if ((idesc->operands[0] == IA64_OPND_P1
8680 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8681 || (idesc->operands[1] == IA64_OPND_P2
8682 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8684 specs[count++] = tmpl;
8687 else if (note == 12)
8689 if (CURR_SLOT.qp_regno == 63)
8691 specs[count++] = tmpl;
8698 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8699 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8700 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8701 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8704 && (idesc->operands[0] == IA64_OPND_P1
8705 || idesc->operands[0] == IA64_OPND_P2))
8707 specs[count] = tmpl;
8708 specs[count++].cmp_type =
8709 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8712 && (idesc->operands[1] == IA64_OPND_P1
8713 || idesc->operands[1] == IA64_OPND_P2))
8715 specs[count] = tmpl;
8716 specs[count++].cmp_type =
8717 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8722 if (CURR_SLOT.qp_regno == 63)
8724 specs[count++] = tmpl;
8735 /* FIXME we can identify some individual RSE written resources, but RSE
8736 read resources have not yet been completely identified, so for now
8737 treat RSE as a single resource */
8738 if (strncmp (idesc->name, "mov", 3) == 0)
8742 if (idesc->operands[0] == IA64_OPND_AR3
8743 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8745 specs[count] = tmpl;
8746 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8751 if (idesc->operands[0] == IA64_OPND_AR3)
8753 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8754 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8756 specs[count++] = tmpl;
8759 else if (idesc->operands[1] == IA64_OPND_AR3)
8761 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8762 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8763 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8765 specs[count++] = tmpl;
8772 specs[count++] = tmpl;
8777 /* FIXME -- do any of these need to be non-specific? */
8778 specs[count++] = tmpl;
8782 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8789 /* Clear branch flags on marked resources. This breaks the link between the
8790 QP of the marking instruction and a subsequent branch on the same QP. */
8793 clear_qp_branch_flag (mask)
8797 for (i = 0; i < regdepslen; i++)
8799 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8800 if ((bit & mask) != 0)
8802 regdeps[i].link_to_qp_branch = 0;
8807 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8808 any mutexes which contain one of the PRs and create new ones when
8812 update_qp_mutex (valueT mask)
8818 while (i < qp_mutexeslen)
8820 if ((qp_mutexes[i].prmask & mask) != 0)
8822 /* If it destroys and creates the same mutex, do nothing. */
8823 if (qp_mutexes[i].prmask == mask
8824 && qp_mutexes[i].path == md.path)
8835 fprintf (stderr, " Clearing mutex relation");
8836 print_prmask (qp_mutexes[i].prmask);
8837 fprintf (stderr, "\n");
8840 /* Deal with the old mutex with more than 3+ PRs only if
8841 the new mutex on the same execution path with it.
8843 FIXME: The 3+ mutex support is incomplete.
8844 dot_pred_rel () may be a better place to fix it. */
8845 if (qp_mutexes[i].path == md.path)
8847 /* If it is a proper subset of the mutex, create a
8850 && (qp_mutexes[i].prmask & mask) == mask)
8853 qp_mutexes[i].prmask &= ~mask;
8854 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8856 /* Modify the mutex if there are more than one
8864 /* Remove the mutex. */
8865 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8873 add_qp_mutex (mask);
8878 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8880 Any changes to a PR clears the mutex relations which include that PR. */
8883 clear_qp_mutex (mask)
8889 while (i < qp_mutexeslen)
8891 if ((qp_mutexes[i].prmask & mask) != 0)
8895 fprintf (stderr, " Clearing mutex relation");
8896 print_prmask (qp_mutexes[i].prmask);
8897 fprintf (stderr, "\n");
8899 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8906 /* Clear implies relations which contain PRs in the given masks.
8907 P1_MASK indicates the source of the implies relation, while P2_MASK
8908 indicates the implied PR. */
8911 clear_qp_implies (p1_mask, p2_mask)
8918 while (i < qp_implieslen)
8920 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8921 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8924 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8925 qp_implies[i].p1, qp_implies[i].p2);
8926 qp_implies[i] = qp_implies[--qp_implieslen];
8933 /* Add the PRs specified to the list of implied relations. */
8936 add_qp_imply (p1, p2)
8943 /* p0 is not meaningful here. */
8944 if (p1 == 0 || p2 == 0)
8950 /* If it exists already, ignore it. */
8951 for (i = 0; i < qp_implieslen; i++)
8953 if (qp_implies[i].p1 == p1
8954 && qp_implies[i].p2 == p2
8955 && qp_implies[i].path == md.path
8956 && !qp_implies[i].p2_branched)
8960 if (qp_implieslen == qp_impliestotlen)
8962 qp_impliestotlen += 20;
8963 qp_implies = (struct qp_imply *)
8964 xrealloc ((void *) qp_implies,
8965 qp_impliestotlen * sizeof (struct qp_imply));
8968 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
8969 qp_implies[qp_implieslen].p1 = p1;
8970 qp_implies[qp_implieslen].p2 = p2;
8971 qp_implies[qp_implieslen].path = md.path;
8972 qp_implies[qp_implieslen++].p2_branched = 0;
8974 /* Add in the implied transitive relations; for everything that p2 implies,
8975 make p1 imply that, too; for everything that implies p1, make it imply p2
8977 for (i = 0; i < qp_implieslen; i++)
8979 if (qp_implies[i].p1 == p2)
8980 add_qp_imply (p1, qp_implies[i].p2);
8981 if (qp_implies[i].p2 == p1)
8982 add_qp_imply (qp_implies[i].p1, p2);
8984 /* Add in mutex relations implied by this implies relation; for each mutex
8985 relation containing p2, duplicate it and replace p2 with p1. */
8986 bit = (valueT) 1 << p1;
8987 mask = (valueT) 1 << p2;
8988 for (i = 0; i < qp_mutexeslen; i++)
8990 if (qp_mutexes[i].prmask & mask)
8991 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
8995 /* Add the PRs specified in the mask to the mutex list; this means that only
8996 one of the PRs can be true at any time. PR0 should never be included in
9006 if (qp_mutexeslen == qp_mutexestotlen)
9008 qp_mutexestotlen += 20;
9009 qp_mutexes = (struct qpmutex *)
9010 xrealloc ((void *) qp_mutexes,
9011 qp_mutexestotlen * sizeof (struct qpmutex));
9015 fprintf (stderr, " Registering mutex on");
9016 print_prmask (mask);
9017 fprintf (stderr, "\n");
9019 qp_mutexes[qp_mutexeslen].path = md.path;
9020 qp_mutexes[qp_mutexeslen++].prmask = mask;
9024 has_suffix_p (name, suffix)
9028 size_t namelen = strlen (name);
9029 size_t sufflen = strlen (suffix);
9031 if (namelen <= sufflen)
9033 return strcmp (name + namelen - sufflen, suffix) == 0;
9037 clear_register_values ()
9041 fprintf (stderr, " Clearing register values\n");
9042 for (i = 1; i < NELEMS (gr_values); i++)
9043 gr_values[i].known = 0;
9046 /* Keep track of register values/changes which affect DV tracking.
9048 optimization note: should add a flag to classes of insns where otherwise we
9049 have to examine a group of strings to identify them. */
9052 note_register_values (idesc)
9053 struct ia64_opcode *idesc;
9055 valueT qp_changemask = 0;
9058 /* Invalidate values for registers being written to. */
9059 for (i = 0; i < idesc->num_outputs; i++)
9061 if (idesc->operands[i] == IA64_OPND_R1
9062 || idesc->operands[i] == IA64_OPND_R2
9063 || idesc->operands[i] == IA64_OPND_R3)
9065 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9066 if (regno > 0 && regno < NELEMS (gr_values))
9067 gr_values[regno].known = 0;
9069 else if (idesc->operands[i] == IA64_OPND_R3_2)
9071 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9072 if (regno > 0 && regno < 4)
9073 gr_values[regno].known = 0;
9075 else if (idesc->operands[i] == IA64_OPND_P1
9076 || idesc->operands[i] == IA64_OPND_P2)
9078 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9079 qp_changemask |= (valueT) 1 << regno;
9081 else if (idesc->operands[i] == IA64_OPND_PR)
9083 if (idesc->operands[2] & (valueT) 0x10000)
9084 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9086 qp_changemask = idesc->operands[2];
9089 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9091 if (idesc->operands[1] & ((valueT) 1 << 43))
9092 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9094 qp_changemask = idesc->operands[1];
9095 qp_changemask &= ~(valueT) 0xFFFF;
9100 /* Always clear qp branch flags on any PR change. */
9101 /* FIXME there may be exceptions for certain compares. */
9102 clear_qp_branch_flag (qp_changemask);
9104 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9105 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9107 qp_changemask |= ~(valueT) 0xFFFF;
9108 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9110 for (i = 32; i < 32 + md.rot.num_regs; i++)
9111 gr_values[i].known = 0;
9113 clear_qp_mutex (qp_changemask);
9114 clear_qp_implies (qp_changemask, qp_changemask);
9116 /* After a call, all register values are undefined, except those marked
9118 else if (strncmp (idesc->name, "br.call", 6) == 0
9119 || strncmp (idesc->name, "brl.call", 7) == 0)
9121 /* FIXME keep GR values which are marked as "safe_across_calls" */
9122 clear_register_values ();
9123 clear_qp_mutex (~qp_safe_across_calls);
9124 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9125 clear_qp_branch_flag (~qp_safe_across_calls);
9127 else if (is_interruption_or_rfi (idesc)
9128 || is_taken_branch (idesc))
9130 clear_register_values ();
9131 clear_qp_mutex (~(valueT) 0);
9132 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9134 /* Look for mutex and implies relations. */
9135 else if ((idesc->operands[0] == IA64_OPND_P1
9136 || idesc->operands[0] == IA64_OPND_P2)
9137 && (idesc->operands[1] == IA64_OPND_P1
9138 || idesc->operands[1] == IA64_OPND_P2))
9140 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9141 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9142 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9143 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9145 /* If both PRs are PR0, we can't really do anything. */
9146 if (p1 == 0 && p2 == 0)
9149 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9151 /* In general, clear mutexes and implies which include P1 or P2,
9152 with the following exceptions. */
9153 else if (has_suffix_p (idesc->name, ".or.andcm")
9154 || has_suffix_p (idesc->name, ".and.orcm"))
9156 clear_qp_implies (p2mask, p1mask);
9158 else if (has_suffix_p (idesc->name, ".andcm")
9159 || has_suffix_p (idesc->name, ".and"))
9161 clear_qp_implies (0, p1mask | p2mask);
9163 else if (has_suffix_p (idesc->name, ".orcm")
9164 || has_suffix_p (idesc->name, ".or"))
9166 clear_qp_mutex (p1mask | p2mask);
9167 clear_qp_implies (p1mask | p2mask, 0);
9173 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9175 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9176 if (p1 == 0 || p2 == 0)
9177 clear_qp_mutex (p1mask | p2mask);
9179 added = update_qp_mutex (p1mask | p2mask);
9181 if (CURR_SLOT.qp_regno == 0
9182 || has_suffix_p (idesc->name, ".unc"))
9184 if (added == 0 && p1 && p2)
9185 add_qp_mutex (p1mask | p2mask);
9186 if (CURR_SLOT.qp_regno != 0)
9189 add_qp_imply (p1, CURR_SLOT.qp_regno);
9191 add_qp_imply (p2, CURR_SLOT.qp_regno);
9196 /* Look for mov imm insns into GRs. */
9197 else if (idesc->operands[0] == IA64_OPND_R1
9198 && (idesc->operands[1] == IA64_OPND_IMM22
9199 || idesc->operands[1] == IA64_OPND_IMMU64)
9200 && (strcmp (idesc->name, "mov") == 0
9201 || strcmp (idesc->name, "movl") == 0))
9203 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9204 if (regno > 0 && regno < NELEMS (gr_values))
9206 gr_values[regno].known = 1;
9207 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9208 gr_values[regno].path = md.path;
9211 fprintf (stderr, " Know gr%d = ", regno);
9212 fprintf_vma (stderr, gr_values[regno].value);
9213 fputs ("\n", stderr);
9219 clear_qp_mutex (qp_changemask);
9220 clear_qp_implies (qp_changemask, qp_changemask);
9224 /* Return whether the given predicate registers are currently mutex. */
9227 qp_mutex (p1, p2, path)
9237 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9238 for (i = 0; i < qp_mutexeslen; i++)
9240 if (qp_mutexes[i].path >= path
9241 && (qp_mutexes[i].prmask & mask) == mask)
9248 /* Return whether the given resource is in the given insn's list of chks
9249 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9253 resources_match (rs, idesc, note, qp_regno, path)
9255 struct ia64_opcode *idesc;
9260 struct rsrc specs[MAX_SPECS];
9263 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9264 we don't need to check. One exception is note 11, which indicates that
9265 target predicates are written regardless of PR[qp]. */
9266 if (qp_mutex (rs->qp_regno, qp_regno, path)
9270 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9273 /* UNAT checking is a bit more specific than other resources */
9274 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9275 && specs[count].mem_offset.hint
9276 && rs->mem_offset.hint)
9278 if (rs->mem_offset.base == specs[count].mem_offset.base)
9280 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9281 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9288 /* Skip apparent PR write conflicts where both writes are an AND or both
9289 writes are an OR. */
9290 if (rs->dependency->specifier == IA64_RS_PR
9291 || rs->dependency->specifier == IA64_RS_PRr
9292 || rs->dependency->specifier == IA64_RS_PR63)
9294 if (specs[count].cmp_type != CMP_NONE
9295 && specs[count].cmp_type == rs->cmp_type)
9298 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9299 dv_mode[rs->dependency->mode],
9300 rs->dependency->specifier != IA64_RS_PR63 ?
9301 specs[count].index : 63);
9306 " %s on parallel compare conflict %s vs %s on PR%d\n",
9307 dv_mode[rs->dependency->mode],
9308 dv_cmp_type[rs->cmp_type],
9309 dv_cmp_type[specs[count].cmp_type],
9310 rs->dependency->specifier != IA64_RS_PR63 ?
9311 specs[count].index : 63);
9315 /* If either resource is not specific, conservatively assume a conflict
9317 if (!specs[count].specific || !rs->specific)
9319 else if (specs[count].index == rs->index)
9324 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9330 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9331 insert a stop to create the break. Update all resource dependencies
9332 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9333 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9334 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9338 insn_group_break (insert_stop, qp_regno, save_current)
9345 if (insert_stop && md.num_slots_in_use > 0)
9346 PREV_SLOT.end_of_insn_group = 1;
9350 fprintf (stderr, " Insn group break%s",
9351 (insert_stop ? " (w/stop)" : ""));
9353 fprintf (stderr, " effective for QP=%d", qp_regno);
9354 fprintf (stderr, "\n");
9358 while (i < regdepslen)
9360 const struct ia64_dependency *dep = regdeps[i].dependency;
9363 && regdeps[i].qp_regno != qp_regno)
9370 && CURR_SLOT.src_file == regdeps[i].file
9371 && CURR_SLOT.src_line == regdeps[i].line)
9377 /* clear dependencies which are automatically cleared by a stop, or
9378 those that have reached the appropriate state of insn serialization */
9379 if (dep->semantics == IA64_DVS_IMPLIED
9380 || dep->semantics == IA64_DVS_IMPLIEDF
9381 || regdeps[i].insn_srlz == STATE_SRLZ)
9383 print_dependency ("Removing", i);
9384 regdeps[i] = regdeps[--regdepslen];
9388 if (dep->semantics == IA64_DVS_DATA
9389 || dep->semantics == IA64_DVS_INSTR
9390 || dep->semantics == IA64_DVS_SPECIFIC)
9392 if (regdeps[i].insn_srlz == STATE_NONE)
9393 regdeps[i].insn_srlz = STATE_STOP;
9394 if (regdeps[i].data_srlz == STATE_NONE)
9395 regdeps[i].data_srlz = STATE_STOP;
9402 /* Add the given resource usage spec to the list of active dependencies. */
9405 mark_resource (idesc, dep, spec, depind, path)
9406 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9407 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9412 if (regdepslen == regdepstotlen)
9414 regdepstotlen += 20;
9415 regdeps = (struct rsrc *)
9416 xrealloc ((void *) regdeps,
9417 regdepstotlen * sizeof (struct rsrc));
9420 regdeps[regdepslen] = *spec;
9421 regdeps[regdepslen].depind = depind;
9422 regdeps[regdepslen].path = path;
9423 regdeps[regdepslen].file = CURR_SLOT.src_file;
9424 regdeps[regdepslen].line = CURR_SLOT.src_line;
9426 print_dependency ("Adding", regdepslen);
9432 print_dependency (action, depind)
9438 fprintf (stderr, " %s %s '%s'",
9439 action, dv_mode[(regdeps[depind].dependency)->mode],
9440 (regdeps[depind].dependency)->name);
9441 if (regdeps[depind].specific && regdeps[depind].index != 0)
9442 fprintf (stderr, " (%d)", regdeps[depind].index);
9443 if (regdeps[depind].mem_offset.hint)
9445 fputs (" ", stderr);
9446 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9447 fputs ("+", stderr);
9448 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9450 fprintf (stderr, "\n");
9455 instruction_serialization ()
9459 fprintf (stderr, " Instruction serialization\n");
9460 for (i = 0; i < regdepslen; i++)
9461 if (regdeps[i].insn_srlz == STATE_STOP)
9462 regdeps[i].insn_srlz = STATE_SRLZ;
9466 data_serialization ()
9470 fprintf (stderr, " Data serialization\n");
9471 while (i < regdepslen)
9473 if (regdeps[i].data_srlz == STATE_STOP
9474 /* Note: as of 991210, all "other" dependencies are cleared by a
9475 data serialization. This might change with new tables */
9476 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9478 print_dependency ("Removing", i);
9479 regdeps[i] = regdeps[--regdepslen];
9486 /* Insert stops and serializations as needed to avoid DVs. */
9489 remove_marked_resource (rs)
9492 switch (rs->dependency->semantics)
9494 case IA64_DVS_SPECIFIC:
9496 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9497 /* ...fall through... */
9498 case IA64_DVS_INSTR:
9500 fprintf (stderr, "Inserting instr serialization\n");
9501 if (rs->insn_srlz < STATE_STOP)
9502 insn_group_break (1, 0, 0);
9503 if (rs->insn_srlz < STATE_SRLZ)
9505 int oldqp = CURR_SLOT.qp_regno;
9506 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9507 /* Manually jam a srlz.i insn into the stream */
9508 CURR_SLOT.qp_regno = 0;
9509 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9510 instruction_serialization ();
9511 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9512 if (++md.num_slots_in_use >= NUM_SLOTS)
9514 CURR_SLOT.qp_regno = oldqp;
9515 CURR_SLOT.idesc = oldidesc;
9517 insn_group_break (1, 0, 0);
9519 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9520 "other" types of DV are eliminated
9521 by a data serialization */
9524 fprintf (stderr, "Inserting data serialization\n");
9525 if (rs->data_srlz < STATE_STOP)
9526 insn_group_break (1, 0, 0);
9528 int oldqp = CURR_SLOT.qp_regno;
9529 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9530 /* Manually jam a srlz.d insn into the stream */
9531 CURR_SLOT.qp_regno = 0;
9532 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9533 data_serialization ();
9534 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9535 if (++md.num_slots_in_use >= NUM_SLOTS)
9537 CURR_SLOT.qp_regno = oldqp;
9538 CURR_SLOT.idesc = oldidesc;
9541 case IA64_DVS_IMPLIED:
9542 case IA64_DVS_IMPLIEDF:
9544 fprintf (stderr, "Inserting stop\n");
9545 insn_group_break (1, 0, 0);
9552 /* Check the resources used by the given opcode against the current dependency
9555 The check is run once for each execution path encountered. In this case,
9556 a unique execution path is the sequence of instructions following a code
9557 entry point, e.g. the following has three execution paths, one starting
9558 at L0, one at L1, and one at L2.
9567 check_dependencies (idesc)
9568 struct ia64_opcode *idesc;
9570 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9574 /* Note that the number of marked resources may change within the
9575 loop if in auto mode. */
9577 while (i < regdepslen)
9579 struct rsrc *rs = ®deps[i];
9580 const struct ia64_dependency *dep = rs->dependency;
9585 if (dep->semantics == IA64_DVS_NONE
9586 || (chkind = depends_on (rs->depind, idesc)) == -1)
9592 note = NOTE (opdeps->chks[chkind]);
9594 /* Check this resource against each execution path seen thus far. */
9595 for (path = 0; path <= md.path; path++)
9599 /* If the dependency wasn't on the path being checked, ignore it. */
9600 if (rs->path < path)
9603 /* If the QP for this insn implies a QP which has branched, don't
9604 bother checking. Ed. NOTE: I don't think this check is terribly
9605 useful; what's the point of generating code which will only be
9606 reached if its QP is zero?
9607 This code was specifically inserted to handle the following code,
9608 based on notes from Intel's DV checking code, where p1 implies p2.
9614 if (CURR_SLOT.qp_regno != 0)
9618 for (implies = 0; implies < qp_implieslen; implies++)
9620 if (qp_implies[implies].path >= path
9621 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9622 && qp_implies[implies].p2_branched)
9632 if ((matchtype = resources_match (rs, idesc, note,
9633 CURR_SLOT.qp_regno, path)) != 0)
9636 char pathmsg[256] = "";
9637 char indexmsg[256] = "";
9638 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9641 sprintf (pathmsg, " when entry is at label '%s'",
9642 md.entry_labels[path - 1]);
9643 if (rs->specific && rs->index != 0)
9644 sprintf (indexmsg, ", specific resource number is %d",
9646 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9648 (certain ? "violates" : "may violate"),
9649 dv_mode[dep->mode], dep->name,
9650 dv_sem[dep->semantics],
9653 if (md.explicit_mode)
9655 as_warn ("%s", msg);
9657 as_warn (_("Only the first path encountering the conflict "
9659 as_warn_where (rs->file, rs->line,
9660 _("This is the location of the "
9661 "conflicting usage"));
9662 /* Don't bother checking other paths, to avoid duplicating
9669 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9671 remove_marked_resource (rs);
9673 /* since the set of dependencies has changed, start over */
9674 /* FIXME -- since we're removing dvs as we go, we
9675 probably don't really need to start over... */
9688 /* Register new dependencies based on the given opcode. */
9691 mark_resources (idesc)
9692 struct ia64_opcode *idesc;
9695 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9696 int add_only_qp_reads = 0;
9698 /* A conditional branch only uses its resources if it is taken; if it is
9699 taken, we stop following that path. The other branch types effectively
9700 *always* write their resources. If it's not taken, register only QP
9702 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9704 add_only_qp_reads = 1;
9708 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9710 for (i = 0; i < opdeps->nregs; i++)
9712 const struct ia64_dependency *dep;
9713 struct rsrc specs[MAX_SPECS];
9718 dep = ia64_find_dependency (opdeps->regs[i]);
9719 note = NOTE (opdeps->regs[i]);
9721 if (add_only_qp_reads
9722 && !(dep->mode == IA64_DV_WAR
9723 && (dep->specifier == IA64_RS_PR
9724 || dep->specifier == IA64_RS_PRr
9725 || dep->specifier == IA64_RS_PR63)))
9728 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9731 if (md.debug_dv && !count)
9732 fprintf (stderr, " No %s %s usage found (path %d)\n",
9733 dv_mode[dep->mode], dep->name, md.path);
9738 mark_resource (idesc, dep, &specs[count],
9739 DEP (opdeps->regs[i]), md.path);
9742 /* The execution path may affect register values, which may in turn
9743 affect which indirect-access resources are accessed. */
9744 switch (dep->specifier)
9756 for (path = 0; path < md.path; path++)
9758 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9760 mark_resource (idesc, dep, &specs[count],
9761 DEP (opdeps->regs[i]), path);
9768 /* Remove dependencies when they no longer apply. */
9771 update_dependencies (idesc)
9772 struct ia64_opcode *idesc;
9776 if (strcmp (idesc->name, "srlz.i") == 0)
9778 instruction_serialization ();
9780 else if (strcmp (idesc->name, "srlz.d") == 0)
9782 data_serialization ();
9784 else if (is_interruption_or_rfi (idesc)
9785 || is_taken_branch (idesc))
9787 /* Although technically the taken branch doesn't clear dependencies
9788 which require a srlz.[id], we don't follow the branch; the next
9789 instruction is assumed to start with a clean slate. */
9793 else if (is_conditional_branch (idesc)
9794 && CURR_SLOT.qp_regno != 0)
9796 int is_call = strstr (idesc->name, ".call") != NULL;
9798 for (i = 0; i < qp_implieslen; i++)
9800 /* If the conditional branch's predicate is implied by the predicate
9801 in an existing dependency, remove that dependency. */
9802 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9805 /* Note that this implied predicate takes a branch so that if
9806 a later insn generates a DV but its predicate implies this
9807 one, we can avoid the false DV warning. */
9808 qp_implies[i].p2_branched = 1;
9809 while (depind < regdepslen)
9811 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9813 print_dependency ("Removing", depind);
9814 regdeps[depind] = regdeps[--regdepslen];
9821 /* Any marked resources which have this same predicate should be
9822 cleared, provided that the QP hasn't been modified between the
9823 marking instruction and the branch. */
9826 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9831 while (i < regdepslen)
9833 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9834 && regdeps[i].link_to_qp_branch
9835 && (regdeps[i].file != CURR_SLOT.src_file
9836 || regdeps[i].line != CURR_SLOT.src_line))
9838 /* Treat like a taken branch */
9839 print_dependency ("Removing", i);
9840 regdeps[i] = regdeps[--regdepslen];
9849 /* Examine the current instruction for dependency violations. */
9853 struct ia64_opcode *idesc;
9857 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9858 idesc->name, CURR_SLOT.src_line,
9859 idesc->dependencies->nchks,
9860 idesc->dependencies->nregs);
9863 /* Look through the list of currently marked resources; if the current
9864 instruction has the dependency in its chks list which uses that resource,
9865 check against the specific resources used. */
9866 check_dependencies (idesc);
9868 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9869 then add them to the list of marked resources. */
9870 mark_resources (idesc);
9872 /* There are several types of dependency semantics, and each has its own
9873 requirements for being cleared
9875 Instruction serialization (insns separated by interruption, rfi, or
9876 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9878 Data serialization (instruction serialization, or writer + srlz.d +
9879 reader, where writer and srlz.d are in separate groups) clears
9880 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9881 always be the case).
9883 Instruction group break (groups separated by stop, taken branch,
9884 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9886 update_dependencies (idesc);
9888 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9889 warning. Keep track of as many as possible that are useful. */
9890 note_register_values (idesc);
9892 /* We don't need or want this anymore. */
9893 md.mem_offset.hint = 0;
9898 /* Translate one line of assembly. Pseudo ops and labels do not show
9904 char *saved_input_line_pointer, *mnemonic;
9905 const struct pseudo_opcode *pdesc;
9906 struct ia64_opcode *idesc;
9907 unsigned char qp_regno;
9911 saved_input_line_pointer = input_line_pointer;
9912 input_line_pointer = str;
9914 /* extract the opcode (mnemonic): */
9916 mnemonic = input_line_pointer;
9917 ch = get_symbol_end ();
9918 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9921 *input_line_pointer = ch;
9922 (*pdesc->handler) (pdesc->arg);
9926 /* Find the instruction descriptor matching the arguments. */
9928 idesc = ia64_find_opcode (mnemonic);
9929 *input_line_pointer = ch;
9932 as_bad ("Unknown opcode `%s'", mnemonic);
9936 idesc = parse_operands (idesc);
9940 /* Handle the dynamic ops we can handle now: */
9941 if (idesc->type == IA64_TYPE_DYN)
9943 if (strcmp (idesc->name, "add") == 0)
9945 if (CURR_SLOT.opnd[2].X_op == O_register
9946 && CURR_SLOT.opnd[2].X_add_number < 4)
9950 ia64_free_opcode (idesc);
9951 idesc = ia64_find_opcode (mnemonic);
9953 know (!idesc->next);
9956 else if (strcmp (idesc->name, "mov") == 0)
9958 enum ia64_opnd opnd1, opnd2;
9961 opnd1 = idesc->operands[0];
9962 opnd2 = idesc->operands[1];
9963 if (opnd1 == IA64_OPND_AR3)
9965 else if (opnd2 == IA64_OPND_AR3)
9969 if (CURR_SLOT.opnd[rop].X_op == O_register
9970 && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
9974 ia64_free_opcode (idesc);
9975 idesc = ia64_find_opcode (mnemonic);
9976 while (idesc != NULL
9977 && (idesc->operands[0] != opnd1
9978 || idesc->operands[1] != opnd2))
9979 idesc = get_next_opcode (idesc);
9984 if (md.qp.X_op == O_register)
9986 qp_regno = md.qp.X_add_number - REG_P;
9987 md.qp.X_op = O_absent;
9990 flags = idesc->flags;
9992 if ((flags & IA64_OPCODE_FIRST) != 0)
9993 insn_group_break (1, 0, 0);
9995 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
9997 as_bad ("`%s' cannot be predicated", idesc->name);
10001 /* Build the instruction. */
10002 CURR_SLOT.qp_regno = qp_regno;
10003 CURR_SLOT.idesc = idesc;
10004 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10005 dwarf2_where (&CURR_SLOT.debug_line);
10007 /* Add unwind entry, if there is one. */
10008 if (unwind.current_entry)
10010 CURR_SLOT.unwind_record = unwind.current_entry;
10011 unwind.current_entry = NULL;
10014 /* Check for dependency violations. */
10018 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10019 if (++md.num_slots_in_use >= NUM_SLOTS)
10020 emit_one_bundle ();
10022 if ((flags & IA64_OPCODE_LAST) != 0)
10023 insn_group_break (1, 0, 0);
10025 md.last_text_seg = now_seg;
10028 input_line_pointer = saved_input_line_pointer;
10031 /* Called when symbol NAME cannot be found in the symbol table.
10032 Should be used for dynamic valued symbols only. */
10035 md_undefined_symbol (name)
10036 char *name ATTRIBUTE_UNUSED;
10041 /* Called for any expression that can not be recognized. When the
10042 function is called, `input_line_pointer' will point to the start of
10049 enum pseudo_type pseudo_type;
10054 switch (*input_line_pointer)
10057 /* Find what relocation pseudo-function we're dealing with. */
10059 ch = *++input_line_pointer;
10060 for (i = 0; i < NELEMS (pseudo_func); ++i)
10061 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10063 len = strlen (pseudo_func[i].name);
10064 if (strncmp (pseudo_func[i].name + 1,
10065 input_line_pointer + 1, len - 1) == 0
10066 && !is_part_of_name (input_line_pointer[len]))
10068 input_line_pointer += len;
10069 pseudo_type = pseudo_func[i].type;
10073 switch (pseudo_type)
10075 case PSEUDO_FUNC_RELOC:
10076 SKIP_WHITESPACE ();
10077 if (*input_line_pointer != '(')
10079 as_bad ("Expected '('");
10083 ++input_line_pointer;
10085 if (*input_line_pointer++ != ')')
10087 as_bad ("Missing ')'");
10090 if (e->X_op != O_symbol)
10092 if (e->X_op != O_pseudo_fixup)
10094 as_bad ("Not a symbolic expression");
10097 if (i != FUNC_LT_RELATIVE)
10099 as_bad ("Illegal combination of relocation functions");
10102 switch (S_GET_VALUE (e->X_op_symbol))
10104 case FUNC_FPTR_RELATIVE:
10105 i = FUNC_LT_FPTR_RELATIVE; break;
10106 case FUNC_DTP_MODULE:
10107 i = FUNC_LT_DTP_MODULE; break;
10108 case FUNC_DTP_RELATIVE:
10109 i = FUNC_LT_DTP_RELATIVE; break;
10110 case FUNC_TP_RELATIVE:
10111 i = FUNC_LT_TP_RELATIVE; break;
10113 as_bad ("Illegal combination of relocation functions");
10117 /* Make sure gas doesn't get rid of local symbols that are used
10119 e->X_op = O_pseudo_fixup;
10120 e->X_op_symbol = pseudo_func[i].u.sym;
10123 case PSEUDO_FUNC_CONST:
10124 e->X_op = O_constant;
10125 e->X_add_number = pseudo_func[i].u.ival;
10128 case PSEUDO_FUNC_REG:
10129 e->X_op = O_register;
10130 e->X_add_number = pseudo_func[i].u.ival;
10134 name = input_line_pointer - 1;
10136 as_bad ("Unknown pseudo function `%s'", name);
10142 ++input_line_pointer;
10144 if (*input_line_pointer != ']')
10146 as_bad ("Closing bracket misssing");
10151 if (e->X_op != O_register)
10152 as_bad ("Register expected as index");
10154 ++input_line_pointer;
10165 ignore_rest_of_line ();
10168 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10169 a section symbol plus some offset. For relocs involving @fptr(),
10170 directives we don't want such adjustments since we need to have the
10171 original symbol's name in the reloc. */
10173 ia64_fix_adjustable (fix)
10176 /* Prevent all adjustments to global symbols */
10177 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10180 switch (fix->fx_r_type)
10182 case BFD_RELOC_IA64_FPTR64I:
10183 case BFD_RELOC_IA64_FPTR32MSB:
10184 case BFD_RELOC_IA64_FPTR32LSB:
10185 case BFD_RELOC_IA64_FPTR64MSB:
10186 case BFD_RELOC_IA64_FPTR64LSB:
10187 case BFD_RELOC_IA64_LTOFF_FPTR22:
10188 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10198 ia64_force_relocation (fix)
10201 switch (fix->fx_r_type)
10203 case BFD_RELOC_IA64_FPTR64I:
10204 case BFD_RELOC_IA64_FPTR32MSB:
10205 case BFD_RELOC_IA64_FPTR32LSB:
10206 case BFD_RELOC_IA64_FPTR64MSB:
10207 case BFD_RELOC_IA64_FPTR64LSB:
10209 case BFD_RELOC_IA64_LTOFF22:
10210 case BFD_RELOC_IA64_LTOFF64I:
10211 case BFD_RELOC_IA64_LTOFF_FPTR22:
10212 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10213 case BFD_RELOC_IA64_PLTOFF22:
10214 case BFD_RELOC_IA64_PLTOFF64I:
10215 case BFD_RELOC_IA64_PLTOFF64MSB:
10216 case BFD_RELOC_IA64_PLTOFF64LSB:
10218 case BFD_RELOC_IA64_LTOFF22X:
10219 case BFD_RELOC_IA64_LDXMOV:
10226 return generic_force_reloc (fix);
10229 /* Decide from what point a pc-relative relocation is relative to,
10230 relative to the pc-relative fixup. Er, relatively speaking. */
10232 ia64_pcrel_from_section (fix, sec)
10236 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10238 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10245 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10247 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10251 expr.X_op = O_pseudo_fixup;
10252 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10253 expr.X_add_number = 0;
10254 expr.X_add_symbol = symbol;
10255 emit_expr (&expr, size);
10258 /* This is called whenever some data item (not an instruction) needs a
10259 fixup. We pick the right reloc code depending on the byteorder
10260 currently in effect. */
10262 ia64_cons_fix_new (f, where, nbytes, exp)
10268 bfd_reloc_code_real_type code;
10273 /* There are no reloc for 8 and 16 bit quantities, but we allow
10274 them here since they will work fine as long as the expression
10275 is fully defined at the end of the pass over the source file. */
10276 case 1: code = BFD_RELOC_8; break;
10277 case 2: code = BFD_RELOC_16; break;
10279 if (target_big_endian)
10280 code = BFD_RELOC_IA64_DIR32MSB;
10282 code = BFD_RELOC_IA64_DIR32LSB;
10286 /* In 32-bit mode, data8 could mean function descriptors too. */
10287 if (exp->X_op == O_pseudo_fixup
10288 && exp->X_op_symbol
10289 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10290 && !(md.flags & EF_IA_64_ABI64))
10292 if (target_big_endian)
10293 code = BFD_RELOC_IA64_IPLTMSB;
10295 code = BFD_RELOC_IA64_IPLTLSB;
10296 exp->X_op = O_symbol;
10301 if (target_big_endian)
10302 code = BFD_RELOC_IA64_DIR64MSB;
10304 code = BFD_RELOC_IA64_DIR64LSB;
10309 if (exp->X_op == O_pseudo_fixup
10310 && exp->X_op_symbol
10311 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10313 if (target_big_endian)
10314 code = BFD_RELOC_IA64_IPLTMSB;
10316 code = BFD_RELOC_IA64_IPLTLSB;
10317 exp->X_op = O_symbol;
10323 as_bad ("Unsupported fixup size %d", nbytes);
10324 ignore_rest_of_line ();
10328 if (exp->X_op == O_pseudo_fixup)
10330 exp->X_op = O_symbol;
10331 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10332 /* ??? If code unchanged, unsupported. */
10335 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10336 /* We need to store the byte order in effect in case we're going
10337 to fix an 8 or 16 bit relocation (for which there no real
10338 relocs available). See md_apply_fix3(). */
10339 fix->tc_fix_data.bigendian = target_big_endian;
10342 /* Return the actual relocation we wish to associate with the pseudo
10343 reloc described by SYM and R_TYPE. SYM should be one of the
10344 symbols in the pseudo_func array, or NULL. */
10346 static bfd_reloc_code_real_type
10347 ia64_gen_real_reloc_type (sym, r_type)
10348 struct symbol *sym;
10349 bfd_reloc_code_real_type r_type;
10351 bfd_reloc_code_real_type new = 0;
10358 switch (S_GET_VALUE (sym))
10360 case FUNC_FPTR_RELATIVE:
10363 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10364 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10365 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10366 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10367 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10372 case FUNC_GP_RELATIVE:
10375 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10376 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10377 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10378 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10379 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10380 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10385 case FUNC_LT_RELATIVE:
10388 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10389 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10394 case FUNC_LT_RELATIVE_X:
10397 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10402 case FUNC_PC_RELATIVE:
10405 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10406 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10407 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10408 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10409 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10410 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10415 case FUNC_PLT_RELATIVE:
10418 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10419 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10420 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10421 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10426 case FUNC_SEC_RELATIVE:
10429 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10430 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10431 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10432 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10437 case FUNC_SEG_RELATIVE:
10440 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10441 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10442 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10443 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10448 case FUNC_LTV_RELATIVE:
10451 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10452 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10453 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10454 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10459 case FUNC_LT_FPTR_RELATIVE:
10462 case BFD_RELOC_IA64_IMM22:
10463 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10464 case BFD_RELOC_IA64_IMM64:
10465 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10471 case FUNC_TP_RELATIVE:
10474 case BFD_RELOC_IA64_IMM14:
10475 new = BFD_RELOC_IA64_TPREL14; break;
10476 case BFD_RELOC_IA64_IMM22:
10477 new = BFD_RELOC_IA64_TPREL22; break;
10478 case BFD_RELOC_IA64_IMM64:
10479 new = BFD_RELOC_IA64_TPREL64I; break;
10485 case FUNC_LT_TP_RELATIVE:
10488 case BFD_RELOC_IA64_IMM22:
10489 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10495 case FUNC_LT_DTP_MODULE:
10498 case BFD_RELOC_IA64_IMM22:
10499 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10505 case FUNC_DTP_RELATIVE:
10508 case BFD_RELOC_IA64_DIR64MSB:
10509 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10510 case BFD_RELOC_IA64_DIR64LSB:
10511 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10512 case BFD_RELOC_IA64_IMM14:
10513 new = BFD_RELOC_IA64_DTPREL14; break;
10514 case BFD_RELOC_IA64_IMM22:
10515 new = BFD_RELOC_IA64_DTPREL22; break;
10516 case BFD_RELOC_IA64_IMM64:
10517 new = BFD_RELOC_IA64_DTPREL64I; break;
10523 case FUNC_LT_DTP_RELATIVE:
10526 case BFD_RELOC_IA64_IMM22:
10527 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10533 case FUNC_IPLT_RELOC:
10540 /* Hmmmm. Should this ever occur? */
10547 /* Here is where generate the appropriate reloc for pseudo relocation
10550 ia64_validate_fix (fix)
10553 switch (fix->fx_r_type)
10555 case BFD_RELOC_IA64_FPTR64I:
10556 case BFD_RELOC_IA64_FPTR32MSB:
10557 case BFD_RELOC_IA64_FPTR64LSB:
10558 case BFD_RELOC_IA64_LTOFF_FPTR22:
10559 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10560 if (fix->fx_offset != 0)
10561 as_bad_where (fix->fx_file, fix->fx_line,
10562 "No addend allowed in @fptr() relocation");
10570 fix_insn (fix, odesc, value)
10572 const struct ia64_operand *odesc;
10575 bfd_vma insn[3], t0, t1, control_bits;
10580 slot = fix->fx_where & 0x3;
10581 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10583 /* Bundles are always in little-endian byte order */
10584 t0 = bfd_getl64 (fixpos);
10585 t1 = bfd_getl64 (fixpos + 8);
10586 control_bits = t0 & 0x1f;
10587 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10588 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10589 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10592 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10594 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10595 insn[2] |= (((value & 0x7f) << 13)
10596 | (((value >> 7) & 0x1ff) << 27)
10597 | (((value >> 16) & 0x1f) << 22)
10598 | (((value >> 21) & 0x1) << 21)
10599 | (((value >> 63) & 0x1) << 36));
10601 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10603 if (value & ~0x3fffffffffffffffULL)
10604 err = "integer operand out of range";
10605 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10606 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10608 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10611 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10612 insn[2] |= ((((value >> 59) & 0x1) << 36)
10613 | (((value >> 0) & 0xfffff) << 13));
10616 err = (*odesc->insert) (odesc, value, insn + slot);
10619 as_bad_where (fix->fx_file, fix->fx_line, err);
10621 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10622 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10623 number_to_chars_littleendian (fixpos + 0, t0, 8);
10624 number_to_chars_littleendian (fixpos + 8, t1, 8);
10627 /* Attempt to simplify or even eliminate a fixup. The return value is
10628 ignored; perhaps it was once meaningful, but now it is historical.
10629 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10631 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10635 md_apply_fix3 (fix, valP, seg)
10638 segT seg ATTRIBUTE_UNUSED;
10641 valueT value = *valP;
10643 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10647 switch (fix->fx_r_type)
10649 case BFD_RELOC_IA64_DIR32MSB:
10650 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10653 case BFD_RELOC_IA64_DIR32LSB:
10654 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10657 case BFD_RELOC_IA64_DIR64MSB:
10658 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10661 case BFD_RELOC_IA64_DIR64LSB:
10662 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10671 switch (fix->fx_r_type)
10673 case BFD_RELOC_UNUSED:
10674 /* This must be a TAG13 or TAG13b operand. There are no external
10675 relocs defined for them, so we must give an error. */
10676 as_bad_where (fix->fx_file, fix->fx_line,
10677 "%s must have a constant value",
10678 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10682 case BFD_RELOC_IA64_TPREL14:
10683 case BFD_RELOC_IA64_TPREL22:
10684 case BFD_RELOC_IA64_TPREL64I:
10685 case BFD_RELOC_IA64_LTOFF_TPREL22:
10686 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10687 case BFD_RELOC_IA64_DTPREL14:
10688 case BFD_RELOC_IA64_DTPREL22:
10689 case BFD_RELOC_IA64_DTPREL64I:
10690 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10691 S_SET_THREAD_LOCAL (fix->fx_addsy);
10698 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10700 if (fix->tc_fix_data.bigendian)
10701 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10703 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10708 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10713 /* Generate the BFD reloc to be stuck in the object file from the
10714 fixup used internally in the assembler. */
10717 tc_gen_reloc (sec, fixp)
10718 asection *sec ATTRIBUTE_UNUSED;
10723 reloc = xmalloc (sizeof (*reloc));
10724 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10725 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10726 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10727 reloc->addend = fixp->fx_offset;
10728 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10732 as_bad_where (fixp->fx_file, fixp->fx_line,
10733 "Cannot represent %s relocation in object file",
10734 bfd_get_reloc_code_name (fixp->fx_r_type));
10739 /* Turn a string in input_line_pointer into a floating point constant
10740 of type TYPE, and store the appropriate bytes in *LIT. The number
10741 of LITTLENUMS emitted is stored in *SIZE. An error message is
10742 returned, or NULL on OK. */
10744 #define MAX_LITTLENUMS 5
10747 md_atof (type, lit, size)
10752 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10782 return "Bad call to MD_ATOF()";
10784 t = atof_ieee (input_line_pointer, type, words);
10786 input_line_pointer = t;
10788 (*ia64_float_to_chars) (lit, words, prec);
10792 /* It is 10 byte floating point with 6 byte padding. */
10793 memset (&lit [10], 0, 6);
10794 *size = 8 * sizeof (LITTLENUM_TYPE);
10797 *size = prec * sizeof (LITTLENUM_TYPE);
10802 /* Handle ia64 specific semantics of the align directive. */
10805 ia64_md_do_align (n, fill, len, max)
10806 int n ATTRIBUTE_UNUSED;
10807 const char *fill ATTRIBUTE_UNUSED;
10808 int len ATTRIBUTE_UNUSED;
10809 int max ATTRIBUTE_UNUSED;
10811 if (subseg_text_p (now_seg))
10812 ia64_flush_insns ();
10815 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10816 of an rs_align_code fragment. */
10819 ia64_handle_align (fragp)
10822 /* Use mfi bundle of nops with no stop bits. */
10823 static const unsigned char le_nop[]
10824 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10825 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10830 if (fragp->fr_type != rs_align_code)
10833 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10834 p = fragp->fr_literal + fragp->fr_fix;
10836 /* Make sure we are on a 16-byte boundary, in case someone has been
10837 putting data into a text section. */
10840 int fix = bytes & 15;
10841 memset (p, 0, fix);
10844 fragp->fr_fix += fix;
10847 /* Instruction bundles are always little-endian. */
10848 memcpy (p, le_nop, 16);
10849 fragp->fr_var = 16;
10853 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10858 number_to_chars_bigendian (lit, (long) (*words++),
10859 sizeof (LITTLENUM_TYPE));
10860 lit += sizeof (LITTLENUM_TYPE);
10865 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
10870 number_to_chars_littleendian (lit, (long) (words[prec]),
10871 sizeof (LITTLENUM_TYPE));
10872 lit += sizeof (LITTLENUM_TYPE);
10877 ia64_elf_section_change_hook (void)
10879 dot_byteorder (-1);
10882 /* Check if a label should be made global. */
10884 ia64_check_label (symbolS *label)
10886 if (*input_line_pointer == ':')
10888 S_SET_EXTERNAL (label);
10889 input_line_pointer++;
10893 /* Used to remember where .alias and .secalias directives are seen. We
10894 will rename symbol and section names when we are about to output
10895 the relocatable file. */
10898 char *file; /* The file where the directive is seen. */
10899 unsigned int line; /* The line number the directive is at. */
10900 const char *name; /* The orignale name of the symbol. */
10903 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10904 .secalias. Otherwise, it is .alias. */
10906 dot_alias (int section)
10908 char *name, *alias;
10912 const char *error_string;
10915 struct hash_control *ahash, *nhash;
10918 name = input_line_pointer;
10919 delim = get_symbol_end ();
10920 end_name = input_line_pointer;
10923 if (name == end_name)
10925 as_bad (_("expected symbol name"));
10926 discard_rest_of_line ();
10930 SKIP_WHITESPACE ();
10932 if (*input_line_pointer != ',')
10935 as_bad (_("expected comma after \"%s\""), name);
10937 ignore_rest_of_line ();
10941 input_line_pointer++;
10944 /* We call demand_copy_C_string to check if alias string is valid.
10945 There should be a closing `"' and no `\0' in the string. */
10946 alias = demand_copy_C_string (&len);
10949 ignore_rest_of_line ();
10953 /* Make a copy of name string. */
10954 len = strlen (name) + 1;
10955 obstack_grow (¬es, name, len);
10956 name = obstack_finish (¬es);
10961 ahash = secalias_hash;
10962 nhash = secalias_name_hash;
10967 ahash = alias_hash;
10968 nhash = alias_name_hash;
10971 /* Check if alias has been used before. */
10972 h = (struct alias *) hash_find (ahash, alias);
10975 if (strcmp (h->name, name))
10976 as_bad (_("`%s' is already the alias of %s `%s'"),
10977 alias, kind, h->name);
10981 /* Check if name already has an alias. */
10982 a = (const char *) hash_find (nhash, name);
10985 if (strcmp (a, alias))
10986 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
10990 h = (struct alias *) xmalloc (sizeof (struct alias));
10991 as_where (&h->file, &h->line);
10994 error_string = hash_jam (ahash, alias, (PTR) h);
10997 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10998 alias, kind, error_string);
11002 error_string = hash_jam (nhash, name, (PTR) alias);
11005 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11006 alias, kind, error_string);
11008 obstack_free (¬es, name);
11009 obstack_free (¬es, alias);
11012 demand_empty_rest_of_line ();
11015 /* It renames the original symbol name to its alias. */
11017 do_alias (const char *alias, PTR value)
11019 struct alias *h = (struct alias *) value;
11020 symbolS *sym = symbol_find (h->name);
11023 as_warn_where (h->file, h->line,
11024 _("symbol `%s' aliased to `%s' is not used"),
11027 S_SET_NAME (sym, (char *) alias);
11030 /* Called from write_object_file. */
11032 ia64_adjust_symtab (void)
11034 hash_traverse (alias_hash, do_alias);
11037 /* It renames the original section name to its alias. */
11039 do_secalias (const char *alias, PTR value)
11041 struct alias *h = (struct alias *) value;
11042 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11045 as_warn_where (h->file, h->line,
11046 _("section `%s' aliased to `%s' is not used"),
11052 /* Called from write_object_file. */
11054 ia64_frob_file (void)
11056 hash_traverse (secalias_hash, do_secalias);