1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template[N][N][N];
585 /* Resource dependencies currently in effect */
587 int depind; /* dependency index */
588 const struct ia64_dependency *dependency; /* actual dependency */
589 unsigned specific:1, /* is this a specific bit/regno? */
590 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
591 int index; /* specific regno/bit within dependency */
592 int note; /* optional qualifying note (0 if none) */
596 int insn_srlz; /* current insn serialization state */
597 int data_srlz; /* current data serialization state */
598 int qp_regno; /* qualifying predicate for this usage */
599 char *file; /* what file marked this dependency */
600 unsigned int line; /* what line marked this dependency */
601 struct mem_offset mem_offset; /* optional memory offset hint */
602 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
603 int path; /* corresponding code entry index */
605 static int regdepslen = 0;
606 static int regdepstotlen = 0;
607 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex {
616 } *qp_mutexes = NULL; /* QP mutex bitmasks */
617 static int qp_mutexeslen = 0;
618 static int qp_mutexestotlen = 0;
619 static valueT qp_safe_across_calls = 0;
621 /* Current state of PR implications */
622 static struct qp_imply {
625 unsigned p2_branched:1;
627 } *qp_implies = NULL;
628 static int qp_implieslen = 0;
629 static int qp_impliestotlen = 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values[128] = {{ 1, 0, 0 }};
639 /* These are the routines required to output the various types of
642 /* A slot_number is a frag address plus the slot index (0-2). We use the
643 frag address here so that if there is a section switch in the middle of
644 a function, then instructions emitted to a different section are not
645 counted. Since there may be more than one frag for a function, this
646 means we also need to keep track of which frag this address belongs to
647 so we can compute inter-frag distances. This also nicely solves the
648 problem with nops emitted for align directives, which can't easily be
649 counted, but can easily be derived from frag sizes. */
651 typedef struct unw_rec_list {
653 unsigned long slot_number;
655 unsigned long next_slot_number;
656 fragS *next_slot_frag;
657 struct unw_rec_list *next;
660 #define SLOT_NUM_NOT_SET (unsigned)-1
662 /* Linked list of saved prologue counts. A very poor
663 implementation of a map from label numbers to prologue counts. */
664 typedef struct label_prologue_count
666 struct label_prologue_count *next;
667 unsigned long label_number;
668 unsigned int prologue_count;
669 } label_prologue_count;
673 /* Maintain a list of unwind entries for the current function. */
677 /* Any unwind entires that should be attached to the current slot
678 that an insn is being constructed for. */
679 unw_rec_list *current_entry;
681 /* These are used to create the unwind table entry for this function. */
684 symbolS *info; /* pointer to unwind info */
685 symbolS *personality_routine;
687 subsegT saved_text_subseg;
688 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
690 /* TRUE if processing unwind directives in a prologue region. */
693 unsigned int prologue_count; /* number of .prologues seen so far */
694 /* Prologue counts at previous .label_state directives. */
695 struct label_prologue_count * saved_prologue_counts;
698 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
700 /* Forward declarations: */
701 static int ar_is_in_integer_unit PARAMS ((int regnum));
702 static void set_section PARAMS ((char *name));
703 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
704 unsigned int, unsigned int));
705 static void dot_radix PARAMS ((int));
706 static void dot_special_section PARAMS ((int));
707 static void dot_proc PARAMS ((int));
708 static void dot_fframe PARAMS ((int));
709 static void dot_vframe PARAMS ((int));
710 static void dot_vframesp PARAMS ((int));
711 static void dot_vframepsp PARAMS ((int));
712 static void dot_save PARAMS ((int));
713 static void dot_restore PARAMS ((int));
714 static void dot_restorereg PARAMS ((int));
715 static void dot_restorereg_p PARAMS ((int));
716 static void dot_handlerdata PARAMS ((int));
717 static void dot_unwentry PARAMS ((int));
718 static void dot_altrp PARAMS ((int));
719 static void dot_savemem PARAMS ((int));
720 static void dot_saveg PARAMS ((int));
721 static void dot_savef PARAMS ((int));
722 static void dot_saveb PARAMS ((int));
723 static void dot_savegf PARAMS ((int));
724 static void dot_spill PARAMS ((int));
725 static void dot_spillreg PARAMS ((int));
726 static void dot_spillmem PARAMS ((int));
727 static void dot_spillreg_p PARAMS ((int));
728 static void dot_spillmem_p PARAMS ((int));
729 static void dot_label_state PARAMS ((int));
730 static void dot_copy_state PARAMS ((int));
731 static void dot_unwabi PARAMS ((int));
732 static void dot_personality PARAMS ((int));
733 static void dot_body PARAMS ((int));
734 static void dot_prologue PARAMS ((int));
735 static void dot_endp PARAMS ((int));
736 static void dot_template PARAMS ((int));
737 static void dot_regstk PARAMS ((int));
738 static void dot_rot PARAMS ((int));
739 static void dot_byteorder PARAMS ((int));
740 static void dot_psr PARAMS ((int));
741 static void dot_alias PARAMS ((int));
742 static void dot_ln PARAMS ((int));
743 static char *parse_section_name PARAMS ((void));
744 static void dot_xdata PARAMS ((int));
745 static void stmt_float_cons PARAMS ((int));
746 static void stmt_cons_ua PARAMS ((int));
747 static void dot_xfloat_cons PARAMS ((int));
748 static void dot_xstringer PARAMS ((int));
749 static void dot_xdata_ua PARAMS ((int));
750 static void dot_xfloat_cons_ua PARAMS ((int));
751 static void print_prmask PARAMS ((valueT mask));
752 static void dot_pred_rel PARAMS ((int));
753 static void dot_reg_val PARAMS ((int));
754 static void dot_dv_mode PARAMS ((int));
755 static void dot_entry PARAMS ((int));
756 static void dot_mem_offset PARAMS ((int));
757 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
758 static symbolS *declare_register PARAMS ((const char *name, int regnum));
759 static void declare_register_set PARAMS ((const char *, int, int));
760 static unsigned int operand_width PARAMS ((enum ia64_opnd));
761 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
764 static int parse_operand PARAMS ((expressionS *e));
765 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
766 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
767 static void build_insn PARAMS ((struct slot *, bfd_vma *));
768 static void emit_one_bundle PARAMS ((void));
769 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
770 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
771 bfd_reloc_code_real_type r_type));
772 static void insn_group_break PARAMS ((int, int, int));
773 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
774 struct rsrc *, int depind, int path));
775 static void add_qp_mutex PARAMS((valueT mask));
776 static void add_qp_imply PARAMS((int p1, int p2));
777 static void clear_qp_branch_flag PARAMS((valueT mask));
778 static void clear_qp_mutex PARAMS((valueT mask));
779 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
780 static int has_suffix_p PARAMS((const char *, const char *));
781 static void clear_register_values PARAMS ((void));
782 static void print_dependency PARAMS ((const char *action, int depind));
783 static void instruction_serialization PARAMS ((void));
784 static void data_serialization PARAMS ((void));
785 static void remove_marked_resource PARAMS ((struct rsrc *));
786 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
787 static int is_taken_branch PARAMS ((struct ia64_opcode *));
788 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
789 static int depends_on PARAMS ((int, struct ia64_opcode *));
790 static int specify_resource PARAMS ((const struct ia64_dependency *,
791 struct ia64_opcode *, int, struct rsrc [], int, int));
792 static int check_dv PARAMS((struct ia64_opcode *idesc));
793 static void check_dependencies PARAMS((struct ia64_opcode *));
794 static void mark_resources PARAMS((struct ia64_opcode *));
795 static void update_dependencies PARAMS((struct ia64_opcode *));
796 static void note_register_values PARAMS((struct ia64_opcode *));
797 static int qp_mutex PARAMS ((int, int, int));
798 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
799 static void output_vbyte_mem PARAMS ((int, char *, char *));
800 static void count_output PARAMS ((int, char *, char *));
801 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
802 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
803 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
804 static void output_P1_format PARAMS ((vbyte_func, int));
805 static void output_P2_format PARAMS ((vbyte_func, int, int));
806 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
807 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
808 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
809 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
810 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
811 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
812 static void output_P9_format PARAMS ((vbyte_func, int, int));
813 static void output_P10_format PARAMS ((vbyte_func, int, int));
814 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
817 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818 static char format_ab_reg PARAMS ((int, int));
819 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
821 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
822 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
824 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
825 static unw_rec_list *output_endp PARAMS ((void));
826 static unw_rec_list *output_prologue PARAMS ((void));
827 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
828 static unw_rec_list *output_body PARAMS ((void));
829 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
830 static unw_rec_list *output_mem_stack_v PARAMS ((void));
831 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
832 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
833 static unw_rec_list *output_rp_when PARAMS ((void));
834 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
837 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
838 static unw_rec_list *output_pfs_when PARAMS ((void));
839 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
841 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
842 static unw_rec_list *output_preds_when PARAMS ((void));
843 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
845 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
846 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
847 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
849 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
851 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
853 static unw_rec_list *output_unat_when PARAMS ((void));
854 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
856 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
857 static unw_rec_list *output_lc_when PARAMS ((void));
858 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
860 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
861 static unw_rec_list *output_fpsr_when PARAMS ((void));
862 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
864 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
865 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
866 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
867 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
869 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
870 static unw_rec_list *output_bsp_when PARAMS ((void));
871 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
874 static unw_rec_list *output_bspstore_when PARAMS ((void));
875 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
877 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
878 static unw_rec_list *output_rnat_when PARAMS ((void));
879 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
881 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
882 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
883 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
884 static unw_rec_list *output_label_state PARAMS ((unsigned long));
885 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
886 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
888 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
890 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
892 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
894 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
895 unsigned int, unsigned int));
896 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
897 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
898 static int calc_record_size PARAMS ((unw_rec_list *));
899 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
900 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
901 unsigned long, fragS *));
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static void generate_unwind_image PARAMS ((const char *));
907 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
908 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
909 static void free_saved_prologue_counts PARAMS ((void));
911 /* Build the unwind section name by appending the (possibly stripped)
912 text section NAME to the unwind PREFIX. The resulting string
913 pointer is assigned to RESULT. The string is allocated on the
914 stack, so this must be a macro... */
915 #define make_unw_section_name(special, text_name, result) \
917 const char *_prefix = special_section_name[special]; \
918 const char *_suffix = text_name; \
919 size_t _prefix_len, _suffix_len; \
921 if (strncmp (text_name, ".gnu.linkonce.t.", \
922 sizeof (".gnu.linkonce.t.") - 1) == 0) \
924 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
925 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
927 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
928 _result = alloca (_prefix_len + _suffix_len + 1); \
929 memcpy (_result, _prefix, _prefix_len); \
930 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
931 _result[_prefix_len + _suffix_len] = '\0'; \
936 /* Determine if application register REGNUM resides in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_in_integer_unit (reg)
944 return (reg == 64 /* pfs */
945 || reg == 65 /* lc */
946 || reg == 66 /* ec */
947 /* ??? ias accepts and puts these in the integer unit. */
948 || (reg >= 112 && reg <= 127));
951 /* Switch to section NAME and create section if necessary. It's
952 rather ugly that we have to manipulate input_line_pointer but I
953 don't see any other way to accomplish the same thing without
954 changing obj-elf.c (which may be the Right Thing, in the end). */
959 char *saved_input_line_pointer;
961 saved_input_line_pointer = input_line_pointer;
962 input_line_pointer = name;
964 input_line_pointer = saved_input_line_pointer;
967 /* Map 's' to SHF_IA_64_SHORT. */
970 ia64_elf_section_letter (letter, ptr_msg)
975 return SHF_IA_64_SHORT;
976 else if (letter == 'o')
977 return SHF_LINK_ORDER;
979 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
983 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
986 ia64_elf_section_flags (flags, attr, type)
988 int attr, type ATTRIBUTE_UNUSED;
990 if (attr & SHF_IA_64_SHORT)
991 flags |= SEC_SMALL_DATA;
996 ia64_elf_section_type (str, len)
1000 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1002 if (STREQ (ELF_STRING_ia64_unwind_info))
1003 return SHT_PROGBITS;
1005 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1006 return SHT_PROGBITS;
1008 if (STREQ (ELF_STRING_ia64_unwind))
1009 return SHT_IA_64_UNWIND;
1011 if (STREQ (ELF_STRING_ia64_unwind_once))
1012 return SHT_IA_64_UNWIND;
1014 if (STREQ ("unwind"))
1015 return SHT_IA_64_UNWIND;
1017 if (STREQ ("init_array"))
1018 return SHT_INIT_ARRAY;
1020 if (STREQ ("fini_array"))
1021 return SHT_FINI_ARRAY;
1028 set_regstack (ins, locs, outs, rots)
1029 unsigned int ins, locs, outs, rots;
1031 /* Size of frame. */
1034 sof = ins + locs + outs;
1037 as_bad ("Size of frame exceeds maximum of 96 registers");
1042 as_warn ("Size of rotating registers exceeds frame size");
1045 md.in.base = REG_GR + 32;
1046 md.loc.base = md.in.base + ins;
1047 md.out.base = md.loc.base + locs;
1049 md.in.num_regs = ins;
1050 md.loc.num_regs = locs;
1051 md.out.num_regs = outs;
1052 md.rot.num_regs = rots;
1059 struct label_fix *lfix;
1061 subsegT saved_subseg;
1064 if (!md.last_text_seg)
1067 saved_seg = now_seg;
1068 saved_subseg = now_subseg;
1070 subseg_set (md.last_text_seg, 0);
1072 while (md.num_slots_in_use > 0)
1073 emit_one_bundle (); /* force out queued instructions */
1075 /* In case there are labels following the last instruction, resolve
1077 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1079 S_SET_VALUE (lfix->sym, frag_now_fix ());
1080 symbol_set_frag (lfix->sym, frag_now);
1082 CURR_SLOT.label_fixups = 0;
1083 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1085 S_SET_VALUE (lfix->sym, frag_now_fix ());
1086 symbol_set_frag (lfix->sym, frag_now);
1088 CURR_SLOT.tag_fixups = 0;
1090 /* In case there are unwind directives following the last instruction,
1091 resolve those now. We only handle prologue, body, and endp directives
1092 here. Give an error for others. */
1093 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1095 switch (ptr->r.type)
1101 ptr->slot_number = (unsigned long) frag_more (0);
1102 ptr->slot_frag = frag_now;
1105 /* Allow any record which doesn't have a "t" field (i.e.,
1106 doesn't relate to a particular instruction). */
1122 as_bad (_("Unwind directive not followed by an instruction."));
1126 unwind.current_entry = NULL;
1128 subseg_set (saved_seg, saved_subseg);
1130 if (md.qp.X_op == O_register)
1131 as_bad ("qualifying predicate not followed by instruction");
1135 ia64_do_align (nbytes)
1138 char *saved_input_line_pointer = input_line_pointer;
1140 input_line_pointer = "";
1141 s_align_bytes (nbytes);
1142 input_line_pointer = saved_input_line_pointer;
1146 ia64_cons_align (nbytes)
1151 char *saved_input_line_pointer = input_line_pointer;
1152 input_line_pointer = "";
1153 s_align_bytes (nbytes);
1154 input_line_pointer = saved_input_line_pointer;
1158 /* Output COUNT bytes to a memory location. */
1159 static unsigned char *vbyte_mem_ptr = NULL;
1162 output_vbyte_mem (count, ptr, comment)
1165 char *comment ATTRIBUTE_UNUSED;
1168 if (vbyte_mem_ptr == NULL)
1173 for (x = 0; x < count; x++)
1174 *(vbyte_mem_ptr++) = ptr[x];
1177 /* Count the number of bytes required for records. */
1178 static int vbyte_count = 0;
1180 count_output (count, ptr, comment)
1182 char *ptr ATTRIBUTE_UNUSED;
1183 char *comment ATTRIBUTE_UNUSED;
1185 vbyte_count += count;
1189 output_R1_format (f, rtype, rlen)
1191 unw_record_type rtype;
1198 output_R3_format (f, rtype, rlen);
1204 else if (rtype != prologue)
1205 as_bad ("record type is not valid");
1207 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1208 (*f) (1, &byte, NULL);
1212 output_R2_format (f, mask, grsave, rlen)
1219 mask = (mask & 0x0f);
1220 grsave = (grsave & 0x7f);
1222 bytes[0] = (UNW_R2 | (mask >> 1));
1223 bytes[1] = (((mask & 0x01) << 7) | grsave);
1224 count += output_leb128 (bytes + 2, rlen, 0);
1225 (*f) (count, bytes, NULL);
1229 output_R3_format (f, rtype, rlen)
1231 unw_record_type rtype;
1238 output_R1_format (f, rtype, rlen);
1244 else if (rtype != prologue)
1245 as_bad ("record type is not valid");
1246 bytes[0] = (UNW_R3 | r);
1247 count = output_leb128 (bytes + 1, rlen, 0);
1248 (*f) (count + 1, bytes, NULL);
1252 output_P1_format (f, brmask)
1257 byte = UNW_P1 | (brmask & 0x1f);
1258 (*f) (1, &byte, NULL);
1262 output_P2_format (f, brmask, gr)
1268 brmask = (brmask & 0x1f);
1269 bytes[0] = UNW_P2 | (brmask >> 1);
1270 bytes[1] = (((brmask & 1) << 7) | gr);
1271 (*f) (2, bytes, NULL);
1275 output_P3_format (f, rtype, reg)
1277 unw_record_type rtype;
1322 as_bad ("Invalid record type for P3 format.");
1324 bytes[0] = (UNW_P3 | (r >> 1));
1325 bytes[1] = (((r & 1) << 7) | reg);
1326 (*f) (2, bytes, NULL);
1330 output_P4_format (f, imask, imask_size)
1332 unsigned char *imask;
1333 unsigned long imask_size;
1336 (*f) (imask_size, imask, NULL);
1340 output_P5_format (f, grmask, frmask)
1343 unsigned long frmask;
1346 grmask = (grmask & 0x0f);
1349 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1350 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1351 bytes[3] = (frmask & 0x000000ff);
1352 (*f) (4, bytes, NULL);
1356 output_P6_format (f, rtype, rmask)
1358 unw_record_type rtype;
1364 if (rtype == gr_mem)
1366 else if (rtype != fr_mem)
1367 as_bad ("Invalid record type for format P6");
1368 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1369 (*f) (1, &byte, NULL);
1373 output_P7_format (f, rtype, w1, w2)
1375 unw_record_type rtype;
1382 count += output_leb128 (bytes + 1, w1, 0);
1387 count += output_leb128 (bytes + count, w2 >> 4, 0);
1437 bytes[0] = (UNW_P7 | r);
1438 (*f) (count, bytes, NULL);
1442 output_P8_format (f, rtype, t)
1444 unw_record_type rtype;
1483 case bspstore_psprel:
1486 case bspstore_sprel:
1498 case priunat_when_gr:
1501 case priunat_psprel:
1507 case priunat_when_mem:
1514 count += output_leb128 (bytes + 2, t, 0);
1515 (*f) (count, bytes, NULL);
1519 output_P9_format (f, grmask, gr)
1526 bytes[1] = (grmask & 0x0f);
1527 bytes[2] = (gr & 0x7f);
1528 (*f) (3, bytes, NULL);
1532 output_P10_format (f, abi, context)
1539 bytes[1] = (abi & 0xff);
1540 bytes[2] = (context & 0xff);
1541 (*f) (3, bytes, NULL);
1545 output_B1_format (f, rtype, label)
1547 unw_record_type rtype;
1548 unsigned long label;
1554 output_B4_format (f, rtype, label);
1557 if (rtype == copy_state)
1559 else if (rtype != label_state)
1560 as_bad ("Invalid record type for format B1");
1562 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1563 (*f) (1, &byte, NULL);
1567 output_B2_format (f, ecount, t)
1569 unsigned long ecount;
1576 output_B3_format (f, ecount, t);
1579 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1580 count += output_leb128 (bytes + 1, t, 0);
1581 (*f) (count, bytes, NULL);
1585 output_B3_format (f, ecount, t)
1587 unsigned long ecount;
1594 output_B2_format (f, ecount, t);
1598 count += output_leb128 (bytes + 1, t, 0);
1599 count += output_leb128 (bytes + count, ecount, 0);
1600 (*f) (count, bytes, NULL);
1604 output_B4_format (f, rtype, label)
1606 unw_record_type rtype;
1607 unsigned long label;
1614 output_B1_format (f, rtype, label);
1618 if (rtype == copy_state)
1620 else if (rtype != label_state)
1621 as_bad ("Invalid record type for format B1");
1623 bytes[0] = (UNW_B4 | (r << 3));
1624 count += output_leb128 (bytes + 1, label, 0);
1625 (*f) (count, bytes, NULL);
1629 format_ab_reg (ab, reg)
1636 ret = (ab << 5) | reg;
1641 output_X1_format (f, rtype, ab, reg, t, w1)
1643 unw_record_type rtype;
1653 if (rtype == spill_sprel)
1655 else if (rtype != spill_psprel)
1656 as_bad ("Invalid record type for format X1");
1657 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1658 count += output_leb128 (bytes + 2, t, 0);
1659 count += output_leb128 (bytes + count, w1, 0);
1660 (*f) (count, bytes, NULL);
1664 output_X2_format (f, ab, reg, x, y, treg, t)
1673 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1674 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1675 count += output_leb128 (bytes + 3, t, 0);
1676 (*f) (count, bytes, NULL);
1680 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1682 unw_record_type rtype;
1693 if (rtype == spill_sprel_p)
1695 else if (rtype != spill_psprel_p)
1696 as_bad ("Invalid record type for format X3");
1697 bytes[1] = ((r << 7) | (qp & 0x3f));
1698 bytes[2] = format_ab_reg (ab, reg);
1699 count += output_leb128 (bytes + 3, t, 0);
1700 count += output_leb128 (bytes + count, w1, 0);
1701 (*f) (count, bytes, NULL);
1705 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1715 bytes[1] = (qp & 0x3f);
1716 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1717 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1718 count += output_leb128 (bytes + 4, t, 0);
1719 (*f) (count, bytes, NULL);
1722 /* This function allocates a record list structure, and initializes fields. */
1724 static unw_rec_list *
1725 alloc_record (unw_record_type t)
1728 ptr = xmalloc (sizeof (*ptr));
1730 ptr->slot_number = SLOT_NUM_NOT_SET;
1732 ptr->next_slot_number = 0;
1733 ptr->next_slot_frag = 0;
1737 /* Dummy unwind record used for calculating the length of the last prologue or
1740 static unw_rec_list *
1743 unw_rec_list *ptr = alloc_record (endp);
1747 static unw_rec_list *
1750 unw_rec_list *ptr = alloc_record (prologue);
1751 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1755 static unw_rec_list *
1756 output_prologue_gr (saved_mask, reg)
1757 unsigned int saved_mask;
1760 unw_rec_list *ptr = alloc_record (prologue_gr);
1761 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1762 ptr->r.record.r.grmask = saved_mask;
1763 ptr->r.record.r.grsave = reg;
1767 static unw_rec_list *
1770 unw_rec_list *ptr = alloc_record (body);
1774 static unw_rec_list *
1775 output_mem_stack_f (size)
1778 unw_rec_list *ptr = alloc_record (mem_stack_f);
1779 ptr->r.record.p.size = size;
1783 static unw_rec_list *
1784 output_mem_stack_v ()
1786 unw_rec_list *ptr = alloc_record (mem_stack_v);
1790 static unw_rec_list *
1794 unw_rec_list *ptr = alloc_record (psp_gr);
1795 ptr->r.record.p.gr = gr;
1799 static unw_rec_list *
1800 output_psp_sprel (offset)
1801 unsigned int offset;
1803 unw_rec_list *ptr = alloc_record (psp_sprel);
1804 ptr->r.record.p.spoff = offset / 4;
1808 static unw_rec_list *
1811 unw_rec_list *ptr = alloc_record (rp_when);
1815 static unw_rec_list *
1819 unw_rec_list *ptr = alloc_record (rp_gr);
1820 ptr->r.record.p.gr = gr;
1824 static unw_rec_list *
1828 unw_rec_list *ptr = alloc_record (rp_br);
1829 ptr->r.record.p.br = br;
1833 static unw_rec_list *
1834 output_rp_psprel (offset)
1835 unsigned int offset;
1837 unw_rec_list *ptr = alloc_record (rp_psprel);
1838 ptr->r.record.p.pspoff = offset / 4;
1842 static unw_rec_list *
1843 output_rp_sprel (offset)
1844 unsigned int offset;
1846 unw_rec_list *ptr = alloc_record (rp_sprel);
1847 ptr->r.record.p.spoff = offset / 4;
1851 static unw_rec_list *
1854 unw_rec_list *ptr = alloc_record (pfs_when);
1858 static unw_rec_list *
1862 unw_rec_list *ptr = alloc_record (pfs_gr);
1863 ptr->r.record.p.gr = gr;
1867 static unw_rec_list *
1868 output_pfs_psprel (offset)
1869 unsigned int offset;
1871 unw_rec_list *ptr = alloc_record (pfs_psprel);
1872 ptr->r.record.p.pspoff = offset / 4;
1876 static unw_rec_list *
1877 output_pfs_sprel (offset)
1878 unsigned int offset;
1880 unw_rec_list *ptr = alloc_record (pfs_sprel);
1881 ptr->r.record.p.spoff = offset / 4;
1885 static unw_rec_list *
1886 output_preds_when ()
1888 unw_rec_list *ptr = alloc_record (preds_when);
1892 static unw_rec_list *
1893 output_preds_gr (gr)
1896 unw_rec_list *ptr = alloc_record (preds_gr);
1897 ptr->r.record.p.gr = gr;
1901 static unw_rec_list *
1902 output_preds_psprel (offset)
1903 unsigned int offset;
1905 unw_rec_list *ptr = alloc_record (preds_psprel);
1906 ptr->r.record.p.pspoff = offset / 4;
1910 static unw_rec_list *
1911 output_preds_sprel (offset)
1912 unsigned int offset;
1914 unw_rec_list *ptr = alloc_record (preds_sprel);
1915 ptr->r.record.p.spoff = offset / 4;
1919 static unw_rec_list *
1920 output_fr_mem (mask)
1923 unw_rec_list *ptr = alloc_record (fr_mem);
1924 ptr->r.record.p.rmask = mask;
1928 static unw_rec_list *
1929 output_frgr_mem (gr_mask, fr_mask)
1930 unsigned int gr_mask;
1931 unsigned int fr_mask;
1933 unw_rec_list *ptr = alloc_record (frgr_mem);
1934 ptr->r.record.p.grmask = gr_mask;
1935 ptr->r.record.p.frmask = fr_mask;
1939 static unw_rec_list *
1940 output_gr_gr (mask, reg)
1944 unw_rec_list *ptr = alloc_record (gr_gr);
1945 ptr->r.record.p.grmask = mask;
1946 ptr->r.record.p.gr = reg;
1950 static unw_rec_list *
1951 output_gr_mem (mask)
1954 unw_rec_list *ptr = alloc_record (gr_mem);
1955 ptr->r.record.p.rmask = mask;
1959 static unw_rec_list *
1960 output_br_mem (unsigned int mask)
1962 unw_rec_list *ptr = alloc_record (br_mem);
1963 ptr->r.record.p.brmask = mask;
1967 static unw_rec_list *
1968 output_br_gr (save_mask, reg)
1969 unsigned int save_mask;
1972 unw_rec_list *ptr = alloc_record (br_gr);
1973 ptr->r.record.p.brmask = save_mask;
1974 ptr->r.record.p.gr = reg;
1978 static unw_rec_list *
1979 output_spill_base (offset)
1980 unsigned int offset;
1982 unw_rec_list *ptr = alloc_record (spill_base);
1983 ptr->r.record.p.pspoff = offset / 4;
1987 static unw_rec_list *
1990 unw_rec_list *ptr = alloc_record (unat_when);
1994 static unw_rec_list *
1998 unw_rec_list *ptr = alloc_record (unat_gr);
1999 ptr->r.record.p.gr = gr;
2003 static unw_rec_list *
2004 output_unat_psprel (offset)
2005 unsigned int offset;
2007 unw_rec_list *ptr = alloc_record (unat_psprel);
2008 ptr->r.record.p.pspoff = offset / 4;
2012 static unw_rec_list *
2013 output_unat_sprel (offset)
2014 unsigned int offset;
2016 unw_rec_list *ptr = alloc_record (unat_sprel);
2017 ptr->r.record.p.spoff = offset / 4;
2021 static unw_rec_list *
2024 unw_rec_list *ptr = alloc_record (lc_when);
2028 static unw_rec_list *
2032 unw_rec_list *ptr = alloc_record (lc_gr);
2033 ptr->r.record.p.gr = gr;
2037 static unw_rec_list *
2038 output_lc_psprel (offset)
2039 unsigned int offset;
2041 unw_rec_list *ptr = alloc_record (lc_psprel);
2042 ptr->r.record.p.pspoff = offset / 4;
2046 static unw_rec_list *
2047 output_lc_sprel (offset)
2048 unsigned int offset;
2050 unw_rec_list *ptr = alloc_record (lc_sprel);
2051 ptr->r.record.p.spoff = offset / 4;
2055 static unw_rec_list *
2058 unw_rec_list *ptr = alloc_record (fpsr_when);
2062 static unw_rec_list *
2066 unw_rec_list *ptr = alloc_record (fpsr_gr);
2067 ptr->r.record.p.gr = gr;
2071 static unw_rec_list *
2072 output_fpsr_psprel (offset)
2073 unsigned int offset;
2075 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2076 ptr->r.record.p.pspoff = offset / 4;
2080 static unw_rec_list *
2081 output_fpsr_sprel (offset)
2082 unsigned int offset;
2084 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2085 ptr->r.record.p.spoff = offset / 4;
2089 static unw_rec_list *
2090 output_priunat_when_gr ()
2092 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2096 static unw_rec_list *
2097 output_priunat_when_mem ()
2099 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2103 static unw_rec_list *
2104 output_priunat_gr (gr)
2107 unw_rec_list *ptr = alloc_record (priunat_gr);
2108 ptr->r.record.p.gr = gr;
2112 static unw_rec_list *
2113 output_priunat_psprel (offset)
2114 unsigned int offset;
2116 unw_rec_list *ptr = alloc_record (priunat_psprel);
2117 ptr->r.record.p.pspoff = offset / 4;
2121 static unw_rec_list *
2122 output_priunat_sprel (offset)
2123 unsigned int offset;
2125 unw_rec_list *ptr = alloc_record (priunat_sprel);
2126 ptr->r.record.p.spoff = offset / 4;
2130 static unw_rec_list *
2133 unw_rec_list *ptr = alloc_record (bsp_when);
2137 static unw_rec_list *
2141 unw_rec_list *ptr = alloc_record (bsp_gr);
2142 ptr->r.record.p.gr = gr;
2146 static unw_rec_list *
2147 output_bsp_psprel (offset)
2148 unsigned int offset;
2150 unw_rec_list *ptr = alloc_record (bsp_psprel);
2151 ptr->r.record.p.pspoff = offset / 4;
2155 static unw_rec_list *
2156 output_bsp_sprel (offset)
2157 unsigned int offset;
2159 unw_rec_list *ptr = alloc_record (bsp_sprel);
2160 ptr->r.record.p.spoff = offset / 4;
2164 static unw_rec_list *
2165 output_bspstore_when ()
2167 unw_rec_list *ptr = alloc_record (bspstore_when);
2171 static unw_rec_list *
2172 output_bspstore_gr (gr)
2175 unw_rec_list *ptr = alloc_record (bspstore_gr);
2176 ptr->r.record.p.gr = gr;
2180 static unw_rec_list *
2181 output_bspstore_psprel (offset)
2182 unsigned int offset;
2184 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2185 ptr->r.record.p.pspoff = offset / 4;
2189 static unw_rec_list *
2190 output_bspstore_sprel (offset)
2191 unsigned int offset;
2193 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2194 ptr->r.record.p.spoff = offset / 4;
2198 static unw_rec_list *
2201 unw_rec_list *ptr = alloc_record (rnat_when);
2205 static unw_rec_list *
2209 unw_rec_list *ptr = alloc_record (rnat_gr);
2210 ptr->r.record.p.gr = gr;
2214 static unw_rec_list *
2215 output_rnat_psprel (offset)
2216 unsigned int offset;
2218 unw_rec_list *ptr = alloc_record (rnat_psprel);
2219 ptr->r.record.p.pspoff = offset / 4;
2223 static unw_rec_list *
2224 output_rnat_sprel (offset)
2225 unsigned int offset;
2227 unw_rec_list *ptr = alloc_record (rnat_sprel);
2228 ptr->r.record.p.spoff = offset / 4;
2232 static unw_rec_list *
2233 output_unwabi (abi, context)
2235 unsigned long context;
2237 unw_rec_list *ptr = alloc_record (unwabi);
2238 ptr->r.record.p.abi = abi;
2239 ptr->r.record.p.context = context;
2243 static unw_rec_list *
2244 output_epilogue (unsigned long ecount)
2246 unw_rec_list *ptr = alloc_record (epilogue);
2247 ptr->r.record.b.ecount = ecount;
2251 static unw_rec_list *
2252 output_label_state (unsigned long label)
2254 unw_rec_list *ptr = alloc_record (label_state);
2255 ptr->r.record.b.label = label;
2259 static unw_rec_list *
2260 output_copy_state (unsigned long label)
2262 unw_rec_list *ptr = alloc_record (copy_state);
2263 ptr->r.record.b.label = label;
2267 static unw_rec_list *
2268 output_spill_psprel (ab, reg, offset)
2271 unsigned int offset;
2273 unw_rec_list *ptr = alloc_record (spill_psprel);
2274 ptr->r.record.x.ab = ab;
2275 ptr->r.record.x.reg = reg;
2276 ptr->r.record.x.pspoff = offset / 4;
2280 static unw_rec_list *
2281 output_spill_sprel (ab, reg, offset)
2284 unsigned int offset;
2286 unw_rec_list *ptr = alloc_record (spill_sprel);
2287 ptr->r.record.x.ab = ab;
2288 ptr->r.record.x.reg = reg;
2289 ptr->r.record.x.spoff = offset / 4;
2293 static unw_rec_list *
2294 output_spill_psprel_p (ab, reg, offset, predicate)
2297 unsigned int offset;
2298 unsigned int predicate;
2300 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2301 ptr->r.record.x.ab = ab;
2302 ptr->r.record.x.reg = reg;
2303 ptr->r.record.x.pspoff = offset / 4;
2304 ptr->r.record.x.qp = predicate;
2308 static unw_rec_list *
2309 output_spill_sprel_p (ab, reg, offset, predicate)
2312 unsigned int offset;
2313 unsigned int predicate;
2315 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2316 ptr->r.record.x.ab = ab;
2317 ptr->r.record.x.reg = reg;
2318 ptr->r.record.x.spoff = offset / 4;
2319 ptr->r.record.x.qp = predicate;
2323 static unw_rec_list *
2324 output_spill_reg (ab, reg, targ_reg, xy)
2327 unsigned int targ_reg;
2330 unw_rec_list *ptr = alloc_record (spill_reg);
2331 ptr->r.record.x.ab = ab;
2332 ptr->r.record.x.reg = reg;
2333 ptr->r.record.x.treg = targ_reg;
2334 ptr->r.record.x.xy = xy;
2338 static unw_rec_list *
2339 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2342 unsigned int targ_reg;
2344 unsigned int predicate;
2346 unw_rec_list *ptr = alloc_record (spill_reg_p);
2347 ptr->r.record.x.ab = ab;
2348 ptr->r.record.x.reg = reg;
2349 ptr->r.record.x.treg = targ_reg;
2350 ptr->r.record.x.xy = xy;
2351 ptr->r.record.x.qp = predicate;
2355 /* Given a unw_rec_list process the correct format with the
2356 specified function. */
2359 process_one_record (ptr, f)
2363 unsigned long fr_mask, gr_mask;
2365 switch (ptr->r.type)
2367 /* This is a dummy record that takes up no space in the output. */
2375 /* These are taken care of by prologue/prologue_gr. */
2380 if (ptr->r.type == prologue_gr)
2381 output_R2_format (f, ptr->r.record.r.grmask,
2382 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2384 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2386 /* Output descriptor(s) for union of register spills (if any). */
2387 gr_mask = ptr->r.record.r.mask.gr_mem;
2388 fr_mask = ptr->r.record.r.mask.fr_mem;
2391 if ((fr_mask & ~0xfUL) == 0)
2392 output_P6_format (f, fr_mem, fr_mask);
2395 output_P5_format (f, gr_mask, fr_mask);
2400 output_P6_format (f, gr_mem, gr_mask);
2401 if (ptr->r.record.r.mask.br_mem)
2402 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2404 /* output imask descriptor if necessary: */
2405 if (ptr->r.record.r.mask.i)
2406 output_P4_format (f, ptr->r.record.r.mask.i,
2407 ptr->r.record.r.imask_size);
2411 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2415 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2416 ptr->r.record.p.size);
2429 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2432 output_P3_format (f, rp_br, ptr->r.record.p.br);
2435 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2443 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2452 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2462 case bspstore_sprel:
2464 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2467 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2470 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2473 as_bad ("spill_mask record unimplemented.");
2475 case priunat_when_gr:
2476 case priunat_when_mem:
2480 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2482 case priunat_psprel:
2484 case bspstore_psprel:
2486 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2489 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2492 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2496 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2499 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2500 ptr->r.record.x.reg, ptr->r.record.x.t,
2501 ptr->r.record.x.pspoff);
2504 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2505 ptr->r.record.x.reg, ptr->r.record.x.t,
2506 ptr->r.record.x.spoff);
2509 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2510 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2511 ptr->r.record.x.treg, ptr->r.record.x.t);
2513 case spill_psprel_p:
2514 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2515 ptr->r.record.x.ab, ptr->r.record.x.reg,
2516 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2519 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2520 ptr->r.record.x.ab, ptr->r.record.x.reg,
2521 ptr->r.record.x.t, ptr->r.record.x.spoff);
2524 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2525 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2526 ptr->r.record.x.xy, ptr->r.record.x.treg,
2530 as_bad ("record_type_not_valid");
2535 /* Given a unw_rec_list list, process all the records with
2536 the specified function. */
2538 process_unw_records (list, f)
2543 for (ptr = list; ptr; ptr = ptr->next)
2544 process_one_record (ptr, f);
2547 /* Determine the size of a record list in bytes. */
2549 calc_record_size (list)
2553 process_unw_records (list, count_output);
2557 /* Update IMASK bitmask to reflect the fact that one or more registers
2558 of type TYPE are saved starting at instruction with index T. If N
2559 bits are set in REGMASK, it is assumed that instructions T through
2560 T+N-1 save these registers.
2564 1: instruction saves next fp reg
2565 2: instruction saves next general reg
2566 3: instruction saves next branch reg */
2568 set_imask (region, regmask, t, type)
2569 unw_rec_list *region;
2570 unsigned long regmask;
2574 unsigned char *imask;
2575 unsigned long imask_size;
2579 imask = region->r.record.r.mask.i;
2580 imask_size = region->r.record.r.imask_size;
2583 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2584 imask = xmalloc (imask_size);
2585 memset (imask, 0, imask_size);
2587 region->r.record.r.imask_size = imask_size;
2588 region->r.record.r.mask.i = imask;
2592 pos = 2 * (3 - t % 4);
2595 if (i >= imask_size)
2597 as_bad ("Ignoring attempt to spill beyond end of region");
2601 imask[i] |= (type & 0x3) << pos;
2603 regmask &= (regmask - 1);
2613 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2614 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2615 containing FIRST_ADDR. */
2618 slot_index (slot_addr, slot_frag, first_addr, first_frag)
2619 unsigned long slot_addr;
2621 unsigned long first_addr;
2624 unsigned long index = 0;
2626 /* First time we are called, the initial address and frag are invalid. */
2627 if (first_addr == 0)
2630 /* If the two addresses are in different frags, then we need to add in
2631 the remaining size of this frag, and then the entire size of intermediate
2633 while (slot_frag != first_frag)
2635 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2639 /* We can get the final addresses only after relaxation is
2641 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2642 index += 3 * ((first_frag->fr_next->fr_address
2643 - first_frag->fr_address
2644 - first_frag->fr_fix) >> 4);
2647 /* We don't know what the final addresses will be. We try our
2648 best to estimate. */
2649 switch (first_frag->fr_type)
2655 as_fatal ("only constant space allocation is supported");
2661 /* Take alignment into account. Assume the worst case
2662 before relaxation. */
2663 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2667 if (first_frag->fr_symbol)
2669 as_fatal ("only constant offsets are supported");
2673 index += 3 * (first_frag->fr_offset >> 4);
2677 /* Add in the full size of the frag converted to instruction slots. */
2678 index += 3 * (first_frag->fr_fix >> 4);
2679 /* Subtract away the initial part before first_addr. */
2680 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2681 + ((first_addr & 0x3) - (start_addr & 0x3)));
2683 /* Move to the beginning of the next frag. */
2684 first_frag = first_frag->fr_next;
2685 first_addr = (unsigned long) &first_frag->fr_literal;
2688 /* Add in the used part of the last frag. */
2689 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2690 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2694 /* Optimize unwind record directives. */
2696 static unw_rec_list *
2697 optimize_unw_records (list)
2703 /* If the only unwind record is ".prologue" or ".prologue" followed
2704 by ".body", then we can optimize the unwind directives away. */
2705 if (list->r.type == prologue
2706 && (list->next->r.type == endp
2707 || (list->next->r.type == body && list->next->next->r.type == endp)))
2713 /* Given a complete record list, process any records which have
2714 unresolved fields, (ie length counts for a prologue). After
2715 this has been run, all necessary information should be available
2716 within each record to generate an image. */
2719 fixup_unw_records (list)
2722 unw_rec_list *ptr, *region = 0;
2723 unsigned long first_addr = 0, rlen = 0, t;
2724 fragS *first_frag = 0;
2726 for (ptr = list; ptr; ptr = ptr->next)
2728 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2729 as_bad (" Insn slot not set in unwind record.");
2730 t = slot_index (ptr->slot_number, ptr->slot_frag,
2731 first_addr, first_frag);
2732 switch (ptr->r.type)
2740 unsigned long last_addr = 0;
2741 fragS *last_frag = NULL;
2743 first_addr = ptr->slot_number;
2744 first_frag = ptr->slot_frag;
2745 /* Find either the next body/prologue start, or the end of
2746 the function, and determine the size of the region. */
2747 for (last = ptr->next; last != NULL; last = last->next)
2748 if (last->r.type == prologue || last->r.type == prologue_gr
2749 || last->r.type == body || last->r.type == endp)
2751 last_addr = last->slot_number;
2752 last_frag = last->slot_frag;
2755 size = slot_index (last_addr, last_frag, first_addr, first_frag);
2756 rlen = ptr->r.record.r.rlen = size;
2757 if (ptr->r.type == body)
2758 /* End of region. */
2765 ptr->r.record.b.t = rlen - 1 - t;
2776 case priunat_when_gr:
2777 case priunat_when_mem:
2781 ptr->r.record.p.t = t;
2789 case spill_psprel_p:
2790 ptr->r.record.x.t = t;
2796 as_bad ("frgr_mem record before region record!\n");
2799 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2800 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2801 set_imask (region, ptr->r.record.p.frmask, t, 1);
2802 set_imask (region, ptr->r.record.p.grmask, t, 2);
2807 as_bad ("fr_mem record before region record!\n");
2810 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2811 set_imask (region, ptr->r.record.p.rmask, t, 1);
2816 as_bad ("gr_mem record before region record!\n");
2819 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2820 set_imask (region, ptr->r.record.p.rmask, t, 2);
2825 as_bad ("br_mem record before region record!\n");
2828 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2829 set_imask (region, ptr->r.record.p.brmask, t, 3);
2835 as_bad ("gr_gr record before region record!\n");
2838 set_imask (region, ptr->r.record.p.grmask, t, 2);
2843 as_bad ("br_gr record before region record!\n");
2846 set_imask (region, ptr->r.record.p.brmask, t, 3);
2855 /* This function converts a rs_machine_dependent variant frag into a
2856 normal fill frag with the unwind image from the the record list. */
2858 ia64_convert_frag (fragS *frag)
2864 list = (unw_rec_list *) frag->fr_opcode;
2865 fixup_unw_records (list);
2867 len = calc_record_size (list);
2868 /* pad to pointer-size boundary. */
2869 pad = len % md.pointer_size;
2871 len += md.pointer_size - pad;
2872 /* Add 8 for the header + a pointer for the personality offset. */
2873 size = len + 8 + md.pointer_size;
2875 /* fr_var carries the max_chars that we created the fragment with.
2876 We must, of course, have allocated enough memory earlier. */
2877 assert (frag->fr_var >= size);
2879 /* Initialize the header area. fr_offset is initialized with
2880 unwind.personality_routine. */
2881 if (frag->fr_offset)
2883 if (md.flags & EF_IA_64_ABI64)
2884 flag_value = (bfd_vma) 3 << 32;
2886 /* 32-bit unwind info block. */
2887 flag_value = (bfd_vma) 0x1003 << 32;
2892 md_number_to_chars (frag->fr_literal,
2893 (((bfd_vma) 1 << 48) /* Version. */
2894 | flag_value /* U & E handler flags. */
2895 | (len / md.pointer_size)), /* Length. */
2898 /* Skip the header. */
2899 vbyte_mem_ptr = frag->fr_literal + 8;
2900 process_unw_records (list, output_vbyte_mem);
2902 /* Fill the padding bytes with zeros. */
2904 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2905 md.pointer_size - pad);
2907 frag->fr_fix += size;
2908 frag->fr_type = rs_fill;
2910 frag->fr_offset = 0;
2914 convert_expr_to_ab_reg (e, ab, regp)
2921 if (e->X_op != O_register)
2924 reg = e->X_add_number;
2925 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2928 *regp = reg - REG_GR;
2930 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2931 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2934 *regp = reg - REG_FR;
2936 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2939 *regp = reg - REG_BR;
2946 case REG_PR: *regp = 0; break;
2947 case REG_PSP: *regp = 1; break;
2948 case REG_PRIUNAT: *regp = 2; break;
2949 case REG_BR + 0: *regp = 3; break;
2950 case REG_AR + AR_BSP: *regp = 4; break;
2951 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2952 case REG_AR + AR_RNAT: *regp = 6; break;
2953 case REG_AR + AR_UNAT: *regp = 7; break;
2954 case REG_AR + AR_FPSR: *regp = 8; break;
2955 case REG_AR + AR_PFS: *regp = 9; break;
2956 case REG_AR + AR_LC: *regp = 10; break;
2966 convert_expr_to_xy_reg (e, xy, regp)
2973 if (e->X_op != O_register)
2976 reg = e->X_add_number;
2978 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2981 *regp = reg - REG_GR;
2983 else if (reg >= REG_FR && reg <= (REG_FR + 127))
2986 *regp = reg - REG_FR;
2988 else if (reg >= REG_BR && reg <= (REG_BR + 7))
2991 *regp = reg - REG_BR;
3000 int dummy ATTRIBUTE_UNUSED;
3005 radix = *input_line_pointer++;
3007 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3009 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3010 ignore_rest_of_line ();
3015 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3017 dot_special_section (which)
3020 set_section ((char *) special_section_name[which]);
3024 add_unwind_entry (ptr)
3028 unwind.tail->next = ptr;
3033 /* The current entry can in fact be a chain of unwind entries. */
3034 if (unwind.current_entry == NULL)
3035 unwind.current_entry = ptr;
3040 int dummy ATTRIBUTE_UNUSED;
3046 if (e.X_op != O_constant)
3047 as_bad ("Operand to .fframe must be a constant");
3049 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3054 int dummy ATTRIBUTE_UNUSED;
3060 reg = e.X_add_number - REG_GR;
3061 if (e.X_op == O_register && reg < 128)
3063 add_unwind_entry (output_mem_stack_v ());
3064 if (! (unwind.prologue_mask & 2))
3065 add_unwind_entry (output_psp_gr (reg));
3068 as_bad ("First operand to .vframe must be a general register");
3072 dot_vframesp (dummy)
3073 int dummy ATTRIBUTE_UNUSED;
3078 if (e.X_op == O_constant)
3080 add_unwind_entry (output_mem_stack_v ());
3081 add_unwind_entry (output_psp_sprel (e.X_add_number));
3084 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3088 dot_vframepsp (dummy)
3089 int dummy ATTRIBUTE_UNUSED;
3094 if (e.X_op == O_constant)
3096 add_unwind_entry (output_mem_stack_v ());
3097 add_unwind_entry (output_psp_sprel (e.X_add_number));
3100 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3105 int dummy ATTRIBUTE_UNUSED;
3111 sep = parse_operand (&e1);
3113 as_bad ("No second operand to .save");
3114 sep = parse_operand (&e2);
3116 reg1 = e1.X_add_number;
3117 reg2 = e2.X_add_number - REG_GR;
3119 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3120 if (e1.X_op == O_register)
3122 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3126 case REG_AR + AR_BSP:
3127 add_unwind_entry (output_bsp_when ());
3128 add_unwind_entry (output_bsp_gr (reg2));
3130 case REG_AR + AR_BSPSTORE:
3131 add_unwind_entry (output_bspstore_when ());
3132 add_unwind_entry (output_bspstore_gr (reg2));
3134 case REG_AR + AR_RNAT:
3135 add_unwind_entry (output_rnat_when ());
3136 add_unwind_entry (output_rnat_gr (reg2));
3138 case REG_AR + AR_UNAT:
3139 add_unwind_entry (output_unat_when ());
3140 add_unwind_entry (output_unat_gr (reg2));
3142 case REG_AR + AR_FPSR:
3143 add_unwind_entry (output_fpsr_when ());
3144 add_unwind_entry (output_fpsr_gr (reg2));
3146 case REG_AR + AR_PFS:
3147 add_unwind_entry (output_pfs_when ());
3148 if (! (unwind.prologue_mask & 4))
3149 add_unwind_entry (output_pfs_gr (reg2));
3151 case REG_AR + AR_LC:
3152 add_unwind_entry (output_lc_when ());
3153 add_unwind_entry (output_lc_gr (reg2));
3156 add_unwind_entry (output_rp_when ());
3157 if (! (unwind.prologue_mask & 8))
3158 add_unwind_entry (output_rp_gr (reg2));
3161 add_unwind_entry (output_preds_when ());
3162 if (! (unwind.prologue_mask & 1))
3163 add_unwind_entry (output_preds_gr (reg2));
3166 add_unwind_entry (output_priunat_when_gr ());
3167 add_unwind_entry (output_priunat_gr (reg2));
3170 as_bad ("First operand not a valid register");
3174 as_bad (" Second operand not a valid register");
3177 as_bad ("First operand not a register");
3182 int dummy ATTRIBUTE_UNUSED;
3185 unsigned long ecount; /* # of _additional_ regions to pop */
3188 sep = parse_operand (&e1);
3189 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3191 as_bad ("First operand to .restore must be stack pointer (sp)");
3197 parse_operand (&e2);
3198 if (e2.X_op != O_constant || e2.X_add_number < 0)
3200 as_bad ("Second operand to .restore must be a constant >= 0");
3203 ecount = e2.X_add_number;
3206 ecount = unwind.prologue_count - 1;
3208 if (ecount >= unwind.prologue_count)
3210 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3211 ecount + 1, unwind.prologue_count);
3215 add_unwind_entry (output_epilogue (ecount));
3217 if (ecount < unwind.prologue_count)
3218 unwind.prologue_count -= ecount + 1;
3220 unwind.prologue_count = 0;
3224 dot_restorereg (dummy)
3225 int dummy ATTRIBUTE_UNUSED;
3227 unsigned int ab, reg;
3232 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3234 as_bad ("First operand to .restorereg must be a preserved register");
3237 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3241 dot_restorereg_p (dummy)
3242 int dummy ATTRIBUTE_UNUSED;
3244 unsigned int qp, ab, reg;
3248 sep = parse_operand (&e1);
3251 as_bad ("No second operand to .restorereg.p");
3255 parse_operand (&e2);
3257 qp = e1.X_add_number - REG_P;
3258 if (e1.X_op != O_register || qp > 63)
3260 as_bad ("First operand to .restorereg.p must be a predicate");
3264 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3266 as_bad ("Second operand to .restorereg.p must be a preserved register");
3269 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3273 generate_unwind_image (text_name)
3274 const char *text_name;
3279 /* Mark the end of the unwind info, so that we can compute the size of the
3280 last unwind region. */
3281 add_unwind_entry (output_endp ());
3283 /* Force out pending instructions, to make sure all unwind records have
3284 a valid slot_number field. */
3285 ia64_flush_insns ();
3287 /* Generate the unwind record. */
3288 list = optimize_unw_records (unwind.list);
3289 fixup_unw_records (list);
3290 size = calc_record_size (list);
3292 if (size > 0 || unwind.force_unwind_entry)
3294 unwind.force_unwind_entry = 0;
3295 /* pad to pointer-size boundary. */
3296 pad = size % md.pointer_size;
3298 size += md.pointer_size - pad;
3299 /* Add 8 for the header + a pointer for the personality
3301 size += 8 + md.pointer_size;
3304 /* If there are unwind records, switch sections, and output the info. */
3309 bfd_reloc_code_real_type reloc;
3311 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name);
3312 set_section (sec_name);
3313 bfd_set_section_flags (stdoutput, now_seg,
3314 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3316 /* Make sure the section has 4 byte alignment for ILP32 and
3317 8 byte alignment for LP64. */
3318 frag_align (md.pointer_size_shift, 0, 0);
3319 record_alignment (now_seg, md.pointer_size_shift);
3321 /* Set expression which points to start of unwind descriptor area. */
3322 unwind.info = expr_build_dot ();
3324 frag_var (rs_machine_dependent, size, size, 0, 0,
3325 (offsetT) unwind.personality_routine, (char *) list);
3327 /* Add the personality address to the image. */
3328 if (unwind.personality_routine != 0)
3330 exp.X_op = O_symbol;
3331 exp.X_add_symbol = unwind.personality_routine;
3332 exp.X_add_number = 0;
3334 if (md.flags & EF_IA_64_BE)
3336 if (md.flags & EF_IA_64_ABI64)
3337 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3339 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3343 if (md.flags & EF_IA_64_ABI64)
3344 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3346 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3349 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3350 md.pointer_size, &exp, 0, reloc);
3351 unwind.personality_routine = 0;
3355 free_saved_prologue_counts ();
3356 unwind.list = unwind.tail = unwind.current_entry = NULL;
3360 dot_handlerdata (dummy)
3361 int dummy ATTRIBUTE_UNUSED;
3363 const char *text_name = segment_name (now_seg);
3365 /* If text section name starts with ".text" (which it should),
3366 strip this prefix off. */
3367 if (strcmp (text_name, ".text") == 0)
3370 unwind.force_unwind_entry = 1;
3372 /* Remember which segment we're in so we can switch back after .endp */
3373 unwind.saved_text_seg = now_seg;
3374 unwind.saved_text_subseg = now_subseg;
3376 /* Generate unwind info into unwind-info section and then leave that
3377 section as the currently active one so dataXX directives go into
3378 the language specific data area of the unwind info block. */
3379 generate_unwind_image (text_name);
3380 demand_empty_rest_of_line ();
3384 dot_unwentry (dummy)
3385 int dummy ATTRIBUTE_UNUSED;
3387 unwind.force_unwind_entry = 1;
3388 demand_empty_rest_of_line ();
3393 int dummy ATTRIBUTE_UNUSED;
3399 reg = e.X_add_number - REG_BR;
3400 if (e.X_op == O_register && reg < 8)
3401 add_unwind_entry (output_rp_br (reg));
3403 as_bad ("First operand not a valid branch register");
3407 dot_savemem (psprel)
3414 sep = parse_operand (&e1);
3416 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3417 sep = parse_operand (&e2);
3419 reg1 = e1.X_add_number;
3420 val = e2.X_add_number;
3422 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3423 if (e1.X_op == O_register)
3425 if (e2.X_op == O_constant)
3429 case REG_AR + AR_BSP:
3430 add_unwind_entry (output_bsp_when ());
3431 add_unwind_entry ((psprel
3433 : output_bsp_sprel) (val));
3435 case REG_AR + AR_BSPSTORE:
3436 add_unwind_entry (output_bspstore_when ());
3437 add_unwind_entry ((psprel
3438 ? output_bspstore_psprel
3439 : output_bspstore_sprel) (val));
3441 case REG_AR + AR_RNAT:
3442 add_unwind_entry (output_rnat_when ());
3443 add_unwind_entry ((psprel
3444 ? output_rnat_psprel
3445 : output_rnat_sprel) (val));
3447 case REG_AR + AR_UNAT:
3448 add_unwind_entry (output_unat_when ());
3449 add_unwind_entry ((psprel
3450 ? output_unat_psprel
3451 : output_unat_sprel) (val));
3453 case REG_AR + AR_FPSR:
3454 add_unwind_entry (output_fpsr_when ());
3455 add_unwind_entry ((psprel
3456 ? output_fpsr_psprel
3457 : output_fpsr_sprel) (val));
3459 case REG_AR + AR_PFS:
3460 add_unwind_entry (output_pfs_when ());
3461 add_unwind_entry ((psprel
3463 : output_pfs_sprel) (val));
3465 case REG_AR + AR_LC:
3466 add_unwind_entry (output_lc_when ());
3467 add_unwind_entry ((psprel
3469 : output_lc_sprel) (val));
3472 add_unwind_entry (output_rp_when ());
3473 add_unwind_entry ((psprel
3475 : output_rp_sprel) (val));
3478 add_unwind_entry (output_preds_when ());
3479 add_unwind_entry ((psprel
3480 ? output_preds_psprel
3481 : output_preds_sprel) (val));
3484 add_unwind_entry (output_priunat_when_mem ());
3485 add_unwind_entry ((psprel
3486 ? output_priunat_psprel
3487 : output_priunat_sprel) (val));
3490 as_bad ("First operand not a valid register");
3494 as_bad (" Second operand not a valid constant");
3497 as_bad ("First operand not a register");
3502 int dummy ATTRIBUTE_UNUSED;
3506 sep = parse_operand (&e1);
3508 parse_operand (&e2);
3510 if (e1.X_op != O_constant)
3511 as_bad ("First operand to .save.g must be a constant.");
3514 int grmask = e1.X_add_number;
3516 add_unwind_entry (output_gr_mem (grmask));
3519 int reg = e2.X_add_number - REG_GR;
3520 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3521 add_unwind_entry (output_gr_gr (grmask, reg));
3523 as_bad ("Second operand is an invalid register.");
3530 int dummy ATTRIBUTE_UNUSED;
3534 sep = parse_operand (&e1);
3536 if (e1.X_op != O_constant)
3537 as_bad ("Operand to .save.f must be a constant.");
3539 add_unwind_entry (output_fr_mem (e1.X_add_number));
3544 int dummy ATTRIBUTE_UNUSED;
3551 sep = parse_operand (&e1);
3552 if (e1.X_op != O_constant)
3554 as_bad ("First operand to .save.b must be a constant.");
3557 brmask = e1.X_add_number;
3561 sep = parse_operand (&e2);
3562 reg = e2.X_add_number - REG_GR;
3563 if (e2.X_op != O_register || reg > 127)
3565 as_bad ("Second operand to .save.b must be a general register.");
3568 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3571 add_unwind_entry (output_br_mem (brmask));
3573 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3574 ignore_rest_of_line ();
3579 int dummy ATTRIBUTE_UNUSED;
3583 sep = parse_operand (&e1);
3585 parse_operand (&e2);
3587 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3588 as_bad ("Both operands of .save.gf must be constants.");
3591 int grmask = e1.X_add_number;
3592 int frmask = e2.X_add_number;
3593 add_unwind_entry (output_frgr_mem (grmask, frmask));
3599 int dummy ATTRIBUTE_UNUSED;
3604 sep = parse_operand (&e);
3605 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3606 ignore_rest_of_line ();
3608 if (e.X_op != O_constant)
3609 as_bad ("Operand to .spill must be a constant");
3611 add_unwind_entry (output_spill_base (e.X_add_number));
3615 dot_spillreg (dummy)
3616 int dummy ATTRIBUTE_UNUSED;
3618 int sep, ab, xy, reg, treg;
3621 sep = parse_operand (&e1);
3624 as_bad ("No second operand to .spillreg");
3628 parse_operand (&e2);
3630 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3632 as_bad ("First operand to .spillreg must be a preserved register");
3636 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3638 as_bad ("Second operand to .spillreg must be a register");
3642 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3646 dot_spillmem (psprel)
3652 sep = parse_operand (&e1);
3655 as_bad ("Second operand missing");
3659 parse_operand (&e2);
3661 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3663 as_bad ("First operand to .spill%s must be a preserved register",
3664 psprel ? "psp" : "sp");
3668 if (e2.X_op != O_constant)
3670 as_bad ("Second operand to .spill%s must be a constant",
3671 psprel ? "psp" : "sp");
3676 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3678 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3682 dot_spillreg_p (dummy)
3683 int dummy ATTRIBUTE_UNUSED;
3685 int sep, ab, xy, reg, treg;
3686 expressionS e1, e2, e3;
3689 sep = parse_operand (&e1);
3692 as_bad ("No second and third operand to .spillreg.p");
3696 sep = parse_operand (&e2);
3699 as_bad ("No third operand to .spillreg.p");
3703 parse_operand (&e3);
3705 qp = e1.X_add_number - REG_P;
3707 if (e1.X_op != O_register || qp > 63)
3709 as_bad ("First operand to .spillreg.p must be a predicate");
3713 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3715 as_bad ("Second operand to .spillreg.p must be a preserved register");
3719 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3721 as_bad ("Third operand to .spillreg.p must be a register");
3725 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3729 dot_spillmem_p (psprel)
3732 expressionS e1, e2, e3;
3736 sep = parse_operand (&e1);
3739 as_bad ("Second operand missing");
3743 parse_operand (&e2);
3746 as_bad ("Second operand missing");
3750 parse_operand (&e3);
3752 qp = e1.X_add_number - REG_P;
3753 if (e1.X_op != O_register || qp > 63)
3755 as_bad ("First operand to .spill%s_p must be a predicate",
3756 psprel ? "psp" : "sp");
3760 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3762 as_bad ("Second operand to .spill%s_p must be a preserved register",
3763 psprel ? "psp" : "sp");
3767 if (e3.X_op != O_constant)
3769 as_bad ("Third operand to .spill%s_p must be a constant",
3770 psprel ? "psp" : "sp");
3775 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3777 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3781 get_saved_prologue_count (lbl)
3784 label_prologue_count *lpc = unwind.saved_prologue_counts;
3786 while (lpc != NULL && lpc->label_number != lbl)
3790 return lpc->prologue_count;
3792 as_bad ("Missing .label_state %ld", lbl);
3797 save_prologue_count (lbl, count)
3801 label_prologue_count *lpc = unwind.saved_prologue_counts;
3803 while (lpc != NULL && lpc->label_number != lbl)
3807 lpc->prologue_count = count;
3810 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3812 new_lpc->next = unwind.saved_prologue_counts;
3813 new_lpc->label_number = lbl;
3814 new_lpc->prologue_count = count;
3815 unwind.saved_prologue_counts = new_lpc;
3820 free_saved_prologue_counts ()
3822 label_prologue_count *lpc = unwind.saved_prologue_counts;
3823 label_prologue_count *next;
3832 unwind.saved_prologue_counts = NULL;
3836 dot_label_state (dummy)
3837 int dummy ATTRIBUTE_UNUSED;
3842 if (e.X_op != O_constant)
3844 as_bad ("Operand to .label_state must be a constant");
3847 add_unwind_entry (output_label_state (e.X_add_number));
3848 save_prologue_count (e.X_add_number, unwind.prologue_count);
3852 dot_copy_state (dummy)
3853 int dummy ATTRIBUTE_UNUSED;
3858 if (e.X_op != O_constant)
3860 as_bad ("Operand to .copy_state must be a constant");
3863 add_unwind_entry (output_copy_state (e.X_add_number));
3864 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3869 int dummy ATTRIBUTE_UNUSED;
3874 sep = parse_operand (&e1);
3877 as_bad ("Second operand to .unwabi missing");
3880 sep = parse_operand (&e2);
3881 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3882 ignore_rest_of_line ();
3884 if (e1.X_op != O_constant)
3886 as_bad ("First operand to .unwabi must be a constant");
3890 if (e2.X_op != O_constant)
3892 as_bad ("Second operand to .unwabi must be a constant");
3896 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
3900 dot_personality (dummy)
3901 int dummy ATTRIBUTE_UNUSED;
3905 name = input_line_pointer;
3906 c = get_symbol_end ();
3907 p = input_line_pointer;
3908 unwind.personality_routine = symbol_find_or_make (name);
3909 unwind.force_unwind_entry = 1;
3912 demand_empty_rest_of_line ();
3917 int dummy ATTRIBUTE_UNUSED;
3922 unwind.proc_start = expr_build_dot ();
3923 /* Parse names of main and alternate entry points and mark them as
3924 function symbols: */
3928 name = input_line_pointer;
3929 c = get_symbol_end ();
3930 p = input_line_pointer;
3931 sym = symbol_find_or_make (name);
3932 if (unwind.proc_start == 0)
3934 unwind.proc_start = sym;
3936 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3939 if (*input_line_pointer != ',')
3941 ++input_line_pointer;
3943 demand_empty_rest_of_line ();
3946 unwind.prologue_count = 0;
3947 unwind.list = unwind.tail = unwind.current_entry = NULL;
3948 unwind.personality_routine = 0;
3953 int dummy ATTRIBUTE_UNUSED;
3955 unwind.prologue = 0;
3956 unwind.prologue_mask = 0;
3958 add_unwind_entry (output_body ());
3959 demand_empty_rest_of_line ();
3963 dot_prologue (dummy)
3964 int dummy ATTRIBUTE_UNUSED;
3967 int mask = 0, grsave = 0;
3969 if (!is_it_end_of_statement ())
3972 sep = parse_operand (&e1);
3974 as_bad ("No second operand to .prologue");
3975 sep = parse_operand (&e2);
3976 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3977 ignore_rest_of_line ();
3979 if (e1.X_op == O_constant)
3981 mask = e1.X_add_number;
3983 if (e2.X_op == O_constant)
3984 grsave = e2.X_add_number;
3985 else if (e2.X_op == O_register
3986 && (grsave = e2.X_add_number - REG_GR) < 128)
3989 as_bad ("Second operand not a constant or general register");
3991 add_unwind_entry (output_prologue_gr (mask, grsave));
3994 as_bad ("First operand not a constant");
3997 add_unwind_entry (output_prologue ());
3999 unwind.prologue = 1;
4000 unwind.prologue_mask = mask;
4001 ++unwind.prologue_count;
4006 int dummy ATTRIBUTE_UNUSED;
4010 int bytes_per_address;
4013 subsegT saved_subseg;
4014 const char *sec_name, *text_name;
4018 if (unwind.saved_text_seg)
4020 saved_seg = unwind.saved_text_seg;
4021 saved_subseg = unwind.saved_text_subseg;
4022 unwind.saved_text_seg = NULL;
4026 saved_seg = now_seg;
4027 saved_subseg = now_subseg;
4031 Use a slightly ugly scheme to derive the unwind section names from
4032 the text section name:
4034 text sect. unwind table sect.
4035 name: name: comments:
4036 ---------- ----------------- --------------------------------
4038 .text.foo .IA_64.unwind.text.foo
4039 .foo .IA_64.unwind.foo
4041 .gnu.linkonce.ia64unw.foo
4042 _info .IA_64.unwind_info gas issues error message (ditto)
4043 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4045 This mapping is done so that:
4047 (a) An object file with unwind info only in .text will use
4048 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4049 This follows the letter of the ABI and also ensures backwards
4050 compatibility with older toolchains.
4052 (b) An object file with unwind info in multiple text sections
4053 will use separate unwind sections for each text section.
4054 This allows us to properly set the "sh_info" and "sh_link"
4055 fields in SHT_IA_64_UNWIND as required by the ABI and also
4056 lets GNU ld support programs with multiple segments
4057 containing unwind info (as might be the case for certain
4058 embedded applications).
4060 (c) An error is issued if there would be a name clash.
4062 text_name = segment_name (saved_seg);
4063 if (strncmp (text_name, "_info", 5) == 0)
4065 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4067 ignore_rest_of_line ();
4070 if (strcmp (text_name, ".text") == 0)
4073 insn_group_break (1, 0, 0);
4075 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4077 generate_unwind_image (text_name);
4079 if (unwind.info || unwind.force_unwind_entry)
4081 subseg_set (md.last_text_seg, 0);
4082 unwind.proc_end = expr_build_dot ();
4084 make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name);
4085 set_section ((char *) sec_name);
4086 bfd_set_section_flags (stdoutput, now_seg,
4087 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
4089 /* Make sure that section has 4 byte alignment for ILP32 and
4090 8 byte alignment for LP64. */
4091 record_alignment (now_seg, md.pointer_size_shift);
4093 /* Need space for 3 pointers for procedure start, procedure end,
4095 ptr = frag_more (3 * md.pointer_size);
4096 where = frag_now_fix () - (3 * md.pointer_size);
4097 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4099 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4100 e.X_op = O_pseudo_fixup;
4101 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4103 e.X_add_symbol = unwind.proc_start;
4104 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4106 e.X_op = O_pseudo_fixup;
4107 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4109 e.X_add_symbol = unwind.proc_end;
4110 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4111 bytes_per_address, &e);
4115 e.X_op = O_pseudo_fixup;
4116 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4118 e.X_add_symbol = unwind.info;
4119 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4120 bytes_per_address, &e);
4123 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4127 subseg_set (saved_seg, saved_subseg);
4129 /* Parse names of main and alternate entry points and set symbol sizes. */
4133 name = input_line_pointer;
4134 c = get_symbol_end ();
4135 p = input_line_pointer;
4136 sym = symbol_find (name);
4137 if (sym && unwind.proc_start
4138 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4139 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4141 fragS *fr = symbol_get_frag (unwind.proc_start);
4142 fragS *frag = symbol_get_frag (sym);
4144 /* Check whether the function label is at or beyond last
4146 while (fr && fr != frag)
4150 if (frag == frag_now && SEG_NORMAL (now_seg))
4151 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4154 symbol_get_obj (sym)->size =
4155 (expressionS *) xmalloc (sizeof (expressionS));
4156 symbol_get_obj (sym)->size->X_op = O_subtract;
4157 symbol_get_obj (sym)->size->X_add_symbol
4158 = symbol_new (FAKE_LABEL_NAME, now_seg,
4159 frag_now_fix (), frag_now);
4160 symbol_get_obj (sym)->size->X_op_symbol = sym;
4161 symbol_get_obj (sym)->size->X_add_number = 0;
4167 if (*input_line_pointer != ',')
4169 ++input_line_pointer;
4171 demand_empty_rest_of_line ();
4172 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4176 dot_template (template)
4179 CURR_SLOT.user_template = template;
4184 int dummy ATTRIBUTE_UNUSED;
4186 int ins, locs, outs, rots;
4188 if (is_it_end_of_statement ())
4189 ins = locs = outs = rots = 0;
4192 ins = get_absolute_expression ();
4193 if (*input_line_pointer++ != ',')
4195 locs = get_absolute_expression ();
4196 if (*input_line_pointer++ != ',')
4198 outs = get_absolute_expression ();
4199 if (*input_line_pointer++ != ',')
4201 rots = get_absolute_expression ();
4203 set_regstack (ins, locs, outs, rots);
4207 as_bad ("Comma expected");
4208 ignore_rest_of_line ();
4215 unsigned num_regs, num_alloced = 0;
4216 struct dynreg **drpp, *dr;
4217 int ch, base_reg = 0;
4223 case DYNREG_GR: base_reg = REG_GR + 32; break;
4224 case DYNREG_FR: base_reg = REG_FR + 32; break;
4225 case DYNREG_PR: base_reg = REG_P + 16; break;
4229 /* First, remove existing names from hash table. */
4230 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4232 hash_delete (md.dynreg_hash, dr->name);
4236 drpp = &md.dynreg[type];
4239 start = input_line_pointer;
4240 ch = get_symbol_end ();
4241 *input_line_pointer = ch;
4242 len = (input_line_pointer - start);
4245 if (*input_line_pointer != '[')
4247 as_bad ("Expected '['");
4250 ++input_line_pointer; /* skip '[' */
4252 num_regs = get_absolute_expression ();
4254 if (*input_line_pointer++ != ']')
4256 as_bad ("Expected ']'");
4261 num_alloced += num_regs;
4265 if (num_alloced > md.rot.num_regs)
4267 as_bad ("Used more than the declared %d rotating registers",
4273 if (num_alloced > 96)
4275 as_bad ("Used more than the available 96 rotating registers");
4280 if (num_alloced > 48)
4282 as_bad ("Used more than the available 48 rotating registers");
4291 name = obstack_alloc (¬es, len + 1);
4292 memcpy (name, start, len);
4297 *drpp = obstack_alloc (¬es, sizeof (*dr));
4298 memset (*drpp, 0, sizeof (*dr));
4303 dr->num_regs = num_regs;
4304 dr->base = base_reg;
4306 base_reg += num_regs;
4308 if (hash_insert (md.dynreg_hash, name, dr))
4310 as_bad ("Attempt to redefine register set `%s'", name);
4314 if (*input_line_pointer != ',')
4316 ++input_line_pointer; /* skip comma */
4319 demand_empty_rest_of_line ();
4323 ignore_rest_of_line ();
4327 dot_byteorder (byteorder)
4330 segment_info_type *seginfo = seg_info (now_seg);
4332 if (byteorder == -1)
4334 if (seginfo->tc_segment_info_data.endian == 0)
4335 seginfo->tc_segment_info_data.endian
4336 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4337 byteorder = seginfo->tc_segment_info_data.endian == 1;
4340 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4342 if (target_big_endian != byteorder)
4344 target_big_endian = byteorder;
4345 if (target_big_endian)
4347 ia64_number_to_chars = number_to_chars_bigendian;
4348 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4352 ia64_number_to_chars = number_to_chars_littleendian;
4353 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4360 int dummy ATTRIBUTE_UNUSED;
4367 option = input_line_pointer;
4368 ch = get_symbol_end ();
4369 if (strcmp (option, "lsb") == 0)
4370 md.flags &= ~EF_IA_64_BE;
4371 else if (strcmp (option, "msb") == 0)
4372 md.flags |= EF_IA_64_BE;
4373 else if (strcmp (option, "abi32") == 0)
4374 md.flags &= ~EF_IA_64_ABI64;
4375 else if (strcmp (option, "abi64") == 0)
4376 md.flags |= EF_IA_64_ABI64;
4378 as_bad ("Unknown psr option `%s'", option);
4379 *input_line_pointer = ch;
4382 if (*input_line_pointer != ',')
4385 ++input_line_pointer;
4388 demand_empty_rest_of_line ();
4393 int dummy ATTRIBUTE_UNUSED;
4395 new_logical_line (0, get_absolute_expression ());
4396 demand_empty_rest_of_line ();
4400 parse_section_name ()
4406 if (*input_line_pointer != '"')
4408 as_bad ("Missing section name");
4409 ignore_rest_of_line ();
4412 name = demand_copy_C_string (&len);
4415 ignore_rest_of_line ();
4419 if (*input_line_pointer != ',')
4421 as_bad ("Comma expected after section name");
4422 ignore_rest_of_line ();
4425 ++input_line_pointer; /* skip comma */
4433 char *name = parse_section_name ();
4437 md.keep_pending_output = 1;
4440 obj_elf_previous (0);
4441 md.keep_pending_output = 0;
4444 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4447 stmt_float_cons (kind)
4468 ia64_do_align (alignment);
4476 int saved_auto_align = md.auto_align;
4480 md.auto_align = saved_auto_align;
4484 dot_xfloat_cons (kind)
4487 char *name = parse_section_name ();
4491 md.keep_pending_output = 1;
4493 stmt_float_cons (kind);
4494 obj_elf_previous (0);
4495 md.keep_pending_output = 0;
4499 dot_xstringer (zero)
4502 char *name = parse_section_name ();
4506 md.keep_pending_output = 1;
4509 obj_elf_previous (0);
4510 md.keep_pending_output = 0;
4517 int saved_auto_align = md.auto_align;
4518 char *name = parse_section_name ();
4522 md.keep_pending_output = 1;
4526 md.auto_align = saved_auto_align;
4527 obj_elf_previous (0);
4528 md.keep_pending_output = 0;
4532 dot_xfloat_cons_ua (kind)
4535 int saved_auto_align = md.auto_align;
4536 char *name = parse_section_name ();
4540 md.keep_pending_output = 1;
4543 stmt_float_cons (kind);
4544 md.auto_align = saved_auto_align;
4545 obj_elf_previous (0);
4546 md.keep_pending_output = 0;
4549 /* .reg.val <regname>,value */
4553 int dummy ATTRIBUTE_UNUSED;
4558 if (reg.X_op != O_register)
4560 as_bad (_("Register name expected"));
4561 ignore_rest_of_line ();
4563 else if (*input_line_pointer++ != ',')
4565 as_bad (_("Comma expected"));
4566 ignore_rest_of_line ();
4570 valueT value = get_absolute_expression ();
4571 int regno = reg.X_add_number;
4572 if (regno < REG_GR || regno > REG_GR + 128)
4573 as_warn (_("Register value annotation ignored"));
4576 gr_values[regno - REG_GR].known = 1;
4577 gr_values[regno - REG_GR].value = value;
4578 gr_values[regno - REG_GR].path = md.path;
4581 demand_empty_rest_of_line ();
4584 /* select dv checking mode
4589 A stop is inserted when changing modes
4596 if (md.manual_bundling)
4597 as_warn (_("Directive invalid within a bundle"));
4599 if (type == 'E' || type == 'A')
4600 md.mode_explicitly_set = 0;
4602 md.mode_explicitly_set = 1;
4609 if (md.explicit_mode)
4610 insn_group_break (1, 0, 0);
4611 md.explicit_mode = 0;
4615 if (!md.explicit_mode)
4616 insn_group_break (1, 0, 0);
4617 md.explicit_mode = 1;
4621 if (md.explicit_mode != md.default_explicit_mode)
4622 insn_group_break (1, 0, 0);
4623 md.explicit_mode = md.default_explicit_mode;
4624 md.mode_explicitly_set = 0;
4635 for (regno = 0; regno < 64; regno++)
4637 if (mask & ((valueT) 1 << regno))
4639 fprintf (stderr, "%s p%d", comma, regno);
4646 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4647 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4648 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4649 .pred.safe_across_calls p1 [, p2 [,...]]
4658 int p1 = -1, p2 = -1;
4662 if (*input_line_pointer != '"')
4664 as_bad (_("Missing predicate relation type"));
4665 ignore_rest_of_line ();
4671 char *form = demand_copy_C_string (&len);
4672 if (strcmp (form, "mutex") == 0)
4674 else if (strcmp (form, "clear") == 0)
4676 else if (strcmp (form, "imply") == 0)
4680 as_bad (_("Unrecognized predicate relation type"));
4681 ignore_rest_of_line ();
4685 if (*input_line_pointer == ',')
4686 ++input_line_pointer;
4696 if (TOUPPER (*input_line_pointer) != 'P'
4697 || (regno = atoi (++input_line_pointer)) < 0
4700 as_bad (_("Predicate register expected"));
4701 ignore_rest_of_line ();
4704 while (ISDIGIT (*input_line_pointer))
4705 ++input_line_pointer;
4712 as_warn (_("Duplicate predicate register ignored"));
4715 /* See if it's a range. */
4716 if (*input_line_pointer == '-')
4719 ++input_line_pointer;
4721 if (TOUPPER (*input_line_pointer) != 'P'
4722 || (regno = atoi (++input_line_pointer)) < 0
4725 as_bad (_("Predicate register expected"));
4726 ignore_rest_of_line ();
4729 while (ISDIGIT (*input_line_pointer))
4730 ++input_line_pointer;
4734 as_bad (_("Bad register range"));
4735 ignore_rest_of_line ();
4746 if (*input_line_pointer != ',')
4748 ++input_line_pointer;
4757 clear_qp_mutex (mask);
4758 clear_qp_implies (mask, (valueT) 0);
4761 if (count != 2 || p1 == -1 || p2 == -1)
4762 as_bad (_("Predicate source and target required"));
4763 else if (p1 == 0 || p2 == 0)
4764 as_bad (_("Use of p0 is not valid in this context"));
4766 add_qp_imply (p1, p2);
4771 as_bad (_("At least two PR arguments expected"));
4776 as_bad (_("Use of p0 is not valid in this context"));
4779 add_qp_mutex (mask);
4782 /* note that we don't override any existing relations */
4785 as_bad (_("At least one PR argument expected"));
4790 fprintf (stderr, "Safe across calls: ");
4791 print_prmask (mask);
4792 fprintf (stderr, "\n");
4794 qp_safe_across_calls = mask;
4797 demand_empty_rest_of_line ();
4800 /* .entry label [, label [, ...]]
4801 Hint to DV code that the given labels are to be considered entry points.
4802 Otherwise, only global labels are considered entry points. */
4806 int dummy ATTRIBUTE_UNUSED;
4815 name = input_line_pointer;
4816 c = get_symbol_end ();
4817 symbolP = symbol_find_or_make (name);
4819 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4821 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4824 *input_line_pointer = c;
4826 c = *input_line_pointer;
4829 input_line_pointer++;
4831 if (*input_line_pointer == '\n')
4837 demand_empty_rest_of_line ();
4840 /* .mem.offset offset, base
4841 "base" is used to distinguish between offsets from a different base. */
4844 dot_mem_offset (dummy)
4845 int dummy ATTRIBUTE_UNUSED;
4847 md.mem_offset.hint = 1;
4848 md.mem_offset.offset = get_absolute_expression ();
4849 if (*input_line_pointer != ',')
4851 as_bad (_("Comma expected"));
4852 ignore_rest_of_line ();
4855 ++input_line_pointer;
4856 md.mem_offset.base = get_absolute_expression ();
4857 demand_empty_rest_of_line ();
4860 /* ia64-specific pseudo-ops: */
4861 const pseudo_typeS md_pseudo_table[] =
4863 { "radix", dot_radix, 0 },
4864 { "lcomm", s_lcomm_bytes, 1 },
4865 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4866 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4867 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4868 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4869 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4870 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4871 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4872 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4873 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4874 { "proc", dot_proc, 0 },
4875 { "body", dot_body, 0 },
4876 { "prologue", dot_prologue, 0 },
4877 { "endp", dot_endp, 0 },
4879 { "fframe", dot_fframe, 0 },
4880 { "vframe", dot_vframe, 0 },
4881 { "vframesp", dot_vframesp, 0 },
4882 { "vframepsp", dot_vframepsp, 0 },
4883 { "save", dot_save, 0 },
4884 { "restore", dot_restore, 0 },
4885 { "restorereg", dot_restorereg, 0 },
4886 { "restorereg.p", dot_restorereg_p, 0 },
4887 { "handlerdata", dot_handlerdata, 0 },
4888 { "unwentry", dot_unwentry, 0 },
4889 { "altrp", dot_altrp, 0 },
4890 { "savesp", dot_savemem, 0 },
4891 { "savepsp", dot_savemem, 1 },
4892 { "save.g", dot_saveg, 0 },
4893 { "save.f", dot_savef, 0 },
4894 { "save.b", dot_saveb, 0 },
4895 { "save.gf", dot_savegf, 0 },
4896 { "spill", dot_spill, 0 },
4897 { "spillreg", dot_spillreg, 0 },
4898 { "spillsp", dot_spillmem, 0 },
4899 { "spillpsp", dot_spillmem, 1 },
4900 { "spillreg.p", dot_spillreg_p, 0 },
4901 { "spillsp.p", dot_spillmem_p, 0 },
4902 { "spillpsp.p", dot_spillmem_p, 1 },
4903 { "label_state", dot_label_state, 0 },
4904 { "copy_state", dot_copy_state, 0 },
4905 { "unwabi", dot_unwabi, 0 },
4906 { "personality", dot_personality, 0 },
4908 { "estate", dot_estate, 0 },
4910 { "mii", dot_template, 0x0 },
4911 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
4912 { "mlx", dot_template, 0x2 },
4913 { "mmi", dot_template, 0x4 },
4914 { "mfi", dot_template, 0x6 },
4915 { "mmf", dot_template, 0x7 },
4916 { "mib", dot_template, 0x8 },
4917 { "mbb", dot_template, 0x9 },
4918 { "bbb", dot_template, 0xb },
4919 { "mmb", dot_template, 0xc },
4920 { "mfb", dot_template, 0xe },
4922 { "lb", dot_scope, 0 },
4923 { "le", dot_scope, 1 },
4925 { "align", s_align_bytes, 0 },
4926 { "regstk", dot_regstk, 0 },
4927 { "rotr", dot_rot, DYNREG_GR },
4928 { "rotf", dot_rot, DYNREG_FR },
4929 { "rotp", dot_rot, DYNREG_PR },
4930 { "lsb", dot_byteorder, 0 },
4931 { "msb", dot_byteorder, 1 },
4932 { "psr", dot_psr, 0 },
4933 { "alias", dot_alias, 0 },
4934 { "secalias", dot_alias, 1 },
4935 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
4937 { "xdata1", dot_xdata, 1 },
4938 { "xdata2", dot_xdata, 2 },
4939 { "xdata4", dot_xdata, 4 },
4940 { "xdata8", dot_xdata, 8 },
4941 { "xreal4", dot_xfloat_cons, 'f' },
4942 { "xreal8", dot_xfloat_cons, 'd' },
4943 { "xreal10", dot_xfloat_cons, 'x' },
4944 { "xreal16", dot_xfloat_cons, 'X' },
4945 { "xstring", dot_xstringer, 0 },
4946 { "xstringz", dot_xstringer, 1 },
4948 /* unaligned versions: */
4949 { "xdata2.ua", dot_xdata_ua, 2 },
4950 { "xdata4.ua", dot_xdata_ua, 4 },
4951 { "xdata8.ua", dot_xdata_ua, 8 },
4952 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
4953 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
4954 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
4955 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
4957 /* annotations/DV checking support */
4958 { "entry", dot_entry, 0 },
4959 { "mem.offset", dot_mem_offset, 0 },
4960 { "pred.rel", dot_pred_rel, 0 },
4961 { "pred.rel.clear", dot_pred_rel, 'c' },
4962 { "pred.rel.imply", dot_pred_rel, 'i' },
4963 { "pred.rel.mutex", dot_pred_rel, 'm' },
4964 { "pred.safe_across_calls", dot_pred_rel, 's' },
4965 { "reg.val", dot_reg_val, 0 },
4966 { "auto", dot_dv_mode, 'a' },
4967 { "explicit", dot_dv_mode, 'e' },
4968 { "default", dot_dv_mode, 'd' },
4970 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4971 IA-64 aligns data allocation pseudo-ops by default, so we have to
4972 tell it that these ones are supposed to be unaligned. Long term,
4973 should rewrite so that only IA-64 specific data allocation pseudo-ops
4974 are aligned by default. */
4975 {"2byte", stmt_cons_ua, 2},
4976 {"4byte", stmt_cons_ua, 4},
4977 {"8byte", stmt_cons_ua, 8},
4982 static const struct pseudo_opcode
4985 void (*handler) (int);
4990 /* these are more like pseudo-ops, but don't start with a dot */
4991 { "data1", cons, 1 },
4992 { "data2", cons, 2 },
4993 { "data4", cons, 4 },
4994 { "data8", cons, 8 },
4995 { "data16", cons, 16 },
4996 { "real4", stmt_float_cons, 'f' },
4997 { "real8", stmt_float_cons, 'd' },
4998 { "real10", stmt_float_cons, 'x' },
4999 { "real16", stmt_float_cons, 'X' },
5000 { "string", stringer, 0 },
5001 { "stringz", stringer, 1 },
5003 /* unaligned versions: */
5004 { "data2.ua", stmt_cons_ua, 2 },
5005 { "data4.ua", stmt_cons_ua, 4 },
5006 { "data8.ua", stmt_cons_ua, 8 },
5007 { "data16.ua", stmt_cons_ua, 16 },
5008 { "real4.ua", float_cons, 'f' },
5009 { "real8.ua", float_cons, 'd' },
5010 { "real10.ua", float_cons, 'x' },
5011 { "real16.ua", float_cons, 'X' },
5014 /* Declare a register by creating a symbol for it and entering it in
5015 the symbol table. */
5018 declare_register (name, regnum)
5025 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5027 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5029 as_fatal ("Inserting \"%s\" into register table failed: %s",
5036 declare_register_set (prefix, num_regs, base_regnum)
5044 for (i = 0; i < num_regs; ++i)
5046 sprintf (name, "%s%u", prefix, i);
5047 declare_register (name, base_regnum + i);
5052 operand_width (opnd)
5053 enum ia64_opnd opnd;
5055 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5056 unsigned int bits = 0;
5060 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5061 bits += odesc->field[i].bits;
5066 static enum operand_match_result
5067 operand_match (idesc, index, e)
5068 const struct ia64_opcode *idesc;
5072 enum ia64_opnd opnd = idesc->operands[index];
5073 int bits, relocatable = 0;
5074 struct insn_fix *fix;
5081 case IA64_OPND_AR_CCV:
5082 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5083 return OPERAND_MATCH;
5086 case IA64_OPND_AR_CSD:
5087 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5088 return OPERAND_MATCH;
5091 case IA64_OPND_AR_PFS:
5092 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5093 return OPERAND_MATCH;
5097 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5098 return OPERAND_MATCH;
5102 if (e->X_op == O_register && e->X_add_number == REG_IP)
5103 return OPERAND_MATCH;
5107 if (e->X_op == O_register && e->X_add_number == REG_PR)
5108 return OPERAND_MATCH;
5111 case IA64_OPND_PR_ROT:
5112 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5113 return OPERAND_MATCH;
5117 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5118 return OPERAND_MATCH;
5121 case IA64_OPND_PSR_L:
5122 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5123 return OPERAND_MATCH;
5126 case IA64_OPND_PSR_UM:
5127 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5128 return OPERAND_MATCH;
5132 if (e->X_op == O_constant)
5134 if (e->X_add_number == 1)
5135 return OPERAND_MATCH;
5137 return OPERAND_OUT_OF_RANGE;
5142 if (e->X_op == O_constant)
5144 if (e->X_add_number == 8)
5145 return OPERAND_MATCH;
5147 return OPERAND_OUT_OF_RANGE;
5152 if (e->X_op == O_constant)
5154 if (e->X_add_number == 16)
5155 return OPERAND_MATCH;
5157 return OPERAND_OUT_OF_RANGE;
5161 /* register operands: */
5164 if (e->X_op == O_register && e->X_add_number >= REG_AR
5165 && e->X_add_number < REG_AR + 128)
5166 return OPERAND_MATCH;
5171 if (e->X_op == O_register && e->X_add_number >= REG_BR
5172 && e->X_add_number < REG_BR + 8)
5173 return OPERAND_MATCH;
5177 if (e->X_op == O_register && e->X_add_number >= REG_CR
5178 && e->X_add_number < REG_CR + 128)
5179 return OPERAND_MATCH;
5186 if (e->X_op == O_register && e->X_add_number >= REG_FR
5187 && e->X_add_number < REG_FR + 128)
5188 return OPERAND_MATCH;
5193 if (e->X_op == O_register && e->X_add_number >= REG_P
5194 && e->X_add_number < REG_P + 64)
5195 return OPERAND_MATCH;
5201 if (e->X_op == O_register && e->X_add_number >= REG_GR
5202 && e->X_add_number < REG_GR + 128)
5203 return OPERAND_MATCH;
5206 case IA64_OPND_R3_2:
5207 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5209 if (e->X_add_number < REG_GR + 4)
5210 return OPERAND_MATCH;
5211 else if (e->X_add_number < REG_GR + 128)
5212 return OPERAND_OUT_OF_RANGE;
5216 /* indirect operands: */
5217 case IA64_OPND_CPUID_R3:
5218 case IA64_OPND_DBR_R3:
5219 case IA64_OPND_DTR_R3:
5220 case IA64_OPND_ITR_R3:
5221 case IA64_OPND_IBR_R3:
5222 case IA64_OPND_MSR_R3:
5223 case IA64_OPND_PKR_R3:
5224 case IA64_OPND_PMC_R3:
5225 case IA64_OPND_PMD_R3:
5226 case IA64_OPND_RR_R3:
5227 if (e->X_op == O_index && e->X_op_symbol
5228 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5229 == opnd - IA64_OPND_CPUID_R3))
5230 return OPERAND_MATCH;
5234 if (e->X_op == O_index && !e->X_op_symbol)
5235 return OPERAND_MATCH;
5238 /* immediate operands: */
5239 case IA64_OPND_CNT2a:
5240 case IA64_OPND_LEN4:
5241 case IA64_OPND_LEN6:
5242 bits = operand_width (idesc->operands[index]);
5243 if (e->X_op == O_constant)
5245 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5246 return OPERAND_MATCH;
5248 return OPERAND_OUT_OF_RANGE;
5252 case IA64_OPND_CNT2b:
5253 if (e->X_op == O_constant)
5255 if ((bfd_vma) (e->X_add_number - 1) < 3)
5256 return OPERAND_MATCH;
5258 return OPERAND_OUT_OF_RANGE;
5262 case IA64_OPND_CNT2c:
5263 val = e->X_add_number;
5264 if (e->X_op == O_constant)
5266 if ((val == 0 || val == 7 || val == 15 || val == 16))
5267 return OPERAND_MATCH;
5269 return OPERAND_OUT_OF_RANGE;
5274 /* SOR must be an integer multiple of 8 */
5275 if (e->X_op == O_constant && e->X_add_number & 0x7)
5276 return OPERAND_OUT_OF_RANGE;
5279 if (e->X_op == O_constant)
5281 if ((bfd_vma) e->X_add_number <= 96)
5282 return OPERAND_MATCH;
5284 return OPERAND_OUT_OF_RANGE;
5288 case IA64_OPND_IMMU62:
5289 if (e->X_op == O_constant)
5291 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5292 return OPERAND_MATCH;
5294 return OPERAND_OUT_OF_RANGE;
5298 /* FIXME -- need 62-bit relocation type */
5299 as_bad (_("62-bit relocation not yet implemented"));
5303 case IA64_OPND_IMMU64:
5304 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5305 || e->X_op == O_subtract)
5307 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5308 fix->code = BFD_RELOC_IA64_IMM64;
5309 if (e->X_op != O_subtract)
5311 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5312 if (e->X_op == O_pseudo_fixup)
5316 fix->opnd = idesc->operands[index];
5319 ++CURR_SLOT.num_fixups;
5320 return OPERAND_MATCH;
5322 else if (e->X_op == O_constant)
5323 return OPERAND_MATCH;
5326 case IA64_OPND_CCNT5:
5327 case IA64_OPND_CNT5:
5328 case IA64_OPND_CNT6:
5329 case IA64_OPND_CPOS6a:
5330 case IA64_OPND_CPOS6b:
5331 case IA64_OPND_CPOS6c:
5332 case IA64_OPND_IMMU2:
5333 case IA64_OPND_IMMU7a:
5334 case IA64_OPND_IMMU7b:
5335 case IA64_OPND_IMMU21:
5336 case IA64_OPND_IMMU24:
5337 case IA64_OPND_MBTYPE4:
5338 case IA64_OPND_MHTYPE8:
5339 case IA64_OPND_POS6:
5340 bits = operand_width (idesc->operands[index]);
5341 if (e->X_op == O_constant)
5343 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5344 return OPERAND_MATCH;
5346 return OPERAND_OUT_OF_RANGE;
5350 case IA64_OPND_IMMU9:
5351 bits = operand_width (idesc->operands[index]);
5352 if (e->X_op == O_constant)
5354 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5356 int lobits = e->X_add_number & 0x3;
5357 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5358 e->X_add_number |= (bfd_vma) 0x3;
5359 return OPERAND_MATCH;
5362 return OPERAND_OUT_OF_RANGE;
5366 case IA64_OPND_IMM44:
5367 /* least 16 bits must be zero */
5368 if ((e->X_add_number & 0xffff) != 0)
5369 /* XXX technically, this is wrong: we should not be issuing warning
5370 messages until we're sure this instruction pattern is going to
5372 as_warn (_("lower 16 bits of mask ignored"));
5374 if (e->X_op == O_constant)
5376 if (((e->X_add_number >= 0
5377 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5378 || (e->X_add_number < 0
5379 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5382 if (e->X_add_number >= 0
5383 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5385 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5387 return OPERAND_MATCH;
5390 return OPERAND_OUT_OF_RANGE;
5394 case IA64_OPND_IMM17:
5395 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5396 if (e->X_op == O_constant)
5398 if (((e->X_add_number >= 0
5399 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5400 || (e->X_add_number < 0
5401 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5404 if (e->X_add_number >= 0
5405 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5407 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5409 return OPERAND_MATCH;
5412 return OPERAND_OUT_OF_RANGE;
5416 case IA64_OPND_IMM14:
5417 case IA64_OPND_IMM22:
5419 case IA64_OPND_IMM1:
5420 case IA64_OPND_IMM8:
5421 case IA64_OPND_IMM8U4:
5422 case IA64_OPND_IMM8M1:
5423 case IA64_OPND_IMM8M1U4:
5424 case IA64_OPND_IMM8M1U8:
5425 case IA64_OPND_IMM9a:
5426 case IA64_OPND_IMM9b:
5427 bits = operand_width (idesc->operands[index]);
5428 if (relocatable && (e->X_op == O_symbol
5429 || e->X_op == O_subtract
5430 || e->X_op == O_pseudo_fixup))
5432 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5434 if (idesc->operands[index] == IA64_OPND_IMM14)
5435 fix->code = BFD_RELOC_IA64_IMM14;
5437 fix->code = BFD_RELOC_IA64_IMM22;
5439 if (e->X_op != O_subtract)
5441 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5442 if (e->X_op == O_pseudo_fixup)
5446 fix->opnd = idesc->operands[index];
5449 ++CURR_SLOT.num_fixups;
5450 return OPERAND_MATCH;
5452 else if (e->X_op != O_constant
5453 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5454 return OPERAND_MISMATCH;
5456 if (opnd == IA64_OPND_IMM8M1U4)
5458 /* Zero is not valid for unsigned compares that take an adjusted
5459 constant immediate range. */
5460 if (e->X_add_number == 0)
5461 return OPERAND_OUT_OF_RANGE;
5463 /* Sign-extend 32-bit unsigned numbers, so that the following range
5464 checks will work. */
5465 val = e->X_add_number;
5466 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5467 && ((val & ((bfd_vma) 1 << 31)) != 0))
5468 val = ((val << 32) >> 32);
5470 /* Check for 0x100000000. This is valid because
5471 0x100000000-1 is the same as ((uint32_t) -1). */
5472 if (val == ((bfd_signed_vma) 1 << 32))
5473 return OPERAND_MATCH;
5477 else if (opnd == IA64_OPND_IMM8M1U8)
5479 /* Zero is not valid for unsigned compares that take an adjusted
5480 constant immediate range. */
5481 if (e->X_add_number == 0)
5482 return OPERAND_OUT_OF_RANGE;
5484 /* Check for 0x10000000000000000. */
5485 if (e->X_op == O_big)
5487 if (generic_bignum[0] == 0
5488 && generic_bignum[1] == 0
5489 && generic_bignum[2] == 0
5490 && generic_bignum[3] == 0
5491 && generic_bignum[4] == 1)
5492 return OPERAND_MATCH;
5494 return OPERAND_OUT_OF_RANGE;
5497 val = e->X_add_number - 1;
5499 else if (opnd == IA64_OPND_IMM8M1)
5500 val = e->X_add_number - 1;
5501 else if (opnd == IA64_OPND_IMM8U4)
5503 /* Sign-extend 32-bit unsigned numbers, so that the following range
5504 checks will work. */
5505 val = e->X_add_number;
5506 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5507 && ((val & ((bfd_vma) 1 << 31)) != 0))
5508 val = ((val << 32) >> 32);
5511 val = e->X_add_number;
5513 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5514 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5515 return OPERAND_MATCH;
5517 return OPERAND_OUT_OF_RANGE;
5519 case IA64_OPND_INC3:
5520 /* +/- 1, 4, 8, 16 */
5521 val = e->X_add_number;
5524 if (e->X_op == O_constant)
5526 if ((val == 1 || val == 4 || val == 8 || val == 16))
5527 return OPERAND_MATCH;
5529 return OPERAND_OUT_OF_RANGE;
5533 case IA64_OPND_TGT25:
5534 case IA64_OPND_TGT25b:
5535 case IA64_OPND_TGT25c:
5536 case IA64_OPND_TGT64:
5537 if (e->X_op == O_symbol)
5539 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5540 if (opnd == IA64_OPND_TGT25)
5541 fix->code = BFD_RELOC_IA64_PCREL21F;
5542 else if (opnd == IA64_OPND_TGT25b)
5543 fix->code = BFD_RELOC_IA64_PCREL21M;
5544 else if (opnd == IA64_OPND_TGT25c)
5545 fix->code = BFD_RELOC_IA64_PCREL21B;
5546 else if (opnd == IA64_OPND_TGT64)
5547 fix->code = BFD_RELOC_IA64_PCREL60B;
5551 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5552 fix->opnd = idesc->operands[index];
5555 ++CURR_SLOT.num_fixups;
5556 return OPERAND_MATCH;
5558 case IA64_OPND_TAG13:
5559 case IA64_OPND_TAG13b:
5563 return OPERAND_MATCH;
5566 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5567 /* There are no external relocs for TAG13/TAG13b fields, so we
5568 create a dummy reloc. This will not live past md_apply_fix3. */
5569 fix->code = BFD_RELOC_UNUSED;
5570 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5571 fix->opnd = idesc->operands[index];
5574 ++CURR_SLOT.num_fixups;
5575 return OPERAND_MATCH;
5582 case IA64_OPND_LDXMOV:
5583 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5584 fix->code = BFD_RELOC_IA64_LDXMOV;
5585 fix->opnd = idesc->operands[index];
5588 ++CURR_SLOT.num_fixups;
5589 return OPERAND_MATCH;
5594 return OPERAND_MISMATCH;
5603 memset (e, 0, sizeof (*e));
5606 if (*input_line_pointer != '}')
5608 sep = *input_line_pointer++;
5612 if (!md.manual_bundling)
5613 as_warn ("Found '}' when manual bundling is off");
5615 CURR_SLOT.manual_bundling_off = 1;
5616 md.manual_bundling = 0;
5622 /* Returns the next entry in the opcode table that matches the one in
5623 IDESC, and frees the entry in IDESC. If no matching entry is
5624 found, NULL is returned instead. */
5626 static struct ia64_opcode *
5627 get_next_opcode (struct ia64_opcode *idesc)
5629 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5630 ia64_free_opcode (idesc);
5634 /* Parse the operands for the opcode and find the opcode variant that
5635 matches the specified operands, or NULL if no match is possible. */
5637 static struct ia64_opcode *
5638 parse_operands (idesc)
5639 struct ia64_opcode *idesc;
5641 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5642 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5643 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5644 enum operand_match_result result;
5646 char *first_arg = 0, *end, *saved_input_pointer;
5649 assert (strlen (idesc->name) <= 128);
5651 strcpy (mnemonic, idesc->name);
5652 if (idesc->operands[2] == IA64_OPND_SOF)
5654 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5655 can't parse the first operand until we have parsed the
5656 remaining operands of the "alloc" instruction. */
5658 first_arg = input_line_pointer;
5659 end = strchr (input_line_pointer, '=');
5662 as_bad ("Expected separator `='");
5665 input_line_pointer = end + 1;
5670 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5672 sep = parse_operand (CURR_SLOT.opnd + i);
5673 if (CURR_SLOT.opnd[i].X_op == O_absent)
5678 if (sep != '=' && sep != ',')
5683 if (num_outputs > 0)
5684 as_bad ("Duplicate equal sign (=) in instruction");
5686 num_outputs = i + 1;
5691 as_bad ("Illegal operand separator `%c'", sep);
5695 if (idesc->operands[2] == IA64_OPND_SOF)
5697 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5698 know (strcmp (idesc->name, "alloc") == 0);
5699 if (num_operands == 5 /* first_arg not included in this count! */
5700 && CURR_SLOT.opnd[2].X_op == O_constant
5701 && CURR_SLOT.opnd[3].X_op == O_constant
5702 && CURR_SLOT.opnd[4].X_op == O_constant
5703 && CURR_SLOT.opnd[5].X_op == O_constant)
5705 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5706 CURR_SLOT.opnd[3].X_add_number,
5707 CURR_SLOT.opnd[4].X_add_number,
5708 CURR_SLOT.opnd[5].X_add_number);
5710 /* now we can parse the first arg: */
5711 saved_input_pointer = input_line_pointer;
5712 input_line_pointer = first_arg;
5713 sep = parse_operand (CURR_SLOT.opnd + 0);
5715 --num_outputs; /* force error */
5716 input_line_pointer = saved_input_pointer;
5718 CURR_SLOT.opnd[2].X_add_number = sof;
5719 CURR_SLOT.opnd[3].X_add_number
5720 = sof - CURR_SLOT.opnd[4].X_add_number;
5721 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5725 highest_unmatched_operand = 0;
5726 curr_out_of_range_pos = -1;
5728 expected_operand = idesc->operands[0];
5729 for (; idesc; idesc = get_next_opcode (idesc))
5731 if (num_outputs != idesc->num_outputs)
5732 continue; /* mismatch in # of outputs */
5734 CURR_SLOT.num_fixups = 0;
5736 /* Try to match all operands. If we see an out-of-range operand,
5737 then continue trying to match the rest of the operands, since if
5738 the rest match, then this idesc will give the best error message. */
5740 out_of_range_pos = -1;
5741 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5743 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5744 if (result != OPERAND_MATCH)
5746 if (result != OPERAND_OUT_OF_RANGE)
5748 if (out_of_range_pos < 0)
5749 /* remember position of the first out-of-range operand: */
5750 out_of_range_pos = i;
5754 /* If we did not match all operands, or if at least one operand was
5755 out-of-range, then this idesc does not match. Keep track of which
5756 idesc matched the most operands before failing. If we have two
5757 idescs that failed at the same position, and one had an out-of-range
5758 operand, then prefer the out-of-range operand. Thus if we have
5759 "add r0=0x1000000,r1" we get an error saying the constant is out
5760 of range instead of an error saying that the constant should have been
5763 if (i != num_operands || out_of_range_pos >= 0)
5765 if (i > highest_unmatched_operand
5766 || (i == highest_unmatched_operand
5767 && out_of_range_pos > curr_out_of_range_pos))
5769 highest_unmatched_operand = i;
5770 if (out_of_range_pos >= 0)
5772 expected_operand = idesc->operands[out_of_range_pos];
5773 error_pos = out_of_range_pos;
5777 expected_operand = idesc->operands[i];
5780 curr_out_of_range_pos = out_of_range_pos;
5785 if (num_operands < NELEMS (idesc->operands)
5786 && idesc->operands[num_operands])
5787 continue; /* mismatch in number of arguments */
5793 if (expected_operand)
5794 as_bad ("Operand %u of `%s' should be %s",
5795 error_pos + 1, mnemonic,
5796 elf64_ia64_operands[expected_operand].desc);
5798 as_bad ("Operand mismatch");
5804 /* Keep track of state necessary to determine whether a NOP is necessary
5805 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5806 detect a case where additional NOPs may be necessary. */
5808 errata_nop_necessary_p (slot, insn_unit)
5810 enum ia64_unit insn_unit;
5813 struct group *this_group = md.last_groups + md.group_idx;
5814 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5815 struct ia64_opcode *idesc = slot->idesc;
5817 /* Test whether this could be the first insn in a problematic sequence. */
5818 if (insn_unit == IA64_UNIT_F)
5820 for (i = 0; i < idesc->num_outputs; i++)
5821 if (idesc->operands[i] == IA64_OPND_P1
5822 || idesc->operands[i] == IA64_OPND_P2)
5824 int regno = slot->opnd[i].X_add_number - REG_P;
5825 /* Ignore invalid operands; they generate errors elsewhere. */
5828 this_group->p_reg_set[regno] = 1;
5832 /* Test whether this could be the second insn in a problematic sequence. */
5833 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5834 && prev_group->p_reg_set[slot->qp_regno])
5836 for (i = 0; i < idesc->num_outputs; i++)
5837 if (idesc->operands[i] == IA64_OPND_R1
5838 || idesc->operands[i] == IA64_OPND_R2
5839 || idesc->operands[i] == IA64_OPND_R3)
5841 int regno = slot->opnd[i].X_add_number - REG_GR;
5842 /* Ignore invalid operands; they generate errors elsewhere. */
5845 if (strncmp (idesc->name, "add", 3) != 0
5846 && strncmp (idesc->name, "sub", 3) != 0
5847 && strncmp (idesc->name, "shladd", 6) != 0
5848 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5849 this_group->g_reg_set_conditionally[regno] = 1;
5853 /* Test whether this could be the third insn in a problematic sequence. */
5854 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5856 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5857 idesc->operands[i] == IA64_OPND_R3
5858 /* For mov indirect. */
5859 || idesc->operands[i] == IA64_OPND_RR_R3
5860 || idesc->operands[i] == IA64_OPND_DBR_R3
5861 || idesc->operands[i] == IA64_OPND_IBR_R3
5862 || idesc->operands[i] == IA64_OPND_PKR_R3
5863 || idesc->operands[i] == IA64_OPND_PMC_R3
5864 || idesc->operands[i] == IA64_OPND_PMD_R3
5865 || idesc->operands[i] == IA64_OPND_MSR_R3
5866 || idesc->operands[i] == IA64_OPND_CPUID_R3
5868 || idesc->operands[i] == IA64_OPND_ITR_R3
5869 || idesc->operands[i] == IA64_OPND_DTR_R3
5870 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5871 || idesc->operands[i] == IA64_OPND_MR3)
5873 int regno = slot->opnd[i].X_add_number - REG_GR;
5874 /* Ignore invalid operands; they generate errors elsewhere. */
5877 if (idesc->operands[i] == IA64_OPND_R3)
5879 if (strcmp (idesc->name, "fc") != 0
5880 && strcmp (idesc->name, "tak") != 0
5881 && strcmp (idesc->name, "thash") != 0
5882 && strcmp (idesc->name, "tpa") != 0
5883 && strcmp (idesc->name, "ttag") != 0
5884 && strncmp (idesc->name, "ptr", 3) != 0
5885 && strncmp (idesc->name, "ptc", 3) != 0
5886 && strncmp (idesc->name, "probe", 5) != 0)
5889 if (prev_group->g_reg_set_conditionally[regno])
5897 build_insn (slot, insnp)
5901 const struct ia64_operand *odesc, *o2desc;
5902 struct ia64_opcode *idesc = slot->idesc;
5903 bfd_signed_vma insn, val;
5907 insn = idesc->opcode | slot->qp_regno;
5909 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
5911 if (slot->opnd[i].X_op == O_register
5912 || slot->opnd[i].X_op == O_constant
5913 || slot->opnd[i].X_op == O_index)
5914 val = slot->opnd[i].X_add_number;
5915 else if (slot->opnd[i].X_op == O_big)
5917 /* This must be the value 0x10000000000000000. */
5918 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
5924 switch (idesc->operands[i])
5926 case IA64_OPND_IMMU64:
5927 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
5928 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
5929 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
5930 | (((val >> 63) & 0x1) << 36));
5933 case IA64_OPND_IMMU62:
5934 val &= 0x3fffffffffffffffULL;
5935 if (val != slot->opnd[i].X_add_number)
5936 as_warn (_("Value truncated to 62 bits"));
5937 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
5938 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
5941 case IA64_OPND_TGT64:
5943 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
5944 insn |= ((((val >> 59) & 0x1) << 36)
5945 | (((val >> 0) & 0xfffff) << 13));
5976 case IA64_OPND_R3_2:
5977 case IA64_OPND_CPUID_R3:
5978 case IA64_OPND_DBR_R3:
5979 case IA64_OPND_DTR_R3:
5980 case IA64_OPND_ITR_R3:
5981 case IA64_OPND_IBR_R3:
5983 case IA64_OPND_MSR_R3:
5984 case IA64_OPND_PKR_R3:
5985 case IA64_OPND_PMC_R3:
5986 case IA64_OPND_PMD_R3:
5987 case IA64_OPND_RR_R3:
5995 odesc = elf64_ia64_operands + idesc->operands[i];
5996 err = (*odesc->insert) (odesc, val, &insn);
5998 as_bad_where (slot->src_file, slot->src_line,
5999 "Bad operand value: %s", err);
6000 if (idesc->flags & IA64_OPCODE_PSEUDO)
6002 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6003 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6005 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6006 (*o2desc->insert) (o2desc, val, &insn);
6008 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6009 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6010 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6012 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6013 (*o2desc->insert) (o2desc, 64 - val, &insn);
6023 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6024 unsigned int manual_bundling = 0;
6025 enum ia64_unit required_unit, insn_unit = 0;
6026 enum ia64_insn_type type[3], insn_type;
6027 unsigned int template, orig_template;
6028 bfd_vma insn[3] = { -1, -1, -1 };
6029 struct ia64_opcode *idesc;
6030 int end_of_insn_group = 0, user_template = -1;
6031 int n, i, j, first, curr;
6032 unw_rec_list *ptr, *last_ptr, *end_ptr;
6033 bfd_vma t0 = 0, t1 = 0;
6034 struct label_fix *lfix;
6035 struct insn_fix *ifix;
6040 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6041 know (first >= 0 & first < NUM_SLOTS);
6042 n = MIN (3, md.num_slots_in_use);
6044 /* Determine template: user user_template if specified, best match
6047 if (md.slot[first].user_template >= 0)
6048 user_template = template = md.slot[first].user_template;
6051 /* Auto select appropriate template. */
6052 memset (type, 0, sizeof (type));
6054 for (i = 0; i < n; ++i)
6056 if (md.slot[curr].label_fixups && i != 0)
6058 type[i] = md.slot[curr].idesc->type;
6059 curr = (curr + 1) % NUM_SLOTS;
6061 template = best_template[type[0]][type[1]][type[2]];
6064 /* initialize instructions with appropriate nops: */
6065 for (i = 0; i < 3; ++i)
6066 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6070 /* now fill in slots with as many insns as possible: */
6072 idesc = md.slot[curr].idesc;
6073 end_of_insn_group = 0;
6074 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6076 /* If we have unwind records, we may need to update some now. */
6077 ptr = md.slot[curr].unwind_record;
6080 /* Find the last prologue/body record in the list for the current
6081 insn, and set the slot number for all records up to that point.
6082 This needs to be done now, because prologue/body records refer to
6083 the current point, not the point after the instruction has been
6084 issued. This matters because there may have been nops emitted
6085 meanwhile. Any non-prologue non-body record followed by a
6086 prologue/body record must also refer to the current point. */
6088 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6089 for (; ptr != end_ptr; ptr = ptr->next)
6090 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6091 || ptr->r.type == body)
6095 /* Make last_ptr point one after the last prologue/body
6097 last_ptr = last_ptr->next;
6098 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6101 ptr->slot_number = (unsigned long) f + i;
6102 ptr->slot_frag = frag_now;
6104 /* Remove the initialized records, so that we won't accidentally
6105 update them again if we insert a nop and continue. */
6106 md.slot[curr].unwind_record = last_ptr;
6110 if (idesc->flags & IA64_OPCODE_SLOT2)
6112 if (manual_bundling && i != 2)
6113 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6114 "`%s' must be last in bundle", idesc->name);
6118 if (idesc->flags & IA64_OPCODE_LAST)
6121 unsigned int required_template;
6123 /* If we need a stop bit after an M slot, our only choice is
6124 template 5 (M;;MI). If we need a stop bit after a B
6125 slot, our only choice is to place it at the end of the
6126 bundle, because the only available templates are MIB,
6127 MBB, BBB, MMB, and MFB. We don't handle anything other
6128 than M and B slots because these are the only kind of
6129 instructions that can have the IA64_OPCODE_LAST bit set. */
6130 required_template = template;
6131 switch (idesc->type)
6135 required_template = 5;
6143 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6144 "Internal error: don't know how to force %s to end"
6145 "of instruction group", idesc->name);
6149 if (manual_bundling && i != required_slot)
6150 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6151 "`%s' must be last in instruction group",
6153 if (required_slot < i)
6154 /* Can't fit this instruction. */
6158 if (required_template != template)
6160 /* If we switch the template, we need to reset the NOPs
6161 after slot i. The slot-types of the instructions ahead
6162 of i never change, so we don't need to worry about
6163 changing NOPs in front of this slot. */
6164 for (j = i; j < 3; ++j)
6165 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6167 template = required_template;
6169 if (curr != first && md.slot[curr].label_fixups)
6171 if (manual_bundling_on)
6172 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6173 "Label must be first in a bundle");
6174 /* This insn must go into the first slot of a bundle. */
6178 manual_bundling_on = md.slot[curr].manual_bundling_on;
6179 manual_bundling_off = md.slot[curr].manual_bundling_off;
6181 if (manual_bundling_on)
6184 manual_bundling = 1;
6186 break; /* need to start a new bundle */
6189 if (end_of_insn_group && md.num_slots_in_use >= 1)
6191 /* We need an instruction group boundary in the middle of a
6192 bundle. See if we can switch to an other template with
6193 an appropriate boundary. */
6195 orig_template = template;
6196 if (i == 1 && (user_template == 4
6197 || (user_template < 0
6198 && (ia64_templ_desc[template].exec_unit[0]
6202 end_of_insn_group = 0;
6204 else if (i == 2 && (user_template == 0
6205 || (user_template < 0
6206 && (ia64_templ_desc[template].exec_unit[1]
6208 /* This test makes sure we don't switch the template if
6209 the next instruction is one that needs to be first in
6210 an instruction group. Since all those instructions are
6211 in the M group, there is no way such an instruction can
6212 fit in this bundle even if we switch the template. The
6213 reason we have to check for this is that otherwise we
6214 may end up generating "MI;;I M.." which has the deadly
6215 effect that the second M instruction is no longer the
6216 first in the bundle! --davidm 99/12/16 */
6217 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6220 end_of_insn_group = 0;
6222 else if (curr != first)
6223 /* can't fit this insn */
6226 if (template != orig_template)
6227 /* if we switch the template, we need to reset the NOPs
6228 after slot i. The slot-types of the instructions ahead
6229 of i never change, so we don't need to worry about
6230 changing NOPs in front of this slot. */
6231 for (j = i; j < 3; ++j)
6232 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6234 required_unit = ia64_templ_desc[template].exec_unit[i];
6236 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6237 if (idesc->type == IA64_TYPE_DYN)
6239 if ((strcmp (idesc->name, "nop") == 0)
6240 || (strcmp (idesc->name, "hint") == 0)
6241 || (strcmp (idesc->name, "break") == 0))
6242 insn_unit = required_unit;
6243 else if (strcmp (idesc->name, "chk.s") == 0)
6245 insn_unit = IA64_UNIT_M;
6246 if (required_unit == IA64_UNIT_I)
6247 insn_unit = IA64_UNIT_I;
6250 as_fatal ("emit_one_bundle: unexpected dynamic op");
6252 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6253 ia64_free_opcode (idesc);
6254 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6256 know (!idesc->next); /* no resolved dynamic ops have collisions */
6261 insn_type = idesc->type;
6262 insn_unit = IA64_UNIT_NIL;
6266 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6267 insn_unit = required_unit;
6269 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6270 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6271 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6272 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6273 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6278 if (insn_unit != required_unit)
6280 if (required_unit == IA64_UNIT_L
6281 && insn_unit == IA64_UNIT_I
6282 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6284 /* we got ourselves an MLX template but the current
6285 instruction isn't an X-unit, or an I-unit instruction
6286 that can go into the X slot of an MLX template. Duh. */
6287 if (md.num_slots_in_use >= NUM_SLOTS)
6289 as_bad_where (md.slot[curr].src_file,
6290 md.slot[curr].src_line,
6291 "`%s' can't go in X slot of "
6292 "MLX template", idesc->name);
6293 /* drop this insn so we don't livelock: */
6294 --md.num_slots_in_use;
6298 continue; /* try next slot */
6304 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6305 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6308 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6309 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6311 build_insn (md.slot + curr, insn + i);
6313 ptr = md.slot[curr].unwind_record;
6316 /* Set slot numbers for all remaining unwind records belonging to the
6317 current insn. There can not be any prologue/body unwind records
6319 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6320 for (; ptr != end_ptr; ptr = ptr->next)
6322 ptr->slot_number = (unsigned long) f + i;
6323 ptr->slot_frag = frag_now;
6325 md.slot[curr].unwind_record = NULL;
6328 if (required_unit == IA64_UNIT_L)
6331 /* skip one slot for long/X-unit instructions */
6334 --md.num_slots_in_use;
6336 /* now is a good time to fix up the labels for this insn: */
6337 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6339 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6340 symbol_set_frag (lfix->sym, frag_now);
6342 /* and fix up the tags also. */
6343 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6345 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6346 symbol_set_frag (lfix->sym, frag_now);
6349 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6351 ifix = md.slot[curr].fixup + j;
6352 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6353 &ifix->expr, ifix->is_pcrel, ifix->code);
6354 fix->tc_fix_data.opnd = ifix->opnd;
6355 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6356 fix->fx_file = md.slot[curr].src_file;
6357 fix->fx_line = md.slot[curr].src_line;
6360 end_of_insn_group = md.slot[curr].end_of_insn_group;
6362 if (end_of_insn_group)
6364 md.group_idx = (md.group_idx + 1) % 3;
6365 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6369 ia64_free_opcode (md.slot[curr].idesc);
6370 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6371 md.slot[curr].user_template = -1;
6373 if (manual_bundling_off)
6375 manual_bundling = 0;
6378 curr = (curr + 1) % NUM_SLOTS;
6379 idesc = md.slot[curr].idesc;
6381 if (manual_bundling)
6383 if (md.num_slots_in_use > 0)
6384 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6385 "`%s' does not fit into %s template",
6386 idesc->name, ia64_templ_desc[template].name);
6388 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6389 "Missing '}' at end of file");
6391 know (md.num_slots_in_use < NUM_SLOTS);
6393 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6394 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6396 number_to_chars_littleendian (f + 0, t0, 8);
6397 number_to_chars_littleendian (f + 8, t1, 8);
6401 unwind.list->next_slot_number = (unsigned long) f + 16;
6402 unwind.list->next_slot_frag = frag_now;
6407 md_parse_option (c, arg)
6414 /* Switches from the Intel assembler. */
6416 if (strcmp (arg, "ilp64") == 0
6417 || strcmp (arg, "lp64") == 0
6418 || strcmp (arg, "p64") == 0)
6420 md.flags |= EF_IA_64_ABI64;
6422 else if (strcmp (arg, "ilp32") == 0)
6424 md.flags &= ~EF_IA_64_ABI64;
6426 else if (strcmp (arg, "le") == 0)
6428 md.flags &= ~EF_IA_64_BE;
6430 else if (strcmp (arg, "be") == 0)
6432 md.flags |= EF_IA_64_BE;
6439 if (strcmp (arg, "so") == 0)
6441 /* Suppress signon message. */
6443 else if (strcmp (arg, "pi") == 0)
6445 /* Reject privileged instructions. FIXME */
6447 else if (strcmp (arg, "us") == 0)
6449 /* Allow union of signed and unsigned range. FIXME */
6451 else if (strcmp (arg, "close_fcalls") == 0)
6453 /* Do not resolve global function calls. */
6460 /* temp[="prefix"] Insert temporary labels into the object file
6461 symbol table prefixed by "prefix".
6462 Default prefix is ":temp:".
6467 /* indirect=<tgt> Assume unannotated indirect branches behavior
6468 according to <tgt> --
6469 exit: branch out from the current context (default)
6470 labels: all labels in context may be branch targets
6472 if (strncmp (arg, "indirect=", 9) != 0)
6477 /* -X conflicts with an ignored option, use -x instead */
6479 if (!arg || strcmp (arg, "explicit") == 0)
6481 /* set default mode to explicit */
6482 md.default_explicit_mode = 1;
6485 else if (strcmp (arg, "auto") == 0)
6487 md.default_explicit_mode = 0;
6489 else if (strcmp (arg, "debug") == 0)
6493 else if (strcmp (arg, "debugx") == 0)
6495 md.default_explicit_mode = 1;
6500 as_bad (_("Unrecognized option '-x%s'"), arg);
6505 /* nops Print nops statistics. */
6508 /* GNU specific switches for gcc. */
6509 case OPTION_MCONSTANT_GP:
6510 md.flags |= EF_IA_64_CONS_GP;
6513 case OPTION_MAUTO_PIC:
6514 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6525 md_show_usage (stream)
6530 --mconstant-gp mark output file as using the constant-GP model\n\
6531 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6532 --mauto-pic mark output file as using the constant-GP model\n\
6533 without function descriptors (sets ELF header flag\n\
6534 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6535 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6536 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6537 -x | -xexplicit turn on dependency violation checking (default)\n\
6538 -xauto automagically remove dependency violations\n\
6539 -xdebug debug dependency violation checker\n"),
6544 ia64_after_parse_args ()
6546 if (debug_type == DEBUG_STABS)
6547 as_fatal (_("--gstabs is not supported for ia64"));
6550 /* Return true if TYPE fits in TEMPL at SLOT. */
6553 match (int templ, int type, int slot)
6555 enum ia64_unit unit;
6558 unit = ia64_templ_desc[templ].exec_unit[slot];
6561 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6563 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6565 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6566 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6567 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6568 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6569 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6570 default: result = 0; break;
6575 /* Add a bit of extra goodness if a nop of type F or B would fit
6576 in TEMPL at SLOT. */
6579 extra_goodness (int templ, int slot)
6581 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6583 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6588 /* This function is called once, at assembler startup time. It sets
6589 up all the tables, etc. that the MD part of the assembler will need
6590 that can be determined before arguments are parsed. */
6594 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6599 md.explicit_mode = md.default_explicit_mode;
6601 bfd_set_section_alignment (stdoutput, text_section, 4);
6603 /* Make sure function pointers get initialized. */
6604 target_big_endian = -1;
6605 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6607 alias_hash = hash_new ();
6608 alias_name_hash = hash_new ();
6609 secalias_hash = hash_new ();
6610 secalias_name_hash = hash_new ();
6612 pseudo_func[FUNC_DTP_MODULE].u.sym =
6613 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6614 &zero_address_frag);
6616 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6617 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6618 &zero_address_frag);
6620 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6621 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6622 &zero_address_frag);
6624 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6625 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6626 &zero_address_frag);
6628 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6629 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6630 &zero_address_frag);
6632 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6633 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6634 &zero_address_frag);
6636 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6637 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6638 &zero_address_frag);
6640 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6641 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6642 &zero_address_frag);
6644 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6645 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6646 &zero_address_frag);
6648 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6649 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6650 &zero_address_frag);
6652 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6653 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6654 &zero_address_frag);
6656 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6657 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6658 &zero_address_frag);
6660 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6661 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6662 &zero_address_frag);
6664 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6665 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6666 &zero_address_frag);
6668 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6669 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6670 &zero_address_frag);
6672 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6673 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6674 &zero_address_frag);
6676 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6677 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6678 &zero_address_frag);
6680 /* Compute the table of best templates. We compute goodness as a
6681 base 4 value, in which each match counts for 3, each F counts
6682 for 2, each B counts for 1. This should maximize the number of
6683 F and B nops in the chosen bundles, which is good because these
6684 pipelines are least likely to be overcommitted. */
6685 for (i = 0; i < IA64_NUM_TYPES; ++i)
6686 for (j = 0; j < IA64_NUM_TYPES; ++j)
6687 for (k = 0; k < IA64_NUM_TYPES; ++k)
6690 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6693 if (match (t, i, 0))
6695 if (match (t, j, 1))
6697 if (match (t, k, 2))
6698 goodness = 3 + 3 + 3;
6700 goodness = 3 + 3 + extra_goodness (t, 2);
6702 else if (match (t, j, 2))
6703 goodness = 3 + 3 + extra_goodness (t, 1);
6707 goodness += extra_goodness (t, 1);
6708 goodness += extra_goodness (t, 2);
6711 else if (match (t, i, 1))
6713 if (match (t, j, 2))
6716 goodness = 3 + extra_goodness (t, 2);
6718 else if (match (t, i, 2))
6719 goodness = 3 + extra_goodness (t, 1);
6721 if (goodness > best)
6724 best_template[i][j][k] = t;
6729 for (i = 0; i < NUM_SLOTS; ++i)
6730 md.slot[i].user_template = -1;
6732 md.pseudo_hash = hash_new ();
6733 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6735 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6736 (void *) (pseudo_opcode + i));
6738 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6739 pseudo_opcode[i].name, err);
6742 md.reg_hash = hash_new ();
6743 md.dynreg_hash = hash_new ();
6744 md.const_hash = hash_new ();
6745 md.entry_hash = hash_new ();
6747 /* general registers: */
6750 for (i = 0; i < total; ++i)
6752 sprintf (name, "r%d", i - REG_GR);
6753 md.regsym[i] = declare_register (name, i);
6756 /* floating point registers: */
6758 for (; i < total; ++i)
6760 sprintf (name, "f%d", i - REG_FR);
6761 md.regsym[i] = declare_register (name, i);
6764 /* application registers: */
6767 for (; i < total; ++i)
6769 sprintf (name, "ar%d", i - REG_AR);
6770 md.regsym[i] = declare_register (name, i);
6773 /* control registers: */
6776 for (; i < total; ++i)
6778 sprintf (name, "cr%d", i - REG_CR);
6779 md.regsym[i] = declare_register (name, i);
6782 /* predicate registers: */
6784 for (; i < total; ++i)
6786 sprintf (name, "p%d", i - REG_P);
6787 md.regsym[i] = declare_register (name, i);
6790 /* branch registers: */
6792 for (; i < total; ++i)
6794 sprintf (name, "b%d", i - REG_BR);
6795 md.regsym[i] = declare_register (name, i);
6798 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6799 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6800 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6801 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6802 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6803 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6804 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6806 for (i = 0; i < NELEMS (indirect_reg); ++i)
6808 regnum = indirect_reg[i].regnum;
6809 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6812 /* define synonyms for application registers: */
6813 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6814 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6815 REG_AR + ar[i - REG_AR].regnum);
6817 /* define synonyms for control registers: */
6818 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6819 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6820 REG_CR + cr[i - REG_CR].regnum);
6822 declare_register ("gp", REG_GR + 1);
6823 declare_register ("sp", REG_GR + 12);
6824 declare_register ("rp", REG_BR + 0);
6826 /* pseudo-registers used to specify unwind info: */
6827 declare_register ("psp", REG_PSP);
6829 declare_register_set ("ret", 4, REG_GR + 8);
6830 declare_register_set ("farg", 8, REG_FR + 8);
6831 declare_register_set ("fret", 8, REG_FR + 8);
6833 for (i = 0; i < NELEMS (const_bits); ++i)
6835 err = hash_insert (md.const_hash, const_bits[i].name,
6836 (PTR) (const_bits + i));
6838 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6842 /* Set the architecture and machine depending on defaults and command line
6844 if (md.flags & EF_IA_64_ABI64)
6845 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6847 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6850 as_warn (_("Could not set architecture and machine"));
6852 /* Set the pointer size and pointer shift size depending on md.flags */
6854 if (md.flags & EF_IA_64_ABI64)
6856 md.pointer_size = 8; /* pointers are 8 bytes */
6857 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6861 md.pointer_size = 4; /* pointers are 4 bytes */
6862 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6865 md.mem_offset.hint = 0;
6868 md.entry_labels = NULL;
6871 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6872 because that is called after md_parse_option which is where we do the
6873 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6874 default endianness. */
6877 ia64_init (argc, argv)
6878 int argc ATTRIBUTE_UNUSED;
6879 char **argv ATTRIBUTE_UNUSED;
6881 md.flags = MD_FLAGS_DEFAULT;
6884 /* Return a string for the target object file format. */
6887 ia64_target_format ()
6889 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6891 if (md.flags & EF_IA_64_BE)
6893 if (md.flags & EF_IA_64_ABI64)
6894 #if defined(TE_AIX50)
6895 return "elf64-ia64-aix-big";
6896 #elif defined(TE_HPUX)
6897 return "elf64-ia64-hpux-big";
6899 return "elf64-ia64-big";
6902 #if defined(TE_AIX50)
6903 return "elf32-ia64-aix-big";
6904 #elif defined(TE_HPUX)
6905 return "elf32-ia64-hpux-big";
6907 return "elf32-ia64-big";
6912 if (md.flags & EF_IA_64_ABI64)
6914 return "elf64-ia64-aix-little";
6916 return "elf64-ia64-little";
6920 return "elf32-ia64-aix-little";
6922 return "elf32-ia64-little";
6927 return "unknown-format";
6931 ia64_end_of_source ()
6933 /* terminate insn group upon reaching end of file: */
6934 insn_group_break (1, 0, 0);
6936 /* emits slots we haven't written yet: */
6937 ia64_flush_insns ();
6939 bfd_set_private_flags (stdoutput, md.flags);
6941 md.mem_offset.hint = 0;
6947 if (md.qp.X_op == O_register)
6948 as_bad ("qualifying predicate not followed by instruction");
6949 md.qp.X_op = O_absent;
6951 if (ignore_input ())
6954 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
6956 if (md.detect_dv && !md.explicit_mode)
6957 as_warn (_("Explicit stops are ignored in auto mode"));
6959 insn_group_break (1, 0, 0);
6963 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6965 static int defining_tag = 0;
6968 ia64_unrecognized_line (ch)
6974 expression (&md.qp);
6975 if (*input_line_pointer++ != ')')
6977 as_bad ("Expected ')'");
6980 if (md.qp.X_op != O_register)
6982 as_bad ("Qualifying predicate expected");
6985 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
6987 as_bad ("Predicate register expected");
6993 if (md.manual_bundling)
6994 as_warn ("Found '{' when manual bundling is already turned on");
6996 CURR_SLOT.manual_bundling_on = 1;
6997 md.manual_bundling = 1;
6999 /* Bundling is only acceptable in explicit mode
7000 or when in default automatic mode. */
7001 if (md.detect_dv && !md.explicit_mode)
7003 if (!md.mode_explicitly_set
7004 && !md.default_explicit_mode)
7007 as_warn (_("Found '{' after explicit switch to automatic mode"));
7012 if (!md.manual_bundling)
7013 as_warn ("Found '}' when manual bundling is off");
7015 PREV_SLOT.manual_bundling_off = 1;
7016 md.manual_bundling = 0;
7018 /* switch back to automatic mode, if applicable */
7021 && !md.mode_explicitly_set
7022 && !md.default_explicit_mode)
7025 /* Allow '{' to follow on the same line. We also allow ";;", but that
7026 happens automatically because ';' is an end of line marker. */
7028 if (input_line_pointer[0] == '{')
7030 input_line_pointer++;
7031 return ia64_unrecognized_line ('{');
7034 demand_empty_rest_of_line ();
7044 if (md.qp.X_op == O_register)
7046 as_bad ("Tag must come before qualifying predicate.");
7050 /* This implements just enough of read_a_source_file in read.c to
7051 recognize labels. */
7052 if (is_name_beginner (*input_line_pointer))
7054 s = input_line_pointer;
7055 c = get_symbol_end ();
7057 else if (LOCAL_LABELS_FB
7058 && ISDIGIT (*input_line_pointer))
7061 while (ISDIGIT (*input_line_pointer))
7062 temp = (temp * 10) + *input_line_pointer++ - '0';
7063 fb_label_instance_inc (temp);
7064 s = fb_label_name (temp, 0);
7065 c = *input_line_pointer;
7074 /* Put ':' back for error messages' sake. */
7075 *input_line_pointer++ = ':';
7076 as_bad ("Expected ':'");
7083 /* Put ':' back for error messages' sake. */
7084 *input_line_pointer++ = ':';
7085 if (*input_line_pointer++ != ']')
7087 as_bad ("Expected ']'");
7092 as_bad ("Tag name expected");
7102 /* Not a valid line. */
7107 ia64_frob_label (sym)
7110 struct label_fix *fix;
7112 /* Tags need special handling since they are not bundle breaks like
7116 fix = obstack_alloc (¬es, sizeof (*fix));
7118 fix->next = CURR_SLOT.tag_fixups;
7119 CURR_SLOT.tag_fixups = fix;
7124 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7126 md.last_text_seg = now_seg;
7127 fix = obstack_alloc (¬es, sizeof (*fix));
7129 fix->next = CURR_SLOT.label_fixups;
7130 CURR_SLOT.label_fixups = fix;
7132 /* Keep track of how many code entry points we've seen. */
7133 if (md.path == md.maxpaths)
7136 md.entry_labels = (const char **)
7137 xrealloc ((void *) md.entry_labels,
7138 md.maxpaths * sizeof (char *));
7140 md.entry_labels[md.path++] = S_GET_NAME (sym);
7145 /* The HP-UX linker will give unresolved symbol errors for symbols
7146 that are declared but unused. This routine removes declared,
7147 unused symbols from an object. */
7149 ia64_frob_symbol (sym)
7152 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7153 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7154 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7155 && ! S_IS_EXTERNAL (sym)))
7162 ia64_flush_pending_output ()
7164 if (!md.keep_pending_output
7165 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7167 /* ??? This causes many unnecessary stop bits to be emitted.
7168 Unfortunately, it isn't clear if it is safe to remove this. */
7169 insn_group_break (1, 0, 0);
7170 ia64_flush_insns ();
7174 /* Do ia64-specific expression optimization. All that's done here is
7175 to transform index expressions that are either due to the indexing
7176 of rotating registers or due to the indexing of indirect register
7179 ia64_optimize_expr (l, op, r)
7188 if (l->X_op == O_register && r->X_op == O_constant)
7190 num_regs = (l->X_add_number >> 16);
7191 if ((unsigned) r->X_add_number >= num_regs)
7194 as_bad ("No current frame");
7196 as_bad ("Index out of range 0..%u", num_regs - 1);
7197 r->X_add_number = 0;
7199 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7202 else if (l->X_op == O_register && r->X_op == O_register)
7204 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7205 || l->X_add_number == IND_MEM)
7207 as_bad ("Indirect register set name expected");
7208 l->X_add_number = IND_CPUID;
7211 l->X_op_symbol = md.regsym[l->X_add_number];
7212 l->X_add_number = r->X_add_number;
7220 ia64_parse_name (name, e)
7224 struct const_desc *cdesc;
7225 struct dynreg *dr = 0;
7226 unsigned int regnum;
7230 /* first see if NAME is a known register name: */
7231 sym = hash_find (md.reg_hash, name);
7234 e->X_op = O_register;
7235 e->X_add_number = S_GET_VALUE (sym);
7239 cdesc = hash_find (md.const_hash, name);
7242 e->X_op = O_constant;
7243 e->X_add_number = cdesc->value;
7247 /* check for inN, locN, or outN: */
7251 if (name[1] == 'n' && ISDIGIT (name[2]))
7259 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7267 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7280 /* The name is inN, locN, or outN; parse the register number. */
7281 regnum = strtoul (name, &end, 10);
7282 if (end > name && *end == '\0')
7284 if ((unsigned) regnum >= dr->num_regs)
7287 as_bad ("No current frame");
7289 as_bad ("Register number out of range 0..%u",
7293 e->X_op = O_register;
7294 e->X_add_number = dr->base + regnum;
7299 if ((dr = hash_find (md.dynreg_hash, name)))
7301 /* We've got ourselves the name of a rotating register set.
7302 Store the base register number in the low 16 bits of
7303 X_add_number and the size of the register set in the top 16
7305 e->X_op = O_register;
7306 e->X_add_number = dr->base | (dr->num_regs << 16);
7312 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7315 ia64_canonicalize_symbol_name (name)
7318 size_t len = strlen (name);
7319 if (len > 1 && name[len - 1] == '#')
7320 name[len - 1] = '\0';
7324 /* Return true if idesc is a conditional branch instruction. This excludes
7325 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7326 because they always read/write resources regardless of the value of the
7327 qualifying predicate. br.ia must always use p0, and hence is always
7328 taken. Thus this function returns true for branches which can fall
7329 through, and which use no resources if they do fall through. */
7332 is_conditional_branch (idesc)
7333 struct ia64_opcode *idesc;
7335 /* br is a conditional branch. Everything that starts with br. except
7336 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7337 Everything that starts with brl is a conditional branch. */
7338 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7339 && (idesc->name[2] == '\0'
7340 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7341 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7342 || idesc->name[2] == 'l'
7343 /* br.cond, br.call, br.clr */
7344 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7345 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7346 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7349 /* Return whether the given opcode is a taken branch. If there's any doubt,
7353 is_taken_branch (idesc)
7354 struct ia64_opcode *idesc;
7356 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7357 || strncmp (idesc->name, "br.ia", 5) == 0);
7360 /* Return whether the given opcode is an interruption or rfi. If there's any
7361 doubt, returns zero. */
7364 is_interruption_or_rfi (idesc)
7365 struct ia64_opcode *idesc;
7367 if (strcmp (idesc->name, "rfi") == 0)
7372 /* Returns the index of the given dependency in the opcode's list of chks, or
7373 -1 if there is no dependency. */
7376 depends_on (depind, idesc)
7378 struct ia64_opcode *idesc;
7381 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7382 for (i = 0; i < dep->nchks; i++)
7384 if (depind == DEP (dep->chks[i]))
7390 /* Determine a set of specific resources used for a particular resource
7391 class. Returns the number of specific resources identified For those
7392 cases which are not determinable statically, the resource returned is
7395 Meanings of value in 'NOTE':
7396 1) only read/write when the register number is explicitly encoded in the
7398 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7399 accesses CFM when qualifying predicate is in the rotating region.
7400 3) general register value is used to specify an indirect register; not
7401 determinable statically.
7402 4) only read the given resource when bits 7:0 of the indirect index
7403 register value does not match the register number of the resource; not
7404 determinable statically.
7405 5) all rules are implementation specific.
7406 6) only when both the index specified by the reader and the index specified
7407 by the writer have the same value in bits 63:61; not determinable
7409 7) only access the specified resource when the corresponding mask bit is
7411 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7412 only read when these insns reference FR2-31
7413 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7414 written when these insns write FR32-127
7415 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7417 11) The target predicates are written independently of PR[qp], but source
7418 registers are only read if PR[qp] is true. Since the state of PR[qp]
7419 cannot statically be determined, all source registers are marked used.
7420 12) This insn only reads the specified predicate register when that
7421 register is the PR[qp].
7422 13) This reference to ld-c only applies to teh GR whose value is loaded
7423 with data returned from memory, not the post-incremented address register.
7424 14) The RSE resource includes the implementation-specific RSE internal
7425 state resources. At least one (and possibly more) of these resources are
7426 read by each instruction listed in IC:rse-readers. At least one (and
7427 possibly more) of these resources are written by each insn listed in
7429 15+16) Represents reserved instructions, which the assembler does not
7432 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7433 this code; there are no dependency violations based on memory access.
7436 #define MAX_SPECS 256
7441 specify_resource (dep, idesc, type, specs, note, path)
7442 const struct ia64_dependency *dep;
7443 struct ia64_opcode *idesc;
7444 int type; /* is this a DV chk or a DV reg? */
7445 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7446 int note; /* resource note for this insn's usage */
7447 int path; /* which execution path to examine */
7454 if (dep->mode == IA64_DV_WAW
7455 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7456 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7459 /* template for any resources we identify */
7460 tmpl.dependency = dep;
7462 tmpl.insn_srlz = tmpl.data_srlz = 0;
7463 tmpl.qp_regno = CURR_SLOT.qp_regno;
7464 tmpl.link_to_qp_branch = 1;
7465 tmpl.mem_offset.hint = 0;
7468 tmpl.cmp_type = CMP_NONE;
7471 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7472 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7473 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7475 /* we don't need to track these */
7476 if (dep->semantics == IA64_DVS_NONE)
7479 switch (dep->specifier)
7484 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7486 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7487 if (regno >= 0 && regno <= 7)
7489 specs[count] = tmpl;
7490 specs[count++].index = regno;
7496 for (i = 0; i < 8; i++)
7498 specs[count] = tmpl;
7499 specs[count++].index = i;
7508 case IA64_RS_AR_UNAT:
7509 /* This is a mov =AR or mov AR= instruction. */
7510 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7512 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7513 if (regno == AR_UNAT)
7515 specs[count++] = tmpl;
7520 /* This is a spill/fill, or other instruction that modifies the
7523 /* Unless we can determine the specific bits used, mark the whole
7524 thing; bits 8:3 of the memory address indicate the bit used in
7525 UNAT. The .mem.offset hint may be used to eliminate a small
7526 subset of conflicts. */
7527 specs[count] = tmpl;
7528 if (md.mem_offset.hint)
7531 fprintf (stderr, " Using hint for spill/fill\n");
7532 /* The index isn't actually used, just set it to something
7533 approximating the bit index. */
7534 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7535 specs[count].mem_offset.hint = 1;
7536 specs[count].mem_offset.offset = md.mem_offset.offset;
7537 specs[count++].mem_offset.base = md.mem_offset.base;
7541 specs[count++].specific = 0;
7549 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7551 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7552 if ((regno >= 8 && regno <= 15)
7553 || (regno >= 20 && regno <= 23)
7554 || (regno >= 31 && regno <= 39)
7555 || (regno >= 41 && regno <= 47)
7556 || (regno >= 67 && regno <= 111))
7558 specs[count] = tmpl;
7559 specs[count++].index = regno;
7572 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7574 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7575 if ((regno >= 48 && regno <= 63)
7576 || (regno >= 112 && regno <= 127))
7578 specs[count] = tmpl;
7579 specs[count++].index = regno;
7585 for (i = 48; i < 64; i++)
7587 specs[count] = tmpl;
7588 specs[count++].index = i;
7590 for (i = 112; i < 128; i++)
7592 specs[count] = tmpl;
7593 specs[count++].index = i;
7611 for (i = 0; i < idesc->num_outputs; i++)
7612 if (idesc->operands[i] == IA64_OPND_B1
7613 || idesc->operands[i] == IA64_OPND_B2)
7615 specs[count] = tmpl;
7616 specs[count++].index =
7617 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7622 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7623 if (idesc->operands[i] == IA64_OPND_B1
7624 || idesc->operands[i] == IA64_OPND_B2)
7626 specs[count] = tmpl;
7627 specs[count++].index =
7628 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7634 case IA64_RS_CPUID: /* four or more registers */
7637 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7639 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7640 if (regno >= 0 && regno < NELEMS (gr_values)
7643 specs[count] = tmpl;
7644 specs[count++].index = gr_values[regno].value & 0xFF;
7648 specs[count] = tmpl;
7649 specs[count++].specific = 0;
7659 case IA64_RS_DBR: /* four or more registers */
7662 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7664 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7665 if (regno >= 0 && regno < NELEMS (gr_values)
7668 specs[count] = tmpl;
7669 specs[count++].index = gr_values[regno].value & 0xFF;
7673 specs[count] = tmpl;
7674 specs[count++].specific = 0;
7678 else if (note == 0 && !rsrc_write)
7680 specs[count] = tmpl;
7681 specs[count++].specific = 0;
7689 case IA64_RS_IBR: /* four or more registers */
7692 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7694 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7695 if (regno >= 0 && regno < NELEMS (gr_values)
7698 specs[count] = tmpl;
7699 specs[count++].index = gr_values[regno].value & 0xFF;
7703 specs[count] = tmpl;
7704 specs[count++].specific = 0;
7717 /* These are implementation specific. Force all references to
7718 conflict with all other references. */
7719 specs[count] = tmpl;
7720 specs[count++].specific = 0;
7728 case IA64_RS_PKR: /* 16 or more registers */
7729 if (note == 3 || note == 4)
7731 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7733 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7734 if (regno >= 0 && regno < NELEMS (gr_values)
7739 specs[count] = tmpl;
7740 specs[count++].index = gr_values[regno].value & 0xFF;
7743 for (i = 0; i < NELEMS (gr_values); i++)
7745 /* Uses all registers *except* the one in R3. */
7746 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7748 specs[count] = tmpl;
7749 specs[count++].index = i;
7755 specs[count] = tmpl;
7756 specs[count++].specific = 0;
7763 specs[count] = tmpl;
7764 specs[count++].specific = 0;
7768 case IA64_RS_PMC: /* four or more registers */
7771 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7772 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7775 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7777 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7778 if (regno >= 0 && regno < NELEMS (gr_values)
7781 specs[count] = tmpl;
7782 specs[count++].index = gr_values[regno].value & 0xFF;
7786 specs[count] = tmpl;
7787 specs[count++].specific = 0;
7797 case IA64_RS_PMD: /* four or more registers */
7800 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7802 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7803 if (regno >= 0 && regno < NELEMS (gr_values)
7806 specs[count] = tmpl;
7807 specs[count++].index = gr_values[regno].value & 0xFF;
7811 specs[count] = tmpl;
7812 specs[count++].specific = 0;
7822 case IA64_RS_RR: /* eight registers */
7825 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7827 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7828 if (regno >= 0 && regno < NELEMS (gr_values)
7831 specs[count] = tmpl;
7832 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7836 specs[count] = tmpl;
7837 specs[count++].specific = 0;
7841 else if (note == 0 && !rsrc_write)
7843 specs[count] = tmpl;
7844 specs[count++].specific = 0;
7852 case IA64_RS_CR_IRR:
7855 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7856 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7858 && idesc->operands[1] == IA64_OPND_CR3
7861 for (i = 0; i < 4; i++)
7863 specs[count] = tmpl;
7864 specs[count++].index = CR_IRR0 + i;
7870 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7871 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7873 && regno <= CR_IRR3)
7875 specs[count] = tmpl;
7876 specs[count++].index = regno;
7885 case IA64_RS_CR_LRR:
7892 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7893 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7894 && (regno == CR_LRR0 || regno == CR_LRR1))
7896 specs[count] = tmpl;
7897 specs[count++].index = regno;
7905 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
7907 specs[count] = tmpl;
7908 specs[count++].index =
7909 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7924 else if (rsrc_write)
7926 if (dep->specifier == IA64_RS_FRb
7927 && idesc->operands[0] == IA64_OPND_F1)
7929 specs[count] = tmpl;
7930 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
7935 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7937 if (idesc->operands[i] == IA64_OPND_F2
7938 || idesc->operands[i] == IA64_OPND_F3
7939 || idesc->operands[i] == IA64_OPND_F4)
7941 specs[count] = tmpl;
7942 specs[count++].index =
7943 CURR_SLOT.opnd[i].X_add_number - REG_FR;
7952 /* This reference applies only to the GR whose value is loaded with
7953 data returned from memory. */
7954 specs[count] = tmpl;
7955 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
7961 for (i = 0; i < idesc->num_outputs; i++)
7962 if (idesc->operands[i] == IA64_OPND_R1
7963 || idesc->operands[i] == IA64_OPND_R2
7964 || idesc->operands[i] == IA64_OPND_R3)
7966 specs[count] = tmpl;
7967 specs[count++].index =
7968 CURR_SLOT.opnd[i].X_add_number - REG_GR;
7970 if (idesc->flags & IA64_OPCODE_POSTINC)
7971 for (i = 0; i < NELEMS (idesc->operands); i++)
7972 if (idesc->operands[i] == IA64_OPND_MR3)
7974 specs[count] = tmpl;
7975 specs[count++].index =
7976 CURR_SLOT.opnd[i].X_add_number - REG_GR;
7981 /* Look for anything that reads a GR. */
7982 for (i = 0; i < NELEMS (idesc->operands); i++)
7984 if (idesc->operands[i] == IA64_OPND_MR3
7985 || idesc->operands[i] == IA64_OPND_CPUID_R3
7986 || idesc->operands[i] == IA64_OPND_DBR_R3
7987 || idesc->operands[i] == IA64_OPND_IBR_R3
7988 || idesc->operands[i] == IA64_OPND_MSR_R3
7989 || idesc->operands[i] == IA64_OPND_PKR_R3
7990 || idesc->operands[i] == IA64_OPND_PMC_R3
7991 || idesc->operands[i] == IA64_OPND_PMD_R3
7992 || idesc->operands[i] == IA64_OPND_RR_R3
7993 || ((i >= idesc->num_outputs)
7994 && (idesc->operands[i] == IA64_OPND_R1
7995 || idesc->operands[i] == IA64_OPND_R2
7996 || idesc->operands[i] == IA64_OPND_R3
7997 /* addl source register. */
7998 || idesc->operands[i] == IA64_OPND_R3_2)))
8000 specs[count] = tmpl;
8001 specs[count++].index =
8002 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8013 /* This is the same as IA64_RS_PRr, except that the register range is
8014 from 1 - 15, and there are no rotating register reads/writes here. */
8018 for (i = 1; i < 16; i++)
8020 specs[count] = tmpl;
8021 specs[count++].index = i;
8027 /* Mark only those registers indicated by the mask. */
8030 mask = CURR_SLOT.opnd[2].X_add_number;
8031 for (i = 1; i < 16; i++)
8032 if (mask & ((valueT) 1 << i))
8034 specs[count] = tmpl;
8035 specs[count++].index = i;
8043 else if (note == 11) /* note 11 implies note 1 as well */
8047 for (i = 0; i < idesc->num_outputs; i++)
8049 if (idesc->operands[i] == IA64_OPND_P1
8050 || idesc->operands[i] == IA64_OPND_P2)
8052 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8053 if (regno >= 1 && regno < 16)
8055 specs[count] = tmpl;
8056 specs[count++].index = regno;
8066 else if (note == 12)
8068 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8070 specs[count] = tmpl;
8071 specs[count++].index = CURR_SLOT.qp_regno;
8078 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8079 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8080 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8081 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8083 if ((idesc->operands[0] == IA64_OPND_P1
8084 || idesc->operands[0] == IA64_OPND_P2)
8085 && p1 >= 1 && p1 < 16)
8087 specs[count] = tmpl;
8088 specs[count].cmp_type =
8089 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8090 specs[count++].index = p1;
8092 if ((idesc->operands[1] == IA64_OPND_P1
8093 || idesc->operands[1] == IA64_OPND_P2)
8094 && p2 >= 1 && p2 < 16)
8096 specs[count] = tmpl;
8097 specs[count].cmp_type =
8098 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8099 specs[count++].index = p2;
8104 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8106 specs[count] = tmpl;
8107 specs[count++].index = CURR_SLOT.qp_regno;
8109 if (idesc->operands[1] == IA64_OPND_PR)
8111 for (i = 1; i < 16; i++)
8113 specs[count] = tmpl;
8114 specs[count++].index = i;
8125 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8126 simplified cases of this. */
8130 for (i = 16; i < 63; i++)
8132 specs[count] = tmpl;
8133 specs[count++].index = i;
8139 /* Mark only those registers indicated by the mask. */
8141 && idesc->operands[0] == IA64_OPND_PR)
8143 mask = CURR_SLOT.opnd[2].X_add_number;
8144 if (mask & ((valueT) 1 << 16))
8145 for (i = 16; i < 63; i++)
8147 specs[count] = tmpl;
8148 specs[count++].index = i;
8152 && idesc->operands[0] == IA64_OPND_PR_ROT)
8154 for (i = 16; i < 63; i++)
8156 specs[count] = tmpl;
8157 specs[count++].index = i;
8165 else if (note == 11) /* note 11 implies note 1 as well */
8169 for (i = 0; i < idesc->num_outputs; i++)
8171 if (idesc->operands[i] == IA64_OPND_P1
8172 || idesc->operands[i] == IA64_OPND_P2)
8174 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8175 if (regno >= 16 && regno < 63)
8177 specs[count] = tmpl;
8178 specs[count++].index = regno;
8188 else if (note == 12)
8190 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8192 specs[count] = tmpl;
8193 specs[count++].index = CURR_SLOT.qp_regno;
8200 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8201 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8202 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8203 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8205 if ((idesc->operands[0] == IA64_OPND_P1
8206 || idesc->operands[0] == IA64_OPND_P2)
8207 && p1 >= 16 && p1 < 63)
8209 specs[count] = tmpl;
8210 specs[count].cmp_type =
8211 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8212 specs[count++].index = p1;
8214 if ((idesc->operands[1] == IA64_OPND_P1
8215 || idesc->operands[1] == IA64_OPND_P2)
8216 && p2 >= 16 && p2 < 63)
8218 specs[count] = tmpl;
8219 specs[count].cmp_type =
8220 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8221 specs[count++].index = p2;
8226 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8228 specs[count] = tmpl;
8229 specs[count++].index = CURR_SLOT.qp_regno;
8231 if (idesc->operands[1] == IA64_OPND_PR)
8233 for (i = 16; i < 63; i++)
8235 specs[count] = tmpl;
8236 specs[count++].index = i;
8248 /* Verify that the instruction is using the PSR bit indicated in
8252 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8254 if (dep->regindex < 6)
8256 specs[count++] = tmpl;
8259 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8261 if (dep->regindex < 32
8262 || dep->regindex == 35
8263 || dep->regindex == 36
8264 || (!rsrc_write && dep->regindex == PSR_CPL))
8266 specs[count++] = tmpl;
8269 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8271 if (dep->regindex < 32
8272 || dep->regindex == 35
8273 || dep->regindex == 36
8274 || (rsrc_write && dep->regindex == PSR_CPL))
8276 specs[count++] = tmpl;
8281 /* Several PSR bits have very specific dependencies. */
8282 switch (dep->regindex)
8285 specs[count++] = tmpl;
8290 specs[count++] = tmpl;
8294 /* Only certain CR accesses use PSR.ic */
8295 if (idesc->operands[0] == IA64_OPND_CR3
8296 || idesc->operands[1] == IA64_OPND_CR3)
8299 ((idesc->operands[0] == IA64_OPND_CR3)
8302 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8317 specs[count++] = tmpl;
8326 specs[count++] = tmpl;
8330 /* Only some AR accesses use cpl */
8331 if (idesc->operands[0] == IA64_OPND_AR3
8332 || idesc->operands[1] == IA64_OPND_AR3)
8335 ((idesc->operands[0] == IA64_OPND_AR3)
8338 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8345 && regno <= AR_K7))))
8347 specs[count++] = tmpl;
8352 specs[count++] = tmpl;
8362 if (idesc->operands[0] == IA64_OPND_IMMU24)
8364 mask = CURR_SLOT.opnd[0].X_add_number;
8370 if (mask & ((valueT) 1 << dep->regindex))
8372 specs[count++] = tmpl;
8377 int min = dep->regindex == PSR_DFL ? 2 : 32;
8378 int max = dep->regindex == PSR_DFL ? 31 : 127;
8379 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8380 for (i = 0; i < NELEMS (idesc->operands); i++)
8382 if (idesc->operands[i] == IA64_OPND_F1
8383 || idesc->operands[i] == IA64_OPND_F2
8384 || idesc->operands[i] == IA64_OPND_F3
8385 || idesc->operands[i] == IA64_OPND_F4)
8387 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8388 if (reg >= min && reg <= max)
8390 specs[count++] = tmpl;
8397 int min = dep->regindex == PSR_MFL ? 2 : 32;
8398 int max = dep->regindex == PSR_MFL ? 31 : 127;
8399 /* mfh is read on writes to FR32-127; mfl is read on writes to
8401 for (i = 0; i < idesc->num_outputs; i++)
8403 if (idesc->operands[i] == IA64_OPND_F1)
8405 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8406 if (reg >= min && reg <= max)
8408 specs[count++] = tmpl;
8413 else if (note == 10)
8415 for (i = 0; i < NELEMS (idesc->operands); i++)
8417 if (idesc->operands[i] == IA64_OPND_R1
8418 || idesc->operands[i] == IA64_OPND_R2
8419 || idesc->operands[i] == IA64_OPND_R3)
8421 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8422 if (regno >= 16 && regno <= 31)
8424 specs[count++] = tmpl;
8435 case IA64_RS_AR_FPSR:
8436 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8438 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8439 if (regno == AR_FPSR)
8441 specs[count++] = tmpl;
8446 specs[count++] = tmpl;
8451 /* Handle all AR[REG] resources */
8452 if (note == 0 || note == 1)
8454 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8455 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8456 && regno == dep->regindex)
8458 specs[count++] = tmpl;
8460 /* other AR[REG] resources may be affected by AR accesses */
8461 else if (idesc->operands[0] == IA64_OPND_AR3)
8464 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8465 switch (dep->regindex)
8471 if (regno == AR_BSPSTORE)
8473 specs[count++] = tmpl;
8477 (regno == AR_BSPSTORE
8478 || regno == AR_RNAT))
8480 specs[count++] = tmpl;
8485 else if (idesc->operands[1] == IA64_OPND_AR3)
8488 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8489 switch (dep->regindex)
8494 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8496 specs[count++] = tmpl;
8503 specs[count++] = tmpl;
8513 /* Handle all CR[REG] resources */
8514 if (note == 0 || note == 1)
8516 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8518 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8519 if (regno == dep->regindex)
8521 specs[count++] = tmpl;
8523 else if (!rsrc_write)
8525 /* Reads from CR[IVR] affect other resources. */
8526 if (regno == CR_IVR)
8528 if ((dep->regindex >= CR_IRR0
8529 && dep->regindex <= CR_IRR3)
8530 || dep->regindex == CR_TPR)
8532 specs[count++] = tmpl;
8539 specs[count++] = tmpl;
8548 case IA64_RS_INSERVICE:
8549 /* look for write of EOI (67) or read of IVR (65) */
8550 if ((idesc->operands[0] == IA64_OPND_CR3
8551 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8552 || (idesc->operands[1] == IA64_OPND_CR3
8553 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8555 specs[count++] = tmpl;
8562 specs[count++] = tmpl;
8573 specs[count++] = tmpl;
8577 /* Check if any of the registers accessed are in the rotating region.
8578 mov to/from pr accesses CFM only when qp_regno is in the rotating
8580 for (i = 0; i < NELEMS (idesc->operands); i++)
8582 if (idesc->operands[i] == IA64_OPND_R1
8583 || idesc->operands[i] == IA64_OPND_R2
8584 || idesc->operands[i] == IA64_OPND_R3)
8586 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8587 /* Assumes that md.rot.num_regs is always valid */
8588 if (md.rot.num_regs > 0
8590 && num < 31 + md.rot.num_regs)
8592 specs[count] = tmpl;
8593 specs[count++].specific = 0;
8596 else if (idesc->operands[i] == IA64_OPND_F1
8597 || idesc->operands[i] == IA64_OPND_F2
8598 || idesc->operands[i] == IA64_OPND_F3
8599 || idesc->operands[i] == IA64_OPND_F4)
8601 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8604 specs[count] = tmpl;
8605 specs[count++].specific = 0;
8608 else if (idesc->operands[i] == IA64_OPND_P1
8609 || idesc->operands[i] == IA64_OPND_P2)
8611 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8614 specs[count] = tmpl;
8615 specs[count++].specific = 0;
8619 if (CURR_SLOT.qp_regno > 15)
8621 specs[count] = tmpl;
8622 specs[count++].specific = 0;
8627 /* This is the same as IA64_RS_PRr, except simplified to account for
8628 the fact that there is only one register. */
8632 specs[count++] = tmpl;
8637 if (idesc->operands[2] == IA64_OPND_IMM17)
8638 mask = CURR_SLOT.opnd[2].X_add_number;
8639 if (mask & ((valueT) 1 << 63))
8640 specs[count++] = tmpl;
8642 else if (note == 11)
8644 if ((idesc->operands[0] == IA64_OPND_P1
8645 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8646 || (idesc->operands[1] == IA64_OPND_P2
8647 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8649 specs[count++] = tmpl;
8652 else if (note == 12)
8654 if (CURR_SLOT.qp_regno == 63)
8656 specs[count++] = tmpl;
8663 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8664 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8665 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8666 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8669 && (idesc->operands[0] == IA64_OPND_P1
8670 || idesc->operands[0] == IA64_OPND_P2))
8672 specs[count] = tmpl;
8673 specs[count++].cmp_type =
8674 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8677 && (idesc->operands[1] == IA64_OPND_P1
8678 || idesc->operands[1] == IA64_OPND_P2))
8680 specs[count] = tmpl;
8681 specs[count++].cmp_type =
8682 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8687 if (CURR_SLOT.qp_regno == 63)
8689 specs[count++] = tmpl;
8700 /* FIXME we can identify some individual RSE written resources, but RSE
8701 read resources have not yet been completely identified, so for now
8702 treat RSE as a single resource */
8703 if (strncmp (idesc->name, "mov", 3) == 0)
8707 if (idesc->operands[0] == IA64_OPND_AR3
8708 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8710 specs[count] = tmpl;
8711 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8716 if (idesc->operands[0] == IA64_OPND_AR3)
8718 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8719 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8721 specs[count++] = tmpl;
8724 else if (idesc->operands[1] == IA64_OPND_AR3)
8726 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8727 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8728 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8730 specs[count++] = tmpl;
8737 specs[count++] = tmpl;
8742 /* FIXME -- do any of these need to be non-specific? */
8743 specs[count++] = tmpl;
8747 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8754 /* Clear branch flags on marked resources. This breaks the link between the
8755 QP of the marking instruction and a subsequent branch on the same QP. */
8758 clear_qp_branch_flag (mask)
8762 for (i = 0; i < regdepslen; i++)
8764 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8765 if ((bit & mask) != 0)
8767 regdeps[i].link_to_qp_branch = 0;
8772 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8773 any mutexes which contain one of the PRs and create new ones when
8777 update_qp_mutex (valueT mask)
8783 while (i < qp_mutexeslen)
8785 if ((qp_mutexes[i].prmask & mask) != 0)
8787 /* If it destroys and creates the same mutex, do nothing. */
8788 if (qp_mutexes[i].prmask == mask
8789 && qp_mutexes[i].path == md.path)
8800 fprintf (stderr, " Clearing mutex relation");
8801 print_prmask (qp_mutexes[i].prmask);
8802 fprintf (stderr, "\n");
8805 /* Deal with the old mutex with more than 3+ PRs only if
8806 the new mutex on the same execution path with it.
8808 FIXME: The 3+ mutex support is incomplete.
8809 dot_pred_rel () may be a better place to fix it. */
8810 if (qp_mutexes[i].path == md.path)
8812 /* If it is a proper subset of the mutex, create a
8815 && (qp_mutexes[i].prmask & mask) == mask)
8818 qp_mutexes[i].prmask &= ~mask;
8819 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8821 /* Modify the mutex if there are more than one
8829 /* Remove the mutex. */
8830 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8838 add_qp_mutex (mask);
8843 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8845 Any changes to a PR clears the mutex relations which include that PR. */
8848 clear_qp_mutex (mask)
8854 while (i < qp_mutexeslen)
8856 if ((qp_mutexes[i].prmask & mask) != 0)
8860 fprintf (stderr, " Clearing mutex relation");
8861 print_prmask (qp_mutexes[i].prmask);
8862 fprintf (stderr, "\n");
8864 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8871 /* Clear implies relations which contain PRs in the given masks.
8872 P1_MASK indicates the source of the implies relation, while P2_MASK
8873 indicates the implied PR. */
8876 clear_qp_implies (p1_mask, p2_mask)
8883 while (i < qp_implieslen)
8885 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8886 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8889 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8890 qp_implies[i].p1, qp_implies[i].p2);
8891 qp_implies[i] = qp_implies[--qp_implieslen];
8898 /* Add the PRs specified to the list of implied relations. */
8901 add_qp_imply (p1, p2)
8908 /* p0 is not meaningful here. */
8909 if (p1 == 0 || p2 == 0)
8915 /* If it exists already, ignore it. */
8916 for (i = 0; i < qp_implieslen; i++)
8918 if (qp_implies[i].p1 == p1
8919 && qp_implies[i].p2 == p2
8920 && qp_implies[i].path == md.path
8921 && !qp_implies[i].p2_branched)
8925 if (qp_implieslen == qp_impliestotlen)
8927 qp_impliestotlen += 20;
8928 qp_implies = (struct qp_imply *)
8929 xrealloc ((void *) qp_implies,
8930 qp_impliestotlen * sizeof (struct qp_imply));
8933 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
8934 qp_implies[qp_implieslen].p1 = p1;
8935 qp_implies[qp_implieslen].p2 = p2;
8936 qp_implies[qp_implieslen].path = md.path;
8937 qp_implies[qp_implieslen++].p2_branched = 0;
8939 /* Add in the implied transitive relations; for everything that p2 implies,
8940 make p1 imply that, too; for everything that implies p1, make it imply p2
8942 for (i = 0; i < qp_implieslen; i++)
8944 if (qp_implies[i].p1 == p2)
8945 add_qp_imply (p1, qp_implies[i].p2);
8946 if (qp_implies[i].p2 == p1)
8947 add_qp_imply (qp_implies[i].p1, p2);
8949 /* Add in mutex relations implied by this implies relation; for each mutex
8950 relation containing p2, duplicate it and replace p2 with p1. */
8951 bit = (valueT) 1 << p1;
8952 mask = (valueT) 1 << p2;
8953 for (i = 0; i < qp_mutexeslen; i++)
8955 if (qp_mutexes[i].prmask & mask)
8956 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
8960 /* Add the PRs specified in the mask to the mutex list; this means that only
8961 one of the PRs can be true at any time. PR0 should never be included in
8971 if (qp_mutexeslen == qp_mutexestotlen)
8973 qp_mutexestotlen += 20;
8974 qp_mutexes = (struct qpmutex *)
8975 xrealloc ((void *) qp_mutexes,
8976 qp_mutexestotlen * sizeof (struct qpmutex));
8980 fprintf (stderr, " Registering mutex on");
8981 print_prmask (mask);
8982 fprintf (stderr, "\n");
8984 qp_mutexes[qp_mutexeslen].path = md.path;
8985 qp_mutexes[qp_mutexeslen++].prmask = mask;
8989 has_suffix_p (name, suffix)
8993 size_t namelen = strlen (name);
8994 size_t sufflen = strlen (suffix);
8996 if (namelen <= sufflen)
8998 return strcmp (name + namelen - sufflen, suffix) == 0;
9002 clear_register_values ()
9006 fprintf (stderr, " Clearing register values\n");
9007 for (i = 1; i < NELEMS (gr_values); i++)
9008 gr_values[i].known = 0;
9011 /* Keep track of register values/changes which affect DV tracking.
9013 optimization note: should add a flag to classes of insns where otherwise we
9014 have to examine a group of strings to identify them. */
9017 note_register_values (idesc)
9018 struct ia64_opcode *idesc;
9020 valueT qp_changemask = 0;
9023 /* Invalidate values for registers being written to. */
9024 for (i = 0; i < idesc->num_outputs; i++)
9026 if (idesc->operands[i] == IA64_OPND_R1
9027 || idesc->operands[i] == IA64_OPND_R2
9028 || idesc->operands[i] == IA64_OPND_R3)
9030 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9031 if (regno > 0 && regno < NELEMS (gr_values))
9032 gr_values[regno].known = 0;
9034 else if (idesc->operands[i] == IA64_OPND_R3_2)
9036 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9037 if (regno > 0 && regno < 4)
9038 gr_values[regno].known = 0;
9040 else if (idesc->operands[i] == IA64_OPND_P1
9041 || idesc->operands[i] == IA64_OPND_P2)
9043 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9044 qp_changemask |= (valueT) 1 << regno;
9046 else if (idesc->operands[i] == IA64_OPND_PR)
9048 if (idesc->operands[2] & (valueT) 0x10000)
9049 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9051 qp_changemask = idesc->operands[2];
9054 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9056 if (idesc->operands[1] & ((valueT) 1 << 43))
9057 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9059 qp_changemask = idesc->operands[1];
9060 qp_changemask &= ~(valueT) 0xFFFF;
9065 /* Always clear qp branch flags on any PR change. */
9066 /* FIXME there may be exceptions for certain compares. */
9067 clear_qp_branch_flag (qp_changemask);
9069 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9070 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9072 qp_changemask |= ~(valueT) 0xFFFF;
9073 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9075 for (i = 32; i < 32 + md.rot.num_regs; i++)
9076 gr_values[i].known = 0;
9078 clear_qp_mutex (qp_changemask);
9079 clear_qp_implies (qp_changemask, qp_changemask);
9081 /* After a call, all register values are undefined, except those marked
9083 else if (strncmp (idesc->name, "br.call", 6) == 0
9084 || strncmp (idesc->name, "brl.call", 7) == 0)
9086 /* FIXME keep GR values which are marked as "safe_across_calls" */
9087 clear_register_values ();
9088 clear_qp_mutex (~qp_safe_across_calls);
9089 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9090 clear_qp_branch_flag (~qp_safe_across_calls);
9092 else if (is_interruption_or_rfi (idesc)
9093 || is_taken_branch (idesc))
9095 clear_register_values ();
9096 clear_qp_mutex (~(valueT) 0);
9097 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9099 /* Look for mutex and implies relations. */
9100 else if ((idesc->operands[0] == IA64_OPND_P1
9101 || idesc->operands[0] == IA64_OPND_P2)
9102 && (idesc->operands[1] == IA64_OPND_P1
9103 || idesc->operands[1] == IA64_OPND_P2))
9105 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9106 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9107 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9108 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9110 /* If both PRs are PR0, we can't really do anything. */
9111 if (p1 == 0 && p2 == 0)
9114 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9116 /* In general, clear mutexes and implies which include P1 or P2,
9117 with the following exceptions. */
9118 else if (has_suffix_p (idesc->name, ".or.andcm")
9119 || has_suffix_p (idesc->name, ".and.orcm"))
9121 clear_qp_implies (p2mask, p1mask);
9123 else if (has_suffix_p (idesc->name, ".andcm")
9124 || has_suffix_p (idesc->name, ".and"))
9126 clear_qp_implies (0, p1mask | p2mask);
9128 else if (has_suffix_p (idesc->name, ".orcm")
9129 || has_suffix_p (idesc->name, ".or"))
9131 clear_qp_mutex (p1mask | p2mask);
9132 clear_qp_implies (p1mask | p2mask, 0);
9138 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9140 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9141 if (p1 == 0 || p2 == 0)
9142 clear_qp_mutex (p1mask | p2mask);
9144 added = update_qp_mutex (p1mask | p2mask);
9146 if (CURR_SLOT.qp_regno == 0
9147 || has_suffix_p (idesc->name, ".unc"))
9149 if (added == 0 && p1 && p2)
9150 add_qp_mutex (p1mask | p2mask);
9151 if (CURR_SLOT.qp_regno != 0)
9154 add_qp_imply (p1, CURR_SLOT.qp_regno);
9156 add_qp_imply (p2, CURR_SLOT.qp_regno);
9161 /* Look for mov imm insns into GRs. */
9162 else if (idesc->operands[0] == IA64_OPND_R1
9163 && (idesc->operands[1] == IA64_OPND_IMM22
9164 || idesc->operands[1] == IA64_OPND_IMMU64)
9165 && (strcmp (idesc->name, "mov") == 0
9166 || strcmp (idesc->name, "movl") == 0))
9168 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9169 if (regno > 0 && regno < NELEMS (gr_values))
9171 gr_values[regno].known = 1;
9172 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9173 gr_values[regno].path = md.path;
9176 fprintf (stderr, " Know gr%d = ", regno);
9177 fprintf_vma (stderr, gr_values[regno].value);
9178 fputs ("\n", stderr);
9184 clear_qp_mutex (qp_changemask);
9185 clear_qp_implies (qp_changemask, qp_changemask);
9189 /* Return whether the given predicate registers are currently mutex. */
9192 qp_mutex (p1, p2, path)
9202 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9203 for (i = 0; i < qp_mutexeslen; i++)
9205 if (qp_mutexes[i].path >= path
9206 && (qp_mutexes[i].prmask & mask) == mask)
9213 /* Return whether the given resource is in the given insn's list of chks
9214 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9218 resources_match (rs, idesc, note, qp_regno, path)
9220 struct ia64_opcode *idesc;
9225 struct rsrc specs[MAX_SPECS];
9228 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9229 we don't need to check. One exception is note 11, which indicates that
9230 target predicates are written regardless of PR[qp]. */
9231 if (qp_mutex (rs->qp_regno, qp_regno, path)
9235 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9238 /* UNAT checking is a bit more specific than other resources */
9239 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9240 && specs[count].mem_offset.hint
9241 && rs->mem_offset.hint)
9243 if (rs->mem_offset.base == specs[count].mem_offset.base)
9245 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9246 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9253 /* Skip apparent PR write conflicts where both writes are an AND or both
9254 writes are an OR. */
9255 if (rs->dependency->specifier == IA64_RS_PR
9256 || rs->dependency->specifier == IA64_RS_PRr
9257 || rs->dependency->specifier == IA64_RS_PR63)
9259 if (specs[count].cmp_type != CMP_NONE
9260 && specs[count].cmp_type == rs->cmp_type)
9263 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9264 dv_mode[rs->dependency->mode],
9265 rs->dependency->specifier != IA64_RS_PR63 ?
9266 specs[count].index : 63);
9271 " %s on parallel compare conflict %s vs %s on PR%d\n",
9272 dv_mode[rs->dependency->mode],
9273 dv_cmp_type[rs->cmp_type],
9274 dv_cmp_type[specs[count].cmp_type],
9275 rs->dependency->specifier != IA64_RS_PR63 ?
9276 specs[count].index : 63);
9280 /* If either resource is not specific, conservatively assume a conflict
9282 if (!specs[count].specific || !rs->specific)
9284 else if (specs[count].index == rs->index)
9289 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9295 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9296 insert a stop to create the break. Update all resource dependencies
9297 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9298 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9299 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9303 insn_group_break (insert_stop, qp_regno, save_current)
9310 if (insert_stop && md.num_slots_in_use > 0)
9311 PREV_SLOT.end_of_insn_group = 1;
9315 fprintf (stderr, " Insn group break%s",
9316 (insert_stop ? " (w/stop)" : ""));
9318 fprintf (stderr, " effective for QP=%d", qp_regno);
9319 fprintf (stderr, "\n");
9323 while (i < regdepslen)
9325 const struct ia64_dependency *dep = regdeps[i].dependency;
9328 && regdeps[i].qp_regno != qp_regno)
9335 && CURR_SLOT.src_file == regdeps[i].file
9336 && CURR_SLOT.src_line == regdeps[i].line)
9342 /* clear dependencies which are automatically cleared by a stop, or
9343 those that have reached the appropriate state of insn serialization */
9344 if (dep->semantics == IA64_DVS_IMPLIED
9345 || dep->semantics == IA64_DVS_IMPLIEDF
9346 || regdeps[i].insn_srlz == STATE_SRLZ)
9348 print_dependency ("Removing", i);
9349 regdeps[i] = regdeps[--regdepslen];
9353 if (dep->semantics == IA64_DVS_DATA
9354 || dep->semantics == IA64_DVS_INSTR
9355 || dep->semantics == IA64_DVS_SPECIFIC)
9357 if (regdeps[i].insn_srlz == STATE_NONE)
9358 regdeps[i].insn_srlz = STATE_STOP;
9359 if (regdeps[i].data_srlz == STATE_NONE)
9360 regdeps[i].data_srlz = STATE_STOP;
9367 /* Add the given resource usage spec to the list of active dependencies. */
9370 mark_resource (idesc, dep, spec, depind, path)
9371 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9372 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9377 if (regdepslen == regdepstotlen)
9379 regdepstotlen += 20;
9380 regdeps = (struct rsrc *)
9381 xrealloc ((void *) regdeps,
9382 regdepstotlen * sizeof (struct rsrc));
9385 regdeps[regdepslen] = *spec;
9386 regdeps[regdepslen].depind = depind;
9387 regdeps[regdepslen].path = path;
9388 regdeps[regdepslen].file = CURR_SLOT.src_file;
9389 regdeps[regdepslen].line = CURR_SLOT.src_line;
9391 print_dependency ("Adding", regdepslen);
9397 print_dependency (action, depind)
9403 fprintf (stderr, " %s %s '%s'",
9404 action, dv_mode[(regdeps[depind].dependency)->mode],
9405 (regdeps[depind].dependency)->name);
9406 if (regdeps[depind].specific && regdeps[depind].index != 0)
9407 fprintf (stderr, " (%d)", regdeps[depind].index);
9408 if (regdeps[depind].mem_offset.hint)
9410 fputs (" ", stderr);
9411 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9412 fputs ("+", stderr);
9413 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9415 fprintf (stderr, "\n");
9420 instruction_serialization ()
9424 fprintf (stderr, " Instruction serialization\n");
9425 for (i = 0; i < regdepslen; i++)
9426 if (regdeps[i].insn_srlz == STATE_STOP)
9427 regdeps[i].insn_srlz = STATE_SRLZ;
9431 data_serialization ()
9435 fprintf (stderr, " Data serialization\n");
9436 while (i < regdepslen)
9438 if (regdeps[i].data_srlz == STATE_STOP
9439 /* Note: as of 991210, all "other" dependencies are cleared by a
9440 data serialization. This might change with new tables */
9441 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9443 print_dependency ("Removing", i);
9444 regdeps[i] = regdeps[--regdepslen];
9451 /* Insert stops and serializations as needed to avoid DVs. */
9454 remove_marked_resource (rs)
9457 switch (rs->dependency->semantics)
9459 case IA64_DVS_SPECIFIC:
9461 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9462 /* ...fall through... */
9463 case IA64_DVS_INSTR:
9465 fprintf (stderr, "Inserting instr serialization\n");
9466 if (rs->insn_srlz < STATE_STOP)
9467 insn_group_break (1, 0, 0);
9468 if (rs->insn_srlz < STATE_SRLZ)
9470 int oldqp = CURR_SLOT.qp_regno;
9471 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9472 /* Manually jam a srlz.i insn into the stream */
9473 CURR_SLOT.qp_regno = 0;
9474 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9475 instruction_serialization ();
9476 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9477 if (++md.num_slots_in_use >= NUM_SLOTS)
9479 CURR_SLOT.qp_regno = oldqp;
9480 CURR_SLOT.idesc = oldidesc;
9482 insn_group_break (1, 0, 0);
9484 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9485 "other" types of DV are eliminated
9486 by a data serialization */
9489 fprintf (stderr, "Inserting data serialization\n");
9490 if (rs->data_srlz < STATE_STOP)
9491 insn_group_break (1, 0, 0);
9493 int oldqp = CURR_SLOT.qp_regno;
9494 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9495 /* Manually jam a srlz.d insn into the stream */
9496 CURR_SLOT.qp_regno = 0;
9497 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9498 data_serialization ();
9499 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9500 if (++md.num_slots_in_use >= NUM_SLOTS)
9502 CURR_SLOT.qp_regno = oldqp;
9503 CURR_SLOT.idesc = oldidesc;
9506 case IA64_DVS_IMPLIED:
9507 case IA64_DVS_IMPLIEDF:
9509 fprintf (stderr, "Inserting stop\n");
9510 insn_group_break (1, 0, 0);
9517 /* Check the resources used by the given opcode against the current dependency
9520 The check is run once for each execution path encountered. In this case,
9521 a unique execution path is the sequence of instructions following a code
9522 entry point, e.g. the following has three execution paths, one starting
9523 at L0, one at L1, and one at L2.
9532 check_dependencies (idesc)
9533 struct ia64_opcode *idesc;
9535 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9539 /* Note that the number of marked resources may change within the
9540 loop if in auto mode. */
9542 while (i < regdepslen)
9544 struct rsrc *rs = ®deps[i];
9545 const struct ia64_dependency *dep = rs->dependency;
9550 if (dep->semantics == IA64_DVS_NONE
9551 || (chkind = depends_on (rs->depind, idesc)) == -1)
9557 note = NOTE (opdeps->chks[chkind]);
9559 /* Check this resource against each execution path seen thus far. */
9560 for (path = 0; path <= md.path; path++)
9564 /* If the dependency wasn't on the path being checked, ignore it. */
9565 if (rs->path < path)
9568 /* If the QP for this insn implies a QP which has branched, don't
9569 bother checking. Ed. NOTE: I don't think this check is terribly
9570 useful; what's the point of generating code which will only be
9571 reached if its QP is zero?
9572 This code was specifically inserted to handle the following code,
9573 based on notes from Intel's DV checking code, where p1 implies p2.
9579 if (CURR_SLOT.qp_regno != 0)
9583 for (implies = 0; implies < qp_implieslen; implies++)
9585 if (qp_implies[implies].path >= path
9586 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9587 && qp_implies[implies].p2_branched)
9597 if ((matchtype = resources_match (rs, idesc, note,
9598 CURR_SLOT.qp_regno, path)) != 0)
9601 char pathmsg[256] = "";
9602 char indexmsg[256] = "";
9603 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9606 sprintf (pathmsg, " when entry is at label '%s'",
9607 md.entry_labels[path - 1]);
9608 if (rs->specific && rs->index != 0)
9609 sprintf (indexmsg, ", specific resource number is %d",
9611 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9613 (certain ? "violates" : "may violate"),
9614 dv_mode[dep->mode], dep->name,
9615 dv_sem[dep->semantics],
9618 if (md.explicit_mode)
9620 as_warn ("%s", msg);
9622 as_warn (_("Only the first path encountering the conflict "
9624 as_warn_where (rs->file, rs->line,
9625 _("This is the location of the "
9626 "conflicting usage"));
9627 /* Don't bother checking other paths, to avoid duplicating
9634 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9636 remove_marked_resource (rs);
9638 /* since the set of dependencies has changed, start over */
9639 /* FIXME -- since we're removing dvs as we go, we
9640 probably don't really need to start over... */
9653 /* Register new dependencies based on the given opcode. */
9656 mark_resources (idesc)
9657 struct ia64_opcode *idesc;
9660 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9661 int add_only_qp_reads = 0;
9663 /* A conditional branch only uses its resources if it is taken; if it is
9664 taken, we stop following that path. The other branch types effectively
9665 *always* write their resources. If it's not taken, register only QP
9667 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9669 add_only_qp_reads = 1;
9673 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9675 for (i = 0; i < opdeps->nregs; i++)
9677 const struct ia64_dependency *dep;
9678 struct rsrc specs[MAX_SPECS];
9683 dep = ia64_find_dependency (opdeps->regs[i]);
9684 note = NOTE (opdeps->regs[i]);
9686 if (add_only_qp_reads
9687 && !(dep->mode == IA64_DV_WAR
9688 && (dep->specifier == IA64_RS_PR
9689 || dep->specifier == IA64_RS_PRr
9690 || dep->specifier == IA64_RS_PR63)))
9693 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9696 if (md.debug_dv && !count)
9697 fprintf (stderr, " No %s %s usage found (path %d)\n",
9698 dv_mode[dep->mode], dep->name, md.path);
9703 mark_resource (idesc, dep, &specs[count],
9704 DEP (opdeps->regs[i]), md.path);
9707 /* The execution path may affect register values, which may in turn
9708 affect which indirect-access resources are accessed. */
9709 switch (dep->specifier)
9721 for (path = 0; path < md.path; path++)
9723 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9725 mark_resource (idesc, dep, &specs[count],
9726 DEP (opdeps->regs[i]), path);
9733 /* Remove dependencies when they no longer apply. */
9736 update_dependencies (idesc)
9737 struct ia64_opcode *idesc;
9741 if (strcmp (idesc->name, "srlz.i") == 0)
9743 instruction_serialization ();
9745 else if (strcmp (idesc->name, "srlz.d") == 0)
9747 data_serialization ();
9749 else if (is_interruption_or_rfi (idesc)
9750 || is_taken_branch (idesc))
9752 /* Although technically the taken branch doesn't clear dependencies
9753 which require a srlz.[id], we don't follow the branch; the next
9754 instruction is assumed to start with a clean slate. */
9758 else if (is_conditional_branch (idesc)
9759 && CURR_SLOT.qp_regno != 0)
9761 int is_call = strstr (idesc->name, ".call") != NULL;
9763 for (i = 0; i < qp_implieslen; i++)
9765 /* If the conditional branch's predicate is implied by the predicate
9766 in an existing dependency, remove that dependency. */
9767 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9770 /* Note that this implied predicate takes a branch so that if
9771 a later insn generates a DV but its predicate implies this
9772 one, we can avoid the false DV warning. */
9773 qp_implies[i].p2_branched = 1;
9774 while (depind < regdepslen)
9776 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9778 print_dependency ("Removing", depind);
9779 regdeps[depind] = regdeps[--regdepslen];
9786 /* Any marked resources which have this same predicate should be
9787 cleared, provided that the QP hasn't been modified between the
9788 marking instruction and the branch. */
9791 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9796 while (i < regdepslen)
9798 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9799 && regdeps[i].link_to_qp_branch
9800 && (regdeps[i].file != CURR_SLOT.src_file
9801 || regdeps[i].line != CURR_SLOT.src_line))
9803 /* Treat like a taken branch */
9804 print_dependency ("Removing", i);
9805 regdeps[i] = regdeps[--regdepslen];
9814 /* Examine the current instruction for dependency violations. */
9818 struct ia64_opcode *idesc;
9822 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9823 idesc->name, CURR_SLOT.src_line,
9824 idesc->dependencies->nchks,
9825 idesc->dependencies->nregs);
9828 /* Look through the list of currently marked resources; if the current
9829 instruction has the dependency in its chks list which uses that resource,
9830 check against the specific resources used. */
9831 check_dependencies (idesc);
9833 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9834 then add them to the list of marked resources. */
9835 mark_resources (idesc);
9837 /* There are several types of dependency semantics, and each has its own
9838 requirements for being cleared
9840 Instruction serialization (insns separated by interruption, rfi, or
9841 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9843 Data serialization (instruction serialization, or writer + srlz.d +
9844 reader, where writer and srlz.d are in separate groups) clears
9845 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9846 always be the case).
9848 Instruction group break (groups separated by stop, taken branch,
9849 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9851 update_dependencies (idesc);
9853 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9854 warning. Keep track of as many as possible that are useful. */
9855 note_register_values (idesc);
9857 /* We don't need or want this anymore. */
9858 md.mem_offset.hint = 0;
9863 /* Translate one line of assembly. Pseudo ops and labels do not show
9869 char *saved_input_line_pointer, *mnemonic;
9870 const struct pseudo_opcode *pdesc;
9871 struct ia64_opcode *idesc;
9872 unsigned char qp_regno;
9876 saved_input_line_pointer = input_line_pointer;
9877 input_line_pointer = str;
9879 /* extract the opcode (mnemonic): */
9881 mnemonic = input_line_pointer;
9882 ch = get_symbol_end ();
9883 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9886 *input_line_pointer = ch;
9887 (*pdesc->handler) (pdesc->arg);
9891 /* Find the instruction descriptor matching the arguments. */
9893 idesc = ia64_find_opcode (mnemonic);
9894 *input_line_pointer = ch;
9897 as_bad ("Unknown opcode `%s'", mnemonic);
9901 idesc = parse_operands (idesc);
9905 /* Handle the dynamic ops we can handle now: */
9906 if (idesc->type == IA64_TYPE_DYN)
9908 if (strcmp (idesc->name, "add") == 0)
9910 if (CURR_SLOT.opnd[2].X_op == O_register
9911 && CURR_SLOT.opnd[2].X_add_number < 4)
9915 ia64_free_opcode (idesc);
9916 idesc = ia64_find_opcode (mnemonic);
9918 know (!idesc->next);
9921 else if (strcmp (idesc->name, "mov") == 0)
9923 enum ia64_opnd opnd1, opnd2;
9926 opnd1 = idesc->operands[0];
9927 opnd2 = idesc->operands[1];
9928 if (opnd1 == IA64_OPND_AR3)
9930 else if (opnd2 == IA64_OPND_AR3)
9934 if (CURR_SLOT.opnd[rop].X_op == O_register
9935 && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
9939 ia64_free_opcode (idesc);
9940 idesc = ia64_find_opcode (mnemonic);
9941 while (idesc != NULL
9942 && (idesc->operands[0] != opnd1
9943 || idesc->operands[1] != opnd2))
9944 idesc = get_next_opcode (idesc);
9949 if (md.qp.X_op == O_register)
9951 qp_regno = md.qp.X_add_number - REG_P;
9952 md.qp.X_op = O_absent;
9955 flags = idesc->flags;
9957 if ((flags & IA64_OPCODE_FIRST) != 0)
9958 insn_group_break (1, 0, 0);
9960 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
9962 as_bad ("`%s' cannot be predicated", idesc->name);
9966 /* Build the instruction. */
9967 CURR_SLOT.qp_regno = qp_regno;
9968 CURR_SLOT.idesc = idesc;
9969 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
9970 dwarf2_where (&CURR_SLOT.debug_line);
9972 /* Add unwind entry, if there is one. */
9973 if (unwind.current_entry)
9975 CURR_SLOT.unwind_record = unwind.current_entry;
9976 unwind.current_entry = NULL;
9979 /* Check for dependency violations. */
9983 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9984 if (++md.num_slots_in_use >= NUM_SLOTS)
9987 if ((flags & IA64_OPCODE_LAST) != 0)
9988 insn_group_break (1, 0, 0);
9990 md.last_text_seg = now_seg;
9993 input_line_pointer = saved_input_line_pointer;
9996 /* Called when symbol NAME cannot be found in the symbol table.
9997 Should be used for dynamic valued symbols only. */
10000 md_undefined_symbol (name)
10001 char *name ATTRIBUTE_UNUSED;
10006 /* Called for any expression that can not be recognized. When the
10007 function is called, `input_line_pointer' will point to the start of
10014 enum pseudo_type pseudo_type;
10019 switch (*input_line_pointer)
10022 /* Find what relocation pseudo-function we're dealing with. */
10024 ch = *++input_line_pointer;
10025 for (i = 0; i < NELEMS (pseudo_func); ++i)
10026 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10028 len = strlen (pseudo_func[i].name);
10029 if (strncmp (pseudo_func[i].name + 1,
10030 input_line_pointer + 1, len - 1) == 0
10031 && !is_part_of_name (input_line_pointer[len]))
10033 input_line_pointer += len;
10034 pseudo_type = pseudo_func[i].type;
10038 switch (pseudo_type)
10040 case PSEUDO_FUNC_RELOC:
10041 SKIP_WHITESPACE ();
10042 if (*input_line_pointer != '(')
10044 as_bad ("Expected '('");
10048 ++input_line_pointer;
10050 if (*input_line_pointer++ != ')')
10052 as_bad ("Missing ')'");
10055 if (e->X_op != O_symbol)
10057 if (e->X_op != O_pseudo_fixup)
10059 as_bad ("Not a symbolic expression");
10062 if (i != FUNC_LT_RELATIVE)
10064 as_bad ("Illegal combination of relocation functions");
10067 switch (S_GET_VALUE (e->X_op_symbol))
10069 case FUNC_FPTR_RELATIVE:
10070 i = FUNC_LT_FPTR_RELATIVE; break;
10071 case FUNC_DTP_MODULE:
10072 i = FUNC_LT_DTP_MODULE; break;
10073 case FUNC_DTP_RELATIVE:
10074 i = FUNC_LT_DTP_RELATIVE; break;
10075 case FUNC_TP_RELATIVE:
10076 i = FUNC_LT_TP_RELATIVE; break;
10078 as_bad ("Illegal combination of relocation functions");
10082 /* Make sure gas doesn't get rid of local symbols that are used
10084 e->X_op = O_pseudo_fixup;
10085 e->X_op_symbol = pseudo_func[i].u.sym;
10088 case PSEUDO_FUNC_CONST:
10089 e->X_op = O_constant;
10090 e->X_add_number = pseudo_func[i].u.ival;
10093 case PSEUDO_FUNC_REG:
10094 e->X_op = O_register;
10095 e->X_add_number = pseudo_func[i].u.ival;
10099 name = input_line_pointer - 1;
10101 as_bad ("Unknown pseudo function `%s'", name);
10107 ++input_line_pointer;
10109 if (*input_line_pointer != ']')
10111 as_bad ("Closing bracket misssing");
10116 if (e->X_op != O_register)
10117 as_bad ("Register expected as index");
10119 ++input_line_pointer;
10130 ignore_rest_of_line ();
10133 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10134 a section symbol plus some offset. For relocs involving @fptr(),
10135 directives we don't want such adjustments since we need to have the
10136 original symbol's name in the reloc. */
10138 ia64_fix_adjustable (fix)
10141 /* Prevent all adjustments to global symbols */
10142 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10145 switch (fix->fx_r_type)
10147 case BFD_RELOC_IA64_FPTR64I:
10148 case BFD_RELOC_IA64_FPTR32MSB:
10149 case BFD_RELOC_IA64_FPTR32LSB:
10150 case BFD_RELOC_IA64_FPTR64MSB:
10151 case BFD_RELOC_IA64_FPTR64LSB:
10152 case BFD_RELOC_IA64_LTOFF_FPTR22:
10153 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10163 ia64_force_relocation (fix)
10166 switch (fix->fx_r_type)
10168 case BFD_RELOC_IA64_FPTR64I:
10169 case BFD_RELOC_IA64_FPTR32MSB:
10170 case BFD_RELOC_IA64_FPTR32LSB:
10171 case BFD_RELOC_IA64_FPTR64MSB:
10172 case BFD_RELOC_IA64_FPTR64LSB:
10174 case BFD_RELOC_IA64_LTOFF22:
10175 case BFD_RELOC_IA64_LTOFF64I:
10176 case BFD_RELOC_IA64_LTOFF_FPTR22:
10177 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10178 case BFD_RELOC_IA64_PLTOFF22:
10179 case BFD_RELOC_IA64_PLTOFF64I:
10180 case BFD_RELOC_IA64_PLTOFF64MSB:
10181 case BFD_RELOC_IA64_PLTOFF64LSB:
10183 case BFD_RELOC_IA64_LTOFF22X:
10184 case BFD_RELOC_IA64_LDXMOV:
10191 return generic_force_reloc (fix);
10194 /* Decide from what point a pc-relative relocation is relative to,
10195 relative to the pc-relative fixup. Er, relatively speaking. */
10197 ia64_pcrel_from_section (fix, sec)
10201 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10203 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10210 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10212 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10216 expr.X_op = O_pseudo_fixup;
10217 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10218 expr.X_add_number = 0;
10219 expr.X_add_symbol = symbol;
10220 emit_expr (&expr, size);
10223 /* This is called whenever some data item (not an instruction) needs a
10224 fixup. We pick the right reloc code depending on the byteorder
10225 currently in effect. */
10227 ia64_cons_fix_new (f, where, nbytes, exp)
10233 bfd_reloc_code_real_type code;
10238 /* There are no reloc for 8 and 16 bit quantities, but we allow
10239 them here since they will work fine as long as the expression
10240 is fully defined at the end of the pass over the source file. */
10241 case 1: code = BFD_RELOC_8; break;
10242 case 2: code = BFD_RELOC_16; break;
10244 if (target_big_endian)
10245 code = BFD_RELOC_IA64_DIR32MSB;
10247 code = BFD_RELOC_IA64_DIR32LSB;
10251 /* In 32-bit mode, data8 could mean function descriptors too. */
10252 if (exp->X_op == O_pseudo_fixup
10253 && exp->X_op_symbol
10254 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10255 && !(md.flags & EF_IA_64_ABI64))
10257 if (target_big_endian)
10258 code = BFD_RELOC_IA64_IPLTMSB;
10260 code = BFD_RELOC_IA64_IPLTLSB;
10261 exp->X_op = O_symbol;
10266 if (target_big_endian)
10267 code = BFD_RELOC_IA64_DIR64MSB;
10269 code = BFD_RELOC_IA64_DIR64LSB;
10274 if (exp->X_op == O_pseudo_fixup
10275 && exp->X_op_symbol
10276 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10278 if (target_big_endian)
10279 code = BFD_RELOC_IA64_IPLTMSB;
10281 code = BFD_RELOC_IA64_IPLTLSB;
10282 exp->X_op = O_symbol;
10288 as_bad ("Unsupported fixup size %d", nbytes);
10289 ignore_rest_of_line ();
10293 if (exp->X_op == O_pseudo_fixup)
10295 exp->X_op = O_symbol;
10296 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10297 /* ??? If code unchanged, unsupported. */
10300 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10301 /* We need to store the byte order in effect in case we're going
10302 to fix an 8 or 16 bit relocation (for which there no real
10303 relocs available). See md_apply_fix3(). */
10304 fix->tc_fix_data.bigendian = target_big_endian;
10307 /* Return the actual relocation we wish to associate with the pseudo
10308 reloc described by SYM and R_TYPE. SYM should be one of the
10309 symbols in the pseudo_func array, or NULL. */
10311 static bfd_reloc_code_real_type
10312 ia64_gen_real_reloc_type (sym, r_type)
10313 struct symbol *sym;
10314 bfd_reloc_code_real_type r_type;
10316 bfd_reloc_code_real_type new = 0;
10323 switch (S_GET_VALUE (sym))
10325 case FUNC_FPTR_RELATIVE:
10328 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10329 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10330 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10331 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10332 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10337 case FUNC_GP_RELATIVE:
10340 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10341 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10342 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10343 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10344 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10345 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10350 case FUNC_LT_RELATIVE:
10353 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10354 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10359 case FUNC_LT_RELATIVE_X:
10362 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10367 case FUNC_PC_RELATIVE:
10370 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10371 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10372 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10373 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10374 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10375 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10380 case FUNC_PLT_RELATIVE:
10383 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10384 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10385 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10386 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10391 case FUNC_SEC_RELATIVE:
10394 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10395 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10396 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10397 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10402 case FUNC_SEG_RELATIVE:
10405 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10406 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10407 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10408 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10413 case FUNC_LTV_RELATIVE:
10416 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10417 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10418 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10419 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10424 case FUNC_LT_FPTR_RELATIVE:
10427 case BFD_RELOC_IA64_IMM22:
10428 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10429 case BFD_RELOC_IA64_IMM64:
10430 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10436 case FUNC_TP_RELATIVE:
10439 case BFD_RELOC_IA64_IMM14:
10440 new = BFD_RELOC_IA64_TPREL14; break;
10441 case BFD_RELOC_IA64_IMM22:
10442 new = BFD_RELOC_IA64_TPREL22; break;
10443 case BFD_RELOC_IA64_IMM64:
10444 new = BFD_RELOC_IA64_TPREL64I; break;
10450 case FUNC_LT_TP_RELATIVE:
10453 case BFD_RELOC_IA64_IMM22:
10454 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10460 case FUNC_LT_DTP_MODULE:
10463 case BFD_RELOC_IA64_IMM22:
10464 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10470 case FUNC_DTP_RELATIVE:
10473 case BFD_RELOC_IA64_DIR64MSB:
10474 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10475 case BFD_RELOC_IA64_DIR64LSB:
10476 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10477 case BFD_RELOC_IA64_IMM14:
10478 new = BFD_RELOC_IA64_DTPREL14; break;
10479 case BFD_RELOC_IA64_IMM22:
10480 new = BFD_RELOC_IA64_DTPREL22; break;
10481 case BFD_RELOC_IA64_IMM64:
10482 new = BFD_RELOC_IA64_DTPREL64I; break;
10488 case FUNC_LT_DTP_RELATIVE:
10491 case BFD_RELOC_IA64_IMM22:
10492 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10498 case FUNC_IPLT_RELOC:
10505 /* Hmmmm. Should this ever occur? */
10512 /* Here is where generate the appropriate reloc for pseudo relocation
10515 ia64_validate_fix (fix)
10518 switch (fix->fx_r_type)
10520 case BFD_RELOC_IA64_FPTR64I:
10521 case BFD_RELOC_IA64_FPTR32MSB:
10522 case BFD_RELOC_IA64_FPTR64LSB:
10523 case BFD_RELOC_IA64_LTOFF_FPTR22:
10524 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10525 if (fix->fx_offset != 0)
10526 as_bad_where (fix->fx_file, fix->fx_line,
10527 "No addend allowed in @fptr() relocation");
10535 fix_insn (fix, odesc, value)
10537 const struct ia64_operand *odesc;
10540 bfd_vma insn[3], t0, t1, control_bits;
10545 slot = fix->fx_where & 0x3;
10546 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10548 /* Bundles are always in little-endian byte order */
10549 t0 = bfd_getl64 (fixpos);
10550 t1 = bfd_getl64 (fixpos + 8);
10551 control_bits = t0 & 0x1f;
10552 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10553 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10554 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10557 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10559 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10560 insn[2] |= (((value & 0x7f) << 13)
10561 | (((value >> 7) & 0x1ff) << 27)
10562 | (((value >> 16) & 0x1f) << 22)
10563 | (((value >> 21) & 0x1) << 21)
10564 | (((value >> 63) & 0x1) << 36));
10566 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10568 if (value & ~0x3fffffffffffffffULL)
10569 err = "integer operand out of range";
10570 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10571 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10573 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10576 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10577 insn[2] |= ((((value >> 59) & 0x1) << 36)
10578 | (((value >> 0) & 0xfffff) << 13));
10581 err = (*odesc->insert) (odesc, value, insn + slot);
10584 as_bad_where (fix->fx_file, fix->fx_line, err);
10586 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10587 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10588 number_to_chars_littleendian (fixpos + 0, t0, 8);
10589 number_to_chars_littleendian (fixpos + 8, t1, 8);
10592 /* Attempt to simplify or even eliminate a fixup. The return value is
10593 ignored; perhaps it was once meaningful, but now it is historical.
10594 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10596 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10600 md_apply_fix3 (fix, valP, seg)
10603 segT seg ATTRIBUTE_UNUSED;
10606 valueT value = *valP;
10608 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10612 switch (fix->fx_r_type)
10614 case BFD_RELOC_IA64_DIR32MSB:
10615 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10618 case BFD_RELOC_IA64_DIR32LSB:
10619 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10622 case BFD_RELOC_IA64_DIR64MSB:
10623 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10626 case BFD_RELOC_IA64_DIR64LSB:
10627 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10636 switch (fix->fx_r_type)
10638 case BFD_RELOC_UNUSED:
10639 /* This must be a TAG13 or TAG13b operand. There are no external
10640 relocs defined for them, so we must give an error. */
10641 as_bad_where (fix->fx_file, fix->fx_line,
10642 "%s must have a constant value",
10643 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10647 case BFD_RELOC_IA64_TPREL14:
10648 case BFD_RELOC_IA64_TPREL22:
10649 case BFD_RELOC_IA64_TPREL64I:
10650 case BFD_RELOC_IA64_LTOFF_TPREL22:
10651 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10652 case BFD_RELOC_IA64_DTPREL14:
10653 case BFD_RELOC_IA64_DTPREL22:
10654 case BFD_RELOC_IA64_DTPREL64I:
10655 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10656 S_SET_THREAD_LOCAL (fix->fx_addsy);
10663 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10665 if (fix->tc_fix_data.bigendian)
10666 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10668 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10673 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10678 /* Generate the BFD reloc to be stuck in the object file from the
10679 fixup used internally in the assembler. */
10682 tc_gen_reloc (sec, fixp)
10683 asection *sec ATTRIBUTE_UNUSED;
10688 reloc = xmalloc (sizeof (*reloc));
10689 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10690 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10691 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10692 reloc->addend = fixp->fx_offset;
10693 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10697 as_bad_where (fixp->fx_file, fixp->fx_line,
10698 "Cannot represent %s relocation in object file",
10699 bfd_get_reloc_code_name (fixp->fx_r_type));
10704 /* Turn a string in input_line_pointer into a floating point constant
10705 of type TYPE, and store the appropriate bytes in *LIT. The number
10706 of LITTLENUMS emitted is stored in *SIZE. An error message is
10707 returned, or NULL on OK. */
10709 #define MAX_LITTLENUMS 5
10712 md_atof (type, lit, size)
10717 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10747 return "Bad call to MD_ATOF()";
10749 t = atof_ieee (input_line_pointer, type, words);
10751 input_line_pointer = t;
10753 (*ia64_float_to_chars) (lit, words, prec);
10757 /* It is 10 byte floating point with 6 byte padding. */
10758 memset (&lit [10], 0, 6);
10759 *size = 8 * sizeof (LITTLENUM_TYPE);
10762 *size = prec * sizeof (LITTLENUM_TYPE);
10767 /* Handle ia64 specific semantics of the align directive. */
10770 ia64_md_do_align (n, fill, len, max)
10771 int n ATTRIBUTE_UNUSED;
10772 const char *fill ATTRIBUTE_UNUSED;
10773 int len ATTRIBUTE_UNUSED;
10774 int max ATTRIBUTE_UNUSED;
10776 if (subseg_text_p (now_seg))
10777 ia64_flush_insns ();
10780 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10781 of an rs_align_code fragment. */
10784 ia64_handle_align (fragp)
10787 /* Use mfi bundle of nops with no stop bits. */
10788 static const unsigned char le_nop[]
10789 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10790 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10795 if (fragp->fr_type != rs_align_code)
10798 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10799 p = fragp->fr_literal + fragp->fr_fix;
10801 /* Make sure we are on a 16-byte boundary, in case someone has been
10802 putting data into a text section. */
10805 int fix = bytes & 15;
10806 memset (p, 0, fix);
10809 fragp->fr_fix += fix;
10812 /* Instruction bundles are always little-endian. */
10813 memcpy (p, le_nop, 16);
10814 fragp->fr_var = 16;
10818 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10823 number_to_chars_bigendian (lit, (long) (*words++),
10824 sizeof (LITTLENUM_TYPE));
10825 lit += sizeof (LITTLENUM_TYPE);
10830 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
10835 number_to_chars_littleendian (lit, (long) (words[prec]),
10836 sizeof (LITTLENUM_TYPE));
10837 lit += sizeof (LITTLENUM_TYPE);
10842 ia64_elf_section_change_hook (void)
10844 dot_byteorder (-1);
10847 /* Check if a label should be made global. */
10849 ia64_check_label (symbolS *label)
10851 if (*input_line_pointer == ':')
10853 S_SET_EXTERNAL (label);
10854 input_line_pointer++;
10858 /* Used to remember where .alias and .secalias directives are seen. We
10859 will rename symbol and section names when we are about to output
10860 the relocatable file. */
10863 char *file; /* The file where the directive is seen. */
10864 unsigned int line; /* The line number the directive is at. */
10865 const char *name; /* The orignale name of the symbol. */
10868 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10869 .secalias. Otherwise, it is .alias. */
10871 dot_alias (int section)
10873 char *name, *alias;
10877 const char *error_string;
10880 struct hash_control *ahash, *nhash;
10883 name = input_line_pointer;
10884 delim = get_symbol_end ();
10885 end_name = input_line_pointer;
10888 if (name == end_name)
10890 as_bad (_("expected symbol name"));
10891 discard_rest_of_line ();
10895 SKIP_WHITESPACE ();
10897 if (*input_line_pointer != ',')
10900 as_bad (_("expected comma after \"%s\""), name);
10902 ignore_rest_of_line ();
10906 input_line_pointer++;
10909 /* We call demand_copy_C_string to check if alias string is valid.
10910 There should be a closing `"' and no `\0' in the string. */
10911 alias = demand_copy_C_string (&len);
10914 ignore_rest_of_line ();
10918 /* Make a copy of name string. */
10919 len = strlen (name) + 1;
10920 obstack_grow (¬es, name, len);
10921 name = obstack_finish (¬es);
10926 ahash = secalias_hash;
10927 nhash = secalias_name_hash;
10932 ahash = alias_hash;
10933 nhash = alias_name_hash;
10936 /* Check if alias has been used before. */
10937 h = (struct alias *) hash_find (ahash, alias);
10940 if (strcmp (h->name, name))
10941 as_bad (_("`%s' is already the alias of %s `%s'"),
10942 alias, kind, h->name);
10946 /* Check if name already has an alias. */
10947 a = (const char *) hash_find (nhash, name);
10950 if (strcmp (a, alias))
10951 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
10955 h = (struct alias *) xmalloc (sizeof (struct alias));
10956 as_where (&h->file, &h->line);
10959 error_string = hash_jam (ahash, alias, (PTR) h);
10962 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10963 alias, kind, error_string);
10967 error_string = hash_jam (nhash, name, (PTR) alias);
10970 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
10971 alias, kind, error_string);
10973 obstack_free (¬es, name);
10974 obstack_free (¬es, alias);
10977 demand_empty_rest_of_line ();
10980 /* It renames the original symbol name to its alias. */
10982 do_alias (const char *alias, PTR value)
10984 struct alias *h = (struct alias *) value;
10985 symbolS *sym = symbol_find (h->name);
10988 as_warn_where (h->file, h->line,
10989 _("symbol `%s' aliased to `%s' is not used"),
10992 S_SET_NAME (sym, (char *) alias);
10995 /* Called from write_object_file. */
10997 ia64_adjust_symtab (void)
10999 hash_traverse (alias_hash, do_alias);
11002 /* It renames the original section name to its alias. */
11004 do_secalias (const char *alias, PTR value)
11006 struct alias *h = (struct alias *) value;
11007 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11010 as_warn_where (h->file, h->line,
11011 _("section `%s' aliased to `%s' is not used"),
11017 /* Called from write_object_file. */
11019 ia64_frob_file (void)
11021 hash_traverse (secalias_hash, do_secalias);