1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 /* The best template for a particular sequence of up to three
576 #define N IA64_NUM_TYPES
577 static unsigned char best_template[N][N][N];
580 /* Resource dependencies currently in effect */
582 int depind; /* dependency index */
583 const struct ia64_dependency *dependency; /* actual dependency */
584 unsigned specific:1, /* is this a specific bit/regno? */
585 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
586 int index; /* specific regno/bit within dependency */
587 int note; /* optional qualifying note (0 if none) */
591 int insn_srlz; /* current insn serialization state */
592 int data_srlz; /* current data serialization state */
593 int qp_regno; /* qualifying predicate for this usage */
594 char *file; /* what file marked this dependency */
595 unsigned int line; /* what line marked this dependency */
596 struct mem_offset mem_offset; /* optional memory offset hint */
597 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
598 int path; /* corresponding code entry index */
600 static int regdepslen = 0;
601 static int regdepstotlen = 0;
602 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
603 static const char *dv_sem[] = { "none", "implied", "impliedf",
604 "data", "instr", "specific", "stop", "other" };
605 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
607 /* Current state of PR mutexation */
608 static struct qpmutex {
611 } *qp_mutexes = NULL; /* QP mutex bitmasks */
612 static int qp_mutexeslen = 0;
613 static int qp_mutexestotlen = 0;
614 static valueT qp_safe_across_calls = 0;
616 /* Current state of PR implications */
617 static struct qp_imply {
620 unsigned p2_branched:1;
622 } *qp_implies = NULL;
623 static int qp_implieslen = 0;
624 static int qp_impliestotlen = 0;
626 /* Keep track of static GR values so that indirect register usage can
627 sometimes be tracked. */
632 } gr_values[128] = {{ 1, 0, 0 }};
634 /* Remember the alignment frag. */
635 static fragS *align_frag;
637 /* These are the routines required to output the various types of
640 /* A slot_number is a frag address plus the slot index (0-2). We use the
641 frag address here so that if there is a section switch in the middle of
642 a function, then instructions emitted to a different section are not
643 counted. Since there may be more than one frag for a function, this
644 means we also need to keep track of which frag this address belongs to
645 so we can compute inter-frag distances. This also nicely solves the
646 problem with nops emitted for align directives, which can't easily be
647 counted, but can easily be derived from frag sizes. */
649 typedef struct unw_rec_list {
651 unsigned long slot_number;
653 unsigned long next_slot_number;
654 fragS *next_slot_frag;
655 struct unw_rec_list *next;
658 #define SLOT_NUM_NOT_SET (unsigned)-1
660 /* Linked list of saved prologue counts. A very poor
661 implementation of a map from label numbers to prologue counts. */
662 typedef struct label_prologue_count
664 struct label_prologue_count *next;
665 unsigned long label_number;
666 unsigned int prologue_count;
667 } label_prologue_count;
671 /* Maintain a list of unwind entries for the current function. */
675 /* Any unwind entires that should be attached to the current slot
676 that an insn is being constructed for. */
677 unw_rec_list *current_entry;
679 /* These are used to create the unwind table entry for this function. */
682 symbolS *info; /* pointer to unwind info */
683 symbolS *personality_routine;
685 subsegT saved_text_subseg;
686 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
688 /* TRUE if processing unwind directives in a prologue region. */
691 unsigned int prologue_count; /* number of .prologues seen so far */
692 /* Prologue counts at previous .label_state directives. */
693 struct label_prologue_count * saved_prologue_counts;
696 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
698 /* Forward declarations: */
699 static void set_section PARAMS ((char *name));
700 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
701 unsigned int, unsigned int));
702 static void dot_align (int);
703 static void dot_radix PARAMS ((int));
704 static void dot_special_section PARAMS ((int));
705 static void dot_proc PARAMS ((int));
706 static void dot_fframe PARAMS ((int));
707 static void dot_vframe PARAMS ((int));
708 static void dot_vframesp PARAMS ((int));
709 static void dot_vframepsp PARAMS ((int));
710 static void dot_save PARAMS ((int));
711 static void dot_restore PARAMS ((int));
712 static void dot_restorereg PARAMS ((int));
713 static void dot_restorereg_p PARAMS ((int));
714 static void dot_handlerdata PARAMS ((int));
715 static void dot_unwentry PARAMS ((int));
716 static void dot_altrp PARAMS ((int));
717 static void dot_savemem PARAMS ((int));
718 static void dot_saveg PARAMS ((int));
719 static void dot_savef PARAMS ((int));
720 static void dot_saveb PARAMS ((int));
721 static void dot_savegf PARAMS ((int));
722 static void dot_spill PARAMS ((int));
723 static void dot_spillreg PARAMS ((int));
724 static void dot_spillmem PARAMS ((int));
725 static void dot_spillreg_p PARAMS ((int));
726 static void dot_spillmem_p PARAMS ((int));
727 static void dot_label_state PARAMS ((int));
728 static void dot_copy_state PARAMS ((int));
729 static void dot_unwabi PARAMS ((int));
730 static void dot_personality PARAMS ((int));
731 static void dot_body PARAMS ((int));
732 static void dot_prologue PARAMS ((int));
733 static void dot_endp PARAMS ((int));
734 static void dot_template PARAMS ((int));
735 static void dot_regstk PARAMS ((int));
736 static void dot_rot PARAMS ((int));
737 static void dot_byteorder PARAMS ((int));
738 static void dot_psr PARAMS ((int));
739 static void dot_alias PARAMS ((int));
740 static void dot_ln PARAMS ((int));
741 static char *parse_section_name PARAMS ((void));
742 static void dot_xdata PARAMS ((int));
743 static void stmt_float_cons PARAMS ((int));
744 static void stmt_cons_ua PARAMS ((int));
745 static void dot_xfloat_cons PARAMS ((int));
746 static void dot_xstringer PARAMS ((int));
747 static void dot_xdata_ua PARAMS ((int));
748 static void dot_xfloat_cons_ua PARAMS ((int));
749 static void print_prmask PARAMS ((valueT mask));
750 static void dot_pred_rel PARAMS ((int));
751 static void dot_reg_val PARAMS ((int));
752 static void dot_serialize PARAMS ((int));
753 static void dot_dv_mode PARAMS ((int));
754 static void dot_entry PARAMS ((int));
755 static void dot_mem_offset PARAMS ((int));
756 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
757 static symbolS *declare_register PARAMS ((const char *name, int regnum));
758 static void declare_register_set PARAMS ((const char *, int, int));
759 static unsigned int operand_width PARAMS ((enum ia64_opnd));
760 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
763 static int parse_operand PARAMS ((expressionS *e));
764 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
765 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
766 static void build_insn PARAMS ((struct slot *, bfd_vma *));
767 static void emit_one_bundle PARAMS ((void));
768 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
769 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
770 bfd_reloc_code_real_type r_type));
771 static void insn_group_break PARAMS ((int, int, int));
772 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
773 struct rsrc *, int depind, int path));
774 static void add_qp_mutex PARAMS((valueT mask));
775 static void add_qp_imply PARAMS((int p1, int p2));
776 static void clear_qp_branch_flag PARAMS((valueT mask));
777 static void clear_qp_mutex PARAMS((valueT mask));
778 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
779 static int has_suffix_p PARAMS((const char *, const char *));
780 static void clear_register_values PARAMS ((void));
781 static void print_dependency PARAMS ((const char *action, int depind));
782 static void instruction_serialization PARAMS ((void));
783 static void data_serialization PARAMS ((void));
784 static void remove_marked_resource PARAMS ((struct rsrc *));
785 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
786 static int is_taken_branch PARAMS ((struct ia64_opcode *));
787 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
788 static int depends_on PARAMS ((int, struct ia64_opcode *));
789 static int specify_resource PARAMS ((const struct ia64_dependency *,
790 struct ia64_opcode *, int, struct rsrc [], int, int));
791 static int check_dv PARAMS((struct ia64_opcode *idesc));
792 static void check_dependencies PARAMS((struct ia64_opcode *));
793 static void mark_resources PARAMS((struct ia64_opcode *));
794 static void update_dependencies PARAMS((struct ia64_opcode *));
795 static void note_register_values PARAMS((struct ia64_opcode *));
796 static int qp_mutex PARAMS ((int, int, int));
797 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
798 static void output_vbyte_mem PARAMS ((int, char *, char *));
799 static void count_output PARAMS ((int, char *, char *));
800 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
801 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
802 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
803 static void output_P1_format PARAMS ((vbyte_func, int));
804 static void output_P2_format PARAMS ((vbyte_func, int, int));
805 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
806 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
807 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
808 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
809 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
810 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
811 static void output_P9_format PARAMS ((vbyte_func, int, int));
812 static void output_P10_format PARAMS ((vbyte_func, int, int));
813 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
814 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
815 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
817 static char format_ab_reg PARAMS ((int, int));
818 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
820 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
821 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
823 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
824 static unw_rec_list *output_endp PARAMS ((void));
825 static unw_rec_list *output_prologue PARAMS ((void));
826 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list *output_body PARAMS ((void));
828 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
829 static unw_rec_list *output_mem_stack_v PARAMS ((void));
830 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
831 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
832 static unw_rec_list *output_rp_when PARAMS ((void));
833 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
834 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_pfs_when PARAMS ((void));
838 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_preds_when PARAMS ((void));
842 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
846 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
849 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
852 static unw_rec_list *output_unat_when PARAMS ((void));
853 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_lc_when PARAMS ((void));
857 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_fpsr_when PARAMS ((void));
861 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
865 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
866 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_bsp_when PARAMS ((void));
870 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bspstore_when PARAMS ((void));
874 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_rnat_when PARAMS ((void));
878 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
883 static unw_rec_list *output_label_state PARAMS ((unsigned long));
884 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
885 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
896 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
897 static int calc_record_size PARAMS ((unw_rec_list *));
898 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
899 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
900 unsigned long, fragS *,
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
907 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
908 static void free_saved_prologue_counts PARAMS ((void));
910 /* Determine if application register REGNUM resides only in the integer
911 unit (as opposed to the memory unit). */
913 ar_is_only_in_integer_unit (int reg)
916 return reg >= 64 && reg <= 111;
919 /* Determine if application register REGNUM resides only in the memory
920 unit (as opposed to the integer unit). */
922 ar_is_only_in_memory_unit (int reg)
925 return reg >= 0 && reg <= 47;
928 /* Switch to section NAME and create section if necessary. It's
929 rather ugly that we have to manipulate input_line_pointer but I
930 don't see any other way to accomplish the same thing without
931 changing obj-elf.c (which may be the Right Thing, in the end). */
936 char *saved_input_line_pointer;
938 saved_input_line_pointer = input_line_pointer;
939 input_line_pointer = name;
941 input_line_pointer = saved_input_line_pointer;
944 /* Map 's' to SHF_IA_64_SHORT. */
947 ia64_elf_section_letter (letter, ptr_msg)
952 return SHF_IA_64_SHORT;
953 else if (letter == 'o')
954 return SHF_LINK_ORDER;
956 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
960 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
963 ia64_elf_section_flags (flags, attr, type)
965 int attr, type ATTRIBUTE_UNUSED;
967 if (attr & SHF_IA_64_SHORT)
968 flags |= SEC_SMALL_DATA;
973 ia64_elf_section_type (str, len)
977 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
979 if (STREQ (ELF_STRING_ia64_unwind_info))
982 if (STREQ (ELF_STRING_ia64_unwind_info_once))
985 if (STREQ (ELF_STRING_ia64_unwind))
986 return SHT_IA_64_UNWIND;
988 if (STREQ (ELF_STRING_ia64_unwind_once))
989 return SHT_IA_64_UNWIND;
991 if (STREQ ("unwind"))
992 return SHT_IA_64_UNWIND;
994 if (STREQ ("init_array"))
995 return SHT_INIT_ARRAY;
997 if (STREQ ("fini_array"))
998 return SHT_FINI_ARRAY;
1005 set_regstack (ins, locs, outs, rots)
1006 unsigned int ins, locs, outs, rots;
1008 /* Size of frame. */
1011 sof = ins + locs + outs;
1014 as_bad ("Size of frame exceeds maximum of 96 registers");
1019 as_warn ("Size of rotating registers exceeds frame size");
1022 md.in.base = REG_GR + 32;
1023 md.loc.base = md.in.base + ins;
1024 md.out.base = md.loc.base + locs;
1026 md.in.num_regs = ins;
1027 md.loc.num_regs = locs;
1028 md.out.num_regs = outs;
1029 md.rot.num_regs = rots;
1036 struct label_fix *lfix;
1038 subsegT saved_subseg;
1041 if (!md.last_text_seg)
1044 saved_seg = now_seg;
1045 saved_subseg = now_subseg;
1047 subseg_set (md.last_text_seg, 0);
1049 while (md.num_slots_in_use > 0)
1050 emit_one_bundle (); /* force out queued instructions */
1052 /* In case there are labels following the last instruction, resolve
1054 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1056 S_SET_VALUE (lfix->sym, frag_now_fix ());
1057 symbol_set_frag (lfix->sym, frag_now);
1059 CURR_SLOT.label_fixups = 0;
1060 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1062 S_SET_VALUE (lfix->sym, frag_now_fix ());
1063 symbol_set_frag (lfix->sym, frag_now);
1065 CURR_SLOT.tag_fixups = 0;
1067 /* In case there are unwind directives following the last instruction,
1068 resolve those now. We only handle prologue, body, and endp directives
1069 here. Give an error for others. */
1070 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1072 switch (ptr->r.type)
1078 ptr->slot_number = (unsigned long) frag_more (0);
1079 ptr->slot_frag = frag_now;
1082 /* Allow any record which doesn't have a "t" field (i.e.,
1083 doesn't relate to a particular instruction). */
1099 as_bad (_("Unwind directive not followed by an instruction."));
1103 unwind.current_entry = NULL;
1105 subseg_set (saved_seg, saved_subseg);
1107 if (md.qp.X_op == O_register)
1108 as_bad ("qualifying predicate not followed by instruction");
1112 ia64_do_align (int nbytes)
1114 char *saved_input_line_pointer = input_line_pointer;
1116 input_line_pointer = "";
1117 s_align_bytes (nbytes);
1118 input_line_pointer = saved_input_line_pointer;
1122 ia64_cons_align (nbytes)
1127 char *saved_input_line_pointer = input_line_pointer;
1128 input_line_pointer = "";
1129 s_align_bytes (nbytes);
1130 input_line_pointer = saved_input_line_pointer;
1134 /* Output COUNT bytes to a memory location. */
1135 static unsigned char *vbyte_mem_ptr = NULL;
1138 output_vbyte_mem (count, ptr, comment)
1141 char *comment ATTRIBUTE_UNUSED;
1144 if (vbyte_mem_ptr == NULL)
1149 for (x = 0; x < count; x++)
1150 *(vbyte_mem_ptr++) = ptr[x];
1153 /* Count the number of bytes required for records. */
1154 static int vbyte_count = 0;
1156 count_output (count, ptr, comment)
1158 char *ptr ATTRIBUTE_UNUSED;
1159 char *comment ATTRIBUTE_UNUSED;
1161 vbyte_count += count;
1165 output_R1_format (f, rtype, rlen)
1167 unw_record_type rtype;
1174 output_R3_format (f, rtype, rlen);
1180 else if (rtype != prologue)
1181 as_bad ("record type is not valid");
1183 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1184 (*f) (1, &byte, NULL);
1188 output_R2_format (f, mask, grsave, rlen)
1195 mask = (mask & 0x0f);
1196 grsave = (grsave & 0x7f);
1198 bytes[0] = (UNW_R2 | (mask >> 1));
1199 bytes[1] = (((mask & 0x01) << 7) | grsave);
1200 count += output_leb128 (bytes + 2, rlen, 0);
1201 (*f) (count, bytes, NULL);
1205 output_R3_format (f, rtype, rlen)
1207 unw_record_type rtype;
1214 output_R1_format (f, rtype, rlen);
1220 else if (rtype != prologue)
1221 as_bad ("record type is not valid");
1222 bytes[0] = (UNW_R3 | r);
1223 count = output_leb128 (bytes + 1, rlen, 0);
1224 (*f) (count + 1, bytes, NULL);
1228 output_P1_format (f, brmask)
1233 byte = UNW_P1 | (brmask & 0x1f);
1234 (*f) (1, &byte, NULL);
1238 output_P2_format (f, brmask, gr)
1244 brmask = (brmask & 0x1f);
1245 bytes[0] = UNW_P2 | (brmask >> 1);
1246 bytes[1] = (((brmask & 1) << 7) | gr);
1247 (*f) (2, bytes, NULL);
1251 output_P3_format (f, rtype, reg)
1253 unw_record_type rtype;
1298 as_bad ("Invalid record type for P3 format.");
1300 bytes[0] = (UNW_P3 | (r >> 1));
1301 bytes[1] = (((r & 1) << 7) | reg);
1302 (*f) (2, bytes, NULL);
1306 output_P4_format (f, imask, imask_size)
1308 unsigned char *imask;
1309 unsigned long imask_size;
1312 (*f) (imask_size, imask, NULL);
1316 output_P5_format (f, grmask, frmask)
1319 unsigned long frmask;
1322 grmask = (grmask & 0x0f);
1325 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1326 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1327 bytes[3] = (frmask & 0x000000ff);
1328 (*f) (4, bytes, NULL);
1332 output_P6_format (f, rtype, rmask)
1334 unw_record_type rtype;
1340 if (rtype == gr_mem)
1342 else if (rtype != fr_mem)
1343 as_bad ("Invalid record type for format P6");
1344 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1345 (*f) (1, &byte, NULL);
1349 output_P7_format (f, rtype, w1, w2)
1351 unw_record_type rtype;
1358 count += output_leb128 (bytes + 1, w1, 0);
1363 count += output_leb128 (bytes + count, w2 >> 4, 0);
1413 bytes[0] = (UNW_P7 | r);
1414 (*f) (count, bytes, NULL);
1418 output_P8_format (f, rtype, t)
1420 unw_record_type rtype;
1459 case bspstore_psprel:
1462 case bspstore_sprel:
1474 case priunat_when_gr:
1477 case priunat_psprel:
1483 case priunat_when_mem:
1490 count += output_leb128 (bytes + 2, t, 0);
1491 (*f) (count, bytes, NULL);
1495 output_P9_format (f, grmask, gr)
1502 bytes[1] = (grmask & 0x0f);
1503 bytes[2] = (gr & 0x7f);
1504 (*f) (3, bytes, NULL);
1508 output_P10_format (f, abi, context)
1515 bytes[1] = (abi & 0xff);
1516 bytes[2] = (context & 0xff);
1517 (*f) (3, bytes, NULL);
1521 output_B1_format (f, rtype, label)
1523 unw_record_type rtype;
1524 unsigned long label;
1530 output_B4_format (f, rtype, label);
1533 if (rtype == copy_state)
1535 else if (rtype != label_state)
1536 as_bad ("Invalid record type for format B1");
1538 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1539 (*f) (1, &byte, NULL);
1543 output_B2_format (f, ecount, t)
1545 unsigned long ecount;
1552 output_B3_format (f, ecount, t);
1555 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1556 count += output_leb128 (bytes + 1, t, 0);
1557 (*f) (count, bytes, NULL);
1561 output_B3_format (f, ecount, t)
1563 unsigned long ecount;
1570 output_B2_format (f, ecount, t);
1574 count += output_leb128 (bytes + 1, t, 0);
1575 count += output_leb128 (bytes + count, ecount, 0);
1576 (*f) (count, bytes, NULL);
1580 output_B4_format (f, rtype, label)
1582 unw_record_type rtype;
1583 unsigned long label;
1590 output_B1_format (f, rtype, label);
1594 if (rtype == copy_state)
1596 else if (rtype != label_state)
1597 as_bad ("Invalid record type for format B1");
1599 bytes[0] = (UNW_B4 | (r << 3));
1600 count += output_leb128 (bytes + 1, label, 0);
1601 (*f) (count, bytes, NULL);
1605 format_ab_reg (ab, reg)
1612 ret = (ab << 5) | reg;
1617 output_X1_format (f, rtype, ab, reg, t, w1)
1619 unw_record_type rtype;
1629 if (rtype == spill_sprel)
1631 else if (rtype != spill_psprel)
1632 as_bad ("Invalid record type for format X1");
1633 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1634 count += output_leb128 (bytes + 2, t, 0);
1635 count += output_leb128 (bytes + count, w1, 0);
1636 (*f) (count, bytes, NULL);
1640 output_X2_format (f, ab, reg, x, y, treg, t)
1649 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1650 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1651 count += output_leb128 (bytes + 3, t, 0);
1652 (*f) (count, bytes, NULL);
1656 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1658 unw_record_type rtype;
1669 if (rtype == spill_sprel_p)
1671 else if (rtype != spill_psprel_p)
1672 as_bad ("Invalid record type for format X3");
1673 bytes[1] = ((r << 7) | (qp & 0x3f));
1674 bytes[2] = format_ab_reg (ab, reg);
1675 count += output_leb128 (bytes + 3, t, 0);
1676 count += output_leb128 (bytes + count, w1, 0);
1677 (*f) (count, bytes, NULL);
1681 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1691 bytes[1] = (qp & 0x3f);
1692 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1693 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1694 count += output_leb128 (bytes + 4, t, 0);
1695 (*f) (count, bytes, NULL);
1698 /* This function allocates a record list structure, and initializes fields. */
1700 static unw_rec_list *
1701 alloc_record (unw_record_type t)
1704 ptr = xmalloc (sizeof (*ptr));
1706 ptr->slot_number = SLOT_NUM_NOT_SET;
1708 ptr->next_slot_number = 0;
1709 ptr->next_slot_frag = 0;
1713 /* Dummy unwind record used for calculating the length of the last prologue or
1716 static unw_rec_list *
1719 unw_rec_list *ptr = alloc_record (endp);
1723 static unw_rec_list *
1726 unw_rec_list *ptr = alloc_record (prologue);
1727 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1731 static unw_rec_list *
1732 output_prologue_gr (saved_mask, reg)
1733 unsigned int saved_mask;
1736 unw_rec_list *ptr = alloc_record (prologue_gr);
1737 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1738 ptr->r.record.r.grmask = saved_mask;
1739 ptr->r.record.r.grsave = reg;
1743 static unw_rec_list *
1746 unw_rec_list *ptr = alloc_record (body);
1750 static unw_rec_list *
1751 output_mem_stack_f (size)
1754 unw_rec_list *ptr = alloc_record (mem_stack_f);
1755 ptr->r.record.p.size = size;
1759 static unw_rec_list *
1760 output_mem_stack_v ()
1762 unw_rec_list *ptr = alloc_record (mem_stack_v);
1766 static unw_rec_list *
1770 unw_rec_list *ptr = alloc_record (psp_gr);
1771 ptr->r.record.p.gr = gr;
1775 static unw_rec_list *
1776 output_psp_sprel (offset)
1777 unsigned int offset;
1779 unw_rec_list *ptr = alloc_record (psp_sprel);
1780 ptr->r.record.p.spoff = offset / 4;
1784 static unw_rec_list *
1787 unw_rec_list *ptr = alloc_record (rp_when);
1791 static unw_rec_list *
1795 unw_rec_list *ptr = alloc_record (rp_gr);
1796 ptr->r.record.p.gr = gr;
1800 static unw_rec_list *
1804 unw_rec_list *ptr = alloc_record (rp_br);
1805 ptr->r.record.p.br = br;
1809 static unw_rec_list *
1810 output_rp_psprel (offset)
1811 unsigned int offset;
1813 unw_rec_list *ptr = alloc_record (rp_psprel);
1814 ptr->r.record.p.pspoff = offset / 4;
1818 static unw_rec_list *
1819 output_rp_sprel (offset)
1820 unsigned int offset;
1822 unw_rec_list *ptr = alloc_record (rp_sprel);
1823 ptr->r.record.p.spoff = offset / 4;
1827 static unw_rec_list *
1830 unw_rec_list *ptr = alloc_record (pfs_when);
1834 static unw_rec_list *
1838 unw_rec_list *ptr = alloc_record (pfs_gr);
1839 ptr->r.record.p.gr = gr;
1843 static unw_rec_list *
1844 output_pfs_psprel (offset)
1845 unsigned int offset;
1847 unw_rec_list *ptr = alloc_record (pfs_psprel);
1848 ptr->r.record.p.pspoff = offset / 4;
1852 static unw_rec_list *
1853 output_pfs_sprel (offset)
1854 unsigned int offset;
1856 unw_rec_list *ptr = alloc_record (pfs_sprel);
1857 ptr->r.record.p.spoff = offset / 4;
1861 static unw_rec_list *
1862 output_preds_when ()
1864 unw_rec_list *ptr = alloc_record (preds_when);
1868 static unw_rec_list *
1869 output_preds_gr (gr)
1872 unw_rec_list *ptr = alloc_record (preds_gr);
1873 ptr->r.record.p.gr = gr;
1877 static unw_rec_list *
1878 output_preds_psprel (offset)
1879 unsigned int offset;
1881 unw_rec_list *ptr = alloc_record (preds_psprel);
1882 ptr->r.record.p.pspoff = offset / 4;
1886 static unw_rec_list *
1887 output_preds_sprel (offset)
1888 unsigned int offset;
1890 unw_rec_list *ptr = alloc_record (preds_sprel);
1891 ptr->r.record.p.spoff = offset / 4;
1895 static unw_rec_list *
1896 output_fr_mem (mask)
1899 unw_rec_list *ptr = alloc_record (fr_mem);
1900 ptr->r.record.p.rmask = mask;
1904 static unw_rec_list *
1905 output_frgr_mem (gr_mask, fr_mask)
1906 unsigned int gr_mask;
1907 unsigned int fr_mask;
1909 unw_rec_list *ptr = alloc_record (frgr_mem);
1910 ptr->r.record.p.grmask = gr_mask;
1911 ptr->r.record.p.frmask = fr_mask;
1915 static unw_rec_list *
1916 output_gr_gr (mask, reg)
1920 unw_rec_list *ptr = alloc_record (gr_gr);
1921 ptr->r.record.p.grmask = mask;
1922 ptr->r.record.p.gr = reg;
1926 static unw_rec_list *
1927 output_gr_mem (mask)
1930 unw_rec_list *ptr = alloc_record (gr_mem);
1931 ptr->r.record.p.rmask = mask;
1935 static unw_rec_list *
1936 output_br_mem (unsigned int mask)
1938 unw_rec_list *ptr = alloc_record (br_mem);
1939 ptr->r.record.p.brmask = mask;
1943 static unw_rec_list *
1944 output_br_gr (save_mask, reg)
1945 unsigned int save_mask;
1948 unw_rec_list *ptr = alloc_record (br_gr);
1949 ptr->r.record.p.brmask = save_mask;
1950 ptr->r.record.p.gr = reg;
1954 static unw_rec_list *
1955 output_spill_base (offset)
1956 unsigned int offset;
1958 unw_rec_list *ptr = alloc_record (spill_base);
1959 ptr->r.record.p.pspoff = offset / 4;
1963 static unw_rec_list *
1966 unw_rec_list *ptr = alloc_record (unat_when);
1970 static unw_rec_list *
1974 unw_rec_list *ptr = alloc_record (unat_gr);
1975 ptr->r.record.p.gr = gr;
1979 static unw_rec_list *
1980 output_unat_psprel (offset)
1981 unsigned int offset;
1983 unw_rec_list *ptr = alloc_record (unat_psprel);
1984 ptr->r.record.p.pspoff = offset / 4;
1988 static unw_rec_list *
1989 output_unat_sprel (offset)
1990 unsigned int offset;
1992 unw_rec_list *ptr = alloc_record (unat_sprel);
1993 ptr->r.record.p.spoff = offset / 4;
1997 static unw_rec_list *
2000 unw_rec_list *ptr = alloc_record (lc_when);
2004 static unw_rec_list *
2008 unw_rec_list *ptr = alloc_record (lc_gr);
2009 ptr->r.record.p.gr = gr;
2013 static unw_rec_list *
2014 output_lc_psprel (offset)
2015 unsigned int offset;
2017 unw_rec_list *ptr = alloc_record (lc_psprel);
2018 ptr->r.record.p.pspoff = offset / 4;
2022 static unw_rec_list *
2023 output_lc_sprel (offset)
2024 unsigned int offset;
2026 unw_rec_list *ptr = alloc_record (lc_sprel);
2027 ptr->r.record.p.spoff = offset / 4;
2031 static unw_rec_list *
2034 unw_rec_list *ptr = alloc_record (fpsr_when);
2038 static unw_rec_list *
2042 unw_rec_list *ptr = alloc_record (fpsr_gr);
2043 ptr->r.record.p.gr = gr;
2047 static unw_rec_list *
2048 output_fpsr_psprel (offset)
2049 unsigned int offset;
2051 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2052 ptr->r.record.p.pspoff = offset / 4;
2056 static unw_rec_list *
2057 output_fpsr_sprel (offset)
2058 unsigned int offset;
2060 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2061 ptr->r.record.p.spoff = offset / 4;
2065 static unw_rec_list *
2066 output_priunat_when_gr ()
2068 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2072 static unw_rec_list *
2073 output_priunat_when_mem ()
2075 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2079 static unw_rec_list *
2080 output_priunat_gr (gr)
2083 unw_rec_list *ptr = alloc_record (priunat_gr);
2084 ptr->r.record.p.gr = gr;
2088 static unw_rec_list *
2089 output_priunat_psprel (offset)
2090 unsigned int offset;
2092 unw_rec_list *ptr = alloc_record (priunat_psprel);
2093 ptr->r.record.p.pspoff = offset / 4;
2097 static unw_rec_list *
2098 output_priunat_sprel (offset)
2099 unsigned int offset;
2101 unw_rec_list *ptr = alloc_record (priunat_sprel);
2102 ptr->r.record.p.spoff = offset / 4;
2106 static unw_rec_list *
2109 unw_rec_list *ptr = alloc_record (bsp_when);
2113 static unw_rec_list *
2117 unw_rec_list *ptr = alloc_record (bsp_gr);
2118 ptr->r.record.p.gr = gr;
2122 static unw_rec_list *
2123 output_bsp_psprel (offset)
2124 unsigned int offset;
2126 unw_rec_list *ptr = alloc_record (bsp_psprel);
2127 ptr->r.record.p.pspoff = offset / 4;
2131 static unw_rec_list *
2132 output_bsp_sprel (offset)
2133 unsigned int offset;
2135 unw_rec_list *ptr = alloc_record (bsp_sprel);
2136 ptr->r.record.p.spoff = offset / 4;
2140 static unw_rec_list *
2141 output_bspstore_when ()
2143 unw_rec_list *ptr = alloc_record (bspstore_when);
2147 static unw_rec_list *
2148 output_bspstore_gr (gr)
2151 unw_rec_list *ptr = alloc_record (bspstore_gr);
2152 ptr->r.record.p.gr = gr;
2156 static unw_rec_list *
2157 output_bspstore_psprel (offset)
2158 unsigned int offset;
2160 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2161 ptr->r.record.p.pspoff = offset / 4;
2165 static unw_rec_list *
2166 output_bspstore_sprel (offset)
2167 unsigned int offset;
2169 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2170 ptr->r.record.p.spoff = offset / 4;
2174 static unw_rec_list *
2177 unw_rec_list *ptr = alloc_record (rnat_when);
2181 static unw_rec_list *
2185 unw_rec_list *ptr = alloc_record (rnat_gr);
2186 ptr->r.record.p.gr = gr;
2190 static unw_rec_list *
2191 output_rnat_psprel (offset)
2192 unsigned int offset;
2194 unw_rec_list *ptr = alloc_record (rnat_psprel);
2195 ptr->r.record.p.pspoff = offset / 4;
2199 static unw_rec_list *
2200 output_rnat_sprel (offset)
2201 unsigned int offset;
2203 unw_rec_list *ptr = alloc_record (rnat_sprel);
2204 ptr->r.record.p.spoff = offset / 4;
2208 static unw_rec_list *
2209 output_unwabi (abi, context)
2211 unsigned long context;
2213 unw_rec_list *ptr = alloc_record (unwabi);
2214 ptr->r.record.p.abi = abi;
2215 ptr->r.record.p.context = context;
2219 static unw_rec_list *
2220 output_epilogue (unsigned long ecount)
2222 unw_rec_list *ptr = alloc_record (epilogue);
2223 ptr->r.record.b.ecount = ecount;
2227 static unw_rec_list *
2228 output_label_state (unsigned long label)
2230 unw_rec_list *ptr = alloc_record (label_state);
2231 ptr->r.record.b.label = label;
2235 static unw_rec_list *
2236 output_copy_state (unsigned long label)
2238 unw_rec_list *ptr = alloc_record (copy_state);
2239 ptr->r.record.b.label = label;
2243 static unw_rec_list *
2244 output_spill_psprel (ab, reg, offset)
2247 unsigned int offset;
2249 unw_rec_list *ptr = alloc_record (spill_psprel);
2250 ptr->r.record.x.ab = ab;
2251 ptr->r.record.x.reg = reg;
2252 ptr->r.record.x.pspoff = offset / 4;
2256 static unw_rec_list *
2257 output_spill_sprel (ab, reg, offset)
2260 unsigned int offset;
2262 unw_rec_list *ptr = alloc_record (spill_sprel);
2263 ptr->r.record.x.ab = ab;
2264 ptr->r.record.x.reg = reg;
2265 ptr->r.record.x.spoff = offset / 4;
2269 static unw_rec_list *
2270 output_spill_psprel_p (ab, reg, offset, predicate)
2273 unsigned int offset;
2274 unsigned int predicate;
2276 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2277 ptr->r.record.x.ab = ab;
2278 ptr->r.record.x.reg = reg;
2279 ptr->r.record.x.pspoff = offset / 4;
2280 ptr->r.record.x.qp = predicate;
2284 static unw_rec_list *
2285 output_spill_sprel_p (ab, reg, offset, predicate)
2288 unsigned int offset;
2289 unsigned int predicate;
2291 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2292 ptr->r.record.x.ab = ab;
2293 ptr->r.record.x.reg = reg;
2294 ptr->r.record.x.spoff = offset / 4;
2295 ptr->r.record.x.qp = predicate;
2299 static unw_rec_list *
2300 output_spill_reg (ab, reg, targ_reg, xy)
2303 unsigned int targ_reg;
2306 unw_rec_list *ptr = alloc_record (spill_reg);
2307 ptr->r.record.x.ab = ab;
2308 ptr->r.record.x.reg = reg;
2309 ptr->r.record.x.treg = targ_reg;
2310 ptr->r.record.x.xy = xy;
2314 static unw_rec_list *
2315 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2318 unsigned int targ_reg;
2320 unsigned int predicate;
2322 unw_rec_list *ptr = alloc_record (spill_reg_p);
2323 ptr->r.record.x.ab = ab;
2324 ptr->r.record.x.reg = reg;
2325 ptr->r.record.x.treg = targ_reg;
2326 ptr->r.record.x.xy = xy;
2327 ptr->r.record.x.qp = predicate;
2331 /* Given a unw_rec_list process the correct format with the
2332 specified function. */
2335 process_one_record (ptr, f)
2339 unsigned long fr_mask, gr_mask;
2341 switch (ptr->r.type)
2343 /* This is a dummy record that takes up no space in the output. */
2351 /* These are taken care of by prologue/prologue_gr. */
2356 if (ptr->r.type == prologue_gr)
2357 output_R2_format (f, ptr->r.record.r.grmask,
2358 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2360 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2362 /* Output descriptor(s) for union of register spills (if any). */
2363 gr_mask = ptr->r.record.r.mask.gr_mem;
2364 fr_mask = ptr->r.record.r.mask.fr_mem;
2367 if ((fr_mask & ~0xfUL) == 0)
2368 output_P6_format (f, fr_mem, fr_mask);
2371 output_P5_format (f, gr_mask, fr_mask);
2376 output_P6_format (f, gr_mem, gr_mask);
2377 if (ptr->r.record.r.mask.br_mem)
2378 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2380 /* output imask descriptor if necessary: */
2381 if (ptr->r.record.r.mask.i)
2382 output_P4_format (f, ptr->r.record.r.mask.i,
2383 ptr->r.record.r.imask_size);
2387 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2391 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2392 ptr->r.record.p.size);
2405 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2408 output_P3_format (f, rp_br, ptr->r.record.p.br);
2411 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2419 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2428 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2438 case bspstore_sprel:
2440 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2443 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2446 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2449 as_bad ("spill_mask record unimplemented.");
2451 case priunat_when_gr:
2452 case priunat_when_mem:
2456 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2458 case priunat_psprel:
2460 case bspstore_psprel:
2462 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2465 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2468 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2472 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2475 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2476 ptr->r.record.x.reg, ptr->r.record.x.t,
2477 ptr->r.record.x.pspoff);
2480 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2481 ptr->r.record.x.reg, ptr->r.record.x.t,
2482 ptr->r.record.x.spoff);
2485 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2486 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2487 ptr->r.record.x.treg, ptr->r.record.x.t);
2489 case spill_psprel_p:
2490 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2491 ptr->r.record.x.ab, ptr->r.record.x.reg,
2492 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2495 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2496 ptr->r.record.x.ab, ptr->r.record.x.reg,
2497 ptr->r.record.x.t, ptr->r.record.x.spoff);
2500 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2501 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2502 ptr->r.record.x.xy, ptr->r.record.x.treg,
2506 as_bad ("record_type_not_valid");
2511 /* Given a unw_rec_list list, process all the records with
2512 the specified function. */
2514 process_unw_records (list, f)
2519 for (ptr = list; ptr; ptr = ptr->next)
2520 process_one_record (ptr, f);
2523 /* Determine the size of a record list in bytes. */
2525 calc_record_size (list)
2529 process_unw_records (list, count_output);
2533 /* Update IMASK bitmask to reflect the fact that one or more registers
2534 of type TYPE are saved starting at instruction with index T. If N
2535 bits are set in REGMASK, it is assumed that instructions T through
2536 T+N-1 save these registers.
2540 1: instruction saves next fp reg
2541 2: instruction saves next general reg
2542 3: instruction saves next branch reg */
2544 set_imask (region, regmask, t, type)
2545 unw_rec_list *region;
2546 unsigned long regmask;
2550 unsigned char *imask;
2551 unsigned long imask_size;
2555 imask = region->r.record.r.mask.i;
2556 imask_size = region->r.record.r.imask_size;
2559 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2560 imask = xmalloc (imask_size);
2561 memset (imask, 0, imask_size);
2563 region->r.record.r.imask_size = imask_size;
2564 region->r.record.r.mask.i = imask;
2568 pos = 2 * (3 - t % 4);
2571 if (i >= imask_size)
2573 as_bad ("Ignoring attempt to spill beyond end of region");
2577 imask[i] |= (type & 0x3) << pos;
2579 regmask &= (regmask - 1);
2589 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2590 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2591 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2595 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2596 unsigned long slot_addr;
2598 unsigned long first_addr;
2602 unsigned long index = 0;
2604 /* First time we are called, the initial address and frag are invalid. */
2605 if (first_addr == 0)
2608 /* If the two addresses are in different frags, then we need to add in
2609 the remaining size of this frag, and then the entire size of intermediate
2611 while (slot_frag != first_frag)
2613 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2617 /* We can get the final addresses only during and after
2619 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2620 index += 3 * ((first_frag->fr_next->fr_address
2621 - first_frag->fr_address
2622 - first_frag->fr_fix) >> 4);
2625 /* We don't know what the final addresses will be. We try our
2626 best to estimate. */
2627 switch (first_frag->fr_type)
2633 as_fatal ("only constant space allocation is supported");
2639 /* Take alignment into account. Assume the worst case
2640 before relaxation. */
2641 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2645 if (first_frag->fr_symbol)
2647 as_fatal ("only constant offsets are supported");
2651 index += 3 * (first_frag->fr_offset >> 4);
2655 /* Add in the full size of the frag converted to instruction slots. */
2656 index += 3 * (first_frag->fr_fix >> 4);
2657 /* Subtract away the initial part before first_addr. */
2658 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2659 + ((first_addr & 0x3) - (start_addr & 0x3)));
2661 /* Move to the beginning of the next frag. */
2662 first_frag = first_frag->fr_next;
2663 first_addr = (unsigned long) &first_frag->fr_literal;
2666 /* Add in the used part of the last frag. */
2667 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2668 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2672 /* Optimize unwind record directives. */
2674 static unw_rec_list *
2675 optimize_unw_records (list)
2681 /* If the only unwind record is ".prologue" or ".prologue" followed
2682 by ".body", then we can optimize the unwind directives away. */
2683 if (list->r.type == prologue
2684 && (list->next->r.type == endp
2685 || (list->next->r.type == body && list->next->next->r.type == endp)))
2691 /* Given a complete record list, process any records which have
2692 unresolved fields, (ie length counts for a prologue). After
2693 this has been run, all necessary information should be available
2694 within each record to generate an image. */
2697 fixup_unw_records (list, before_relax)
2701 unw_rec_list *ptr, *region = 0;
2702 unsigned long first_addr = 0, rlen = 0, t;
2703 fragS *first_frag = 0;
2705 for (ptr = list; ptr; ptr = ptr->next)
2707 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2708 as_bad (" Insn slot not set in unwind record.");
2709 t = slot_index (ptr->slot_number, ptr->slot_frag,
2710 first_addr, first_frag, before_relax);
2711 switch (ptr->r.type)
2719 unsigned long last_addr = 0;
2720 fragS *last_frag = NULL;
2722 first_addr = ptr->slot_number;
2723 first_frag = ptr->slot_frag;
2724 /* Find either the next body/prologue start, or the end of
2725 the function, and determine the size of the region. */
2726 for (last = ptr->next; last != NULL; last = last->next)
2727 if (last->r.type == prologue || last->r.type == prologue_gr
2728 || last->r.type == body || last->r.type == endp)
2730 last_addr = last->slot_number;
2731 last_frag = last->slot_frag;
2734 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2736 rlen = ptr->r.record.r.rlen = size;
2737 if (ptr->r.type == body)
2738 /* End of region. */
2745 ptr->r.record.b.t = rlen - 1 - t;
2756 case priunat_when_gr:
2757 case priunat_when_mem:
2761 ptr->r.record.p.t = t;
2769 case spill_psprel_p:
2770 ptr->r.record.x.t = t;
2776 as_bad ("frgr_mem record before region record!\n");
2779 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2780 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2781 set_imask (region, ptr->r.record.p.frmask, t, 1);
2782 set_imask (region, ptr->r.record.p.grmask, t, 2);
2787 as_bad ("fr_mem record before region record!\n");
2790 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2791 set_imask (region, ptr->r.record.p.rmask, t, 1);
2796 as_bad ("gr_mem record before region record!\n");
2799 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2800 set_imask (region, ptr->r.record.p.rmask, t, 2);
2805 as_bad ("br_mem record before region record!\n");
2808 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2809 set_imask (region, ptr->r.record.p.brmask, t, 3);
2815 as_bad ("gr_gr record before region record!\n");
2818 set_imask (region, ptr->r.record.p.grmask, t, 2);
2823 as_bad ("br_gr record before region record!\n");
2826 set_imask (region, ptr->r.record.p.brmask, t, 3);
2835 /* Estimate the size of a frag before relaxing. We only have one type of frag
2836 to handle here, which is the unwind info frag. */
2839 ia64_estimate_size_before_relax (fragS *frag,
2840 asection *segtype ATTRIBUTE_UNUSED)
2845 /* ??? This code is identical to the first part of ia64_convert_frag. */
2846 list = (unw_rec_list *) frag->fr_opcode;
2847 fixup_unw_records (list, 0);
2849 len = calc_record_size (list);
2850 /* pad to pointer-size boundary. */
2851 pad = len % md.pointer_size;
2853 len += md.pointer_size - pad;
2854 /* Add 8 for the header + a pointer for the personality offset. */
2855 size = len + 8 + md.pointer_size;
2857 /* fr_var carries the max_chars that we created the fragment with.
2858 We must, of course, have allocated enough memory earlier. */
2859 assert (frag->fr_var >= size);
2861 return frag->fr_fix + size;
2864 /* This function converts a rs_machine_dependent variant frag into a
2865 normal fill frag with the unwind image from the the record list. */
2867 ia64_convert_frag (fragS *frag)
2873 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2874 list = (unw_rec_list *) frag->fr_opcode;
2875 fixup_unw_records (list, 0);
2877 len = calc_record_size (list);
2878 /* pad to pointer-size boundary. */
2879 pad = len % md.pointer_size;
2881 len += md.pointer_size - pad;
2882 /* Add 8 for the header + a pointer for the personality offset. */
2883 size = len + 8 + md.pointer_size;
2885 /* fr_var carries the max_chars that we created the fragment with.
2886 We must, of course, have allocated enough memory earlier. */
2887 assert (frag->fr_var >= size);
2889 /* Initialize the header area. fr_offset is initialized with
2890 unwind.personality_routine. */
2891 if (frag->fr_offset)
2893 if (md.flags & EF_IA_64_ABI64)
2894 flag_value = (bfd_vma) 3 << 32;
2896 /* 32-bit unwind info block. */
2897 flag_value = (bfd_vma) 0x1003 << 32;
2902 md_number_to_chars (frag->fr_literal,
2903 (((bfd_vma) 1 << 48) /* Version. */
2904 | flag_value /* U & E handler flags. */
2905 | (len / md.pointer_size)), /* Length. */
2908 /* Skip the header. */
2909 vbyte_mem_ptr = frag->fr_literal + 8;
2910 process_unw_records (list, output_vbyte_mem);
2912 /* Fill the padding bytes with zeros. */
2914 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2915 md.pointer_size - pad);
2917 frag->fr_fix += size;
2918 frag->fr_type = rs_fill;
2920 frag->fr_offset = 0;
2924 convert_expr_to_ab_reg (e, ab, regp)
2931 if (e->X_op != O_register)
2934 reg = e->X_add_number;
2935 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2938 *regp = reg - REG_GR;
2940 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2941 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2944 *regp = reg - REG_FR;
2946 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2949 *regp = reg - REG_BR;
2956 case REG_PR: *regp = 0; break;
2957 case REG_PSP: *regp = 1; break;
2958 case REG_PRIUNAT: *regp = 2; break;
2959 case REG_BR + 0: *regp = 3; break;
2960 case REG_AR + AR_BSP: *regp = 4; break;
2961 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2962 case REG_AR + AR_RNAT: *regp = 6; break;
2963 case REG_AR + AR_UNAT: *regp = 7; break;
2964 case REG_AR + AR_FPSR: *regp = 8; break;
2965 case REG_AR + AR_PFS: *regp = 9; break;
2966 case REG_AR + AR_LC: *regp = 10; break;
2976 convert_expr_to_xy_reg (e, xy, regp)
2983 if (e->X_op != O_register)
2986 reg = e->X_add_number;
2988 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2991 *regp = reg - REG_GR;
2993 else if (reg >= REG_FR && reg <= (REG_FR + 127))
2996 *regp = reg - REG_FR;
2998 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3001 *regp = reg - REG_BR;
3011 /* The current frag is an alignment frag. */
3012 align_frag = frag_now;
3013 s_align_bytes (arg);
3018 int dummy ATTRIBUTE_UNUSED;
3023 radix = *input_line_pointer++;
3025 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3027 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3028 ignore_rest_of_line ();
3033 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3035 dot_special_section (which)
3038 set_section ((char *) special_section_name[which]);
3042 add_unwind_entry (ptr)
3046 unwind.tail->next = ptr;
3051 /* The current entry can in fact be a chain of unwind entries. */
3052 if (unwind.current_entry == NULL)
3053 unwind.current_entry = ptr;
3058 int dummy ATTRIBUTE_UNUSED;
3064 if (e.X_op != O_constant)
3065 as_bad ("Operand to .fframe must be a constant");
3067 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3072 int dummy ATTRIBUTE_UNUSED;
3078 reg = e.X_add_number - REG_GR;
3079 if (e.X_op == O_register && reg < 128)
3081 add_unwind_entry (output_mem_stack_v ());
3082 if (! (unwind.prologue_mask & 2))
3083 add_unwind_entry (output_psp_gr (reg));
3086 as_bad ("First operand to .vframe must be a general register");
3090 dot_vframesp (dummy)
3091 int dummy ATTRIBUTE_UNUSED;
3096 if (e.X_op == O_constant)
3098 add_unwind_entry (output_mem_stack_v ());
3099 add_unwind_entry (output_psp_sprel (e.X_add_number));
3102 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3106 dot_vframepsp (dummy)
3107 int dummy ATTRIBUTE_UNUSED;
3112 if (e.X_op == O_constant)
3114 add_unwind_entry (output_mem_stack_v ());
3115 add_unwind_entry (output_psp_sprel (e.X_add_number));
3118 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3123 int dummy ATTRIBUTE_UNUSED;
3129 sep = parse_operand (&e1);
3131 as_bad ("No second operand to .save");
3132 sep = parse_operand (&e2);
3134 reg1 = e1.X_add_number;
3135 reg2 = e2.X_add_number - REG_GR;
3137 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3138 if (e1.X_op == O_register)
3140 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3144 case REG_AR + AR_BSP:
3145 add_unwind_entry (output_bsp_when ());
3146 add_unwind_entry (output_bsp_gr (reg2));
3148 case REG_AR + AR_BSPSTORE:
3149 add_unwind_entry (output_bspstore_when ());
3150 add_unwind_entry (output_bspstore_gr (reg2));
3152 case REG_AR + AR_RNAT:
3153 add_unwind_entry (output_rnat_when ());
3154 add_unwind_entry (output_rnat_gr (reg2));
3156 case REG_AR + AR_UNAT:
3157 add_unwind_entry (output_unat_when ());
3158 add_unwind_entry (output_unat_gr (reg2));
3160 case REG_AR + AR_FPSR:
3161 add_unwind_entry (output_fpsr_when ());
3162 add_unwind_entry (output_fpsr_gr (reg2));
3164 case REG_AR + AR_PFS:
3165 add_unwind_entry (output_pfs_when ());
3166 if (! (unwind.prologue_mask & 4))
3167 add_unwind_entry (output_pfs_gr (reg2));
3169 case REG_AR + AR_LC:
3170 add_unwind_entry (output_lc_when ());
3171 add_unwind_entry (output_lc_gr (reg2));
3174 add_unwind_entry (output_rp_when ());
3175 if (! (unwind.prologue_mask & 8))
3176 add_unwind_entry (output_rp_gr (reg2));
3179 add_unwind_entry (output_preds_when ());
3180 if (! (unwind.prologue_mask & 1))
3181 add_unwind_entry (output_preds_gr (reg2));
3184 add_unwind_entry (output_priunat_when_gr ());
3185 add_unwind_entry (output_priunat_gr (reg2));
3188 as_bad ("First operand not a valid register");
3192 as_bad (" Second operand not a valid register");
3195 as_bad ("First operand not a register");
3200 int dummy ATTRIBUTE_UNUSED;
3203 unsigned long ecount; /* # of _additional_ regions to pop */
3206 sep = parse_operand (&e1);
3207 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3209 as_bad ("First operand to .restore must be stack pointer (sp)");
3215 parse_operand (&e2);
3216 if (e2.X_op != O_constant || e2.X_add_number < 0)
3218 as_bad ("Second operand to .restore must be a constant >= 0");
3221 ecount = e2.X_add_number;
3224 ecount = unwind.prologue_count - 1;
3226 if (ecount >= unwind.prologue_count)
3228 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3229 ecount + 1, unwind.prologue_count);
3233 add_unwind_entry (output_epilogue (ecount));
3235 if (ecount < unwind.prologue_count)
3236 unwind.prologue_count -= ecount + 1;
3238 unwind.prologue_count = 0;
3242 dot_restorereg (dummy)
3243 int dummy ATTRIBUTE_UNUSED;
3245 unsigned int ab, reg;
3250 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3252 as_bad ("First operand to .restorereg must be a preserved register");
3255 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3259 dot_restorereg_p (dummy)
3260 int dummy ATTRIBUTE_UNUSED;
3262 unsigned int qp, ab, reg;
3266 sep = parse_operand (&e1);
3269 as_bad ("No second operand to .restorereg.p");
3273 parse_operand (&e2);
3275 qp = e1.X_add_number - REG_P;
3276 if (e1.X_op != O_register || qp > 63)
3278 as_bad ("First operand to .restorereg.p must be a predicate");
3282 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3284 as_bad ("Second operand to .restorereg.p must be a preserved register");
3287 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3290 static char *special_linkonce_name[] =
3292 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3296 start_unwind_section (const segT text_seg, int sec_index)
3299 Use a slightly ugly scheme to derive the unwind section names from
3300 the text section name:
3302 text sect. unwind table sect.
3303 name: name: comments:
3304 ---------- ----------------- --------------------------------
3306 .text.foo .IA_64.unwind.text.foo
3307 .foo .IA_64.unwind.foo
3309 .gnu.linkonce.ia64unw.foo
3310 _info .IA_64.unwind_info gas issues error message (ditto)
3311 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3313 This mapping is done so that:
3315 (a) An object file with unwind info only in .text will use
3316 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3317 This follows the letter of the ABI and also ensures backwards
3318 compatibility with older toolchains.
3320 (b) An object file with unwind info in multiple text sections
3321 will use separate unwind sections for each text section.
3322 This allows us to properly set the "sh_info" and "sh_link"
3323 fields in SHT_IA_64_UNWIND as required by the ABI and also
3324 lets GNU ld support programs with multiple segments
3325 containing unwind info (as might be the case for certain
3326 embedded applications).
3328 (c) An error is issued if there would be a name clash.
3331 const char *text_name, *sec_text_name;
3333 const char *prefix = special_section_name [sec_index];
3335 size_t prefix_len, suffix_len, sec_name_len;
3337 sec_text_name = segment_name (text_seg);
3338 text_name = sec_text_name;
3339 if (strncmp (text_name, "_info", 5) == 0)
3341 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3343 ignore_rest_of_line ();
3346 if (strcmp (text_name, ".text") == 0)
3349 /* Build the unwind section name by appending the (possibly stripped)
3350 text section name to the unwind prefix. */
3352 if (strncmp (text_name, ".gnu.linkonce.t.",
3353 sizeof (".gnu.linkonce.t.") - 1) == 0)
3355 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3356 suffix += sizeof (".gnu.linkonce.t.") - 1;
3359 prefix_len = strlen (prefix);
3360 suffix_len = strlen (suffix);
3361 sec_name_len = prefix_len + suffix_len;
3362 sec_name = alloca (sec_name_len + 1);
3363 memcpy (sec_name, prefix, prefix_len);
3364 memcpy (sec_name + prefix_len, suffix, suffix_len);
3365 sec_name [sec_name_len] = '\0';
3367 /* Handle COMDAT group. */
3368 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3371 size_t len, group_name_len;
3372 const char *group_name = elf_group_name (text_seg);
3374 if (group_name == NULL)
3376 as_bad ("Group section `%s' has no group signature",
3378 ignore_rest_of_line ();
3381 /* We have to construct a fake section directive. */
3382 group_name_len = strlen (group_name);
3384 + 16 /* ,"aG",@progbits, */
3385 + group_name_len /* ,group_name */
3388 section = alloca (len + 1);
3389 memcpy (section, sec_name, sec_name_len);
3390 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3391 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3392 memcpy (section + len - 7, ",comdat", 7);
3393 section [len] = '\0';
3394 set_section (section);
3398 set_section (sec_name);
3399 bfd_set_section_flags (stdoutput, now_seg,
3400 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3405 generate_unwind_image (const segT text_seg)
3410 /* Mark the end of the unwind info, so that we can compute the size of the
3411 last unwind region. */
3412 add_unwind_entry (output_endp ());
3414 /* Force out pending instructions, to make sure all unwind records have
3415 a valid slot_number field. */
3416 ia64_flush_insns ();
3418 /* Generate the unwind record. */
3419 list = optimize_unw_records (unwind.list);
3420 fixup_unw_records (list, 1);
3421 size = calc_record_size (list);
3423 if (size > 0 || unwind.force_unwind_entry)
3425 unwind.force_unwind_entry = 0;
3426 /* pad to pointer-size boundary. */
3427 pad = size % md.pointer_size;
3429 size += md.pointer_size - pad;
3430 /* Add 8 for the header + a pointer for the personality
3432 size += 8 + md.pointer_size;
3435 /* If there are unwind records, switch sections, and output the info. */
3439 bfd_reloc_code_real_type reloc;
3441 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
3443 /* Make sure the section has 4 byte alignment for ILP32 and
3444 8 byte alignment for LP64. */
3445 frag_align (md.pointer_size_shift, 0, 0);
3446 record_alignment (now_seg, md.pointer_size_shift);
3448 /* Set expression which points to start of unwind descriptor area. */
3449 unwind.info = expr_build_dot ();
3451 frag_var (rs_machine_dependent, size, size, 0, 0,
3452 (offsetT) (long) unwind.personality_routine,
3455 /* Add the personality address to the image. */
3456 if (unwind.personality_routine != 0)
3458 exp.X_op = O_symbol;
3459 exp.X_add_symbol = unwind.personality_routine;
3460 exp.X_add_number = 0;
3462 if (md.flags & EF_IA_64_BE)
3464 if (md.flags & EF_IA_64_ABI64)
3465 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3467 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3471 if (md.flags & EF_IA_64_ABI64)
3472 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3474 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3477 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3478 md.pointer_size, &exp, 0, reloc);
3479 unwind.personality_routine = 0;
3483 free_saved_prologue_counts ();
3484 unwind.list = unwind.tail = unwind.current_entry = NULL;
3488 dot_handlerdata (dummy)
3489 int dummy ATTRIBUTE_UNUSED;
3491 unwind.force_unwind_entry = 1;
3493 /* Remember which segment we're in so we can switch back after .endp */
3494 unwind.saved_text_seg = now_seg;
3495 unwind.saved_text_subseg = now_subseg;
3497 /* Generate unwind info into unwind-info section and then leave that
3498 section as the currently active one so dataXX directives go into
3499 the language specific data area of the unwind info block. */
3500 generate_unwind_image (now_seg);
3501 demand_empty_rest_of_line ();
3505 dot_unwentry (dummy)
3506 int dummy ATTRIBUTE_UNUSED;
3508 unwind.force_unwind_entry = 1;
3509 demand_empty_rest_of_line ();
3514 int dummy ATTRIBUTE_UNUSED;
3520 reg = e.X_add_number - REG_BR;
3521 if (e.X_op == O_register && reg < 8)
3522 add_unwind_entry (output_rp_br (reg));
3524 as_bad ("First operand not a valid branch register");
3528 dot_savemem (psprel)
3535 sep = parse_operand (&e1);
3537 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3538 sep = parse_operand (&e2);
3540 reg1 = e1.X_add_number;
3541 val = e2.X_add_number;
3543 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3544 if (e1.X_op == O_register)
3546 if (e2.X_op == O_constant)
3550 case REG_AR + AR_BSP:
3551 add_unwind_entry (output_bsp_when ());
3552 add_unwind_entry ((psprel
3554 : output_bsp_sprel) (val));
3556 case REG_AR + AR_BSPSTORE:
3557 add_unwind_entry (output_bspstore_when ());
3558 add_unwind_entry ((psprel
3559 ? output_bspstore_psprel
3560 : output_bspstore_sprel) (val));
3562 case REG_AR + AR_RNAT:
3563 add_unwind_entry (output_rnat_when ());
3564 add_unwind_entry ((psprel
3565 ? output_rnat_psprel
3566 : output_rnat_sprel) (val));
3568 case REG_AR + AR_UNAT:
3569 add_unwind_entry (output_unat_when ());
3570 add_unwind_entry ((psprel
3571 ? output_unat_psprel
3572 : output_unat_sprel) (val));
3574 case REG_AR + AR_FPSR:
3575 add_unwind_entry (output_fpsr_when ());
3576 add_unwind_entry ((psprel
3577 ? output_fpsr_psprel
3578 : output_fpsr_sprel) (val));
3580 case REG_AR + AR_PFS:
3581 add_unwind_entry (output_pfs_when ());
3582 add_unwind_entry ((psprel
3584 : output_pfs_sprel) (val));
3586 case REG_AR + AR_LC:
3587 add_unwind_entry (output_lc_when ());
3588 add_unwind_entry ((psprel
3590 : output_lc_sprel) (val));
3593 add_unwind_entry (output_rp_when ());
3594 add_unwind_entry ((psprel
3596 : output_rp_sprel) (val));
3599 add_unwind_entry (output_preds_when ());
3600 add_unwind_entry ((psprel
3601 ? output_preds_psprel
3602 : output_preds_sprel) (val));
3605 add_unwind_entry (output_priunat_when_mem ());
3606 add_unwind_entry ((psprel
3607 ? output_priunat_psprel
3608 : output_priunat_sprel) (val));
3611 as_bad ("First operand not a valid register");
3615 as_bad (" Second operand not a valid constant");
3618 as_bad ("First operand not a register");
3623 int dummy ATTRIBUTE_UNUSED;
3627 sep = parse_operand (&e1);
3629 parse_operand (&e2);
3631 if (e1.X_op != O_constant)
3632 as_bad ("First operand to .save.g must be a constant.");
3635 int grmask = e1.X_add_number;
3637 add_unwind_entry (output_gr_mem (grmask));
3640 int reg = e2.X_add_number - REG_GR;
3641 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3642 add_unwind_entry (output_gr_gr (grmask, reg));
3644 as_bad ("Second operand is an invalid register.");
3651 int dummy ATTRIBUTE_UNUSED;
3655 sep = parse_operand (&e1);
3657 if (e1.X_op != O_constant)
3658 as_bad ("Operand to .save.f must be a constant.");
3660 add_unwind_entry (output_fr_mem (e1.X_add_number));
3665 int dummy ATTRIBUTE_UNUSED;
3672 sep = parse_operand (&e1);
3673 if (e1.X_op != O_constant)
3675 as_bad ("First operand to .save.b must be a constant.");
3678 brmask = e1.X_add_number;
3682 sep = parse_operand (&e2);
3683 reg = e2.X_add_number - REG_GR;
3684 if (e2.X_op != O_register || reg > 127)
3686 as_bad ("Second operand to .save.b must be a general register.");
3689 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3692 add_unwind_entry (output_br_mem (brmask));
3694 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3695 demand_empty_rest_of_line ();
3700 int dummy ATTRIBUTE_UNUSED;
3704 sep = parse_operand (&e1);
3706 parse_operand (&e2);
3708 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3709 as_bad ("Both operands of .save.gf must be constants.");
3712 int grmask = e1.X_add_number;
3713 int frmask = e2.X_add_number;
3714 add_unwind_entry (output_frgr_mem (grmask, frmask));
3720 int dummy ATTRIBUTE_UNUSED;
3725 sep = parse_operand (&e);
3726 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3727 demand_empty_rest_of_line ();
3729 if (e.X_op != O_constant)
3730 as_bad ("Operand to .spill must be a constant");
3732 add_unwind_entry (output_spill_base (e.X_add_number));
3736 dot_spillreg (dummy)
3737 int dummy ATTRIBUTE_UNUSED;
3739 int sep, ab, xy, reg, treg;
3742 sep = parse_operand (&e1);
3745 as_bad ("No second operand to .spillreg");
3749 parse_operand (&e2);
3751 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3753 as_bad ("First operand to .spillreg must be a preserved register");
3757 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3759 as_bad ("Second operand to .spillreg must be a register");
3763 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3767 dot_spillmem (psprel)
3773 sep = parse_operand (&e1);
3776 as_bad ("Second operand missing");
3780 parse_operand (&e2);
3782 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3784 as_bad ("First operand to .spill%s must be a preserved register",
3785 psprel ? "psp" : "sp");
3789 if (e2.X_op != O_constant)
3791 as_bad ("Second operand to .spill%s must be a constant",
3792 psprel ? "psp" : "sp");
3797 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3799 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3803 dot_spillreg_p (dummy)
3804 int dummy ATTRIBUTE_UNUSED;
3806 int sep, ab, xy, reg, treg;
3807 expressionS e1, e2, e3;
3810 sep = parse_operand (&e1);
3813 as_bad ("No second and third operand to .spillreg.p");
3817 sep = parse_operand (&e2);
3820 as_bad ("No third operand to .spillreg.p");
3824 parse_operand (&e3);
3826 qp = e1.X_add_number - REG_P;
3828 if (e1.X_op != O_register || qp > 63)
3830 as_bad ("First operand to .spillreg.p must be a predicate");
3834 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3836 as_bad ("Second operand to .spillreg.p must be a preserved register");
3840 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3842 as_bad ("Third operand to .spillreg.p must be a register");
3846 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3850 dot_spillmem_p (psprel)
3853 expressionS e1, e2, e3;
3857 sep = parse_operand (&e1);
3860 as_bad ("Second operand missing");
3864 parse_operand (&e2);
3867 as_bad ("Second operand missing");
3871 parse_operand (&e3);
3873 qp = e1.X_add_number - REG_P;
3874 if (e1.X_op != O_register || qp > 63)
3876 as_bad ("First operand to .spill%s_p must be a predicate",
3877 psprel ? "psp" : "sp");
3881 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3883 as_bad ("Second operand to .spill%s_p must be a preserved register",
3884 psprel ? "psp" : "sp");
3888 if (e3.X_op != O_constant)
3890 as_bad ("Third operand to .spill%s_p must be a constant",
3891 psprel ? "psp" : "sp");
3896 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3898 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3902 get_saved_prologue_count (lbl)
3905 label_prologue_count *lpc = unwind.saved_prologue_counts;
3907 while (lpc != NULL && lpc->label_number != lbl)
3911 return lpc->prologue_count;
3913 as_bad ("Missing .label_state %ld", lbl);
3918 save_prologue_count (lbl, count)
3922 label_prologue_count *lpc = unwind.saved_prologue_counts;
3924 while (lpc != NULL && lpc->label_number != lbl)
3928 lpc->prologue_count = count;
3931 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3933 new_lpc->next = unwind.saved_prologue_counts;
3934 new_lpc->label_number = lbl;
3935 new_lpc->prologue_count = count;
3936 unwind.saved_prologue_counts = new_lpc;
3941 free_saved_prologue_counts ()
3943 label_prologue_count *lpc = unwind.saved_prologue_counts;
3944 label_prologue_count *next;
3953 unwind.saved_prologue_counts = NULL;
3957 dot_label_state (dummy)
3958 int dummy ATTRIBUTE_UNUSED;
3963 if (e.X_op != O_constant)
3965 as_bad ("Operand to .label_state must be a constant");
3968 add_unwind_entry (output_label_state (e.X_add_number));
3969 save_prologue_count (e.X_add_number, unwind.prologue_count);
3973 dot_copy_state (dummy)
3974 int dummy ATTRIBUTE_UNUSED;
3979 if (e.X_op != O_constant)
3981 as_bad ("Operand to .copy_state must be a constant");
3984 add_unwind_entry (output_copy_state (e.X_add_number));
3985 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3990 int dummy ATTRIBUTE_UNUSED;
3995 sep = parse_operand (&e1);
3998 as_bad ("Second operand to .unwabi missing");
4001 sep = parse_operand (&e2);
4002 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4003 demand_empty_rest_of_line ();
4005 if (e1.X_op != O_constant)
4007 as_bad ("First operand to .unwabi must be a constant");
4011 if (e2.X_op != O_constant)
4013 as_bad ("Second operand to .unwabi must be a constant");
4017 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4021 dot_personality (dummy)
4022 int dummy ATTRIBUTE_UNUSED;
4026 name = input_line_pointer;
4027 c = get_symbol_end ();
4028 p = input_line_pointer;
4029 unwind.personality_routine = symbol_find_or_make (name);
4030 unwind.force_unwind_entry = 1;
4033 demand_empty_rest_of_line ();
4038 int dummy ATTRIBUTE_UNUSED;
4043 unwind.proc_start = expr_build_dot ();
4044 /* Parse names of main and alternate entry points and mark them as
4045 function symbols: */
4049 name = input_line_pointer;
4050 c = get_symbol_end ();
4051 p = input_line_pointer;
4052 sym = symbol_find_or_make (name);
4053 if (unwind.proc_start == 0)
4055 unwind.proc_start = sym;
4057 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4060 if (*input_line_pointer != ',')
4062 ++input_line_pointer;
4064 demand_empty_rest_of_line ();
4067 unwind.prologue_count = 0;
4068 unwind.list = unwind.tail = unwind.current_entry = NULL;
4069 unwind.personality_routine = 0;
4074 int dummy ATTRIBUTE_UNUSED;
4076 unwind.prologue = 0;
4077 unwind.prologue_mask = 0;
4079 add_unwind_entry (output_body ());
4080 demand_empty_rest_of_line ();
4084 dot_prologue (dummy)
4085 int dummy ATTRIBUTE_UNUSED;
4088 int mask = 0, grsave = 0;
4090 if (!is_it_end_of_statement ())
4093 sep = parse_operand (&e1);
4095 as_bad ("No second operand to .prologue");
4096 sep = parse_operand (&e2);
4097 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4098 demand_empty_rest_of_line ();
4100 if (e1.X_op == O_constant)
4102 mask = e1.X_add_number;
4104 if (e2.X_op == O_constant)
4105 grsave = e2.X_add_number;
4106 else if (e2.X_op == O_register
4107 && (grsave = e2.X_add_number - REG_GR) < 128)
4110 as_bad ("Second operand not a constant or general register");
4112 add_unwind_entry (output_prologue_gr (mask, grsave));
4115 as_bad ("First operand not a constant");
4118 add_unwind_entry (output_prologue ());
4120 unwind.prologue = 1;
4121 unwind.prologue_mask = mask;
4122 ++unwind.prologue_count;
4127 int dummy ATTRIBUTE_UNUSED;
4131 int bytes_per_address;
4134 subsegT saved_subseg;
4138 if (unwind.saved_text_seg)
4140 saved_seg = unwind.saved_text_seg;
4141 saved_subseg = unwind.saved_text_subseg;
4142 unwind.saved_text_seg = NULL;
4146 saved_seg = now_seg;
4147 saved_subseg = now_subseg;
4150 insn_group_break (1, 0, 0);
4152 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4154 generate_unwind_image (saved_seg);
4156 if (unwind.info || unwind.force_unwind_entry)
4158 subseg_set (md.last_text_seg, 0);
4159 unwind.proc_end = expr_build_dot ();
4161 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
4163 /* Make sure that section has 4 byte alignment for ILP32 and
4164 8 byte alignment for LP64. */
4165 record_alignment (now_seg, md.pointer_size_shift);
4167 /* Need space for 3 pointers for procedure start, procedure end,
4169 ptr = frag_more (3 * md.pointer_size);
4170 where = frag_now_fix () - (3 * md.pointer_size);
4171 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4173 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4174 e.X_op = O_pseudo_fixup;
4175 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4177 e.X_add_symbol = unwind.proc_start;
4178 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4180 e.X_op = O_pseudo_fixup;
4181 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4183 e.X_add_symbol = unwind.proc_end;
4184 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4185 bytes_per_address, &e);
4189 e.X_op = O_pseudo_fixup;
4190 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4192 e.X_add_symbol = unwind.info;
4193 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4194 bytes_per_address, &e);
4197 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4201 subseg_set (saved_seg, saved_subseg);
4203 /* Parse names of main and alternate entry points and set symbol sizes. */
4207 name = input_line_pointer;
4208 c = get_symbol_end ();
4209 p = input_line_pointer;
4210 sym = symbol_find (name);
4211 if (sym && unwind.proc_start
4212 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4213 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4215 fragS *fr = symbol_get_frag (unwind.proc_start);
4216 fragS *frag = symbol_get_frag (sym);
4218 /* Check whether the function label is at or beyond last
4220 while (fr && fr != frag)
4224 if (frag == frag_now && SEG_NORMAL (now_seg))
4225 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4228 symbol_get_obj (sym)->size =
4229 (expressionS *) xmalloc (sizeof (expressionS));
4230 symbol_get_obj (sym)->size->X_op = O_subtract;
4231 symbol_get_obj (sym)->size->X_add_symbol
4232 = symbol_new (FAKE_LABEL_NAME, now_seg,
4233 frag_now_fix (), frag_now);
4234 symbol_get_obj (sym)->size->X_op_symbol = sym;
4235 symbol_get_obj (sym)->size->X_add_number = 0;
4241 if (*input_line_pointer != ',')
4243 ++input_line_pointer;
4245 demand_empty_rest_of_line ();
4246 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4250 dot_template (template)
4253 CURR_SLOT.user_template = template;
4258 int dummy ATTRIBUTE_UNUSED;
4260 int ins, locs, outs, rots;
4262 if (is_it_end_of_statement ())
4263 ins = locs = outs = rots = 0;
4266 ins = get_absolute_expression ();
4267 if (*input_line_pointer++ != ',')
4269 locs = get_absolute_expression ();
4270 if (*input_line_pointer++ != ',')
4272 outs = get_absolute_expression ();
4273 if (*input_line_pointer++ != ',')
4275 rots = get_absolute_expression ();
4277 set_regstack (ins, locs, outs, rots);
4281 as_bad ("Comma expected");
4282 ignore_rest_of_line ();
4289 unsigned num_regs, num_alloced = 0;
4290 struct dynreg **drpp, *dr;
4291 int ch, base_reg = 0;
4297 case DYNREG_GR: base_reg = REG_GR + 32; break;
4298 case DYNREG_FR: base_reg = REG_FR + 32; break;
4299 case DYNREG_PR: base_reg = REG_P + 16; break;
4303 /* First, remove existing names from hash table. */
4304 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4306 hash_delete (md.dynreg_hash, dr->name);
4310 drpp = &md.dynreg[type];
4313 start = input_line_pointer;
4314 ch = get_symbol_end ();
4315 *input_line_pointer = ch;
4316 len = (input_line_pointer - start);
4319 if (*input_line_pointer != '[')
4321 as_bad ("Expected '['");
4324 ++input_line_pointer; /* skip '[' */
4326 num_regs = get_absolute_expression ();
4328 if (*input_line_pointer++ != ']')
4330 as_bad ("Expected ']'");
4335 num_alloced += num_regs;
4339 if (num_alloced > md.rot.num_regs)
4341 as_bad ("Used more than the declared %d rotating registers",
4347 if (num_alloced > 96)
4349 as_bad ("Used more than the available 96 rotating registers");
4354 if (num_alloced > 48)
4356 as_bad ("Used more than the available 48 rotating registers");
4365 name = obstack_alloc (¬es, len + 1);
4366 memcpy (name, start, len);
4371 *drpp = obstack_alloc (¬es, sizeof (*dr));
4372 memset (*drpp, 0, sizeof (*dr));
4377 dr->num_regs = num_regs;
4378 dr->base = base_reg;
4380 base_reg += num_regs;
4382 if (hash_insert (md.dynreg_hash, name, dr))
4384 as_bad ("Attempt to redefine register set `%s'", name);
4388 if (*input_line_pointer != ',')
4390 ++input_line_pointer; /* skip comma */
4393 demand_empty_rest_of_line ();
4397 ignore_rest_of_line ();
4401 dot_byteorder (byteorder)
4404 segment_info_type *seginfo = seg_info (now_seg);
4406 if (byteorder == -1)
4408 if (seginfo->tc_segment_info_data.endian == 0)
4409 seginfo->tc_segment_info_data.endian
4410 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4411 byteorder = seginfo->tc_segment_info_data.endian == 1;
4414 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4416 if (target_big_endian != byteorder)
4418 target_big_endian = byteorder;
4419 if (target_big_endian)
4421 ia64_number_to_chars = number_to_chars_bigendian;
4422 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4426 ia64_number_to_chars = number_to_chars_littleendian;
4427 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4434 int dummy ATTRIBUTE_UNUSED;
4441 option = input_line_pointer;
4442 ch = get_symbol_end ();
4443 if (strcmp (option, "lsb") == 0)
4444 md.flags &= ~EF_IA_64_BE;
4445 else if (strcmp (option, "msb") == 0)
4446 md.flags |= EF_IA_64_BE;
4447 else if (strcmp (option, "abi32") == 0)
4448 md.flags &= ~EF_IA_64_ABI64;
4449 else if (strcmp (option, "abi64") == 0)
4450 md.flags |= EF_IA_64_ABI64;
4452 as_bad ("Unknown psr option `%s'", option);
4453 *input_line_pointer = ch;
4456 if (*input_line_pointer != ',')
4459 ++input_line_pointer;
4462 demand_empty_rest_of_line ();
4467 int dummy ATTRIBUTE_UNUSED;
4469 new_logical_line (0, get_absolute_expression ());
4470 demand_empty_rest_of_line ();
4474 parse_section_name ()
4480 if (*input_line_pointer != '"')
4482 as_bad ("Missing section name");
4483 ignore_rest_of_line ();
4486 name = demand_copy_C_string (&len);
4489 ignore_rest_of_line ();
4493 if (*input_line_pointer != ',')
4495 as_bad ("Comma expected after section name");
4496 ignore_rest_of_line ();
4499 ++input_line_pointer; /* skip comma */
4507 char *name = parse_section_name ();
4511 md.keep_pending_output = 1;
4514 obj_elf_previous (0);
4515 md.keep_pending_output = 0;
4518 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4521 stmt_float_cons (kind)
4542 ia64_do_align (alignment);
4550 int saved_auto_align = md.auto_align;
4554 md.auto_align = saved_auto_align;
4558 dot_xfloat_cons (kind)
4561 char *name = parse_section_name ();
4565 md.keep_pending_output = 1;
4567 stmt_float_cons (kind);
4568 obj_elf_previous (0);
4569 md.keep_pending_output = 0;
4573 dot_xstringer (zero)
4576 char *name = parse_section_name ();
4580 md.keep_pending_output = 1;
4583 obj_elf_previous (0);
4584 md.keep_pending_output = 0;
4591 int saved_auto_align = md.auto_align;
4592 char *name = parse_section_name ();
4596 md.keep_pending_output = 1;
4600 md.auto_align = saved_auto_align;
4601 obj_elf_previous (0);
4602 md.keep_pending_output = 0;
4606 dot_xfloat_cons_ua (kind)
4609 int saved_auto_align = md.auto_align;
4610 char *name = parse_section_name ();
4614 md.keep_pending_output = 1;
4617 stmt_float_cons (kind);
4618 md.auto_align = saved_auto_align;
4619 obj_elf_previous (0);
4620 md.keep_pending_output = 0;
4623 /* .reg.val <regname>,value */
4627 int dummy ATTRIBUTE_UNUSED;
4632 if (reg.X_op != O_register)
4634 as_bad (_("Register name expected"));
4635 ignore_rest_of_line ();
4637 else if (*input_line_pointer++ != ',')
4639 as_bad (_("Comma expected"));
4640 ignore_rest_of_line ();
4644 valueT value = get_absolute_expression ();
4645 int regno = reg.X_add_number;
4646 if (regno < REG_GR || regno > REG_GR + 128)
4647 as_warn (_("Register value annotation ignored"));
4650 gr_values[regno - REG_GR].known = 1;
4651 gr_values[regno - REG_GR].value = value;
4652 gr_values[regno - REG_GR].path = md.path;
4655 demand_empty_rest_of_line ();
4660 .serialize.instruction
4663 dot_serialize (type)
4666 insn_group_break (0, 0, 0);
4668 instruction_serialization ();
4670 data_serialization ();
4671 insn_group_break (0, 0, 0);
4672 demand_empty_rest_of_line ();
4675 /* select dv checking mode
4680 A stop is inserted when changing modes
4687 if (md.manual_bundling)
4688 as_warn (_("Directive invalid within a bundle"));
4690 if (type == 'E' || type == 'A')
4691 md.mode_explicitly_set = 0;
4693 md.mode_explicitly_set = 1;
4700 if (md.explicit_mode)
4701 insn_group_break (1, 0, 0);
4702 md.explicit_mode = 0;
4706 if (!md.explicit_mode)
4707 insn_group_break (1, 0, 0);
4708 md.explicit_mode = 1;
4712 if (md.explicit_mode != md.default_explicit_mode)
4713 insn_group_break (1, 0, 0);
4714 md.explicit_mode = md.default_explicit_mode;
4715 md.mode_explicitly_set = 0;
4726 for (regno = 0; regno < 64; regno++)
4728 if (mask & ((valueT) 1 << regno))
4730 fprintf (stderr, "%s p%d", comma, regno);
4737 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4738 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4739 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4740 .pred.safe_across_calls p1 [, p2 [,...]]
4749 int p1 = -1, p2 = -1;
4753 if (*input_line_pointer != '"')
4755 as_bad (_("Missing predicate relation type"));
4756 ignore_rest_of_line ();
4762 char *form = demand_copy_C_string (&len);
4763 if (strcmp (form, "mutex") == 0)
4765 else if (strcmp (form, "clear") == 0)
4767 else if (strcmp (form, "imply") == 0)
4771 as_bad (_("Unrecognized predicate relation type"));
4772 ignore_rest_of_line ();
4776 if (*input_line_pointer == ',')
4777 ++input_line_pointer;
4787 if (TOUPPER (*input_line_pointer) != 'P'
4788 || (regno = atoi (++input_line_pointer)) < 0
4791 as_bad (_("Predicate register expected"));
4792 ignore_rest_of_line ();
4795 while (ISDIGIT (*input_line_pointer))
4796 ++input_line_pointer;
4803 as_warn (_("Duplicate predicate register ignored"));
4806 /* See if it's a range. */
4807 if (*input_line_pointer == '-')
4810 ++input_line_pointer;
4812 if (TOUPPER (*input_line_pointer) != 'P'
4813 || (regno = atoi (++input_line_pointer)) < 0
4816 as_bad (_("Predicate register expected"));
4817 ignore_rest_of_line ();
4820 while (ISDIGIT (*input_line_pointer))
4821 ++input_line_pointer;
4825 as_bad (_("Bad register range"));
4826 ignore_rest_of_line ();
4837 if (*input_line_pointer != ',')
4839 ++input_line_pointer;
4848 clear_qp_mutex (mask);
4849 clear_qp_implies (mask, (valueT) 0);
4852 if (count != 2 || p1 == -1 || p2 == -1)
4853 as_bad (_("Predicate source and target required"));
4854 else if (p1 == 0 || p2 == 0)
4855 as_bad (_("Use of p0 is not valid in this context"));
4857 add_qp_imply (p1, p2);
4862 as_bad (_("At least two PR arguments expected"));
4867 as_bad (_("Use of p0 is not valid in this context"));
4870 add_qp_mutex (mask);
4873 /* note that we don't override any existing relations */
4876 as_bad (_("At least one PR argument expected"));
4881 fprintf (stderr, "Safe across calls: ");
4882 print_prmask (mask);
4883 fprintf (stderr, "\n");
4885 qp_safe_across_calls = mask;
4888 demand_empty_rest_of_line ();
4891 /* .entry label [, label [, ...]]
4892 Hint to DV code that the given labels are to be considered entry points.
4893 Otherwise, only global labels are considered entry points. */
4897 int dummy ATTRIBUTE_UNUSED;
4906 name = input_line_pointer;
4907 c = get_symbol_end ();
4908 symbolP = symbol_find_or_make (name);
4910 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4912 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4915 *input_line_pointer = c;
4917 c = *input_line_pointer;
4920 input_line_pointer++;
4922 if (*input_line_pointer == '\n')
4928 demand_empty_rest_of_line ();
4931 /* .mem.offset offset, base
4932 "base" is used to distinguish between offsets from a different base. */
4935 dot_mem_offset (dummy)
4936 int dummy ATTRIBUTE_UNUSED;
4938 md.mem_offset.hint = 1;
4939 md.mem_offset.offset = get_absolute_expression ();
4940 if (*input_line_pointer != ',')
4942 as_bad (_("Comma expected"));
4943 ignore_rest_of_line ();
4946 ++input_line_pointer;
4947 md.mem_offset.base = get_absolute_expression ();
4948 demand_empty_rest_of_line ();
4951 /* ia64-specific pseudo-ops: */
4952 const pseudo_typeS md_pseudo_table[] =
4954 { "radix", dot_radix, 0 },
4955 { "lcomm", s_lcomm_bytes, 1 },
4956 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4957 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4958 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4959 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4960 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4961 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4962 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4963 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4964 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4965 { "proc", dot_proc, 0 },
4966 { "body", dot_body, 0 },
4967 { "prologue", dot_prologue, 0 },
4968 { "endp", dot_endp, 0 },
4970 { "fframe", dot_fframe, 0 },
4971 { "vframe", dot_vframe, 0 },
4972 { "vframesp", dot_vframesp, 0 },
4973 { "vframepsp", dot_vframepsp, 0 },
4974 { "save", dot_save, 0 },
4975 { "restore", dot_restore, 0 },
4976 { "restorereg", dot_restorereg, 0 },
4977 { "restorereg.p", dot_restorereg_p, 0 },
4978 { "handlerdata", dot_handlerdata, 0 },
4979 { "unwentry", dot_unwentry, 0 },
4980 { "altrp", dot_altrp, 0 },
4981 { "savesp", dot_savemem, 0 },
4982 { "savepsp", dot_savemem, 1 },
4983 { "save.g", dot_saveg, 0 },
4984 { "save.f", dot_savef, 0 },
4985 { "save.b", dot_saveb, 0 },
4986 { "save.gf", dot_savegf, 0 },
4987 { "spill", dot_spill, 0 },
4988 { "spillreg", dot_spillreg, 0 },
4989 { "spillsp", dot_spillmem, 0 },
4990 { "spillpsp", dot_spillmem, 1 },
4991 { "spillreg.p", dot_spillreg_p, 0 },
4992 { "spillsp.p", dot_spillmem_p, 0 },
4993 { "spillpsp.p", dot_spillmem_p, 1 },
4994 { "label_state", dot_label_state, 0 },
4995 { "copy_state", dot_copy_state, 0 },
4996 { "unwabi", dot_unwabi, 0 },
4997 { "personality", dot_personality, 0 },
4999 { "estate", dot_estate, 0 },
5001 { "mii", dot_template, 0x0 },
5002 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5003 { "mlx", dot_template, 0x2 },
5004 { "mmi", dot_template, 0x4 },
5005 { "mfi", dot_template, 0x6 },
5006 { "mmf", dot_template, 0x7 },
5007 { "mib", dot_template, 0x8 },
5008 { "mbb", dot_template, 0x9 },
5009 { "bbb", dot_template, 0xb },
5010 { "mmb", dot_template, 0xc },
5011 { "mfb", dot_template, 0xe },
5013 { "lb", dot_scope, 0 },
5014 { "le", dot_scope, 1 },
5016 { "align", dot_align, 0 },
5017 { "regstk", dot_regstk, 0 },
5018 { "rotr", dot_rot, DYNREG_GR },
5019 { "rotf", dot_rot, DYNREG_FR },
5020 { "rotp", dot_rot, DYNREG_PR },
5021 { "lsb", dot_byteorder, 0 },
5022 { "msb", dot_byteorder, 1 },
5023 { "psr", dot_psr, 0 },
5024 { "alias", dot_alias, 0 },
5025 { "secalias", dot_alias, 1 },
5026 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5028 { "xdata1", dot_xdata, 1 },
5029 { "xdata2", dot_xdata, 2 },
5030 { "xdata4", dot_xdata, 4 },
5031 { "xdata8", dot_xdata, 8 },
5032 { "xreal4", dot_xfloat_cons, 'f' },
5033 { "xreal8", dot_xfloat_cons, 'd' },
5034 { "xreal10", dot_xfloat_cons, 'x' },
5035 { "xreal16", dot_xfloat_cons, 'X' },
5036 { "xstring", dot_xstringer, 0 },
5037 { "xstringz", dot_xstringer, 1 },
5039 /* unaligned versions: */
5040 { "xdata2.ua", dot_xdata_ua, 2 },
5041 { "xdata4.ua", dot_xdata_ua, 4 },
5042 { "xdata8.ua", dot_xdata_ua, 8 },
5043 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5044 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5045 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5046 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5048 /* annotations/DV checking support */
5049 { "entry", dot_entry, 0 },
5050 { "mem.offset", dot_mem_offset, 0 },
5051 { "pred.rel", dot_pred_rel, 0 },
5052 { "pred.rel.clear", dot_pred_rel, 'c' },
5053 { "pred.rel.imply", dot_pred_rel, 'i' },
5054 { "pred.rel.mutex", dot_pred_rel, 'm' },
5055 { "pred.safe_across_calls", dot_pred_rel, 's' },
5056 { "reg.val", dot_reg_val, 0 },
5057 { "serialize.data", dot_serialize, 0 },
5058 { "serialize.instruction", dot_serialize, 1 },
5059 { "auto", dot_dv_mode, 'a' },
5060 { "explicit", dot_dv_mode, 'e' },
5061 { "default", dot_dv_mode, 'd' },
5063 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5064 IA-64 aligns data allocation pseudo-ops by default, so we have to
5065 tell it that these ones are supposed to be unaligned. Long term,
5066 should rewrite so that only IA-64 specific data allocation pseudo-ops
5067 are aligned by default. */
5068 {"2byte", stmt_cons_ua, 2},
5069 {"4byte", stmt_cons_ua, 4},
5070 {"8byte", stmt_cons_ua, 8},
5075 static const struct pseudo_opcode
5078 void (*handler) (int);
5083 /* these are more like pseudo-ops, but don't start with a dot */
5084 { "data1", cons, 1 },
5085 { "data2", cons, 2 },
5086 { "data4", cons, 4 },
5087 { "data8", cons, 8 },
5088 { "data16", cons, 16 },
5089 { "real4", stmt_float_cons, 'f' },
5090 { "real8", stmt_float_cons, 'd' },
5091 { "real10", stmt_float_cons, 'x' },
5092 { "real16", stmt_float_cons, 'X' },
5093 { "string", stringer, 0 },
5094 { "stringz", stringer, 1 },
5096 /* unaligned versions: */
5097 { "data2.ua", stmt_cons_ua, 2 },
5098 { "data4.ua", stmt_cons_ua, 4 },
5099 { "data8.ua", stmt_cons_ua, 8 },
5100 { "data16.ua", stmt_cons_ua, 16 },
5101 { "real4.ua", float_cons, 'f' },
5102 { "real8.ua", float_cons, 'd' },
5103 { "real10.ua", float_cons, 'x' },
5104 { "real16.ua", float_cons, 'X' },
5107 /* Declare a register by creating a symbol for it and entering it in
5108 the symbol table. */
5111 declare_register (name, regnum)
5118 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5120 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5122 as_fatal ("Inserting \"%s\" into register table failed: %s",
5129 declare_register_set (prefix, num_regs, base_regnum)
5137 for (i = 0; i < num_regs; ++i)
5139 sprintf (name, "%s%u", prefix, i);
5140 declare_register (name, base_regnum + i);
5145 operand_width (opnd)
5146 enum ia64_opnd opnd;
5148 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5149 unsigned int bits = 0;
5153 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5154 bits += odesc->field[i].bits;
5159 static enum operand_match_result
5160 operand_match (idesc, index, e)
5161 const struct ia64_opcode *idesc;
5165 enum ia64_opnd opnd = idesc->operands[index];
5166 int bits, relocatable = 0;
5167 struct insn_fix *fix;
5174 case IA64_OPND_AR_CCV:
5175 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5176 return OPERAND_MATCH;
5179 case IA64_OPND_AR_CSD:
5180 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5181 return OPERAND_MATCH;
5184 case IA64_OPND_AR_PFS:
5185 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5186 return OPERAND_MATCH;
5190 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5191 return OPERAND_MATCH;
5195 if (e->X_op == O_register && e->X_add_number == REG_IP)
5196 return OPERAND_MATCH;
5200 if (e->X_op == O_register && e->X_add_number == REG_PR)
5201 return OPERAND_MATCH;
5204 case IA64_OPND_PR_ROT:
5205 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5206 return OPERAND_MATCH;
5210 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5211 return OPERAND_MATCH;
5214 case IA64_OPND_PSR_L:
5215 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5216 return OPERAND_MATCH;
5219 case IA64_OPND_PSR_UM:
5220 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5221 return OPERAND_MATCH;
5225 if (e->X_op == O_constant)
5227 if (e->X_add_number == 1)
5228 return OPERAND_MATCH;
5230 return OPERAND_OUT_OF_RANGE;
5235 if (e->X_op == O_constant)
5237 if (e->X_add_number == 8)
5238 return OPERAND_MATCH;
5240 return OPERAND_OUT_OF_RANGE;
5245 if (e->X_op == O_constant)
5247 if (e->X_add_number == 16)
5248 return OPERAND_MATCH;
5250 return OPERAND_OUT_OF_RANGE;
5254 /* register operands: */
5257 if (e->X_op == O_register && e->X_add_number >= REG_AR
5258 && e->X_add_number < REG_AR + 128)
5259 return OPERAND_MATCH;
5264 if (e->X_op == O_register && e->X_add_number >= REG_BR
5265 && e->X_add_number < REG_BR + 8)
5266 return OPERAND_MATCH;
5270 if (e->X_op == O_register && e->X_add_number >= REG_CR
5271 && e->X_add_number < REG_CR + 128)
5272 return OPERAND_MATCH;
5279 if (e->X_op == O_register && e->X_add_number >= REG_FR
5280 && e->X_add_number < REG_FR + 128)
5281 return OPERAND_MATCH;
5286 if (e->X_op == O_register && e->X_add_number >= REG_P
5287 && e->X_add_number < REG_P + 64)
5288 return OPERAND_MATCH;
5294 if (e->X_op == O_register && e->X_add_number >= REG_GR
5295 && e->X_add_number < REG_GR + 128)
5296 return OPERAND_MATCH;
5299 case IA64_OPND_R3_2:
5300 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5302 if (e->X_add_number < REG_GR + 4)
5303 return OPERAND_MATCH;
5304 else if (e->X_add_number < REG_GR + 128)
5305 return OPERAND_OUT_OF_RANGE;
5309 /* indirect operands: */
5310 case IA64_OPND_CPUID_R3:
5311 case IA64_OPND_DBR_R3:
5312 case IA64_OPND_DTR_R3:
5313 case IA64_OPND_ITR_R3:
5314 case IA64_OPND_IBR_R3:
5315 case IA64_OPND_MSR_R3:
5316 case IA64_OPND_PKR_R3:
5317 case IA64_OPND_PMC_R3:
5318 case IA64_OPND_PMD_R3:
5319 case IA64_OPND_RR_R3:
5320 if (e->X_op == O_index && e->X_op_symbol
5321 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5322 == opnd - IA64_OPND_CPUID_R3))
5323 return OPERAND_MATCH;
5327 if (e->X_op == O_index && !e->X_op_symbol)
5328 return OPERAND_MATCH;
5331 /* immediate operands: */
5332 case IA64_OPND_CNT2a:
5333 case IA64_OPND_LEN4:
5334 case IA64_OPND_LEN6:
5335 bits = operand_width (idesc->operands[index]);
5336 if (e->X_op == O_constant)
5338 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5339 return OPERAND_MATCH;
5341 return OPERAND_OUT_OF_RANGE;
5345 case IA64_OPND_CNT2b:
5346 if (e->X_op == O_constant)
5348 if ((bfd_vma) (e->X_add_number - 1) < 3)
5349 return OPERAND_MATCH;
5351 return OPERAND_OUT_OF_RANGE;
5355 case IA64_OPND_CNT2c:
5356 val = e->X_add_number;
5357 if (e->X_op == O_constant)
5359 if ((val == 0 || val == 7 || val == 15 || val == 16))
5360 return OPERAND_MATCH;
5362 return OPERAND_OUT_OF_RANGE;
5367 /* SOR must be an integer multiple of 8 */
5368 if (e->X_op == O_constant && e->X_add_number & 0x7)
5369 return OPERAND_OUT_OF_RANGE;
5372 if (e->X_op == O_constant)
5374 if ((bfd_vma) e->X_add_number <= 96)
5375 return OPERAND_MATCH;
5377 return OPERAND_OUT_OF_RANGE;
5381 case IA64_OPND_IMMU62:
5382 if (e->X_op == O_constant)
5384 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5385 return OPERAND_MATCH;
5387 return OPERAND_OUT_OF_RANGE;
5391 /* FIXME -- need 62-bit relocation type */
5392 as_bad (_("62-bit relocation not yet implemented"));
5396 case IA64_OPND_IMMU64:
5397 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5398 || e->X_op == O_subtract)
5400 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5401 fix->code = BFD_RELOC_IA64_IMM64;
5402 if (e->X_op != O_subtract)
5404 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5405 if (e->X_op == O_pseudo_fixup)
5409 fix->opnd = idesc->operands[index];
5412 ++CURR_SLOT.num_fixups;
5413 return OPERAND_MATCH;
5415 else if (e->X_op == O_constant)
5416 return OPERAND_MATCH;
5419 case IA64_OPND_CCNT5:
5420 case IA64_OPND_CNT5:
5421 case IA64_OPND_CNT6:
5422 case IA64_OPND_CPOS6a:
5423 case IA64_OPND_CPOS6b:
5424 case IA64_OPND_CPOS6c:
5425 case IA64_OPND_IMMU2:
5426 case IA64_OPND_IMMU7a:
5427 case IA64_OPND_IMMU7b:
5428 case IA64_OPND_IMMU21:
5429 case IA64_OPND_IMMU24:
5430 case IA64_OPND_MBTYPE4:
5431 case IA64_OPND_MHTYPE8:
5432 case IA64_OPND_POS6:
5433 bits = operand_width (idesc->operands[index]);
5434 if (e->X_op == O_constant)
5436 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5437 return OPERAND_MATCH;
5439 return OPERAND_OUT_OF_RANGE;
5443 case IA64_OPND_IMMU9:
5444 bits = operand_width (idesc->operands[index]);
5445 if (e->X_op == O_constant)
5447 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5449 int lobits = e->X_add_number & 0x3;
5450 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5451 e->X_add_number |= (bfd_vma) 0x3;
5452 return OPERAND_MATCH;
5455 return OPERAND_OUT_OF_RANGE;
5459 case IA64_OPND_IMM44:
5460 /* least 16 bits must be zero */
5461 if ((e->X_add_number & 0xffff) != 0)
5462 /* XXX technically, this is wrong: we should not be issuing warning
5463 messages until we're sure this instruction pattern is going to
5465 as_warn (_("lower 16 bits of mask ignored"));
5467 if (e->X_op == O_constant)
5469 if (((e->X_add_number >= 0
5470 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5471 || (e->X_add_number < 0
5472 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5475 if (e->X_add_number >= 0
5476 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5478 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5480 return OPERAND_MATCH;
5483 return OPERAND_OUT_OF_RANGE;
5487 case IA64_OPND_IMM17:
5488 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5489 if (e->X_op == O_constant)
5491 if (((e->X_add_number >= 0
5492 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5493 || (e->X_add_number < 0
5494 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5497 if (e->X_add_number >= 0
5498 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5500 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5502 return OPERAND_MATCH;
5505 return OPERAND_OUT_OF_RANGE;
5509 case IA64_OPND_IMM14:
5510 case IA64_OPND_IMM22:
5512 case IA64_OPND_IMM1:
5513 case IA64_OPND_IMM8:
5514 case IA64_OPND_IMM8U4:
5515 case IA64_OPND_IMM8M1:
5516 case IA64_OPND_IMM8M1U4:
5517 case IA64_OPND_IMM8M1U8:
5518 case IA64_OPND_IMM9a:
5519 case IA64_OPND_IMM9b:
5520 bits = operand_width (idesc->operands[index]);
5521 if (relocatable && (e->X_op == O_symbol
5522 || e->X_op == O_subtract
5523 || e->X_op == O_pseudo_fixup))
5525 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5527 if (idesc->operands[index] == IA64_OPND_IMM14)
5528 fix->code = BFD_RELOC_IA64_IMM14;
5530 fix->code = BFD_RELOC_IA64_IMM22;
5532 if (e->X_op != O_subtract)
5534 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5535 if (e->X_op == O_pseudo_fixup)
5539 fix->opnd = idesc->operands[index];
5542 ++CURR_SLOT.num_fixups;
5543 return OPERAND_MATCH;
5545 else if (e->X_op != O_constant
5546 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5547 return OPERAND_MISMATCH;
5549 if (opnd == IA64_OPND_IMM8M1U4)
5551 /* Zero is not valid for unsigned compares that take an adjusted
5552 constant immediate range. */
5553 if (e->X_add_number == 0)
5554 return OPERAND_OUT_OF_RANGE;
5556 /* Sign-extend 32-bit unsigned numbers, so that the following range
5557 checks will work. */
5558 val = e->X_add_number;
5559 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5560 && ((val & ((bfd_vma) 1 << 31)) != 0))
5561 val = ((val << 32) >> 32);
5563 /* Check for 0x100000000. This is valid because
5564 0x100000000-1 is the same as ((uint32_t) -1). */
5565 if (val == ((bfd_signed_vma) 1 << 32))
5566 return OPERAND_MATCH;
5570 else if (opnd == IA64_OPND_IMM8M1U8)
5572 /* Zero is not valid for unsigned compares that take an adjusted
5573 constant immediate range. */
5574 if (e->X_add_number == 0)
5575 return OPERAND_OUT_OF_RANGE;
5577 /* Check for 0x10000000000000000. */
5578 if (e->X_op == O_big)
5580 if (generic_bignum[0] == 0
5581 && generic_bignum[1] == 0
5582 && generic_bignum[2] == 0
5583 && generic_bignum[3] == 0
5584 && generic_bignum[4] == 1)
5585 return OPERAND_MATCH;
5587 return OPERAND_OUT_OF_RANGE;
5590 val = e->X_add_number - 1;
5592 else if (opnd == IA64_OPND_IMM8M1)
5593 val = e->X_add_number - 1;
5594 else if (opnd == IA64_OPND_IMM8U4)
5596 /* Sign-extend 32-bit unsigned numbers, so that the following range
5597 checks will work. */
5598 val = e->X_add_number;
5599 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5600 && ((val & ((bfd_vma) 1 << 31)) != 0))
5601 val = ((val << 32) >> 32);
5604 val = e->X_add_number;
5606 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5607 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5608 return OPERAND_MATCH;
5610 return OPERAND_OUT_OF_RANGE;
5612 case IA64_OPND_INC3:
5613 /* +/- 1, 4, 8, 16 */
5614 val = e->X_add_number;
5617 if (e->X_op == O_constant)
5619 if ((val == 1 || val == 4 || val == 8 || val == 16))
5620 return OPERAND_MATCH;
5622 return OPERAND_OUT_OF_RANGE;
5626 case IA64_OPND_TGT25:
5627 case IA64_OPND_TGT25b:
5628 case IA64_OPND_TGT25c:
5629 case IA64_OPND_TGT64:
5630 if (e->X_op == O_symbol)
5632 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5633 if (opnd == IA64_OPND_TGT25)
5634 fix->code = BFD_RELOC_IA64_PCREL21F;
5635 else if (opnd == IA64_OPND_TGT25b)
5636 fix->code = BFD_RELOC_IA64_PCREL21M;
5637 else if (opnd == IA64_OPND_TGT25c)
5638 fix->code = BFD_RELOC_IA64_PCREL21B;
5639 else if (opnd == IA64_OPND_TGT64)
5640 fix->code = BFD_RELOC_IA64_PCREL60B;
5644 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5645 fix->opnd = idesc->operands[index];
5648 ++CURR_SLOT.num_fixups;
5649 return OPERAND_MATCH;
5651 case IA64_OPND_TAG13:
5652 case IA64_OPND_TAG13b:
5656 return OPERAND_MATCH;
5659 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5660 /* There are no external relocs for TAG13/TAG13b fields, so we
5661 create a dummy reloc. This will not live past md_apply_fix3. */
5662 fix->code = BFD_RELOC_UNUSED;
5663 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5664 fix->opnd = idesc->operands[index];
5667 ++CURR_SLOT.num_fixups;
5668 return OPERAND_MATCH;
5675 case IA64_OPND_LDXMOV:
5676 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5677 fix->code = BFD_RELOC_IA64_LDXMOV;
5678 fix->opnd = idesc->operands[index];
5681 ++CURR_SLOT.num_fixups;
5682 return OPERAND_MATCH;
5687 return OPERAND_MISMATCH;
5696 memset (e, 0, sizeof (*e));
5699 if (*input_line_pointer != '}')
5701 sep = *input_line_pointer++;
5705 if (!md.manual_bundling)
5706 as_warn ("Found '}' when manual bundling is off");
5708 CURR_SLOT.manual_bundling_off = 1;
5709 md.manual_bundling = 0;
5715 /* Returns the next entry in the opcode table that matches the one in
5716 IDESC, and frees the entry in IDESC. If no matching entry is
5717 found, NULL is returned instead. */
5719 static struct ia64_opcode *
5720 get_next_opcode (struct ia64_opcode *idesc)
5722 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5723 ia64_free_opcode (idesc);
5727 /* Parse the operands for the opcode and find the opcode variant that
5728 matches the specified operands, or NULL if no match is possible. */
5730 static struct ia64_opcode *
5731 parse_operands (idesc)
5732 struct ia64_opcode *idesc;
5734 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5735 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5736 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5737 enum operand_match_result result;
5739 char *first_arg = 0, *end, *saved_input_pointer;
5742 assert (strlen (idesc->name) <= 128);
5744 strcpy (mnemonic, idesc->name);
5745 if (idesc->operands[2] == IA64_OPND_SOF)
5747 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5748 can't parse the first operand until we have parsed the
5749 remaining operands of the "alloc" instruction. */
5751 first_arg = input_line_pointer;
5752 end = strchr (input_line_pointer, '=');
5755 as_bad ("Expected separator `='");
5758 input_line_pointer = end + 1;
5763 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5765 sep = parse_operand (CURR_SLOT.opnd + i);
5766 if (CURR_SLOT.opnd[i].X_op == O_absent)
5771 if (sep != '=' && sep != ',')
5776 if (num_outputs > 0)
5777 as_bad ("Duplicate equal sign (=) in instruction");
5779 num_outputs = i + 1;
5784 as_bad ("Illegal operand separator `%c'", sep);
5788 if (idesc->operands[2] == IA64_OPND_SOF)
5790 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5791 know (strcmp (idesc->name, "alloc") == 0);
5792 if (num_operands == 5 /* first_arg not included in this count! */
5793 && CURR_SLOT.opnd[2].X_op == O_constant
5794 && CURR_SLOT.opnd[3].X_op == O_constant
5795 && CURR_SLOT.opnd[4].X_op == O_constant
5796 && CURR_SLOT.opnd[5].X_op == O_constant)
5798 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5799 CURR_SLOT.opnd[3].X_add_number,
5800 CURR_SLOT.opnd[4].X_add_number,
5801 CURR_SLOT.opnd[5].X_add_number);
5803 /* now we can parse the first arg: */
5804 saved_input_pointer = input_line_pointer;
5805 input_line_pointer = first_arg;
5806 sep = parse_operand (CURR_SLOT.opnd + 0);
5808 --num_outputs; /* force error */
5809 input_line_pointer = saved_input_pointer;
5811 CURR_SLOT.opnd[2].X_add_number = sof;
5812 CURR_SLOT.opnd[3].X_add_number
5813 = sof - CURR_SLOT.opnd[4].X_add_number;
5814 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5818 highest_unmatched_operand = 0;
5819 curr_out_of_range_pos = -1;
5821 expected_operand = idesc->operands[0];
5822 for (; idesc; idesc = get_next_opcode (idesc))
5824 if (num_outputs != idesc->num_outputs)
5825 continue; /* mismatch in # of outputs */
5827 CURR_SLOT.num_fixups = 0;
5829 /* Try to match all operands. If we see an out-of-range operand,
5830 then continue trying to match the rest of the operands, since if
5831 the rest match, then this idesc will give the best error message. */
5833 out_of_range_pos = -1;
5834 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5836 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5837 if (result != OPERAND_MATCH)
5839 if (result != OPERAND_OUT_OF_RANGE)
5841 if (out_of_range_pos < 0)
5842 /* remember position of the first out-of-range operand: */
5843 out_of_range_pos = i;
5847 /* If we did not match all operands, or if at least one operand was
5848 out-of-range, then this idesc does not match. Keep track of which
5849 idesc matched the most operands before failing. If we have two
5850 idescs that failed at the same position, and one had an out-of-range
5851 operand, then prefer the out-of-range operand. Thus if we have
5852 "add r0=0x1000000,r1" we get an error saying the constant is out
5853 of range instead of an error saying that the constant should have been
5856 if (i != num_operands || out_of_range_pos >= 0)
5858 if (i > highest_unmatched_operand
5859 || (i == highest_unmatched_operand
5860 && out_of_range_pos > curr_out_of_range_pos))
5862 highest_unmatched_operand = i;
5863 if (out_of_range_pos >= 0)
5865 expected_operand = idesc->operands[out_of_range_pos];
5866 error_pos = out_of_range_pos;
5870 expected_operand = idesc->operands[i];
5873 curr_out_of_range_pos = out_of_range_pos;
5878 if (num_operands < NELEMS (idesc->operands)
5879 && idesc->operands[num_operands])
5880 continue; /* mismatch in number of arguments */
5886 if (expected_operand)
5887 as_bad ("Operand %u of `%s' should be %s",
5888 error_pos + 1, mnemonic,
5889 elf64_ia64_operands[expected_operand].desc);
5891 as_bad ("Operand mismatch");
5897 /* Keep track of state necessary to determine whether a NOP is necessary
5898 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5899 detect a case where additional NOPs may be necessary. */
5901 errata_nop_necessary_p (slot, insn_unit)
5903 enum ia64_unit insn_unit;
5906 struct group *this_group = md.last_groups + md.group_idx;
5907 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5908 struct ia64_opcode *idesc = slot->idesc;
5910 /* Test whether this could be the first insn in a problematic sequence. */
5911 if (insn_unit == IA64_UNIT_F)
5913 for (i = 0; i < idesc->num_outputs; i++)
5914 if (idesc->operands[i] == IA64_OPND_P1
5915 || idesc->operands[i] == IA64_OPND_P2)
5917 int regno = slot->opnd[i].X_add_number - REG_P;
5918 /* Ignore invalid operands; they generate errors elsewhere. */
5921 this_group->p_reg_set[regno] = 1;
5925 /* Test whether this could be the second insn in a problematic sequence. */
5926 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5927 && prev_group->p_reg_set[slot->qp_regno])
5929 for (i = 0; i < idesc->num_outputs; i++)
5930 if (idesc->operands[i] == IA64_OPND_R1
5931 || idesc->operands[i] == IA64_OPND_R2
5932 || idesc->operands[i] == IA64_OPND_R3)
5934 int regno = slot->opnd[i].X_add_number - REG_GR;
5935 /* Ignore invalid operands; they generate errors elsewhere. */
5938 if (strncmp (idesc->name, "add", 3) != 0
5939 && strncmp (idesc->name, "sub", 3) != 0
5940 && strncmp (idesc->name, "shladd", 6) != 0
5941 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5942 this_group->g_reg_set_conditionally[regno] = 1;
5946 /* Test whether this could be the third insn in a problematic sequence. */
5947 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5949 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5950 idesc->operands[i] == IA64_OPND_R3
5951 /* For mov indirect. */
5952 || idesc->operands[i] == IA64_OPND_RR_R3
5953 || idesc->operands[i] == IA64_OPND_DBR_R3
5954 || idesc->operands[i] == IA64_OPND_IBR_R3
5955 || idesc->operands[i] == IA64_OPND_PKR_R3
5956 || idesc->operands[i] == IA64_OPND_PMC_R3
5957 || idesc->operands[i] == IA64_OPND_PMD_R3
5958 || idesc->operands[i] == IA64_OPND_MSR_R3
5959 || idesc->operands[i] == IA64_OPND_CPUID_R3
5961 || idesc->operands[i] == IA64_OPND_ITR_R3
5962 || idesc->operands[i] == IA64_OPND_DTR_R3
5963 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5964 || idesc->operands[i] == IA64_OPND_MR3)
5966 int regno = slot->opnd[i].X_add_number - REG_GR;
5967 /* Ignore invalid operands; they generate errors elsewhere. */
5970 if (idesc->operands[i] == IA64_OPND_R3)
5972 if (strcmp (idesc->name, "fc") != 0
5973 && strcmp (idesc->name, "tak") != 0
5974 && strcmp (idesc->name, "thash") != 0
5975 && strcmp (idesc->name, "tpa") != 0
5976 && strcmp (idesc->name, "ttag") != 0
5977 && strncmp (idesc->name, "ptr", 3) != 0
5978 && strncmp (idesc->name, "ptc", 3) != 0
5979 && strncmp (idesc->name, "probe", 5) != 0)
5982 if (prev_group->g_reg_set_conditionally[regno])
5990 build_insn (slot, insnp)
5994 const struct ia64_operand *odesc, *o2desc;
5995 struct ia64_opcode *idesc = slot->idesc;
5996 bfd_signed_vma insn, val;
6000 insn = idesc->opcode | slot->qp_regno;
6002 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6004 if (slot->opnd[i].X_op == O_register
6005 || slot->opnd[i].X_op == O_constant
6006 || slot->opnd[i].X_op == O_index)
6007 val = slot->opnd[i].X_add_number;
6008 else if (slot->opnd[i].X_op == O_big)
6010 /* This must be the value 0x10000000000000000. */
6011 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6017 switch (idesc->operands[i])
6019 case IA64_OPND_IMMU64:
6020 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6021 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6022 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6023 | (((val >> 63) & 0x1) << 36));
6026 case IA64_OPND_IMMU62:
6027 val &= 0x3fffffffffffffffULL;
6028 if (val != slot->opnd[i].X_add_number)
6029 as_warn (_("Value truncated to 62 bits"));
6030 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6031 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6034 case IA64_OPND_TGT64:
6036 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6037 insn |= ((((val >> 59) & 0x1) << 36)
6038 | (((val >> 0) & 0xfffff) << 13));
6069 case IA64_OPND_R3_2:
6070 case IA64_OPND_CPUID_R3:
6071 case IA64_OPND_DBR_R3:
6072 case IA64_OPND_DTR_R3:
6073 case IA64_OPND_ITR_R3:
6074 case IA64_OPND_IBR_R3:
6076 case IA64_OPND_MSR_R3:
6077 case IA64_OPND_PKR_R3:
6078 case IA64_OPND_PMC_R3:
6079 case IA64_OPND_PMD_R3:
6080 case IA64_OPND_RR_R3:
6088 odesc = elf64_ia64_operands + idesc->operands[i];
6089 err = (*odesc->insert) (odesc, val, &insn);
6091 as_bad_where (slot->src_file, slot->src_line,
6092 "Bad operand value: %s", err);
6093 if (idesc->flags & IA64_OPCODE_PSEUDO)
6095 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6096 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6098 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6099 (*o2desc->insert) (o2desc, val, &insn);
6101 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6102 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6103 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6105 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6106 (*o2desc->insert) (o2desc, 64 - val, &insn);
6116 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6117 unsigned int manual_bundling = 0;
6118 enum ia64_unit required_unit, insn_unit = 0;
6119 enum ia64_insn_type type[3], insn_type;
6120 unsigned int template, orig_template;
6121 bfd_vma insn[3] = { -1, -1, -1 };
6122 struct ia64_opcode *idesc;
6123 int end_of_insn_group = 0, user_template = -1;
6124 int n, i, j, first, curr;
6125 unw_rec_list *ptr, *last_ptr, *end_ptr;
6126 bfd_vma t0 = 0, t1 = 0;
6127 struct label_fix *lfix;
6128 struct insn_fix *ifix;
6133 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6134 know (first >= 0 & first < NUM_SLOTS);
6135 n = MIN (3, md.num_slots_in_use);
6137 /* Determine template: user user_template if specified, best match
6140 if (md.slot[first].user_template >= 0)
6141 user_template = template = md.slot[first].user_template;
6144 /* Auto select appropriate template. */
6145 memset (type, 0, sizeof (type));
6147 for (i = 0; i < n; ++i)
6149 if (md.slot[curr].label_fixups && i != 0)
6151 type[i] = md.slot[curr].idesc->type;
6152 curr = (curr + 1) % NUM_SLOTS;
6154 template = best_template[type[0]][type[1]][type[2]];
6157 /* initialize instructions with appropriate nops: */
6158 for (i = 0; i < 3; ++i)
6159 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6163 /* now fill in slots with as many insns as possible: */
6165 idesc = md.slot[curr].idesc;
6166 end_of_insn_group = 0;
6167 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6169 /* If we have unwind records, we may need to update some now. */
6170 ptr = md.slot[curr].unwind_record;
6173 /* Find the last prologue/body record in the list for the current
6174 insn, and set the slot number for all records up to that point.
6175 This needs to be done now, because prologue/body records refer to
6176 the current point, not the point after the instruction has been
6177 issued. This matters because there may have been nops emitted
6178 meanwhile. Any non-prologue non-body record followed by a
6179 prologue/body record must also refer to the current point. */
6181 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6182 for (; ptr != end_ptr; ptr = ptr->next)
6183 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6184 || ptr->r.type == body)
6188 /* Make last_ptr point one after the last prologue/body
6190 last_ptr = last_ptr->next;
6191 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6194 ptr->slot_number = (unsigned long) f + i;
6195 ptr->slot_frag = frag_now;
6197 /* Remove the initialized records, so that we won't accidentally
6198 update them again if we insert a nop and continue. */
6199 md.slot[curr].unwind_record = last_ptr;
6203 if (idesc->flags & IA64_OPCODE_SLOT2)
6205 if (manual_bundling && i != 2)
6206 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6207 "`%s' must be last in bundle", idesc->name);
6211 if (idesc->flags & IA64_OPCODE_LAST)
6214 unsigned int required_template;
6216 /* If we need a stop bit after an M slot, our only choice is
6217 template 5 (M;;MI). If we need a stop bit after a B
6218 slot, our only choice is to place it at the end of the
6219 bundle, because the only available templates are MIB,
6220 MBB, BBB, MMB, and MFB. We don't handle anything other
6221 than M and B slots because these are the only kind of
6222 instructions that can have the IA64_OPCODE_LAST bit set. */
6223 required_template = template;
6224 switch (idesc->type)
6228 required_template = 5;
6236 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6237 "Internal error: don't know how to force %s to end"
6238 "of instruction group", idesc->name);
6242 if (manual_bundling && i != required_slot)
6243 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6244 "`%s' must be last in instruction group",
6246 if (required_slot < i)
6247 /* Can't fit this instruction. */
6251 if (required_template != template)
6253 /* If we switch the template, we need to reset the NOPs
6254 after slot i. The slot-types of the instructions ahead
6255 of i never change, so we don't need to worry about
6256 changing NOPs in front of this slot. */
6257 for (j = i; j < 3; ++j)
6258 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6260 template = required_template;
6262 if (curr != first && md.slot[curr].label_fixups)
6264 if (manual_bundling_on)
6265 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6266 "Label must be first in a bundle");
6267 /* This insn must go into the first slot of a bundle. */
6271 manual_bundling_on = md.slot[curr].manual_bundling_on;
6272 manual_bundling_off = md.slot[curr].manual_bundling_off;
6274 if (manual_bundling_on)
6277 manual_bundling = 1;
6279 break; /* need to start a new bundle */
6282 if (end_of_insn_group && md.num_slots_in_use >= 1)
6284 /* We need an instruction group boundary in the middle of a
6285 bundle. See if we can switch to an other template with
6286 an appropriate boundary. */
6288 orig_template = template;
6289 if (i == 1 && (user_template == 4
6290 || (user_template < 0
6291 && (ia64_templ_desc[template].exec_unit[0]
6295 end_of_insn_group = 0;
6297 else if (i == 2 && (user_template == 0
6298 || (user_template < 0
6299 && (ia64_templ_desc[template].exec_unit[1]
6301 /* This test makes sure we don't switch the template if
6302 the next instruction is one that needs to be first in
6303 an instruction group. Since all those instructions are
6304 in the M group, there is no way such an instruction can
6305 fit in this bundle even if we switch the template. The
6306 reason we have to check for this is that otherwise we
6307 may end up generating "MI;;I M.." which has the deadly
6308 effect that the second M instruction is no longer the
6309 first in the bundle! --davidm 99/12/16 */
6310 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6313 end_of_insn_group = 0;
6315 else if (curr != first)
6316 /* can't fit this insn */
6319 if (template != orig_template)
6320 /* if we switch the template, we need to reset the NOPs
6321 after slot i. The slot-types of the instructions ahead
6322 of i never change, so we don't need to worry about
6323 changing NOPs in front of this slot. */
6324 for (j = i; j < 3; ++j)
6325 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6327 required_unit = ia64_templ_desc[template].exec_unit[i];
6329 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6330 if (idesc->type == IA64_TYPE_DYN)
6332 if ((strcmp (idesc->name, "nop") == 0)
6333 || (strcmp (idesc->name, "hint") == 0)
6334 || (strcmp (idesc->name, "break") == 0))
6335 insn_unit = required_unit;
6336 else if (strcmp (idesc->name, "chk.s") == 0)
6338 insn_unit = IA64_UNIT_M;
6339 if (required_unit == IA64_UNIT_I)
6340 insn_unit = IA64_UNIT_I;
6343 as_fatal ("emit_one_bundle: unexpected dynamic op");
6345 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6346 ia64_free_opcode (idesc);
6347 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6349 know (!idesc->next); /* no resolved dynamic ops have collisions */
6354 insn_type = idesc->type;
6355 insn_unit = IA64_UNIT_NIL;
6359 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6360 insn_unit = required_unit;
6362 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6363 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6364 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6365 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6366 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6371 if (insn_unit != required_unit)
6373 if (required_unit == IA64_UNIT_L
6374 && insn_unit == IA64_UNIT_I
6375 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6377 /* we got ourselves an MLX template but the current
6378 instruction isn't an X-unit, or an I-unit instruction
6379 that can go into the X slot of an MLX template. Duh. */
6380 if (md.num_slots_in_use >= NUM_SLOTS)
6382 as_bad_where (md.slot[curr].src_file,
6383 md.slot[curr].src_line,
6384 "`%s' can't go in X slot of "
6385 "MLX template", idesc->name);
6386 /* drop this insn so we don't livelock: */
6387 --md.num_slots_in_use;
6391 continue; /* try next slot */
6397 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6398 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6401 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6402 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6404 build_insn (md.slot + curr, insn + i);
6406 ptr = md.slot[curr].unwind_record;
6409 /* Set slot numbers for all remaining unwind records belonging to the
6410 current insn. There can not be any prologue/body unwind records
6412 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6413 for (; ptr != end_ptr; ptr = ptr->next)
6415 ptr->slot_number = (unsigned long) f + i;
6416 ptr->slot_frag = frag_now;
6418 md.slot[curr].unwind_record = NULL;
6421 if (required_unit == IA64_UNIT_L)
6424 /* skip one slot for long/X-unit instructions */
6427 --md.num_slots_in_use;
6429 /* now is a good time to fix up the labels for this insn: */
6430 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6432 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6433 symbol_set_frag (lfix->sym, frag_now);
6435 /* and fix up the tags also. */
6436 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6438 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6439 symbol_set_frag (lfix->sym, frag_now);
6442 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6444 ifix = md.slot[curr].fixup + j;
6445 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6446 &ifix->expr, ifix->is_pcrel, ifix->code);
6447 fix->tc_fix_data.opnd = ifix->opnd;
6448 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6449 fix->fx_file = md.slot[curr].src_file;
6450 fix->fx_line = md.slot[curr].src_line;
6453 end_of_insn_group = md.slot[curr].end_of_insn_group;
6455 if (end_of_insn_group)
6457 md.group_idx = (md.group_idx + 1) % 3;
6458 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6462 ia64_free_opcode (md.slot[curr].idesc);
6463 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6464 md.slot[curr].user_template = -1;
6466 if (manual_bundling_off)
6468 manual_bundling = 0;
6471 curr = (curr + 1) % NUM_SLOTS;
6472 idesc = md.slot[curr].idesc;
6474 if (manual_bundling)
6476 if (md.num_slots_in_use > 0)
6477 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6478 "`%s' does not fit into %s template",
6479 idesc->name, ia64_templ_desc[template].name);
6481 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6482 "Missing '}' at end of file");
6484 know (md.num_slots_in_use < NUM_SLOTS);
6486 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6487 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6489 number_to_chars_littleendian (f + 0, t0, 8);
6490 number_to_chars_littleendian (f + 8, t1, 8);
6494 unwind.list->next_slot_number = (unsigned long) f + 16;
6495 unwind.list->next_slot_frag = frag_now;
6500 md_parse_option (c, arg)
6507 /* Switches from the Intel assembler. */
6509 if (strcmp (arg, "ilp64") == 0
6510 || strcmp (arg, "lp64") == 0
6511 || strcmp (arg, "p64") == 0)
6513 md.flags |= EF_IA_64_ABI64;
6515 else if (strcmp (arg, "ilp32") == 0)
6517 md.flags &= ~EF_IA_64_ABI64;
6519 else if (strcmp (arg, "le") == 0)
6521 md.flags &= ~EF_IA_64_BE;
6523 else if (strcmp (arg, "be") == 0)
6525 md.flags |= EF_IA_64_BE;
6532 if (strcmp (arg, "so") == 0)
6534 /* Suppress signon message. */
6536 else if (strcmp (arg, "pi") == 0)
6538 /* Reject privileged instructions. FIXME */
6540 else if (strcmp (arg, "us") == 0)
6542 /* Allow union of signed and unsigned range. FIXME */
6544 else if (strcmp (arg, "close_fcalls") == 0)
6546 /* Do not resolve global function calls. */
6553 /* temp[="prefix"] Insert temporary labels into the object file
6554 symbol table prefixed by "prefix".
6555 Default prefix is ":temp:".
6560 /* indirect=<tgt> Assume unannotated indirect branches behavior
6561 according to <tgt> --
6562 exit: branch out from the current context (default)
6563 labels: all labels in context may be branch targets
6565 if (strncmp (arg, "indirect=", 9) != 0)
6570 /* -X conflicts with an ignored option, use -x instead */
6572 if (!arg || strcmp (arg, "explicit") == 0)
6574 /* set default mode to explicit */
6575 md.default_explicit_mode = 1;
6578 else if (strcmp (arg, "auto") == 0)
6580 md.default_explicit_mode = 0;
6582 else if (strcmp (arg, "debug") == 0)
6586 else if (strcmp (arg, "debugx") == 0)
6588 md.default_explicit_mode = 1;
6593 as_bad (_("Unrecognized option '-x%s'"), arg);
6598 /* nops Print nops statistics. */
6601 /* GNU specific switches for gcc. */
6602 case OPTION_MCONSTANT_GP:
6603 md.flags |= EF_IA_64_CONS_GP;
6606 case OPTION_MAUTO_PIC:
6607 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6618 md_show_usage (stream)
6623 --mconstant-gp mark output file as using the constant-GP model\n\
6624 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6625 --mauto-pic mark output file as using the constant-GP model\n\
6626 without function descriptors (sets ELF header flag\n\
6627 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6628 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6629 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6630 -x | -xexplicit turn on dependency violation checking (default)\n\
6631 -xauto automagically remove dependency violations\n\
6632 -xdebug debug dependency violation checker\n"),
6637 ia64_after_parse_args ()
6639 if (debug_type == DEBUG_STABS)
6640 as_fatal (_("--gstabs is not supported for ia64"));
6643 /* Return true if TYPE fits in TEMPL at SLOT. */
6646 match (int templ, int type, int slot)
6648 enum ia64_unit unit;
6651 unit = ia64_templ_desc[templ].exec_unit[slot];
6654 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6656 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6658 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6659 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6660 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6661 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6662 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6663 default: result = 0; break;
6668 /* Add a bit of extra goodness if a nop of type F or B would fit
6669 in TEMPL at SLOT. */
6672 extra_goodness (int templ, int slot)
6674 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6676 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6681 /* This function is called once, at assembler startup time. It sets
6682 up all the tables, etc. that the MD part of the assembler will need
6683 that can be determined before arguments are parsed. */
6687 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6692 md.explicit_mode = md.default_explicit_mode;
6694 bfd_set_section_alignment (stdoutput, text_section, 4);
6696 /* Make sure function pointers get initialized. */
6697 target_big_endian = -1;
6698 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6700 alias_hash = hash_new ();
6701 alias_name_hash = hash_new ();
6702 secalias_hash = hash_new ();
6703 secalias_name_hash = hash_new ();
6705 pseudo_func[FUNC_DTP_MODULE].u.sym =
6706 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6707 &zero_address_frag);
6709 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6710 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6711 &zero_address_frag);
6713 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6714 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6715 &zero_address_frag);
6717 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6718 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6719 &zero_address_frag);
6721 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6722 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6723 &zero_address_frag);
6725 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6726 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6727 &zero_address_frag);
6729 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6730 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6731 &zero_address_frag);
6733 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6734 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6735 &zero_address_frag);
6737 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6738 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6739 &zero_address_frag);
6741 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6742 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6743 &zero_address_frag);
6745 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6746 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6747 &zero_address_frag);
6749 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6750 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6751 &zero_address_frag);
6753 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6754 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6755 &zero_address_frag);
6757 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6758 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6759 &zero_address_frag);
6761 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6762 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6763 &zero_address_frag);
6765 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6766 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6767 &zero_address_frag);
6769 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6770 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6771 &zero_address_frag);
6773 /* Compute the table of best templates. We compute goodness as a
6774 base 4 value, in which each match counts for 3, each F counts
6775 for 2, each B counts for 1. This should maximize the number of
6776 F and B nops in the chosen bundles, which is good because these
6777 pipelines are least likely to be overcommitted. */
6778 for (i = 0; i < IA64_NUM_TYPES; ++i)
6779 for (j = 0; j < IA64_NUM_TYPES; ++j)
6780 for (k = 0; k < IA64_NUM_TYPES; ++k)
6783 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6786 if (match (t, i, 0))
6788 if (match (t, j, 1))
6790 if (match (t, k, 2))
6791 goodness = 3 + 3 + 3;
6793 goodness = 3 + 3 + extra_goodness (t, 2);
6795 else if (match (t, j, 2))
6796 goodness = 3 + 3 + extra_goodness (t, 1);
6800 goodness += extra_goodness (t, 1);
6801 goodness += extra_goodness (t, 2);
6804 else if (match (t, i, 1))
6806 if (match (t, j, 2))
6809 goodness = 3 + extra_goodness (t, 2);
6811 else if (match (t, i, 2))
6812 goodness = 3 + extra_goodness (t, 1);
6814 if (goodness > best)
6817 best_template[i][j][k] = t;
6822 for (i = 0; i < NUM_SLOTS; ++i)
6823 md.slot[i].user_template = -1;
6825 md.pseudo_hash = hash_new ();
6826 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6828 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6829 (void *) (pseudo_opcode + i));
6831 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6832 pseudo_opcode[i].name, err);
6835 md.reg_hash = hash_new ();
6836 md.dynreg_hash = hash_new ();
6837 md.const_hash = hash_new ();
6838 md.entry_hash = hash_new ();
6840 /* general registers: */
6843 for (i = 0; i < total; ++i)
6845 sprintf (name, "r%d", i - REG_GR);
6846 md.regsym[i] = declare_register (name, i);
6849 /* floating point registers: */
6851 for (; i < total; ++i)
6853 sprintf (name, "f%d", i - REG_FR);
6854 md.regsym[i] = declare_register (name, i);
6857 /* application registers: */
6860 for (; i < total; ++i)
6862 sprintf (name, "ar%d", i - REG_AR);
6863 md.regsym[i] = declare_register (name, i);
6866 /* control registers: */
6869 for (; i < total; ++i)
6871 sprintf (name, "cr%d", i - REG_CR);
6872 md.regsym[i] = declare_register (name, i);
6875 /* predicate registers: */
6877 for (; i < total; ++i)
6879 sprintf (name, "p%d", i - REG_P);
6880 md.regsym[i] = declare_register (name, i);
6883 /* branch registers: */
6885 for (; i < total; ++i)
6887 sprintf (name, "b%d", i - REG_BR);
6888 md.regsym[i] = declare_register (name, i);
6891 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6892 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6893 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6894 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6895 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6896 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6897 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6899 for (i = 0; i < NELEMS (indirect_reg); ++i)
6901 regnum = indirect_reg[i].regnum;
6902 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6905 /* define synonyms for application registers: */
6906 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6907 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6908 REG_AR + ar[i - REG_AR].regnum);
6910 /* define synonyms for control registers: */
6911 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6912 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6913 REG_CR + cr[i - REG_CR].regnum);
6915 declare_register ("gp", REG_GR + 1);
6916 declare_register ("sp", REG_GR + 12);
6917 declare_register ("rp", REG_BR + 0);
6919 /* pseudo-registers used to specify unwind info: */
6920 declare_register ("psp", REG_PSP);
6922 declare_register_set ("ret", 4, REG_GR + 8);
6923 declare_register_set ("farg", 8, REG_FR + 8);
6924 declare_register_set ("fret", 8, REG_FR + 8);
6926 for (i = 0; i < NELEMS (const_bits); ++i)
6928 err = hash_insert (md.const_hash, const_bits[i].name,
6929 (PTR) (const_bits + i));
6931 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6935 /* Set the architecture and machine depending on defaults and command line
6937 if (md.flags & EF_IA_64_ABI64)
6938 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6940 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6943 as_warn (_("Could not set architecture and machine"));
6945 /* Set the pointer size and pointer shift size depending on md.flags */
6947 if (md.flags & EF_IA_64_ABI64)
6949 md.pointer_size = 8; /* pointers are 8 bytes */
6950 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6954 md.pointer_size = 4; /* pointers are 4 bytes */
6955 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6958 md.mem_offset.hint = 0;
6961 md.entry_labels = NULL;
6964 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6965 because that is called after md_parse_option which is where we do the
6966 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6967 default endianness. */
6970 ia64_init (argc, argv)
6971 int argc ATTRIBUTE_UNUSED;
6972 char **argv ATTRIBUTE_UNUSED;
6974 md.flags = MD_FLAGS_DEFAULT;
6977 /* Return a string for the target object file format. */
6980 ia64_target_format ()
6982 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6984 if (md.flags & EF_IA_64_BE)
6986 if (md.flags & EF_IA_64_ABI64)
6987 #if defined(TE_AIX50)
6988 return "elf64-ia64-aix-big";
6989 #elif defined(TE_HPUX)
6990 return "elf64-ia64-hpux-big";
6992 return "elf64-ia64-big";
6995 #if defined(TE_AIX50)
6996 return "elf32-ia64-aix-big";
6997 #elif defined(TE_HPUX)
6998 return "elf32-ia64-hpux-big";
7000 return "elf32-ia64-big";
7005 if (md.flags & EF_IA_64_ABI64)
7007 return "elf64-ia64-aix-little";
7009 return "elf64-ia64-little";
7013 return "elf32-ia64-aix-little";
7015 return "elf32-ia64-little";
7020 return "unknown-format";
7024 ia64_end_of_source ()
7026 /* terminate insn group upon reaching end of file: */
7027 insn_group_break (1, 0, 0);
7029 /* emits slots we haven't written yet: */
7030 ia64_flush_insns ();
7032 bfd_set_private_flags (stdoutput, md.flags);
7034 md.mem_offset.hint = 0;
7040 if (md.qp.X_op == O_register)
7041 as_bad ("qualifying predicate not followed by instruction");
7042 md.qp.X_op = O_absent;
7044 if (ignore_input ())
7047 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7049 if (md.detect_dv && !md.explicit_mode)
7050 as_warn (_("Explicit stops are ignored in auto mode"));
7052 insn_group_break (1, 0, 0);
7056 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7058 static int defining_tag = 0;
7061 ia64_unrecognized_line (ch)
7067 expression (&md.qp);
7068 if (*input_line_pointer++ != ')')
7070 as_bad ("Expected ')'");
7073 if (md.qp.X_op != O_register)
7075 as_bad ("Qualifying predicate expected");
7078 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7080 as_bad ("Predicate register expected");
7086 if (md.manual_bundling)
7087 as_warn ("Found '{' when manual bundling is already turned on");
7089 CURR_SLOT.manual_bundling_on = 1;
7090 md.manual_bundling = 1;
7092 /* Bundling is only acceptable in explicit mode
7093 or when in default automatic mode. */
7094 if (md.detect_dv && !md.explicit_mode)
7096 if (!md.mode_explicitly_set
7097 && !md.default_explicit_mode)
7100 as_warn (_("Found '{' after explicit switch to automatic mode"));
7105 if (!md.manual_bundling)
7106 as_warn ("Found '}' when manual bundling is off");
7108 PREV_SLOT.manual_bundling_off = 1;
7109 md.manual_bundling = 0;
7111 /* switch back to automatic mode, if applicable */
7114 && !md.mode_explicitly_set
7115 && !md.default_explicit_mode)
7118 /* Allow '{' to follow on the same line. We also allow ";;", but that
7119 happens automatically because ';' is an end of line marker. */
7121 if (input_line_pointer[0] == '{')
7123 input_line_pointer++;
7124 return ia64_unrecognized_line ('{');
7127 demand_empty_rest_of_line ();
7137 if (md.qp.X_op == O_register)
7139 as_bad ("Tag must come before qualifying predicate.");
7143 /* This implements just enough of read_a_source_file in read.c to
7144 recognize labels. */
7145 if (is_name_beginner (*input_line_pointer))
7147 s = input_line_pointer;
7148 c = get_symbol_end ();
7150 else if (LOCAL_LABELS_FB
7151 && ISDIGIT (*input_line_pointer))
7154 while (ISDIGIT (*input_line_pointer))
7155 temp = (temp * 10) + *input_line_pointer++ - '0';
7156 fb_label_instance_inc (temp);
7157 s = fb_label_name (temp, 0);
7158 c = *input_line_pointer;
7167 /* Put ':' back for error messages' sake. */
7168 *input_line_pointer++ = ':';
7169 as_bad ("Expected ':'");
7176 /* Put ':' back for error messages' sake. */
7177 *input_line_pointer++ = ':';
7178 if (*input_line_pointer++ != ']')
7180 as_bad ("Expected ']'");
7185 as_bad ("Tag name expected");
7195 /* Not a valid line. */
7200 ia64_frob_label (sym)
7203 struct label_fix *fix;
7205 /* Tags need special handling since they are not bundle breaks like
7209 fix = obstack_alloc (¬es, sizeof (*fix));
7211 fix->next = CURR_SLOT.tag_fixups;
7212 CURR_SLOT.tag_fixups = fix;
7217 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7219 md.last_text_seg = now_seg;
7220 fix = obstack_alloc (¬es, sizeof (*fix));
7222 fix->next = CURR_SLOT.label_fixups;
7223 CURR_SLOT.label_fixups = fix;
7225 /* Keep track of how many code entry points we've seen. */
7226 if (md.path == md.maxpaths)
7229 md.entry_labels = (const char **)
7230 xrealloc ((void *) md.entry_labels,
7231 md.maxpaths * sizeof (char *));
7233 md.entry_labels[md.path++] = S_GET_NAME (sym);
7238 /* The HP-UX linker will give unresolved symbol errors for symbols
7239 that are declared but unused. This routine removes declared,
7240 unused symbols from an object. */
7242 ia64_frob_symbol (sym)
7245 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7246 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7247 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7248 && ! S_IS_EXTERNAL (sym)))
7255 ia64_flush_pending_output ()
7257 if (!md.keep_pending_output
7258 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7260 /* ??? This causes many unnecessary stop bits to be emitted.
7261 Unfortunately, it isn't clear if it is safe to remove this. */
7262 insn_group_break (1, 0, 0);
7263 ia64_flush_insns ();
7267 /* Do ia64-specific expression optimization. All that's done here is
7268 to transform index expressions that are either due to the indexing
7269 of rotating registers or due to the indexing of indirect register
7272 ia64_optimize_expr (l, op, r)
7281 if (l->X_op == O_register && r->X_op == O_constant)
7283 num_regs = (l->X_add_number >> 16);
7284 if ((unsigned) r->X_add_number >= num_regs)
7287 as_bad ("No current frame");
7289 as_bad ("Index out of range 0..%u", num_regs - 1);
7290 r->X_add_number = 0;
7292 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7295 else if (l->X_op == O_register && r->X_op == O_register)
7297 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7298 || l->X_add_number == IND_MEM)
7300 as_bad ("Indirect register set name expected");
7301 l->X_add_number = IND_CPUID;
7304 l->X_op_symbol = md.regsym[l->X_add_number];
7305 l->X_add_number = r->X_add_number;
7313 ia64_parse_name (name, e)
7317 struct const_desc *cdesc;
7318 struct dynreg *dr = 0;
7319 unsigned int regnum;
7323 /* first see if NAME is a known register name: */
7324 sym = hash_find (md.reg_hash, name);
7327 e->X_op = O_register;
7328 e->X_add_number = S_GET_VALUE (sym);
7332 cdesc = hash_find (md.const_hash, name);
7335 e->X_op = O_constant;
7336 e->X_add_number = cdesc->value;
7340 /* check for inN, locN, or outN: */
7344 if (name[1] == 'n' && ISDIGIT (name[2]))
7352 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7360 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7373 /* The name is inN, locN, or outN; parse the register number. */
7374 regnum = strtoul (name, &end, 10);
7375 if (end > name && *end == '\0')
7377 if ((unsigned) regnum >= dr->num_regs)
7380 as_bad ("No current frame");
7382 as_bad ("Register number out of range 0..%u",
7386 e->X_op = O_register;
7387 e->X_add_number = dr->base + regnum;
7392 if ((dr = hash_find (md.dynreg_hash, name)))
7394 /* We've got ourselves the name of a rotating register set.
7395 Store the base register number in the low 16 bits of
7396 X_add_number and the size of the register set in the top 16
7398 e->X_op = O_register;
7399 e->X_add_number = dr->base | (dr->num_regs << 16);
7405 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7408 ia64_canonicalize_symbol_name (name)
7411 size_t len = strlen (name);
7412 if (len > 1 && name[len - 1] == '#')
7413 name[len - 1] = '\0';
7417 /* Return true if idesc is a conditional branch instruction. This excludes
7418 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7419 because they always read/write resources regardless of the value of the
7420 qualifying predicate. br.ia must always use p0, and hence is always
7421 taken. Thus this function returns true for branches which can fall
7422 through, and which use no resources if they do fall through. */
7425 is_conditional_branch (idesc)
7426 struct ia64_opcode *idesc;
7428 /* br is a conditional branch. Everything that starts with br. except
7429 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7430 Everything that starts with brl is a conditional branch. */
7431 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7432 && (idesc->name[2] == '\0'
7433 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7434 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7435 || idesc->name[2] == 'l'
7436 /* br.cond, br.call, br.clr */
7437 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7438 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7439 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7442 /* Return whether the given opcode is a taken branch. If there's any doubt,
7446 is_taken_branch (idesc)
7447 struct ia64_opcode *idesc;
7449 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7450 || strncmp (idesc->name, "br.ia", 5) == 0);
7453 /* Return whether the given opcode is an interruption or rfi. If there's any
7454 doubt, returns zero. */
7457 is_interruption_or_rfi (idesc)
7458 struct ia64_opcode *idesc;
7460 if (strcmp (idesc->name, "rfi") == 0)
7465 /* Returns the index of the given dependency in the opcode's list of chks, or
7466 -1 if there is no dependency. */
7469 depends_on (depind, idesc)
7471 struct ia64_opcode *idesc;
7474 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7475 for (i = 0; i < dep->nchks; i++)
7477 if (depind == DEP (dep->chks[i]))
7483 /* Determine a set of specific resources used for a particular resource
7484 class. Returns the number of specific resources identified For those
7485 cases which are not determinable statically, the resource returned is
7488 Meanings of value in 'NOTE':
7489 1) only read/write when the register number is explicitly encoded in the
7491 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7492 accesses CFM when qualifying predicate is in the rotating region.
7493 3) general register value is used to specify an indirect register; not
7494 determinable statically.
7495 4) only read the given resource when bits 7:0 of the indirect index
7496 register value does not match the register number of the resource; not
7497 determinable statically.
7498 5) all rules are implementation specific.
7499 6) only when both the index specified by the reader and the index specified
7500 by the writer have the same value in bits 63:61; not determinable
7502 7) only access the specified resource when the corresponding mask bit is
7504 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7505 only read when these insns reference FR2-31
7506 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7507 written when these insns write FR32-127
7508 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7510 11) The target predicates are written independently of PR[qp], but source
7511 registers are only read if PR[qp] is true. Since the state of PR[qp]
7512 cannot statically be determined, all source registers are marked used.
7513 12) This insn only reads the specified predicate register when that
7514 register is the PR[qp].
7515 13) This reference to ld-c only applies to teh GR whose value is loaded
7516 with data returned from memory, not the post-incremented address register.
7517 14) The RSE resource includes the implementation-specific RSE internal
7518 state resources. At least one (and possibly more) of these resources are
7519 read by each instruction listed in IC:rse-readers. At least one (and
7520 possibly more) of these resources are written by each insn listed in
7522 15+16) Represents reserved instructions, which the assembler does not
7525 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7526 this code; there are no dependency violations based on memory access.
7529 #define MAX_SPECS 256
7534 specify_resource (dep, idesc, type, specs, note, path)
7535 const struct ia64_dependency *dep;
7536 struct ia64_opcode *idesc;
7537 int type; /* is this a DV chk or a DV reg? */
7538 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7539 int note; /* resource note for this insn's usage */
7540 int path; /* which execution path to examine */
7547 if (dep->mode == IA64_DV_WAW
7548 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7549 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7552 /* template for any resources we identify */
7553 tmpl.dependency = dep;
7555 tmpl.insn_srlz = tmpl.data_srlz = 0;
7556 tmpl.qp_regno = CURR_SLOT.qp_regno;
7557 tmpl.link_to_qp_branch = 1;
7558 tmpl.mem_offset.hint = 0;
7561 tmpl.cmp_type = CMP_NONE;
7564 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7565 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7566 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7568 /* we don't need to track these */
7569 if (dep->semantics == IA64_DVS_NONE)
7572 switch (dep->specifier)
7577 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7579 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7580 if (regno >= 0 && regno <= 7)
7582 specs[count] = tmpl;
7583 specs[count++].index = regno;
7589 for (i = 0; i < 8; i++)
7591 specs[count] = tmpl;
7592 specs[count++].index = i;
7601 case IA64_RS_AR_UNAT:
7602 /* This is a mov =AR or mov AR= instruction. */
7603 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7605 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7606 if (regno == AR_UNAT)
7608 specs[count++] = tmpl;
7613 /* This is a spill/fill, or other instruction that modifies the
7616 /* Unless we can determine the specific bits used, mark the whole
7617 thing; bits 8:3 of the memory address indicate the bit used in
7618 UNAT. The .mem.offset hint may be used to eliminate a small
7619 subset of conflicts. */
7620 specs[count] = tmpl;
7621 if (md.mem_offset.hint)
7624 fprintf (stderr, " Using hint for spill/fill\n");
7625 /* The index isn't actually used, just set it to something
7626 approximating the bit index. */
7627 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7628 specs[count].mem_offset.hint = 1;
7629 specs[count].mem_offset.offset = md.mem_offset.offset;
7630 specs[count++].mem_offset.base = md.mem_offset.base;
7634 specs[count++].specific = 0;
7642 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7644 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7645 if ((regno >= 8 && regno <= 15)
7646 || (regno >= 20 && regno <= 23)
7647 || (regno >= 31 && regno <= 39)
7648 || (regno >= 41 && regno <= 47)
7649 || (regno >= 67 && regno <= 111))
7651 specs[count] = tmpl;
7652 specs[count++].index = regno;
7665 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7667 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7668 if ((regno >= 48 && regno <= 63)
7669 || (regno >= 112 && regno <= 127))
7671 specs[count] = tmpl;
7672 specs[count++].index = regno;
7678 for (i = 48; i < 64; i++)
7680 specs[count] = tmpl;
7681 specs[count++].index = i;
7683 for (i = 112; i < 128; i++)
7685 specs[count] = tmpl;
7686 specs[count++].index = i;
7704 for (i = 0; i < idesc->num_outputs; i++)
7705 if (idesc->operands[i] == IA64_OPND_B1
7706 || idesc->operands[i] == IA64_OPND_B2)
7708 specs[count] = tmpl;
7709 specs[count++].index =
7710 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7715 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7716 if (idesc->operands[i] == IA64_OPND_B1
7717 || idesc->operands[i] == IA64_OPND_B2)
7719 specs[count] = tmpl;
7720 specs[count++].index =
7721 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7727 case IA64_RS_CPUID: /* four or more registers */
7730 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7732 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7733 if (regno >= 0 && regno < NELEMS (gr_values)
7736 specs[count] = tmpl;
7737 specs[count++].index = gr_values[regno].value & 0xFF;
7741 specs[count] = tmpl;
7742 specs[count++].specific = 0;
7752 case IA64_RS_DBR: /* four or more registers */
7755 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7757 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7758 if (regno >= 0 && regno < NELEMS (gr_values)
7761 specs[count] = tmpl;
7762 specs[count++].index = gr_values[regno].value & 0xFF;
7766 specs[count] = tmpl;
7767 specs[count++].specific = 0;
7771 else if (note == 0 && !rsrc_write)
7773 specs[count] = tmpl;
7774 specs[count++].specific = 0;
7782 case IA64_RS_IBR: /* four or more registers */
7785 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7787 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7788 if (regno >= 0 && regno < NELEMS (gr_values)
7791 specs[count] = tmpl;
7792 specs[count++].index = gr_values[regno].value & 0xFF;
7796 specs[count] = tmpl;
7797 specs[count++].specific = 0;
7810 /* These are implementation specific. Force all references to
7811 conflict with all other references. */
7812 specs[count] = tmpl;
7813 specs[count++].specific = 0;
7821 case IA64_RS_PKR: /* 16 or more registers */
7822 if (note == 3 || note == 4)
7824 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7826 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7827 if (regno >= 0 && regno < NELEMS (gr_values)
7832 specs[count] = tmpl;
7833 specs[count++].index = gr_values[regno].value & 0xFF;
7836 for (i = 0; i < NELEMS (gr_values); i++)
7838 /* Uses all registers *except* the one in R3. */
7839 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7841 specs[count] = tmpl;
7842 specs[count++].index = i;
7848 specs[count] = tmpl;
7849 specs[count++].specific = 0;
7856 specs[count] = tmpl;
7857 specs[count++].specific = 0;
7861 case IA64_RS_PMC: /* four or more registers */
7864 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7865 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7868 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7870 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7871 if (regno >= 0 && regno < NELEMS (gr_values)
7874 specs[count] = tmpl;
7875 specs[count++].index = gr_values[regno].value & 0xFF;
7879 specs[count] = tmpl;
7880 specs[count++].specific = 0;
7890 case IA64_RS_PMD: /* four or more registers */
7893 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7895 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7896 if (regno >= 0 && regno < NELEMS (gr_values)
7899 specs[count] = tmpl;
7900 specs[count++].index = gr_values[regno].value & 0xFF;
7904 specs[count] = tmpl;
7905 specs[count++].specific = 0;
7915 case IA64_RS_RR: /* eight registers */
7918 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7920 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7921 if (regno >= 0 && regno < NELEMS (gr_values)
7924 specs[count] = tmpl;
7925 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7929 specs[count] = tmpl;
7930 specs[count++].specific = 0;
7934 else if (note == 0 && !rsrc_write)
7936 specs[count] = tmpl;
7937 specs[count++].specific = 0;
7945 case IA64_RS_CR_IRR:
7948 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7949 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7951 && idesc->operands[1] == IA64_OPND_CR3
7954 for (i = 0; i < 4; i++)
7956 specs[count] = tmpl;
7957 specs[count++].index = CR_IRR0 + i;
7963 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7964 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7966 && regno <= CR_IRR3)
7968 specs[count] = tmpl;
7969 specs[count++].index = regno;
7978 case IA64_RS_CR_LRR:
7985 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7986 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7987 && (regno == CR_LRR0 || regno == CR_LRR1))
7989 specs[count] = tmpl;
7990 specs[count++].index = regno;
7998 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8000 specs[count] = tmpl;
8001 specs[count++].index =
8002 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8017 else if (rsrc_write)
8019 if (dep->specifier == IA64_RS_FRb
8020 && idesc->operands[0] == IA64_OPND_F1)
8022 specs[count] = tmpl;
8023 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8028 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8030 if (idesc->operands[i] == IA64_OPND_F2
8031 || idesc->operands[i] == IA64_OPND_F3
8032 || idesc->operands[i] == IA64_OPND_F4)
8034 specs[count] = tmpl;
8035 specs[count++].index =
8036 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8045 /* This reference applies only to the GR whose value is loaded with
8046 data returned from memory. */
8047 specs[count] = tmpl;
8048 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8054 for (i = 0; i < idesc->num_outputs; i++)
8055 if (idesc->operands[i] == IA64_OPND_R1
8056 || idesc->operands[i] == IA64_OPND_R2
8057 || idesc->operands[i] == IA64_OPND_R3)
8059 specs[count] = tmpl;
8060 specs[count++].index =
8061 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8063 if (idesc->flags & IA64_OPCODE_POSTINC)
8064 for (i = 0; i < NELEMS (idesc->operands); i++)
8065 if (idesc->operands[i] == IA64_OPND_MR3)
8067 specs[count] = tmpl;
8068 specs[count++].index =
8069 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8074 /* Look for anything that reads a GR. */
8075 for (i = 0; i < NELEMS (idesc->operands); i++)
8077 if (idesc->operands[i] == IA64_OPND_MR3
8078 || idesc->operands[i] == IA64_OPND_CPUID_R3
8079 || idesc->operands[i] == IA64_OPND_DBR_R3
8080 || idesc->operands[i] == IA64_OPND_IBR_R3
8081 || idesc->operands[i] == IA64_OPND_MSR_R3
8082 || idesc->operands[i] == IA64_OPND_PKR_R3
8083 || idesc->operands[i] == IA64_OPND_PMC_R3
8084 || idesc->operands[i] == IA64_OPND_PMD_R3
8085 || idesc->operands[i] == IA64_OPND_RR_R3
8086 || ((i >= idesc->num_outputs)
8087 && (idesc->operands[i] == IA64_OPND_R1
8088 || idesc->operands[i] == IA64_OPND_R2
8089 || idesc->operands[i] == IA64_OPND_R3
8090 /* addl source register. */
8091 || idesc->operands[i] == IA64_OPND_R3_2)))
8093 specs[count] = tmpl;
8094 specs[count++].index =
8095 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8106 /* This is the same as IA64_RS_PRr, except that the register range is
8107 from 1 - 15, and there are no rotating register reads/writes here. */
8111 for (i = 1; i < 16; i++)
8113 specs[count] = tmpl;
8114 specs[count++].index = i;
8120 /* Mark only those registers indicated by the mask. */
8123 mask = CURR_SLOT.opnd[2].X_add_number;
8124 for (i = 1; i < 16; i++)
8125 if (mask & ((valueT) 1 << i))
8127 specs[count] = tmpl;
8128 specs[count++].index = i;
8136 else if (note == 11) /* note 11 implies note 1 as well */
8140 for (i = 0; i < idesc->num_outputs; i++)
8142 if (idesc->operands[i] == IA64_OPND_P1
8143 || idesc->operands[i] == IA64_OPND_P2)
8145 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8146 if (regno >= 1 && regno < 16)
8148 specs[count] = tmpl;
8149 specs[count++].index = regno;
8159 else if (note == 12)
8161 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8163 specs[count] = tmpl;
8164 specs[count++].index = CURR_SLOT.qp_regno;
8171 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8172 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8173 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8174 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8176 if ((idesc->operands[0] == IA64_OPND_P1
8177 || idesc->operands[0] == IA64_OPND_P2)
8178 && p1 >= 1 && p1 < 16)
8180 specs[count] = tmpl;
8181 specs[count].cmp_type =
8182 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8183 specs[count++].index = p1;
8185 if ((idesc->operands[1] == IA64_OPND_P1
8186 || idesc->operands[1] == IA64_OPND_P2)
8187 && p2 >= 1 && p2 < 16)
8189 specs[count] = tmpl;
8190 specs[count].cmp_type =
8191 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8192 specs[count++].index = p2;
8197 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8199 specs[count] = tmpl;
8200 specs[count++].index = CURR_SLOT.qp_regno;
8202 if (idesc->operands[1] == IA64_OPND_PR)
8204 for (i = 1; i < 16; i++)
8206 specs[count] = tmpl;
8207 specs[count++].index = i;
8218 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8219 simplified cases of this. */
8223 for (i = 16; i < 63; i++)
8225 specs[count] = tmpl;
8226 specs[count++].index = i;
8232 /* Mark only those registers indicated by the mask. */
8234 && idesc->operands[0] == IA64_OPND_PR)
8236 mask = CURR_SLOT.opnd[2].X_add_number;
8237 if (mask & ((valueT) 1 << 16))
8238 for (i = 16; i < 63; i++)
8240 specs[count] = tmpl;
8241 specs[count++].index = i;
8245 && idesc->operands[0] == IA64_OPND_PR_ROT)
8247 for (i = 16; i < 63; i++)
8249 specs[count] = tmpl;
8250 specs[count++].index = i;
8258 else if (note == 11) /* note 11 implies note 1 as well */
8262 for (i = 0; i < idesc->num_outputs; i++)
8264 if (idesc->operands[i] == IA64_OPND_P1
8265 || idesc->operands[i] == IA64_OPND_P2)
8267 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8268 if (regno >= 16 && regno < 63)
8270 specs[count] = tmpl;
8271 specs[count++].index = regno;
8281 else if (note == 12)
8283 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8285 specs[count] = tmpl;
8286 specs[count++].index = CURR_SLOT.qp_regno;
8293 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8294 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8295 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8296 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8298 if ((idesc->operands[0] == IA64_OPND_P1
8299 || idesc->operands[0] == IA64_OPND_P2)
8300 && p1 >= 16 && p1 < 63)
8302 specs[count] = tmpl;
8303 specs[count].cmp_type =
8304 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8305 specs[count++].index = p1;
8307 if ((idesc->operands[1] == IA64_OPND_P1
8308 || idesc->operands[1] == IA64_OPND_P2)
8309 && p2 >= 16 && p2 < 63)
8311 specs[count] = tmpl;
8312 specs[count].cmp_type =
8313 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8314 specs[count++].index = p2;
8319 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8321 specs[count] = tmpl;
8322 specs[count++].index = CURR_SLOT.qp_regno;
8324 if (idesc->operands[1] == IA64_OPND_PR)
8326 for (i = 16; i < 63; i++)
8328 specs[count] = tmpl;
8329 specs[count++].index = i;
8341 /* Verify that the instruction is using the PSR bit indicated in
8345 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8347 if (dep->regindex < 6)
8349 specs[count++] = tmpl;
8352 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8354 if (dep->regindex < 32
8355 || dep->regindex == 35
8356 || dep->regindex == 36
8357 || (!rsrc_write && dep->regindex == PSR_CPL))
8359 specs[count++] = tmpl;
8362 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8364 if (dep->regindex < 32
8365 || dep->regindex == 35
8366 || dep->regindex == 36
8367 || (rsrc_write && dep->regindex == PSR_CPL))
8369 specs[count++] = tmpl;
8374 /* Several PSR bits have very specific dependencies. */
8375 switch (dep->regindex)
8378 specs[count++] = tmpl;
8383 specs[count++] = tmpl;
8387 /* Only certain CR accesses use PSR.ic */
8388 if (idesc->operands[0] == IA64_OPND_CR3
8389 || idesc->operands[1] == IA64_OPND_CR3)
8392 ((idesc->operands[0] == IA64_OPND_CR3)
8395 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8410 specs[count++] = tmpl;
8419 specs[count++] = tmpl;
8423 /* Only some AR accesses use cpl */
8424 if (idesc->operands[0] == IA64_OPND_AR3
8425 || idesc->operands[1] == IA64_OPND_AR3)
8428 ((idesc->operands[0] == IA64_OPND_AR3)
8431 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8438 && regno <= AR_K7))))
8440 specs[count++] = tmpl;
8445 specs[count++] = tmpl;
8455 if (idesc->operands[0] == IA64_OPND_IMMU24)
8457 mask = CURR_SLOT.opnd[0].X_add_number;
8463 if (mask & ((valueT) 1 << dep->regindex))
8465 specs[count++] = tmpl;
8470 int min = dep->regindex == PSR_DFL ? 2 : 32;
8471 int max = dep->regindex == PSR_DFL ? 31 : 127;
8472 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8473 for (i = 0; i < NELEMS (idesc->operands); i++)
8475 if (idesc->operands[i] == IA64_OPND_F1
8476 || idesc->operands[i] == IA64_OPND_F2
8477 || idesc->operands[i] == IA64_OPND_F3
8478 || idesc->operands[i] == IA64_OPND_F4)
8480 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8481 if (reg >= min && reg <= max)
8483 specs[count++] = tmpl;
8490 int min = dep->regindex == PSR_MFL ? 2 : 32;
8491 int max = dep->regindex == PSR_MFL ? 31 : 127;
8492 /* mfh is read on writes to FR32-127; mfl is read on writes to
8494 for (i = 0; i < idesc->num_outputs; i++)
8496 if (idesc->operands[i] == IA64_OPND_F1)
8498 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8499 if (reg >= min && reg <= max)
8501 specs[count++] = tmpl;
8506 else if (note == 10)
8508 for (i = 0; i < NELEMS (idesc->operands); i++)
8510 if (idesc->operands[i] == IA64_OPND_R1
8511 || idesc->operands[i] == IA64_OPND_R2
8512 || idesc->operands[i] == IA64_OPND_R3)
8514 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8515 if (regno >= 16 && regno <= 31)
8517 specs[count++] = tmpl;
8528 case IA64_RS_AR_FPSR:
8529 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8531 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8532 if (regno == AR_FPSR)
8534 specs[count++] = tmpl;
8539 specs[count++] = tmpl;
8544 /* Handle all AR[REG] resources */
8545 if (note == 0 || note == 1)
8547 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8548 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8549 && regno == dep->regindex)
8551 specs[count++] = tmpl;
8553 /* other AR[REG] resources may be affected by AR accesses */
8554 else if (idesc->operands[0] == IA64_OPND_AR3)
8557 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8558 switch (dep->regindex)
8564 if (regno == AR_BSPSTORE)
8566 specs[count++] = tmpl;
8570 (regno == AR_BSPSTORE
8571 || regno == AR_RNAT))
8573 specs[count++] = tmpl;
8578 else if (idesc->operands[1] == IA64_OPND_AR3)
8581 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8582 switch (dep->regindex)
8587 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8589 specs[count++] = tmpl;
8596 specs[count++] = tmpl;
8606 /* Handle all CR[REG] resources */
8607 if (note == 0 || note == 1)
8609 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8611 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8612 if (regno == dep->regindex)
8614 specs[count++] = tmpl;
8616 else if (!rsrc_write)
8618 /* Reads from CR[IVR] affect other resources. */
8619 if (regno == CR_IVR)
8621 if ((dep->regindex >= CR_IRR0
8622 && dep->regindex <= CR_IRR3)
8623 || dep->regindex == CR_TPR)
8625 specs[count++] = tmpl;
8632 specs[count++] = tmpl;
8641 case IA64_RS_INSERVICE:
8642 /* look for write of EOI (67) or read of IVR (65) */
8643 if ((idesc->operands[0] == IA64_OPND_CR3
8644 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8645 || (idesc->operands[1] == IA64_OPND_CR3
8646 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8648 specs[count++] = tmpl;
8655 specs[count++] = tmpl;
8666 specs[count++] = tmpl;
8670 /* Check if any of the registers accessed are in the rotating region.
8671 mov to/from pr accesses CFM only when qp_regno is in the rotating
8673 for (i = 0; i < NELEMS (idesc->operands); i++)
8675 if (idesc->operands[i] == IA64_OPND_R1
8676 || idesc->operands[i] == IA64_OPND_R2
8677 || idesc->operands[i] == IA64_OPND_R3)
8679 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8680 /* Assumes that md.rot.num_regs is always valid */
8681 if (md.rot.num_regs > 0
8683 && num < 31 + md.rot.num_regs)
8685 specs[count] = tmpl;
8686 specs[count++].specific = 0;
8689 else if (idesc->operands[i] == IA64_OPND_F1
8690 || idesc->operands[i] == IA64_OPND_F2
8691 || idesc->operands[i] == IA64_OPND_F3
8692 || idesc->operands[i] == IA64_OPND_F4)
8694 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8697 specs[count] = tmpl;
8698 specs[count++].specific = 0;
8701 else if (idesc->operands[i] == IA64_OPND_P1
8702 || idesc->operands[i] == IA64_OPND_P2)
8704 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8707 specs[count] = tmpl;
8708 specs[count++].specific = 0;
8712 if (CURR_SLOT.qp_regno > 15)
8714 specs[count] = tmpl;
8715 specs[count++].specific = 0;
8720 /* This is the same as IA64_RS_PRr, except simplified to account for
8721 the fact that there is only one register. */
8725 specs[count++] = tmpl;
8730 if (idesc->operands[2] == IA64_OPND_IMM17)
8731 mask = CURR_SLOT.opnd[2].X_add_number;
8732 if (mask & ((valueT) 1 << 63))
8733 specs[count++] = tmpl;
8735 else if (note == 11)
8737 if ((idesc->operands[0] == IA64_OPND_P1
8738 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8739 || (idesc->operands[1] == IA64_OPND_P2
8740 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8742 specs[count++] = tmpl;
8745 else if (note == 12)
8747 if (CURR_SLOT.qp_regno == 63)
8749 specs[count++] = tmpl;
8756 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8757 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8758 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8759 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8762 && (idesc->operands[0] == IA64_OPND_P1
8763 || idesc->operands[0] == IA64_OPND_P2))
8765 specs[count] = tmpl;
8766 specs[count++].cmp_type =
8767 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8770 && (idesc->operands[1] == IA64_OPND_P1
8771 || idesc->operands[1] == IA64_OPND_P2))
8773 specs[count] = tmpl;
8774 specs[count++].cmp_type =
8775 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8780 if (CURR_SLOT.qp_regno == 63)
8782 specs[count++] = tmpl;
8793 /* FIXME we can identify some individual RSE written resources, but RSE
8794 read resources have not yet been completely identified, so for now
8795 treat RSE as a single resource */
8796 if (strncmp (idesc->name, "mov", 3) == 0)
8800 if (idesc->operands[0] == IA64_OPND_AR3
8801 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8803 specs[count] = tmpl;
8804 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8809 if (idesc->operands[0] == IA64_OPND_AR3)
8811 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8812 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8814 specs[count++] = tmpl;
8817 else if (idesc->operands[1] == IA64_OPND_AR3)
8819 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8820 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8821 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8823 specs[count++] = tmpl;
8830 specs[count++] = tmpl;
8835 /* FIXME -- do any of these need to be non-specific? */
8836 specs[count++] = tmpl;
8840 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8847 /* Clear branch flags on marked resources. This breaks the link between the
8848 QP of the marking instruction and a subsequent branch on the same QP. */
8851 clear_qp_branch_flag (mask)
8855 for (i = 0; i < regdepslen; i++)
8857 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8858 if ((bit & mask) != 0)
8860 regdeps[i].link_to_qp_branch = 0;
8865 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8866 any mutexes which contain one of the PRs and create new ones when
8870 update_qp_mutex (valueT mask)
8876 while (i < qp_mutexeslen)
8878 if ((qp_mutexes[i].prmask & mask) != 0)
8880 /* If it destroys and creates the same mutex, do nothing. */
8881 if (qp_mutexes[i].prmask == mask
8882 && qp_mutexes[i].path == md.path)
8893 fprintf (stderr, " Clearing mutex relation");
8894 print_prmask (qp_mutexes[i].prmask);
8895 fprintf (stderr, "\n");
8898 /* Deal with the old mutex with more than 3+ PRs only if
8899 the new mutex on the same execution path with it.
8901 FIXME: The 3+ mutex support is incomplete.
8902 dot_pred_rel () may be a better place to fix it. */
8903 if (qp_mutexes[i].path == md.path)
8905 /* If it is a proper subset of the mutex, create a
8908 && (qp_mutexes[i].prmask & mask) == mask)
8911 qp_mutexes[i].prmask &= ~mask;
8912 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8914 /* Modify the mutex if there are more than one
8922 /* Remove the mutex. */
8923 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8931 add_qp_mutex (mask);
8936 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8938 Any changes to a PR clears the mutex relations which include that PR. */
8941 clear_qp_mutex (mask)
8947 while (i < qp_mutexeslen)
8949 if ((qp_mutexes[i].prmask & mask) != 0)
8953 fprintf (stderr, " Clearing mutex relation");
8954 print_prmask (qp_mutexes[i].prmask);
8955 fprintf (stderr, "\n");
8957 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8964 /* Clear implies relations which contain PRs in the given masks.
8965 P1_MASK indicates the source of the implies relation, while P2_MASK
8966 indicates the implied PR. */
8969 clear_qp_implies (p1_mask, p2_mask)
8976 while (i < qp_implieslen)
8978 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8979 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8982 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8983 qp_implies[i].p1, qp_implies[i].p2);
8984 qp_implies[i] = qp_implies[--qp_implieslen];
8991 /* Add the PRs specified to the list of implied relations. */
8994 add_qp_imply (p1, p2)
9001 /* p0 is not meaningful here. */
9002 if (p1 == 0 || p2 == 0)
9008 /* If it exists already, ignore it. */
9009 for (i = 0; i < qp_implieslen; i++)
9011 if (qp_implies[i].p1 == p1
9012 && qp_implies[i].p2 == p2
9013 && qp_implies[i].path == md.path
9014 && !qp_implies[i].p2_branched)
9018 if (qp_implieslen == qp_impliestotlen)
9020 qp_impliestotlen += 20;
9021 qp_implies = (struct qp_imply *)
9022 xrealloc ((void *) qp_implies,
9023 qp_impliestotlen * sizeof (struct qp_imply));
9026 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9027 qp_implies[qp_implieslen].p1 = p1;
9028 qp_implies[qp_implieslen].p2 = p2;
9029 qp_implies[qp_implieslen].path = md.path;
9030 qp_implies[qp_implieslen++].p2_branched = 0;
9032 /* Add in the implied transitive relations; for everything that p2 implies,
9033 make p1 imply that, too; for everything that implies p1, make it imply p2
9035 for (i = 0; i < qp_implieslen; i++)
9037 if (qp_implies[i].p1 == p2)
9038 add_qp_imply (p1, qp_implies[i].p2);
9039 if (qp_implies[i].p2 == p1)
9040 add_qp_imply (qp_implies[i].p1, p2);
9042 /* Add in mutex relations implied by this implies relation; for each mutex
9043 relation containing p2, duplicate it and replace p2 with p1. */
9044 bit = (valueT) 1 << p1;
9045 mask = (valueT) 1 << p2;
9046 for (i = 0; i < qp_mutexeslen; i++)
9048 if (qp_mutexes[i].prmask & mask)
9049 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9053 /* Add the PRs specified in the mask to the mutex list; this means that only
9054 one of the PRs can be true at any time. PR0 should never be included in
9064 if (qp_mutexeslen == qp_mutexestotlen)
9066 qp_mutexestotlen += 20;
9067 qp_mutexes = (struct qpmutex *)
9068 xrealloc ((void *) qp_mutexes,
9069 qp_mutexestotlen * sizeof (struct qpmutex));
9073 fprintf (stderr, " Registering mutex on");
9074 print_prmask (mask);
9075 fprintf (stderr, "\n");
9077 qp_mutexes[qp_mutexeslen].path = md.path;
9078 qp_mutexes[qp_mutexeslen++].prmask = mask;
9082 has_suffix_p (name, suffix)
9086 size_t namelen = strlen (name);
9087 size_t sufflen = strlen (suffix);
9089 if (namelen <= sufflen)
9091 return strcmp (name + namelen - sufflen, suffix) == 0;
9095 clear_register_values ()
9099 fprintf (stderr, " Clearing register values\n");
9100 for (i = 1; i < NELEMS (gr_values); i++)
9101 gr_values[i].known = 0;
9104 /* Keep track of register values/changes which affect DV tracking.
9106 optimization note: should add a flag to classes of insns where otherwise we
9107 have to examine a group of strings to identify them. */
9110 note_register_values (idesc)
9111 struct ia64_opcode *idesc;
9113 valueT qp_changemask = 0;
9116 /* Invalidate values for registers being written to. */
9117 for (i = 0; i < idesc->num_outputs; i++)
9119 if (idesc->operands[i] == IA64_OPND_R1
9120 || idesc->operands[i] == IA64_OPND_R2
9121 || idesc->operands[i] == IA64_OPND_R3)
9123 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9124 if (regno > 0 && regno < NELEMS (gr_values))
9125 gr_values[regno].known = 0;
9127 else if (idesc->operands[i] == IA64_OPND_R3_2)
9129 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9130 if (regno > 0 && regno < 4)
9131 gr_values[regno].known = 0;
9133 else if (idesc->operands[i] == IA64_OPND_P1
9134 || idesc->operands[i] == IA64_OPND_P2)
9136 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9137 qp_changemask |= (valueT) 1 << regno;
9139 else if (idesc->operands[i] == IA64_OPND_PR)
9141 if (idesc->operands[2] & (valueT) 0x10000)
9142 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9144 qp_changemask = idesc->operands[2];
9147 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9149 if (idesc->operands[1] & ((valueT) 1 << 43))
9150 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9152 qp_changemask = idesc->operands[1];
9153 qp_changemask &= ~(valueT) 0xFFFF;
9158 /* Always clear qp branch flags on any PR change. */
9159 /* FIXME there may be exceptions for certain compares. */
9160 clear_qp_branch_flag (qp_changemask);
9162 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9163 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9165 qp_changemask |= ~(valueT) 0xFFFF;
9166 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9168 for (i = 32; i < 32 + md.rot.num_regs; i++)
9169 gr_values[i].known = 0;
9171 clear_qp_mutex (qp_changemask);
9172 clear_qp_implies (qp_changemask, qp_changemask);
9174 /* After a call, all register values are undefined, except those marked
9176 else if (strncmp (idesc->name, "br.call", 6) == 0
9177 || strncmp (idesc->name, "brl.call", 7) == 0)
9179 /* FIXME keep GR values which are marked as "safe_across_calls" */
9180 clear_register_values ();
9181 clear_qp_mutex (~qp_safe_across_calls);
9182 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9183 clear_qp_branch_flag (~qp_safe_across_calls);
9185 else if (is_interruption_or_rfi (idesc)
9186 || is_taken_branch (idesc))
9188 clear_register_values ();
9189 clear_qp_mutex (~(valueT) 0);
9190 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9192 /* Look for mutex and implies relations. */
9193 else if ((idesc->operands[0] == IA64_OPND_P1
9194 || idesc->operands[0] == IA64_OPND_P2)
9195 && (idesc->operands[1] == IA64_OPND_P1
9196 || idesc->operands[1] == IA64_OPND_P2))
9198 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9199 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9200 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9201 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9203 /* If both PRs are PR0, we can't really do anything. */
9204 if (p1 == 0 && p2 == 0)
9207 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9209 /* In general, clear mutexes and implies which include P1 or P2,
9210 with the following exceptions. */
9211 else if (has_suffix_p (idesc->name, ".or.andcm")
9212 || has_suffix_p (idesc->name, ".and.orcm"))
9214 clear_qp_implies (p2mask, p1mask);
9216 else if (has_suffix_p (idesc->name, ".andcm")
9217 || has_suffix_p (idesc->name, ".and"))
9219 clear_qp_implies (0, p1mask | p2mask);
9221 else if (has_suffix_p (idesc->name, ".orcm")
9222 || has_suffix_p (idesc->name, ".or"))
9224 clear_qp_mutex (p1mask | p2mask);
9225 clear_qp_implies (p1mask | p2mask, 0);
9231 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9233 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9234 if (p1 == 0 || p2 == 0)
9235 clear_qp_mutex (p1mask | p2mask);
9237 added = update_qp_mutex (p1mask | p2mask);
9239 if (CURR_SLOT.qp_regno == 0
9240 || has_suffix_p (idesc->name, ".unc"))
9242 if (added == 0 && p1 && p2)
9243 add_qp_mutex (p1mask | p2mask);
9244 if (CURR_SLOT.qp_regno != 0)
9247 add_qp_imply (p1, CURR_SLOT.qp_regno);
9249 add_qp_imply (p2, CURR_SLOT.qp_regno);
9254 /* Look for mov imm insns into GRs. */
9255 else if (idesc->operands[0] == IA64_OPND_R1
9256 && (idesc->operands[1] == IA64_OPND_IMM22
9257 || idesc->operands[1] == IA64_OPND_IMMU64)
9258 && (strcmp (idesc->name, "mov") == 0
9259 || strcmp (idesc->name, "movl") == 0))
9261 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9262 if (regno > 0 && regno < NELEMS (gr_values))
9264 gr_values[regno].known = 1;
9265 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9266 gr_values[regno].path = md.path;
9269 fprintf (stderr, " Know gr%d = ", regno);
9270 fprintf_vma (stderr, gr_values[regno].value);
9271 fputs ("\n", stderr);
9277 clear_qp_mutex (qp_changemask);
9278 clear_qp_implies (qp_changemask, qp_changemask);
9282 /* Return whether the given predicate registers are currently mutex. */
9285 qp_mutex (p1, p2, path)
9295 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9296 for (i = 0; i < qp_mutexeslen; i++)
9298 if (qp_mutexes[i].path >= path
9299 && (qp_mutexes[i].prmask & mask) == mask)
9306 /* Return whether the given resource is in the given insn's list of chks
9307 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9311 resources_match (rs, idesc, note, qp_regno, path)
9313 struct ia64_opcode *idesc;
9318 struct rsrc specs[MAX_SPECS];
9321 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9322 we don't need to check. One exception is note 11, which indicates that
9323 target predicates are written regardless of PR[qp]. */
9324 if (qp_mutex (rs->qp_regno, qp_regno, path)
9328 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9331 /* UNAT checking is a bit more specific than other resources */
9332 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9333 && specs[count].mem_offset.hint
9334 && rs->mem_offset.hint)
9336 if (rs->mem_offset.base == specs[count].mem_offset.base)
9338 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9339 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9346 /* Skip apparent PR write conflicts where both writes are an AND or both
9347 writes are an OR. */
9348 if (rs->dependency->specifier == IA64_RS_PR
9349 || rs->dependency->specifier == IA64_RS_PRr
9350 || rs->dependency->specifier == IA64_RS_PR63)
9352 if (specs[count].cmp_type != CMP_NONE
9353 && specs[count].cmp_type == rs->cmp_type)
9356 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9357 dv_mode[rs->dependency->mode],
9358 rs->dependency->specifier != IA64_RS_PR63 ?
9359 specs[count].index : 63);
9364 " %s on parallel compare conflict %s vs %s on PR%d\n",
9365 dv_mode[rs->dependency->mode],
9366 dv_cmp_type[rs->cmp_type],
9367 dv_cmp_type[specs[count].cmp_type],
9368 rs->dependency->specifier != IA64_RS_PR63 ?
9369 specs[count].index : 63);
9373 /* If either resource is not specific, conservatively assume a conflict
9375 if (!specs[count].specific || !rs->specific)
9377 else if (specs[count].index == rs->index)
9382 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9388 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9389 insert a stop to create the break. Update all resource dependencies
9390 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9391 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9392 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9396 insn_group_break (insert_stop, qp_regno, save_current)
9403 if (insert_stop && md.num_slots_in_use > 0)
9404 PREV_SLOT.end_of_insn_group = 1;
9408 fprintf (stderr, " Insn group break%s",
9409 (insert_stop ? " (w/stop)" : ""));
9411 fprintf (stderr, " effective for QP=%d", qp_regno);
9412 fprintf (stderr, "\n");
9416 while (i < regdepslen)
9418 const struct ia64_dependency *dep = regdeps[i].dependency;
9421 && regdeps[i].qp_regno != qp_regno)
9428 && CURR_SLOT.src_file == regdeps[i].file
9429 && CURR_SLOT.src_line == regdeps[i].line)
9435 /* clear dependencies which are automatically cleared by a stop, or
9436 those that have reached the appropriate state of insn serialization */
9437 if (dep->semantics == IA64_DVS_IMPLIED
9438 || dep->semantics == IA64_DVS_IMPLIEDF
9439 || regdeps[i].insn_srlz == STATE_SRLZ)
9441 print_dependency ("Removing", i);
9442 regdeps[i] = regdeps[--regdepslen];
9446 if (dep->semantics == IA64_DVS_DATA
9447 || dep->semantics == IA64_DVS_INSTR
9448 || dep->semantics == IA64_DVS_SPECIFIC)
9450 if (regdeps[i].insn_srlz == STATE_NONE)
9451 regdeps[i].insn_srlz = STATE_STOP;
9452 if (regdeps[i].data_srlz == STATE_NONE)
9453 regdeps[i].data_srlz = STATE_STOP;
9460 /* Add the given resource usage spec to the list of active dependencies. */
9463 mark_resource (idesc, dep, spec, depind, path)
9464 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9465 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9470 if (regdepslen == regdepstotlen)
9472 regdepstotlen += 20;
9473 regdeps = (struct rsrc *)
9474 xrealloc ((void *) regdeps,
9475 regdepstotlen * sizeof (struct rsrc));
9478 regdeps[regdepslen] = *spec;
9479 regdeps[regdepslen].depind = depind;
9480 regdeps[regdepslen].path = path;
9481 regdeps[regdepslen].file = CURR_SLOT.src_file;
9482 regdeps[regdepslen].line = CURR_SLOT.src_line;
9484 print_dependency ("Adding", regdepslen);
9490 print_dependency (action, depind)
9496 fprintf (stderr, " %s %s '%s'",
9497 action, dv_mode[(regdeps[depind].dependency)->mode],
9498 (regdeps[depind].dependency)->name);
9499 if (regdeps[depind].specific && regdeps[depind].index != 0)
9500 fprintf (stderr, " (%d)", regdeps[depind].index);
9501 if (regdeps[depind].mem_offset.hint)
9503 fputs (" ", stderr);
9504 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9505 fputs ("+", stderr);
9506 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9508 fprintf (stderr, "\n");
9513 instruction_serialization ()
9517 fprintf (stderr, " Instruction serialization\n");
9518 for (i = 0; i < regdepslen; i++)
9519 if (regdeps[i].insn_srlz == STATE_STOP)
9520 regdeps[i].insn_srlz = STATE_SRLZ;
9524 data_serialization ()
9528 fprintf (stderr, " Data serialization\n");
9529 while (i < regdepslen)
9531 if (regdeps[i].data_srlz == STATE_STOP
9532 /* Note: as of 991210, all "other" dependencies are cleared by a
9533 data serialization. This might change with new tables */
9534 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9536 print_dependency ("Removing", i);
9537 regdeps[i] = regdeps[--regdepslen];
9544 /* Insert stops and serializations as needed to avoid DVs. */
9547 remove_marked_resource (rs)
9550 switch (rs->dependency->semantics)
9552 case IA64_DVS_SPECIFIC:
9554 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9555 /* ...fall through... */
9556 case IA64_DVS_INSTR:
9558 fprintf (stderr, "Inserting instr serialization\n");
9559 if (rs->insn_srlz < STATE_STOP)
9560 insn_group_break (1, 0, 0);
9561 if (rs->insn_srlz < STATE_SRLZ)
9563 struct slot oldslot = CURR_SLOT;
9564 /* Manually jam a srlz.i insn into the stream */
9565 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9566 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9567 instruction_serialization ();
9568 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9569 if (++md.num_slots_in_use >= NUM_SLOTS)
9571 CURR_SLOT = oldslot;
9573 insn_group_break (1, 0, 0);
9575 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9576 "other" types of DV are eliminated
9577 by a data serialization */
9580 fprintf (stderr, "Inserting data serialization\n");
9581 if (rs->data_srlz < STATE_STOP)
9582 insn_group_break (1, 0, 0);
9584 struct slot oldslot = CURR_SLOT;
9585 /* Manually jam a srlz.d insn into the stream */
9586 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9587 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9588 data_serialization ();
9589 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9590 if (++md.num_slots_in_use >= NUM_SLOTS)
9592 CURR_SLOT = oldslot;
9595 case IA64_DVS_IMPLIED:
9596 case IA64_DVS_IMPLIEDF:
9598 fprintf (stderr, "Inserting stop\n");
9599 insn_group_break (1, 0, 0);
9606 /* Check the resources used by the given opcode against the current dependency
9609 The check is run once for each execution path encountered. In this case,
9610 a unique execution path is the sequence of instructions following a code
9611 entry point, e.g. the following has three execution paths, one starting
9612 at L0, one at L1, and one at L2.
9621 check_dependencies (idesc)
9622 struct ia64_opcode *idesc;
9624 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9628 /* Note that the number of marked resources may change within the
9629 loop if in auto mode. */
9631 while (i < regdepslen)
9633 struct rsrc *rs = ®deps[i];
9634 const struct ia64_dependency *dep = rs->dependency;
9639 if (dep->semantics == IA64_DVS_NONE
9640 || (chkind = depends_on (rs->depind, idesc)) == -1)
9646 note = NOTE (opdeps->chks[chkind]);
9648 /* Check this resource against each execution path seen thus far. */
9649 for (path = 0; path <= md.path; path++)
9653 /* If the dependency wasn't on the path being checked, ignore it. */
9654 if (rs->path < path)
9657 /* If the QP for this insn implies a QP which has branched, don't
9658 bother checking. Ed. NOTE: I don't think this check is terribly
9659 useful; what's the point of generating code which will only be
9660 reached if its QP is zero?
9661 This code was specifically inserted to handle the following code,
9662 based on notes from Intel's DV checking code, where p1 implies p2.
9668 if (CURR_SLOT.qp_regno != 0)
9672 for (implies = 0; implies < qp_implieslen; implies++)
9674 if (qp_implies[implies].path >= path
9675 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9676 && qp_implies[implies].p2_branched)
9686 if ((matchtype = resources_match (rs, idesc, note,
9687 CURR_SLOT.qp_regno, path)) != 0)
9690 char pathmsg[256] = "";
9691 char indexmsg[256] = "";
9692 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9695 sprintf (pathmsg, " when entry is at label '%s'",
9696 md.entry_labels[path - 1]);
9697 if (rs->specific && rs->index != 0)
9698 sprintf (indexmsg, ", specific resource number is %d",
9700 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9702 (certain ? "violates" : "may violate"),
9703 dv_mode[dep->mode], dep->name,
9704 dv_sem[dep->semantics],
9707 if (md.explicit_mode)
9709 as_warn ("%s", msg);
9711 as_warn (_("Only the first path encountering the conflict "
9713 as_warn_where (rs->file, rs->line,
9714 _("This is the location of the "
9715 "conflicting usage"));
9716 /* Don't bother checking other paths, to avoid duplicating
9723 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9725 remove_marked_resource (rs);
9727 /* since the set of dependencies has changed, start over */
9728 /* FIXME -- since we're removing dvs as we go, we
9729 probably don't really need to start over... */
9742 /* Register new dependencies based on the given opcode. */
9745 mark_resources (idesc)
9746 struct ia64_opcode *idesc;
9749 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9750 int add_only_qp_reads = 0;
9752 /* A conditional branch only uses its resources if it is taken; if it is
9753 taken, we stop following that path. The other branch types effectively
9754 *always* write their resources. If it's not taken, register only QP
9756 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9758 add_only_qp_reads = 1;
9762 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9764 for (i = 0; i < opdeps->nregs; i++)
9766 const struct ia64_dependency *dep;
9767 struct rsrc specs[MAX_SPECS];
9772 dep = ia64_find_dependency (opdeps->regs[i]);
9773 note = NOTE (opdeps->regs[i]);
9775 if (add_only_qp_reads
9776 && !(dep->mode == IA64_DV_WAR
9777 && (dep->specifier == IA64_RS_PR
9778 || dep->specifier == IA64_RS_PRr
9779 || dep->specifier == IA64_RS_PR63)))
9782 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9785 if (md.debug_dv && !count)
9786 fprintf (stderr, " No %s %s usage found (path %d)\n",
9787 dv_mode[dep->mode], dep->name, md.path);
9792 mark_resource (idesc, dep, &specs[count],
9793 DEP (opdeps->regs[i]), md.path);
9796 /* The execution path may affect register values, which may in turn
9797 affect which indirect-access resources are accessed. */
9798 switch (dep->specifier)
9810 for (path = 0; path < md.path; path++)
9812 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9814 mark_resource (idesc, dep, &specs[count],
9815 DEP (opdeps->regs[i]), path);
9822 /* Remove dependencies when they no longer apply. */
9825 update_dependencies (idesc)
9826 struct ia64_opcode *idesc;
9830 if (strcmp (idesc->name, "srlz.i") == 0)
9832 instruction_serialization ();
9834 else if (strcmp (idesc->name, "srlz.d") == 0)
9836 data_serialization ();
9838 else if (is_interruption_or_rfi (idesc)
9839 || is_taken_branch (idesc))
9841 /* Although technically the taken branch doesn't clear dependencies
9842 which require a srlz.[id], we don't follow the branch; the next
9843 instruction is assumed to start with a clean slate. */
9847 else if (is_conditional_branch (idesc)
9848 && CURR_SLOT.qp_regno != 0)
9850 int is_call = strstr (idesc->name, ".call") != NULL;
9852 for (i = 0; i < qp_implieslen; i++)
9854 /* If the conditional branch's predicate is implied by the predicate
9855 in an existing dependency, remove that dependency. */
9856 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9859 /* Note that this implied predicate takes a branch so that if
9860 a later insn generates a DV but its predicate implies this
9861 one, we can avoid the false DV warning. */
9862 qp_implies[i].p2_branched = 1;
9863 while (depind < regdepslen)
9865 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9867 print_dependency ("Removing", depind);
9868 regdeps[depind] = regdeps[--regdepslen];
9875 /* Any marked resources which have this same predicate should be
9876 cleared, provided that the QP hasn't been modified between the
9877 marking instruction and the branch. */
9880 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9885 while (i < regdepslen)
9887 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9888 && regdeps[i].link_to_qp_branch
9889 && (regdeps[i].file != CURR_SLOT.src_file
9890 || regdeps[i].line != CURR_SLOT.src_line))
9892 /* Treat like a taken branch */
9893 print_dependency ("Removing", i);
9894 regdeps[i] = regdeps[--regdepslen];
9903 /* Examine the current instruction for dependency violations. */
9907 struct ia64_opcode *idesc;
9911 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9912 idesc->name, CURR_SLOT.src_line,
9913 idesc->dependencies->nchks,
9914 idesc->dependencies->nregs);
9917 /* Look through the list of currently marked resources; if the current
9918 instruction has the dependency in its chks list which uses that resource,
9919 check against the specific resources used. */
9920 check_dependencies (idesc);
9922 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9923 then add them to the list of marked resources. */
9924 mark_resources (idesc);
9926 /* There are several types of dependency semantics, and each has its own
9927 requirements for being cleared
9929 Instruction serialization (insns separated by interruption, rfi, or
9930 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9932 Data serialization (instruction serialization, or writer + srlz.d +
9933 reader, where writer and srlz.d are in separate groups) clears
9934 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9935 always be the case).
9937 Instruction group break (groups separated by stop, taken branch,
9938 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9940 update_dependencies (idesc);
9942 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9943 warning. Keep track of as many as possible that are useful. */
9944 note_register_values (idesc);
9946 /* We don't need or want this anymore. */
9947 md.mem_offset.hint = 0;
9952 /* Translate one line of assembly. Pseudo ops and labels do not show
9958 char *saved_input_line_pointer, *mnemonic;
9959 const struct pseudo_opcode *pdesc;
9960 struct ia64_opcode *idesc;
9961 unsigned char qp_regno;
9965 saved_input_line_pointer = input_line_pointer;
9966 input_line_pointer = str;
9968 /* extract the opcode (mnemonic): */
9970 mnemonic = input_line_pointer;
9971 ch = get_symbol_end ();
9972 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9975 *input_line_pointer = ch;
9976 (*pdesc->handler) (pdesc->arg);
9980 /* Find the instruction descriptor matching the arguments. */
9982 idesc = ia64_find_opcode (mnemonic);
9983 *input_line_pointer = ch;
9986 as_bad ("Unknown opcode `%s'", mnemonic);
9990 idesc = parse_operands (idesc);
9994 /* Handle the dynamic ops we can handle now: */
9995 if (idesc->type == IA64_TYPE_DYN)
9997 if (strcmp (idesc->name, "add") == 0)
9999 if (CURR_SLOT.opnd[2].X_op == O_register
10000 && CURR_SLOT.opnd[2].X_add_number < 4)
10004 ia64_free_opcode (idesc);
10005 idesc = ia64_find_opcode (mnemonic);
10007 know (!idesc->next);
10010 else if (strcmp (idesc->name, "mov") == 0)
10012 enum ia64_opnd opnd1, opnd2;
10015 opnd1 = idesc->operands[0];
10016 opnd2 = idesc->operands[1];
10017 if (opnd1 == IA64_OPND_AR3)
10019 else if (opnd2 == IA64_OPND_AR3)
10023 if (CURR_SLOT.opnd[rop].X_op == O_register)
10025 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10026 mnemonic = "mov.i";
10028 mnemonic = "mov.m";
10032 ia64_free_opcode (idesc);
10033 idesc = ia64_find_opcode (mnemonic);
10034 while (idesc != NULL
10035 && (idesc->operands[0] != opnd1
10036 || idesc->operands[1] != opnd2))
10037 idesc = get_next_opcode (idesc);
10040 else if (strcmp (idesc->name, "mov.i") == 0
10041 || strcmp (idesc->name, "mov.m") == 0)
10043 enum ia64_opnd opnd1, opnd2;
10046 opnd1 = idesc->operands[0];
10047 opnd2 = idesc->operands[1];
10048 if (opnd1 == IA64_OPND_AR3)
10050 else if (opnd2 == IA64_OPND_AR3)
10054 if (CURR_SLOT.opnd[rop].X_op == O_register)
10057 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10059 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10061 if (unit != 'a' && unit != idesc->name [4])
10062 as_bad ("AR %d cannot be accessed by %c-unit",
10063 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10069 if (md.qp.X_op == O_register)
10071 qp_regno = md.qp.X_add_number - REG_P;
10072 md.qp.X_op = O_absent;
10075 flags = idesc->flags;
10077 if ((flags & IA64_OPCODE_FIRST) != 0)
10079 /* The alignment frag has to end with a stop bit only if the
10080 next instruction after the alignment directive has to be
10081 the first instruction in an instruction group. */
10084 while (align_frag->fr_type != rs_align_code)
10086 align_frag = align_frag->fr_next;
10090 /* align_frag can be NULL if there are directives in
10092 if (align_frag && align_frag->fr_next == frag_now)
10093 align_frag->tc_frag_data = 1;
10096 insn_group_break (1, 0, 0);
10100 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10102 as_bad ("`%s' cannot be predicated", idesc->name);
10106 /* Build the instruction. */
10107 CURR_SLOT.qp_regno = qp_regno;
10108 CURR_SLOT.idesc = idesc;
10109 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10110 dwarf2_where (&CURR_SLOT.debug_line);
10112 /* Add unwind entry, if there is one. */
10113 if (unwind.current_entry)
10115 CURR_SLOT.unwind_record = unwind.current_entry;
10116 unwind.current_entry = NULL;
10119 /* Check for dependency violations. */
10123 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10124 if (++md.num_slots_in_use >= NUM_SLOTS)
10125 emit_one_bundle ();
10127 if ((flags & IA64_OPCODE_LAST) != 0)
10128 insn_group_break (1, 0, 0);
10130 md.last_text_seg = now_seg;
10133 input_line_pointer = saved_input_line_pointer;
10136 /* Called when symbol NAME cannot be found in the symbol table.
10137 Should be used for dynamic valued symbols only. */
10140 md_undefined_symbol (name)
10141 char *name ATTRIBUTE_UNUSED;
10146 /* Called for any expression that can not be recognized. When the
10147 function is called, `input_line_pointer' will point to the start of
10154 enum pseudo_type pseudo_type;
10159 switch (*input_line_pointer)
10162 /* Find what relocation pseudo-function we're dealing with. */
10164 ch = *++input_line_pointer;
10165 for (i = 0; i < NELEMS (pseudo_func); ++i)
10166 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10168 len = strlen (pseudo_func[i].name);
10169 if (strncmp (pseudo_func[i].name + 1,
10170 input_line_pointer + 1, len - 1) == 0
10171 && !is_part_of_name (input_line_pointer[len]))
10173 input_line_pointer += len;
10174 pseudo_type = pseudo_func[i].type;
10178 switch (pseudo_type)
10180 case PSEUDO_FUNC_RELOC:
10181 SKIP_WHITESPACE ();
10182 if (*input_line_pointer != '(')
10184 as_bad ("Expected '('");
10188 ++input_line_pointer;
10190 if (*input_line_pointer++ != ')')
10192 as_bad ("Missing ')'");
10195 if (e->X_op != O_symbol)
10197 if (e->X_op != O_pseudo_fixup)
10199 as_bad ("Not a symbolic expression");
10202 if (i != FUNC_LT_RELATIVE)
10204 as_bad ("Illegal combination of relocation functions");
10207 switch (S_GET_VALUE (e->X_op_symbol))
10209 case FUNC_FPTR_RELATIVE:
10210 i = FUNC_LT_FPTR_RELATIVE; break;
10211 case FUNC_DTP_MODULE:
10212 i = FUNC_LT_DTP_MODULE; break;
10213 case FUNC_DTP_RELATIVE:
10214 i = FUNC_LT_DTP_RELATIVE; break;
10215 case FUNC_TP_RELATIVE:
10216 i = FUNC_LT_TP_RELATIVE; break;
10218 as_bad ("Illegal combination of relocation functions");
10222 /* Make sure gas doesn't get rid of local symbols that are used
10224 e->X_op = O_pseudo_fixup;
10225 e->X_op_symbol = pseudo_func[i].u.sym;
10228 case PSEUDO_FUNC_CONST:
10229 e->X_op = O_constant;
10230 e->X_add_number = pseudo_func[i].u.ival;
10233 case PSEUDO_FUNC_REG:
10234 e->X_op = O_register;
10235 e->X_add_number = pseudo_func[i].u.ival;
10239 name = input_line_pointer - 1;
10241 as_bad ("Unknown pseudo function `%s'", name);
10247 ++input_line_pointer;
10249 if (*input_line_pointer != ']')
10251 as_bad ("Closing bracket misssing");
10256 if (e->X_op != O_register)
10257 as_bad ("Register expected as index");
10259 ++input_line_pointer;
10270 ignore_rest_of_line ();
10273 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10274 a section symbol plus some offset. For relocs involving @fptr(),
10275 directives we don't want such adjustments since we need to have the
10276 original symbol's name in the reloc. */
10278 ia64_fix_adjustable (fix)
10281 /* Prevent all adjustments to global symbols */
10282 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10285 switch (fix->fx_r_type)
10287 case BFD_RELOC_IA64_FPTR64I:
10288 case BFD_RELOC_IA64_FPTR32MSB:
10289 case BFD_RELOC_IA64_FPTR32LSB:
10290 case BFD_RELOC_IA64_FPTR64MSB:
10291 case BFD_RELOC_IA64_FPTR64LSB:
10292 case BFD_RELOC_IA64_LTOFF_FPTR22:
10293 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10303 ia64_force_relocation (fix)
10306 switch (fix->fx_r_type)
10308 case BFD_RELOC_IA64_FPTR64I:
10309 case BFD_RELOC_IA64_FPTR32MSB:
10310 case BFD_RELOC_IA64_FPTR32LSB:
10311 case BFD_RELOC_IA64_FPTR64MSB:
10312 case BFD_RELOC_IA64_FPTR64LSB:
10314 case BFD_RELOC_IA64_LTOFF22:
10315 case BFD_RELOC_IA64_LTOFF64I:
10316 case BFD_RELOC_IA64_LTOFF_FPTR22:
10317 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10318 case BFD_RELOC_IA64_PLTOFF22:
10319 case BFD_RELOC_IA64_PLTOFF64I:
10320 case BFD_RELOC_IA64_PLTOFF64MSB:
10321 case BFD_RELOC_IA64_PLTOFF64LSB:
10323 case BFD_RELOC_IA64_LTOFF22X:
10324 case BFD_RELOC_IA64_LDXMOV:
10331 return generic_force_reloc (fix);
10334 /* Decide from what point a pc-relative relocation is relative to,
10335 relative to the pc-relative fixup. Er, relatively speaking. */
10337 ia64_pcrel_from_section (fix, sec)
10341 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10343 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10350 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10352 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10356 expr.X_op = O_pseudo_fixup;
10357 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10358 expr.X_add_number = 0;
10359 expr.X_add_symbol = symbol;
10360 emit_expr (&expr, size);
10363 /* This is called whenever some data item (not an instruction) needs a
10364 fixup. We pick the right reloc code depending on the byteorder
10365 currently in effect. */
10367 ia64_cons_fix_new (f, where, nbytes, exp)
10373 bfd_reloc_code_real_type code;
10378 /* There are no reloc for 8 and 16 bit quantities, but we allow
10379 them here since they will work fine as long as the expression
10380 is fully defined at the end of the pass over the source file. */
10381 case 1: code = BFD_RELOC_8; break;
10382 case 2: code = BFD_RELOC_16; break;
10384 if (target_big_endian)
10385 code = BFD_RELOC_IA64_DIR32MSB;
10387 code = BFD_RELOC_IA64_DIR32LSB;
10391 /* In 32-bit mode, data8 could mean function descriptors too. */
10392 if (exp->X_op == O_pseudo_fixup
10393 && exp->X_op_symbol
10394 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10395 && !(md.flags & EF_IA_64_ABI64))
10397 if (target_big_endian)
10398 code = BFD_RELOC_IA64_IPLTMSB;
10400 code = BFD_RELOC_IA64_IPLTLSB;
10401 exp->X_op = O_symbol;
10406 if (target_big_endian)
10407 code = BFD_RELOC_IA64_DIR64MSB;
10409 code = BFD_RELOC_IA64_DIR64LSB;
10414 if (exp->X_op == O_pseudo_fixup
10415 && exp->X_op_symbol
10416 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10418 if (target_big_endian)
10419 code = BFD_RELOC_IA64_IPLTMSB;
10421 code = BFD_RELOC_IA64_IPLTLSB;
10422 exp->X_op = O_symbol;
10428 as_bad ("Unsupported fixup size %d", nbytes);
10429 ignore_rest_of_line ();
10433 if (exp->X_op == O_pseudo_fixup)
10435 exp->X_op = O_symbol;
10436 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10437 /* ??? If code unchanged, unsupported. */
10440 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10441 /* We need to store the byte order in effect in case we're going
10442 to fix an 8 or 16 bit relocation (for which there no real
10443 relocs available). See md_apply_fix3(). */
10444 fix->tc_fix_data.bigendian = target_big_endian;
10447 /* Return the actual relocation we wish to associate with the pseudo
10448 reloc described by SYM and R_TYPE. SYM should be one of the
10449 symbols in the pseudo_func array, or NULL. */
10451 static bfd_reloc_code_real_type
10452 ia64_gen_real_reloc_type (sym, r_type)
10453 struct symbol *sym;
10454 bfd_reloc_code_real_type r_type;
10456 bfd_reloc_code_real_type new = 0;
10463 switch (S_GET_VALUE (sym))
10465 case FUNC_FPTR_RELATIVE:
10468 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10469 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10470 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10471 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10472 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10477 case FUNC_GP_RELATIVE:
10480 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10481 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10482 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10483 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10484 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10485 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10490 case FUNC_LT_RELATIVE:
10493 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10494 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10499 case FUNC_LT_RELATIVE_X:
10502 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10507 case FUNC_PC_RELATIVE:
10510 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10511 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10512 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10513 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10514 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10515 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10520 case FUNC_PLT_RELATIVE:
10523 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10524 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10525 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10526 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10531 case FUNC_SEC_RELATIVE:
10534 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10535 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10536 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10537 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10542 case FUNC_SEG_RELATIVE:
10545 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10546 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10547 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10548 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10553 case FUNC_LTV_RELATIVE:
10556 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10557 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10558 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10559 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10564 case FUNC_LT_FPTR_RELATIVE:
10567 case BFD_RELOC_IA64_IMM22:
10568 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10569 case BFD_RELOC_IA64_IMM64:
10570 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10576 case FUNC_TP_RELATIVE:
10579 case BFD_RELOC_IA64_IMM14:
10580 new = BFD_RELOC_IA64_TPREL14; break;
10581 case BFD_RELOC_IA64_IMM22:
10582 new = BFD_RELOC_IA64_TPREL22; break;
10583 case BFD_RELOC_IA64_IMM64:
10584 new = BFD_RELOC_IA64_TPREL64I; break;
10590 case FUNC_LT_TP_RELATIVE:
10593 case BFD_RELOC_IA64_IMM22:
10594 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10600 case FUNC_LT_DTP_MODULE:
10603 case BFD_RELOC_IA64_IMM22:
10604 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10610 case FUNC_DTP_RELATIVE:
10613 case BFD_RELOC_IA64_DIR64MSB:
10614 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10615 case BFD_RELOC_IA64_DIR64LSB:
10616 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10617 case BFD_RELOC_IA64_IMM14:
10618 new = BFD_RELOC_IA64_DTPREL14; break;
10619 case BFD_RELOC_IA64_IMM22:
10620 new = BFD_RELOC_IA64_DTPREL22; break;
10621 case BFD_RELOC_IA64_IMM64:
10622 new = BFD_RELOC_IA64_DTPREL64I; break;
10628 case FUNC_LT_DTP_RELATIVE:
10631 case BFD_RELOC_IA64_IMM22:
10632 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10638 case FUNC_IPLT_RELOC:
10645 /* Hmmmm. Should this ever occur? */
10652 /* Here is where generate the appropriate reloc for pseudo relocation
10655 ia64_validate_fix (fix)
10658 switch (fix->fx_r_type)
10660 case BFD_RELOC_IA64_FPTR64I:
10661 case BFD_RELOC_IA64_FPTR32MSB:
10662 case BFD_RELOC_IA64_FPTR64LSB:
10663 case BFD_RELOC_IA64_LTOFF_FPTR22:
10664 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10665 if (fix->fx_offset != 0)
10666 as_bad_where (fix->fx_file, fix->fx_line,
10667 "No addend allowed in @fptr() relocation");
10675 fix_insn (fix, odesc, value)
10677 const struct ia64_operand *odesc;
10680 bfd_vma insn[3], t0, t1, control_bits;
10685 slot = fix->fx_where & 0x3;
10686 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10688 /* Bundles are always in little-endian byte order */
10689 t0 = bfd_getl64 (fixpos);
10690 t1 = bfd_getl64 (fixpos + 8);
10691 control_bits = t0 & 0x1f;
10692 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10693 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10694 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10697 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10699 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10700 insn[2] |= (((value & 0x7f) << 13)
10701 | (((value >> 7) & 0x1ff) << 27)
10702 | (((value >> 16) & 0x1f) << 22)
10703 | (((value >> 21) & 0x1) << 21)
10704 | (((value >> 63) & 0x1) << 36));
10706 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10708 if (value & ~0x3fffffffffffffffULL)
10709 err = "integer operand out of range";
10710 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10711 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10713 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10716 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10717 insn[2] |= ((((value >> 59) & 0x1) << 36)
10718 | (((value >> 0) & 0xfffff) << 13));
10721 err = (*odesc->insert) (odesc, value, insn + slot);
10724 as_bad_where (fix->fx_file, fix->fx_line, err);
10726 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10727 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10728 number_to_chars_littleendian (fixpos + 0, t0, 8);
10729 number_to_chars_littleendian (fixpos + 8, t1, 8);
10732 /* Attempt to simplify or even eliminate a fixup. The return value is
10733 ignored; perhaps it was once meaningful, but now it is historical.
10734 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10736 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10740 md_apply_fix3 (fix, valP, seg)
10743 segT seg ATTRIBUTE_UNUSED;
10746 valueT value = *valP;
10748 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10752 switch (fix->fx_r_type)
10754 case BFD_RELOC_IA64_DIR32MSB:
10755 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10758 case BFD_RELOC_IA64_DIR32LSB:
10759 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10762 case BFD_RELOC_IA64_DIR64MSB:
10763 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10766 case BFD_RELOC_IA64_DIR64LSB:
10767 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10776 switch (fix->fx_r_type)
10778 case BFD_RELOC_UNUSED:
10779 /* This must be a TAG13 or TAG13b operand. There are no external
10780 relocs defined for them, so we must give an error. */
10781 as_bad_where (fix->fx_file, fix->fx_line,
10782 "%s must have a constant value",
10783 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10787 case BFD_RELOC_IA64_TPREL14:
10788 case BFD_RELOC_IA64_TPREL22:
10789 case BFD_RELOC_IA64_TPREL64I:
10790 case BFD_RELOC_IA64_LTOFF_TPREL22:
10791 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10792 case BFD_RELOC_IA64_DTPREL14:
10793 case BFD_RELOC_IA64_DTPREL22:
10794 case BFD_RELOC_IA64_DTPREL64I:
10795 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10796 S_SET_THREAD_LOCAL (fix->fx_addsy);
10803 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10805 if (fix->tc_fix_data.bigendian)
10806 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10808 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10813 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10818 /* Generate the BFD reloc to be stuck in the object file from the
10819 fixup used internally in the assembler. */
10822 tc_gen_reloc (sec, fixp)
10823 asection *sec ATTRIBUTE_UNUSED;
10828 reloc = xmalloc (sizeof (*reloc));
10829 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10830 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10831 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10832 reloc->addend = fixp->fx_offset;
10833 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10837 as_bad_where (fixp->fx_file, fixp->fx_line,
10838 "Cannot represent %s relocation in object file",
10839 bfd_get_reloc_code_name (fixp->fx_r_type));
10844 /* Turn a string in input_line_pointer into a floating point constant
10845 of type TYPE, and store the appropriate bytes in *LIT. The number
10846 of LITTLENUMS emitted is stored in *SIZE. An error message is
10847 returned, or NULL on OK. */
10849 #define MAX_LITTLENUMS 5
10852 md_atof (type, lit, size)
10857 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10887 return "Bad call to MD_ATOF()";
10889 t = atof_ieee (input_line_pointer, type, words);
10891 input_line_pointer = t;
10893 (*ia64_float_to_chars) (lit, words, prec);
10897 /* It is 10 byte floating point with 6 byte padding. */
10898 memset (&lit [10], 0, 6);
10899 *size = 8 * sizeof (LITTLENUM_TYPE);
10902 *size = prec * sizeof (LITTLENUM_TYPE);
10907 /* Handle ia64 specific semantics of the align directive. */
10910 ia64_md_do_align (n, fill, len, max)
10911 int n ATTRIBUTE_UNUSED;
10912 const char *fill ATTRIBUTE_UNUSED;
10913 int len ATTRIBUTE_UNUSED;
10914 int max ATTRIBUTE_UNUSED;
10916 if (subseg_text_p (now_seg))
10917 ia64_flush_insns ();
10920 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10921 of an rs_align_code fragment. */
10924 ia64_handle_align (fragp)
10927 /* Use mfi bundle of nops with no stop bits. */
10928 static const unsigned char le_nop[]
10929 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10930 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10931 static const unsigned char le_nop_stop[]
10932 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10933 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10937 const unsigned char *nop;
10939 if (fragp->fr_type != rs_align_code)
10942 /* Check if this frag has to end with a stop bit. */
10943 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10945 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10946 p = fragp->fr_literal + fragp->fr_fix;
10948 /* If no paddings are needed, we check if we need a stop bit. */
10949 if (!bytes && fragp->tc_frag_data)
10951 if (fragp->fr_fix < 16)
10953 /* FIXME: It won't work with
10955 alloc r32=ar.pfs,1,2,4,0
10959 as_bad_where (fragp->fr_file, fragp->fr_line,
10960 _("Can't add stop bit to mark end of instruction group"));
10963 /* Bundles are always in little-endian byte order. Make sure
10964 the previous bundle has the stop bit. */
10968 /* Make sure we are on a 16-byte boundary, in case someone has been
10969 putting data into a text section. */
10972 int fix = bytes & 15;
10973 memset (p, 0, fix);
10976 fragp->fr_fix += fix;
10979 /* Instruction bundles are always little-endian. */
10980 memcpy (p, nop, 16);
10981 fragp->fr_var = 16;
10985 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10990 number_to_chars_bigendian (lit, (long) (*words++),
10991 sizeof (LITTLENUM_TYPE));
10992 lit += sizeof (LITTLENUM_TYPE);
10997 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11002 number_to_chars_littleendian (lit, (long) (words[prec]),
11003 sizeof (LITTLENUM_TYPE));
11004 lit += sizeof (LITTLENUM_TYPE);
11009 ia64_elf_section_change_hook (void)
11011 dot_byteorder (-1);
11014 /* Check if a label should be made global. */
11016 ia64_check_label (symbolS *label)
11018 if (*input_line_pointer == ':')
11020 S_SET_EXTERNAL (label);
11021 input_line_pointer++;
11025 /* Used to remember where .alias and .secalias directives are seen. We
11026 will rename symbol and section names when we are about to output
11027 the relocatable file. */
11030 char *file; /* The file where the directive is seen. */
11031 unsigned int line; /* The line number the directive is at. */
11032 const char *name; /* The orignale name of the symbol. */
11035 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11036 .secalias. Otherwise, it is .alias. */
11038 dot_alias (int section)
11040 char *name, *alias;
11044 const char *error_string;
11047 struct hash_control *ahash, *nhash;
11050 name = input_line_pointer;
11051 delim = get_symbol_end ();
11052 end_name = input_line_pointer;
11055 if (name == end_name)
11057 as_bad (_("expected symbol name"));
11058 discard_rest_of_line ();
11062 SKIP_WHITESPACE ();
11064 if (*input_line_pointer != ',')
11067 as_bad (_("expected comma after \"%s\""), name);
11069 ignore_rest_of_line ();
11073 input_line_pointer++;
11076 /* We call demand_copy_C_string to check if alias string is valid.
11077 There should be a closing `"' and no `\0' in the string. */
11078 alias = demand_copy_C_string (&len);
11081 ignore_rest_of_line ();
11085 /* Make a copy of name string. */
11086 len = strlen (name) + 1;
11087 obstack_grow (¬es, name, len);
11088 name = obstack_finish (¬es);
11093 ahash = secalias_hash;
11094 nhash = secalias_name_hash;
11099 ahash = alias_hash;
11100 nhash = alias_name_hash;
11103 /* Check if alias has been used before. */
11104 h = (struct alias *) hash_find (ahash, alias);
11107 if (strcmp (h->name, name))
11108 as_bad (_("`%s' is already the alias of %s `%s'"),
11109 alias, kind, h->name);
11113 /* Check if name already has an alias. */
11114 a = (const char *) hash_find (nhash, name);
11117 if (strcmp (a, alias))
11118 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11122 h = (struct alias *) xmalloc (sizeof (struct alias));
11123 as_where (&h->file, &h->line);
11126 error_string = hash_jam (ahash, alias, (PTR) h);
11129 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11130 alias, kind, error_string);
11134 error_string = hash_jam (nhash, name, (PTR) alias);
11137 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11138 alias, kind, error_string);
11140 obstack_free (¬es, name);
11141 obstack_free (¬es, alias);
11144 demand_empty_rest_of_line ();
11147 /* It renames the original symbol name to its alias. */
11149 do_alias (const char *alias, PTR value)
11151 struct alias *h = (struct alias *) value;
11152 symbolS *sym = symbol_find (h->name);
11155 as_warn_where (h->file, h->line,
11156 _("symbol `%s' aliased to `%s' is not used"),
11159 S_SET_NAME (sym, (char *) alias);
11162 /* Called from write_object_file. */
11164 ia64_adjust_symtab (void)
11166 hash_traverse (alias_hash, do_alias);
11169 /* It renames the original section name to its alias. */
11171 do_secalias (const char *alias, PTR value)
11173 struct alias *h = (struct alias *) value;
11174 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11177 as_warn_where (h->file, h->line,
11178 _("section `%s' aliased to `%s' is not used"),
11184 /* Called from write_object_file. */
11186 ia64_frob_file (void)
11188 hash_traverse (secalias_hash, do_secalias);