1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS = 0,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
92 FUNC_LT_FPTR_RELATIVE,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix *next;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian;
160 /* This is the default endianness. */
161 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
163 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169 static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
172 static struct hash_control *alias_hash;
173 static struct hash_control *alias_name_hash;
174 static struct hash_control *secalias_hash;
175 static struct hash_control *secalias_name_hash;
177 /* Characters which always start a comment. */
178 const char comment_chars[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts = "m:N:x::";
199 struct option md_longopts[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
207 size_t md_longopts_size = sizeof (md_longopts);
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
217 symbolS *regsym[REG_NUM];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
232 keep_pending_output : 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use;
242 end_of_insn_group : 1,
243 manual_bundling_on : 1,
244 manual_bundling_off : 1,
245 loc_directive_seen : 1;
246 signed char user_template; /* user-selected template, if any */
247 unsigned char qp_regno; /* qualifying predicate */
248 /* This duplicates a good fraction of "struct fix" but we
249 can't use a "struct fix" instead since we can't call
250 fix_new_exp() until we know the address of the instruction. */
254 bfd_reloc_code_real_type code;
255 enum ia64_opnd opnd; /* type of operand in need of fix */
256 unsigned int is_pcrel : 1; /* is operand pc-relative? */
257 expressionS expr; /* the value to be inserted */
259 fixup[2]; /* at most two fixups per insn */
260 struct ia64_opcode *idesc;
261 struct label_fix *label_fixups;
262 struct label_fix *tag_fixups;
263 struct unw_rec_list *unwind_record; /* Unwind directive. */
266 unsigned int src_line;
267 struct dwarf2_line_info debug_line;
275 struct dynreg *next; /* next dynamic register */
277 unsigned short base; /* the base register number */
278 unsigned short num_regs; /* # of registers in this set */
280 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
282 flagword flags; /* ELF-header flags */
285 unsigned hint:1; /* is this hint currently valid? */
286 bfd_vma offset; /* mem.offset offset */
287 bfd_vma base; /* mem.offset base */
290 int path; /* number of alt. entry points seen */
291 const char **entry_labels; /* labels of all alternate paths in
292 the current DV-checking block. */
293 int maxpaths; /* size currently allocated for
295 /* Support for hardware errata workarounds. */
297 /* Record data about the last three insn groups. */
300 /* B-step workaround.
301 For each predicate register, this is set if the corresponding insn
302 group conditionally sets this register with one of the affected
305 /* B-step workaround.
306 For each general register, this is set if the corresponding insn
307 a) is conditional one one of the predicate registers for which
308 P_REG_SET is 1 in the corresponding entry of the previous group,
309 b) sets this general register with one of the affected
311 int g_reg_set_conditionally[128];
315 int pointer_size; /* size in bytes of a pointer */
316 int pointer_size_shift; /* shift size of a pointer for alignment */
320 /* application registers: */
326 #define AR_BSPSTORE 18
341 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
342 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
343 {"ar.rsc", 16}, {"ar.bsp", 17},
344 {"ar.bspstore", 18}, {"ar.rnat", 19},
345 {"ar.fcr", 21}, {"ar.eflag", 24},
346 {"ar.csd", 25}, {"ar.ssd", 26},
347 {"ar.cflg", 27}, {"ar.fsr", 28},
348 {"ar.fir", 29}, {"ar.fdr", 30},
349 {"ar.ccv", 32}, {"ar.unat", 36},
350 {"ar.fpsr", 40}, {"ar.itc", 44},
351 {"ar.pfs", 64}, {"ar.lc", 65},
372 /* control registers: */
414 static const struct const_desc
421 /* PSR constant masks: */
424 {"psr.be", ((valueT) 1) << 1},
425 {"psr.up", ((valueT) 1) << 2},
426 {"psr.ac", ((valueT) 1) << 3},
427 {"psr.mfl", ((valueT) 1) << 4},
428 {"psr.mfh", ((valueT) 1) << 5},
430 {"psr.ic", ((valueT) 1) << 13},
431 {"psr.i", ((valueT) 1) << 14},
432 {"psr.pk", ((valueT) 1) << 15},
434 {"psr.dt", ((valueT) 1) << 17},
435 {"psr.dfl", ((valueT) 1) << 18},
436 {"psr.dfh", ((valueT) 1) << 19},
437 {"psr.sp", ((valueT) 1) << 20},
438 {"psr.pp", ((valueT) 1) << 21},
439 {"psr.di", ((valueT) 1) << 22},
440 {"psr.si", ((valueT) 1) << 23},
441 {"psr.db", ((valueT) 1) << 24},
442 {"psr.lp", ((valueT) 1) << 25},
443 {"psr.tb", ((valueT) 1) << 26},
444 {"psr.rt", ((valueT) 1) << 27},
445 /* 28-31: reserved */
446 /* 32-33: cpl (current privilege level) */
447 {"psr.is", ((valueT) 1) << 34},
448 {"psr.mc", ((valueT) 1) << 35},
449 {"psr.it", ((valueT) 1) << 36},
450 {"psr.id", ((valueT) 1) << 37},
451 {"psr.da", ((valueT) 1) << 38},
452 {"psr.dd", ((valueT) 1) << 39},
453 {"psr.ss", ((valueT) 1) << 40},
454 /* 41-42: ri (restart instruction) */
455 {"psr.ed", ((valueT) 1) << 43},
456 {"psr.bn", ((valueT) 1) << 44},
459 /* indirect register-sets/memory: */
468 { "CPUID", IND_CPUID },
469 { "cpuid", IND_CPUID },
481 /* Pseudo functions used to indicate relocation types (these functions
482 start with an at sign (@). */
504 /* reloc pseudo functions (these must come first!): */
505 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
506 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
507 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
508 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
511 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
512 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
513 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
514 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
515 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
516 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
520 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
521 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
523 /* mbtype4 constants: */
524 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
525 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
526 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
527 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
528 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
530 /* fclass constants: */
531 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
532 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
533 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
534 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
535 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
536 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
537 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
538 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
539 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
541 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
543 /* hint constants: */
544 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
546 /* unwind-related constants: */
547 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
548 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
549 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
550 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
551 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
552 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
553 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
555 /* unwind-related registers: */
556 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
559 /* 41-bit nop opcodes (one per unit): */
560 static const bfd_vma nop[IA64_NUM_UNITS] =
562 0x0000000000LL, /* NIL => break 0 */
563 0x0008000000LL, /* I-unit nop */
564 0x0008000000LL, /* M-unit nop */
565 0x4000000000LL, /* B-unit nop */
566 0x0008000000LL, /* F-unit nop */
567 0x0008000000LL, /* L-"unit" nop */
568 0x0008000000LL, /* X-unit nop */
571 /* Can't be `const' as it's passed to input routines (which have the
572 habit of setting temporary sentinels. */
573 static char special_section_name[][20] =
575 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
576 {".IA_64.unwind"}, {".IA_64.unwind_info"},
577 {".init_array"}, {".fini_array"}
580 /* The best template for a particular sequence of up to three
582 #define N IA64_NUM_TYPES
583 static unsigned char best_template[N][N][N];
586 /* Resource dependencies currently in effect */
588 int depind; /* dependency index */
589 const struct ia64_dependency *dependency; /* actual dependency */
590 unsigned specific:1, /* is this a specific bit/regno? */
591 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
592 int index; /* specific regno/bit within dependency */
593 int note; /* optional qualifying note (0 if none) */
597 int insn_srlz; /* current insn serialization state */
598 int data_srlz; /* current data serialization state */
599 int qp_regno; /* qualifying predicate for this usage */
600 char *file; /* what file marked this dependency */
601 unsigned int line; /* what line marked this dependency */
602 struct mem_offset mem_offset; /* optional memory offset hint */
603 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
604 int path; /* corresponding code entry index */
606 static int regdepslen = 0;
607 static int regdepstotlen = 0;
608 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
609 static const char *dv_sem[] = { "none", "implied", "impliedf",
610 "data", "instr", "specific", "stop", "other" };
611 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
613 /* Current state of PR mutexation */
614 static struct qpmutex {
617 } *qp_mutexes = NULL; /* QP mutex bitmasks */
618 static int qp_mutexeslen = 0;
619 static int qp_mutexestotlen = 0;
620 static valueT qp_safe_across_calls = 0;
622 /* Current state of PR implications */
623 static struct qp_imply {
626 unsigned p2_branched:1;
628 } *qp_implies = NULL;
629 static int qp_implieslen = 0;
630 static int qp_impliestotlen = 0;
632 /* Keep track of static GR values so that indirect register usage can
633 sometimes be tracked. */
638 } gr_values[128] = {{ 1, 0, 0 }};
640 /* Remember the alignment frag. */
641 static fragS *align_frag;
643 /* These are the routines required to output the various types of
646 /* A slot_number is a frag address plus the slot index (0-2). We use the
647 frag address here so that if there is a section switch in the middle of
648 a function, then instructions emitted to a different section are not
649 counted. Since there may be more than one frag for a function, this
650 means we also need to keep track of which frag this address belongs to
651 so we can compute inter-frag distances. This also nicely solves the
652 problem with nops emitted for align directives, which can't easily be
653 counted, but can easily be derived from frag sizes. */
655 typedef struct unw_rec_list {
657 unsigned long slot_number;
659 unsigned long next_slot_number;
660 fragS *next_slot_frag;
661 struct unw_rec_list *next;
664 #define SLOT_NUM_NOT_SET (unsigned)-1
666 /* Linked list of saved prologue counts. A very poor
667 implementation of a map from label numbers to prologue counts. */
668 typedef struct label_prologue_count
670 struct label_prologue_count *next;
671 unsigned long label_number;
672 unsigned int prologue_count;
673 } label_prologue_count;
677 /* Maintain a list of unwind entries for the current function. */
681 /* Any unwind entires that should be attached to the current slot
682 that an insn is being constructed for. */
683 unw_rec_list *current_entry;
685 /* These are used to create the unwind table entry for this function. */
687 symbolS *info; /* pointer to unwind info */
688 symbolS *personality_routine;
690 subsegT saved_text_subseg;
691 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
693 /* TRUE if processing unwind directives in a prologue region. */
694 unsigned int prologue : 1;
695 unsigned int prologue_mask : 4;
696 unsigned int body : 1;
697 unsigned int insn : 1;
698 unsigned int prologue_count; /* number of .prologues seen so far */
699 /* Prologue counts at previous .label_state directives. */
700 struct label_prologue_count * saved_prologue_counts;
703 /* The input value is a negated offset from psp, and specifies an address
704 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
705 must add 16 and divide by 4 to get the encoded value. */
707 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
709 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
711 /* Forward declarations: */
712 static void set_section PARAMS ((char *name));
713 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
714 unsigned int, unsigned int));
715 static void dot_align (int);
716 static void dot_radix PARAMS ((int));
717 static void dot_special_section PARAMS ((int));
718 static void dot_proc PARAMS ((int));
719 static void dot_fframe PARAMS ((int));
720 static void dot_vframe PARAMS ((int));
721 static void dot_vframesp PARAMS ((int));
722 static void dot_vframepsp PARAMS ((int));
723 static void dot_save PARAMS ((int));
724 static void dot_restore PARAMS ((int));
725 static void dot_restorereg PARAMS ((int));
726 static void dot_restorereg_p PARAMS ((int));
727 static void dot_handlerdata PARAMS ((int));
728 static void dot_unwentry PARAMS ((int));
729 static void dot_altrp PARAMS ((int));
730 static void dot_savemem PARAMS ((int));
731 static void dot_saveg PARAMS ((int));
732 static void dot_savef PARAMS ((int));
733 static void dot_saveb PARAMS ((int));
734 static void dot_savegf PARAMS ((int));
735 static void dot_spill PARAMS ((int));
736 static void dot_spillreg PARAMS ((int));
737 static void dot_spillmem PARAMS ((int));
738 static void dot_spillreg_p PARAMS ((int));
739 static void dot_spillmem_p PARAMS ((int));
740 static void dot_label_state PARAMS ((int));
741 static void dot_copy_state PARAMS ((int));
742 static void dot_unwabi PARAMS ((int));
743 static void dot_personality PARAMS ((int));
744 static void dot_body PARAMS ((int));
745 static void dot_prologue PARAMS ((int));
746 static void dot_endp PARAMS ((int));
747 static void dot_template PARAMS ((int));
748 static void dot_regstk PARAMS ((int));
749 static void dot_rot PARAMS ((int));
750 static void dot_byteorder PARAMS ((int));
751 static void dot_psr PARAMS ((int));
752 static void dot_alias PARAMS ((int));
753 static void dot_ln PARAMS ((int));
754 static char *parse_section_name PARAMS ((void));
755 static void dot_xdata PARAMS ((int));
756 static void stmt_float_cons PARAMS ((int));
757 static void stmt_cons_ua PARAMS ((int));
758 static void dot_xfloat_cons PARAMS ((int));
759 static void dot_xstringer PARAMS ((int));
760 static void dot_xdata_ua PARAMS ((int));
761 static void dot_xfloat_cons_ua PARAMS ((int));
762 static void print_prmask PARAMS ((valueT mask));
763 static void dot_pred_rel PARAMS ((int));
764 static void dot_reg_val PARAMS ((int));
765 static void dot_serialize PARAMS ((int));
766 static void dot_dv_mode PARAMS ((int));
767 static void dot_entry PARAMS ((int));
768 static void dot_mem_offset PARAMS ((int));
769 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
770 static symbolS *declare_register PARAMS ((const char *name, int regnum));
771 static void declare_register_set PARAMS ((const char *, int, int));
772 static unsigned int operand_width PARAMS ((enum ia64_opnd));
773 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
776 static int parse_operand PARAMS ((expressionS *e));
777 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
778 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
779 static void build_insn PARAMS ((struct slot *, bfd_vma *));
780 static void emit_one_bundle PARAMS ((void));
781 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
782 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
783 bfd_reloc_code_real_type r_type));
784 static void insn_group_break PARAMS ((int, int, int));
785 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
786 struct rsrc *, int depind, int path));
787 static void add_qp_mutex PARAMS((valueT mask));
788 static void add_qp_imply PARAMS((int p1, int p2));
789 static void clear_qp_branch_flag PARAMS((valueT mask));
790 static void clear_qp_mutex PARAMS((valueT mask));
791 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
792 static int has_suffix_p PARAMS((const char *, const char *));
793 static void clear_register_values PARAMS ((void));
794 static void print_dependency PARAMS ((const char *action, int depind));
795 static void instruction_serialization PARAMS ((void));
796 static void data_serialization PARAMS ((void));
797 static void remove_marked_resource PARAMS ((struct rsrc *));
798 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
799 static int is_taken_branch PARAMS ((struct ia64_opcode *));
800 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
801 static int depends_on PARAMS ((int, struct ia64_opcode *));
802 static int specify_resource PARAMS ((const struct ia64_dependency *,
803 struct ia64_opcode *, int, struct rsrc [], int, int));
804 static int check_dv PARAMS((struct ia64_opcode *idesc));
805 static void check_dependencies PARAMS((struct ia64_opcode *));
806 static void mark_resources PARAMS((struct ia64_opcode *));
807 static void update_dependencies PARAMS((struct ia64_opcode *));
808 static void note_register_values PARAMS((struct ia64_opcode *));
809 static int qp_mutex PARAMS ((int, int, int));
810 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
811 static void output_vbyte_mem PARAMS ((int, char *, char *));
812 static void count_output PARAMS ((int, char *, char *));
813 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
814 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
815 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
816 static void output_P1_format PARAMS ((vbyte_func, int));
817 static void output_P2_format PARAMS ((vbyte_func, int, int));
818 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
819 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
820 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
821 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
822 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
823 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
824 static void output_P9_format PARAMS ((vbyte_func, int, int));
825 static void output_P10_format PARAMS ((vbyte_func, int, int));
826 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
827 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
828 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
829 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
830 static char format_ab_reg PARAMS ((int, int));
831 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
833 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
834 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
836 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
837 static unw_rec_list *output_endp PARAMS ((void));
838 static unw_rec_list *output_prologue PARAMS ((void));
839 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
840 static unw_rec_list *output_body PARAMS ((void));
841 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
842 static unw_rec_list *output_mem_stack_v PARAMS ((void));
843 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
844 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_rp_when PARAMS ((void));
846 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
847 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
848 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
849 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
850 static unw_rec_list *output_pfs_when PARAMS ((void));
851 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
852 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
853 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
854 static unw_rec_list *output_preds_when PARAMS ((void));
855 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
856 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
857 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
858 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
859 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
860 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
861 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
862 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
863 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
864 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
865 static unw_rec_list *output_unat_when PARAMS ((void));
866 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_lc_when PARAMS ((void));
870 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_fpsr_when PARAMS ((void));
874 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
878 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
879 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
880 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
881 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
882 static unw_rec_list *output_bsp_when PARAMS ((void));
883 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
884 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
885 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
886 static unw_rec_list *output_bspstore_when PARAMS ((void));
887 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
888 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
889 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
890 static unw_rec_list *output_rnat_when PARAMS ((void));
891 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
892 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
893 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
894 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
895 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
896 static unw_rec_list *output_label_state PARAMS ((unsigned long));
897 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
898 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
899 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
900 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
902 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
904 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
906 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
907 unsigned int, unsigned int));
908 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
909 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
910 static int calc_record_size PARAMS ((unw_rec_list *));
911 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
912 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
913 unsigned long, fragS *,
915 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
916 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
917 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
918 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
919 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
920 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
921 static void free_saved_prologue_counts PARAMS ((void));
923 /* Determine if application register REGNUM resides only in the integer
924 unit (as opposed to the memory unit). */
926 ar_is_only_in_integer_unit (int reg)
929 return reg >= 64 && reg <= 111;
932 /* Determine if application register REGNUM resides only in the memory
933 unit (as opposed to the integer unit). */
935 ar_is_only_in_memory_unit (int reg)
938 return reg >= 0 && reg <= 47;
941 /* Switch to section NAME and create section if necessary. It's
942 rather ugly that we have to manipulate input_line_pointer but I
943 don't see any other way to accomplish the same thing without
944 changing obj-elf.c (which may be the Right Thing, in the end). */
949 char *saved_input_line_pointer;
951 saved_input_line_pointer = input_line_pointer;
952 input_line_pointer = name;
954 input_line_pointer = saved_input_line_pointer;
957 /* Map 's' to SHF_IA_64_SHORT. */
960 ia64_elf_section_letter (letter, ptr_msg)
965 return SHF_IA_64_SHORT;
966 else if (letter == 'o')
967 return SHF_LINK_ORDER;
969 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
973 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
976 ia64_elf_section_flags (flags, attr, type)
978 int attr, type ATTRIBUTE_UNUSED;
980 if (attr & SHF_IA_64_SHORT)
981 flags |= SEC_SMALL_DATA;
986 ia64_elf_section_type (str, len)
990 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
992 if (STREQ (ELF_STRING_ia64_unwind_info))
995 if (STREQ (ELF_STRING_ia64_unwind_info_once))
998 if (STREQ (ELF_STRING_ia64_unwind))
999 return SHT_IA_64_UNWIND;
1001 if (STREQ (ELF_STRING_ia64_unwind_once))
1002 return SHT_IA_64_UNWIND;
1004 if (STREQ ("unwind"))
1005 return SHT_IA_64_UNWIND;
1012 set_regstack (ins, locs, outs, rots)
1013 unsigned int ins, locs, outs, rots;
1015 /* Size of frame. */
1018 sof = ins + locs + outs;
1021 as_bad ("Size of frame exceeds maximum of 96 registers");
1026 as_warn ("Size of rotating registers exceeds frame size");
1029 md.in.base = REG_GR + 32;
1030 md.loc.base = md.in.base + ins;
1031 md.out.base = md.loc.base + locs;
1033 md.in.num_regs = ins;
1034 md.loc.num_regs = locs;
1035 md.out.num_regs = outs;
1036 md.rot.num_regs = rots;
1043 struct label_fix *lfix;
1045 subsegT saved_subseg;
1048 if (!md.last_text_seg)
1051 saved_seg = now_seg;
1052 saved_subseg = now_subseg;
1054 subseg_set (md.last_text_seg, 0);
1056 while (md.num_slots_in_use > 0)
1057 emit_one_bundle (); /* force out queued instructions */
1059 /* In case there are labels following the last instruction, resolve
1061 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1063 S_SET_VALUE (lfix->sym, frag_now_fix ());
1064 symbol_set_frag (lfix->sym, frag_now);
1066 CURR_SLOT.label_fixups = 0;
1067 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1069 S_SET_VALUE (lfix->sym, frag_now_fix ());
1070 symbol_set_frag (lfix->sym, frag_now);
1072 CURR_SLOT.tag_fixups = 0;
1074 /* In case there are unwind directives following the last instruction,
1075 resolve those now. We only handle prologue, body, and endp directives
1076 here. Give an error for others. */
1077 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1079 switch (ptr->r.type)
1085 ptr->slot_number = (unsigned long) frag_more (0);
1086 ptr->slot_frag = frag_now;
1089 /* Allow any record which doesn't have a "t" field (i.e.,
1090 doesn't relate to a particular instruction). */
1106 as_bad (_("Unwind directive not followed by an instruction."));
1110 unwind.current_entry = NULL;
1112 subseg_set (saved_seg, saved_subseg);
1114 if (md.qp.X_op == O_register)
1115 as_bad ("qualifying predicate not followed by instruction");
1119 ia64_do_align (int nbytes)
1121 char *saved_input_line_pointer = input_line_pointer;
1123 input_line_pointer = "";
1124 s_align_bytes (nbytes);
1125 input_line_pointer = saved_input_line_pointer;
1129 ia64_cons_align (nbytes)
1134 char *saved_input_line_pointer = input_line_pointer;
1135 input_line_pointer = "";
1136 s_align_bytes (nbytes);
1137 input_line_pointer = saved_input_line_pointer;
1141 /* Output COUNT bytes to a memory location. */
1142 static unsigned char *vbyte_mem_ptr = NULL;
1145 output_vbyte_mem (count, ptr, comment)
1148 char *comment ATTRIBUTE_UNUSED;
1151 if (vbyte_mem_ptr == NULL)
1156 for (x = 0; x < count; x++)
1157 *(vbyte_mem_ptr++) = ptr[x];
1160 /* Count the number of bytes required for records. */
1161 static int vbyte_count = 0;
1163 count_output (count, ptr, comment)
1165 char *ptr ATTRIBUTE_UNUSED;
1166 char *comment ATTRIBUTE_UNUSED;
1168 vbyte_count += count;
1172 output_R1_format (f, rtype, rlen)
1174 unw_record_type rtype;
1181 output_R3_format (f, rtype, rlen);
1187 else if (rtype != prologue)
1188 as_bad ("record type is not valid");
1190 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1191 (*f) (1, &byte, NULL);
1195 output_R2_format (f, mask, grsave, rlen)
1202 mask = (mask & 0x0f);
1203 grsave = (grsave & 0x7f);
1205 bytes[0] = (UNW_R2 | (mask >> 1));
1206 bytes[1] = (((mask & 0x01) << 7) | grsave);
1207 count += output_leb128 (bytes + 2, rlen, 0);
1208 (*f) (count, bytes, NULL);
1212 output_R3_format (f, rtype, rlen)
1214 unw_record_type rtype;
1221 output_R1_format (f, rtype, rlen);
1227 else if (rtype != prologue)
1228 as_bad ("record type is not valid");
1229 bytes[0] = (UNW_R3 | r);
1230 count = output_leb128 (bytes + 1, rlen, 0);
1231 (*f) (count + 1, bytes, NULL);
1235 output_P1_format (f, brmask)
1240 byte = UNW_P1 | (brmask & 0x1f);
1241 (*f) (1, &byte, NULL);
1245 output_P2_format (f, brmask, gr)
1251 brmask = (brmask & 0x1f);
1252 bytes[0] = UNW_P2 | (brmask >> 1);
1253 bytes[1] = (((brmask & 1) << 7) | gr);
1254 (*f) (2, bytes, NULL);
1258 output_P3_format (f, rtype, reg)
1260 unw_record_type rtype;
1305 as_bad ("Invalid record type for P3 format.");
1307 bytes[0] = (UNW_P3 | (r >> 1));
1308 bytes[1] = (((r & 1) << 7) | reg);
1309 (*f) (2, bytes, NULL);
1313 output_P4_format (f, imask, imask_size)
1315 unsigned char *imask;
1316 unsigned long imask_size;
1319 (*f) (imask_size, imask, NULL);
1323 output_P5_format (f, grmask, frmask)
1326 unsigned long frmask;
1329 grmask = (grmask & 0x0f);
1332 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1333 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1334 bytes[3] = (frmask & 0x000000ff);
1335 (*f) (4, bytes, NULL);
1339 output_P6_format (f, rtype, rmask)
1341 unw_record_type rtype;
1347 if (rtype == gr_mem)
1349 else if (rtype != fr_mem)
1350 as_bad ("Invalid record type for format P6");
1351 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1352 (*f) (1, &byte, NULL);
1356 output_P7_format (f, rtype, w1, w2)
1358 unw_record_type rtype;
1365 count += output_leb128 (bytes + 1, w1, 0);
1370 count += output_leb128 (bytes + count, w2 >> 4, 0);
1420 bytes[0] = (UNW_P7 | r);
1421 (*f) (count, bytes, NULL);
1425 output_P8_format (f, rtype, t)
1427 unw_record_type rtype;
1466 case bspstore_psprel:
1469 case bspstore_sprel:
1481 case priunat_when_gr:
1484 case priunat_psprel:
1490 case priunat_when_mem:
1497 count += output_leb128 (bytes + 2, t, 0);
1498 (*f) (count, bytes, NULL);
1502 output_P9_format (f, grmask, gr)
1509 bytes[1] = (grmask & 0x0f);
1510 bytes[2] = (gr & 0x7f);
1511 (*f) (3, bytes, NULL);
1515 output_P10_format (f, abi, context)
1522 bytes[1] = (abi & 0xff);
1523 bytes[2] = (context & 0xff);
1524 (*f) (3, bytes, NULL);
1528 output_B1_format (f, rtype, label)
1530 unw_record_type rtype;
1531 unsigned long label;
1537 output_B4_format (f, rtype, label);
1540 if (rtype == copy_state)
1542 else if (rtype != label_state)
1543 as_bad ("Invalid record type for format B1");
1545 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1546 (*f) (1, &byte, NULL);
1550 output_B2_format (f, ecount, t)
1552 unsigned long ecount;
1559 output_B3_format (f, ecount, t);
1562 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1563 count += output_leb128 (bytes + 1, t, 0);
1564 (*f) (count, bytes, NULL);
1568 output_B3_format (f, ecount, t)
1570 unsigned long ecount;
1577 output_B2_format (f, ecount, t);
1581 count += output_leb128 (bytes + 1, t, 0);
1582 count += output_leb128 (bytes + count, ecount, 0);
1583 (*f) (count, bytes, NULL);
1587 output_B4_format (f, rtype, label)
1589 unw_record_type rtype;
1590 unsigned long label;
1597 output_B1_format (f, rtype, label);
1601 if (rtype == copy_state)
1603 else if (rtype != label_state)
1604 as_bad ("Invalid record type for format B1");
1606 bytes[0] = (UNW_B4 | (r << 3));
1607 count += output_leb128 (bytes + 1, label, 0);
1608 (*f) (count, bytes, NULL);
1612 format_ab_reg (ab, reg)
1619 ret = (ab << 5) | reg;
1624 output_X1_format (f, rtype, ab, reg, t, w1)
1626 unw_record_type rtype;
1636 if (rtype == spill_sprel)
1638 else if (rtype != spill_psprel)
1639 as_bad ("Invalid record type for format X1");
1640 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1641 count += output_leb128 (bytes + 2, t, 0);
1642 count += output_leb128 (bytes + count, w1, 0);
1643 (*f) (count, bytes, NULL);
1647 output_X2_format (f, ab, reg, x, y, treg, t)
1656 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1657 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1658 count += output_leb128 (bytes + 3, t, 0);
1659 (*f) (count, bytes, NULL);
1663 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1665 unw_record_type rtype;
1676 if (rtype == spill_sprel_p)
1678 else if (rtype != spill_psprel_p)
1679 as_bad ("Invalid record type for format X3");
1680 bytes[1] = ((r << 7) | (qp & 0x3f));
1681 bytes[2] = format_ab_reg (ab, reg);
1682 count += output_leb128 (bytes + 3, t, 0);
1683 count += output_leb128 (bytes + count, w1, 0);
1684 (*f) (count, bytes, NULL);
1688 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1698 bytes[1] = (qp & 0x3f);
1699 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1700 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1701 count += output_leb128 (bytes + 4, t, 0);
1702 (*f) (count, bytes, NULL);
1705 /* This function allocates a record list structure, and initializes fields. */
1707 static unw_rec_list *
1708 alloc_record (unw_record_type t)
1711 ptr = xmalloc (sizeof (*ptr));
1713 ptr->slot_number = SLOT_NUM_NOT_SET;
1715 ptr->next_slot_number = 0;
1716 ptr->next_slot_frag = 0;
1720 /* Dummy unwind record used for calculating the length of the last prologue or
1723 static unw_rec_list *
1726 unw_rec_list *ptr = alloc_record (endp);
1730 static unw_rec_list *
1733 unw_rec_list *ptr = alloc_record (prologue);
1734 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1738 static unw_rec_list *
1739 output_prologue_gr (saved_mask, reg)
1740 unsigned int saved_mask;
1743 unw_rec_list *ptr = alloc_record (prologue_gr);
1744 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1745 ptr->r.record.r.grmask = saved_mask;
1746 ptr->r.record.r.grsave = reg;
1750 static unw_rec_list *
1753 unw_rec_list *ptr = alloc_record (body);
1757 static unw_rec_list *
1758 output_mem_stack_f (size)
1761 unw_rec_list *ptr = alloc_record (mem_stack_f);
1762 ptr->r.record.p.size = size;
1766 static unw_rec_list *
1767 output_mem_stack_v ()
1769 unw_rec_list *ptr = alloc_record (mem_stack_v);
1773 static unw_rec_list *
1777 unw_rec_list *ptr = alloc_record (psp_gr);
1778 ptr->r.record.p.gr = gr;
1782 static unw_rec_list *
1783 output_psp_sprel (offset)
1784 unsigned int offset;
1786 unw_rec_list *ptr = alloc_record (psp_sprel);
1787 ptr->r.record.p.spoff = offset / 4;
1791 static unw_rec_list *
1794 unw_rec_list *ptr = alloc_record (rp_when);
1798 static unw_rec_list *
1802 unw_rec_list *ptr = alloc_record (rp_gr);
1803 ptr->r.record.p.gr = gr;
1807 static unw_rec_list *
1811 unw_rec_list *ptr = alloc_record (rp_br);
1812 ptr->r.record.p.br = br;
1816 static unw_rec_list *
1817 output_rp_psprel (offset)
1818 unsigned int offset;
1820 unw_rec_list *ptr = alloc_record (rp_psprel);
1821 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1825 static unw_rec_list *
1826 output_rp_sprel (offset)
1827 unsigned int offset;
1829 unw_rec_list *ptr = alloc_record (rp_sprel);
1830 ptr->r.record.p.spoff = offset / 4;
1834 static unw_rec_list *
1837 unw_rec_list *ptr = alloc_record (pfs_when);
1841 static unw_rec_list *
1845 unw_rec_list *ptr = alloc_record (pfs_gr);
1846 ptr->r.record.p.gr = gr;
1850 static unw_rec_list *
1851 output_pfs_psprel (offset)
1852 unsigned int offset;
1854 unw_rec_list *ptr = alloc_record (pfs_psprel);
1855 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1859 static unw_rec_list *
1860 output_pfs_sprel (offset)
1861 unsigned int offset;
1863 unw_rec_list *ptr = alloc_record (pfs_sprel);
1864 ptr->r.record.p.spoff = offset / 4;
1868 static unw_rec_list *
1869 output_preds_when ()
1871 unw_rec_list *ptr = alloc_record (preds_when);
1875 static unw_rec_list *
1876 output_preds_gr (gr)
1879 unw_rec_list *ptr = alloc_record (preds_gr);
1880 ptr->r.record.p.gr = gr;
1884 static unw_rec_list *
1885 output_preds_psprel (offset)
1886 unsigned int offset;
1888 unw_rec_list *ptr = alloc_record (preds_psprel);
1889 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1893 static unw_rec_list *
1894 output_preds_sprel (offset)
1895 unsigned int offset;
1897 unw_rec_list *ptr = alloc_record (preds_sprel);
1898 ptr->r.record.p.spoff = offset / 4;
1902 static unw_rec_list *
1903 output_fr_mem (mask)
1906 unw_rec_list *ptr = alloc_record (fr_mem);
1907 ptr->r.record.p.rmask = mask;
1911 static unw_rec_list *
1912 output_frgr_mem (gr_mask, fr_mask)
1913 unsigned int gr_mask;
1914 unsigned int fr_mask;
1916 unw_rec_list *ptr = alloc_record (frgr_mem);
1917 ptr->r.record.p.grmask = gr_mask;
1918 ptr->r.record.p.frmask = fr_mask;
1922 static unw_rec_list *
1923 output_gr_gr (mask, reg)
1927 unw_rec_list *ptr = alloc_record (gr_gr);
1928 ptr->r.record.p.grmask = mask;
1929 ptr->r.record.p.gr = reg;
1933 static unw_rec_list *
1934 output_gr_mem (mask)
1937 unw_rec_list *ptr = alloc_record (gr_mem);
1938 ptr->r.record.p.rmask = mask;
1942 static unw_rec_list *
1943 output_br_mem (unsigned int mask)
1945 unw_rec_list *ptr = alloc_record (br_mem);
1946 ptr->r.record.p.brmask = mask;
1950 static unw_rec_list *
1951 output_br_gr (save_mask, reg)
1952 unsigned int save_mask;
1955 unw_rec_list *ptr = alloc_record (br_gr);
1956 ptr->r.record.p.brmask = save_mask;
1957 ptr->r.record.p.gr = reg;
1961 static unw_rec_list *
1962 output_spill_base (offset)
1963 unsigned int offset;
1965 unw_rec_list *ptr = alloc_record (spill_base);
1966 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1970 static unw_rec_list *
1973 unw_rec_list *ptr = alloc_record (unat_when);
1977 static unw_rec_list *
1981 unw_rec_list *ptr = alloc_record (unat_gr);
1982 ptr->r.record.p.gr = gr;
1986 static unw_rec_list *
1987 output_unat_psprel (offset)
1988 unsigned int offset;
1990 unw_rec_list *ptr = alloc_record (unat_psprel);
1991 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1995 static unw_rec_list *
1996 output_unat_sprel (offset)
1997 unsigned int offset;
1999 unw_rec_list *ptr = alloc_record (unat_sprel);
2000 ptr->r.record.p.spoff = offset / 4;
2004 static unw_rec_list *
2007 unw_rec_list *ptr = alloc_record (lc_when);
2011 static unw_rec_list *
2015 unw_rec_list *ptr = alloc_record (lc_gr);
2016 ptr->r.record.p.gr = gr;
2020 static unw_rec_list *
2021 output_lc_psprel (offset)
2022 unsigned int offset;
2024 unw_rec_list *ptr = alloc_record (lc_psprel);
2025 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2029 static unw_rec_list *
2030 output_lc_sprel (offset)
2031 unsigned int offset;
2033 unw_rec_list *ptr = alloc_record (lc_sprel);
2034 ptr->r.record.p.spoff = offset / 4;
2038 static unw_rec_list *
2041 unw_rec_list *ptr = alloc_record (fpsr_when);
2045 static unw_rec_list *
2049 unw_rec_list *ptr = alloc_record (fpsr_gr);
2050 ptr->r.record.p.gr = gr;
2054 static unw_rec_list *
2055 output_fpsr_psprel (offset)
2056 unsigned int offset;
2058 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2059 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2063 static unw_rec_list *
2064 output_fpsr_sprel (offset)
2065 unsigned int offset;
2067 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2068 ptr->r.record.p.spoff = offset / 4;
2072 static unw_rec_list *
2073 output_priunat_when_gr ()
2075 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2079 static unw_rec_list *
2080 output_priunat_when_mem ()
2082 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2086 static unw_rec_list *
2087 output_priunat_gr (gr)
2090 unw_rec_list *ptr = alloc_record (priunat_gr);
2091 ptr->r.record.p.gr = gr;
2095 static unw_rec_list *
2096 output_priunat_psprel (offset)
2097 unsigned int offset;
2099 unw_rec_list *ptr = alloc_record (priunat_psprel);
2100 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2104 static unw_rec_list *
2105 output_priunat_sprel (offset)
2106 unsigned int offset;
2108 unw_rec_list *ptr = alloc_record (priunat_sprel);
2109 ptr->r.record.p.spoff = offset / 4;
2113 static unw_rec_list *
2116 unw_rec_list *ptr = alloc_record (bsp_when);
2120 static unw_rec_list *
2124 unw_rec_list *ptr = alloc_record (bsp_gr);
2125 ptr->r.record.p.gr = gr;
2129 static unw_rec_list *
2130 output_bsp_psprel (offset)
2131 unsigned int offset;
2133 unw_rec_list *ptr = alloc_record (bsp_psprel);
2134 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2138 static unw_rec_list *
2139 output_bsp_sprel (offset)
2140 unsigned int offset;
2142 unw_rec_list *ptr = alloc_record (bsp_sprel);
2143 ptr->r.record.p.spoff = offset / 4;
2147 static unw_rec_list *
2148 output_bspstore_when ()
2150 unw_rec_list *ptr = alloc_record (bspstore_when);
2154 static unw_rec_list *
2155 output_bspstore_gr (gr)
2158 unw_rec_list *ptr = alloc_record (bspstore_gr);
2159 ptr->r.record.p.gr = gr;
2163 static unw_rec_list *
2164 output_bspstore_psprel (offset)
2165 unsigned int offset;
2167 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2168 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2172 static unw_rec_list *
2173 output_bspstore_sprel (offset)
2174 unsigned int offset;
2176 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2177 ptr->r.record.p.spoff = offset / 4;
2181 static unw_rec_list *
2184 unw_rec_list *ptr = alloc_record (rnat_when);
2188 static unw_rec_list *
2192 unw_rec_list *ptr = alloc_record (rnat_gr);
2193 ptr->r.record.p.gr = gr;
2197 static unw_rec_list *
2198 output_rnat_psprel (offset)
2199 unsigned int offset;
2201 unw_rec_list *ptr = alloc_record (rnat_psprel);
2202 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2206 static unw_rec_list *
2207 output_rnat_sprel (offset)
2208 unsigned int offset;
2210 unw_rec_list *ptr = alloc_record (rnat_sprel);
2211 ptr->r.record.p.spoff = offset / 4;
2215 static unw_rec_list *
2216 output_unwabi (abi, context)
2218 unsigned long context;
2220 unw_rec_list *ptr = alloc_record (unwabi);
2221 ptr->r.record.p.abi = abi;
2222 ptr->r.record.p.context = context;
2226 static unw_rec_list *
2227 output_epilogue (unsigned long ecount)
2229 unw_rec_list *ptr = alloc_record (epilogue);
2230 ptr->r.record.b.ecount = ecount;
2234 static unw_rec_list *
2235 output_label_state (unsigned long label)
2237 unw_rec_list *ptr = alloc_record (label_state);
2238 ptr->r.record.b.label = label;
2242 static unw_rec_list *
2243 output_copy_state (unsigned long label)
2245 unw_rec_list *ptr = alloc_record (copy_state);
2246 ptr->r.record.b.label = label;
2250 static unw_rec_list *
2251 output_spill_psprel (ab, reg, offset)
2254 unsigned int offset;
2256 unw_rec_list *ptr = alloc_record (spill_psprel);
2257 ptr->r.record.x.ab = ab;
2258 ptr->r.record.x.reg = reg;
2259 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2263 static unw_rec_list *
2264 output_spill_sprel (ab, reg, offset)
2267 unsigned int offset;
2269 unw_rec_list *ptr = alloc_record (spill_sprel);
2270 ptr->r.record.x.ab = ab;
2271 ptr->r.record.x.reg = reg;
2272 ptr->r.record.x.spoff = offset / 4;
2276 static unw_rec_list *
2277 output_spill_psprel_p (ab, reg, offset, predicate)
2280 unsigned int offset;
2281 unsigned int predicate;
2283 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2284 ptr->r.record.x.ab = ab;
2285 ptr->r.record.x.reg = reg;
2286 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2287 ptr->r.record.x.qp = predicate;
2291 static unw_rec_list *
2292 output_spill_sprel_p (ab, reg, offset, predicate)
2295 unsigned int offset;
2296 unsigned int predicate;
2298 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2299 ptr->r.record.x.ab = ab;
2300 ptr->r.record.x.reg = reg;
2301 ptr->r.record.x.spoff = offset / 4;
2302 ptr->r.record.x.qp = predicate;
2306 static unw_rec_list *
2307 output_spill_reg (ab, reg, targ_reg, xy)
2310 unsigned int targ_reg;
2313 unw_rec_list *ptr = alloc_record (spill_reg);
2314 ptr->r.record.x.ab = ab;
2315 ptr->r.record.x.reg = reg;
2316 ptr->r.record.x.treg = targ_reg;
2317 ptr->r.record.x.xy = xy;
2321 static unw_rec_list *
2322 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2325 unsigned int targ_reg;
2327 unsigned int predicate;
2329 unw_rec_list *ptr = alloc_record (spill_reg_p);
2330 ptr->r.record.x.ab = ab;
2331 ptr->r.record.x.reg = reg;
2332 ptr->r.record.x.treg = targ_reg;
2333 ptr->r.record.x.xy = xy;
2334 ptr->r.record.x.qp = predicate;
2338 /* Given a unw_rec_list process the correct format with the
2339 specified function. */
2342 process_one_record (ptr, f)
2346 unsigned long fr_mask, gr_mask;
2348 switch (ptr->r.type)
2350 /* This is a dummy record that takes up no space in the output. */
2358 /* These are taken care of by prologue/prologue_gr. */
2363 if (ptr->r.type == prologue_gr)
2364 output_R2_format (f, ptr->r.record.r.grmask,
2365 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2367 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2369 /* Output descriptor(s) for union of register spills (if any). */
2370 gr_mask = ptr->r.record.r.mask.gr_mem;
2371 fr_mask = ptr->r.record.r.mask.fr_mem;
2374 if ((fr_mask & ~0xfUL) == 0)
2375 output_P6_format (f, fr_mem, fr_mask);
2378 output_P5_format (f, gr_mask, fr_mask);
2383 output_P6_format (f, gr_mem, gr_mask);
2384 if (ptr->r.record.r.mask.br_mem)
2385 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2387 /* output imask descriptor if necessary: */
2388 if (ptr->r.record.r.mask.i)
2389 output_P4_format (f, ptr->r.record.r.mask.i,
2390 ptr->r.record.r.imask_size);
2394 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2398 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2399 ptr->r.record.p.size);
2412 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2415 output_P3_format (f, rp_br, ptr->r.record.p.br);
2418 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2426 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2435 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2445 case bspstore_sprel:
2447 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2450 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2453 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2456 as_bad ("spill_mask record unimplemented.");
2458 case priunat_when_gr:
2459 case priunat_when_mem:
2463 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2465 case priunat_psprel:
2467 case bspstore_psprel:
2469 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2472 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2475 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2479 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2482 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2483 ptr->r.record.x.reg, ptr->r.record.x.t,
2484 ptr->r.record.x.pspoff);
2487 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2488 ptr->r.record.x.reg, ptr->r.record.x.t,
2489 ptr->r.record.x.spoff);
2492 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2493 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2494 ptr->r.record.x.treg, ptr->r.record.x.t);
2496 case spill_psprel_p:
2497 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2498 ptr->r.record.x.ab, ptr->r.record.x.reg,
2499 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2502 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2503 ptr->r.record.x.ab, ptr->r.record.x.reg,
2504 ptr->r.record.x.t, ptr->r.record.x.spoff);
2507 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2508 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2509 ptr->r.record.x.xy, ptr->r.record.x.treg,
2513 as_bad ("record_type_not_valid");
2518 /* Given a unw_rec_list list, process all the records with
2519 the specified function. */
2521 process_unw_records (list, f)
2526 for (ptr = list; ptr; ptr = ptr->next)
2527 process_one_record (ptr, f);
2530 /* Determine the size of a record list in bytes. */
2532 calc_record_size (list)
2536 process_unw_records (list, count_output);
2540 /* Update IMASK bitmask to reflect the fact that one or more registers
2541 of type TYPE are saved starting at instruction with index T. If N
2542 bits are set in REGMASK, it is assumed that instructions T through
2543 T+N-1 save these registers.
2547 1: instruction saves next fp reg
2548 2: instruction saves next general reg
2549 3: instruction saves next branch reg */
2551 set_imask (region, regmask, t, type)
2552 unw_rec_list *region;
2553 unsigned long regmask;
2557 unsigned char *imask;
2558 unsigned long imask_size;
2562 imask = region->r.record.r.mask.i;
2563 imask_size = region->r.record.r.imask_size;
2566 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2567 imask = xmalloc (imask_size);
2568 memset (imask, 0, imask_size);
2570 region->r.record.r.imask_size = imask_size;
2571 region->r.record.r.mask.i = imask;
2575 pos = 2 * (3 - t % 4);
2578 if (i >= imask_size)
2580 as_bad ("Ignoring attempt to spill beyond end of region");
2584 imask[i] |= (type & 0x3) << pos;
2586 regmask &= (regmask - 1);
2596 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2597 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2598 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2602 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2603 unsigned long slot_addr;
2605 unsigned long first_addr;
2609 unsigned long index = 0;
2611 /* First time we are called, the initial address and frag are invalid. */
2612 if (first_addr == 0)
2615 /* If the two addresses are in different frags, then we need to add in
2616 the remaining size of this frag, and then the entire size of intermediate
2618 while (slot_frag != first_frag)
2620 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2624 /* We can get the final addresses only during and after
2626 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2627 index += 3 * ((first_frag->fr_next->fr_address
2628 - first_frag->fr_address
2629 - first_frag->fr_fix) >> 4);
2632 /* We don't know what the final addresses will be. We try our
2633 best to estimate. */
2634 switch (first_frag->fr_type)
2640 as_fatal ("only constant space allocation is supported");
2646 /* Take alignment into account. Assume the worst case
2647 before relaxation. */
2648 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2652 if (first_frag->fr_symbol)
2654 as_fatal ("only constant offsets are supported");
2658 index += 3 * (first_frag->fr_offset >> 4);
2662 /* Add in the full size of the frag converted to instruction slots. */
2663 index += 3 * (first_frag->fr_fix >> 4);
2664 /* Subtract away the initial part before first_addr. */
2665 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2666 + ((first_addr & 0x3) - (start_addr & 0x3)));
2668 /* Move to the beginning of the next frag. */
2669 first_frag = first_frag->fr_next;
2670 first_addr = (unsigned long) &first_frag->fr_literal;
2673 /* Add in the used part of the last frag. */
2674 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2675 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2679 /* Optimize unwind record directives. */
2681 static unw_rec_list *
2682 optimize_unw_records (list)
2688 /* If the only unwind record is ".prologue" or ".prologue" followed
2689 by ".body", then we can optimize the unwind directives away. */
2690 if (list->r.type == prologue
2691 && (list->next->r.type == endp
2692 || (list->next->r.type == body && list->next->next->r.type == endp)))
2698 /* Given a complete record list, process any records which have
2699 unresolved fields, (ie length counts for a prologue). After
2700 this has been run, all necessary information should be available
2701 within each record to generate an image. */
2704 fixup_unw_records (list, before_relax)
2708 unw_rec_list *ptr, *region = 0;
2709 unsigned long first_addr = 0, rlen = 0, t;
2710 fragS *first_frag = 0;
2712 for (ptr = list; ptr; ptr = ptr->next)
2714 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2715 as_bad (" Insn slot not set in unwind record.");
2716 t = slot_index (ptr->slot_number, ptr->slot_frag,
2717 first_addr, first_frag, before_relax);
2718 switch (ptr->r.type)
2726 unsigned long last_addr = 0;
2727 fragS *last_frag = NULL;
2729 first_addr = ptr->slot_number;
2730 first_frag = ptr->slot_frag;
2731 /* Find either the next body/prologue start, or the end of
2732 the function, and determine the size of the region. */
2733 for (last = ptr->next; last != NULL; last = last->next)
2734 if (last->r.type == prologue || last->r.type == prologue_gr
2735 || last->r.type == body || last->r.type == endp)
2737 last_addr = last->slot_number;
2738 last_frag = last->slot_frag;
2741 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2743 rlen = ptr->r.record.r.rlen = size;
2744 if (ptr->r.type == body)
2745 /* End of region. */
2753 ptr->r.record.b.t = rlen - 1 - t;
2755 /* This happens when a memory-stack-less procedure uses a
2756 ".restore sp" directive at the end of a region to pop
2758 ptr->r.record.b.t = 0;
2769 case priunat_when_gr:
2770 case priunat_when_mem:
2774 ptr->r.record.p.t = t;
2782 case spill_psprel_p:
2783 ptr->r.record.x.t = t;
2789 as_bad ("frgr_mem record before region record!");
2792 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2793 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2794 set_imask (region, ptr->r.record.p.frmask, t, 1);
2795 set_imask (region, ptr->r.record.p.grmask, t, 2);
2800 as_bad ("fr_mem record before region record!");
2803 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2804 set_imask (region, ptr->r.record.p.rmask, t, 1);
2809 as_bad ("gr_mem record before region record!");
2812 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2813 set_imask (region, ptr->r.record.p.rmask, t, 2);
2818 as_bad ("br_mem record before region record!");
2821 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2822 set_imask (region, ptr->r.record.p.brmask, t, 3);
2828 as_bad ("gr_gr record before region record!");
2831 set_imask (region, ptr->r.record.p.grmask, t, 2);
2836 as_bad ("br_gr record before region record!");
2839 set_imask (region, ptr->r.record.p.brmask, t, 3);
2848 /* Estimate the size of a frag before relaxing. We only have one type of frag
2849 to handle here, which is the unwind info frag. */
2852 ia64_estimate_size_before_relax (fragS *frag,
2853 asection *segtype ATTRIBUTE_UNUSED)
2858 /* ??? This code is identical to the first part of ia64_convert_frag. */
2859 list = (unw_rec_list *) frag->fr_opcode;
2860 fixup_unw_records (list, 0);
2862 len = calc_record_size (list);
2863 /* pad to pointer-size boundary. */
2864 pad = len % md.pointer_size;
2866 len += md.pointer_size - pad;
2867 /* Add 8 for the header. */
2869 /* Add a pointer for the personality offset. */
2870 if (frag->fr_offset)
2871 size += md.pointer_size;
2873 /* fr_var carries the max_chars that we created the fragment with.
2874 We must, of course, have allocated enough memory earlier. */
2875 assert (frag->fr_var >= size);
2877 return frag->fr_fix + size;
2880 /* This function converts a rs_machine_dependent variant frag into a
2881 normal fill frag with the unwind image from the the record list. */
2883 ia64_convert_frag (fragS *frag)
2889 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2890 list = (unw_rec_list *) frag->fr_opcode;
2891 fixup_unw_records (list, 0);
2893 len = calc_record_size (list);
2894 /* pad to pointer-size boundary. */
2895 pad = len % md.pointer_size;
2897 len += md.pointer_size - pad;
2898 /* Add 8 for the header. */
2900 /* Add a pointer for the personality offset. */
2901 if (frag->fr_offset)
2902 size += md.pointer_size;
2904 /* fr_var carries the max_chars that we created the fragment with.
2905 We must, of course, have allocated enough memory earlier. */
2906 assert (frag->fr_var >= size);
2908 /* Initialize the header area. fr_offset is initialized with
2909 unwind.personality_routine. */
2910 if (frag->fr_offset)
2912 if (md.flags & EF_IA_64_ABI64)
2913 flag_value = (bfd_vma) 3 << 32;
2915 /* 32-bit unwind info block. */
2916 flag_value = (bfd_vma) 0x1003 << 32;
2921 md_number_to_chars (frag->fr_literal,
2922 (((bfd_vma) 1 << 48) /* Version. */
2923 | flag_value /* U & E handler flags. */
2924 | (len / md.pointer_size)), /* Length. */
2927 /* Skip the header. */
2928 vbyte_mem_ptr = frag->fr_literal + 8;
2929 process_unw_records (list, output_vbyte_mem);
2931 /* Fill the padding bytes with zeros. */
2933 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2934 md.pointer_size - pad);
2936 frag->fr_fix += size;
2937 frag->fr_type = rs_fill;
2939 frag->fr_offset = 0;
2943 convert_expr_to_ab_reg (e, ab, regp)
2950 if (e->X_op != O_register)
2953 reg = e->X_add_number;
2954 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2957 *regp = reg - REG_GR;
2959 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2960 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2963 *regp = reg - REG_FR;
2965 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2968 *regp = reg - REG_BR;
2975 case REG_PR: *regp = 0; break;
2976 case REG_PSP: *regp = 1; break;
2977 case REG_PRIUNAT: *regp = 2; break;
2978 case REG_BR + 0: *regp = 3; break;
2979 case REG_AR + AR_BSP: *regp = 4; break;
2980 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2981 case REG_AR + AR_RNAT: *regp = 6; break;
2982 case REG_AR + AR_UNAT: *regp = 7; break;
2983 case REG_AR + AR_FPSR: *regp = 8; break;
2984 case REG_AR + AR_PFS: *regp = 9; break;
2985 case REG_AR + AR_LC: *regp = 10; break;
2995 convert_expr_to_xy_reg (e, xy, regp)
3002 if (e->X_op != O_register)
3005 reg = e->X_add_number;
3007 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3010 *regp = reg - REG_GR;
3012 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3015 *regp = reg - REG_FR;
3017 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3020 *regp = reg - REG_BR;
3030 /* The current frag is an alignment frag. */
3031 align_frag = frag_now;
3032 s_align_bytes (arg);
3037 int dummy ATTRIBUTE_UNUSED;
3042 radix = *input_line_pointer++;
3044 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3046 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3047 ignore_rest_of_line ();
3052 /* Helper function for .loc directives. If the assembler is not generating
3053 line number info, then we need to remember which instructions have a .loc
3054 directive, and only call dwarf2_gen_line_info for those instructions. */
3059 CURR_SLOT.loc_directive_seen = 1;
3060 dwarf2_directive_loc (x);
3063 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3065 dot_special_section (which)
3068 set_section ((char *) special_section_name[which]);
3072 in_procedure (const char *directive)
3074 if (unwind.proc_start
3075 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3077 as_bad (".%s outside of procedure", directive);
3078 ignore_rest_of_line ();
3083 in_prologue (const char *directive)
3085 if (in_procedure (directive))
3087 if (unwind.prologue)
3089 as_bad (".%s outside of prologue", directive);
3090 ignore_rest_of_line ();
3096 in_body (const char *directive)
3098 if (in_procedure (directive))
3102 as_bad (".%s outside of body region", directive);
3103 ignore_rest_of_line ();
3109 add_unwind_entry (ptr)
3113 unwind.tail->next = ptr;
3118 /* The current entry can in fact be a chain of unwind entries. */
3119 if (unwind.current_entry == NULL)
3120 unwind.current_entry = ptr;
3125 int dummy ATTRIBUTE_UNUSED;
3129 if (!in_prologue ("fframe"))
3134 if (e.X_op != O_constant)
3135 as_bad ("Operand to .fframe must be a constant");
3137 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3142 int dummy ATTRIBUTE_UNUSED;
3147 if (!in_prologue ("vframe"))
3151 reg = e.X_add_number - REG_GR;
3152 if (e.X_op == O_register && reg < 128)
3154 add_unwind_entry (output_mem_stack_v ());
3155 if (! (unwind.prologue_mask & 2))
3156 add_unwind_entry (output_psp_gr (reg));
3159 as_bad ("First operand to .vframe must be a general register");
3163 dot_vframesp (dummy)
3164 int dummy ATTRIBUTE_UNUSED;
3168 if (!in_prologue ("vframesp"))
3172 if (e.X_op == O_constant)
3174 add_unwind_entry (output_mem_stack_v ());
3175 add_unwind_entry (output_psp_sprel (e.X_add_number));
3178 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3182 dot_vframepsp (dummy)
3183 int dummy ATTRIBUTE_UNUSED;
3187 if (!in_prologue ("vframepsp"))
3191 if (e.X_op == O_constant)
3193 add_unwind_entry (output_mem_stack_v ());
3194 add_unwind_entry (output_psp_sprel (e.X_add_number));
3197 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3202 int dummy ATTRIBUTE_UNUSED;
3208 if (!in_prologue ("save"))
3211 sep = parse_operand (&e1);
3213 as_bad ("No second operand to .save");
3214 sep = parse_operand (&e2);
3216 reg1 = e1.X_add_number;
3217 reg2 = e2.X_add_number - REG_GR;
3219 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3220 if (e1.X_op == O_register)
3222 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3226 case REG_AR + AR_BSP:
3227 add_unwind_entry (output_bsp_when ());
3228 add_unwind_entry (output_bsp_gr (reg2));
3230 case REG_AR + AR_BSPSTORE:
3231 add_unwind_entry (output_bspstore_when ());
3232 add_unwind_entry (output_bspstore_gr (reg2));
3234 case REG_AR + AR_RNAT:
3235 add_unwind_entry (output_rnat_when ());
3236 add_unwind_entry (output_rnat_gr (reg2));
3238 case REG_AR + AR_UNAT:
3239 add_unwind_entry (output_unat_when ());
3240 add_unwind_entry (output_unat_gr (reg2));
3242 case REG_AR + AR_FPSR:
3243 add_unwind_entry (output_fpsr_when ());
3244 add_unwind_entry (output_fpsr_gr (reg2));
3246 case REG_AR + AR_PFS:
3247 add_unwind_entry (output_pfs_when ());
3248 if (! (unwind.prologue_mask & 4))
3249 add_unwind_entry (output_pfs_gr (reg2));
3251 case REG_AR + AR_LC:
3252 add_unwind_entry (output_lc_when ());
3253 add_unwind_entry (output_lc_gr (reg2));
3256 add_unwind_entry (output_rp_when ());
3257 if (! (unwind.prologue_mask & 8))
3258 add_unwind_entry (output_rp_gr (reg2));
3261 add_unwind_entry (output_preds_when ());
3262 if (! (unwind.prologue_mask & 1))
3263 add_unwind_entry (output_preds_gr (reg2));
3266 add_unwind_entry (output_priunat_when_gr ());
3267 add_unwind_entry (output_priunat_gr (reg2));
3270 as_bad ("First operand not a valid register");
3274 as_bad (" Second operand not a valid register");
3277 as_bad ("First operand not a register");
3282 int dummy ATTRIBUTE_UNUSED;
3285 unsigned long ecount; /* # of _additional_ regions to pop */
3288 if (!in_body ("restore"))
3291 sep = parse_operand (&e1);
3292 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3294 as_bad ("First operand to .restore must be stack pointer (sp)");
3300 parse_operand (&e2);
3301 if (e2.X_op != O_constant || e2.X_add_number < 0)
3303 as_bad ("Second operand to .restore must be a constant >= 0");
3306 ecount = e2.X_add_number;
3309 ecount = unwind.prologue_count - 1;
3311 if (ecount >= unwind.prologue_count)
3313 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3314 ecount + 1, unwind.prologue_count);
3318 add_unwind_entry (output_epilogue (ecount));
3320 if (ecount < unwind.prologue_count)
3321 unwind.prologue_count -= ecount + 1;
3323 unwind.prologue_count = 0;
3327 dot_restorereg (dummy)
3328 int dummy ATTRIBUTE_UNUSED;
3330 unsigned int ab, reg;
3333 if (!in_procedure ("restorereg"))
3338 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3340 as_bad ("First operand to .restorereg must be a preserved register");
3343 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3347 dot_restorereg_p (dummy)
3348 int dummy ATTRIBUTE_UNUSED;
3350 unsigned int qp, ab, reg;
3354 if (!in_procedure ("restorereg.p"))
3357 sep = parse_operand (&e1);
3360 as_bad ("No second operand to .restorereg.p");
3364 parse_operand (&e2);
3366 qp = e1.X_add_number - REG_P;
3367 if (e1.X_op != O_register || qp > 63)
3369 as_bad ("First operand to .restorereg.p must be a predicate");
3373 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3375 as_bad ("Second operand to .restorereg.p must be a preserved register");
3378 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3381 static char *special_linkonce_name[] =
3383 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3387 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3390 Use a slightly ugly scheme to derive the unwind section names from
3391 the text section name:
3393 text sect. unwind table sect.
3394 name: name: comments:
3395 ---------- ----------------- --------------------------------
3397 .text.foo .IA_64.unwind.text.foo
3398 .foo .IA_64.unwind.foo
3400 .gnu.linkonce.ia64unw.foo
3401 _info .IA_64.unwind_info gas issues error message (ditto)
3402 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3404 This mapping is done so that:
3406 (a) An object file with unwind info only in .text will use
3407 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3408 This follows the letter of the ABI and also ensures backwards
3409 compatibility with older toolchains.
3411 (b) An object file with unwind info in multiple text sections
3412 will use separate unwind sections for each text section.
3413 This allows us to properly set the "sh_info" and "sh_link"
3414 fields in SHT_IA_64_UNWIND as required by the ABI and also
3415 lets GNU ld support programs with multiple segments
3416 containing unwind info (as might be the case for certain
3417 embedded applications).
3419 (c) An error is issued if there would be a name clash.
3422 const char *text_name, *sec_text_name;
3424 const char *prefix = special_section_name [sec_index];
3426 size_t prefix_len, suffix_len, sec_name_len;
3428 sec_text_name = segment_name (text_seg);
3429 text_name = sec_text_name;
3430 if (strncmp (text_name, "_info", 5) == 0)
3432 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3434 ignore_rest_of_line ();
3437 if (strcmp (text_name, ".text") == 0)
3440 /* Build the unwind section name by appending the (possibly stripped)
3441 text section name to the unwind prefix. */
3443 if (strncmp (text_name, ".gnu.linkonce.t.",
3444 sizeof (".gnu.linkonce.t.") - 1) == 0)
3446 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3447 suffix += sizeof (".gnu.linkonce.t.") - 1;
3449 else if (linkonce_empty)
3452 prefix_len = strlen (prefix);
3453 suffix_len = strlen (suffix);
3454 sec_name_len = prefix_len + suffix_len;
3455 sec_name = alloca (sec_name_len + 1);
3456 memcpy (sec_name, prefix, prefix_len);
3457 memcpy (sec_name + prefix_len, suffix, suffix_len);
3458 sec_name [sec_name_len] = '\0';
3460 /* Handle COMDAT group. */
3461 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3464 size_t len, group_name_len;
3465 const char *group_name = elf_group_name (text_seg);
3467 if (group_name == NULL)
3469 as_bad ("Group section `%s' has no group signature",
3471 ignore_rest_of_line ();
3474 /* We have to construct a fake section directive. */
3475 group_name_len = strlen (group_name);
3477 + 16 /* ,"aG",@progbits, */
3478 + group_name_len /* ,group_name */
3481 section = alloca (len + 1);
3482 memcpy (section, sec_name, sec_name_len);
3483 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3484 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3485 memcpy (section + len - 7, ",comdat", 7);
3486 section [len] = '\0';
3487 set_section (section);
3491 set_section (sec_name);
3492 bfd_set_section_flags (stdoutput, now_seg,
3493 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3496 elf_linked_to_section (now_seg) = text_seg;
3500 generate_unwind_image (const segT text_seg)
3505 /* Mark the end of the unwind info, so that we can compute the size of the
3506 last unwind region. */
3507 add_unwind_entry (output_endp ());
3509 /* Force out pending instructions, to make sure all unwind records have
3510 a valid slot_number field. */
3511 ia64_flush_insns ();
3513 /* Generate the unwind record. */
3514 list = optimize_unw_records (unwind.list);
3515 fixup_unw_records (list, 1);
3516 size = calc_record_size (list);
3518 if (size > 0 || unwind.force_unwind_entry)
3520 unwind.force_unwind_entry = 0;
3521 /* pad to pointer-size boundary. */
3522 pad = size % md.pointer_size;
3524 size += md.pointer_size - pad;
3525 /* Add 8 for the header. */
3527 /* Add a pointer for the personality offset. */
3528 if (unwind.personality_routine)
3529 size += md.pointer_size;
3532 /* If there are unwind records, switch sections, and output the info. */
3536 bfd_reloc_code_real_type reloc;
3538 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3540 /* Make sure the section has 4 byte alignment for ILP32 and
3541 8 byte alignment for LP64. */
3542 frag_align (md.pointer_size_shift, 0, 0);
3543 record_alignment (now_seg, md.pointer_size_shift);
3545 /* Set expression which points to start of unwind descriptor area. */
3546 unwind.info = expr_build_dot ();
3548 frag_var (rs_machine_dependent, size, size, 0, 0,
3549 (offsetT) (long) unwind.personality_routine,
3552 /* Add the personality address to the image. */
3553 if (unwind.personality_routine != 0)
3555 exp.X_op = O_symbol;
3556 exp.X_add_symbol = unwind.personality_routine;
3557 exp.X_add_number = 0;
3559 if (md.flags & EF_IA_64_BE)
3561 if (md.flags & EF_IA_64_ABI64)
3562 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3564 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3568 if (md.flags & EF_IA_64_ABI64)
3569 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3571 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3574 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3575 md.pointer_size, &exp, 0, reloc);
3576 unwind.personality_routine = 0;
3580 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3582 free_saved_prologue_counts ();
3583 unwind.list = unwind.tail = unwind.current_entry = NULL;
3587 dot_handlerdata (dummy)
3588 int dummy ATTRIBUTE_UNUSED;
3590 if (!in_procedure ("handlerdata"))
3592 unwind.force_unwind_entry = 1;
3594 /* Remember which segment we're in so we can switch back after .endp */
3595 unwind.saved_text_seg = now_seg;
3596 unwind.saved_text_subseg = now_subseg;
3598 /* Generate unwind info into unwind-info section and then leave that
3599 section as the currently active one so dataXX directives go into
3600 the language specific data area of the unwind info block. */
3601 generate_unwind_image (now_seg);
3602 demand_empty_rest_of_line ();
3606 dot_unwentry (dummy)
3607 int dummy ATTRIBUTE_UNUSED;
3609 if (!in_procedure ("unwentry"))
3611 unwind.force_unwind_entry = 1;
3612 demand_empty_rest_of_line ();
3617 int dummy ATTRIBUTE_UNUSED;
3622 if (!in_prologue ("altrp"))
3626 reg = e.X_add_number - REG_BR;
3627 if (e.X_op == O_register && reg < 8)
3628 add_unwind_entry (output_rp_br (reg));
3630 as_bad ("First operand not a valid branch register");
3634 dot_savemem (psprel)
3641 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3644 sep = parse_operand (&e1);
3646 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3647 sep = parse_operand (&e2);
3649 reg1 = e1.X_add_number;
3650 val = e2.X_add_number;
3652 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3653 if (e1.X_op == O_register)
3655 if (e2.X_op == O_constant)
3659 case REG_AR + AR_BSP:
3660 add_unwind_entry (output_bsp_when ());
3661 add_unwind_entry ((psprel
3663 : output_bsp_sprel) (val));
3665 case REG_AR + AR_BSPSTORE:
3666 add_unwind_entry (output_bspstore_when ());
3667 add_unwind_entry ((psprel
3668 ? output_bspstore_psprel
3669 : output_bspstore_sprel) (val));
3671 case REG_AR + AR_RNAT:
3672 add_unwind_entry (output_rnat_when ());
3673 add_unwind_entry ((psprel
3674 ? output_rnat_psprel
3675 : output_rnat_sprel) (val));
3677 case REG_AR + AR_UNAT:
3678 add_unwind_entry (output_unat_when ());
3679 add_unwind_entry ((psprel
3680 ? output_unat_psprel
3681 : output_unat_sprel) (val));
3683 case REG_AR + AR_FPSR:
3684 add_unwind_entry (output_fpsr_when ());
3685 add_unwind_entry ((psprel
3686 ? output_fpsr_psprel
3687 : output_fpsr_sprel) (val));
3689 case REG_AR + AR_PFS:
3690 add_unwind_entry (output_pfs_when ());
3691 add_unwind_entry ((psprel
3693 : output_pfs_sprel) (val));
3695 case REG_AR + AR_LC:
3696 add_unwind_entry (output_lc_when ());
3697 add_unwind_entry ((psprel
3699 : output_lc_sprel) (val));
3702 add_unwind_entry (output_rp_when ());
3703 add_unwind_entry ((psprel
3705 : output_rp_sprel) (val));
3708 add_unwind_entry (output_preds_when ());
3709 add_unwind_entry ((psprel
3710 ? output_preds_psprel
3711 : output_preds_sprel) (val));
3714 add_unwind_entry (output_priunat_when_mem ());
3715 add_unwind_entry ((psprel
3716 ? output_priunat_psprel
3717 : output_priunat_sprel) (val));
3720 as_bad ("First operand not a valid register");
3724 as_bad (" Second operand not a valid constant");
3727 as_bad ("First operand not a register");
3732 int dummy ATTRIBUTE_UNUSED;
3737 if (!in_prologue ("save.g"))
3740 sep = parse_operand (&e1);
3742 parse_operand (&e2);
3744 if (e1.X_op != O_constant)
3745 as_bad ("First operand to .save.g must be a constant.");
3748 int grmask = e1.X_add_number;
3750 add_unwind_entry (output_gr_mem (grmask));
3753 int reg = e2.X_add_number - REG_GR;
3754 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3755 add_unwind_entry (output_gr_gr (grmask, reg));
3757 as_bad ("Second operand is an invalid register.");
3764 int dummy ATTRIBUTE_UNUSED;
3769 if (!in_prologue ("save.f"))
3772 sep = parse_operand (&e1);
3774 if (e1.X_op != O_constant)
3775 as_bad ("Operand to .save.f must be a constant.");
3777 add_unwind_entry (output_fr_mem (e1.X_add_number));
3782 int dummy ATTRIBUTE_UNUSED;
3789 if (!in_prologue ("save.b"))
3792 sep = parse_operand (&e1);
3793 if (e1.X_op != O_constant)
3795 as_bad ("First operand to .save.b must be a constant.");
3798 brmask = e1.X_add_number;
3802 sep = parse_operand (&e2);
3803 reg = e2.X_add_number - REG_GR;
3804 if (e2.X_op != O_register || reg > 127)
3806 as_bad ("Second operand to .save.b must be a general register.");
3809 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3812 add_unwind_entry (output_br_mem (brmask));
3814 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3815 demand_empty_rest_of_line ();
3820 int dummy ATTRIBUTE_UNUSED;
3825 if (!in_prologue ("save.gf"))
3828 sep = parse_operand (&e1);
3830 parse_operand (&e2);
3832 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3833 as_bad ("Both operands of .save.gf must be constants.");
3836 int grmask = e1.X_add_number;
3837 int frmask = e2.X_add_number;
3838 add_unwind_entry (output_frgr_mem (grmask, frmask));
3844 int dummy ATTRIBUTE_UNUSED;
3849 if (!in_prologue ("spill"))
3852 sep = parse_operand (&e);
3853 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3854 demand_empty_rest_of_line ();
3856 if (e.X_op != O_constant)
3857 as_bad ("Operand to .spill must be a constant");
3859 add_unwind_entry (output_spill_base (e.X_add_number));
3863 dot_spillreg (dummy)
3864 int dummy ATTRIBUTE_UNUSED;
3866 int sep, ab, xy, reg, treg;
3869 if (!in_procedure ("spillreg"))
3872 sep = parse_operand (&e1);
3875 as_bad ("No second operand to .spillreg");
3879 parse_operand (&e2);
3881 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3883 as_bad ("First operand to .spillreg must be a preserved register");
3887 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3889 as_bad ("Second operand to .spillreg must be a register");
3893 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3897 dot_spillmem (psprel)
3903 if (!in_procedure ("spillmem"))
3906 sep = parse_operand (&e1);
3909 as_bad ("Second operand missing");
3913 parse_operand (&e2);
3915 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3917 as_bad ("First operand to .spill%s must be a preserved register",
3918 psprel ? "psp" : "sp");
3922 if (e2.X_op != O_constant)
3924 as_bad ("Second operand to .spill%s must be a constant",
3925 psprel ? "psp" : "sp");
3930 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3932 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3936 dot_spillreg_p (dummy)
3937 int dummy ATTRIBUTE_UNUSED;
3939 int sep, ab, xy, reg, treg;
3940 expressionS e1, e2, e3;
3943 if (!in_procedure ("spillreg.p"))
3946 sep = parse_operand (&e1);
3949 as_bad ("No second and third operand to .spillreg.p");
3953 sep = parse_operand (&e2);
3956 as_bad ("No third operand to .spillreg.p");
3960 parse_operand (&e3);
3962 qp = e1.X_add_number - REG_P;
3964 if (e1.X_op != O_register || qp > 63)
3966 as_bad ("First operand to .spillreg.p must be a predicate");
3970 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3972 as_bad ("Second operand to .spillreg.p must be a preserved register");
3976 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3978 as_bad ("Third operand to .spillreg.p must be a register");
3982 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3986 dot_spillmem_p (psprel)
3989 expressionS e1, e2, e3;
3993 if (!in_procedure ("spillmem.p"))
3996 sep = parse_operand (&e1);
3999 as_bad ("Second operand missing");
4003 parse_operand (&e2);
4006 as_bad ("Second operand missing");
4010 parse_operand (&e3);
4012 qp = e1.X_add_number - REG_P;
4013 if (e1.X_op != O_register || qp > 63)
4015 as_bad ("First operand to .spill%s_p must be a predicate",
4016 psprel ? "psp" : "sp");
4020 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4022 as_bad ("Second operand to .spill%s_p must be a preserved register",
4023 psprel ? "psp" : "sp");
4027 if (e3.X_op != O_constant)
4029 as_bad ("Third operand to .spill%s_p must be a constant",
4030 psprel ? "psp" : "sp");
4035 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4037 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4041 get_saved_prologue_count (lbl)
4044 label_prologue_count *lpc = unwind.saved_prologue_counts;
4046 while (lpc != NULL && lpc->label_number != lbl)
4050 return lpc->prologue_count;
4052 as_bad ("Missing .label_state %ld", lbl);
4057 save_prologue_count (lbl, count)
4061 label_prologue_count *lpc = unwind.saved_prologue_counts;
4063 while (lpc != NULL && lpc->label_number != lbl)
4067 lpc->prologue_count = count;
4070 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4072 new_lpc->next = unwind.saved_prologue_counts;
4073 new_lpc->label_number = lbl;
4074 new_lpc->prologue_count = count;
4075 unwind.saved_prologue_counts = new_lpc;
4080 free_saved_prologue_counts ()
4082 label_prologue_count *lpc = unwind.saved_prologue_counts;
4083 label_prologue_count *next;
4092 unwind.saved_prologue_counts = NULL;
4096 dot_label_state (dummy)
4097 int dummy ATTRIBUTE_UNUSED;
4101 if (!in_body ("label_state"))
4105 if (e.X_op != O_constant)
4107 as_bad ("Operand to .label_state must be a constant");
4110 add_unwind_entry (output_label_state (e.X_add_number));
4111 save_prologue_count (e.X_add_number, unwind.prologue_count);
4115 dot_copy_state (dummy)
4116 int dummy ATTRIBUTE_UNUSED;
4120 if (!in_body ("copy_state"))
4124 if (e.X_op != O_constant)
4126 as_bad ("Operand to .copy_state must be a constant");
4129 add_unwind_entry (output_copy_state (e.X_add_number));
4130 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4135 int dummy ATTRIBUTE_UNUSED;
4140 if (!in_procedure ("unwabi"))
4143 sep = parse_operand (&e1);
4146 as_bad ("Second operand to .unwabi missing");
4149 sep = parse_operand (&e2);
4150 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4151 demand_empty_rest_of_line ();
4153 if (e1.X_op != O_constant)
4155 as_bad ("First operand to .unwabi must be a constant");
4159 if (e2.X_op != O_constant)
4161 as_bad ("Second operand to .unwabi must be a constant");
4165 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4169 dot_personality (dummy)
4170 int dummy ATTRIBUTE_UNUSED;
4173 if (!in_procedure ("personality"))
4176 name = input_line_pointer;
4177 c = get_symbol_end ();
4178 p = input_line_pointer;
4179 unwind.personality_routine = symbol_find_or_make (name);
4180 unwind.force_unwind_entry = 1;
4183 demand_empty_rest_of_line ();
4188 int dummy ATTRIBUTE_UNUSED;
4193 unwind.proc_start = 0;
4194 /* Parse names of main and alternate entry points and mark them as
4195 function symbols: */
4199 name = input_line_pointer;
4200 c = get_symbol_end ();
4201 p = input_line_pointer;
4203 as_bad ("Empty argument of .proc");
4206 sym = symbol_find_or_make (name);
4207 if (S_IS_DEFINED (sym))
4208 as_bad ("`%s' was already defined", name);
4209 else if (unwind.proc_start == 0)
4211 unwind.proc_start = sym;
4213 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4217 if (*input_line_pointer != ',')
4219 ++input_line_pointer;
4221 if (unwind.proc_start == 0)
4222 unwind.proc_start = expr_build_dot ();
4223 demand_empty_rest_of_line ();
4226 unwind.prologue = 0;
4227 unwind.prologue_count = 0;
4230 unwind.list = unwind.tail = unwind.current_entry = NULL;
4231 unwind.personality_routine = 0;
4236 int dummy ATTRIBUTE_UNUSED;
4238 if (!in_procedure ("body"))
4240 if (!unwind.prologue && !unwind.body && unwind.insn)
4241 as_warn ("Initial .body should precede any instructions");
4243 unwind.prologue = 0;
4244 unwind.prologue_mask = 0;
4247 add_unwind_entry (output_body ());
4248 demand_empty_rest_of_line ();
4252 dot_prologue (dummy)
4253 int dummy ATTRIBUTE_UNUSED;
4256 int mask = 0, grsave = 0;
4258 if (!in_procedure ("prologue"))
4260 if (unwind.prologue)
4262 as_bad (".prologue within prologue");
4263 ignore_rest_of_line ();
4266 if (!unwind.body && unwind.insn)
4267 as_warn ("Initial .prologue should precede any instructions");
4269 if (!is_it_end_of_statement ())
4272 sep = parse_operand (&e1);
4274 as_bad ("No second operand to .prologue");
4275 sep = parse_operand (&e2);
4276 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4277 demand_empty_rest_of_line ();
4279 if (e1.X_op == O_constant)
4281 mask = e1.X_add_number;
4283 if (e2.X_op == O_constant)
4284 grsave = e2.X_add_number;
4285 else if (e2.X_op == O_register
4286 && (grsave = e2.X_add_number - REG_GR) < 128)
4289 as_bad ("Second operand not a constant or general register");
4291 add_unwind_entry (output_prologue_gr (mask, grsave));
4294 as_bad ("First operand not a constant");
4297 add_unwind_entry (output_prologue ());
4299 unwind.prologue = 1;
4300 unwind.prologue_mask = mask;
4302 ++unwind.prologue_count;
4307 int dummy ATTRIBUTE_UNUSED;
4311 int bytes_per_address;
4314 subsegT saved_subseg;
4318 if (!in_procedure ("endp"))
4321 if (unwind.saved_text_seg)
4323 saved_seg = unwind.saved_text_seg;
4324 saved_subseg = unwind.saved_text_subseg;
4325 unwind.saved_text_seg = NULL;
4329 saved_seg = now_seg;
4330 saved_subseg = now_subseg;
4333 insn_group_break (1, 0, 0);
4335 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4337 generate_unwind_image (saved_seg);
4339 if (unwind.info || unwind.force_unwind_entry)
4343 subseg_set (md.last_text_seg, 0);
4344 proc_end = expr_build_dot ();
4346 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4348 /* Make sure that section has 4 byte alignment for ILP32 and
4349 8 byte alignment for LP64. */
4350 record_alignment (now_seg, md.pointer_size_shift);
4352 /* Need space for 3 pointers for procedure start, procedure end,
4354 ptr = frag_more (3 * md.pointer_size);
4355 where = frag_now_fix () - (3 * md.pointer_size);
4356 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4358 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4359 e.X_op = O_pseudo_fixup;
4360 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4362 e.X_add_symbol = unwind.proc_start;
4363 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4365 e.X_op = O_pseudo_fixup;
4366 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4368 e.X_add_symbol = proc_end;
4369 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4370 bytes_per_address, &e);
4374 e.X_op = O_pseudo_fixup;
4375 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4377 e.X_add_symbol = unwind.info;
4378 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4379 bytes_per_address, &e);
4382 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4387 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4389 subseg_set (saved_seg, saved_subseg);
4391 /* Parse names of main and alternate entry points and set symbol sizes. */
4395 name = input_line_pointer;
4396 c = get_symbol_end ();
4397 p = input_line_pointer;
4399 as_bad ("Empty argument of .endp");
4402 sym = symbol_find (name);
4403 if (!sym || !S_IS_DEFINED (sym))
4404 as_bad ("`%s' was not defined within procedure", name);
4405 else if (unwind.proc_start
4406 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4407 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4409 fragS *fr = symbol_get_frag (unwind.proc_start);
4410 fragS *frag = symbol_get_frag (sym);
4412 /* Check whether the function label is at or beyond last
4414 while (fr && fr != frag)
4418 if (frag == frag_now && SEG_NORMAL (now_seg))
4419 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4422 symbol_get_obj (sym)->size =
4423 (expressionS *) xmalloc (sizeof (expressionS));
4424 symbol_get_obj (sym)->size->X_op = O_subtract;
4425 symbol_get_obj (sym)->size->X_add_symbol
4426 = symbol_new (FAKE_LABEL_NAME, now_seg,
4427 frag_now_fix (), frag_now);
4428 symbol_get_obj (sym)->size->X_op_symbol = sym;
4429 symbol_get_obj (sym)->size->X_add_number = 0;
4436 if (*input_line_pointer != ',')
4438 ++input_line_pointer;
4440 demand_empty_rest_of_line ();
4441 unwind.proc_start = unwind.info = 0;
4445 dot_template (template)
4448 CURR_SLOT.user_template = template;
4453 int dummy ATTRIBUTE_UNUSED;
4455 int ins, locs, outs, rots;
4457 if (is_it_end_of_statement ())
4458 ins = locs = outs = rots = 0;
4461 ins = get_absolute_expression ();
4462 if (*input_line_pointer++ != ',')
4464 locs = get_absolute_expression ();
4465 if (*input_line_pointer++ != ',')
4467 outs = get_absolute_expression ();
4468 if (*input_line_pointer++ != ',')
4470 rots = get_absolute_expression ();
4472 set_regstack (ins, locs, outs, rots);
4476 as_bad ("Comma expected");
4477 ignore_rest_of_line ();
4484 unsigned num_regs, num_alloced = 0;
4485 struct dynreg **drpp, *dr;
4486 int ch, base_reg = 0;
4492 case DYNREG_GR: base_reg = REG_GR + 32; break;
4493 case DYNREG_FR: base_reg = REG_FR + 32; break;
4494 case DYNREG_PR: base_reg = REG_P + 16; break;
4498 /* First, remove existing names from hash table. */
4499 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4501 hash_delete (md.dynreg_hash, dr->name);
4505 drpp = &md.dynreg[type];
4508 start = input_line_pointer;
4509 ch = get_symbol_end ();
4510 *input_line_pointer = ch;
4511 len = (input_line_pointer - start);
4514 if (*input_line_pointer != '[')
4516 as_bad ("Expected '['");
4519 ++input_line_pointer; /* skip '[' */
4521 num_regs = get_absolute_expression ();
4523 if (*input_line_pointer++ != ']')
4525 as_bad ("Expected ']'");
4530 num_alloced += num_regs;
4534 if (num_alloced > md.rot.num_regs)
4536 as_bad ("Used more than the declared %d rotating registers",
4542 if (num_alloced > 96)
4544 as_bad ("Used more than the available 96 rotating registers");
4549 if (num_alloced > 48)
4551 as_bad ("Used more than the available 48 rotating registers");
4560 name = obstack_alloc (¬es, len + 1);
4561 memcpy (name, start, len);
4566 *drpp = obstack_alloc (¬es, sizeof (*dr));
4567 memset (*drpp, 0, sizeof (*dr));
4572 dr->num_regs = num_regs;
4573 dr->base = base_reg;
4575 base_reg += num_regs;
4577 if (hash_insert (md.dynreg_hash, name, dr))
4579 as_bad ("Attempt to redefine register set `%s'", name);
4583 if (*input_line_pointer != ',')
4585 ++input_line_pointer; /* skip comma */
4588 demand_empty_rest_of_line ();
4592 ignore_rest_of_line ();
4596 dot_byteorder (byteorder)
4599 segment_info_type *seginfo = seg_info (now_seg);
4601 if (byteorder == -1)
4603 if (seginfo->tc_segment_info_data.endian == 0)
4604 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4605 byteorder = seginfo->tc_segment_info_data.endian == 1;
4608 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4610 if (target_big_endian != byteorder)
4612 target_big_endian = byteorder;
4613 if (target_big_endian)
4615 ia64_number_to_chars = number_to_chars_bigendian;
4616 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4620 ia64_number_to_chars = number_to_chars_littleendian;
4621 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4628 int dummy ATTRIBUTE_UNUSED;
4635 option = input_line_pointer;
4636 ch = get_symbol_end ();
4637 if (strcmp (option, "lsb") == 0)
4638 md.flags &= ~EF_IA_64_BE;
4639 else if (strcmp (option, "msb") == 0)
4640 md.flags |= EF_IA_64_BE;
4641 else if (strcmp (option, "abi32") == 0)
4642 md.flags &= ~EF_IA_64_ABI64;
4643 else if (strcmp (option, "abi64") == 0)
4644 md.flags |= EF_IA_64_ABI64;
4646 as_bad ("Unknown psr option `%s'", option);
4647 *input_line_pointer = ch;
4650 if (*input_line_pointer != ',')
4653 ++input_line_pointer;
4656 demand_empty_rest_of_line ();
4661 int dummy ATTRIBUTE_UNUSED;
4663 new_logical_line (0, get_absolute_expression ());
4664 demand_empty_rest_of_line ();
4668 parse_section_name ()
4674 if (*input_line_pointer != '"')
4676 as_bad ("Missing section name");
4677 ignore_rest_of_line ();
4680 name = demand_copy_C_string (&len);
4683 ignore_rest_of_line ();
4687 if (*input_line_pointer != ',')
4689 as_bad ("Comma expected after section name");
4690 ignore_rest_of_line ();
4693 ++input_line_pointer; /* skip comma */
4701 char *name = parse_section_name ();
4705 md.keep_pending_output = 1;
4708 obj_elf_previous (0);
4709 md.keep_pending_output = 0;
4712 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4715 stmt_float_cons (kind)
4736 ia64_do_align (alignment);
4744 int saved_auto_align = md.auto_align;
4748 md.auto_align = saved_auto_align;
4752 dot_xfloat_cons (kind)
4755 char *name = parse_section_name ();
4759 md.keep_pending_output = 1;
4761 stmt_float_cons (kind);
4762 obj_elf_previous (0);
4763 md.keep_pending_output = 0;
4767 dot_xstringer (zero)
4770 char *name = parse_section_name ();
4774 md.keep_pending_output = 1;
4777 obj_elf_previous (0);
4778 md.keep_pending_output = 0;
4785 int saved_auto_align = md.auto_align;
4786 char *name = parse_section_name ();
4790 md.keep_pending_output = 1;
4794 md.auto_align = saved_auto_align;
4795 obj_elf_previous (0);
4796 md.keep_pending_output = 0;
4800 dot_xfloat_cons_ua (kind)
4803 int saved_auto_align = md.auto_align;
4804 char *name = parse_section_name ();
4808 md.keep_pending_output = 1;
4811 stmt_float_cons (kind);
4812 md.auto_align = saved_auto_align;
4813 obj_elf_previous (0);
4814 md.keep_pending_output = 0;
4817 /* .reg.val <regname>,value */
4821 int dummy ATTRIBUTE_UNUSED;
4826 if (reg.X_op != O_register)
4828 as_bad (_("Register name expected"));
4829 ignore_rest_of_line ();
4831 else if (*input_line_pointer++ != ',')
4833 as_bad (_("Comma expected"));
4834 ignore_rest_of_line ();
4838 valueT value = get_absolute_expression ();
4839 int regno = reg.X_add_number;
4840 if (regno < REG_GR || regno > REG_GR + 128)
4841 as_warn (_("Register value annotation ignored"));
4844 gr_values[regno - REG_GR].known = 1;
4845 gr_values[regno - REG_GR].value = value;
4846 gr_values[regno - REG_GR].path = md.path;
4849 demand_empty_rest_of_line ();
4854 .serialize.instruction
4857 dot_serialize (type)
4860 insn_group_break (0, 0, 0);
4862 instruction_serialization ();
4864 data_serialization ();
4865 insn_group_break (0, 0, 0);
4866 demand_empty_rest_of_line ();
4869 /* select dv checking mode
4874 A stop is inserted when changing modes
4881 if (md.manual_bundling)
4882 as_warn (_("Directive invalid within a bundle"));
4884 if (type == 'E' || type == 'A')
4885 md.mode_explicitly_set = 0;
4887 md.mode_explicitly_set = 1;
4894 if (md.explicit_mode)
4895 insn_group_break (1, 0, 0);
4896 md.explicit_mode = 0;
4900 if (!md.explicit_mode)
4901 insn_group_break (1, 0, 0);
4902 md.explicit_mode = 1;
4906 if (md.explicit_mode != md.default_explicit_mode)
4907 insn_group_break (1, 0, 0);
4908 md.explicit_mode = md.default_explicit_mode;
4909 md.mode_explicitly_set = 0;
4920 for (regno = 0; regno < 64; regno++)
4922 if (mask & ((valueT) 1 << regno))
4924 fprintf (stderr, "%s p%d", comma, regno);
4931 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4932 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4933 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4934 .pred.safe_across_calls p1 [, p2 [,...]]
4943 int p1 = -1, p2 = -1;
4947 if (*input_line_pointer != '"')
4949 as_bad (_("Missing predicate relation type"));
4950 ignore_rest_of_line ();
4956 char *form = demand_copy_C_string (&len);
4957 if (strcmp (form, "mutex") == 0)
4959 else if (strcmp (form, "clear") == 0)
4961 else if (strcmp (form, "imply") == 0)
4965 as_bad (_("Unrecognized predicate relation type"));
4966 ignore_rest_of_line ();
4970 if (*input_line_pointer == ',')
4971 ++input_line_pointer;
4981 if (TOUPPER (*input_line_pointer) != 'P'
4982 || (regno = atoi (++input_line_pointer)) < 0
4985 as_bad (_("Predicate register expected"));
4986 ignore_rest_of_line ();
4989 while (ISDIGIT (*input_line_pointer))
4990 ++input_line_pointer;
4997 as_warn (_("Duplicate predicate register ignored"));
5000 /* See if it's a range. */
5001 if (*input_line_pointer == '-')
5004 ++input_line_pointer;
5006 if (TOUPPER (*input_line_pointer) != 'P'
5007 || (regno = atoi (++input_line_pointer)) < 0
5010 as_bad (_("Predicate register expected"));
5011 ignore_rest_of_line ();
5014 while (ISDIGIT (*input_line_pointer))
5015 ++input_line_pointer;
5019 as_bad (_("Bad register range"));
5020 ignore_rest_of_line ();
5031 if (*input_line_pointer != ',')
5033 ++input_line_pointer;
5042 clear_qp_mutex (mask);
5043 clear_qp_implies (mask, (valueT) 0);
5046 if (count != 2 || p1 == -1 || p2 == -1)
5047 as_bad (_("Predicate source and target required"));
5048 else if (p1 == 0 || p2 == 0)
5049 as_bad (_("Use of p0 is not valid in this context"));
5051 add_qp_imply (p1, p2);
5056 as_bad (_("At least two PR arguments expected"));
5061 as_bad (_("Use of p0 is not valid in this context"));
5064 add_qp_mutex (mask);
5067 /* note that we don't override any existing relations */
5070 as_bad (_("At least one PR argument expected"));
5075 fprintf (stderr, "Safe across calls: ");
5076 print_prmask (mask);
5077 fprintf (stderr, "\n");
5079 qp_safe_across_calls = mask;
5082 demand_empty_rest_of_line ();
5085 /* .entry label [, label [, ...]]
5086 Hint to DV code that the given labels are to be considered entry points.
5087 Otherwise, only global labels are considered entry points. */
5091 int dummy ATTRIBUTE_UNUSED;
5100 name = input_line_pointer;
5101 c = get_symbol_end ();
5102 symbolP = symbol_find_or_make (name);
5104 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5106 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5109 *input_line_pointer = c;
5111 c = *input_line_pointer;
5114 input_line_pointer++;
5116 if (*input_line_pointer == '\n')
5122 demand_empty_rest_of_line ();
5125 /* .mem.offset offset, base
5126 "base" is used to distinguish between offsets from a different base. */
5129 dot_mem_offset (dummy)
5130 int dummy ATTRIBUTE_UNUSED;
5132 md.mem_offset.hint = 1;
5133 md.mem_offset.offset = get_absolute_expression ();
5134 if (*input_line_pointer != ',')
5136 as_bad (_("Comma expected"));
5137 ignore_rest_of_line ();
5140 ++input_line_pointer;
5141 md.mem_offset.base = get_absolute_expression ();
5142 demand_empty_rest_of_line ();
5145 /* ia64-specific pseudo-ops: */
5146 const pseudo_typeS md_pseudo_table[] =
5148 { "radix", dot_radix, 0 },
5149 { "lcomm", s_lcomm_bytes, 1 },
5150 { "loc", dot_loc, 0 },
5151 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5152 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5153 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5154 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5155 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5156 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5157 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5158 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5159 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5160 { "proc", dot_proc, 0 },
5161 { "body", dot_body, 0 },
5162 { "prologue", dot_prologue, 0 },
5163 { "endp", dot_endp, 0 },
5165 { "fframe", dot_fframe, 0 },
5166 { "vframe", dot_vframe, 0 },
5167 { "vframesp", dot_vframesp, 0 },
5168 { "vframepsp", dot_vframepsp, 0 },
5169 { "save", dot_save, 0 },
5170 { "restore", dot_restore, 0 },
5171 { "restorereg", dot_restorereg, 0 },
5172 { "restorereg.p", dot_restorereg_p, 0 },
5173 { "handlerdata", dot_handlerdata, 0 },
5174 { "unwentry", dot_unwentry, 0 },
5175 { "altrp", dot_altrp, 0 },
5176 { "savesp", dot_savemem, 0 },
5177 { "savepsp", dot_savemem, 1 },
5178 { "save.g", dot_saveg, 0 },
5179 { "save.f", dot_savef, 0 },
5180 { "save.b", dot_saveb, 0 },
5181 { "save.gf", dot_savegf, 0 },
5182 { "spill", dot_spill, 0 },
5183 { "spillreg", dot_spillreg, 0 },
5184 { "spillsp", dot_spillmem, 0 },
5185 { "spillpsp", dot_spillmem, 1 },
5186 { "spillreg.p", dot_spillreg_p, 0 },
5187 { "spillsp.p", dot_spillmem_p, 0 },
5188 { "spillpsp.p", dot_spillmem_p, 1 },
5189 { "label_state", dot_label_state, 0 },
5190 { "copy_state", dot_copy_state, 0 },
5191 { "unwabi", dot_unwabi, 0 },
5192 { "personality", dot_personality, 0 },
5193 { "mii", dot_template, 0x0 },
5194 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5195 { "mlx", dot_template, 0x2 },
5196 { "mmi", dot_template, 0x4 },
5197 { "mfi", dot_template, 0x6 },
5198 { "mmf", dot_template, 0x7 },
5199 { "mib", dot_template, 0x8 },
5200 { "mbb", dot_template, 0x9 },
5201 { "bbb", dot_template, 0xb },
5202 { "mmb", dot_template, 0xc },
5203 { "mfb", dot_template, 0xe },
5204 { "align", dot_align, 0 },
5205 { "regstk", dot_regstk, 0 },
5206 { "rotr", dot_rot, DYNREG_GR },
5207 { "rotf", dot_rot, DYNREG_FR },
5208 { "rotp", dot_rot, DYNREG_PR },
5209 { "lsb", dot_byteorder, 0 },
5210 { "msb", dot_byteorder, 1 },
5211 { "psr", dot_psr, 0 },
5212 { "alias", dot_alias, 0 },
5213 { "secalias", dot_alias, 1 },
5214 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5216 { "xdata1", dot_xdata, 1 },
5217 { "xdata2", dot_xdata, 2 },
5218 { "xdata4", dot_xdata, 4 },
5219 { "xdata8", dot_xdata, 8 },
5220 { "xreal4", dot_xfloat_cons, 'f' },
5221 { "xreal8", dot_xfloat_cons, 'd' },
5222 { "xreal10", dot_xfloat_cons, 'x' },
5223 { "xreal16", dot_xfloat_cons, 'X' },
5224 { "xstring", dot_xstringer, 0 },
5225 { "xstringz", dot_xstringer, 1 },
5227 /* unaligned versions: */
5228 { "xdata2.ua", dot_xdata_ua, 2 },
5229 { "xdata4.ua", dot_xdata_ua, 4 },
5230 { "xdata8.ua", dot_xdata_ua, 8 },
5231 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5232 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5233 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5234 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5236 /* annotations/DV checking support */
5237 { "entry", dot_entry, 0 },
5238 { "mem.offset", dot_mem_offset, 0 },
5239 { "pred.rel", dot_pred_rel, 0 },
5240 { "pred.rel.clear", dot_pred_rel, 'c' },
5241 { "pred.rel.imply", dot_pred_rel, 'i' },
5242 { "pred.rel.mutex", dot_pred_rel, 'm' },
5243 { "pred.safe_across_calls", dot_pred_rel, 's' },
5244 { "reg.val", dot_reg_val, 0 },
5245 { "serialize.data", dot_serialize, 0 },
5246 { "serialize.instruction", dot_serialize, 1 },
5247 { "auto", dot_dv_mode, 'a' },
5248 { "explicit", dot_dv_mode, 'e' },
5249 { "default", dot_dv_mode, 'd' },
5251 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5252 IA-64 aligns data allocation pseudo-ops by default, so we have to
5253 tell it that these ones are supposed to be unaligned. Long term,
5254 should rewrite so that only IA-64 specific data allocation pseudo-ops
5255 are aligned by default. */
5256 {"2byte", stmt_cons_ua, 2},
5257 {"4byte", stmt_cons_ua, 4},
5258 {"8byte", stmt_cons_ua, 8},
5263 static const struct pseudo_opcode
5266 void (*handler) (int);
5271 /* these are more like pseudo-ops, but don't start with a dot */
5272 { "data1", cons, 1 },
5273 { "data2", cons, 2 },
5274 { "data4", cons, 4 },
5275 { "data8", cons, 8 },
5276 { "data16", cons, 16 },
5277 { "real4", stmt_float_cons, 'f' },
5278 { "real8", stmt_float_cons, 'd' },
5279 { "real10", stmt_float_cons, 'x' },
5280 { "real16", stmt_float_cons, 'X' },
5281 { "string", stringer, 0 },
5282 { "stringz", stringer, 1 },
5284 /* unaligned versions: */
5285 { "data2.ua", stmt_cons_ua, 2 },
5286 { "data4.ua", stmt_cons_ua, 4 },
5287 { "data8.ua", stmt_cons_ua, 8 },
5288 { "data16.ua", stmt_cons_ua, 16 },
5289 { "real4.ua", float_cons, 'f' },
5290 { "real8.ua", float_cons, 'd' },
5291 { "real10.ua", float_cons, 'x' },
5292 { "real16.ua", float_cons, 'X' },
5295 /* Declare a register by creating a symbol for it and entering it in
5296 the symbol table. */
5299 declare_register (name, regnum)
5306 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5308 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5310 as_fatal ("Inserting \"%s\" into register table failed: %s",
5317 declare_register_set (prefix, num_regs, base_regnum)
5325 for (i = 0; i < num_regs; ++i)
5327 sprintf (name, "%s%u", prefix, i);
5328 declare_register (name, base_regnum + i);
5333 operand_width (opnd)
5334 enum ia64_opnd opnd;
5336 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5337 unsigned int bits = 0;
5341 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5342 bits += odesc->field[i].bits;
5347 static enum operand_match_result
5348 operand_match (idesc, index, e)
5349 const struct ia64_opcode *idesc;
5353 enum ia64_opnd opnd = idesc->operands[index];
5354 int bits, relocatable = 0;
5355 struct insn_fix *fix;
5362 case IA64_OPND_AR_CCV:
5363 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5364 return OPERAND_MATCH;
5367 case IA64_OPND_AR_CSD:
5368 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5369 return OPERAND_MATCH;
5372 case IA64_OPND_AR_PFS:
5373 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5374 return OPERAND_MATCH;
5378 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5379 return OPERAND_MATCH;
5383 if (e->X_op == O_register && e->X_add_number == REG_IP)
5384 return OPERAND_MATCH;
5388 if (e->X_op == O_register && e->X_add_number == REG_PR)
5389 return OPERAND_MATCH;
5392 case IA64_OPND_PR_ROT:
5393 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5394 return OPERAND_MATCH;
5398 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5399 return OPERAND_MATCH;
5402 case IA64_OPND_PSR_L:
5403 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5404 return OPERAND_MATCH;
5407 case IA64_OPND_PSR_UM:
5408 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5409 return OPERAND_MATCH;
5413 if (e->X_op == O_constant)
5415 if (e->X_add_number == 1)
5416 return OPERAND_MATCH;
5418 return OPERAND_OUT_OF_RANGE;
5423 if (e->X_op == O_constant)
5425 if (e->X_add_number == 8)
5426 return OPERAND_MATCH;
5428 return OPERAND_OUT_OF_RANGE;
5433 if (e->X_op == O_constant)
5435 if (e->X_add_number == 16)
5436 return OPERAND_MATCH;
5438 return OPERAND_OUT_OF_RANGE;
5442 /* register operands: */
5445 if (e->X_op == O_register && e->X_add_number >= REG_AR
5446 && e->X_add_number < REG_AR + 128)
5447 return OPERAND_MATCH;
5452 if (e->X_op == O_register && e->X_add_number >= REG_BR
5453 && e->X_add_number < REG_BR + 8)
5454 return OPERAND_MATCH;
5458 if (e->X_op == O_register && e->X_add_number >= REG_CR
5459 && e->X_add_number < REG_CR + 128)
5460 return OPERAND_MATCH;
5467 if (e->X_op == O_register && e->X_add_number >= REG_FR
5468 && e->X_add_number < REG_FR + 128)
5469 return OPERAND_MATCH;
5474 if (e->X_op == O_register && e->X_add_number >= REG_P
5475 && e->X_add_number < REG_P + 64)
5476 return OPERAND_MATCH;
5482 if (e->X_op == O_register && e->X_add_number >= REG_GR
5483 && e->X_add_number < REG_GR + 128)
5484 return OPERAND_MATCH;
5487 case IA64_OPND_R3_2:
5488 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5490 if (e->X_add_number < REG_GR + 4)
5491 return OPERAND_MATCH;
5492 else if (e->X_add_number < REG_GR + 128)
5493 return OPERAND_OUT_OF_RANGE;
5497 /* indirect operands: */
5498 case IA64_OPND_CPUID_R3:
5499 case IA64_OPND_DBR_R3:
5500 case IA64_OPND_DTR_R3:
5501 case IA64_OPND_ITR_R3:
5502 case IA64_OPND_IBR_R3:
5503 case IA64_OPND_MSR_R3:
5504 case IA64_OPND_PKR_R3:
5505 case IA64_OPND_PMC_R3:
5506 case IA64_OPND_PMD_R3:
5507 case IA64_OPND_RR_R3:
5508 if (e->X_op == O_index && e->X_op_symbol
5509 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5510 == opnd - IA64_OPND_CPUID_R3))
5511 return OPERAND_MATCH;
5515 if (e->X_op == O_index && !e->X_op_symbol)
5516 return OPERAND_MATCH;
5519 /* immediate operands: */
5520 case IA64_OPND_CNT2a:
5521 case IA64_OPND_LEN4:
5522 case IA64_OPND_LEN6:
5523 bits = operand_width (idesc->operands[index]);
5524 if (e->X_op == O_constant)
5526 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5527 return OPERAND_MATCH;
5529 return OPERAND_OUT_OF_RANGE;
5533 case IA64_OPND_CNT2b:
5534 if (e->X_op == O_constant)
5536 if ((bfd_vma) (e->X_add_number - 1) < 3)
5537 return OPERAND_MATCH;
5539 return OPERAND_OUT_OF_RANGE;
5543 case IA64_OPND_CNT2c:
5544 val = e->X_add_number;
5545 if (e->X_op == O_constant)
5547 if ((val == 0 || val == 7 || val == 15 || val == 16))
5548 return OPERAND_MATCH;
5550 return OPERAND_OUT_OF_RANGE;
5555 /* SOR must be an integer multiple of 8 */
5556 if (e->X_op == O_constant && e->X_add_number & 0x7)
5557 return OPERAND_OUT_OF_RANGE;
5560 if (e->X_op == O_constant)
5562 if ((bfd_vma) e->X_add_number <= 96)
5563 return OPERAND_MATCH;
5565 return OPERAND_OUT_OF_RANGE;
5569 case IA64_OPND_IMMU62:
5570 if (e->X_op == O_constant)
5572 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5573 return OPERAND_MATCH;
5575 return OPERAND_OUT_OF_RANGE;
5579 /* FIXME -- need 62-bit relocation type */
5580 as_bad (_("62-bit relocation not yet implemented"));
5584 case IA64_OPND_IMMU64:
5585 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5586 || e->X_op == O_subtract)
5588 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5589 fix->code = BFD_RELOC_IA64_IMM64;
5590 if (e->X_op != O_subtract)
5592 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5593 if (e->X_op == O_pseudo_fixup)
5597 fix->opnd = idesc->operands[index];
5600 ++CURR_SLOT.num_fixups;
5601 return OPERAND_MATCH;
5603 else if (e->X_op == O_constant)
5604 return OPERAND_MATCH;
5607 case IA64_OPND_CCNT5:
5608 case IA64_OPND_CNT5:
5609 case IA64_OPND_CNT6:
5610 case IA64_OPND_CPOS6a:
5611 case IA64_OPND_CPOS6b:
5612 case IA64_OPND_CPOS6c:
5613 case IA64_OPND_IMMU2:
5614 case IA64_OPND_IMMU7a:
5615 case IA64_OPND_IMMU7b:
5616 case IA64_OPND_IMMU21:
5617 case IA64_OPND_IMMU24:
5618 case IA64_OPND_MBTYPE4:
5619 case IA64_OPND_MHTYPE8:
5620 case IA64_OPND_POS6:
5621 bits = operand_width (idesc->operands[index]);
5622 if (e->X_op == O_constant)
5624 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5625 return OPERAND_MATCH;
5627 return OPERAND_OUT_OF_RANGE;
5631 case IA64_OPND_IMMU9:
5632 bits = operand_width (idesc->operands[index]);
5633 if (e->X_op == O_constant)
5635 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5637 int lobits = e->X_add_number & 0x3;
5638 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5639 e->X_add_number |= (bfd_vma) 0x3;
5640 return OPERAND_MATCH;
5643 return OPERAND_OUT_OF_RANGE;
5647 case IA64_OPND_IMM44:
5648 /* least 16 bits must be zero */
5649 if ((e->X_add_number & 0xffff) != 0)
5650 /* XXX technically, this is wrong: we should not be issuing warning
5651 messages until we're sure this instruction pattern is going to
5653 as_warn (_("lower 16 bits of mask ignored"));
5655 if (e->X_op == O_constant)
5657 if (((e->X_add_number >= 0
5658 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5659 || (e->X_add_number < 0
5660 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5663 if (e->X_add_number >= 0
5664 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5666 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5668 return OPERAND_MATCH;
5671 return OPERAND_OUT_OF_RANGE;
5675 case IA64_OPND_IMM17:
5676 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5677 if (e->X_op == O_constant)
5679 if (((e->X_add_number >= 0
5680 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5681 || (e->X_add_number < 0
5682 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5685 if (e->X_add_number >= 0
5686 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5688 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5690 return OPERAND_MATCH;
5693 return OPERAND_OUT_OF_RANGE;
5697 case IA64_OPND_IMM14:
5698 case IA64_OPND_IMM22:
5700 case IA64_OPND_IMM1:
5701 case IA64_OPND_IMM8:
5702 case IA64_OPND_IMM8U4:
5703 case IA64_OPND_IMM8M1:
5704 case IA64_OPND_IMM8M1U4:
5705 case IA64_OPND_IMM8M1U8:
5706 case IA64_OPND_IMM9a:
5707 case IA64_OPND_IMM9b:
5708 bits = operand_width (idesc->operands[index]);
5709 if (relocatable && (e->X_op == O_symbol
5710 || e->X_op == O_subtract
5711 || e->X_op == O_pseudo_fixup))
5713 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5715 if (idesc->operands[index] == IA64_OPND_IMM14)
5716 fix->code = BFD_RELOC_IA64_IMM14;
5718 fix->code = BFD_RELOC_IA64_IMM22;
5720 if (e->X_op != O_subtract)
5722 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5723 if (e->X_op == O_pseudo_fixup)
5727 fix->opnd = idesc->operands[index];
5730 ++CURR_SLOT.num_fixups;
5731 return OPERAND_MATCH;
5733 else if (e->X_op != O_constant
5734 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5735 return OPERAND_MISMATCH;
5737 if (opnd == IA64_OPND_IMM8M1U4)
5739 /* Zero is not valid for unsigned compares that take an adjusted
5740 constant immediate range. */
5741 if (e->X_add_number == 0)
5742 return OPERAND_OUT_OF_RANGE;
5744 /* Sign-extend 32-bit unsigned numbers, so that the following range
5745 checks will work. */
5746 val = e->X_add_number;
5747 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5748 && ((val & ((bfd_vma) 1 << 31)) != 0))
5749 val = ((val << 32) >> 32);
5751 /* Check for 0x100000000. This is valid because
5752 0x100000000-1 is the same as ((uint32_t) -1). */
5753 if (val == ((bfd_signed_vma) 1 << 32))
5754 return OPERAND_MATCH;
5758 else if (opnd == IA64_OPND_IMM8M1U8)
5760 /* Zero is not valid for unsigned compares that take an adjusted
5761 constant immediate range. */
5762 if (e->X_add_number == 0)
5763 return OPERAND_OUT_OF_RANGE;
5765 /* Check for 0x10000000000000000. */
5766 if (e->X_op == O_big)
5768 if (generic_bignum[0] == 0
5769 && generic_bignum[1] == 0
5770 && generic_bignum[2] == 0
5771 && generic_bignum[3] == 0
5772 && generic_bignum[4] == 1)
5773 return OPERAND_MATCH;
5775 return OPERAND_OUT_OF_RANGE;
5778 val = e->X_add_number - 1;
5780 else if (opnd == IA64_OPND_IMM8M1)
5781 val = e->X_add_number - 1;
5782 else if (opnd == IA64_OPND_IMM8U4)
5784 /* Sign-extend 32-bit unsigned numbers, so that the following range
5785 checks will work. */
5786 val = e->X_add_number;
5787 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5788 && ((val & ((bfd_vma) 1 << 31)) != 0))
5789 val = ((val << 32) >> 32);
5792 val = e->X_add_number;
5794 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5795 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5796 return OPERAND_MATCH;
5798 return OPERAND_OUT_OF_RANGE;
5800 case IA64_OPND_INC3:
5801 /* +/- 1, 4, 8, 16 */
5802 val = e->X_add_number;
5805 if (e->X_op == O_constant)
5807 if ((val == 1 || val == 4 || val == 8 || val == 16))
5808 return OPERAND_MATCH;
5810 return OPERAND_OUT_OF_RANGE;
5814 case IA64_OPND_TGT25:
5815 case IA64_OPND_TGT25b:
5816 case IA64_OPND_TGT25c:
5817 case IA64_OPND_TGT64:
5818 if (e->X_op == O_symbol)
5820 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5821 if (opnd == IA64_OPND_TGT25)
5822 fix->code = BFD_RELOC_IA64_PCREL21F;
5823 else if (opnd == IA64_OPND_TGT25b)
5824 fix->code = BFD_RELOC_IA64_PCREL21M;
5825 else if (opnd == IA64_OPND_TGT25c)
5826 fix->code = BFD_RELOC_IA64_PCREL21B;
5827 else if (opnd == IA64_OPND_TGT64)
5828 fix->code = BFD_RELOC_IA64_PCREL60B;
5832 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5833 fix->opnd = idesc->operands[index];
5836 ++CURR_SLOT.num_fixups;
5837 return OPERAND_MATCH;
5839 case IA64_OPND_TAG13:
5840 case IA64_OPND_TAG13b:
5844 return OPERAND_MATCH;
5847 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5848 /* There are no external relocs for TAG13/TAG13b fields, so we
5849 create a dummy reloc. This will not live past md_apply_fix3. */
5850 fix->code = BFD_RELOC_UNUSED;
5851 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5852 fix->opnd = idesc->operands[index];
5855 ++CURR_SLOT.num_fixups;
5856 return OPERAND_MATCH;
5863 case IA64_OPND_LDXMOV:
5864 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5865 fix->code = BFD_RELOC_IA64_LDXMOV;
5866 fix->opnd = idesc->operands[index];
5869 ++CURR_SLOT.num_fixups;
5870 return OPERAND_MATCH;
5875 return OPERAND_MISMATCH;
5884 memset (e, 0, sizeof (*e));
5887 if (*input_line_pointer != '}')
5889 sep = *input_line_pointer++;
5893 if (!md.manual_bundling)
5894 as_warn ("Found '}' when manual bundling is off");
5896 CURR_SLOT.manual_bundling_off = 1;
5897 md.manual_bundling = 0;
5903 /* Returns the next entry in the opcode table that matches the one in
5904 IDESC, and frees the entry in IDESC. If no matching entry is
5905 found, NULL is returned instead. */
5907 static struct ia64_opcode *
5908 get_next_opcode (struct ia64_opcode *idesc)
5910 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5911 ia64_free_opcode (idesc);
5915 /* Parse the operands for the opcode and find the opcode variant that
5916 matches the specified operands, or NULL if no match is possible. */
5918 static struct ia64_opcode *
5919 parse_operands (idesc)
5920 struct ia64_opcode *idesc;
5922 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5923 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5924 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5925 enum operand_match_result result;
5927 char *first_arg = 0, *end, *saved_input_pointer;
5930 assert (strlen (idesc->name) <= 128);
5932 strcpy (mnemonic, idesc->name);
5933 if (idesc->operands[2] == IA64_OPND_SOF
5934 || idesc->operands[1] == IA64_OPND_SOF)
5936 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5937 can't parse the first operand until we have parsed the
5938 remaining operands of the "alloc" instruction. */
5940 first_arg = input_line_pointer;
5941 end = strchr (input_line_pointer, '=');
5944 as_bad ("Expected separator `='");
5947 input_line_pointer = end + 1;
5954 if (i < NELEMS (CURR_SLOT.opnd))
5956 sep = parse_operand (CURR_SLOT.opnd + i);
5957 if (CURR_SLOT.opnd[i].X_op == O_absent)
5964 sep = parse_operand (&dummy);
5965 if (dummy.X_op == O_absent)
5971 if (sep != '=' && sep != ',')
5976 if (num_outputs > 0)
5977 as_bad ("Duplicate equal sign (=) in instruction");
5979 num_outputs = i + 1;
5984 as_bad ("Illegal operand separator `%c'", sep);
5988 if (idesc->operands[2] == IA64_OPND_SOF
5989 || idesc->operands[1] == IA64_OPND_SOF)
5991 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5992 know (strcmp (idesc->name, "alloc") == 0);
5993 i = (CURR_SLOT.opnd[1].X_op == O_register
5994 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
5995 if (num_operands == i + 3 /* first_arg not included in this count! */
5996 && CURR_SLOT.opnd[i].X_op == O_constant
5997 && CURR_SLOT.opnd[i + 1].X_op == O_constant
5998 && CURR_SLOT.opnd[i + 2].X_op == O_constant
5999 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6001 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6002 CURR_SLOT.opnd[i + 1].X_add_number,
6003 CURR_SLOT.opnd[i + 2].X_add_number,
6004 CURR_SLOT.opnd[i + 3].X_add_number);
6006 /* now we can parse the first arg: */
6007 saved_input_pointer = input_line_pointer;
6008 input_line_pointer = first_arg;
6009 sep = parse_operand (CURR_SLOT.opnd + 0);
6011 --num_outputs; /* force error */
6012 input_line_pointer = saved_input_pointer;
6014 CURR_SLOT.opnd[i].X_add_number = sof;
6015 CURR_SLOT.opnd[i + 1].X_add_number
6016 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6017 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6021 highest_unmatched_operand = -4;
6022 curr_out_of_range_pos = -1;
6024 for (; idesc; idesc = get_next_opcode (idesc))
6026 if (num_outputs != idesc->num_outputs)
6027 continue; /* mismatch in # of outputs */
6028 if (highest_unmatched_operand < 0)
6029 highest_unmatched_operand |= 1;
6030 if (num_operands > NELEMS (idesc->operands)
6031 || (num_operands < NELEMS (idesc->operands)
6032 && idesc->operands[num_operands])
6033 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6034 continue; /* mismatch in number of arguments */
6035 if (highest_unmatched_operand < 0)
6036 highest_unmatched_operand |= 2;
6038 CURR_SLOT.num_fixups = 0;
6040 /* Try to match all operands. If we see an out-of-range operand,
6041 then continue trying to match the rest of the operands, since if
6042 the rest match, then this idesc will give the best error message. */
6044 out_of_range_pos = -1;
6045 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6047 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6048 if (result != OPERAND_MATCH)
6050 if (result != OPERAND_OUT_OF_RANGE)
6052 if (out_of_range_pos < 0)
6053 /* remember position of the first out-of-range operand: */
6054 out_of_range_pos = i;
6058 /* If we did not match all operands, or if at least one operand was
6059 out-of-range, then this idesc does not match. Keep track of which
6060 idesc matched the most operands before failing. If we have two
6061 idescs that failed at the same position, and one had an out-of-range
6062 operand, then prefer the out-of-range operand. Thus if we have
6063 "add r0=0x1000000,r1" we get an error saying the constant is out
6064 of range instead of an error saying that the constant should have been
6067 if (i != num_operands || out_of_range_pos >= 0)
6069 if (i > highest_unmatched_operand
6070 || (i == highest_unmatched_operand
6071 && out_of_range_pos > curr_out_of_range_pos))
6073 highest_unmatched_operand = i;
6074 if (out_of_range_pos >= 0)
6076 expected_operand = idesc->operands[out_of_range_pos];
6077 error_pos = out_of_range_pos;
6081 expected_operand = idesc->operands[i];
6084 curr_out_of_range_pos = out_of_range_pos;
6093 if (expected_operand)
6094 as_bad ("Operand %u of `%s' should be %s",
6095 error_pos + 1, mnemonic,
6096 elf64_ia64_operands[expected_operand].desc);
6097 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6098 as_bad ("Wrong number of output operands");
6099 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6100 as_bad ("Wrong number of input operands");
6102 as_bad ("Operand mismatch");
6108 /* Keep track of state necessary to determine whether a NOP is necessary
6109 to avoid an erratum in A and B step Itanium chips, and return 1 if we
6110 detect a case where additional NOPs may be necessary. */
6112 errata_nop_necessary_p (slot, insn_unit)
6114 enum ia64_unit insn_unit;
6117 struct group *this_group = md.last_groups + md.group_idx;
6118 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
6119 struct ia64_opcode *idesc = slot->idesc;
6121 /* Test whether this could be the first insn in a problematic sequence. */
6122 if (insn_unit == IA64_UNIT_F)
6124 for (i = 0; i < idesc->num_outputs; i++)
6125 if (idesc->operands[i] == IA64_OPND_P1
6126 || idesc->operands[i] == IA64_OPND_P2)
6128 int regno = slot->opnd[i].X_add_number - REG_P;
6129 /* Ignore invalid operands; they generate errors elsewhere. */
6132 this_group->p_reg_set[regno] = 1;
6136 /* Test whether this could be the second insn in a problematic sequence. */
6137 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
6138 && prev_group->p_reg_set[slot->qp_regno])
6140 for (i = 0; i < idesc->num_outputs; i++)
6141 if (idesc->operands[i] == IA64_OPND_R1
6142 || idesc->operands[i] == IA64_OPND_R2
6143 || idesc->operands[i] == IA64_OPND_R3)
6145 int regno = slot->opnd[i].X_add_number - REG_GR;
6146 /* Ignore invalid operands; they generate errors elsewhere. */
6149 if (strncmp (idesc->name, "add", 3) != 0
6150 && strncmp (idesc->name, "sub", 3) != 0
6151 && strncmp (idesc->name, "shladd", 6) != 0
6152 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
6153 this_group->g_reg_set_conditionally[regno] = 1;
6157 /* Test whether this could be the third insn in a problematic sequence. */
6158 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
6160 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
6161 idesc->operands[i] == IA64_OPND_R3
6162 /* For mov indirect. */
6163 || idesc->operands[i] == IA64_OPND_RR_R3
6164 || idesc->operands[i] == IA64_OPND_DBR_R3
6165 || idesc->operands[i] == IA64_OPND_IBR_R3
6166 || idesc->operands[i] == IA64_OPND_PKR_R3
6167 || idesc->operands[i] == IA64_OPND_PMC_R3
6168 || idesc->operands[i] == IA64_OPND_PMD_R3
6169 || idesc->operands[i] == IA64_OPND_MSR_R3
6170 || idesc->operands[i] == IA64_OPND_CPUID_R3
6172 || idesc->operands[i] == IA64_OPND_ITR_R3
6173 || idesc->operands[i] == IA64_OPND_DTR_R3
6174 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
6175 || idesc->operands[i] == IA64_OPND_MR3)
6177 int regno = slot->opnd[i].X_add_number - REG_GR;
6178 /* Ignore invalid operands; they generate errors elsewhere. */
6181 if (idesc->operands[i] == IA64_OPND_R3)
6183 if (strcmp (idesc->name, "fc") != 0
6184 && strcmp (idesc->name, "tak") != 0
6185 && strcmp (idesc->name, "thash") != 0
6186 && strcmp (idesc->name, "tpa") != 0
6187 && strcmp (idesc->name, "ttag") != 0
6188 && strncmp (idesc->name, "ptr", 3) != 0
6189 && strncmp (idesc->name, "ptc", 3) != 0
6190 && strncmp (idesc->name, "probe", 5) != 0)
6193 if (prev_group->g_reg_set_conditionally[regno])
6201 build_insn (slot, insnp)
6205 const struct ia64_operand *odesc, *o2desc;
6206 struct ia64_opcode *idesc = slot->idesc;
6207 bfd_signed_vma insn, val;
6211 insn = idesc->opcode | slot->qp_regno;
6213 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6215 if (slot->opnd[i].X_op == O_register
6216 || slot->opnd[i].X_op == O_constant
6217 || slot->opnd[i].X_op == O_index)
6218 val = slot->opnd[i].X_add_number;
6219 else if (slot->opnd[i].X_op == O_big)
6221 /* This must be the value 0x10000000000000000. */
6222 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6228 switch (idesc->operands[i])
6230 case IA64_OPND_IMMU64:
6231 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6232 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6233 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6234 | (((val >> 63) & 0x1) << 36));
6237 case IA64_OPND_IMMU62:
6238 val &= 0x3fffffffffffffffULL;
6239 if (val != slot->opnd[i].X_add_number)
6240 as_warn (_("Value truncated to 62 bits"));
6241 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6242 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6245 case IA64_OPND_TGT64:
6247 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6248 insn |= ((((val >> 59) & 0x1) << 36)
6249 | (((val >> 0) & 0xfffff) << 13));
6280 case IA64_OPND_R3_2:
6281 case IA64_OPND_CPUID_R3:
6282 case IA64_OPND_DBR_R3:
6283 case IA64_OPND_DTR_R3:
6284 case IA64_OPND_ITR_R3:
6285 case IA64_OPND_IBR_R3:
6287 case IA64_OPND_MSR_R3:
6288 case IA64_OPND_PKR_R3:
6289 case IA64_OPND_PMC_R3:
6290 case IA64_OPND_PMD_R3:
6291 case IA64_OPND_RR_R3:
6299 odesc = elf64_ia64_operands + idesc->operands[i];
6300 err = (*odesc->insert) (odesc, val, &insn);
6302 as_bad_where (slot->src_file, slot->src_line,
6303 "Bad operand value: %s", err);
6304 if (idesc->flags & IA64_OPCODE_PSEUDO)
6306 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6307 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6309 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6310 (*o2desc->insert) (o2desc, val, &insn);
6312 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6313 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6314 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6316 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6317 (*o2desc->insert) (o2desc, 64 - val, &insn);
6327 int manual_bundling_off = 0, manual_bundling = 0;
6328 enum ia64_unit required_unit, insn_unit = 0;
6329 enum ia64_insn_type type[3], insn_type;
6330 unsigned int template, orig_template;
6331 bfd_vma insn[3] = { -1, -1, -1 };
6332 struct ia64_opcode *idesc;
6333 int end_of_insn_group = 0, user_template = -1;
6334 int n, i, j, first, curr;
6335 unw_rec_list *ptr, *last_ptr, *end_ptr;
6336 bfd_vma t0 = 0, t1 = 0;
6337 struct label_fix *lfix;
6338 struct insn_fix *ifix;
6344 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6345 know (first >= 0 & first < NUM_SLOTS);
6346 n = MIN (3, md.num_slots_in_use);
6348 /* Determine template: user user_template if specified, best match
6351 if (md.slot[first].user_template >= 0)
6352 user_template = template = md.slot[first].user_template;
6355 /* Auto select appropriate template. */
6356 memset (type, 0, sizeof (type));
6358 for (i = 0; i < n; ++i)
6360 if (md.slot[curr].label_fixups && i != 0)
6362 type[i] = md.slot[curr].idesc->type;
6363 curr = (curr + 1) % NUM_SLOTS;
6365 template = best_template[type[0]][type[1]][type[2]];
6368 /* initialize instructions with appropriate nops: */
6369 for (i = 0; i < 3; ++i)
6370 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6374 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6375 from the start of the frag. */
6376 addr_mod = frag_now_fix () & 15;
6377 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6378 as_bad (_("instruction address is not a multiple of 16"));
6379 frag_now->insn_addr = addr_mod;
6380 frag_now->has_code = 1;
6382 /* now fill in slots with as many insns as possible: */
6384 idesc = md.slot[curr].idesc;
6385 end_of_insn_group = 0;
6386 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6388 /* If we have unwind records, we may need to update some now. */
6389 ptr = md.slot[curr].unwind_record;
6392 /* Find the last prologue/body record in the list for the current
6393 insn, and set the slot number for all records up to that point.
6394 This needs to be done now, because prologue/body records refer to
6395 the current point, not the point after the instruction has been
6396 issued. This matters because there may have been nops emitted
6397 meanwhile. Any non-prologue non-body record followed by a
6398 prologue/body record must also refer to the current point. */
6400 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6401 for (; ptr != end_ptr; ptr = ptr->next)
6402 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6403 || ptr->r.type == body)
6407 /* Make last_ptr point one after the last prologue/body
6409 last_ptr = last_ptr->next;
6410 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6413 ptr->slot_number = (unsigned long) f + i;
6414 ptr->slot_frag = frag_now;
6416 /* Remove the initialized records, so that we won't accidentally
6417 update them again if we insert a nop and continue. */
6418 md.slot[curr].unwind_record = last_ptr;
6422 manual_bundling_off = md.slot[curr].manual_bundling_off;
6423 if (md.slot[curr].manual_bundling_on)
6426 manual_bundling = 1;
6428 break; /* Need to start a new bundle. */
6431 if (idesc->flags & IA64_OPCODE_SLOT2)
6433 if (manual_bundling && !manual_bundling_off)
6435 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6436 "`%s' must be last in bundle", idesc->name);
6438 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6442 if (idesc->flags & IA64_OPCODE_LAST)
6445 unsigned int required_template;
6447 /* If we need a stop bit after an M slot, our only choice is
6448 template 5 (M;;MI). If we need a stop bit after a B
6449 slot, our only choice is to place it at the end of the
6450 bundle, because the only available templates are MIB,
6451 MBB, BBB, MMB, and MFB. We don't handle anything other
6452 than M and B slots because these are the only kind of
6453 instructions that can have the IA64_OPCODE_LAST bit set. */
6454 required_template = template;
6455 switch (idesc->type)
6459 required_template = 5;
6467 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6468 "Internal error: don't know how to force %s to end"
6469 "of instruction group", idesc->name);
6474 && (i > required_slot
6475 || (required_slot == 2 && !manual_bundling_off)
6476 || (user_template >= 0
6477 /* Changing from MMI to M;MI is OK. */
6478 && (template ^ required_template) > 1)))
6480 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6481 "`%s' must be last in instruction group",
6483 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6484 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6486 if (required_slot < i)
6487 /* Can't fit this instruction. */
6491 if (required_template != template)
6493 /* If we switch the template, we need to reset the NOPs
6494 after slot i. The slot-types of the instructions ahead
6495 of i never change, so we don't need to worry about
6496 changing NOPs in front of this slot. */
6497 for (j = i; j < 3; ++j)
6498 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6500 template = required_template;
6502 if (curr != first && md.slot[curr].label_fixups)
6504 if (manual_bundling)
6506 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6507 "Label must be first in a bundle");
6508 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6510 /* This insn must go into the first slot of a bundle. */
6514 if (end_of_insn_group && md.num_slots_in_use >= 1)
6516 /* We need an instruction group boundary in the middle of a
6517 bundle. See if we can switch to an other template with
6518 an appropriate boundary. */
6520 orig_template = template;
6521 if (i == 1 && (user_template == 4
6522 || (user_template < 0
6523 && (ia64_templ_desc[template].exec_unit[0]
6527 end_of_insn_group = 0;
6529 else if (i == 2 && (user_template == 0
6530 || (user_template < 0
6531 && (ia64_templ_desc[template].exec_unit[1]
6533 /* This test makes sure we don't switch the template if
6534 the next instruction is one that needs to be first in
6535 an instruction group. Since all those instructions are
6536 in the M group, there is no way such an instruction can
6537 fit in this bundle even if we switch the template. The
6538 reason we have to check for this is that otherwise we
6539 may end up generating "MI;;I M.." which has the deadly
6540 effect that the second M instruction is no longer the
6541 first in the group! --davidm 99/12/16 */
6542 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6545 end_of_insn_group = 0;
6548 && user_template == 0
6549 && !(idesc->flags & IA64_OPCODE_FIRST))
6550 /* Use the next slot. */
6552 else if (curr != first)
6553 /* can't fit this insn */
6556 if (template != orig_template)
6557 /* if we switch the template, we need to reset the NOPs
6558 after slot i. The slot-types of the instructions ahead
6559 of i never change, so we don't need to worry about
6560 changing NOPs in front of this slot. */
6561 for (j = i; j < 3; ++j)
6562 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6564 required_unit = ia64_templ_desc[template].exec_unit[i];
6566 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6567 if (idesc->type == IA64_TYPE_DYN)
6569 enum ia64_opnd opnd1, opnd2;
6571 if ((strcmp (idesc->name, "nop") == 0)
6572 || (strcmp (idesc->name, "hint") == 0)
6573 || (strcmp (idesc->name, "break") == 0))
6574 insn_unit = required_unit;
6575 else if (strcmp (idesc->name, "chk.s") == 0
6576 || strcmp (idesc->name, "mov") == 0)
6578 insn_unit = IA64_UNIT_M;
6579 if (required_unit == IA64_UNIT_I
6580 || (required_unit == IA64_UNIT_F && template == 6))
6581 insn_unit = IA64_UNIT_I;
6584 as_fatal ("emit_one_bundle: unexpected dynamic op");
6586 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6587 opnd1 = idesc->operands[0];
6588 opnd2 = idesc->operands[1];
6589 ia64_free_opcode (idesc);
6590 idesc = ia64_find_opcode (mnemonic);
6591 /* moves to/from ARs have collisions */
6592 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6594 while (idesc != NULL
6595 && (idesc->operands[0] != opnd1
6596 || idesc->operands[1] != opnd2))
6597 idesc = get_next_opcode (idesc);
6599 md.slot[curr].idesc = idesc;
6603 insn_type = idesc->type;
6604 insn_unit = IA64_UNIT_NIL;
6608 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6609 insn_unit = required_unit;
6611 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6612 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6613 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6614 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6615 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6620 if (insn_unit != required_unit)
6622 if (required_unit == IA64_UNIT_L
6623 && insn_unit == IA64_UNIT_I
6624 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6626 /* we got ourselves an MLX template but the current
6627 instruction isn't an X-unit, or an I-unit instruction
6628 that can go into the X slot of an MLX template. Duh. */
6629 if (md.num_slots_in_use >= NUM_SLOTS)
6631 as_bad_where (md.slot[curr].src_file,
6632 md.slot[curr].src_line,
6633 "`%s' can't go in X slot of "
6634 "MLX template", idesc->name);
6635 /* drop this insn so we don't livelock: */
6636 --md.num_slots_in_use;
6640 continue; /* try next slot */
6643 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6645 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6647 md.slot[curr].loc_directive_seen = 0;
6648 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6651 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6652 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6654 build_insn (md.slot + curr, insn + i);
6656 ptr = md.slot[curr].unwind_record;
6659 /* Set slot numbers for all remaining unwind records belonging to the
6660 current insn. There can not be any prologue/body unwind records
6662 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6663 for (; ptr != end_ptr; ptr = ptr->next)
6665 ptr->slot_number = (unsigned long) f + i;
6666 ptr->slot_frag = frag_now;
6668 md.slot[curr].unwind_record = NULL;
6671 if (required_unit == IA64_UNIT_L)
6674 /* skip one slot for long/X-unit instructions */
6677 --md.num_slots_in_use;
6679 /* now is a good time to fix up the labels for this insn: */
6680 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6682 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6683 symbol_set_frag (lfix->sym, frag_now);
6685 /* and fix up the tags also. */
6686 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6688 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6689 symbol_set_frag (lfix->sym, frag_now);
6692 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6694 ifix = md.slot[curr].fixup + j;
6695 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6696 &ifix->expr, ifix->is_pcrel, ifix->code);
6697 fix->tc_fix_data.opnd = ifix->opnd;
6698 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6699 fix->fx_file = md.slot[curr].src_file;
6700 fix->fx_line = md.slot[curr].src_line;
6703 end_of_insn_group = md.slot[curr].end_of_insn_group;
6705 if (end_of_insn_group)
6707 md.group_idx = (md.group_idx + 1) % 3;
6708 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6712 ia64_free_opcode (md.slot[curr].idesc);
6713 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6714 md.slot[curr].user_template = -1;
6716 if (manual_bundling_off)
6718 manual_bundling = 0;
6721 curr = (curr + 1) % NUM_SLOTS;
6722 idesc = md.slot[curr].idesc;
6724 if (manual_bundling > 0)
6726 if (md.num_slots_in_use > 0)
6728 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6729 "`%s' does not fit into %s template",
6730 idesc->name, ia64_templ_desc[template].name);
6731 --md.num_slots_in_use;
6734 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6735 "Missing '}' at end of file");
6737 know (md.num_slots_in_use < NUM_SLOTS);
6739 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6740 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6742 number_to_chars_littleendian (f + 0, t0, 8);
6743 number_to_chars_littleendian (f + 8, t1, 8);
6747 unwind.list->next_slot_number = (unsigned long) f + 16;
6748 unwind.list->next_slot_frag = frag_now;
6753 md_parse_option (c, arg)
6760 /* Switches from the Intel assembler. */
6762 if (strcmp (arg, "ilp64") == 0
6763 || strcmp (arg, "lp64") == 0
6764 || strcmp (arg, "p64") == 0)
6766 md.flags |= EF_IA_64_ABI64;
6768 else if (strcmp (arg, "ilp32") == 0)
6770 md.flags &= ~EF_IA_64_ABI64;
6772 else if (strcmp (arg, "le") == 0)
6774 md.flags &= ~EF_IA_64_BE;
6775 default_big_endian = 0;
6777 else if (strcmp (arg, "be") == 0)
6779 md.flags |= EF_IA_64_BE;
6780 default_big_endian = 1;
6787 if (strcmp (arg, "so") == 0)
6789 /* Suppress signon message. */
6791 else if (strcmp (arg, "pi") == 0)
6793 /* Reject privileged instructions. FIXME */
6795 else if (strcmp (arg, "us") == 0)
6797 /* Allow union of signed and unsigned range. FIXME */
6799 else if (strcmp (arg, "close_fcalls") == 0)
6801 /* Do not resolve global function calls. */
6808 /* temp[="prefix"] Insert temporary labels into the object file
6809 symbol table prefixed by "prefix".
6810 Default prefix is ":temp:".
6815 /* indirect=<tgt> Assume unannotated indirect branches behavior
6816 according to <tgt> --
6817 exit: branch out from the current context (default)
6818 labels: all labels in context may be branch targets
6820 if (strncmp (arg, "indirect=", 9) != 0)
6825 /* -X conflicts with an ignored option, use -x instead */
6827 if (!arg || strcmp (arg, "explicit") == 0)
6829 /* set default mode to explicit */
6830 md.default_explicit_mode = 1;
6833 else if (strcmp (arg, "auto") == 0)
6835 md.default_explicit_mode = 0;
6837 else if (strcmp (arg, "debug") == 0)
6841 else if (strcmp (arg, "debugx") == 0)
6843 md.default_explicit_mode = 1;
6848 as_bad (_("Unrecognized option '-x%s'"), arg);
6853 /* nops Print nops statistics. */
6856 /* GNU specific switches for gcc. */
6857 case OPTION_MCONSTANT_GP:
6858 md.flags |= EF_IA_64_CONS_GP;
6861 case OPTION_MAUTO_PIC:
6862 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6873 md_show_usage (stream)
6878 --mconstant-gp mark output file as using the constant-GP model\n\
6879 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6880 --mauto-pic mark output file as using the constant-GP model\n\
6881 without function descriptors (sets ELF header flag\n\
6882 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6883 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6884 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6885 -x | -xexplicit turn on dependency violation checking (default)\n\
6886 -xauto automagically remove dependency violations\n\
6887 -xdebug debug dependency violation checker\n"),
6892 ia64_after_parse_args ()
6894 if (debug_type == DEBUG_STABS)
6895 as_fatal (_("--gstabs is not supported for ia64"));
6898 /* Return true if TYPE fits in TEMPL at SLOT. */
6901 match (int templ, int type, int slot)
6903 enum ia64_unit unit;
6906 unit = ia64_templ_desc[templ].exec_unit[slot];
6909 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6911 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6913 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6914 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6915 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6916 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6917 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6918 default: result = 0; break;
6923 /* Add a bit of extra goodness if a nop of type F or B would fit
6924 in TEMPL at SLOT. */
6927 extra_goodness (int templ, int slot)
6929 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6931 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6936 /* This function is called once, at assembler startup time. It sets
6937 up all the tables, etc. that the MD part of the assembler will need
6938 that can be determined before arguments are parsed. */
6942 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6947 md.explicit_mode = md.default_explicit_mode;
6949 bfd_set_section_alignment (stdoutput, text_section, 4);
6951 /* Make sure function pointers get initialized. */
6952 target_big_endian = -1;
6953 dot_byteorder (default_big_endian);
6955 alias_hash = hash_new ();
6956 alias_name_hash = hash_new ();
6957 secalias_hash = hash_new ();
6958 secalias_name_hash = hash_new ();
6960 pseudo_func[FUNC_DTP_MODULE].u.sym =
6961 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6962 &zero_address_frag);
6964 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6965 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6966 &zero_address_frag);
6968 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6969 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6970 &zero_address_frag);
6972 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6973 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6974 &zero_address_frag);
6976 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6977 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6978 &zero_address_frag);
6980 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6981 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6982 &zero_address_frag);
6984 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6985 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6986 &zero_address_frag);
6988 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6989 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6990 &zero_address_frag);
6992 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6993 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6994 &zero_address_frag);
6996 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6997 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6998 &zero_address_frag);
7000 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7001 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7002 &zero_address_frag);
7004 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7005 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7006 &zero_address_frag);
7008 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7009 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7010 &zero_address_frag);
7012 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7013 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7014 &zero_address_frag);
7016 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7017 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7018 &zero_address_frag);
7020 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7021 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7022 &zero_address_frag);
7024 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7025 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7026 &zero_address_frag);
7028 /* Compute the table of best templates. We compute goodness as a
7029 base 4 value, in which each match counts for 3, each F counts
7030 for 2, each B counts for 1. This should maximize the number of
7031 F and B nops in the chosen bundles, which is good because these
7032 pipelines are least likely to be overcommitted. */
7033 for (i = 0; i < IA64_NUM_TYPES; ++i)
7034 for (j = 0; j < IA64_NUM_TYPES; ++j)
7035 for (k = 0; k < IA64_NUM_TYPES; ++k)
7038 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7041 if (match (t, i, 0))
7043 if (match (t, j, 1))
7045 if (match (t, k, 2))
7046 goodness = 3 + 3 + 3;
7048 goodness = 3 + 3 + extra_goodness (t, 2);
7050 else if (match (t, j, 2))
7051 goodness = 3 + 3 + extra_goodness (t, 1);
7055 goodness += extra_goodness (t, 1);
7056 goodness += extra_goodness (t, 2);
7059 else if (match (t, i, 1))
7061 if (match (t, j, 2))
7064 goodness = 3 + extra_goodness (t, 2);
7066 else if (match (t, i, 2))
7067 goodness = 3 + extra_goodness (t, 1);
7069 if (goodness > best)
7072 best_template[i][j][k] = t;
7077 for (i = 0; i < NUM_SLOTS; ++i)
7078 md.slot[i].user_template = -1;
7080 md.pseudo_hash = hash_new ();
7081 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7083 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7084 (void *) (pseudo_opcode + i));
7086 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7087 pseudo_opcode[i].name, err);
7090 md.reg_hash = hash_new ();
7091 md.dynreg_hash = hash_new ();
7092 md.const_hash = hash_new ();
7093 md.entry_hash = hash_new ();
7095 /* general registers: */
7098 for (i = 0; i < total; ++i)
7100 sprintf (name, "r%d", i - REG_GR);
7101 md.regsym[i] = declare_register (name, i);
7104 /* floating point registers: */
7106 for (; i < total; ++i)
7108 sprintf (name, "f%d", i - REG_FR);
7109 md.regsym[i] = declare_register (name, i);
7112 /* application registers: */
7115 for (; i < total; ++i)
7117 sprintf (name, "ar%d", i - REG_AR);
7118 md.regsym[i] = declare_register (name, i);
7121 /* control registers: */
7124 for (; i < total; ++i)
7126 sprintf (name, "cr%d", i - REG_CR);
7127 md.regsym[i] = declare_register (name, i);
7130 /* predicate registers: */
7132 for (; i < total; ++i)
7134 sprintf (name, "p%d", i - REG_P);
7135 md.regsym[i] = declare_register (name, i);
7138 /* branch registers: */
7140 for (; i < total; ++i)
7142 sprintf (name, "b%d", i - REG_BR);
7143 md.regsym[i] = declare_register (name, i);
7146 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7147 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7148 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7149 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7150 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7151 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7152 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7154 for (i = 0; i < NELEMS (indirect_reg); ++i)
7156 regnum = indirect_reg[i].regnum;
7157 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7160 /* define synonyms for application registers: */
7161 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7162 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7163 REG_AR + ar[i - REG_AR].regnum);
7165 /* define synonyms for control registers: */
7166 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7167 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7168 REG_CR + cr[i - REG_CR].regnum);
7170 declare_register ("gp", REG_GR + 1);
7171 declare_register ("sp", REG_GR + 12);
7172 declare_register ("rp", REG_BR + 0);
7174 /* pseudo-registers used to specify unwind info: */
7175 declare_register ("psp", REG_PSP);
7177 declare_register_set ("ret", 4, REG_GR + 8);
7178 declare_register_set ("farg", 8, REG_FR + 8);
7179 declare_register_set ("fret", 8, REG_FR + 8);
7181 for (i = 0; i < NELEMS (const_bits); ++i)
7183 err = hash_insert (md.const_hash, const_bits[i].name,
7184 (PTR) (const_bits + i));
7186 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7190 /* Set the architecture and machine depending on defaults and command line
7192 if (md.flags & EF_IA_64_ABI64)
7193 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7195 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7198 as_warn (_("Could not set architecture and machine"));
7200 /* Set the pointer size and pointer shift size depending on md.flags */
7202 if (md.flags & EF_IA_64_ABI64)
7204 md.pointer_size = 8; /* pointers are 8 bytes */
7205 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7209 md.pointer_size = 4; /* pointers are 4 bytes */
7210 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7213 md.mem_offset.hint = 0;
7216 md.entry_labels = NULL;
7219 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
7220 because that is called after md_parse_option which is where we do the
7221 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
7222 default endianness. */
7225 ia64_init (argc, argv)
7226 int argc ATTRIBUTE_UNUSED;
7227 char **argv ATTRIBUTE_UNUSED;
7229 md.flags = MD_FLAGS_DEFAULT;
7232 /* Return a string for the target object file format. */
7235 ia64_target_format ()
7237 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7239 if (md.flags & EF_IA_64_BE)
7241 if (md.flags & EF_IA_64_ABI64)
7242 #if defined(TE_AIX50)
7243 return "elf64-ia64-aix-big";
7244 #elif defined(TE_HPUX)
7245 return "elf64-ia64-hpux-big";
7247 return "elf64-ia64-big";
7250 #if defined(TE_AIX50)
7251 return "elf32-ia64-aix-big";
7252 #elif defined(TE_HPUX)
7253 return "elf32-ia64-hpux-big";
7255 return "elf32-ia64-big";
7260 if (md.flags & EF_IA_64_ABI64)
7262 return "elf64-ia64-aix-little";
7264 return "elf64-ia64-little";
7268 return "elf32-ia64-aix-little";
7270 return "elf32-ia64-little";
7275 return "unknown-format";
7279 ia64_end_of_source ()
7281 /* terminate insn group upon reaching end of file: */
7282 insn_group_break (1, 0, 0);
7284 /* emits slots we haven't written yet: */
7285 ia64_flush_insns ();
7287 bfd_set_private_flags (stdoutput, md.flags);
7289 md.mem_offset.hint = 0;
7295 if (md.qp.X_op == O_register)
7296 as_bad ("qualifying predicate not followed by instruction");
7297 md.qp.X_op = O_absent;
7299 if (ignore_input ())
7302 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7304 if (md.detect_dv && !md.explicit_mode)
7305 as_warn (_("Explicit stops are ignored in auto mode"));
7307 insn_group_break (1, 0, 0);
7311 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7313 static int defining_tag = 0;
7316 ia64_unrecognized_line (ch)
7322 expression (&md.qp);
7323 if (*input_line_pointer++ != ')')
7325 as_bad ("Expected ')'");
7328 if (md.qp.X_op != O_register)
7330 as_bad ("Qualifying predicate expected");
7333 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7335 as_bad ("Predicate register expected");
7341 if (md.manual_bundling)
7342 as_warn ("Found '{' when manual bundling is already turned on");
7344 CURR_SLOT.manual_bundling_on = 1;
7345 md.manual_bundling = 1;
7347 /* Bundling is only acceptable in explicit mode
7348 or when in default automatic mode. */
7349 if (md.detect_dv && !md.explicit_mode)
7351 if (!md.mode_explicitly_set
7352 && !md.default_explicit_mode)
7355 as_warn (_("Found '{' after explicit switch to automatic mode"));
7360 if (!md.manual_bundling)
7361 as_warn ("Found '}' when manual bundling is off");
7363 PREV_SLOT.manual_bundling_off = 1;
7364 md.manual_bundling = 0;
7366 /* switch back to automatic mode, if applicable */
7369 && !md.mode_explicitly_set
7370 && !md.default_explicit_mode)
7373 /* Allow '{' to follow on the same line. We also allow ";;", but that
7374 happens automatically because ';' is an end of line marker. */
7376 if (input_line_pointer[0] == '{')
7378 input_line_pointer++;
7379 return ia64_unrecognized_line ('{');
7382 demand_empty_rest_of_line ();
7392 if (md.qp.X_op == O_register)
7394 as_bad ("Tag must come before qualifying predicate.");
7398 /* This implements just enough of read_a_source_file in read.c to
7399 recognize labels. */
7400 if (is_name_beginner (*input_line_pointer))
7402 s = input_line_pointer;
7403 c = get_symbol_end ();
7405 else if (LOCAL_LABELS_FB
7406 && ISDIGIT (*input_line_pointer))
7409 while (ISDIGIT (*input_line_pointer))
7410 temp = (temp * 10) + *input_line_pointer++ - '0';
7411 fb_label_instance_inc (temp);
7412 s = fb_label_name (temp, 0);
7413 c = *input_line_pointer;
7422 /* Put ':' back for error messages' sake. */
7423 *input_line_pointer++ = ':';
7424 as_bad ("Expected ':'");
7431 /* Put ':' back for error messages' sake. */
7432 *input_line_pointer++ = ':';
7433 if (*input_line_pointer++ != ']')
7435 as_bad ("Expected ']'");
7440 as_bad ("Tag name expected");
7450 /* Not a valid line. */
7455 ia64_frob_label (sym)
7458 struct label_fix *fix;
7460 /* Tags need special handling since they are not bundle breaks like
7464 fix = obstack_alloc (¬es, sizeof (*fix));
7466 fix->next = CURR_SLOT.tag_fixups;
7467 CURR_SLOT.tag_fixups = fix;
7472 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7474 md.last_text_seg = now_seg;
7475 fix = obstack_alloc (¬es, sizeof (*fix));
7477 fix->next = CURR_SLOT.label_fixups;
7478 CURR_SLOT.label_fixups = fix;
7480 /* Keep track of how many code entry points we've seen. */
7481 if (md.path == md.maxpaths)
7484 md.entry_labels = (const char **)
7485 xrealloc ((void *) md.entry_labels,
7486 md.maxpaths * sizeof (char *));
7488 md.entry_labels[md.path++] = S_GET_NAME (sym);
7493 /* The HP-UX linker will give unresolved symbol errors for symbols
7494 that are declared but unused. This routine removes declared,
7495 unused symbols from an object. */
7497 ia64_frob_symbol (sym)
7500 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7501 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7502 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7503 && ! S_IS_EXTERNAL (sym)))
7510 ia64_flush_pending_output ()
7512 if (!md.keep_pending_output
7513 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7515 /* ??? This causes many unnecessary stop bits to be emitted.
7516 Unfortunately, it isn't clear if it is safe to remove this. */
7517 insn_group_break (1, 0, 0);
7518 ia64_flush_insns ();
7522 /* Do ia64-specific expression optimization. All that's done here is
7523 to transform index expressions that are either due to the indexing
7524 of rotating registers or due to the indexing of indirect register
7527 ia64_optimize_expr (l, op, r)
7536 if (l->X_op == O_register && r->X_op == O_constant)
7538 num_regs = (l->X_add_number >> 16);
7539 if ((unsigned) r->X_add_number >= num_regs)
7542 as_bad ("No current frame");
7544 as_bad ("Index out of range 0..%u", num_regs - 1);
7545 r->X_add_number = 0;
7547 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7550 else if (l->X_op == O_register && r->X_op == O_register)
7552 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7553 || l->X_add_number == IND_MEM)
7555 as_bad ("Indirect register set name expected");
7556 l->X_add_number = IND_CPUID;
7559 l->X_op_symbol = md.regsym[l->X_add_number];
7560 l->X_add_number = r->X_add_number;
7568 ia64_parse_name (name, e)
7572 struct const_desc *cdesc;
7573 struct dynreg *dr = 0;
7574 unsigned int regnum;
7578 /* first see if NAME is a known register name: */
7579 sym = hash_find (md.reg_hash, name);
7582 e->X_op = O_register;
7583 e->X_add_number = S_GET_VALUE (sym);
7587 cdesc = hash_find (md.const_hash, name);
7590 e->X_op = O_constant;
7591 e->X_add_number = cdesc->value;
7595 /* check for inN, locN, or outN: */
7599 if (name[1] == 'n' && ISDIGIT (name[2]))
7607 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7615 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7628 /* The name is inN, locN, or outN; parse the register number. */
7629 regnum = strtoul (name, &end, 10);
7630 if (end > name && *end == '\0')
7632 if ((unsigned) regnum >= dr->num_regs)
7635 as_bad ("No current frame");
7637 as_bad ("Register number out of range 0..%u",
7641 e->X_op = O_register;
7642 e->X_add_number = dr->base + regnum;
7647 if ((dr = hash_find (md.dynreg_hash, name)))
7649 /* We've got ourselves the name of a rotating register set.
7650 Store the base register number in the low 16 bits of
7651 X_add_number and the size of the register set in the top 16
7653 e->X_op = O_register;
7654 e->X_add_number = dr->base | (dr->num_regs << 16);
7660 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7663 ia64_canonicalize_symbol_name (name)
7666 size_t len = strlen (name);
7667 if (len > 1 && name[len - 1] == '#')
7668 name[len - 1] = '\0';
7672 /* Return true if idesc is a conditional branch instruction. This excludes
7673 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7674 because they always read/write resources regardless of the value of the
7675 qualifying predicate. br.ia must always use p0, and hence is always
7676 taken. Thus this function returns true for branches which can fall
7677 through, and which use no resources if they do fall through. */
7680 is_conditional_branch (idesc)
7681 struct ia64_opcode *idesc;
7683 /* br is a conditional branch. Everything that starts with br. except
7684 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7685 Everything that starts with brl is a conditional branch. */
7686 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7687 && (idesc->name[2] == '\0'
7688 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7689 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7690 || idesc->name[2] == 'l'
7691 /* br.cond, br.call, br.clr */
7692 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7693 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7694 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7697 /* Return whether the given opcode is a taken branch. If there's any doubt,
7701 is_taken_branch (idesc)
7702 struct ia64_opcode *idesc;
7704 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7705 || strncmp (idesc->name, "br.ia", 5) == 0);
7708 /* Return whether the given opcode is an interruption or rfi. If there's any
7709 doubt, returns zero. */
7712 is_interruption_or_rfi (idesc)
7713 struct ia64_opcode *idesc;
7715 if (strcmp (idesc->name, "rfi") == 0)
7720 /* Returns the index of the given dependency in the opcode's list of chks, or
7721 -1 if there is no dependency. */
7724 depends_on (depind, idesc)
7726 struct ia64_opcode *idesc;
7729 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7730 for (i = 0; i < dep->nchks; i++)
7732 if (depind == DEP (dep->chks[i]))
7738 /* Determine a set of specific resources used for a particular resource
7739 class. Returns the number of specific resources identified For those
7740 cases which are not determinable statically, the resource returned is
7743 Meanings of value in 'NOTE':
7744 1) only read/write when the register number is explicitly encoded in the
7746 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7747 accesses CFM when qualifying predicate is in the rotating region.
7748 3) general register value is used to specify an indirect register; not
7749 determinable statically.
7750 4) only read the given resource when bits 7:0 of the indirect index
7751 register value does not match the register number of the resource; not
7752 determinable statically.
7753 5) all rules are implementation specific.
7754 6) only when both the index specified by the reader and the index specified
7755 by the writer have the same value in bits 63:61; not determinable
7757 7) only access the specified resource when the corresponding mask bit is
7759 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7760 only read when these insns reference FR2-31
7761 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7762 written when these insns write FR32-127
7763 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7765 11) The target predicates are written independently of PR[qp], but source
7766 registers are only read if PR[qp] is true. Since the state of PR[qp]
7767 cannot statically be determined, all source registers are marked used.
7768 12) This insn only reads the specified predicate register when that
7769 register is the PR[qp].
7770 13) This reference to ld-c only applies to teh GR whose value is loaded
7771 with data returned from memory, not the post-incremented address register.
7772 14) The RSE resource includes the implementation-specific RSE internal
7773 state resources. At least one (and possibly more) of these resources are
7774 read by each instruction listed in IC:rse-readers. At least one (and
7775 possibly more) of these resources are written by each insn listed in
7777 15+16) Represents reserved instructions, which the assembler does not
7780 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7781 this code; there are no dependency violations based on memory access.
7784 #define MAX_SPECS 256
7789 specify_resource (dep, idesc, type, specs, note, path)
7790 const struct ia64_dependency *dep;
7791 struct ia64_opcode *idesc;
7792 int type; /* is this a DV chk or a DV reg? */
7793 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7794 int note; /* resource note for this insn's usage */
7795 int path; /* which execution path to examine */
7802 if (dep->mode == IA64_DV_WAW
7803 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7804 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7807 /* template for any resources we identify */
7808 tmpl.dependency = dep;
7810 tmpl.insn_srlz = tmpl.data_srlz = 0;
7811 tmpl.qp_regno = CURR_SLOT.qp_regno;
7812 tmpl.link_to_qp_branch = 1;
7813 tmpl.mem_offset.hint = 0;
7816 tmpl.cmp_type = CMP_NONE;
7819 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7820 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7821 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7823 /* we don't need to track these */
7824 if (dep->semantics == IA64_DVS_NONE)
7827 switch (dep->specifier)
7832 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7834 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7835 if (regno >= 0 && regno <= 7)
7837 specs[count] = tmpl;
7838 specs[count++].index = regno;
7844 for (i = 0; i < 8; i++)
7846 specs[count] = tmpl;
7847 specs[count++].index = i;
7856 case IA64_RS_AR_UNAT:
7857 /* This is a mov =AR or mov AR= instruction. */
7858 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7860 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7861 if (regno == AR_UNAT)
7863 specs[count++] = tmpl;
7868 /* This is a spill/fill, or other instruction that modifies the
7871 /* Unless we can determine the specific bits used, mark the whole
7872 thing; bits 8:3 of the memory address indicate the bit used in
7873 UNAT. The .mem.offset hint may be used to eliminate a small
7874 subset of conflicts. */
7875 specs[count] = tmpl;
7876 if (md.mem_offset.hint)
7879 fprintf (stderr, " Using hint for spill/fill\n");
7880 /* The index isn't actually used, just set it to something
7881 approximating the bit index. */
7882 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7883 specs[count].mem_offset.hint = 1;
7884 specs[count].mem_offset.offset = md.mem_offset.offset;
7885 specs[count++].mem_offset.base = md.mem_offset.base;
7889 specs[count++].specific = 0;
7897 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7899 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7900 if ((regno >= 8 && regno <= 15)
7901 || (regno >= 20 && regno <= 23)
7902 || (regno >= 31 && regno <= 39)
7903 || (regno >= 41 && regno <= 47)
7904 || (regno >= 67 && regno <= 111))
7906 specs[count] = tmpl;
7907 specs[count++].index = regno;
7920 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7922 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7923 if ((regno >= 48 && regno <= 63)
7924 || (regno >= 112 && regno <= 127))
7926 specs[count] = tmpl;
7927 specs[count++].index = regno;
7933 for (i = 48; i < 64; i++)
7935 specs[count] = tmpl;
7936 specs[count++].index = i;
7938 for (i = 112; i < 128; i++)
7940 specs[count] = tmpl;
7941 specs[count++].index = i;
7959 for (i = 0; i < idesc->num_outputs; i++)
7960 if (idesc->operands[i] == IA64_OPND_B1
7961 || idesc->operands[i] == IA64_OPND_B2)
7963 specs[count] = tmpl;
7964 specs[count++].index =
7965 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7970 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7971 if (idesc->operands[i] == IA64_OPND_B1
7972 || idesc->operands[i] == IA64_OPND_B2)
7974 specs[count] = tmpl;
7975 specs[count++].index =
7976 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7982 case IA64_RS_CPUID: /* four or more registers */
7985 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7987 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7988 if (regno >= 0 && regno < NELEMS (gr_values)
7991 specs[count] = tmpl;
7992 specs[count++].index = gr_values[regno].value & 0xFF;
7996 specs[count] = tmpl;
7997 specs[count++].specific = 0;
8007 case IA64_RS_DBR: /* four or more registers */
8010 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8012 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8013 if (regno >= 0 && regno < NELEMS (gr_values)
8016 specs[count] = tmpl;
8017 specs[count++].index = gr_values[regno].value & 0xFF;
8021 specs[count] = tmpl;
8022 specs[count++].specific = 0;
8026 else if (note == 0 && !rsrc_write)
8028 specs[count] = tmpl;
8029 specs[count++].specific = 0;
8037 case IA64_RS_IBR: /* four or more registers */
8040 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8042 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8043 if (regno >= 0 && regno < NELEMS (gr_values)
8046 specs[count] = tmpl;
8047 specs[count++].index = gr_values[regno].value & 0xFF;
8051 specs[count] = tmpl;
8052 specs[count++].specific = 0;
8065 /* These are implementation specific. Force all references to
8066 conflict with all other references. */
8067 specs[count] = tmpl;
8068 specs[count++].specific = 0;
8076 case IA64_RS_PKR: /* 16 or more registers */
8077 if (note == 3 || note == 4)
8079 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8081 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8082 if (regno >= 0 && regno < NELEMS (gr_values)
8087 specs[count] = tmpl;
8088 specs[count++].index = gr_values[regno].value & 0xFF;
8091 for (i = 0; i < NELEMS (gr_values); i++)
8093 /* Uses all registers *except* the one in R3. */
8094 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8096 specs[count] = tmpl;
8097 specs[count++].index = i;
8103 specs[count] = tmpl;
8104 specs[count++].specific = 0;
8111 specs[count] = tmpl;
8112 specs[count++].specific = 0;
8116 case IA64_RS_PMC: /* four or more registers */
8119 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8120 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8123 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8125 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8126 if (regno >= 0 && regno < NELEMS (gr_values)
8129 specs[count] = tmpl;
8130 specs[count++].index = gr_values[regno].value & 0xFF;
8134 specs[count] = tmpl;
8135 specs[count++].specific = 0;
8145 case IA64_RS_PMD: /* four or more registers */
8148 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8150 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8151 if (regno >= 0 && regno < NELEMS (gr_values)
8154 specs[count] = tmpl;
8155 specs[count++].index = gr_values[regno].value & 0xFF;
8159 specs[count] = tmpl;
8160 specs[count++].specific = 0;
8170 case IA64_RS_RR: /* eight registers */
8173 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8175 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8176 if (regno >= 0 && regno < NELEMS (gr_values)
8179 specs[count] = tmpl;
8180 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8184 specs[count] = tmpl;
8185 specs[count++].specific = 0;
8189 else if (note == 0 && !rsrc_write)
8191 specs[count] = tmpl;
8192 specs[count++].specific = 0;
8200 case IA64_RS_CR_IRR:
8203 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8204 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8206 && idesc->operands[1] == IA64_OPND_CR3
8209 for (i = 0; i < 4; i++)
8211 specs[count] = tmpl;
8212 specs[count++].index = CR_IRR0 + i;
8218 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8219 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8221 && regno <= CR_IRR3)
8223 specs[count] = tmpl;
8224 specs[count++].index = regno;
8233 case IA64_RS_CR_LRR:
8240 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8241 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8242 && (regno == CR_LRR0 || regno == CR_LRR1))
8244 specs[count] = tmpl;
8245 specs[count++].index = regno;
8253 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8255 specs[count] = tmpl;
8256 specs[count++].index =
8257 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8272 else if (rsrc_write)
8274 if (dep->specifier == IA64_RS_FRb
8275 && idesc->operands[0] == IA64_OPND_F1)
8277 specs[count] = tmpl;
8278 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8283 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8285 if (idesc->operands[i] == IA64_OPND_F2
8286 || idesc->operands[i] == IA64_OPND_F3
8287 || idesc->operands[i] == IA64_OPND_F4)
8289 specs[count] = tmpl;
8290 specs[count++].index =
8291 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8300 /* This reference applies only to the GR whose value is loaded with
8301 data returned from memory. */
8302 specs[count] = tmpl;
8303 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8309 for (i = 0; i < idesc->num_outputs; i++)
8310 if (idesc->operands[i] == IA64_OPND_R1
8311 || idesc->operands[i] == IA64_OPND_R2
8312 || idesc->operands[i] == IA64_OPND_R3)
8314 specs[count] = tmpl;
8315 specs[count++].index =
8316 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8318 if (idesc->flags & IA64_OPCODE_POSTINC)
8319 for (i = 0; i < NELEMS (idesc->operands); i++)
8320 if (idesc->operands[i] == IA64_OPND_MR3)
8322 specs[count] = tmpl;
8323 specs[count++].index =
8324 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8329 /* Look for anything that reads a GR. */
8330 for (i = 0; i < NELEMS (idesc->operands); i++)
8332 if (idesc->operands[i] == IA64_OPND_MR3
8333 || idesc->operands[i] == IA64_OPND_CPUID_R3
8334 || idesc->operands[i] == IA64_OPND_DBR_R3
8335 || idesc->operands[i] == IA64_OPND_IBR_R3
8336 || idesc->operands[i] == IA64_OPND_MSR_R3
8337 || idesc->operands[i] == IA64_OPND_PKR_R3
8338 || idesc->operands[i] == IA64_OPND_PMC_R3
8339 || idesc->operands[i] == IA64_OPND_PMD_R3
8340 || idesc->operands[i] == IA64_OPND_RR_R3
8341 || ((i >= idesc->num_outputs)
8342 && (idesc->operands[i] == IA64_OPND_R1
8343 || idesc->operands[i] == IA64_OPND_R2
8344 || idesc->operands[i] == IA64_OPND_R3
8345 /* addl source register. */
8346 || idesc->operands[i] == IA64_OPND_R3_2)))
8348 specs[count] = tmpl;
8349 specs[count++].index =
8350 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8361 /* This is the same as IA64_RS_PRr, except that the register range is
8362 from 1 - 15, and there are no rotating register reads/writes here. */
8366 for (i = 1; i < 16; i++)
8368 specs[count] = tmpl;
8369 specs[count++].index = i;
8375 /* Mark only those registers indicated by the mask. */
8378 mask = CURR_SLOT.opnd[2].X_add_number;
8379 for (i = 1; i < 16; i++)
8380 if (mask & ((valueT) 1 << i))
8382 specs[count] = tmpl;
8383 specs[count++].index = i;
8391 else if (note == 11) /* note 11 implies note 1 as well */
8395 for (i = 0; i < idesc->num_outputs; i++)
8397 if (idesc->operands[i] == IA64_OPND_P1
8398 || idesc->operands[i] == IA64_OPND_P2)
8400 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8401 if (regno >= 1 && regno < 16)
8403 specs[count] = tmpl;
8404 specs[count++].index = regno;
8414 else if (note == 12)
8416 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8418 specs[count] = tmpl;
8419 specs[count++].index = CURR_SLOT.qp_regno;
8426 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8427 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8428 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8429 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8431 if ((idesc->operands[0] == IA64_OPND_P1
8432 || idesc->operands[0] == IA64_OPND_P2)
8433 && p1 >= 1 && p1 < 16)
8435 specs[count] = tmpl;
8436 specs[count].cmp_type =
8437 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8438 specs[count++].index = p1;
8440 if ((idesc->operands[1] == IA64_OPND_P1
8441 || idesc->operands[1] == IA64_OPND_P2)
8442 && p2 >= 1 && p2 < 16)
8444 specs[count] = tmpl;
8445 specs[count].cmp_type =
8446 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8447 specs[count++].index = p2;
8452 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8454 specs[count] = tmpl;
8455 specs[count++].index = CURR_SLOT.qp_regno;
8457 if (idesc->operands[1] == IA64_OPND_PR)
8459 for (i = 1; i < 16; i++)
8461 specs[count] = tmpl;
8462 specs[count++].index = i;
8473 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8474 simplified cases of this. */
8478 for (i = 16; i < 63; i++)
8480 specs[count] = tmpl;
8481 specs[count++].index = i;
8487 /* Mark only those registers indicated by the mask. */
8489 && idesc->operands[0] == IA64_OPND_PR)
8491 mask = CURR_SLOT.opnd[2].X_add_number;
8492 if (mask & ((valueT) 1 << 16))
8493 for (i = 16; i < 63; i++)
8495 specs[count] = tmpl;
8496 specs[count++].index = i;
8500 && idesc->operands[0] == IA64_OPND_PR_ROT)
8502 for (i = 16; i < 63; i++)
8504 specs[count] = tmpl;
8505 specs[count++].index = i;
8513 else if (note == 11) /* note 11 implies note 1 as well */
8517 for (i = 0; i < idesc->num_outputs; i++)
8519 if (idesc->operands[i] == IA64_OPND_P1
8520 || idesc->operands[i] == IA64_OPND_P2)
8522 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8523 if (regno >= 16 && regno < 63)
8525 specs[count] = tmpl;
8526 specs[count++].index = regno;
8536 else if (note == 12)
8538 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8540 specs[count] = tmpl;
8541 specs[count++].index = CURR_SLOT.qp_regno;
8548 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8549 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8550 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8551 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8553 if ((idesc->operands[0] == IA64_OPND_P1
8554 || idesc->operands[0] == IA64_OPND_P2)
8555 && p1 >= 16 && p1 < 63)
8557 specs[count] = tmpl;
8558 specs[count].cmp_type =
8559 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8560 specs[count++].index = p1;
8562 if ((idesc->operands[1] == IA64_OPND_P1
8563 || idesc->operands[1] == IA64_OPND_P2)
8564 && p2 >= 16 && p2 < 63)
8566 specs[count] = tmpl;
8567 specs[count].cmp_type =
8568 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8569 specs[count++].index = p2;
8574 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8576 specs[count] = tmpl;
8577 specs[count++].index = CURR_SLOT.qp_regno;
8579 if (idesc->operands[1] == IA64_OPND_PR)
8581 for (i = 16; i < 63; i++)
8583 specs[count] = tmpl;
8584 specs[count++].index = i;
8596 /* Verify that the instruction is using the PSR bit indicated in
8600 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8602 if (dep->regindex < 6)
8604 specs[count++] = tmpl;
8607 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8609 if (dep->regindex < 32
8610 || dep->regindex == 35
8611 || dep->regindex == 36
8612 || (!rsrc_write && dep->regindex == PSR_CPL))
8614 specs[count++] = tmpl;
8617 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8619 if (dep->regindex < 32
8620 || dep->regindex == 35
8621 || dep->regindex == 36
8622 || (rsrc_write && dep->regindex == PSR_CPL))
8624 specs[count++] = tmpl;
8629 /* Several PSR bits have very specific dependencies. */
8630 switch (dep->regindex)
8633 specs[count++] = tmpl;
8638 specs[count++] = tmpl;
8642 /* Only certain CR accesses use PSR.ic */
8643 if (idesc->operands[0] == IA64_OPND_CR3
8644 || idesc->operands[1] == IA64_OPND_CR3)
8647 ((idesc->operands[0] == IA64_OPND_CR3)
8650 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8665 specs[count++] = tmpl;
8674 specs[count++] = tmpl;
8678 /* Only some AR accesses use cpl */
8679 if (idesc->operands[0] == IA64_OPND_AR3
8680 || idesc->operands[1] == IA64_OPND_AR3)
8683 ((idesc->operands[0] == IA64_OPND_AR3)
8686 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8693 && regno <= AR_K7))))
8695 specs[count++] = tmpl;
8700 specs[count++] = tmpl;
8710 if (idesc->operands[0] == IA64_OPND_IMMU24)
8712 mask = CURR_SLOT.opnd[0].X_add_number;
8718 if (mask & ((valueT) 1 << dep->regindex))
8720 specs[count++] = tmpl;
8725 int min = dep->regindex == PSR_DFL ? 2 : 32;
8726 int max = dep->regindex == PSR_DFL ? 31 : 127;
8727 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8728 for (i = 0; i < NELEMS (idesc->operands); i++)
8730 if (idesc->operands[i] == IA64_OPND_F1
8731 || idesc->operands[i] == IA64_OPND_F2
8732 || idesc->operands[i] == IA64_OPND_F3
8733 || idesc->operands[i] == IA64_OPND_F4)
8735 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8736 if (reg >= min && reg <= max)
8738 specs[count++] = tmpl;
8745 int min = dep->regindex == PSR_MFL ? 2 : 32;
8746 int max = dep->regindex == PSR_MFL ? 31 : 127;
8747 /* mfh is read on writes to FR32-127; mfl is read on writes to
8749 for (i = 0; i < idesc->num_outputs; i++)
8751 if (idesc->operands[i] == IA64_OPND_F1)
8753 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8754 if (reg >= min && reg <= max)
8756 specs[count++] = tmpl;
8761 else if (note == 10)
8763 for (i = 0; i < NELEMS (idesc->operands); i++)
8765 if (idesc->operands[i] == IA64_OPND_R1
8766 || idesc->operands[i] == IA64_OPND_R2
8767 || idesc->operands[i] == IA64_OPND_R3)
8769 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8770 if (regno >= 16 && regno <= 31)
8772 specs[count++] = tmpl;
8783 case IA64_RS_AR_FPSR:
8784 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8786 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8787 if (regno == AR_FPSR)
8789 specs[count++] = tmpl;
8794 specs[count++] = tmpl;
8799 /* Handle all AR[REG] resources */
8800 if (note == 0 || note == 1)
8802 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8803 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8804 && regno == dep->regindex)
8806 specs[count++] = tmpl;
8808 /* other AR[REG] resources may be affected by AR accesses */
8809 else if (idesc->operands[0] == IA64_OPND_AR3)
8812 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8813 switch (dep->regindex)
8819 if (regno == AR_BSPSTORE)
8821 specs[count++] = tmpl;
8825 (regno == AR_BSPSTORE
8826 || regno == AR_RNAT))
8828 specs[count++] = tmpl;
8833 else if (idesc->operands[1] == IA64_OPND_AR3)
8836 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8837 switch (dep->regindex)
8842 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8844 specs[count++] = tmpl;
8851 specs[count++] = tmpl;
8861 /* Handle all CR[REG] resources */
8862 if (note == 0 || note == 1)
8864 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8866 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8867 if (regno == dep->regindex)
8869 specs[count++] = tmpl;
8871 else if (!rsrc_write)
8873 /* Reads from CR[IVR] affect other resources. */
8874 if (regno == CR_IVR)
8876 if ((dep->regindex >= CR_IRR0
8877 && dep->regindex <= CR_IRR3)
8878 || dep->regindex == CR_TPR)
8880 specs[count++] = tmpl;
8887 specs[count++] = tmpl;
8896 case IA64_RS_INSERVICE:
8897 /* look for write of EOI (67) or read of IVR (65) */
8898 if ((idesc->operands[0] == IA64_OPND_CR3
8899 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8900 || (idesc->operands[1] == IA64_OPND_CR3
8901 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8903 specs[count++] = tmpl;
8910 specs[count++] = tmpl;
8921 specs[count++] = tmpl;
8925 /* Check if any of the registers accessed are in the rotating region.
8926 mov to/from pr accesses CFM only when qp_regno is in the rotating
8928 for (i = 0; i < NELEMS (idesc->operands); i++)
8930 if (idesc->operands[i] == IA64_OPND_R1
8931 || idesc->operands[i] == IA64_OPND_R2
8932 || idesc->operands[i] == IA64_OPND_R3)
8934 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8935 /* Assumes that md.rot.num_regs is always valid */
8936 if (md.rot.num_regs > 0
8938 && num < 31 + md.rot.num_regs)
8940 specs[count] = tmpl;
8941 specs[count++].specific = 0;
8944 else if (idesc->operands[i] == IA64_OPND_F1
8945 || idesc->operands[i] == IA64_OPND_F2
8946 || idesc->operands[i] == IA64_OPND_F3
8947 || idesc->operands[i] == IA64_OPND_F4)
8949 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8952 specs[count] = tmpl;
8953 specs[count++].specific = 0;
8956 else if (idesc->operands[i] == IA64_OPND_P1
8957 || idesc->operands[i] == IA64_OPND_P2)
8959 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8962 specs[count] = tmpl;
8963 specs[count++].specific = 0;
8967 if (CURR_SLOT.qp_regno > 15)
8969 specs[count] = tmpl;
8970 specs[count++].specific = 0;
8975 /* This is the same as IA64_RS_PRr, except simplified to account for
8976 the fact that there is only one register. */
8980 specs[count++] = tmpl;
8985 if (idesc->operands[2] == IA64_OPND_IMM17)
8986 mask = CURR_SLOT.opnd[2].X_add_number;
8987 if (mask & ((valueT) 1 << 63))
8988 specs[count++] = tmpl;
8990 else if (note == 11)
8992 if ((idesc->operands[0] == IA64_OPND_P1
8993 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8994 || (idesc->operands[1] == IA64_OPND_P2
8995 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8997 specs[count++] = tmpl;
9000 else if (note == 12)
9002 if (CURR_SLOT.qp_regno == 63)
9004 specs[count++] = tmpl;
9011 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9012 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9013 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9014 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9017 && (idesc->operands[0] == IA64_OPND_P1
9018 || idesc->operands[0] == IA64_OPND_P2))
9020 specs[count] = tmpl;
9021 specs[count++].cmp_type =
9022 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9025 && (idesc->operands[1] == IA64_OPND_P1
9026 || idesc->operands[1] == IA64_OPND_P2))
9028 specs[count] = tmpl;
9029 specs[count++].cmp_type =
9030 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9035 if (CURR_SLOT.qp_regno == 63)
9037 specs[count++] = tmpl;
9048 /* FIXME we can identify some individual RSE written resources, but RSE
9049 read resources have not yet been completely identified, so for now
9050 treat RSE as a single resource */
9051 if (strncmp (idesc->name, "mov", 3) == 0)
9055 if (idesc->operands[0] == IA64_OPND_AR3
9056 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9058 specs[count] = tmpl;
9059 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9064 if (idesc->operands[0] == IA64_OPND_AR3)
9066 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9067 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9069 specs[count++] = tmpl;
9072 else if (idesc->operands[1] == IA64_OPND_AR3)
9074 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9075 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9076 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9078 specs[count++] = tmpl;
9085 specs[count++] = tmpl;
9090 /* FIXME -- do any of these need to be non-specific? */
9091 specs[count++] = tmpl;
9095 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9102 /* Clear branch flags on marked resources. This breaks the link between the
9103 QP of the marking instruction and a subsequent branch on the same QP. */
9106 clear_qp_branch_flag (mask)
9110 for (i = 0; i < regdepslen; i++)
9112 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9113 if ((bit & mask) != 0)
9115 regdeps[i].link_to_qp_branch = 0;
9120 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9121 any mutexes which contain one of the PRs and create new ones when
9125 update_qp_mutex (valueT mask)
9131 while (i < qp_mutexeslen)
9133 if ((qp_mutexes[i].prmask & mask) != 0)
9135 /* If it destroys and creates the same mutex, do nothing. */
9136 if (qp_mutexes[i].prmask == mask
9137 && qp_mutexes[i].path == md.path)
9148 fprintf (stderr, " Clearing mutex relation");
9149 print_prmask (qp_mutexes[i].prmask);
9150 fprintf (stderr, "\n");
9153 /* Deal with the old mutex with more than 3+ PRs only if
9154 the new mutex on the same execution path with it.
9156 FIXME: The 3+ mutex support is incomplete.
9157 dot_pred_rel () may be a better place to fix it. */
9158 if (qp_mutexes[i].path == md.path)
9160 /* If it is a proper subset of the mutex, create a
9163 && (qp_mutexes[i].prmask & mask) == mask)
9166 qp_mutexes[i].prmask &= ~mask;
9167 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9169 /* Modify the mutex if there are more than one
9177 /* Remove the mutex. */
9178 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9186 add_qp_mutex (mask);
9191 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9193 Any changes to a PR clears the mutex relations which include that PR. */
9196 clear_qp_mutex (mask)
9202 while (i < qp_mutexeslen)
9204 if ((qp_mutexes[i].prmask & mask) != 0)
9208 fprintf (stderr, " Clearing mutex relation");
9209 print_prmask (qp_mutexes[i].prmask);
9210 fprintf (stderr, "\n");
9212 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9219 /* Clear implies relations which contain PRs in the given masks.
9220 P1_MASK indicates the source of the implies relation, while P2_MASK
9221 indicates the implied PR. */
9224 clear_qp_implies (p1_mask, p2_mask)
9231 while (i < qp_implieslen)
9233 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9234 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9237 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9238 qp_implies[i].p1, qp_implies[i].p2);
9239 qp_implies[i] = qp_implies[--qp_implieslen];
9246 /* Add the PRs specified to the list of implied relations. */
9249 add_qp_imply (p1, p2)
9256 /* p0 is not meaningful here. */
9257 if (p1 == 0 || p2 == 0)
9263 /* If it exists already, ignore it. */
9264 for (i = 0; i < qp_implieslen; i++)
9266 if (qp_implies[i].p1 == p1
9267 && qp_implies[i].p2 == p2
9268 && qp_implies[i].path == md.path
9269 && !qp_implies[i].p2_branched)
9273 if (qp_implieslen == qp_impliestotlen)
9275 qp_impliestotlen += 20;
9276 qp_implies = (struct qp_imply *)
9277 xrealloc ((void *) qp_implies,
9278 qp_impliestotlen * sizeof (struct qp_imply));
9281 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9282 qp_implies[qp_implieslen].p1 = p1;
9283 qp_implies[qp_implieslen].p2 = p2;
9284 qp_implies[qp_implieslen].path = md.path;
9285 qp_implies[qp_implieslen++].p2_branched = 0;
9287 /* Add in the implied transitive relations; for everything that p2 implies,
9288 make p1 imply that, too; for everything that implies p1, make it imply p2
9290 for (i = 0; i < qp_implieslen; i++)
9292 if (qp_implies[i].p1 == p2)
9293 add_qp_imply (p1, qp_implies[i].p2);
9294 if (qp_implies[i].p2 == p1)
9295 add_qp_imply (qp_implies[i].p1, p2);
9297 /* Add in mutex relations implied by this implies relation; for each mutex
9298 relation containing p2, duplicate it and replace p2 with p1. */
9299 bit = (valueT) 1 << p1;
9300 mask = (valueT) 1 << p2;
9301 for (i = 0; i < qp_mutexeslen; i++)
9303 if (qp_mutexes[i].prmask & mask)
9304 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9308 /* Add the PRs specified in the mask to the mutex list; this means that only
9309 one of the PRs can be true at any time. PR0 should never be included in
9319 if (qp_mutexeslen == qp_mutexestotlen)
9321 qp_mutexestotlen += 20;
9322 qp_mutexes = (struct qpmutex *)
9323 xrealloc ((void *) qp_mutexes,
9324 qp_mutexestotlen * sizeof (struct qpmutex));
9328 fprintf (stderr, " Registering mutex on");
9329 print_prmask (mask);
9330 fprintf (stderr, "\n");
9332 qp_mutexes[qp_mutexeslen].path = md.path;
9333 qp_mutexes[qp_mutexeslen++].prmask = mask;
9337 has_suffix_p (name, suffix)
9341 size_t namelen = strlen (name);
9342 size_t sufflen = strlen (suffix);
9344 if (namelen <= sufflen)
9346 return strcmp (name + namelen - sufflen, suffix) == 0;
9350 clear_register_values ()
9354 fprintf (stderr, " Clearing register values\n");
9355 for (i = 1; i < NELEMS (gr_values); i++)
9356 gr_values[i].known = 0;
9359 /* Keep track of register values/changes which affect DV tracking.
9361 optimization note: should add a flag to classes of insns where otherwise we
9362 have to examine a group of strings to identify them. */
9365 note_register_values (idesc)
9366 struct ia64_opcode *idesc;
9368 valueT qp_changemask = 0;
9371 /* Invalidate values for registers being written to. */
9372 for (i = 0; i < idesc->num_outputs; i++)
9374 if (idesc->operands[i] == IA64_OPND_R1
9375 || idesc->operands[i] == IA64_OPND_R2
9376 || idesc->operands[i] == IA64_OPND_R3)
9378 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9379 if (regno > 0 && regno < NELEMS (gr_values))
9380 gr_values[regno].known = 0;
9382 else if (idesc->operands[i] == IA64_OPND_R3_2)
9384 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9385 if (regno > 0 && regno < 4)
9386 gr_values[regno].known = 0;
9388 else if (idesc->operands[i] == IA64_OPND_P1
9389 || idesc->operands[i] == IA64_OPND_P2)
9391 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9392 qp_changemask |= (valueT) 1 << regno;
9394 else if (idesc->operands[i] == IA64_OPND_PR)
9396 if (idesc->operands[2] & (valueT) 0x10000)
9397 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9399 qp_changemask = idesc->operands[2];
9402 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9404 if (idesc->operands[1] & ((valueT) 1 << 43))
9405 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9407 qp_changemask = idesc->operands[1];
9408 qp_changemask &= ~(valueT) 0xFFFF;
9413 /* Always clear qp branch flags on any PR change. */
9414 /* FIXME there may be exceptions for certain compares. */
9415 clear_qp_branch_flag (qp_changemask);
9417 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9418 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9420 qp_changemask |= ~(valueT) 0xFFFF;
9421 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9423 for (i = 32; i < 32 + md.rot.num_regs; i++)
9424 gr_values[i].known = 0;
9426 clear_qp_mutex (qp_changemask);
9427 clear_qp_implies (qp_changemask, qp_changemask);
9429 /* After a call, all register values are undefined, except those marked
9431 else if (strncmp (idesc->name, "br.call", 6) == 0
9432 || strncmp (idesc->name, "brl.call", 7) == 0)
9434 /* FIXME keep GR values which are marked as "safe_across_calls" */
9435 clear_register_values ();
9436 clear_qp_mutex (~qp_safe_across_calls);
9437 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9438 clear_qp_branch_flag (~qp_safe_across_calls);
9440 else if (is_interruption_or_rfi (idesc)
9441 || is_taken_branch (idesc))
9443 clear_register_values ();
9444 clear_qp_mutex (~(valueT) 0);
9445 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9447 /* Look for mutex and implies relations. */
9448 else if ((idesc->operands[0] == IA64_OPND_P1
9449 || idesc->operands[0] == IA64_OPND_P2)
9450 && (idesc->operands[1] == IA64_OPND_P1
9451 || idesc->operands[1] == IA64_OPND_P2))
9453 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9454 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9455 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9456 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9458 /* If both PRs are PR0, we can't really do anything. */
9459 if (p1 == 0 && p2 == 0)
9462 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9464 /* In general, clear mutexes and implies which include P1 or P2,
9465 with the following exceptions. */
9466 else if (has_suffix_p (idesc->name, ".or.andcm")
9467 || has_suffix_p (idesc->name, ".and.orcm"))
9469 clear_qp_implies (p2mask, p1mask);
9471 else if (has_suffix_p (idesc->name, ".andcm")
9472 || has_suffix_p (idesc->name, ".and"))
9474 clear_qp_implies (0, p1mask | p2mask);
9476 else if (has_suffix_p (idesc->name, ".orcm")
9477 || has_suffix_p (idesc->name, ".or"))
9479 clear_qp_mutex (p1mask | p2mask);
9480 clear_qp_implies (p1mask | p2mask, 0);
9486 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9488 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9489 if (p1 == 0 || p2 == 0)
9490 clear_qp_mutex (p1mask | p2mask);
9492 added = update_qp_mutex (p1mask | p2mask);
9494 if (CURR_SLOT.qp_regno == 0
9495 || has_suffix_p (idesc->name, ".unc"))
9497 if (added == 0 && p1 && p2)
9498 add_qp_mutex (p1mask | p2mask);
9499 if (CURR_SLOT.qp_regno != 0)
9502 add_qp_imply (p1, CURR_SLOT.qp_regno);
9504 add_qp_imply (p2, CURR_SLOT.qp_regno);
9509 /* Look for mov imm insns into GRs. */
9510 else if (idesc->operands[0] == IA64_OPND_R1
9511 && (idesc->operands[1] == IA64_OPND_IMM22
9512 || idesc->operands[1] == IA64_OPND_IMMU64)
9513 && (strcmp (idesc->name, "mov") == 0
9514 || strcmp (idesc->name, "movl") == 0))
9516 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9517 if (regno > 0 && regno < NELEMS (gr_values))
9519 gr_values[regno].known = 1;
9520 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9521 gr_values[regno].path = md.path;
9524 fprintf (stderr, " Know gr%d = ", regno);
9525 fprintf_vma (stderr, gr_values[regno].value);
9526 fputs ("\n", stderr);
9532 clear_qp_mutex (qp_changemask);
9533 clear_qp_implies (qp_changemask, qp_changemask);
9537 /* Return whether the given predicate registers are currently mutex. */
9540 qp_mutex (p1, p2, path)
9550 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9551 for (i = 0; i < qp_mutexeslen; i++)
9553 if (qp_mutexes[i].path >= path
9554 && (qp_mutexes[i].prmask & mask) == mask)
9561 /* Return whether the given resource is in the given insn's list of chks
9562 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9566 resources_match (rs, idesc, note, qp_regno, path)
9568 struct ia64_opcode *idesc;
9573 struct rsrc specs[MAX_SPECS];
9576 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9577 we don't need to check. One exception is note 11, which indicates that
9578 target predicates are written regardless of PR[qp]. */
9579 if (qp_mutex (rs->qp_regno, qp_regno, path)
9583 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9586 /* UNAT checking is a bit more specific than other resources */
9587 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9588 && specs[count].mem_offset.hint
9589 && rs->mem_offset.hint)
9591 if (rs->mem_offset.base == specs[count].mem_offset.base)
9593 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9594 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9601 /* Skip apparent PR write conflicts where both writes are an AND or both
9602 writes are an OR. */
9603 if (rs->dependency->specifier == IA64_RS_PR
9604 || rs->dependency->specifier == IA64_RS_PRr
9605 || rs->dependency->specifier == IA64_RS_PR63)
9607 if (specs[count].cmp_type != CMP_NONE
9608 && specs[count].cmp_type == rs->cmp_type)
9611 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9612 dv_mode[rs->dependency->mode],
9613 rs->dependency->specifier != IA64_RS_PR63 ?
9614 specs[count].index : 63);
9619 " %s on parallel compare conflict %s vs %s on PR%d\n",
9620 dv_mode[rs->dependency->mode],
9621 dv_cmp_type[rs->cmp_type],
9622 dv_cmp_type[specs[count].cmp_type],
9623 rs->dependency->specifier != IA64_RS_PR63 ?
9624 specs[count].index : 63);
9628 /* If either resource is not specific, conservatively assume a conflict
9630 if (!specs[count].specific || !rs->specific)
9632 else if (specs[count].index == rs->index)
9639 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9640 insert a stop to create the break. Update all resource dependencies
9641 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9642 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9643 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9647 insn_group_break (insert_stop, qp_regno, save_current)
9654 if (insert_stop && md.num_slots_in_use > 0)
9655 PREV_SLOT.end_of_insn_group = 1;
9659 fprintf (stderr, " Insn group break%s",
9660 (insert_stop ? " (w/stop)" : ""));
9662 fprintf (stderr, " effective for QP=%d", qp_regno);
9663 fprintf (stderr, "\n");
9667 while (i < regdepslen)
9669 const struct ia64_dependency *dep = regdeps[i].dependency;
9672 && regdeps[i].qp_regno != qp_regno)
9679 && CURR_SLOT.src_file == regdeps[i].file
9680 && CURR_SLOT.src_line == regdeps[i].line)
9686 /* clear dependencies which are automatically cleared by a stop, or
9687 those that have reached the appropriate state of insn serialization */
9688 if (dep->semantics == IA64_DVS_IMPLIED
9689 || dep->semantics == IA64_DVS_IMPLIEDF
9690 || regdeps[i].insn_srlz == STATE_SRLZ)
9692 print_dependency ("Removing", i);
9693 regdeps[i] = regdeps[--regdepslen];
9697 if (dep->semantics == IA64_DVS_DATA
9698 || dep->semantics == IA64_DVS_INSTR
9699 || dep->semantics == IA64_DVS_SPECIFIC)
9701 if (regdeps[i].insn_srlz == STATE_NONE)
9702 regdeps[i].insn_srlz = STATE_STOP;
9703 if (regdeps[i].data_srlz == STATE_NONE)
9704 regdeps[i].data_srlz = STATE_STOP;
9711 /* Add the given resource usage spec to the list of active dependencies. */
9714 mark_resource (idesc, dep, spec, depind, path)
9715 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9716 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9721 if (regdepslen == regdepstotlen)
9723 regdepstotlen += 20;
9724 regdeps = (struct rsrc *)
9725 xrealloc ((void *) regdeps,
9726 regdepstotlen * sizeof (struct rsrc));
9729 regdeps[regdepslen] = *spec;
9730 regdeps[regdepslen].depind = depind;
9731 regdeps[regdepslen].path = path;
9732 regdeps[regdepslen].file = CURR_SLOT.src_file;
9733 regdeps[regdepslen].line = CURR_SLOT.src_line;
9735 print_dependency ("Adding", regdepslen);
9741 print_dependency (action, depind)
9747 fprintf (stderr, " %s %s '%s'",
9748 action, dv_mode[(regdeps[depind].dependency)->mode],
9749 (regdeps[depind].dependency)->name);
9750 if (regdeps[depind].specific && regdeps[depind].index != 0)
9751 fprintf (stderr, " (%d)", regdeps[depind].index);
9752 if (regdeps[depind].mem_offset.hint)
9754 fputs (" ", stderr);
9755 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9756 fputs ("+", stderr);
9757 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9759 fprintf (stderr, "\n");
9764 instruction_serialization ()
9768 fprintf (stderr, " Instruction serialization\n");
9769 for (i = 0; i < regdepslen; i++)
9770 if (regdeps[i].insn_srlz == STATE_STOP)
9771 regdeps[i].insn_srlz = STATE_SRLZ;
9775 data_serialization ()
9779 fprintf (stderr, " Data serialization\n");
9780 while (i < regdepslen)
9782 if (regdeps[i].data_srlz == STATE_STOP
9783 /* Note: as of 991210, all "other" dependencies are cleared by a
9784 data serialization. This might change with new tables */
9785 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9787 print_dependency ("Removing", i);
9788 regdeps[i] = regdeps[--regdepslen];
9795 /* Insert stops and serializations as needed to avoid DVs. */
9798 remove_marked_resource (rs)
9801 switch (rs->dependency->semantics)
9803 case IA64_DVS_SPECIFIC:
9805 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9806 /* ...fall through... */
9807 case IA64_DVS_INSTR:
9809 fprintf (stderr, "Inserting instr serialization\n");
9810 if (rs->insn_srlz < STATE_STOP)
9811 insn_group_break (1, 0, 0);
9812 if (rs->insn_srlz < STATE_SRLZ)
9814 struct slot oldslot = CURR_SLOT;
9815 /* Manually jam a srlz.i insn into the stream */
9816 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9817 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9818 instruction_serialization ();
9819 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9820 if (++md.num_slots_in_use >= NUM_SLOTS)
9822 CURR_SLOT = oldslot;
9824 insn_group_break (1, 0, 0);
9826 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9827 "other" types of DV are eliminated
9828 by a data serialization */
9831 fprintf (stderr, "Inserting data serialization\n");
9832 if (rs->data_srlz < STATE_STOP)
9833 insn_group_break (1, 0, 0);
9835 struct slot oldslot = CURR_SLOT;
9836 /* Manually jam a srlz.d insn into the stream */
9837 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9838 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9839 data_serialization ();
9840 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9841 if (++md.num_slots_in_use >= NUM_SLOTS)
9843 CURR_SLOT = oldslot;
9846 case IA64_DVS_IMPLIED:
9847 case IA64_DVS_IMPLIEDF:
9849 fprintf (stderr, "Inserting stop\n");
9850 insn_group_break (1, 0, 0);
9857 /* Check the resources used by the given opcode against the current dependency
9860 The check is run once for each execution path encountered. In this case,
9861 a unique execution path is the sequence of instructions following a code
9862 entry point, e.g. the following has three execution paths, one starting
9863 at L0, one at L1, and one at L2.
9872 check_dependencies (idesc)
9873 struct ia64_opcode *idesc;
9875 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9879 /* Note that the number of marked resources may change within the
9880 loop if in auto mode. */
9882 while (i < regdepslen)
9884 struct rsrc *rs = ®deps[i];
9885 const struct ia64_dependency *dep = rs->dependency;
9890 if (dep->semantics == IA64_DVS_NONE
9891 || (chkind = depends_on (rs->depind, idesc)) == -1)
9897 note = NOTE (opdeps->chks[chkind]);
9899 /* Check this resource against each execution path seen thus far. */
9900 for (path = 0; path <= md.path; path++)
9904 /* If the dependency wasn't on the path being checked, ignore it. */
9905 if (rs->path < path)
9908 /* If the QP for this insn implies a QP which has branched, don't
9909 bother checking. Ed. NOTE: I don't think this check is terribly
9910 useful; what's the point of generating code which will only be
9911 reached if its QP is zero?
9912 This code was specifically inserted to handle the following code,
9913 based on notes from Intel's DV checking code, where p1 implies p2.
9919 if (CURR_SLOT.qp_regno != 0)
9923 for (implies = 0; implies < qp_implieslen; implies++)
9925 if (qp_implies[implies].path >= path
9926 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9927 && qp_implies[implies].p2_branched)
9937 if ((matchtype = resources_match (rs, idesc, note,
9938 CURR_SLOT.qp_regno, path)) != 0)
9941 char pathmsg[256] = "";
9942 char indexmsg[256] = "";
9943 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9946 sprintf (pathmsg, " when entry is at label '%s'",
9947 md.entry_labels[path - 1]);
9948 if (rs->specific && rs->index != 0)
9949 sprintf (indexmsg, ", specific resource number is %d",
9951 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9953 (certain ? "violates" : "may violate"),
9954 dv_mode[dep->mode], dep->name,
9955 dv_sem[dep->semantics],
9958 if (md.explicit_mode)
9960 as_warn ("%s", msg);
9962 as_warn (_("Only the first path encountering the conflict "
9964 as_warn_where (rs->file, rs->line,
9965 _("This is the location of the "
9966 "conflicting usage"));
9967 /* Don't bother checking other paths, to avoid duplicating
9974 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9976 remove_marked_resource (rs);
9978 /* since the set of dependencies has changed, start over */
9979 /* FIXME -- since we're removing dvs as we go, we
9980 probably don't really need to start over... */
9993 /* Register new dependencies based on the given opcode. */
9996 mark_resources (idesc)
9997 struct ia64_opcode *idesc;
10000 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10001 int add_only_qp_reads = 0;
10003 /* A conditional branch only uses its resources if it is taken; if it is
10004 taken, we stop following that path. The other branch types effectively
10005 *always* write their resources. If it's not taken, register only QP
10007 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10009 add_only_qp_reads = 1;
10013 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10015 for (i = 0; i < opdeps->nregs; i++)
10017 const struct ia64_dependency *dep;
10018 struct rsrc specs[MAX_SPECS];
10023 dep = ia64_find_dependency (opdeps->regs[i]);
10024 note = NOTE (opdeps->regs[i]);
10026 if (add_only_qp_reads
10027 && !(dep->mode == IA64_DV_WAR
10028 && (dep->specifier == IA64_RS_PR
10029 || dep->specifier == IA64_RS_PRr
10030 || dep->specifier == IA64_RS_PR63)))
10033 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10035 while (count-- > 0)
10037 mark_resource (idesc, dep, &specs[count],
10038 DEP (opdeps->regs[i]), md.path);
10041 /* The execution path may affect register values, which may in turn
10042 affect which indirect-access resources are accessed. */
10043 switch (dep->specifier)
10047 case IA64_RS_CPUID:
10055 for (path = 0; path < md.path; path++)
10057 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10058 while (count-- > 0)
10059 mark_resource (idesc, dep, &specs[count],
10060 DEP (opdeps->regs[i]), path);
10067 /* Remove dependencies when they no longer apply. */
10070 update_dependencies (idesc)
10071 struct ia64_opcode *idesc;
10075 if (strcmp (idesc->name, "srlz.i") == 0)
10077 instruction_serialization ();
10079 else if (strcmp (idesc->name, "srlz.d") == 0)
10081 data_serialization ();
10083 else if (is_interruption_or_rfi (idesc)
10084 || is_taken_branch (idesc))
10086 /* Although technically the taken branch doesn't clear dependencies
10087 which require a srlz.[id], we don't follow the branch; the next
10088 instruction is assumed to start with a clean slate. */
10092 else if (is_conditional_branch (idesc)
10093 && CURR_SLOT.qp_regno != 0)
10095 int is_call = strstr (idesc->name, ".call") != NULL;
10097 for (i = 0; i < qp_implieslen; i++)
10099 /* If the conditional branch's predicate is implied by the predicate
10100 in an existing dependency, remove that dependency. */
10101 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10104 /* Note that this implied predicate takes a branch so that if
10105 a later insn generates a DV but its predicate implies this
10106 one, we can avoid the false DV warning. */
10107 qp_implies[i].p2_branched = 1;
10108 while (depind < regdepslen)
10110 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10112 print_dependency ("Removing", depind);
10113 regdeps[depind] = regdeps[--regdepslen];
10120 /* Any marked resources which have this same predicate should be
10121 cleared, provided that the QP hasn't been modified between the
10122 marking instruction and the branch. */
10125 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10130 while (i < regdepslen)
10132 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10133 && regdeps[i].link_to_qp_branch
10134 && (regdeps[i].file != CURR_SLOT.src_file
10135 || regdeps[i].line != CURR_SLOT.src_line))
10137 /* Treat like a taken branch */
10138 print_dependency ("Removing", i);
10139 regdeps[i] = regdeps[--regdepslen];
10148 /* Examine the current instruction for dependency violations. */
10152 struct ia64_opcode *idesc;
10156 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10157 idesc->name, CURR_SLOT.src_line,
10158 idesc->dependencies->nchks,
10159 idesc->dependencies->nregs);
10162 /* Look through the list of currently marked resources; if the current
10163 instruction has the dependency in its chks list which uses that resource,
10164 check against the specific resources used. */
10165 check_dependencies (idesc);
10167 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10168 then add them to the list of marked resources. */
10169 mark_resources (idesc);
10171 /* There are several types of dependency semantics, and each has its own
10172 requirements for being cleared
10174 Instruction serialization (insns separated by interruption, rfi, or
10175 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10177 Data serialization (instruction serialization, or writer + srlz.d +
10178 reader, where writer and srlz.d are in separate groups) clears
10179 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10180 always be the case).
10182 Instruction group break (groups separated by stop, taken branch,
10183 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10185 update_dependencies (idesc);
10187 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10188 warning. Keep track of as many as possible that are useful. */
10189 note_register_values (idesc);
10191 /* We don't need or want this anymore. */
10192 md.mem_offset.hint = 0;
10197 /* Translate one line of assembly. Pseudo ops and labels do not show
10203 char *saved_input_line_pointer, *mnemonic;
10204 const struct pseudo_opcode *pdesc;
10205 struct ia64_opcode *idesc;
10206 unsigned char qp_regno;
10207 unsigned int flags;
10210 saved_input_line_pointer = input_line_pointer;
10211 input_line_pointer = str;
10213 /* extract the opcode (mnemonic): */
10215 mnemonic = input_line_pointer;
10216 ch = get_symbol_end ();
10217 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10220 *input_line_pointer = ch;
10221 (*pdesc->handler) (pdesc->arg);
10225 /* Find the instruction descriptor matching the arguments. */
10227 idesc = ia64_find_opcode (mnemonic);
10228 *input_line_pointer = ch;
10231 as_bad ("Unknown opcode `%s'", mnemonic);
10235 idesc = parse_operands (idesc);
10239 /* Handle the dynamic ops we can handle now: */
10240 if (idesc->type == IA64_TYPE_DYN)
10242 if (strcmp (idesc->name, "add") == 0)
10244 if (CURR_SLOT.opnd[2].X_op == O_register
10245 && CURR_SLOT.opnd[2].X_add_number < 4)
10249 ia64_free_opcode (idesc);
10250 idesc = ia64_find_opcode (mnemonic);
10252 else if (strcmp (idesc->name, "mov") == 0)
10254 enum ia64_opnd opnd1, opnd2;
10257 opnd1 = idesc->operands[0];
10258 opnd2 = idesc->operands[1];
10259 if (opnd1 == IA64_OPND_AR3)
10261 else if (opnd2 == IA64_OPND_AR3)
10265 if (CURR_SLOT.opnd[rop].X_op == O_register)
10267 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10268 mnemonic = "mov.i";
10269 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10270 mnemonic = "mov.m";
10278 ia64_free_opcode (idesc);
10279 idesc = ia64_find_opcode (mnemonic);
10280 while (idesc != NULL
10281 && (idesc->operands[0] != opnd1
10282 || idesc->operands[1] != opnd2))
10283 idesc = get_next_opcode (idesc);
10287 else if (strcmp (idesc->name, "mov.i") == 0
10288 || strcmp (idesc->name, "mov.m") == 0)
10290 enum ia64_opnd opnd1, opnd2;
10293 opnd1 = idesc->operands[0];
10294 opnd2 = idesc->operands[1];
10295 if (opnd1 == IA64_OPND_AR3)
10297 else if (opnd2 == IA64_OPND_AR3)
10301 if (CURR_SLOT.opnd[rop].X_op == O_register)
10304 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10306 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10308 if (unit != 'a' && unit != idesc->name [4])
10309 as_bad ("AR %d cannot be accessed by %c-unit",
10310 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10316 if (md.qp.X_op == O_register)
10318 qp_regno = md.qp.X_add_number - REG_P;
10319 md.qp.X_op = O_absent;
10322 flags = idesc->flags;
10324 if ((flags & IA64_OPCODE_FIRST) != 0)
10326 /* The alignment frag has to end with a stop bit only if the
10327 next instruction after the alignment directive has to be
10328 the first instruction in an instruction group. */
10331 while (align_frag->fr_type != rs_align_code)
10333 align_frag = align_frag->fr_next;
10337 /* align_frag can be NULL if there are directives in
10339 if (align_frag && align_frag->fr_next == frag_now)
10340 align_frag->tc_frag_data = 1;
10343 insn_group_break (1, 0, 0);
10347 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10349 as_bad ("`%s' cannot be predicated", idesc->name);
10353 /* Build the instruction. */
10354 CURR_SLOT.qp_regno = qp_regno;
10355 CURR_SLOT.idesc = idesc;
10356 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10357 dwarf2_where (&CURR_SLOT.debug_line);
10359 /* Add unwind entry, if there is one. */
10360 if (unwind.current_entry)
10362 CURR_SLOT.unwind_record = unwind.current_entry;
10363 unwind.current_entry = NULL;
10365 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10368 /* Check for dependency violations. */
10372 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10373 if (++md.num_slots_in_use >= NUM_SLOTS)
10374 emit_one_bundle ();
10376 if ((flags & IA64_OPCODE_LAST) != 0)
10377 insn_group_break (1, 0, 0);
10379 md.last_text_seg = now_seg;
10382 input_line_pointer = saved_input_line_pointer;
10385 /* Called when symbol NAME cannot be found in the symbol table.
10386 Should be used for dynamic valued symbols only. */
10389 md_undefined_symbol (name)
10390 char *name ATTRIBUTE_UNUSED;
10395 /* Called for any expression that can not be recognized. When the
10396 function is called, `input_line_pointer' will point to the start of
10403 enum pseudo_type pseudo_type;
10408 switch (*input_line_pointer)
10411 /* Find what relocation pseudo-function we're dealing with. */
10413 ch = *++input_line_pointer;
10414 for (i = 0; i < NELEMS (pseudo_func); ++i)
10415 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10417 len = strlen (pseudo_func[i].name);
10418 if (strncmp (pseudo_func[i].name + 1,
10419 input_line_pointer + 1, len - 1) == 0
10420 && !is_part_of_name (input_line_pointer[len]))
10422 input_line_pointer += len;
10423 pseudo_type = pseudo_func[i].type;
10427 switch (pseudo_type)
10429 case PSEUDO_FUNC_RELOC:
10430 SKIP_WHITESPACE ();
10431 if (*input_line_pointer != '(')
10433 as_bad ("Expected '('");
10437 ++input_line_pointer;
10439 if (*input_line_pointer++ != ')')
10441 as_bad ("Missing ')'");
10444 if (e->X_op != O_symbol)
10446 if (e->X_op != O_pseudo_fixup)
10448 as_bad ("Not a symbolic expression");
10451 if (i != FUNC_LT_RELATIVE)
10453 as_bad ("Illegal combination of relocation functions");
10456 switch (S_GET_VALUE (e->X_op_symbol))
10458 case FUNC_FPTR_RELATIVE:
10459 i = FUNC_LT_FPTR_RELATIVE; break;
10460 case FUNC_DTP_MODULE:
10461 i = FUNC_LT_DTP_MODULE; break;
10462 case FUNC_DTP_RELATIVE:
10463 i = FUNC_LT_DTP_RELATIVE; break;
10464 case FUNC_TP_RELATIVE:
10465 i = FUNC_LT_TP_RELATIVE; break;
10467 as_bad ("Illegal combination of relocation functions");
10471 /* Make sure gas doesn't get rid of local symbols that are used
10473 e->X_op = O_pseudo_fixup;
10474 e->X_op_symbol = pseudo_func[i].u.sym;
10477 case PSEUDO_FUNC_CONST:
10478 e->X_op = O_constant;
10479 e->X_add_number = pseudo_func[i].u.ival;
10482 case PSEUDO_FUNC_REG:
10483 e->X_op = O_register;
10484 e->X_add_number = pseudo_func[i].u.ival;
10488 name = input_line_pointer - 1;
10490 as_bad ("Unknown pseudo function `%s'", name);
10496 ++input_line_pointer;
10498 if (*input_line_pointer != ']')
10500 as_bad ("Closing bracket misssing");
10505 if (e->X_op != O_register)
10506 as_bad ("Register expected as index");
10508 ++input_line_pointer;
10519 ignore_rest_of_line ();
10522 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10523 a section symbol plus some offset. For relocs involving @fptr(),
10524 directives we don't want such adjustments since we need to have the
10525 original symbol's name in the reloc. */
10527 ia64_fix_adjustable (fix)
10530 /* Prevent all adjustments to global symbols */
10531 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10534 switch (fix->fx_r_type)
10536 case BFD_RELOC_IA64_FPTR64I:
10537 case BFD_RELOC_IA64_FPTR32MSB:
10538 case BFD_RELOC_IA64_FPTR32LSB:
10539 case BFD_RELOC_IA64_FPTR64MSB:
10540 case BFD_RELOC_IA64_FPTR64LSB:
10541 case BFD_RELOC_IA64_LTOFF_FPTR22:
10542 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10552 ia64_force_relocation (fix)
10555 switch (fix->fx_r_type)
10557 case BFD_RELOC_IA64_FPTR64I:
10558 case BFD_RELOC_IA64_FPTR32MSB:
10559 case BFD_RELOC_IA64_FPTR32LSB:
10560 case BFD_RELOC_IA64_FPTR64MSB:
10561 case BFD_RELOC_IA64_FPTR64LSB:
10563 case BFD_RELOC_IA64_LTOFF22:
10564 case BFD_RELOC_IA64_LTOFF64I:
10565 case BFD_RELOC_IA64_LTOFF_FPTR22:
10566 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10567 case BFD_RELOC_IA64_PLTOFF22:
10568 case BFD_RELOC_IA64_PLTOFF64I:
10569 case BFD_RELOC_IA64_PLTOFF64MSB:
10570 case BFD_RELOC_IA64_PLTOFF64LSB:
10572 case BFD_RELOC_IA64_LTOFF22X:
10573 case BFD_RELOC_IA64_LDXMOV:
10580 return generic_force_reloc (fix);
10583 /* Decide from what point a pc-relative relocation is relative to,
10584 relative to the pc-relative fixup. Er, relatively speaking. */
10586 ia64_pcrel_from_section (fix, sec)
10590 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10592 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10599 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10601 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10605 expr.X_op = O_pseudo_fixup;
10606 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10607 expr.X_add_number = 0;
10608 expr.X_add_symbol = symbol;
10609 emit_expr (&expr, size);
10612 /* This is called whenever some data item (not an instruction) needs a
10613 fixup. We pick the right reloc code depending on the byteorder
10614 currently in effect. */
10616 ia64_cons_fix_new (f, where, nbytes, exp)
10622 bfd_reloc_code_real_type code;
10627 /* There are no reloc for 8 and 16 bit quantities, but we allow
10628 them here since they will work fine as long as the expression
10629 is fully defined at the end of the pass over the source file. */
10630 case 1: code = BFD_RELOC_8; break;
10631 case 2: code = BFD_RELOC_16; break;
10633 if (target_big_endian)
10634 code = BFD_RELOC_IA64_DIR32MSB;
10636 code = BFD_RELOC_IA64_DIR32LSB;
10640 /* In 32-bit mode, data8 could mean function descriptors too. */
10641 if (exp->X_op == O_pseudo_fixup
10642 && exp->X_op_symbol
10643 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10644 && !(md.flags & EF_IA_64_ABI64))
10646 if (target_big_endian)
10647 code = BFD_RELOC_IA64_IPLTMSB;
10649 code = BFD_RELOC_IA64_IPLTLSB;
10650 exp->X_op = O_symbol;
10655 if (target_big_endian)
10656 code = BFD_RELOC_IA64_DIR64MSB;
10658 code = BFD_RELOC_IA64_DIR64LSB;
10663 if (exp->X_op == O_pseudo_fixup
10664 && exp->X_op_symbol
10665 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10667 if (target_big_endian)
10668 code = BFD_RELOC_IA64_IPLTMSB;
10670 code = BFD_RELOC_IA64_IPLTLSB;
10671 exp->X_op = O_symbol;
10677 as_bad ("Unsupported fixup size %d", nbytes);
10678 ignore_rest_of_line ();
10682 if (exp->X_op == O_pseudo_fixup)
10684 exp->X_op = O_symbol;
10685 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10686 /* ??? If code unchanged, unsupported. */
10689 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10690 /* We need to store the byte order in effect in case we're going
10691 to fix an 8 or 16 bit relocation (for which there no real
10692 relocs available). See md_apply_fix3(). */
10693 fix->tc_fix_data.bigendian = target_big_endian;
10696 /* Return the actual relocation we wish to associate with the pseudo
10697 reloc described by SYM and R_TYPE. SYM should be one of the
10698 symbols in the pseudo_func array, or NULL. */
10700 static bfd_reloc_code_real_type
10701 ia64_gen_real_reloc_type (sym, r_type)
10702 struct symbol *sym;
10703 bfd_reloc_code_real_type r_type;
10705 bfd_reloc_code_real_type new = 0;
10712 switch (S_GET_VALUE (sym))
10714 case FUNC_FPTR_RELATIVE:
10717 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10718 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10719 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10720 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10721 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10726 case FUNC_GP_RELATIVE:
10729 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10730 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10731 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10732 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10733 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10734 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10739 case FUNC_LT_RELATIVE:
10742 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10743 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10748 case FUNC_LT_RELATIVE_X:
10751 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10756 case FUNC_PC_RELATIVE:
10759 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10760 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10761 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10762 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10763 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10764 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10769 case FUNC_PLT_RELATIVE:
10772 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10773 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10774 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10775 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10780 case FUNC_SEC_RELATIVE:
10783 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10784 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10785 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10786 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10791 case FUNC_SEG_RELATIVE:
10794 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10795 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10796 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10797 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10802 case FUNC_LTV_RELATIVE:
10805 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10806 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10807 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10808 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10813 case FUNC_LT_FPTR_RELATIVE:
10816 case BFD_RELOC_IA64_IMM22:
10817 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10818 case BFD_RELOC_IA64_IMM64:
10819 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10825 case FUNC_TP_RELATIVE:
10828 case BFD_RELOC_IA64_IMM14:
10829 new = BFD_RELOC_IA64_TPREL14; break;
10830 case BFD_RELOC_IA64_IMM22:
10831 new = BFD_RELOC_IA64_TPREL22; break;
10832 case BFD_RELOC_IA64_IMM64:
10833 new = BFD_RELOC_IA64_TPREL64I; break;
10839 case FUNC_LT_TP_RELATIVE:
10842 case BFD_RELOC_IA64_IMM22:
10843 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10849 case FUNC_LT_DTP_MODULE:
10852 case BFD_RELOC_IA64_IMM22:
10853 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10859 case FUNC_DTP_RELATIVE:
10862 case BFD_RELOC_IA64_DIR64MSB:
10863 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10864 case BFD_RELOC_IA64_DIR64LSB:
10865 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10866 case BFD_RELOC_IA64_IMM14:
10867 new = BFD_RELOC_IA64_DTPREL14; break;
10868 case BFD_RELOC_IA64_IMM22:
10869 new = BFD_RELOC_IA64_DTPREL22; break;
10870 case BFD_RELOC_IA64_IMM64:
10871 new = BFD_RELOC_IA64_DTPREL64I; break;
10877 case FUNC_LT_DTP_RELATIVE:
10880 case BFD_RELOC_IA64_IMM22:
10881 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10887 case FUNC_IPLT_RELOC:
10894 /* Hmmmm. Should this ever occur? */
10901 /* Here is where generate the appropriate reloc for pseudo relocation
10904 ia64_validate_fix (fix)
10907 switch (fix->fx_r_type)
10909 case BFD_RELOC_IA64_FPTR64I:
10910 case BFD_RELOC_IA64_FPTR32MSB:
10911 case BFD_RELOC_IA64_FPTR64LSB:
10912 case BFD_RELOC_IA64_LTOFF_FPTR22:
10913 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10914 if (fix->fx_offset != 0)
10915 as_bad_where (fix->fx_file, fix->fx_line,
10916 "No addend allowed in @fptr() relocation");
10924 fix_insn (fix, odesc, value)
10926 const struct ia64_operand *odesc;
10929 bfd_vma insn[3], t0, t1, control_bits;
10934 slot = fix->fx_where & 0x3;
10935 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10937 /* Bundles are always in little-endian byte order */
10938 t0 = bfd_getl64 (fixpos);
10939 t1 = bfd_getl64 (fixpos + 8);
10940 control_bits = t0 & 0x1f;
10941 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10942 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10943 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10946 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10948 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10949 insn[2] |= (((value & 0x7f) << 13)
10950 | (((value >> 7) & 0x1ff) << 27)
10951 | (((value >> 16) & 0x1f) << 22)
10952 | (((value >> 21) & 0x1) << 21)
10953 | (((value >> 63) & 0x1) << 36));
10955 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10957 if (value & ~0x3fffffffffffffffULL)
10958 err = "integer operand out of range";
10959 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10960 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10962 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10965 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10966 insn[2] |= ((((value >> 59) & 0x1) << 36)
10967 | (((value >> 0) & 0xfffff) << 13));
10970 err = (*odesc->insert) (odesc, value, insn + slot);
10973 as_bad_where (fix->fx_file, fix->fx_line, err);
10975 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10976 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10977 number_to_chars_littleendian (fixpos + 0, t0, 8);
10978 number_to_chars_littleendian (fixpos + 8, t1, 8);
10981 /* Attempt to simplify or even eliminate a fixup. The return value is
10982 ignored; perhaps it was once meaningful, but now it is historical.
10983 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10985 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10989 md_apply_fix3 (fix, valP, seg)
10992 segT seg ATTRIBUTE_UNUSED;
10995 valueT value = *valP;
10997 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11001 switch (fix->fx_r_type)
11003 case BFD_RELOC_IA64_DIR32MSB:
11004 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
11007 case BFD_RELOC_IA64_DIR32LSB:
11008 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
11011 case BFD_RELOC_IA64_DIR64MSB:
11012 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
11015 case BFD_RELOC_IA64_DIR64LSB:
11016 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
11025 switch (fix->fx_r_type)
11027 case BFD_RELOC_UNUSED:
11028 /* This must be a TAG13 or TAG13b operand. There are no external
11029 relocs defined for them, so we must give an error. */
11030 as_bad_where (fix->fx_file, fix->fx_line,
11031 "%s must have a constant value",
11032 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11036 case BFD_RELOC_IA64_TPREL14:
11037 case BFD_RELOC_IA64_TPREL22:
11038 case BFD_RELOC_IA64_TPREL64I:
11039 case BFD_RELOC_IA64_LTOFF_TPREL22:
11040 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11041 case BFD_RELOC_IA64_DTPREL14:
11042 case BFD_RELOC_IA64_DTPREL22:
11043 case BFD_RELOC_IA64_DTPREL64I:
11044 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11045 S_SET_THREAD_LOCAL (fix->fx_addsy);
11052 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11054 if (fix->tc_fix_data.bigendian)
11055 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11057 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11062 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11067 /* Generate the BFD reloc to be stuck in the object file from the
11068 fixup used internally in the assembler. */
11071 tc_gen_reloc (sec, fixp)
11072 asection *sec ATTRIBUTE_UNUSED;
11077 reloc = xmalloc (sizeof (*reloc));
11078 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11079 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11080 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11081 reloc->addend = fixp->fx_offset;
11082 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11086 as_bad_where (fixp->fx_file, fixp->fx_line,
11087 "Cannot represent %s relocation in object file",
11088 bfd_get_reloc_code_name (fixp->fx_r_type));
11093 /* Turn a string in input_line_pointer into a floating point constant
11094 of type TYPE, and store the appropriate bytes in *LIT. The number
11095 of LITTLENUMS emitted is stored in *SIZE. An error message is
11096 returned, or NULL on OK. */
11098 #define MAX_LITTLENUMS 5
11101 md_atof (type, lit, size)
11106 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11136 return "Bad call to MD_ATOF()";
11138 t = atof_ieee (input_line_pointer, type, words);
11140 input_line_pointer = t;
11142 (*ia64_float_to_chars) (lit, words, prec);
11146 /* It is 10 byte floating point with 6 byte padding. */
11147 memset (&lit [10], 0, 6);
11148 *size = 8 * sizeof (LITTLENUM_TYPE);
11151 *size = prec * sizeof (LITTLENUM_TYPE);
11156 /* Handle ia64 specific semantics of the align directive. */
11159 ia64_md_do_align (n, fill, len, max)
11160 int n ATTRIBUTE_UNUSED;
11161 const char *fill ATTRIBUTE_UNUSED;
11162 int len ATTRIBUTE_UNUSED;
11163 int max ATTRIBUTE_UNUSED;
11165 if (subseg_text_p (now_seg))
11166 ia64_flush_insns ();
11169 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11170 of an rs_align_code fragment. */
11173 ia64_handle_align (fragp)
11176 /* Use mfi bundle of nops with no stop bits. */
11177 static const unsigned char le_nop[]
11178 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11179 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11180 static const unsigned char le_nop_stop[]
11181 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11182 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11186 const unsigned char *nop;
11188 if (fragp->fr_type != rs_align_code)
11191 /* Check if this frag has to end with a stop bit. */
11192 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11194 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11195 p = fragp->fr_literal + fragp->fr_fix;
11197 /* If no paddings are needed, we check if we need a stop bit. */
11198 if (!bytes && fragp->tc_frag_data)
11200 if (fragp->fr_fix < 16)
11202 /* FIXME: It won't work with
11204 alloc r32=ar.pfs,1,2,4,0
11208 as_bad_where (fragp->fr_file, fragp->fr_line,
11209 _("Can't add stop bit to mark end of instruction group"));
11212 /* Bundles are always in little-endian byte order. Make sure
11213 the previous bundle has the stop bit. */
11217 /* Make sure we are on a 16-byte boundary, in case someone has been
11218 putting data into a text section. */
11221 int fix = bytes & 15;
11222 memset (p, 0, fix);
11225 fragp->fr_fix += fix;
11228 /* Instruction bundles are always little-endian. */
11229 memcpy (p, nop, 16);
11230 fragp->fr_var = 16;
11234 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11239 number_to_chars_bigendian (lit, (long) (*words++),
11240 sizeof (LITTLENUM_TYPE));
11241 lit += sizeof (LITTLENUM_TYPE);
11246 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11251 number_to_chars_littleendian (lit, (long) (words[prec]),
11252 sizeof (LITTLENUM_TYPE));
11253 lit += sizeof (LITTLENUM_TYPE);
11258 ia64_elf_section_change_hook (void)
11260 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11261 && elf_linked_to_section (now_seg) == NULL)
11262 elf_linked_to_section (now_seg) = text_section;
11263 dot_byteorder (-1);
11266 /* Check if a label should be made global. */
11268 ia64_check_label (symbolS *label)
11270 if (*input_line_pointer == ':')
11272 S_SET_EXTERNAL (label);
11273 input_line_pointer++;
11277 /* Used to remember where .alias and .secalias directives are seen. We
11278 will rename symbol and section names when we are about to output
11279 the relocatable file. */
11282 char *file; /* The file where the directive is seen. */
11283 unsigned int line; /* The line number the directive is at. */
11284 const char *name; /* The orignale name of the symbol. */
11287 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11288 .secalias. Otherwise, it is .alias. */
11290 dot_alias (int section)
11292 char *name, *alias;
11296 const char *error_string;
11299 struct hash_control *ahash, *nhash;
11302 name = input_line_pointer;
11303 delim = get_symbol_end ();
11304 end_name = input_line_pointer;
11307 if (name == end_name)
11309 as_bad (_("expected symbol name"));
11310 discard_rest_of_line ();
11314 SKIP_WHITESPACE ();
11316 if (*input_line_pointer != ',')
11319 as_bad (_("expected comma after \"%s\""), name);
11321 ignore_rest_of_line ();
11325 input_line_pointer++;
11328 /* We call demand_copy_C_string to check if alias string is valid.
11329 There should be a closing `"' and no `\0' in the string. */
11330 alias = demand_copy_C_string (&len);
11333 ignore_rest_of_line ();
11337 /* Make a copy of name string. */
11338 len = strlen (name) + 1;
11339 obstack_grow (¬es, name, len);
11340 name = obstack_finish (¬es);
11345 ahash = secalias_hash;
11346 nhash = secalias_name_hash;
11351 ahash = alias_hash;
11352 nhash = alias_name_hash;
11355 /* Check if alias has been used before. */
11356 h = (struct alias *) hash_find (ahash, alias);
11359 if (strcmp (h->name, name))
11360 as_bad (_("`%s' is already the alias of %s `%s'"),
11361 alias, kind, h->name);
11365 /* Check if name already has an alias. */
11366 a = (const char *) hash_find (nhash, name);
11369 if (strcmp (a, alias))
11370 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11374 h = (struct alias *) xmalloc (sizeof (struct alias));
11375 as_where (&h->file, &h->line);
11378 error_string = hash_jam (ahash, alias, (PTR) h);
11381 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11382 alias, kind, error_string);
11386 error_string = hash_jam (nhash, name, (PTR) alias);
11389 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11390 alias, kind, error_string);
11392 obstack_free (¬es, name);
11393 obstack_free (¬es, alias);
11396 demand_empty_rest_of_line ();
11399 /* It renames the original symbol name to its alias. */
11401 do_alias (const char *alias, PTR value)
11403 struct alias *h = (struct alias *) value;
11404 symbolS *sym = symbol_find (h->name);
11407 as_warn_where (h->file, h->line,
11408 _("symbol `%s' aliased to `%s' is not used"),
11411 S_SET_NAME (sym, (char *) alias);
11414 /* Called from write_object_file. */
11416 ia64_adjust_symtab (void)
11418 hash_traverse (alias_hash, do_alias);
11421 /* It renames the original section name to its alias. */
11423 do_secalias (const char *alias, PTR value)
11425 struct alias *h = (struct alias *) value;
11426 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11429 as_warn_where (h->file, h->line,
11430 _("section `%s' aliased to `%s' is not used"),
11436 /* Called from write_object_file. */
11438 ia64_frob_file (void)
11440 hash_traverse (secalias_hash, do_secalias);