1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 /* This is the endianness of the current section. */
157 extern int target_big_endian;
159 /* This is the default endianness. */
160 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
162 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
164 static void ia64_float_to_chars_bigendian
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
166 static void ia64_float_to_chars_littleendian
167 PARAMS ((char *, LITTLENUM_TYPE *, int));
168 static void (*ia64_float_to_chars)
169 PARAMS ((char *, LITTLENUM_TYPE *, int));
171 static struct hash_control *alias_hash;
172 static struct hash_control *alias_name_hash;
173 static struct hash_control *secalias_hash;
174 static struct hash_control *secalias_name_hash;
176 /* Characters which always start a comment. */
177 const char comment_chars[] = "";
179 /* Characters which start a comment at the beginning of a line. */
180 const char line_comment_chars[] = "#";
182 /* Characters which may be used to separate multiple commands on a
184 const char line_separator_chars[] = ";";
186 /* Characters which are used to indicate an exponent in a floating
188 const char EXP_CHARS[] = "eE";
190 /* Characters which mean that a number is a floating point constant,
192 const char FLT_CHARS[] = "rRsSfFdDxXpP";
194 /* ia64-specific option processing: */
196 const char *md_shortopts = "m:N:x::";
198 struct option md_longopts[] =
200 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
201 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
202 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
203 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
206 size_t md_longopts_size = sizeof (md_longopts);
210 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
211 struct hash_control *reg_hash; /* register name hash table */
212 struct hash_control *dynreg_hash; /* dynamic register hash table */
213 struct hash_control *const_hash; /* constant hash table */
214 struct hash_control *entry_hash; /* code entry hint hash table */
216 symbolS *regsym[REG_NUM];
218 /* If X_op is != O_absent, the registername for the instruction's
219 qualifying predicate. If NULL, p0 is assumed for instructions
220 that are predicatable. */
227 explicit_mode : 1, /* which mode we're in */
228 default_explicit_mode : 1, /* which mode is the default */
229 mode_explicitly_set : 1, /* was the current mode explicitly set? */
231 keep_pending_output : 1;
233 /* Each bundle consists of up to three instructions. We keep
234 track of four most recent instructions so we can correctly set
235 the end_of_insn_group for the last instruction in a bundle. */
237 int num_slots_in_use;
241 end_of_insn_group : 1,
242 manual_bundling_on : 1,
243 manual_bundling_off : 1;
244 signed char user_template; /* user-selected template, if any */
245 unsigned char qp_regno; /* qualifying predicate */
246 /* This duplicates a good fraction of "struct fix" but we
247 can't use a "struct fix" instead since we can't call
248 fix_new_exp() until we know the address of the instruction. */
252 bfd_reloc_code_real_type code;
253 enum ia64_opnd opnd; /* type of operand in need of fix */
254 unsigned int is_pcrel : 1; /* is operand pc-relative? */
255 expressionS expr; /* the value to be inserted */
257 fixup[2]; /* at most two fixups per insn */
258 struct ia64_opcode *idesc;
259 struct label_fix *label_fixups;
260 struct label_fix *tag_fixups;
261 struct unw_rec_list *unwind_record; /* Unwind directive. */
264 unsigned int src_line;
265 struct dwarf2_line_info debug_line;
273 struct dynreg *next; /* next dynamic register */
275 unsigned short base; /* the base register number */
276 unsigned short num_regs; /* # of registers in this set */
278 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
280 flagword flags; /* ELF-header flags */
283 unsigned hint:1; /* is this hint currently valid? */
284 bfd_vma offset; /* mem.offset offset */
285 bfd_vma base; /* mem.offset base */
288 int path; /* number of alt. entry points seen */
289 const char **entry_labels; /* labels of all alternate paths in
290 the current DV-checking block. */
291 int maxpaths; /* size currently allocated for
293 /* Support for hardware errata workarounds. */
295 /* Record data about the last three insn groups. */
298 /* B-step workaround.
299 For each predicate register, this is set if the corresponding insn
300 group conditionally sets this register with one of the affected
303 /* B-step workaround.
304 For each general register, this is set if the corresponding insn
305 a) is conditional one one of the predicate registers for which
306 P_REG_SET is 1 in the corresponding entry of the previous group,
307 b) sets this general register with one of the affected
309 int g_reg_set_conditionally[128];
313 int pointer_size; /* size in bytes of a pointer */
314 int pointer_size_shift; /* shift size of a pointer for alignment */
318 /* application registers: */
324 #define AR_BSPSTORE 18
339 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
340 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
341 {"ar.rsc", 16}, {"ar.bsp", 17},
342 {"ar.bspstore", 18}, {"ar.rnat", 19},
343 {"ar.fcr", 21}, {"ar.eflag", 24},
344 {"ar.csd", 25}, {"ar.ssd", 26},
345 {"ar.cflg", 27}, {"ar.fsr", 28},
346 {"ar.fir", 29}, {"ar.fdr", 30},
347 {"ar.ccv", 32}, {"ar.unat", 36},
348 {"ar.fpsr", 40}, {"ar.itc", 44},
349 {"ar.pfs", 64}, {"ar.lc", 65},
370 /* control registers: */
412 static const struct const_desc
419 /* PSR constant masks: */
422 {"psr.be", ((valueT) 1) << 1},
423 {"psr.up", ((valueT) 1) << 2},
424 {"psr.ac", ((valueT) 1) << 3},
425 {"psr.mfl", ((valueT) 1) << 4},
426 {"psr.mfh", ((valueT) 1) << 5},
428 {"psr.ic", ((valueT) 1) << 13},
429 {"psr.i", ((valueT) 1) << 14},
430 {"psr.pk", ((valueT) 1) << 15},
432 {"psr.dt", ((valueT) 1) << 17},
433 {"psr.dfl", ((valueT) 1) << 18},
434 {"psr.dfh", ((valueT) 1) << 19},
435 {"psr.sp", ((valueT) 1) << 20},
436 {"psr.pp", ((valueT) 1) << 21},
437 {"psr.di", ((valueT) 1) << 22},
438 {"psr.si", ((valueT) 1) << 23},
439 {"psr.db", ((valueT) 1) << 24},
440 {"psr.lp", ((valueT) 1) << 25},
441 {"psr.tb", ((valueT) 1) << 26},
442 {"psr.rt", ((valueT) 1) << 27},
443 /* 28-31: reserved */
444 /* 32-33: cpl (current privilege level) */
445 {"psr.is", ((valueT) 1) << 34},
446 {"psr.mc", ((valueT) 1) << 35},
447 {"psr.it", ((valueT) 1) << 36},
448 {"psr.id", ((valueT) 1) << 37},
449 {"psr.da", ((valueT) 1) << 38},
450 {"psr.dd", ((valueT) 1) << 39},
451 {"psr.ss", ((valueT) 1) << 40},
452 /* 41-42: ri (restart instruction) */
453 {"psr.ed", ((valueT) 1) << 43},
454 {"psr.bn", ((valueT) 1) << 44},
457 /* indirect register-sets/memory: */
466 { "CPUID", IND_CPUID },
467 { "cpuid", IND_CPUID },
479 /* Pseudo functions used to indicate relocation types (these functions
480 start with an at sign (@). */
502 /* reloc pseudo functions (these must come first!): */
503 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
504 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
505 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
506 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
507 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
508 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
509 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
511 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
512 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
513 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
514 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
515 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
516 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
519 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
521 /* mbtype4 constants: */
522 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
523 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
524 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
525 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
526 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
528 /* fclass constants: */
529 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
530 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
531 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
532 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
533 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
534 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
535 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
536 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
537 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
539 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
541 /* hint constants: */
542 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
544 /* unwind-related constants: */
545 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
546 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
547 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
548 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
549 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
550 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
551 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
553 /* unwind-related registers: */
554 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
557 /* 41-bit nop opcodes (one per unit): */
558 static const bfd_vma nop[IA64_NUM_UNITS] =
560 0x0000000000LL, /* NIL => break 0 */
561 0x0008000000LL, /* I-unit nop */
562 0x0008000000LL, /* M-unit nop */
563 0x4000000000LL, /* B-unit nop */
564 0x0008000000LL, /* F-unit nop */
565 0x0008000000LL, /* L-"unit" nop */
566 0x0008000000LL, /* X-unit nop */
569 /* Can't be `const' as it's passed to input routines (which have the
570 habit of setting temporary sentinels. */
571 static char special_section_name[][20] =
573 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
574 {".IA_64.unwind"}, {".IA_64.unwind_info"},
575 {".init_array"}, {".fini_array"}
578 /* The best template for a particular sequence of up to three
580 #define N IA64_NUM_TYPES
581 static unsigned char best_template[N][N][N];
584 /* Resource dependencies currently in effect */
586 int depind; /* dependency index */
587 const struct ia64_dependency *dependency; /* actual dependency */
588 unsigned specific:1, /* is this a specific bit/regno? */
589 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
590 int index; /* specific regno/bit within dependency */
591 int note; /* optional qualifying note (0 if none) */
595 int insn_srlz; /* current insn serialization state */
596 int data_srlz; /* current data serialization state */
597 int qp_regno; /* qualifying predicate for this usage */
598 char *file; /* what file marked this dependency */
599 unsigned int line; /* what line marked this dependency */
600 struct mem_offset mem_offset; /* optional memory offset hint */
601 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
602 int path; /* corresponding code entry index */
604 static int regdepslen = 0;
605 static int regdepstotlen = 0;
606 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
607 static const char *dv_sem[] = { "none", "implied", "impliedf",
608 "data", "instr", "specific", "stop", "other" };
609 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
611 /* Current state of PR mutexation */
612 static struct qpmutex {
615 } *qp_mutexes = NULL; /* QP mutex bitmasks */
616 static int qp_mutexeslen = 0;
617 static int qp_mutexestotlen = 0;
618 static valueT qp_safe_across_calls = 0;
620 /* Current state of PR implications */
621 static struct qp_imply {
624 unsigned p2_branched:1;
626 } *qp_implies = NULL;
627 static int qp_implieslen = 0;
628 static int qp_impliestotlen = 0;
630 /* Keep track of static GR values so that indirect register usage can
631 sometimes be tracked. */
636 } gr_values[128] = {{ 1, 0, 0 }};
638 /* Remember the alignment frag. */
639 static fragS *align_frag;
641 /* These are the routines required to output the various types of
644 /* A slot_number is a frag address plus the slot index (0-2). We use the
645 frag address here so that if there is a section switch in the middle of
646 a function, then instructions emitted to a different section are not
647 counted. Since there may be more than one frag for a function, this
648 means we also need to keep track of which frag this address belongs to
649 so we can compute inter-frag distances. This also nicely solves the
650 problem with nops emitted for align directives, which can't easily be
651 counted, but can easily be derived from frag sizes. */
653 typedef struct unw_rec_list {
655 unsigned long slot_number;
657 unsigned long next_slot_number;
658 fragS *next_slot_frag;
659 struct unw_rec_list *next;
662 #define SLOT_NUM_NOT_SET (unsigned)-1
664 /* Linked list of saved prologue counts. A very poor
665 implementation of a map from label numbers to prologue counts. */
666 typedef struct label_prologue_count
668 struct label_prologue_count *next;
669 unsigned long label_number;
670 unsigned int prologue_count;
671 } label_prologue_count;
675 /* Maintain a list of unwind entries for the current function. */
679 /* Any unwind entires that should be attached to the current slot
680 that an insn is being constructed for. */
681 unw_rec_list *current_entry;
683 /* These are used to create the unwind table entry for this function. */
686 symbolS *info; /* pointer to unwind info */
687 symbolS *personality_routine;
689 subsegT saved_text_subseg;
690 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
692 /* TRUE if processing unwind directives in a prologue region. */
695 unsigned int prologue_count; /* number of .prologues seen so far */
696 /* Prologue counts at previous .label_state directives. */
697 struct label_prologue_count * saved_prologue_counts;
700 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
702 /* Forward declarations: */
703 static void set_section PARAMS ((char *name));
704 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
705 unsigned int, unsigned int));
706 static void dot_align (int);
707 static void dot_radix PARAMS ((int));
708 static void dot_special_section PARAMS ((int));
709 static void dot_proc PARAMS ((int));
710 static void dot_fframe PARAMS ((int));
711 static void dot_vframe PARAMS ((int));
712 static void dot_vframesp PARAMS ((int));
713 static void dot_vframepsp PARAMS ((int));
714 static void dot_save PARAMS ((int));
715 static void dot_restore PARAMS ((int));
716 static void dot_restorereg PARAMS ((int));
717 static void dot_restorereg_p PARAMS ((int));
718 static void dot_handlerdata PARAMS ((int));
719 static void dot_unwentry PARAMS ((int));
720 static void dot_altrp PARAMS ((int));
721 static void dot_savemem PARAMS ((int));
722 static void dot_saveg PARAMS ((int));
723 static void dot_savef PARAMS ((int));
724 static void dot_saveb PARAMS ((int));
725 static void dot_savegf PARAMS ((int));
726 static void dot_spill PARAMS ((int));
727 static void dot_spillreg PARAMS ((int));
728 static void dot_spillmem PARAMS ((int));
729 static void dot_spillreg_p PARAMS ((int));
730 static void dot_spillmem_p PARAMS ((int));
731 static void dot_label_state PARAMS ((int));
732 static void dot_copy_state PARAMS ((int));
733 static void dot_unwabi PARAMS ((int));
734 static void dot_personality PARAMS ((int));
735 static void dot_body PARAMS ((int));
736 static void dot_prologue PARAMS ((int));
737 static void dot_endp PARAMS ((int));
738 static void dot_template PARAMS ((int));
739 static void dot_regstk PARAMS ((int));
740 static void dot_rot PARAMS ((int));
741 static void dot_byteorder PARAMS ((int));
742 static void dot_psr PARAMS ((int));
743 static void dot_alias PARAMS ((int));
744 static void dot_ln PARAMS ((int));
745 static char *parse_section_name PARAMS ((void));
746 static void dot_xdata PARAMS ((int));
747 static void stmt_float_cons PARAMS ((int));
748 static void stmt_cons_ua PARAMS ((int));
749 static void dot_xfloat_cons PARAMS ((int));
750 static void dot_xstringer PARAMS ((int));
751 static void dot_xdata_ua PARAMS ((int));
752 static void dot_xfloat_cons_ua PARAMS ((int));
753 static void print_prmask PARAMS ((valueT mask));
754 static void dot_pred_rel PARAMS ((int));
755 static void dot_reg_val PARAMS ((int));
756 static void dot_serialize PARAMS ((int));
757 static void dot_dv_mode PARAMS ((int));
758 static void dot_entry PARAMS ((int));
759 static void dot_mem_offset PARAMS ((int));
760 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
761 static symbolS *declare_register PARAMS ((const char *name, int regnum));
762 static void declare_register_set PARAMS ((const char *, int, int));
763 static unsigned int operand_width PARAMS ((enum ia64_opnd));
764 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
767 static int parse_operand PARAMS ((expressionS *e));
768 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
769 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
770 static void build_insn PARAMS ((struct slot *, bfd_vma *));
771 static void emit_one_bundle PARAMS ((void));
772 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
773 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
774 bfd_reloc_code_real_type r_type));
775 static void insn_group_break PARAMS ((int, int, int));
776 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
777 struct rsrc *, int depind, int path));
778 static void add_qp_mutex PARAMS((valueT mask));
779 static void add_qp_imply PARAMS((int p1, int p2));
780 static void clear_qp_branch_flag PARAMS((valueT mask));
781 static void clear_qp_mutex PARAMS((valueT mask));
782 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
783 static int has_suffix_p PARAMS((const char *, const char *));
784 static void clear_register_values PARAMS ((void));
785 static void print_dependency PARAMS ((const char *action, int depind));
786 static void instruction_serialization PARAMS ((void));
787 static void data_serialization PARAMS ((void));
788 static void remove_marked_resource PARAMS ((struct rsrc *));
789 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
790 static int is_taken_branch PARAMS ((struct ia64_opcode *));
791 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
792 static int depends_on PARAMS ((int, struct ia64_opcode *));
793 static int specify_resource PARAMS ((const struct ia64_dependency *,
794 struct ia64_opcode *, int, struct rsrc [], int, int));
795 static int check_dv PARAMS((struct ia64_opcode *idesc));
796 static void check_dependencies PARAMS((struct ia64_opcode *));
797 static void mark_resources PARAMS((struct ia64_opcode *));
798 static void update_dependencies PARAMS((struct ia64_opcode *));
799 static void note_register_values PARAMS((struct ia64_opcode *));
800 static int qp_mutex PARAMS ((int, int, int));
801 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
802 static void output_vbyte_mem PARAMS ((int, char *, char *));
803 static void count_output PARAMS ((int, char *, char *));
804 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
805 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
806 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
807 static void output_P1_format PARAMS ((vbyte_func, int));
808 static void output_P2_format PARAMS ((vbyte_func, int, int));
809 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
810 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
811 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
812 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
813 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
814 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815 static void output_P9_format PARAMS ((vbyte_func, int, int));
816 static void output_P10_format PARAMS ((vbyte_func, int, int));
817 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
819 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
820 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
821 static char format_ab_reg PARAMS ((int, int));
822 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
824 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
825 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
827 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
828 static unw_rec_list *output_endp PARAMS ((void));
829 static unw_rec_list *output_prologue PARAMS ((void));
830 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
831 static unw_rec_list *output_body PARAMS ((void));
832 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
833 static unw_rec_list *output_mem_stack_v PARAMS ((void));
834 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
835 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_when PARAMS ((void));
837 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
838 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
839 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_pfs_when PARAMS ((void));
842 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_preds_when PARAMS ((void));
846 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
847 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
848 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
849 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
853 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
854 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
855 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
856 static unw_rec_list *output_unat_when PARAMS ((void));
857 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_lc_when PARAMS ((void));
861 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_fpsr_when PARAMS ((void));
865 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
866 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
867 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
869 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
870 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bsp_when PARAMS ((void));
874 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_bspstore_when PARAMS ((void));
878 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_rnat_when PARAMS ((void));
882 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
883 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
884 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
885 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
886 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
887 static unw_rec_list *output_label_state PARAMS ((unsigned long));
888 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
889 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
890 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
891 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
895 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
897 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
898 unsigned int, unsigned int));
899 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
900 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
901 static int calc_record_size PARAMS ((unw_rec_list *));
902 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
903 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
904 unsigned long, fragS *,
906 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
907 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
908 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
909 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
910 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
911 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
912 static void free_saved_prologue_counts PARAMS ((void));
914 /* Determine if application register REGNUM resides only in the integer
915 unit (as opposed to the memory unit). */
917 ar_is_only_in_integer_unit (int reg)
920 return reg >= 64 && reg <= 111;
923 /* Determine if application register REGNUM resides only in the memory
924 unit (as opposed to the integer unit). */
926 ar_is_only_in_memory_unit (int reg)
929 return reg >= 0 && reg <= 47;
932 /* Switch to section NAME and create section if necessary. It's
933 rather ugly that we have to manipulate input_line_pointer but I
934 don't see any other way to accomplish the same thing without
935 changing obj-elf.c (which may be the Right Thing, in the end). */
940 char *saved_input_line_pointer;
942 saved_input_line_pointer = input_line_pointer;
943 input_line_pointer = name;
945 input_line_pointer = saved_input_line_pointer;
948 /* Map 's' to SHF_IA_64_SHORT. */
951 ia64_elf_section_letter (letter, ptr_msg)
956 return SHF_IA_64_SHORT;
957 else if (letter == 'o')
958 return SHF_LINK_ORDER;
960 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
964 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
967 ia64_elf_section_flags (flags, attr, type)
969 int attr, type ATTRIBUTE_UNUSED;
971 if (attr & SHF_IA_64_SHORT)
972 flags |= SEC_SMALL_DATA;
977 ia64_elf_section_type (str, len)
981 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
983 if (STREQ (ELF_STRING_ia64_unwind_info))
986 if (STREQ (ELF_STRING_ia64_unwind_info_once))
989 if (STREQ (ELF_STRING_ia64_unwind))
990 return SHT_IA_64_UNWIND;
992 if (STREQ (ELF_STRING_ia64_unwind_once))
993 return SHT_IA_64_UNWIND;
995 if (STREQ ("unwind"))
996 return SHT_IA_64_UNWIND;
998 if (STREQ ("init_array"))
999 return SHT_INIT_ARRAY;
1001 if (STREQ ("fini_array"))
1002 return SHT_FINI_ARRAY;
1009 set_regstack (ins, locs, outs, rots)
1010 unsigned int ins, locs, outs, rots;
1012 /* Size of frame. */
1015 sof = ins + locs + outs;
1018 as_bad ("Size of frame exceeds maximum of 96 registers");
1023 as_warn ("Size of rotating registers exceeds frame size");
1026 md.in.base = REG_GR + 32;
1027 md.loc.base = md.in.base + ins;
1028 md.out.base = md.loc.base + locs;
1030 md.in.num_regs = ins;
1031 md.loc.num_regs = locs;
1032 md.out.num_regs = outs;
1033 md.rot.num_regs = rots;
1040 struct label_fix *lfix;
1042 subsegT saved_subseg;
1045 if (!md.last_text_seg)
1048 saved_seg = now_seg;
1049 saved_subseg = now_subseg;
1051 subseg_set (md.last_text_seg, 0);
1053 while (md.num_slots_in_use > 0)
1054 emit_one_bundle (); /* force out queued instructions */
1056 /* In case there are labels following the last instruction, resolve
1058 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1060 S_SET_VALUE (lfix->sym, frag_now_fix ());
1061 symbol_set_frag (lfix->sym, frag_now);
1063 CURR_SLOT.label_fixups = 0;
1064 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1066 S_SET_VALUE (lfix->sym, frag_now_fix ());
1067 symbol_set_frag (lfix->sym, frag_now);
1069 CURR_SLOT.tag_fixups = 0;
1071 /* In case there are unwind directives following the last instruction,
1072 resolve those now. We only handle prologue, body, and endp directives
1073 here. Give an error for others. */
1074 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1076 switch (ptr->r.type)
1082 ptr->slot_number = (unsigned long) frag_more (0);
1083 ptr->slot_frag = frag_now;
1086 /* Allow any record which doesn't have a "t" field (i.e.,
1087 doesn't relate to a particular instruction). */
1103 as_bad (_("Unwind directive not followed by an instruction."));
1107 unwind.current_entry = NULL;
1109 subseg_set (saved_seg, saved_subseg);
1111 if (md.qp.X_op == O_register)
1112 as_bad ("qualifying predicate not followed by instruction");
1116 ia64_do_align (int nbytes)
1118 char *saved_input_line_pointer = input_line_pointer;
1120 input_line_pointer = "";
1121 s_align_bytes (nbytes);
1122 input_line_pointer = saved_input_line_pointer;
1126 ia64_cons_align (nbytes)
1131 char *saved_input_line_pointer = input_line_pointer;
1132 input_line_pointer = "";
1133 s_align_bytes (nbytes);
1134 input_line_pointer = saved_input_line_pointer;
1138 /* Output COUNT bytes to a memory location. */
1139 static unsigned char *vbyte_mem_ptr = NULL;
1142 output_vbyte_mem (count, ptr, comment)
1145 char *comment ATTRIBUTE_UNUSED;
1148 if (vbyte_mem_ptr == NULL)
1153 for (x = 0; x < count; x++)
1154 *(vbyte_mem_ptr++) = ptr[x];
1157 /* Count the number of bytes required for records. */
1158 static int vbyte_count = 0;
1160 count_output (count, ptr, comment)
1162 char *ptr ATTRIBUTE_UNUSED;
1163 char *comment ATTRIBUTE_UNUSED;
1165 vbyte_count += count;
1169 output_R1_format (f, rtype, rlen)
1171 unw_record_type rtype;
1178 output_R3_format (f, rtype, rlen);
1184 else if (rtype != prologue)
1185 as_bad ("record type is not valid");
1187 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1188 (*f) (1, &byte, NULL);
1192 output_R2_format (f, mask, grsave, rlen)
1199 mask = (mask & 0x0f);
1200 grsave = (grsave & 0x7f);
1202 bytes[0] = (UNW_R2 | (mask >> 1));
1203 bytes[1] = (((mask & 0x01) << 7) | grsave);
1204 count += output_leb128 (bytes + 2, rlen, 0);
1205 (*f) (count, bytes, NULL);
1209 output_R3_format (f, rtype, rlen)
1211 unw_record_type rtype;
1218 output_R1_format (f, rtype, rlen);
1224 else if (rtype != prologue)
1225 as_bad ("record type is not valid");
1226 bytes[0] = (UNW_R3 | r);
1227 count = output_leb128 (bytes + 1, rlen, 0);
1228 (*f) (count + 1, bytes, NULL);
1232 output_P1_format (f, brmask)
1237 byte = UNW_P1 | (brmask & 0x1f);
1238 (*f) (1, &byte, NULL);
1242 output_P2_format (f, brmask, gr)
1248 brmask = (brmask & 0x1f);
1249 bytes[0] = UNW_P2 | (brmask >> 1);
1250 bytes[1] = (((brmask & 1) << 7) | gr);
1251 (*f) (2, bytes, NULL);
1255 output_P3_format (f, rtype, reg)
1257 unw_record_type rtype;
1302 as_bad ("Invalid record type for P3 format.");
1304 bytes[0] = (UNW_P3 | (r >> 1));
1305 bytes[1] = (((r & 1) << 7) | reg);
1306 (*f) (2, bytes, NULL);
1310 output_P4_format (f, imask, imask_size)
1312 unsigned char *imask;
1313 unsigned long imask_size;
1316 (*f) (imask_size, imask, NULL);
1320 output_P5_format (f, grmask, frmask)
1323 unsigned long frmask;
1326 grmask = (grmask & 0x0f);
1329 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1330 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1331 bytes[3] = (frmask & 0x000000ff);
1332 (*f) (4, bytes, NULL);
1336 output_P6_format (f, rtype, rmask)
1338 unw_record_type rtype;
1344 if (rtype == gr_mem)
1346 else if (rtype != fr_mem)
1347 as_bad ("Invalid record type for format P6");
1348 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1349 (*f) (1, &byte, NULL);
1353 output_P7_format (f, rtype, w1, w2)
1355 unw_record_type rtype;
1362 count += output_leb128 (bytes + 1, w1, 0);
1367 count += output_leb128 (bytes + count, w2 >> 4, 0);
1417 bytes[0] = (UNW_P7 | r);
1418 (*f) (count, bytes, NULL);
1422 output_P8_format (f, rtype, t)
1424 unw_record_type rtype;
1463 case bspstore_psprel:
1466 case bspstore_sprel:
1478 case priunat_when_gr:
1481 case priunat_psprel:
1487 case priunat_when_mem:
1494 count += output_leb128 (bytes + 2, t, 0);
1495 (*f) (count, bytes, NULL);
1499 output_P9_format (f, grmask, gr)
1506 bytes[1] = (grmask & 0x0f);
1507 bytes[2] = (gr & 0x7f);
1508 (*f) (3, bytes, NULL);
1512 output_P10_format (f, abi, context)
1519 bytes[1] = (abi & 0xff);
1520 bytes[2] = (context & 0xff);
1521 (*f) (3, bytes, NULL);
1525 output_B1_format (f, rtype, label)
1527 unw_record_type rtype;
1528 unsigned long label;
1534 output_B4_format (f, rtype, label);
1537 if (rtype == copy_state)
1539 else if (rtype != label_state)
1540 as_bad ("Invalid record type for format B1");
1542 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1543 (*f) (1, &byte, NULL);
1547 output_B2_format (f, ecount, t)
1549 unsigned long ecount;
1556 output_B3_format (f, ecount, t);
1559 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1560 count += output_leb128 (bytes + 1, t, 0);
1561 (*f) (count, bytes, NULL);
1565 output_B3_format (f, ecount, t)
1567 unsigned long ecount;
1574 output_B2_format (f, ecount, t);
1578 count += output_leb128 (bytes + 1, t, 0);
1579 count += output_leb128 (bytes + count, ecount, 0);
1580 (*f) (count, bytes, NULL);
1584 output_B4_format (f, rtype, label)
1586 unw_record_type rtype;
1587 unsigned long label;
1594 output_B1_format (f, rtype, label);
1598 if (rtype == copy_state)
1600 else if (rtype != label_state)
1601 as_bad ("Invalid record type for format B1");
1603 bytes[0] = (UNW_B4 | (r << 3));
1604 count += output_leb128 (bytes + 1, label, 0);
1605 (*f) (count, bytes, NULL);
1609 format_ab_reg (ab, reg)
1616 ret = (ab << 5) | reg;
1621 output_X1_format (f, rtype, ab, reg, t, w1)
1623 unw_record_type rtype;
1633 if (rtype == spill_sprel)
1635 else if (rtype != spill_psprel)
1636 as_bad ("Invalid record type for format X1");
1637 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1638 count += output_leb128 (bytes + 2, t, 0);
1639 count += output_leb128 (bytes + count, w1, 0);
1640 (*f) (count, bytes, NULL);
1644 output_X2_format (f, ab, reg, x, y, treg, t)
1653 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1654 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1655 count += output_leb128 (bytes + 3, t, 0);
1656 (*f) (count, bytes, NULL);
1660 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1662 unw_record_type rtype;
1673 if (rtype == spill_sprel_p)
1675 else if (rtype != spill_psprel_p)
1676 as_bad ("Invalid record type for format X3");
1677 bytes[1] = ((r << 7) | (qp & 0x3f));
1678 bytes[2] = format_ab_reg (ab, reg);
1679 count += output_leb128 (bytes + 3, t, 0);
1680 count += output_leb128 (bytes + count, w1, 0);
1681 (*f) (count, bytes, NULL);
1685 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1695 bytes[1] = (qp & 0x3f);
1696 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1697 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1698 count += output_leb128 (bytes + 4, t, 0);
1699 (*f) (count, bytes, NULL);
1702 /* This function allocates a record list structure, and initializes fields. */
1704 static unw_rec_list *
1705 alloc_record (unw_record_type t)
1708 ptr = xmalloc (sizeof (*ptr));
1710 ptr->slot_number = SLOT_NUM_NOT_SET;
1712 ptr->next_slot_number = 0;
1713 ptr->next_slot_frag = 0;
1717 /* Dummy unwind record used for calculating the length of the last prologue or
1720 static unw_rec_list *
1723 unw_rec_list *ptr = alloc_record (endp);
1727 static unw_rec_list *
1730 unw_rec_list *ptr = alloc_record (prologue);
1731 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1735 static unw_rec_list *
1736 output_prologue_gr (saved_mask, reg)
1737 unsigned int saved_mask;
1740 unw_rec_list *ptr = alloc_record (prologue_gr);
1741 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1742 ptr->r.record.r.grmask = saved_mask;
1743 ptr->r.record.r.grsave = reg;
1747 static unw_rec_list *
1750 unw_rec_list *ptr = alloc_record (body);
1754 static unw_rec_list *
1755 output_mem_stack_f (size)
1758 unw_rec_list *ptr = alloc_record (mem_stack_f);
1759 ptr->r.record.p.size = size;
1763 static unw_rec_list *
1764 output_mem_stack_v ()
1766 unw_rec_list *ptr = alloc_record (mem_stack_v);
1770 static unw_rec_list *
1774 unw_rec_list *ptr = alloc_record (psp_gr);
1775 ptr->r.record.p.gr = gr;
1779 static unw_rec_list *
1780 output_psp_sprel (offset)
1781 unsigned int offset;
1783 unw_rec_list *ptr = alloc_record (psp_sprel);
1784 ptr->r.record.p.spoff = offset / 4;
1788 static unw_rec_list *
1791 unw_rec_list *ptr = alloc_record (rp_when);
1795 static unw_rec_list *
1799 unw_rec_list *ptr = alloc_record (rp_gr);
1800 ptr->r.record.p.gr = gr;
1804 static unw_rec_list *
1808 unw_rec_list *ptr = alloc_record (rp_br);
1809 ptr->r.record.p.br = br;
1813 static unw_rec_list *
1814 output_rp_psprel (offset)
1815 unsigned int offset;
1817 unw_rec_list *ptr = alloc_record (rp_psprel);
1818 ptr->r.record.p.pspoff = offset / 4;
1822 static unw_rec_list *
1823 output_rp_sprel (offset)
1824 unsigned int offset;
1826 unw_rec_list *ptr = alloc_record (rp_sprel);
1827 ptr->r.record.p.spoff = offset / 4;
1831 static unw_rec_list *
1834 unw_rec_list *ptr = alloc_record (pfs_when);
1838 static unw_rec_list *
1842 unw_rec_list *ptr = alloc_record (pfs_gr);
1843 ptr->r.record.p.gr = gr;
1847 static unw_rec_list *
1848 output_pfs_psprel (offset)
1849 unsigned int offset;
1851 unw_rec_list *ptr = alloc_record (pfs_psprel);
1852 ptr->r.record.p.pspoff = offset / 4;
1856 static unw_rec_list *
1857 output_pfs_sprel (offset)
1858 unsigned int offset;
1860 unw_rec_list *ptr = alloc_record (pfs_sprel);
1861 ptr->r.record.p.spoff = offset / 4;
1865 static unw_rec_list *
1866 output_preds_when ()
1868 unw_rec_list *ptr = alloc_record (preds_when);
1872 static unw_rec_list *
1873 output_preds_gr (gr)
1876 unw_rec_list *ptr = alloc_record (preds_gr);
1877 ptr->r.record.p.gr = gr;
1881 static unw_rec_list *
1882 output_preds_psprel (offset)
1883 unsigned int offset;
1885 unw_rec_list *ptr = alloc_record (preds_psprel);
1886 ptr->r.record.p.pspoff = offset / 4;
1890 static unw_rec_list *
1891 output_preds_sprel (offset)
1892 unsigned int offset;
1894 unw_rec_list *ptr = alloc_record (preds_sprel);
1895 ptr->r.record.p.spoff = offset / 4;
1899 static unw_rec_list *
1900 output_fr_mem (mask)
1903 unw_rec_list *ptr = alloc_record (fr_mem);
1904 ptr->r.record.p.rmask = mask;
1908 static unw_rec_list *
1909 output_frgr_mem (gr_mask, fr_mask)
1910 unsigned int gr_mask;
1911 unsigned int fr_mask;
1913 unw_rec_list *ptr = alloc_record (frgr_mem);
1914 ptr->r.record.p.grmask = gr_mask;
1915 ptr->r.record.p.frmask = fr_mask;
1919 static unw_rec_list *
1920 output_gr_gr (mask, reg)
1924 unw_rec_list *ptr = alloc_record (gr_gr);
1925 ptr->r.record.p.grmask = mask;
1926 ptr->r.record.p.gr = reg;
1930 static unw_rec_list *
1931 output_gr_mem (mask)
1934 unw_rec_list *ptr = alloc_record (gr_mem);
1935 ptr->r.record.p.rmask = mask;
1939 static unw_rec_list *
1940 output_br_mem (unsigned int mask)
1942 unw_rec_list *ptr = alloc_record (br_mem);
1943 ptr->r.record.p.brmask = mask;
1947 static unw_rec_list *
1948 output_br_gr (save_mask, reg)
1949 unsigned int save_mask;
1952 unw_rec_list *ptr = alloc_record (br_gr);
1953 ptr->r.record.p.brmask = save_mask;
1954 ptr->r.record.p.gr = reg;
1958 static unw_rec_list *
1959 output_spill_base (offset)
1960 unsigned int offset;
1962 unw_rec_list *ptr = alloc_record (spill_base);
1963 ptr->r.record.p.pspoff = offset / 4;
1967 static unw_rec_list *
1970 unw_rec_list *ptr = alloc_record (unat_when);
1974 static unw_rec_list *
1978 unw_rec_list *ptr = alloc_record (unat_gr);
1979 ptr->r.record.p.gr = gr;
1983 static unw_rec_list *
1984 output_unat_psprel (offset)
1985 unsigned int offset;
1987 unw_rec_list *ptr = alloc_record (unat_psprel);
1988 ptr->r.record.p.pspoff = offset / 4;
1992 static unw_rec_list *
1993 output_unat_sprel (offset)
1994 unsigned int offset;
1996 unw_rec_list *ptr = alloc_record (unat_sprel);
1997 ptr->r.record.p.spoff = offset / 4;
2001 static unw_rec_list *
2004 unw_rec_list *ptr = alloc_record (lc_when);
2008 static unw_rec_list *
2012 unw_rec_list *ptr = alloc_record (lc_gr);
2013 ptr->r.record.p.gr = gr;
2017 static unw_rec_list *
2018 output_lc_psprel (offset)
2019 unsigned int offset;
2021 unw_rec_list *ptr = alloc_record (lc_psprel);
2022 ptr->r.record.p.pspoff = offset / 4;
2026 static unw_rec_list *
2027 output_lc_sprel (offset)
2028 unsigned int offset;
2030 unw_rec_list *ptr = alloc_record (lc_sprel);
2031 ptr->r.record.p.spoff = offset / 4;
2035 static unw_rec_list *
2038 unw_rec_list *ptr = alloc_record (fpsr_when);
2042 static unw_rec_list *
2046 unw_rec_list *ptr = alloc_record (fpsr_gr);
2047 ptr->r.record.p.gr = gr;
2051 static unw_rec_list *
2052 output_fpsr_psprel (offset)
2053 unsigned int offset;
2055 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2056 ptr->r.record.p.pspoff = offset / 4;
2060 static unw_rec_list *
2061 output_fpsr_sprel (offset)
2062 unsigned int offset;
2064 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2065 ptr->r.record.p.spoff = offset / 4;
2069 static unw_rec_list *
2070 output_priunat_when_gr ()
2072 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2076 static unw_rec_list *
2077 output_priunat_when_mem ()
2079 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2083 static unw_rec_list *
2084 output_priunat_gr (gr)
2087 unw_rec_list *ptr = alloc_record (priunat_gr);
2088 ptr->r.record.p.gr = gr;
2092 static unw_rec_list *
2093 output_priunat_psprel (offset)
2094 unsigned int offset;
2096 unw_rec_list *ptr = alloc_record (priunat_psprel);
2097 ptr->r.record.p.pspoff = offset / 4;
2101 static unw_rec_list *
2102 output_priunat_sprel (offset)
2103 unsigned int offset;
2105 unw_rec_list *ptr = alloc_record (priunat_sprel);
2106 ptr->r.record.p.spoff = offset / 4;
2110 static unw_rec_list *
2113 unw_rec_list *ptr = alloc_record (bsp_when);
2117 static unw_rec_list *
2121 unw_rec_list *ptr = alloc_record (bsp_gr);
2122 ptr->r.record.p.gr = gr;
2126 static unw_rec_list *
2127 output_bsp_psprel (offset)
2128 unsigned int offset;
2130 unw_rec_list *ptr = alloc_record (bsp_psprel);
2131 ptr->r.record.p.pspoff = offset / 4;
2135 static unw_rec_list *
2136 output_bsp_sprel (offset)
2137 unsigned int offset;
2139 unw_rec_list *ptr = alloc_record (bsp_sprel);
2140 ptr->r.record.p.spoff = offset / 4;
2144 static unw_rec_list *
2145 output_bspstore_when ()
2147 unw_rec_list *ptr = alloc_record (bspstore_when);
2151 static unw_rec_list *
2152 output_bspstore_gr (gr)
2155 unw_rec_list *ptr = alloc_record (bspstore_gr);
2156 ptr->r.record.p.gr = gr;
2160 static unw_rec_list *
2161 output_bspstore_psprel (offset)
2162 unsigned int offset;
2164 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2165 ptr->r.record.p.pspoff = offset / 4;
2169 static unw_rec_list *
2170 output_bspstore_sprel (offset)
2171 unsigned int offset;
2173 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2174 ptr->r.record.p.spoff = offset / 4;
2178 static unw_rec_list *
2181 unw_rec_list *ptr = alloc_record (rnat_when);
2185 static unw_rec_list *
2189 unw_rec_list *ptr = alloc_record (rnat_gr);
2190 ptr->r.record.p.gr = gr;
2194 static unw_rec_list *
2195 output_rnat_psprel (offset)
2196 unsigned int offset;
2198 unw_rec_list *ptr = alloc_record (rnat_psprel);
2199 ptr->r.record.p.pspoff = offset / 4;
2203 static unw_rec_list *
2204 output_rnat_sprel (offset)
2205 unsigned int offset;
2207 unw_rec_list *ptr = alloc_record (rnat_sprel);
2208 ptr->r.record.p.spoff = offset / 4;
2212 static unw_rec_list *
2213 output_unwabi (abi, context)
2215 unsigned long context;
2217 unw_rec_list *ptr = alloc_record (unwabi);
2218 ptr->r.record.p.abi = abi;
2219 ptr->r.record.p.context = context;
2223 static unw_rec_list *
2224 output_epilogue (unsigned long ecount)
2226 unw_rec_list *ptr = alloc_record (epilogue);
2227 ptr->r.record.b.ecount = ecount;
2231 static unw_rec_list *
2232 output_label_state (unsigned long label)
2234 unw_rec_list *ptr = alloc_record (label_state);
2235 ptr->r.record.b.label = label;
2239 static unw_rec_list *
2240 output_copy_state (unsigned long label)
2242 unw_rec_list *ptr = alloc_record (copy_state);
2243 ptr->r.record.b.label = label;
2247 static unw_rec_list *
2248 output_spill_psprel (ab, reg, offset)
2251 unsigned int offset;
2253 unw_rec_list *ptr = alloc_record (spill_psprel);
2254 ptr->r.record.x.ab = ab;
2255 ptr->r.record.x.reg = reg;
2256 ptr->r.record.x.pspoff = offset / 4;
2260 static unw_rec_list *
2261 output_spill_sprel (ab, reg, offset)
2264 unsigned int offset;
2266 unw_rec_list *ptr = alloc_record (spill_sprel);
2267 ptr->r.record.x.ab = ab;
2268 ptr->r.record.x.reg = reg;
2269 ptr->r.record.x.spoff = offset / 4;
2273 static unw_rec_list *
2274 output_spill_psprel_p (ab, reg, offset, predicate)
2277 unsigned int offset;
2278 unsigned int predicate;
2280 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2281 ptr->r.record.x.ab = ab;
2282 ptr->r.record.x.reg = reg;
2283 ptr->r.record.x.pspoff = offset / 4;
2284 ptr->r.record.x.qp = predicate;
2288 static unw_rec_list *
2289 output_spill_sprel_p (ab, reg, offset, predicate)
2292 unsigned int offset;
2293 unsigned int predicate;
2295 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2296 ptr->r.record.x.ab = ab;
2297 ptr->r.record.x.reg = reg;
2298 ptr->r.record.x.spoff = offset / 4;
2299 ptr->r.record.x.qp = predicate;
2303 static unw_rec_list *
2304 output_spill_reg (ab, reg, targ_reg, xy)
2307 unsigned int targ_reg;
2310 unw_rec_list *ptr = alloc_record (spill_reg);
2311 ptr->r.record.x.ab = ab;
2312 ptr->r.record.x.reg = reg;
2313 ptr->r.record.x.treg = targ_reg;
2314 ptr->r.record.x.xy = xy;
2318 static unw_rec_list *
2319 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2322 unsigned int targ_reg;
2324 unsigned int predicate;
2326 unw_rec_list *ptr = alloc_record (spill_reg_p);
2327 ptr->r.record.x.ab = ab;
2328 ptr->r.record.x.reg = reg;
2329 ptr->r.record.x.treg = targ_reg;
2330 ptr->r.record.x.xy = xy;
2331 ptr->r.record.x.qp = predicate;
2335 /* Given a unw_rec_list process the correct format with the
2336 specified function. */
2339 process_one_record (ptr, f)
2343 unsigned long fr_mask, gr_mask;
2345 switch (ptr->r.type)
2347 /* This is a dummy record that takes up no space in the output. */
2355 /* These are taken care of by prologue/prologue_gr. */
2360 if (ptr->r.type == prologue_gr)
2361 output_R2_format (f, ptr->r.record.r.grmask,
2362 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2364 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2366 /* Output descriptor(s) for union of register spills (if any). */
2367 gr_mask = ptr->r.record.r.mask.gr_mem;
2368 fr_mask = ptr->r.record.r.mask.fr_mem;
2371 if ((fr_mask & ~0xfUL) == 0)
2372 output_P6_format (f, fr_mem, fr_mask);
2375 output_P5_format (f, gr_mask, fr_mask);
2380 output_P6_format (f, gr_mem, gr_mask);
2381 if (ptr->r.record.r.mask.br_mem)
2382 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2384 /* output imask descriptor if necessary: */
2385 if (ptr->r.record.r.mask.i)
2386 output_P4_format (f, ptr->r.record.r.mask.i,
2387 ptr->r.record.r.imask_size);
2391 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2395 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2396 ptr->r.record.p.size);
2409 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2412 output_P3_format (f, rp_br, ptr->r.record.p.br);
2415 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2423 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2432 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2442 case bspstore_sprel:
2444 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2447 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2450 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2453 as_bad ("spill_mask record unimplemented.");
2455 case priunat_when_gr:
2456 case priunat_when_mem:
2460 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2462 case priunat_psprel:
2464 case bspstore_psprel:
2466 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2469 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2472 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2476 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2479 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2480 ptr->r.record.x.reg, ptr->r.record.x.t,
2481 ptr->r.record.x.pspoff);
2484 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2485 ptr->r.record.x.reg, ptr->r.record.x.t,
2486 ptr->r.record.x.spoff);
2489 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2490 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2491 ptr->r.record.x.treg, ptr->r.record.x.t);
2493 case spill_psprel_p:
2494 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2495 ptr->r.record.x.ab, ptr->r.record.x.reg,
2496 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2499 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2500 ptr->r.record.x.ab, ptr->r.record.x.reg,
2501 ptr->r.record.x.t, ptr->r.record.x.spoff);
2504 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2505 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2506 ptr->r.record.x.xy, ptr->r.record.x.treg,
2510 as_bad ("record_type_not_valid");
2515 /* Given a unw_rec_list list, process all the records with
2516 the specified function. */
2518 process_unw_records (list, f)
2523 for (ptr = list; ptr; ptr = ptr->next)
2524 process_one_record (ptr, f);
2527 /* Determine the size of a record list in bytes. */
2529 calc_record_size (list)
2533 process_unw_records (list, count_output);
2537 /* Update IMASK bitmask to reflect the fact that one or more registers
2538 of type TYPE are saved starting at instruction with index T. If N
2539 bits are set in REGMASK, it is assumed that instructions T through
2540 T+N-1 save these registers.
2544 1: instruction saves next fp reg
2545 2: instruction saves next general reg
2546 3: instruction saves next branch reg */
2548 set_imask (region, regmask, t, type)
2549 unw_rec_list *region;
2550 unsigned long regmask;
2554 unsigned char *imask;
2555 unsigned long imask_size;
2559 imask = region->r.record.r.mask.i;
2560 imask_size = region->r.record.r.imask_size;
2563 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2564 imask = xmalloc (imask_size);
2565 memset (imask, 0, imask_size);
2567 region->r.record.r.imask_size = imask_size;
2568 region->r.record.r.mask.i = imask;
2572 pos = 2 * (3 - t % 4);
2575 if (i >= imask_size)
2577 as_bad ("Ignoring attempt to spill beyond end of region");
2581 imask[i] |= (type & 0x3) << pos;
2583 regmask &= (regmask - 1);
2593 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2594 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2595 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2599 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2600 unsigned long slot_addr;
2602 unsigned long first_addr;
2606 unsigned long index = 0;
2608 /* First time we are called, the initial address and frag are invalid. */
2609 if (first_addr == 0)
2612 /* If the two addresses are in different frags, then we need to add in
2613 the remaining size of this frag, and then the entire size of intermediate
2615 while (slot_frag != first_frag)
2617 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2621 /* We can get the final addresses only during and after
2623 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2624 index += 3 * ((first_frag->fr_next->fr_address
2625 - first_frag->fr_address
2626 - first_frag->fr_fix) >> 4);
2629 /* We don't know what the final addresses will be. We try our
2630 best to estimate. */
2631 switch (first_frag->fr_type)
2637 as_fatal ("only constant space allocation is supported");
2643 /* Take alignment into account. Assume the worst case
2644 before relaxation. */
2645 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2649 if (first_frag->fr_symbol)
2651 as_fatal ("only constant offsets are supported");
2655 index += 3 * (first_frag->fr_offset >> 4);
2659 /* Add in the full size of the frag converted to instruction slots. */
2660 index += 3 * (first_frag->fr_fix >> 4);
2661 /* Subtract away the initial part before first_addr. */
2662 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2663 + ((first_addr & 0x3) - (start_addr & 0x3)));
2665 /* Move to the beginning of the next frag. */
2666 first_frag = first_frag->fr_next;
2667 first_addr = (unsigned long) &first_frag->fr_literal;
2670 /* Add in the used part of the last frag. */
2671 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2672 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2676 /* Optimize unwind record directives. */
2678 static unw_rec_list *
2679 optimize_unw_records (list)
2685 /* If the only unwind record is ".prologue" or ".prologue" followed
2686 by ".body", then we can optimize the unwind directives away. */
2687 if (list->r.type == prologue
2688 && (list->next->r.type == endp
2689 || (list->next->r.type == body && list->next->next->r.type == endp)))
2695 /* Given a complete record list, process any records which have
2696 unresolved fields, (ie length counts for a prologue). After
2697 this has been run, all necessary information should be available
2698 within each record to generate an image. */
2701 fixup_unw_records (list, before_relax)
2705 unw_rec_list *ptr, *region = 0;
2706 unsigned long first_addr = 0, rlen = 0, t;
2707 fragS *first_frag = 0;
2709 for (ptr = list; ptr; ptr = ptr->next)
2711 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2712 as_bad (" Insn slot not set in unwind record.");
2713 t = slot_index (ptr->slot_number, ptr->slot_frag,
2714 first_addr, first_frag, before_relax);
2715 switch (ptr->r.type)
2723 unsigned long last_addr = 0;
2724 fragS *last_frag = NULL;
2726 first_addr = ptr->slot_number;
2727 first_frag = ptr->slot_frag;
2728 /* Find either the next body/prologue start, or the end of
2729 the function, and determine the size of the region. */
2730 for (last = ptr->next; last != NULL; last = last->next)
2731 if (last->r.type == prologue || last->r.type == prologue_gr
2732 || last->r.type == body || last->r.type == endp)
2734 last_addr = last->slot_number;
2735 last_frag = last->slot_frag;
2738 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2740 rlen = ptr->r.record.r.rlen = size;
2741 if (ptr->r.type == body)
2742 /* End of region. */
2749 ptr->r.record.b.t = rlen - 1 - t;
2760 case priunat_when_gr:
2761 case priunat_when_mem:
2765 ptr->r.record.p.t = t;
2773 case spill_psprel_p:
2774 ptr->r.record.x.t = t;
2780 as_bad ("frgr_mem record before region record!\n");
2783 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2784 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2785 set_imask (region, ptr->r.record.p.frmask, t, 1);
2786 set_imask (region, ptr->r.record.p.grmask, t, 2);
2791 as_bad ("fr_mem record before region record!\n");
2794 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2795 set_imask (region, ptr->r.record.p.rmask, t, 1);
2800 as_bad ("gr_mem record before region record!\n");
2803 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2804 set_imask (region, ptr->r.record.p.rmask, t, 2);
2809 as_bad ("br_mem record before region record!\n");
2812 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2813 set_imask (region, ptr->r.record.p.brmask, t, 3);
2819 as_bad ("gr_gr record before region record!\n");
2822 set_imask (region, ptr->r.record.p.grmask, t, 2);
2827 as_bad ("br_gr record before region record!\n");
2830 set_imask (region, ptr->r.record.p.brmask, t, 3);
2839 /* Estimate the size of a frag before relaxing. We only have one type of frag
2840 to handle here, which is the unwind info frag. */
2843 ia64_estimate_size_before_relax (fragS *frag,
2844 asection *segtype ATTRIBUTE_UNUSED)
2849 /* ??? This code is identical to the first part of ia64_convert_frag. */
2850 list = (unw_rec_list *) frag->fr_opcode;
2851 fixup_unw_records (list, 0);
2853 len = calc_record_size (list);
2854 /* pad to pointer-size boundary. */
2855 pad = len % md.pointer_size;
2857 len += md.pointer_size - pad;
2858 /* Add 8 for the header + a pointer for the personality offset. */
2859 size = len + 8 + md.pointer_size;
2861 /* fr_var carries the max_chars that we created the fragment with.
2862 We must, of course, have allocated enough memory earlier. */
2863 assert (frag->fr_var >= size);
2865 return frag->fr_fix + size;
2868 /* This function converts a rs_machine_dependent variant frag into a
2869 normal fill frag with the unwind image from the the record list. */
2871 ia64_convert_frag (fragS *frag)
2877 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2878 list = (unw_rec_list *) frag->fr_opcode;
2879 fixup_unw_records (list, 0);
2881 len = calc_record_size (list);
2882 /* pad to pointer-size boundary. */
2883 pad = len % md.pointer_size;
2885 len += md.pointer_size - pad;
2886 /* Add 8 for the header + a pointer for the personality offset. */
2887 size = len + 8 + md.pointer_size;
2889 /* fr_var carries the max_chars that we created the fragment with.
2890 We must, of course, have allocated enough memory earlier. */
2891 assert (frag->fr_var >= size);
2893 /* Initialize the header area. fr_offset is initialized with
2894 unwind.personality_routine. */
2895 if (frag->fr_offset)
2897 if (md.flags & EF_IA_64_ABI64)
2898 flag_value = (bfd_vma) 3 << 32;
2900 /* 32-bit unwind info block. */
2901 flag_value = (bfd_vma) 0x1003 << 32;
2906 md_number_to_chars (frag->fr_literal,
2907 (((bfd_vma) 1 << 48) /* Version. */
2908 | flag_value /* U & E handler flags. */
2909 | (len / md.pointer_size)), /* Length. */
2912 /* Skip the header. */
2913 vbyte_mem_ptr = frag->fr_literal + 8;
2914 process_unw_records (list, output_vbyte_mem);
2916 /* Fill the padding bytes with zeros. */
2918 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2919 md.pointer_size - pad);
2921 frag->fr_fix += size;
2922 frag->fr_type = rs_fill;
2924 frag->fr_offset = 0;
2928 convert_expr_to_ab_reg (e, ab, regp)
2935 if (e->X_op != O_register)
2938 reg = e->X_add_number;
2939 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2942 *regp = reg - REG_GR;
2944 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2945 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2948 *regp = reg - REG_FR;
2950 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2953 *regp = reg - REG_BR;
2960 case REG_PR: *regp = 0; break;
2961 case REG_PSP: *regp = 1; break;
2962 case REG_PRIUNAT: *regp = 2; break;
2963 case REG_BR + 0: *regp = 3; break;
2964 case REG_AR + AR_BSP: *regp = 4; break;
2965 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2966 case REG_AR + AR_RNAT: *regp = 6; break;
2967 case REG_AR + AR_UNAT: *regp = 7; break;
2968 case REG_AR + AR_FPSR: *regp = 8; break;
2969 case REG_AR + AR_PFS: *regp = 9; break;
2970 case REG_AR + AR_LC: *regp = 10; break;
2980 convert_expr_to_xy_reg (e, xy, regp)
2987 if (e->X_op != O_register)
2990 reg = e->X_add_number;
2992 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2995 *regp = reg - REG_GR;
2997 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3000 *regp = reg - REG_FR;
3002 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3005 *regp = reg - REG_BR;
3015 /* The current frag is an alignment frag. */
3016 align_frag = frag_now;
3017 s_align_bytes (arg);
3022 int dummy ATTRIBUTE_UNUSED;
3027 radix = *input_line_pointer++;
3029 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3031 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3032 ignore_rest_of_line ();
3037 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3039 dot_special_section (which)
3042 set_section ((char *) special_section_name[which]);
3046 add_unwind_entry (ptr)
3050 unwind.tail->next = ptr;
3055 /* The current entry can in fact be a chain of unwind entries. */
3056 if (unwind.current_entry == NULL)
3057 unwind.current_entry = ptr;
3062 int dummy ATTRIBUTE_UNUSED;
3068 if (e.X_op != O_constant)
3069 as_bad ("Operand to .fframe must be a constant");
3071 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3076 int dummy ATTRIBUTE_UNUSED;
3082 reg = e.X_add_number - REG_GR;
3083 if (e.X_op == O_register && reg < 128)
3085 add_unwind_entry (output_mem_stack_v ());
3086 if (! (unwind.prologue_mask & 2))
3087 add_unwind_entry (output_psp_gr (reg));
3090 as_bad ("First operand to .vframe must be a general register");
3094 dot_vframesp (dummy)
3095 int dummy ATTRIBUTE_UNUSED;
3100 if (e.X_op == O_constant)
3102 add_unwind_entry (output_mem_stack_v ());
3103 add_unwind_entry (output_psp_sprel (e.X_add_number));
3106 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3110 dot_vframepsp (dummy)
3111 int dummy ATTRIBUTE_UNUSED;
3116 if (e.X_op == O_constant)
3118 add_unwind_entry (output_mem_stack_v ());
3119 add_unwind_entry (output_psp_sprel (e.X_add_number));
3122 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3127 int dummy ATTRIBUTE_UNUSED;
3133 sep = parse_operand (&e1);
3135 as_bad ("No second operand to .save");
3136 sep = parse_operand (&e2);
3138 reg1 = e1.X_add_number;
3139 reg2 = e2.X_add_number - REG_GR;
3141 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3142 if (e1.X_op == O_register)
3144 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3148 case REG_AR + AR_BSP:
3149 add_unwind_entry (output_bsp_when ());
3150 add_unwind_entry (output_bsp_gr (reg2));
3152 case REG_AR + AR_BSPSTORE:
3153 add_unwind_entry (output_bspstore_when ());
3154 add_unwind_entry (output_bspstore_gr (reg2));
3156 case REG_AR + AR_RNAT:
3157 add_unwind_entry (output_rnat_when ());
3158 add_unwind_entry (output_rnat_gr (reg2));
3160 case REG_AR + AR_UNAT:
3161 add_unwind_entry (output_unat_when ());
3162 add_unwind_entry (output_unat_gr (reg2));
3164 case REG_AR + AR_FPSR:
3165 add_unwind_entry (output_fpsr_when ());
3166 add_unwind_entry (output_fpsr_gr (reg2));
3168 case REG_AR + AR_PFS:
3169 add_unwind_entry (output_pfs_when ());
3170 if (! (unwind.prologue_mask & 4))
3171 add_unwind_entry (output_pfs_gr (reg2));
3173 case REG_AR + AR_LC:
3174 add_unwind_entry (output_lc_when ());
3175 add_unwind_entry (output_lc_gr (reg2));
3178 add_unwind_entry (output_rp_when ());
3179 if (! (unwind.prologue_mask & 8))
3180 add_unwind_entry (output_rp_gr (reg2));
3183 add_unwind_entry (output_preds_when ());
3184 if (! (unwind.prologue_mask & 1))
3185 add_unwind_entry (output_preds_gr (reg2));
3188 add_unwind_entry (output_priunat_when_gr ());
3189 add_unwind_entry (output_priunat_gr (reg2));
3192 as_bad ("First operand not a valid register");
3196 as_bad (" Second operand not a valid register");
3199 as_bad ("First operand not a register");
3204 int dummy ATTRIBUTE_UNUSED;
3207 unsigned long ecount; /* # of _additional_ regions to pop */
3210 sep = parse_operand (&e1);
3211 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3213 as_bad ("First operand to .restore must be stack pointer (sp)");
3219 parse_operand (&e2);
3220 if (e2.X_op != O_constant || e2.X_add_number < 0)
3222 as_bad ("Second operand to .restore must be a constant >= 0");
3225 ecount = e2.X_add_number;
3228 ecount = unwind.prologue_count - 1;
3230 if (ecount >= unwind.prologue_count)
3232 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3233 ecount + 1, unwind.prologue_count);
3237 add_unwind_entry (output_epilogue (ecount));
3239 if (ecount < unwind.prologue_count)
3240 unwind.prologue_count -= ecount + 1;
3242 unwind.prologue_count = 0;
3246 dot_restorereg (dummy)
3247 int dummy ATTRIBUTE_UNUSED;
3249 unsigned int ab, reg;
3254 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3256 as_bad ("First operand to .restorereg must be a preserved register");
3259 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3263 dot_restorereg_p (dummy)
3264 int dummy ATTRIBUTE_UNUSED;
3266 unsigned int qp, ab, reg;
3270 sep = parse_operand (&e1);
3273 as_bad ("No second operand to .restorereg.p");
3277 parse_operand (&e2);
3279 qp = e1.X_add_number - REG_P;
3280 if (e1.X_op != O_register || qp > 63)
3282 as_bad ("First operand to .restorereg.p must be a predicate");
3286 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3288 as_bad ("Second operand to .restorereg.p must be a preserved register");
3291 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3294 static char *special_linkonce_name[] =
3296 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3300 start_unwind_section (const segT text_seg, int sec_index)
3303 Use a slightly ugly scheme to derive the unwind section names from
3304 the text section name:
3306 text sect. unwind table sect.
3307 name: name: comments:
3308 ---------- ----------------- --------------------------------
3310 .text.foo .IA_64.unwind.text.foo
3311 .foo .IA_64.unwind.foo
3313 .gnu.linkonce.ia64unw.foo
3314 _info .IA_64.unwind_info gas issues error message (ditto)
3315 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3317 This mapping is done so that:
3319 (a) An object file with unwind info only in .text will use
3320 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3321 This follows the letter of the ABI and also ensures backwards
3322 compatibility with older toolchains.
3324 (b) An object file with unwind info in multiple text sections
3325 will use separate unwind sections for each text section.
3326 This allows us to properly set the "sh_info" and "sh_link"
3327 fields in SHT_IA_64_UNWIND as required by the ABI and also
3328 lets GNU ld support programs with multiple segments
3329 containing unwind info (as might be the case for certain
3330 embedded applications).
3332 (c) An error is issued if there would be a name clash.
3335 const char *text_name, *sec_text_name;
3337 const char *prefix = special_section_name [sec_index];
3339 size_t prefix_len, suffix_len, sec_name_len;
3341 sec_text_name = segment_name (text_seg);
3342 text_name = sec_text_name;
3343 if (strncmp (text_name, "_info", 5) == 0)
3345 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3347 ignore_rest_of_line ();
3350 if (strcmp (text_name, ".text") == 0)
3353 /* Build the unwind section name by appending the (possibly stripped)
3354 text section name to the unwind prefix. */
3356 if (strncmp (text_name, ".gnu.linkonce.t.",
3357 sizeof (".gnu.linkonce.t.") - 1) == 0)
3359 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3360 suffix += sizeof (".gnu.linkonce.t.") - 1;
3363 prefix_len = strlen (prefix);
3364 suffix_len = strlen (suffix);
3365 sec_name_len = prefix_len + suffix_len;
3366 sec_name = alloca (sec_name_len + 1);
3367 memcpy (sec_name, prefix, prefix_len);
3368 memcpy (sec_name + prefix_len, suffix, suffix_len);
3369 sec_name [sec_name_len] = '\0';
3371 /* Handle COMDAT group. */
3372 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3375 size_t len, group_name_len;
3376 const char *group_name = elf_group_name (text_seg);
3378 if (group_name == NULL)
3380 as_bad ("Group section `%s' has no group signature",
3382 ignore_rest_of_line ();
3385 /* We have to construct a fake section directive. */
3386 group_name_len = strlen (group_name);
3388 + 16 /* ,"aG",@progbits, */
3389 + group_name_len /* ,group_name */
3392 section = alloca (len + 1);
3393 memcpy (section, sec_name, sec_name_len);
3394 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3395 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3396 memcpy (section + len - 7, ",comdat", 7);
3397 section [len] = '\0';
3398 set_section (section);
3402 set_section (sec_name);
3403 bfd_set_section_flags (stdoutput, now_seg,
3404 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3407 elf_linked_to_section (now_seg) = text_seg;
3411 generate_unwind_image (const segT text_seg)
3416 /* Mark the end of the unwind info, so that we can compute the size of the
3417 last unwind region. */
3418 add_unwind_entry (output_endp ());
3420 /* Force out pending instructions, to make sure all unwind records have
3421 a valid slot_number field. */
3422 ia64_flush_insns ();
3424 /* Generate the unwind record. */
3425 list = optimize_unw_records (unwind.list);
3426 fixup_unw_records (list, 1);
3427 size = calc_record_size (list);
3429 if (size > 0 || unwind.force_unwind_entry)
3431 unwind.force_unwind_entry = 0;
3432 /* pad to pointer-size boundary. */
3433 pad = size % md.pointer_size;
3435 size += md.pointer_size - pad;
3436 /* Add 8 for the header + a pointer for the personality
3438 size += 8 + md.pointer_size;
3441 /* If there are unwind records, switch sections, and output the info. */
3445 bfd_reloc_code_real_type reloc;
3447 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
3449 /* Make sure the section has 4 byte alignment for ILP32 and
3450 8 byte alignment for LP64. */
3451 frag_align (md.pointer_size_shift, 0, 0);
3452 record_alignment (now_seg, md.pointer_size_shift);
3454 /* Set expression which points to start of unwind descriptor area. */
3455 unwind.info = expr_build_dot ();
3457 frag_var (rs_machine_dependent, size, size, 0, 0,
3458 (offsetT) (long) unwind.personality_routine,
3461 /* Add the personality address to the image. */
3462 if (unwind.personality_routine != 0)
3464 exp.X_op = O_symbol;
3465 exp.X_add_symbol = unwind.personality_routine;
3466 exp.X_add_number = 0;
3468 if (md.flags & EF_IA_64_BE)
3470 if (md.flags & EF_IA_64_ABI64)
3471 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3473 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3477 if (md.flags & EF_IA_64_ABI64)
3478 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3480 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3483 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3484 md.pointer_size, &exp, 0, reloc);
3485 unwind.personality_routine = 0;
3489 free_saved_prologue_counts ();
3490 unwind.list = unwind.tail = unwind.current_entry = NULL;
3494 dot_handlerdata (dummy)
3495 int dummy ATTRIBUTE_UNUSED;
3497 unwind.force_unwind_entry = 1;
3499 /* Remember which segment we're in so we can switch back after .endp */
3500 unwind.saved_text_seg = now_seg;
3501 unwind.saved_text_subseg = now_subseg;
3503 /* Generate unwind info into unwind-info section and then leave that
3504 section as the currently active one so dataXX directives go into
3505 the language specific data area of the unwind info block. */
3506 generate_unwind_image (now_seg);
3507 demand_empty_rest_of_line ();
3511 dot_unwentry (dummy)
3512 int dummy ATTRIBUTE_UNUSED;
3514 unwind.force_unwind_entry = 1;
3515 demand_empty_rest_of_line ();
3520 int dummy ATTRIBUTE_UNUSED;
3526 reg = e.X_add_number - REG_BR;
3527 if (e.X_op == O_register && reg < 8)
3528 add_unwind_entry (output_rp_br (reg));
3530 as_bad ("First operand not a valid branch register");
3534 dot_savemem (psprel)
3541 sep = parse_operand (&e1);
3543 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3544 sep = parse_operand (&e2);
3546 reg1 = e1.X_add_number;
3547 val = e2.X_add_number;
3549 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3550 if (e1.X_op == O_register)
3552 if (e2.X_op == O_constant)
3556 case REG_AR + AR_BSP:
3557 add_unwind_entry (output_bsp_when ());
3558 add_unwind_entry ((psprel
3560 : output_bsp_sprel) (val));
3562 case REG_AR + AR_BSPSTORE:
3563 add_unwind_entry (output_bspstore_when ());
3564 add_unwind_entry ((psprel
3565 ? output_bspstore_psprel
3566 : output_bspstore_sprel) (val));
3568 case REG_AR + AR_RNAT:
3569 add_unwind_entry (output_rnat_when ());
3570 add_unwind_entry ((psprel
3571 ? output_rnat_psprel
3572 : output_rnat_sprel) (val));
3574 case REG_AR + AR_UNAT:
3575 add_unwind_entry (output_unat_when ());
3576 add_unwind_entry ((psprel
3577 ? output_unat_psprel
3578 : output_unat_sprel) (val));
3580 case REG_AR + AR_FPSR:
3581 add_unwind_entry (output_fpsr_when ());
3582 add_unwind_entry ((psprel
3583 ? output_fpsr_psprel
3584 : output_fpsr_sprel) (val));
3586 case REG_AR + AR_PFS:
3587 add_unwind_entry (output_pfs_when ());
3588 add_unwind_entry ((psprel
3590 : output_pfs_sprel) (val));
3592 case REG_AR + AR_LC:
3593 add_unwind_entry (output_lc_when ());
3594 add_unwind_entry ((psprel
3596 : output_lc_sprel) (val));
3599 add_unwind_entry (output_rp_when ());
3600 add_unwind_entry ((psprel
3602 : output_rp_sprel) (val));
3605 add_unwind_entry (output_preds_when ());
3606 add_unwind_entry ((psprel
3607 ? output_preds_psprel
3608 : output_preds_sprel) (val));
3611 add_unwind_entry (output_priunat_when_mem ());
3612 add_unwind_entry ((psprel
3613 ? output_priunat_psprel
3614 : output_priunat_sprel) (val));
3617 as_bad ("First operand not a valid register");
3621 as_bad (" Second operand not a valid constant");
3624 as_bad ("First operand not a register");
3629 int dummy ATTRIBUTE_UNUSED;
3633 sep = parse_operand (&e1);
3635 parse_operand (&e2);
3637 if (e1.X_op != O_constant)
3638 as_bad ("First operand to .save.g must be a constant.");
3641 int grmask = e1.X_add_number;
3643 add_unwind_entry (output_gr_mem (grmask));
3646 int reg = e2.X_add_number - REG_GR;
3647 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3648 add_unwind_entry (output_gr_gr (grmask, reg));
3650 as_bad ("Second operand is an invalid register.");
3657 int dummy ATTRIBUTE_UNUSED;
3661 sep = parse_operand (&e1);
3663 if (e1.X_op != O_constant)
3664 as_bad ("Operand to .save.f must be a constant.");
3666 add_unwind_entry (output_fr_mem (e1.X_add_number));
3671 int dummy ATTRIBUTE_UNUSED;
3678 sep = parse_operand (&e1);
3679 if (e1.X_op != O_constant)
3681 as_bad ("First operand to .save.b must be a constant.");
3684 brmask = e1.X_add_number;
3688 sep = parse_operand (&e2);
3689 reg = e2.X_add_number - REG_GR;
3690 if (e2.X_op != O_register || reg > 127)
3692 as_bad ("Second operand to .save.b must be a general register.");
3695 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3698 add_unwind_entry (output_br_mem (brmask));
3700 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3701 demand_empty_rest_of_line ();
3706 int dummy ATTRIBUTE_UNUSED;
3710 sep = parse_operand (&e1);
3712 parse_operand (&e2);
3714 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3715 as_bad ("Both operands of .save.gf must be constants.");
3718 int grmask = e1.X_add_number;
3719 int frmask = e2.X_add_number;
3720 add_unwind_entry (output_frgr_mem (grmask, frmask));
3726 int dummy ATTRIBUTE_UNUSED;
3731 sep = parse_operand (&e);
3732 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3733 demand_empty_rest_of_line ();
3735 if (e.X_op != O_constant)
3736 as_bad ("Operand to .spill must be a constant");
3738 add_unwind_entry (output_spill_base (e.X_add_number));
3742 dot_spillreg (dummy)
3743 int dummy ATTRIBUTE_UNUSED;
3745 int sep, ab, xy, reg, treg;
3748 sep = parse_operand (&e1);
3751 as_bad ("No second operand to .spillreg");
3755 parse_operand (&e2);
3757 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3759 as_bad ("First operand to .spillreg must be a preserved register");
3763 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3765 as_bad ("Second operand to .spillreg must be a register");
3769 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3773 dot_spillmem (psprel)
3779 sep = parse_operand (&e1);
3782 as_bad ("Second operand missing");
3786 parse_operand (&e2);
3788 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3790 as_bad ("First operand to .spill%s must be a preserved register",
3791 psprel ? "psp" : "sp");
3795 if (e2.X_op != O_constant)
3797 as_bad ("Second operand to .spill%s must be a constant",
3798 psprel ? "psp" : "sp");
3803 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3805 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3809 dot_spillreg_p (dummy)
3810 int dummy ATTRIBUTE_UNUSED;
3812 int sep, ab, xy, reg, treg;
3813 expressionS e1, e2, e3;
3816 sep = parse_operand (&e1);
3819 as_bad ("No second and third operand to .spillreg.p");
3823 sep = parse_operand (&e2);
3826 as_bad ("No third operand to .spillreg.p");
3830 parse_operand (&e3);
3832 qp = e1.X_add_number - REG_P;
3834 if (e1.X_op != O_register || qp > 63)
3836 as_bad ("First operand to .spillreg.p must be a predicate");
3840 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3842 as_bad ("Second operand to .spillreg.p must be a preserved register");
3846 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3848 as_bad ("Third operand to .spillreg.p must be a register");
3852 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3856 dot_spillmem_p (psprel)
3859 expressionS e1, e2, e3;
3863 sep = parse_operand (&e1);
3866 as_bad ("Second operand missing");
3870 parse_operand (&e2);
3873 as_bad ("Second operand missing");
3877 parse_operand (&e3);
3879 qp = e1.X_add_number - REG_P;
3880 if (e1.X_op != O_register || qp > 63)
3882 as_bad ("First operand to .spill%s_p must be a predicate",
3883 psprel ? "psp" : "sp");
3887 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3889 as_bad ("Second operand to .spill%s_p must be a preserved register",
3890 psprel ? "psp" : "sp");
3894 if (e3.X_op != O_constant)
3896 as_bad ("Third operand to .spill%s_p must be a constant",
3897 psprel ? "psp" : "sp");
3902 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3904 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3908 get_saved_prologue_count (lbl)
3911 label_prologue_count *lpc = unwind.saved_prologue_counts;
3913 while (lpc != NULL && lpc->label_number != lbl)
3917 return lpc->prologue_count;
3919 as_bad ("Missing .label_state %ld", lbl);
3924 save_prologue_count (lbl, count)
3928 label_prologue_count *lpc = unwind.saved_prologue_counts;
3930 while (lpc != NULL && lpc->label_number != lbl)
3934 lpc->prologue_count = count;
3937 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3939 new_lpc->next = unwind.saved_prologue_counts;
3940 new_lpc->label_number = lbl;
3941 new_lpc->prologue_count = count;
3942 unwind.saved_prologue_counts = new_lpc;
3947 free_saved_prologue_counts ()
3949 label_prologue_count *lpc = unwind.saved_prologue_counts;
3950 label_prologue_count *next;
3959 unwind.saved_prologue_counts = NULL;
3963 dot_label_state (dummy)
3964 int dummy ATTRIBUTE_UNUSED;
3969 if (e.X_op != O_constant)
3971 as_bad ("Operand to .label_state must be a constant");
3974 add_unwind_entry (output_label_state (e.X_add_number));
3975 save_prologue_count (e.X_add_number, unwind.prologue_count);
3979 dot_copy_state (dummy)
3980 int dummy ATTRIBUTE_UNUSED;
3985 if (e.X_op != O_constant)
3987 as_bad ("Operand to .copy_state must be a constant");
3990 add_unwind_entry (output_copy_state (e.X_add_number));
3991 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3996 int dummy ATTRIBUTE_UNUSED;
4001 sep = parse_operand (&e1);
4004 as_bad ("Second operand to .unwabi missing");
4007 sep = parse_operand (&e2);
4008 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4009 demand_empty_rest_of_line ();
4011 if (e1.X_op != O_constant)
4013 as_bad ("First operand to .unwabi must be a constant");
4017 if (e2.X_op != O_constant)
4019 as_bad ("Second operand to .unwabi must be a constant");
4023 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4027 dot_personality (dummy)
4028 int dummy ATTRIBUTE_UNUSED;
4032 name = input_line_pointer;
4033 c = get_symbol_end ();
4034 p = input_line_pointer;
4035 unwind.personality_routine = symbol_find_or_make (name);
4036 unwind.force_unwind_entry = 1;
4039 demand_empty_rest_of_line ();
4044 int dummy ATTRIBUTE_UNUSED;
4049 unwind.proc_start = expr_build_dot ();
4050 /* Parse names of main and alternate entry points and mark them as
4051 function symbols: */
4055 name = input_line_pointer;
4056 c = get_symbol_end ();
4057 p = input_line_pointer;
4058 sym = symbol_find_or_make (name);
4059 if (unwind.proc_start == 0)
4061 unwind.proc_start = sym;
4063 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4066 if (*input_line_pointer != ',')
4068 ++input_line_pointer;
4070 demand_empty_rest_of_line ();
4073 unwind.prologue_count = 0;
4074 unwind.list = unwind.tail = unwind.current_entry = NULL;
4075 unwind.personality_routine = 0;
4080 int dummy ATTRIBUTE_UNUSED;
4082 unwind.prologue = 0;
4083 unwind.prologue_mask = 0;
4085 add_unwind_entry (output_body ());
4086 demand_empty_rest_of_line ();
4090 dot_prologue (dummy)
4091 int dummy ATTRIBUTE_UNUSED;
4094 int mask = 0, grsave = 0;
4096 if (!is_it_end_of_statement ())
4099 sep = parse_operand (&e1);
4101 as_bad ("No second operand to .prologue");
4102 sep = parse_operand (&e2);
4103 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4104 demand_empty_rest_of_line ();
4106 if (e1.X_op == O_constant)
4108 mask = e1.X_add_number;
4110 if (e2.X_op == O_constant)
4111 grsave = e2.X_add_number;
4112 else if (e2.X_op == O_register
4113 && (grsave = e2.X_add_number - REG_GR) < 128)
4116 as_bad ("Second operand not a constant or general register");
4118 add_unwind_entry (output_prologue_gr (mask, grsave));
4121 as_bad ("First operand not a constant");
4124 add_unwind_entry (output_prologue ());
4126 unwind.prologue = 1;
4127 unwind.prologue_mask = mask;
4128 ++unwind.prologue_count;
4133 int dummy ATTRIBUTE_UNUSED;
4137 int bytes_per_address;
4140 subsegT saved_subseg;
4144 if (unwind.saved_text_seg)
4146 saved_seg = unwind.saved_text_seg;
4147 saved_subseg = unwind.saved_text_subseg;
4148 unwind.saved_text_seg = NULL;
4152 saved_seg = now_seg;
4153 saved_subseg = now_subseg;
4156 insn_group_break (1, 0, 0);
4158 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4160 generate_unwind_image (saved_seg);
4162 if (unwind.info || unwind.force_unwind_entry)
4164 subseg_set (md.last_text_seg, 0);
4165 unwind.proc_end = expr_build_dot ();
4167 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
4169 /* Make sure that section has 4 byte alignment for ILP32 and
4170 8 byte alignment for LP64. */
4171 record_alignment (now_seg, md.pointer_size_shift);
4173 /* Need space for 3 pointers for procedure start, procedure end,
4175 ptr = frag_more (3 * md.pointer_size);
4176 where = frag_now_fix () - (3 * md.pointer_size);
4177 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4179 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4180 e.X_op = O_pseudo_fixup;
4181 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4183 e.X_add_symbol = unwind.proc_start;
4184 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4186 e.X_op = O_pseudo_fixup;
4187 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4189 e.X_add_symbol = unwind.proc_end;
4190 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4191 bytes_per_address, &e);
4195 e.X_op = O_pseudo_fixup;
4196 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4198 e.X_add_symbol = unwind.info;
4199 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4200 bytes_per_address, &e);
4203 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4207 subseg_set (saved_seg, saved_subseg);
4209 /* Parse names of main and alternate entry points and set symbol sizes. */
4213 name = input_line_pointer;
4214 c = get_symbol_end ();
4215 p = input_line_pointer;
4216 sym = symbol_find (name);
4217 if (sym && unwind.proc_start
4218 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4219 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4221 fragS *fr = symbol_get_frag (unwind.proc_start);
4222 fragS *frag = symbol_get_frag (sym);
4224 /* Check whether the function label is at or beyond last
4226 while (fr && fr != frag)
4230 if (frag == frag_now && SEG_NORMAL (now_seg))
4231 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4234 symbol_get_obj (sym)->size =
4235 (expressionS *) xmalloc (sizeof (expressionS));
4236 symbol_get_obj (sym)->size->X_op = O_subtract;
4237 symbol_get_obj (sym)->size->X_add_symbol
4238 = symbol_new (FAKE_LABEL_NAME, now_seg,
4239 frag_now_fix (), frag_now);
4240 symbol_get_obj (sym)->size->X_op_symbol = sym;
4241 symbol_get_obj (sym)->size->X_add_number = 0;
4247 if (*input_line_pointer != ',')
4249 ++input_line_pointer;
4251 demand_empty_rest_of_line ();
4252 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4256 dot_template (template)
4259 CURR_SLOT.user_template = template;
4264 int dummy ATTRIBUTE_UNUSED;
4266 int ins, locs, outs, rots;
4268 if (is_it_end_of_statement ())
4269 ins = locs = outs = rots = 0;
4272 ins = get_absolute_expression ();
4273 if (*input_line_pointer++ != ',')
4275 locs = get_absolute_expression ();
4276 if (*input_line_pointer++ != ',')
4278 outs = get_absolute_expression ();
4279 if (*input_line_pointer++ != ',')
4281 rots = get_absolute_expression ();
4283 set_regstack (ins, locs, outs, rots);
4287 as_bad ("Comma expected");
4288 ignore_rest_of_line ();
4295 unsigned num_regs, num_alloced = 0;
4296 struct dynreg **drpp, *dr;
4297 int ch, base_reg = 0;
4303 case DYNREG_GR: base_reg = REG_GR + 32; break;
4304 case DYNREG_FR: base_reg = REG_FR + 32; break;
4305 case DYNREG_PR: base_reg = REG_P + 16; break;
4309 /* First, remove existing names from hash table. */
4310 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4312 hash_delete (md.dynreg_hash, dr->name);
4316 drpp = &md.dynreg[type];
4319 start = input_line_pointer;
4320 ch = get_symbol_end ();
4321 *input_line_pointer = ch;
4322 len = (input_line_pointer - start);
4325 if (*input_line_pointer != '[')
4327 as_bad ("Expected '['");
4330 ++input_line_pointer; /* skip '[' */
4332 num_regs = get_absolute_expression ();
4334 if (*input_line_pointer++ != ']')
4336 as_bad ("Expected ']'");
4341 num_alloced += num_regs;
4345 if (num_alloced > md.rot.num_regs)
4347 as_bad ("Used more than the declared %d rotating registers",
4353 if (num_alloced > 96)
4355 as_bad ("Used more than the available 96 rotating registers");
4360 if (num_alloced > 48)
4362 as_bad ("Used more than the available 48 rotating registers");
4371 name = obstack_alloc (¬es, len + 1);
4372 memcpy (name, start, len);
4377 *drpp = obstack_alloc (¬es, sizeof (*dr));
4378 memset (*drpp, 0, sizeof (*dr));
4383 dr->num_regs = num_regs;
4384 dr->base = base_reg;
4386 base_reg += num_regs;
4388 if (hash_insert (md.dynreg_hash, name, dr))
4390 as_bad ("Attempt to redefine register set `%s'", name);
4394 if (*input_line_pointer != ',')
4396 ++input_line_pointer; /* skip comma */
4399 demand_empty_rest_of_line ();
4403 ignore_rest_of_line ();
4407 dot_byteorder (byteorder)
4410 segment_info_type *seginfo = seg_info (now_seg);
4412 if (byteorder == -1)
4414 if (seginfo->tc_segment_info_data.endian == 0)
4415 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4416 byteorder = seginfo->tc_segment_info_data.endian == 1;
4419 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4421 if (target_big_endian != byteorder)
4423 target_big_endian = byteorder;
4424 if (target_big_endian)
4426 ia64_number_to_chars = number_to_chars_bigendian;
4427 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4431 ia64_number_to_chars = number_to_chars_littleendian;
4432 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4439 int dummy ATTRIBUTE_UNUSED;
4446 option = input_line_pointer;
4447 ch = get_symbol_end ();
4448 if (strcmp (option, "lsb") == 0)
4449 md.flags &= ~EF_IA_64_BE;
4450 else if (strcmp (option, "msb") == 0)
4451 md.flags |= EF_IA_64_BE;
4452 else if (strcmp (option, "abi32") == 0)
4453 md.flags &= ~EF_IA_64_ABI64;
4454 else if (strcmp (option, "abi64") == 0)
4455 md.flags |= EF_IA_64_ABI64;
4457 as_bad ("Unknown psr option `%s'", option);
4458 *input_line_pointer = ch;
4461 if (*input_line_pointer != ',')
4464 ++input_line_pointer;
4467 demand_empty_rest_of_line ();
4472 int dummy ATTRIBUTE_UNUSED;
4474 new_logical_line (0, get_absolute_expression ());
4475 demand_empty_rest_of_line ();
4479 parse_section_name ()
4485 if (*input_line_pointer != '"')
4487 as_bad ("Missing section name");
4488 ignore_rest_of_line ();
4491 name = demand_copy_C_string (&len);
4494 ignore_rest_of_line ();
4498 if (*input_line_pointer != ',')
4500 as_bad ("Comma expected after section name");
4501 ignore_rest_of_line ();
4504 ++input_line_pointer; /* skip comma */
4512 char *name = parse_section_name ();
4516 md.keep_pending_output = 1;
4519 obj_elf_previous (0);
4520 md.keep_pending_output = 0;
4523 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4526 stmt_float_cons (kind)
4547 ia64_do_align (alignment);
4555 int saved_auto_align = md.auto_align;
4559 md.auto_align = saved_auto_align;
4563 dot_xfloat_cons (kind)
4566 char *name = parse_section_name ();
4570 md.keep_pending_output = 1;
4572 stmt_float_cons (kind);
4573 obj_elf_previous (0);
4574 md.keep_pending_output = 0;
4578 dot_xstringer (zero)
4581 char *name = parse_section_name ();
4585 md.keep_pending_output = 1;
4588 obj_elf_previous (0);
4589 md.keep_pending_output = 0;
4596 int saved_auto_align = md.auto_align;
4597 char *name = parse_section_name ();
4601 md.keep_pending_output = 1;
4605 md.auto_align = saved_auto_align;
4606 obj_elf_previous (0);
4607 md.keep_pending_output = 0;
4611 dot_xfloat_cons_ua (kind)
4614 int saved_auto_align = md.auto_align;
4615 char *name = parse_section_name ();
4619 md.keep_pending_output = 1;
4622 stmt_float_cons (kind);
4623 md.auto_align = saved_auto_align;
4624 obj_elf_previous (0);
4625 md.keep_pending_output = 0;
4628 /* .reg.val <regname>,value */
4632 int dummy ATTRIBUTE_UNUSED;
4637 if (reg.X_op != O_register)
4639 as_bad (_("Register name expected"));
4640 ignore_rest_of_line ();
4642 else if (*input_line_pointer++ != ',')
4644 as_bad (_("Comma expected"));
4645 ignore_rest_of_line ();
4649 valueT value = get_absolute_expression ();
4650 int regno = reg.X_add_number;
4651 if (regno < REG_GR || regno > REG_GR + 128)
4652 as_warn (_("Register value annotation ignored"));
4655 gr_values[regno - REG_GR].known = 1;
4656 gr_values[regno - REG_GR].value = value;
4657 gr_values[regno - REG_GR].path = md.path;
4660 demand_empty_rest_of_line ();
4665 .serialize.instruction
4668 dot_serialize (type)
4671 insn_group_break (0, 0, 0);
4673 instruction_serialization ();
4675 data_serialization ();
4676 insn_group_break (0, 0, 0);
4677 demand_empty_rest_of_line ();
4680 /* select dv checking mode
4685 A stop is inserted when changing modes
4692 if (md.manual_bundling)
4693 as_warn (_("Directive invalid within a bundle"));
4695 if (type == 'E' || type == 'A')
4696 md.mode_explicitly_set = 0;
4698 md.mode_explicitly_set = 1;
4705 if (md.explicit_mode)
4706 insn_group_break (1, 0, 0);
4707 md.explicit_mode = 0;
4711 if (!md.explicit_mode)
4712 insn_group_break (1, 0, 0);
4713 md.explicit_mode = 1;
4717 if (md.explicit_mode != md.default_explicit_mode)
4718 insn_group_break (1, 0, 0);
4719 md.explicit_mode = md.default_explicit_mode;
4720 md.mode_explicitly_set = 0;
4731 for (regno = 0; regno < 64; regno++)
4733 if (mask & ((valueT) 1 << regno))
4735 fprintf (stderr, "%s p%d", comma, regno);
4742 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4743 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4744 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4745 .pred.safe_across_calls p1 [, p2 [,...]]
4754 int p1 = -1, p2 = -1;
4758 if (*input_line_pointer != '"')
4760 as_bad (_("Missing predicate relation type"));
4761 ignore_rest_of_line ();
4767 char *form = demand_copy_C_string (&len);
4768 if (strcmp (form, "mutex") == 0)
4770 else if (strcmp (form, "clear") == 0)
4772 else if (strcmp (form, "imply") == 0)
4776 as_bad (_("Unrecognized predicate relation type"));
4777 ignore_rest_of_line ();
4781 if (*input_line_pointer == ',')
4782 ++input_line_pointer;
4792 if (TOUPPER (*input_line_pointer) != 'P'
4793 || (regno = atoi (++input_line_pointer)) < 0
4796 as_bad (_("Predicate register expected"));
4797 ignore_rest_of_line ();
4800 while (ISDIGIT (*input_line_pointer))
4801 ++input_line_pointer;
4808 as_warn (_("Duplicate predicate register ignored"));
4811 /* See if it's a range. */
4812 if (*input_line_pointer == '-')
4815 ++input_line_pointer;
4817 if (TOUPPER (*input_line_pointer) != 'P'
4818 || (regno = atoi (++input_line_pointer)) < 0
4821 as_bad (_("Predicate register expected"));
4822 ignore_rest_of_line ();
4825 while (ISDIGIT (*input_line_pointer))
4826 ++input_line_pointer;
4830 as_bad (_("Bad register range"));
4831 ignore_rest_of_line ();
4842 if (*input_line_pointer != ',')
4844 ++input_line_pointer;
4853 clear_qp_mutex (mask);
4854 clear_qp_implies (mask, (valueT) 0);
4857 if (count != 2 || p1 == -1 || p2 == -1)
4858 as_bad (_("Predicate source and target required"));
4859 else if (p1 == 0 || p2 == 0)
4860 as_bad (_("Use of p0 is not valid in this context"));
4862 add_qp_imply (p1, p2);
4867 as_bad (_("At least two PR arguments expected"));
4872 as_bad (_("Use of p0 is not valid in this context"));
4875 add_qp_mutex (mask);
4878 /* note that we don't override any existing relations */
4881 as_bad (_("At least one PR argument expected"));
4886 fprintf (stderr, "Safe across calls: ");
4887 print_prmask (mask);
4888 fprintf (stderr, "\n");
4890 qp_safe_across_calls = mask;
4893 demand_empty_rest_of_line ();
4896 /* .entry label [, label [, ...]]
4897 Hint to DV code that the given labels are to be considered entry points.
4898 Otherwise, only global labels are considered entry points. */
4902 int dummy ATTRIBUTE_UNUSED;
4911 name = input_line_pointer;
4912 c = get_symbol_end ();
4913 symbolP = symbol_find_or_make (name);
4915 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4917 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4920 *input_line_pointer = c;
4922 c = *input_line_pointer;
4925 input_line_pointer++;
4927 if (*input_line_pointer == '\n')
4933 demand_empty_rest_of_line ();
4936 /* .mem.offset offset, base
4937 "base" is used to distinguish between offsets from a different base. */
4940 dot_mem_offset (dummy)
4941 int dummy ATTRIBUTE_UNUSED;
4943 md.mem_offset.hint = 1;
4944 md.mem_offset.offset = get_absolute_expression ();
4945 if (*input_line_pointer != ',')
4947 as_bad (_("Comma expected"));
4948 ignore_rest_of_line ();
4951 ++input_line_pointer;
4952 md.mem_offset.base = get_absolute_expression ();
4953 demand_empty_rest_of_line ();
4956 /* ia64-specific pseudo-ops: */
4957 const pseudo_typeS md_pseudo_table[] =
4959 { "radix", dot_radix, 0 },
4960 { "lcomm", s_lcomm_bytes, 1 },
4961 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4962 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4963 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4964 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4965 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4966 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4967 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4968 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4969 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4970 { "proc", dot_proc, 0 },
4971 { "body", dot_body, 0 },
4972 { "prologue", dot_prologue, 0 },
4973 { "endp", dot_endp, 0 },
4975 { "fframe", dot_fframe, 0 },
4976 { "vframe", dot_vframe, 0 },
4977 { "vframesp", dot_vframesp, 0 },
4978 { "vframepsp", dot_vframepsp, 0 },
4979 { "save", dot_save, 0 },
4980 { "restore", dot_restore, 0 },
4981 { "restorereg", dot_restorereg, 0 },
4982 { "restorereg.p", dot_restorereg_p, 0 },
4983 { "handlerdata", dot_handlerdata, 0 },
4984 { "unwentry", dot_unwentry, 0 },
4985 { "altrp", dot_altrp, 0 },
4986 { "savesp", dot_savemem, 0 },
4987 { "savepsp", dot_savemem, 1 },
4988 { "save.g", dot_saveg, 0 },
4989 { "save.f", dot_savef, 0 },
4990 { "save.b", dot_saveb, 0 },
4991 { "save.gf", dot_savegf, 0 },
4992 { "spill", dot_spill, 0 },
4993 { "spillreg", dot_spillreg, 0 },
4994 { "spillsp", dot_spillmem, 0 },
4995 { "spillpsp", dot_spillmem, 1 },
4996 { "spillreg.p", dot_spillreg_p, 0 },
4997 { "spillsp.p", dot_spillmem_p, 0 },
4998 { "spillpsp.p", dot_spillmem_p, 1 },
4999 { "label_state", dot_label_state, 0 },
5000 { "copy_state", dot_copy_state, 0 },
5001 { "unwabi", dot_unwabi, 0 },
5002 { "personality", dot_personality, 0 },
5004 { "estate", dot_estate, 0 },
5006 { "mii", dot_template, 0x0 },
5007 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5008 { "mlx", dot_template, 0x2 },
5009 { "mmi", dot_template, 0x4 },
5010 { "mfi", dot_template, 0x6 },
5011 { "mmf", dot_template, 0x7 },
5012 { "mib", dot_template, 0x8 },
5013 { "mbb", dot_template, 0x9 },
5014 { "bbb", dot_template, 0xb },
5015 { "mmb", dot_template, 0xc },
5016 { "mfb", dot_template, 0xe },
5018 { "lb", dot_scope, 0 },
5019 { "le", dot_scope, 1 },
5021 { "align", dot_align, 0 },
5022 { "regstk", dot_regstk, 0 },
5023 { "rotr", dot_rot, DYNREG_GR },
5024 { "rotf", dot_rot, DYNREG_FR },
5025 { "rotp", dot_rot, DYNREG_PR },
5026 { "lsb", dot_byteorder, 0 },
5027 { "msb", dot_byteorder, 1 },
5028 { "psr", dot_psr, 0 },
5029 { "alias", dot_alias, 0 },
5030 { "secalias", dot_alias, 1 },
5031 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5033 { "xdata1", dot_xdata, 1 },
5034 { "xdata2", dot_xdata, 2 },
5035 { "xdata4", dot_xdata, 4 },
5036 { "xdata8", dot_xdata, 8 },
5037 { "xreal4", dot_xfloat_cons, 'f' },
5038 { "xreal8", dot_xfloat_cons, 'd' },
5039 { "xreal10", dot_xfloat_cons, 'x' },
5040 { "xreal16", dot_xfloat_cons, 'X' },
5041 { "xstring", dot_xstringer, 0 },
5042 { "xstringz", dot_xstringer, 1 },
5044 /* unaligned versions: */
5045 { "xdata2.ua", dot_xdata_ua, 2 },
5046 { "xdata4.ua", dot_xdata_ua, 4 },
5047 { "xdata8.ua", dot_xdata_ua, 8 },
5048 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5049 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5050 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5051 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5053 /* annotations/DV checking support */
5054 { "entry", dot_entry, 0 },
5055 { "mem.offset", dot_mem_offset, 0 },
5056 { "pred.rel", dot_pred_rel, 0 },
5057 { "pred.rel.clear", dot_pred_rel, 'c' },
5058 { "pred.rel.imply", dot_pred_rel, 'i' },
5059 { "pred.rel.mutex", dot_pred_rel, 'm' },
5060 { "pred.safe_across_calls", dot_pred_rel, 's' },
5061 { "reg.val", dot_reg_val, 0 },
5062 { "serialize.data", dot_serialize, 0 },
5063 { "serialize.instruction", dot_serialize, 1 },
5064 { "auto", dot_dv_mode, 'a' },
5065 { "explicit", dot_dv_mode, 'e' },
5066 { "default", dot_dv_mode, 'd' },
5068 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5069 IA-64 aligns data allocation pseudo-ops by default, so we have to
5070 tell it that these ones are supposed to be unaligned. Long term,
5071 should rewrite so that only IA-64 specific data allocation pseudo-ops
5072 are aligned by default. */
5073 {"2byte", stmt_cons_ua, 2},
5074 {"4byte", stmt_cons_ua, 4},
5075 {"8byte", stmt_cons_ua, 8},
5080 static const struct pseudo_opcode
5083 void (*handler) (int);
5088 /* these are more like pseudo-ops, but don't start with a dot */
5089 { "data1", cons, 1 },
5090 { "data2", cons, 2 },
5091 { "data4", cons, 4 },
5092 { "data8", cons, 8 },
5093 { "data16", cons, 16 },
5094 { "real4", stmt_float_cons, 'f' },
5095 { "real8", stmt_float_cons, 'd' },
5096 { "real10", stmt_float_cons, 'x' },
5097 { "real16", stmt_float_cons, 'X' },
5098 { "string", stringer, 0 },
5099 { "stringz", stringer, 1 },
5101 /* unaligned versions: */
5102 { "data2.ua", stmt_cons_ua, 2 },
5103 { "data4.ua", stmt_cons_ua, 4 },
5104 { "data8.ua", stmt_cons_ua, 8 },
5105 { "data16.ua", stmt_cons_ua, 16 },
5106 { "real4.ua", float_cons, 'f' },
5107 { "real8.ua", float_cons, 'd' },
5108 { "real10.ua", float_cons, 'x' },
5109 { "real16.ua", float_cons, 'X' },
5112 /* Declare a register by creating a symbol for it and entering it in
5113 the symbol table. */
5116 declare_register (name, regnum)
5123 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5125 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5127 as_fatal ("Inserting \"%s\" into register table failed: %s",
5134 declare_register_set (prefix, num_regs, base_regnum)
5142 for (i = 0; i < num_regs; ++i)
5144 sprintf (name, "%s%u", prefix, i);
5145 declare_register (name, base_regnum + i);
5150 operand_width (opnd)
5151 enum ia64_opnd opnd;
5153 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5154 unsigned int bits = 0;
5158 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5159 bits += odesc->field[i].bits;
5164 static enum operand_match_result
5165 operand_match (idesc, index, e)
5166 const struct ia64_opcode *idesc;
5170 enum ia64_opnd opnd = idesc->operands[index];
5171 int bits, relocatable = 0;
5172 struct insn_fix *fix;
5179 case IA64_OPND_AR_CCV:
5180 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5181 return OPERAND_MATCH;
5184 case IA64_OPND_AR_CSD:
5185 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5186 return OPERAND_MATCH;
5189 case IA64_OPND_AR_PFS:
5190 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5191 return OPERAND_MATCH;
5195 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5196 return OPERAND_MATCH;
5200 if (e->X_op == O_register && e->X_add_number == REG_IP)
5201 return OPERAND_MATCH;
5205 if (e->X_op == O_register && e->X_add_number == REG_PR)
5206 return OPERAND_MATCH;
5209 case IA64_OPND_PR_ROT:
5210 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5211 return OPERAND_MATCH;
5215 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5216 return OPERAND_MATCH;
5219 case IA64_OPND_PSR_L:
5220 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5221 return OPERAND_MATCH;
5224 case IA64_OPND_PSR_UM:
5225 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5226 return OPERAND_MATCH;
5230 if (e->X_op == O_constant)
5232 if (e->X_add_number == 1)
5233 return OPERAND_MATCH;
5235 return OPERAND_OUT_OF_RANGE;
5240 if (e->X_op == O_constant)
5242 if (e->X_add_number == 8)
5243 return OPERAND_MATCH;
5245 return OPERAND_OUT_OF_RANGE;
5250 if (e->X_op == O_constant)
5252 if (e->X_add_number == 16)
5253 return OPERAND_MATCH;
5255 return OPERAND_OUT_OF_RANGE;
5259 /* register operands: */
5262 if (e->X_op == O_register && e->X_add_number >= REG_AR
5263 && e->X_add_number < REG_AR + 128)
5264 return OPERAND_MATCH;
5269 if (e->X_op == O_register && e->X_add_number >= REG_BR
5270 && e->X_add_number < REG_BR + 8)
5271 return OPERAND_MATCH;
5275 if (e->X_op == O_register && e->X_add_number >= REG_CR
5276 && e->X_add_number < REG_CR + 128)
5277 return OPERAND_MATCH;
5284 if (e->X_op == O_register && e->X_add_number >= REG_FR
5285 && e->X_add_number < REG_FR + 128)
5286 return OPERAND_MATCH;
5291 if (e->X_op == O_register && e->X_add_number >= REG_P
5292 && e->X_add_number < REG_P + 64)
5293 return OPERAND_MATCH;
5299 if (e->X_op == O_register && e->X_add_number >= REG_GR
5300 && e->X_add_number < REG_GR + 128)
5301 return OPERAND_MATCH;
5304 case IA64_OPND_R3_2:
5305 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5307 if (e->X_add_number < REG_GR + 4)
5308 return OPERAND_MATCH;
5309 else if (e->X_add_number < REG_GR + 128)
5310 return OPERAND_OUT_OF_RANGE;
5314 /* indirect operands: */
5315 case IA64_OPND_CPUID_R3:
5316 case IA64_OPND_DBR_R3:
5317 case IA64_OPND_DTR_R3:
5318 case IA64_OPND_ITR_R3:
5319 case IA64_OPND_IBR_R3:
5320 case IA64_OPND_MSR_R3:
5321 case IA64_OPND_PKR_R3:
5322 case IA64_OPND_PMC_R3:
5323 case IA64_OPND_PMD_R3:
5324 case IA64_OPND_RR_R3:
5325 if (e->X_op == O_index && e->X_op_symbol
5326 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5327 == opnd - IA64_OPND_CPUID_R3))
5328 return OPERAND_MATCH;
5332 if (e->X_op == O_index && !e->X_op_symbol)
5333 return OPERAND_MATCH;
5336 /* immediate operands: */
5337 case IA64_OPND_CNT2a:
5338 case IA64_OPND_LEN4:
5339 case IA64_OPND_LEN6:
5340 bits = operand_width (idesc->operands[index]);
5341 if (e->X_op == O_constant)
5343 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5344 return OPERAND_MATCH;
5346 return OPERAND_OUT_OF_RANGE;
5350 case IA64_OPND_CNT2b:
5351 if (e->X_op == O_constant)
5353 if ((bfd_vma) (e->X_add_number - 1) < 3)
5354 return OPERAND_MATCH;
5356 return OPERAND_OUT_OF_RANGE;
5360 case IA64_OPND_CNT2c:
5361 val = e->X_add_number;
5362 if (e->X_op == O_constant)
5364 if ((val == 0 || val == 7 || val == 15 || val == 16))
5365 return OPERAND_MATCH;
5367 return OPERAND_OUT_OF_RANGE;
5372 /* SOR must be an integer multiple of 8 */
5373 if (e->X_op == O_constant && e->X_add_number & 0x7)
5374 return OPERAND_OUT_OF_RANGE;
5377 if (e->X_op == O_constant)
5379 if ((bfd_vma) e->X_add_number <= 96)
5380 return OPERAND_MATCH;
5382 return OPERAND_OUT_OF_RANGE;
5386 case IA64_OPND_IMMU62:
5387 if (e->X_op == O_constant)
5389 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5390 return OPERAND_MATCH;
5392 return OPERAND_OUT_OF_RANGE;
5396 /* FIXME -- need 62-bit relocation type */
5397 as_bad (_("62-bit relocation not yet implemented"));
5401 case IA64_OPND_IMMU64:
5402 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5403 || e->X_op == O_subtract)
5405 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5406 fix->code = BFD_RELOC_IA64_IMM64;
5407 if (e->X_op != O_subtract)
5409 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5410 if (e->X_op == O_pseudo_fixup)
5414 fix->opnd = idesc->operands[index];
5417 ++CURR_SLOT.num_fixups;
5418 return OPERAND_MATCH;
5420 else if (e->X_op == O_constant)
5421 return OPERAND_MATCH;
5424 case IA64_OPND_CCNT5:
5425 case IA64_OPND_CNT5:
5426 case IA64_OPND_CNT6:
5427 case IA64_OPND_CPOS6a:
5428 case IA64_OPND_CPOS6b:
5429 case IA64_OPND_CPOS6c:
5430 case IA64_OPND_IMMU2:
5431 case IA64_OPND_IMMU7a:
5432 case IA64_OPND_IMMU7b:
5433 case IA64_OPND_IMMU21:
5434 case IA64_OPND_IMMU24:
5435 case IA64_OPND_MBTYPE4:
5436 case IA64_OPND_MHTYPE8:
5437 case IA64_OPND_POS6:
5438 bits = operand_width (idesc->operands[index]);
5439 if (e->X_op == O_constant)
5441 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5442 return OPERAND_MATCH;
5444 return OPERAND_OUT_OF_RANGE;
5448 case IA64_OPND_IMMU9:
5449 bits = operand_width (idesc->operands[index]);
5450 if (e->X_op == O_constant)
5452 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5454 int lobits = e->X_add_number & 0x3;
5455 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5456 e->X_add_number |= (bfd_vma) 0x3;
5457 return OPERAND_MATCH;
5460 return OPERAND_OUT_OF_RANGE;
5464 case IA64_OPND_IMM44:
5465 /* least 16 bits must be zero */
5466 if ((e->X_add_number & 0xffff) != 0)
5467 /* XXX technically, this is wrong: we should not be issuing warning
5468 messages until we're sure this instruction pattern is going to
5470 as_warn (_("lower 16 bits of mask ignored"));
5472 if (e->X_op == O_constant)
5474 if (((e->X_add_number >= 0
5475 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5476 || (e->X_add_number < 0
5477 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5480 if (e->X_add_number >= 0
5481 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5483 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5485 return OPERAND_MATCH;
5488 return OPERAND_OUT_OF_RANGE;
5492 case IA64_OPND_IMM17:
5493 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5494 if (e->X_op == O_constant)
5496 if (((e->X_add_number >= 0
5497 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5498 || (e->X_add_number < 0
5499 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5502 if (e->X_add_number >= 0
5503 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5505 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5507 return OPERAND_MATCH;
5510 return OPERAND_OUT_OF_RANGE;
5514 case IA64_OPND_IMM14:
5515 case IA64_OPND_IMM22:
5517 case IA64_OPND_IMM1:
5518 case IA64_OPND_IMM8:
5519 case IA64_OPND_IMM8U4:
5520 case IA64_OPND_IMM8M1:
5521 case IA64_OPND_IMM8M1U4:
5522 case IA64_OPND_IMM8M1U8:
5523 case IA64_OPND_IMM9a:
5524 case IA64_OPND_IMM9b:
5525 bits = operand_width (idesc->operands[index]);
5526 if (relocatable && (e->X_op == O_symbol
5527 || e->X_op == O_subtract
5528 || e->X_op == O_pseudo_fixup))
5530 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5532 if (idesc->operands[index] == IA64_OPND_IMM14)
5533 fix->code = BFD_RELOC_IA64_IMM14;
5535 fix->code = BFD_RELOC_IA64_IMM22;
5537 if (e->X_op != O_subtract)
5539 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5540 if (e->X_op == O_pseudo_fixup)
5544 fix->opnd = idesc->operands[index];
5547 ++CURR_SLOT.num_fixups;
5548 return OPERAND_MATCH;
5550 else if (e->X_op != O_constant
5551 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5552 return OPERAND_MISMATCH;
5554 if (opnd == IA64_OPND_IMM8M1U4)
5556 /* Zero is not valid for unsigned compares that take an adjusted
5557 constant immediate range. */
5558 if (e->X_add_number == 0)
5559 return OPERAND_OUT_OF_RANGE;
5561 /* Sign-extend 32-bit unsigned numbers, so that the following range
5562 checks will work. */
5563 val = e->X_add_number;
5564 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5565 && ((val & ((bfd_vma) 1 << 31)) != 0))
5566 val = ((val << 32) >> 32);
5568 /* Check for 0x100000000. This is valid because
5569 0x100000000-1 is the same as ((uint32_t) -1). */
5570 if (val == ((bfd_signed_vma) 1 << 32))
5571 return OPERAND_MATCH;
5575 else if (opnd == IA64_OPND_IMM8M1U8)
5577 /* Zero is not valid for unsigned compares that take an adjusted
5578 constant immediate range. */
5579 if (e->X_add_number == 0)
5580 return OPERAND_OUT_OF_RANGE;
5582 /* Check for 0x10000000000000000. */
5583 if (e->X_op == O_big)
5585 if (generic_bignum[0] == 0
5586 && generic_bignum[1] == 0
5587 && generic_bignum[2] == 0
5588 && generic_bignum[3] == 0
5589 && generic_bignum[4] == 1)
5590 return OPERAND_MATCH;
5592 return OPERAND_OUT_OF_RANGE;
5595 val = e->X_add_number - 1;
5597 else if (opnd == IA64_OPND_IMM8M1)
5598 val = e->X_add_number - 1;
5599 else if (opnd == IA64_OPND_IMM8U4)
5601 /* Sign-extend 32-bit unsigned numbers, so that the following range
5602 checks will work. */
5603 val = e->X_add_number;
5604 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5605 && ((val & ((bfd_vma) 1 << 31)) != 0))
5606 val = ((val << 32) >> 32);
5609 val = e->X_add_number;
5611 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5612 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5613 return OPERAND_MATCH;
5615 return OPERAND_OUT_OF_RANGE;
5617 case IA64_OPND_INC3:
5618 /* +/- 1, 4, 8, 16 */
5619 val = e->X_add_number;
5622 if (e->X_op == O_constant)
5624 if ((val == 1 || val == 4 || val == 8 || val == 16))
5625 return OPERAND_MATCH;
5627 return OPERAND_OUT_OF_RANGE;
5631 case IA64_OPND_TGT25:
5632 case IA64_OPND_TGT25b:
5633 case IA64_OPND_TGT25c:
5634 case IA64_OPND_TGT64:
5635 if (e->X_op == O_symbol)
5637 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5638 if (opnd == IA64_OPND_TGT25)
5639 fix->code = BFD_RELOC_IA64_PCREL21F;
5640 else if (opnd == IA64_OPND_TGT25b)
5641 fix->code = BFD_RELOC_IA64_PCREL21M;
5642 else if (opnd == IA64_OPND_TGT25c)
5643 fix->code = BFD_RELOC_IA64_PCREL21B;
5644 else if (opnd == IA64_OPND_TGT64)
5645 fix->code = BFD_RELOC_IA64_PCREL60B;
5649 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5650 fix->opnd = idesc->operands[index];
5653 ++CURR_SLOT.num_fixups;
5654 return OPERAND_MATCH;
5656 case IA64_OPND_TAG13:
5657 case IA64_OPND_TAG13b:
5661 return OPERAND_MATCH;
5664 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5665 /* There are no external relocs for TAG13/TAG13b fields, so we
5666 create a dummy reloc. This will not live past md_apply_fix3. */
5667 fix->code = BFD_RELOC_UNUSED;
5668 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5669 fix->opnd = idesc->operands[index];
5672 ++CURR_SLOT.num_fixups;
5673 return OPERAND_MATCH;
5680 case IA64_OPND_LDXMOV:
5681 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5682 fix->code = BFD_RELOC_IA64_LDXMOV;
5683 fix->opnd = idesc->operands[index];
5686 ++CURR_SLOT.num_fixups;
5687 return OPERAND_MATCH;
5692 return OPERAND_MISMATCH;
5701 memset (e, 0, sizeof (*e));
5704 if (*input_line_pointer != '}')
5706 sep = *input_line_pointer++;
5710 if (!md.manual_bundling)
5711 as_warn ("Found '}' when manual bundling is off");
5713 CURR_SLOT.manual_bundling_off = 1;
5714 md.manual_bundling = 0;
5720 /* Returns the next entry in the opcode table that matches the one in
5721 IDESC, and frees the entry in IDESC. If no matching entry is
5722 found, NULL is returned instead. */
5724 static struct ia64_opcode *
5725 get_next_opcode (struct ia64_opcode *idesc)
5727 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5728 ia64_free_opcode (idesc);
5732 /* Parse the operands for the opcode and find the opcode variant that
5733 matches the specified operands, or NULL if no match is possible. */
5735 static struct ia64_opcode *
5736 parse_operands (idesc)
5737 struct ia64_opcode *idesc;
5739 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5740 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5741 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5742 enum operand_match_result result;
5744 char *first_arg = 0, *end, *saved_input_pointer;
5747 assert (strlen (idesc->name) <= 128);
5749 strcpy (mnemonic, idesc->name);
5750 if (idesc->operands[2] == IA64_OPND_SOF)
5752 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5753 can't parse the first operand until we have parsed the
5754 remaining operands of the "alloc" instruction. */
5756 first_arg = input_line_pointer;
5757 end = strchr (input_line_pointer, '=');
5760 as_bad ("Expected separator `='");
5763 input_line_pointer = end + 1;
5768 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5770 sep = parse_operand (CURR_SLOT.opnd + i);
5771 if (CURR_SLOT.opnd[i].X_op == O_absent)
5776 if (sep != '=' && sep != ',')
5781 if (num_outputs > 0)
5782 as_bad ("Duplicate equal sign (=) in instruction");
5784 num_outputs = i + 1;
5789 as_bad ("Illegal operand separator `%c'", sep);
5793 if (idesc->operands[2] == IA64_OPND_SOF)
5795 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5796 know (strcmp (idesc->name, "alloc") == 0);
5797 if (num_operands == 5 /* first_arg not included in this count! */
5798 && CURR_SLOT.opnd[2].X_op == O_constant
5799 && CURR_SLOT.opnd[3].X_op == O_constant
5800 && CURR_SLOT.opnd[4].X_op == O_constant
5801 && CURR_SLOT.opnd[5].X_op == O_constant)
5803 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5804 CURR_SLOT.opnd[3].X_add_number,
5805 CURR_SLOT.opnd[4].X_add_number,
5806 CURR_SLOT.opnd[5].X_add_number);
5808 /* now we can parse the first arg: */
5809 saved_input_pointer = input_line_pointer;
5810 input_line_pointer = first_arg;
5811 sep = parse_operand (CURR_SLOT.opnd + 0);
5813 --num_outputs; /* force error */
5814 input_line_pointer = saved_input_pointer;
5816 CURR_SLOT.opnd[2].X_add_number = sof;
5817 CURR_SLOT.opnd[3].X_add_number
5818 = sof - CURR_SLOT.opnd[4].X_add_number;
5819 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5823 highest_unmatched_operand = 0;
5824 curr_out_of_range_pos = -1;
5826 expected_operand = idesc->operands[0];
5827 for (; idesc; idesc = get_next_opcode (idesc))
5829 if (num_outputs != idesc->num_outputs)
5830 continue; /* mismatch in # of outputs */
5832 CURR_SLOT.num_fixups = 0;
5834 /* Try to match all operands. If we see an out-of-range operand,
5835 then continue trying to match the rest of the operands, since if
5836 the rest match, then this idesc will give the best error message. */
5838 out_of_range_pos = -1;
5839 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5841 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5842 if (result != OPERAND_MATCH)
5844 if (result != OPERAND_OUT_OF_RANGE)
5846 if (out_of_range_pos < 0)
5847 /* remember position of the first out-of-range operand: */
5848 out_of_range_pos = i;
5852 /* If we did not match all operands, or if at least one operand was
5853 out-of-range, then this idesc does not match. Keep track of which
5854 idesc matched the most operands before failing. If we have two
5855 idescs that failed at the same position, and one had an out-of-range
5856 operand, then prefer the out-of-range operand. Thus if we have
5857 "add r0=0x1000000,r1" we get an error saying the constant is out
5858 of range instead of an error saying that the constant should have been
5861 if (i != num_operands || out_of_range_pos >= 0)
5863 if (i > highest_unmatched_operand
5864 || (i == highest_unmatched_operand
5865 && out_of_range_pos > curr_out_of_range_pos))
5867 highest_unmatched_operand = i;
5868 if (out_of_range_pos >= 0)
5870 expected_operand = idesc->operands[out_of_range_pos];
5871 error_pos = out_of_range_pos;
5875 expected_operand = idesc->operands[i];
5878 curr_out_of_range_pos = out_of_range_pos;
5883 if (num_operands < NELEMS (idesc->operands)
5884 && idesc->operands[num_operands])
5885 continue; /* mismatch in number of arguments */
5891 if (expected_operand)
5892 as_bad ("Operand %u of `%s' should be %s",
5893 error_pos + 1, mnemonic,
5894 elf64_ia64_operands[expected_operand].desc);
5896 as_bad ("Operand mismatch");
5902 /* Keep track of state necessary to determine whether a NOP is necessary
5903 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5904 detect a case where additional NOPs may be necessary. */
5906 errata_nop_necessary_p (slot, insn_unit)
5908 enum ia64_unit insn_unit;
5911 struct group *this_group = md.last_groups + md.group_idx;
5912 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5913 struct ia64_opcode *idesc = slot->idesc;
5915 /* Test whether this could be the first insn in a problematic sequence. */
5916 if (insn_unit == IA64_UNIT_F)
5918 for (i = 0; i < idesc->num_outputs; i++)
5919 if (idesc->operands[i] == IA64_OPND_P1
5920 || idesc->operands[i] == IA64_OPND_P2)
5922 int regno = slot->opnd[i].X_add_number - REG_P;
5923 /* Ignore invalid operands; they generate errors elsewhere. */
5926 this_group->p_reg_set[regno] = 1;
5930 /* Test whether this could be the second insn in a problematic sequence. */
5931 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5932 && prev_group->p_reg_set[slot->qp_regno])
5934 for (i = 0; i < idesc->num_outputs; i++)
5935 if (idesc->operands[i] == IA64_OPND_R1
5936 || idesc->operands[i] == IA64_OPND_R2
5937 || idesc->operands[i] == IA64_OPND_R3)
5939 int regno = slot->opnd[i].X_add_number - REG_GR;
5940 /* Ignore invalid operands; they generate errors elsewhere. */
5943 if (strncmp (idesc->name, "add", 3) != 0
5944 && strncmp (idesc->name, "sub", 3) != 0
5945 && strncmp (idesc->name, "shladd", 6) != 0
5946 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5947 this_group->g_reg_set_conditionally[regno] = 1;
5951 /* Test whether this could be the third insn in a problematic sequence. */
5952 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5954 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5955 idesc->operands[i] == IA64_OPND_R3
5956 /* For mov indirect. */
5957 || idesc->operands[i] == IA64_OPND_RR_R3
5958 || idesc->operands[i] == IA64_OPND_DBR_R3
5959 || idesc->operands[i] == IA64_OPND_IBR_R3
5960 || idesc->operands[i] == IA64_OPND_PKR_R3
5961 || idesc->operands[i] == IA64_OPND_PMC_R3
5962 || idesc->operands[i] == IA64_OPND_PMD_R3
5963 || idesc->operands[i] == IA64_OPND_MSR_R3
5964 || idesc->operands[i] == IA64_OPND_CPUID_R3
5966 || idesc->operands[i] == IA64_OPND_ITR_R3
5967 || idesc->operands[i] == IA64_OPND_DTR_R3
5968 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5969 || idesc->operands[i] == IA64_OPND_MR3)
5971 int regno = slot->opnd[i].X_add_number - REG_GR;
5972 /* Ignore invalid operands; they generate errors elsewhere. */
5975 if (idesc->operands[i] == IA64_OPND_R3)
5977 if (strcmp (idesc->name, "fc") != 0
5978 && strcmp (idesc->name, "tak") != 0
5979 && strcmp (idesc->name, "thash") != 0
5980 && strcmp (idesc->name, "tpa") != 0
5981 && strcmp (idesc->name, "ttag") != 0
5982 && strncmp (idesc->name, "ptr", 3) != 0
5983 && strncmp (idesc->name, "ptc", 3) != 0
5984 && strncmp (idesc->name, "probe", 5) != 0)
5987 if (prev_group->g_reg_set_conditionally[regno])
5995 build_insn (slot, insnp)
5999 const struct ia64_operand *odesc, *o2desc;
6000 struct ia64_opcode *idesc = slot->idesc;
6001 bfd_signed_vma insn, val;
6005 insn = idesc->opcode | slot->qp_regno;
6007 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6009 if (slot->opnd[i].X_op == O_register
6010 || slot->opnd[i].X_op == O_constant
6011 || slot->opnd[i].X_op == O_index)
6012 val = slot->opnd[i].X_add_number;
6013 else if (slot->opnd[i].X_op == O_big)
6015 /* This must be the value 0x10000000000000000. */
6016 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6022 switch (idesc->operands[i])
6024 case IA64_OPND_IMMU64:
6025 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6026 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6027 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6028 | (((val >> 63) & 0x1) << 36));
6031 case IA64_OPND_IMMU62:
6032 val &= 0x3fffffffffffffffULL;
6033 if (val != slot->opnd[i].X_add_number)
6034 as_warn (_("Value truncated to 62 bits"));
6035 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6036 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6039 case IA64_OPND_TGT64:
6041 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6042 insn |= ((((val >> 59) & 0x1) << 36)
6043 | (((val >> 0) & 0xfffff) << 13));
6074 case IA64_OPND_R3_2:
6075 case IA64_OPND_CPUID_R3:
6076 case IA64_OPND_DBR_R3:
6077 case IA64_OPND_DTR_R3:
6078 case IA64_OPND_ITR_R3:
6079 case IA64_OPND_IBR_R3:
6081 case IA64_OPND_MSR_R3:
6082 case IA64_OPND_PKR_R3:
6083 case IA64_OPND_PMC_R3:
6084 case IA64_OPND_PMD_R3:
6085 case IA64_OPND_RR_R3:
6093 odesc = elf64_ia64_operands + idesc->operands[i];
6094 err = (*odesc->insert) (odesc, val, &insn);
6096 as_bad_where (slot->src_file, slot->src_line,
6097 "Bad operand value: %s", err);
6098 if (idesc->flags & IA64_OPCODE_PSEUDO)
6100 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6101 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6103 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6104 (*o2desc->insert) (o2desc, val, &insn);
6106 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6107 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6108 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6110 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6111 (*o2desc->insert) (o2desc, 64 - val, &insn);
6121 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6122 unsigned int manual_bundling = 0;
6123 enum ia64_unit required_unit, insn_unit = 0;
6124 enum ia64_insn_type type[3], insn_type;
6125 unsigned int template, orig_template;
6126 bfd_vma insn[3] = { -1, -1, -1 };
6127 struct ia64_opcode *idesc;
6128 int end_of_insn_group = 0, user_template = -1;
6129 int n, i, j, first, curr;
6130 unw_rec_list *ptr, *last_ptr, *end_ptr;
6131 bfd_vma t0 = 0, t1 = 0;
6132 struct label_fix *lfix;
6133 struct insn_fix *ifix;
6139 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6140 know (first >= 0 & first < NUM_SLOTS);
6141 n = MIN (3, md.num_slots_in_use);
6143 /* Determine template: user user_template if specified, best match
6146 if (md.slot[first].user_template >= 0)
6147 user_template = template = md.slot[first].user_template;
6150 /* Auto select appropriate template. */
6151 memset (type, 0, sizeof (type));
6153 for (i = 0; i < n; ++i)
6155 if (md.slot[curr].label_fixups && i != 0)
6157 type[i] = md.slot[curr].idesc->type;
6158 curr = (curr + 1) % NUM_SLOTS;
6160 template = best_template[type[0]][type[1]][type[2]];
6163 /* initialize instructions with appropriate nops: */
6164 for (i = 0; i < 3; ++i)
6165 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6169 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6170 from the start of the frag. */
6171 addr_mod = frag_now_fix () & 15;
6172 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6173 as_bad (_("instruction address is not a multiple of 16"));
6174 frag_now->insn_addr = addr_mod;
6175 frag_now->has_code = 1;
6177 /* now fill in slots with as many insns as possible: */
6179 idesc = md.slot[curr].idesc;
6180 end_of_insn_group = 0;
6181 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6183 /* If we have unwind records, we may need to update some now. */
6184 ptr = md.slot[curr].unwind_record;
6187 /* Find the last prologue/body record in the list for the current
6188 insn, and set the slot number for all records up to that point.
6189 This needs to be done now, because prologue/body records refer to
6190 the current point, not the point after the instruction has been
6191 issued. This matters because there may have been nops emitted
6192 meanwhile. Any non-prologue non-body record followed by a
6193 prologue/body record must also refer to the current point. */
6195 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6196 for (; ptr != end_ptr; ptr = ptr->next)
6197 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6198 || ptr->r.type == body)
6202 /* Make last_ptr point one after the last prologue/body
6204 last_ptr = last_ptr->next;
6205 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6208 ptr->slot_number = (unsigned long) f + i;
6209 ptr->slot_frag = frag_now;
6211 /* Remove the initialized records, so that we won't accidentally
6212 update them again if we insert a nop and continue. */
6213 md.slot[curr].unwind_record = last_ptr;
6217 if (idesc->flags & IA64_OPCODE_SLOT2)
6219 if (manual_bundling && i != 2)
6220 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6221 "`%s' must be last in bundle", idesc->name);
6225 if (idesc->flags & IA64_OPCODE_LAST)
6228 unsigned int required_template;
6230 /* If we need a stop bit after an M slot, our only choice is
6231 template 5 (M;;MI). If we need a stop bit after a B
6232 slot, our only choice is to place it at the end of the
6233 bundle, because the only available templates are MIB,
6234 MBB, BBB, MMB, and MFB. We don't handle anything other
6235 than M and B slots because these are the only kind of
6236 instructions that can have the IA64_OPCODE_LAST bit set. */
6237 required_template = template;
6238 switch (idesc->type)
6242 required_template = 5;
6250 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6251 "Internal error: don't know how to force %s to end"
6252 "of instruction group", idesc->name);
6256 if (manual_bundling && i != required_slot)
6257 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6258 "`%s' must be last in instruction group",
6260 if (required_slot < i)
6261 /* Can't fit this instruction. */
6265 if (required_template != template)
6267 /* If we switch the template, we need to reset the NOPs
6268 after slot i. The slot-types of the instructions ahead
6269 of i never change, so we don't need to worry about
6270 changing NOPs in front of this slot. */
6271 for (j = i; j < 3; ++j)
6272 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6274 template = required_template;
6276 if (curr != first && md.slot[curr].label_fixups)
6278 if (manual_bundling_on)
6279 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6280 "Label must be first in a bundle");
6281 /* This insn must go into the first slot of a bundle. */
6285 manual_bundling_on = md.slot[curr].manual_bundling_on;
6286 manual_bundling_off = md.slot[curr].manual_bundling_off;
6288 if (manual_bundling_on)
6291 manual_bundling = 1;
6293 break; /* need to start a new bundle */
6296 if (end_of_insn_group && md.num_slots_in_use >= 1)
6298 /* We need an instruction group boundary in the middle of a
6299 bundle. See if we can switch to an other template with
6300 an appropriate boundary. */
6302 orig_template = template;
6303 if (i == 1 && (user_template == 4
6304 || (user_template < 0
6305 && (ia64_templ_desc[template].exec_unit[0]
6309 end_of_insn_group = 0;
6311 else if (i == 2 && (user_template == 0
6312 || (user_template < 0
6313 && (ia64_templ_desc[template].exec_unit[1]
6315 /* This test makes sure we don't switch the template if
6316 the next instruction is one that needs to be first in
6317 an instruction group. Since all those instructions are
6318 in the M group, there is no way such an instruction can
6319 fit in this bundle even if we switch the template. The
6320 reason we have to check for this is that otherwise we
6321 may end up generating "MI;;I M.." which has the deadly
6322 effect that the second M instruction is no longer the
6323 first in the bundle! --davidm 99/12/16 */
6324 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6327 end_of_insn_group = 0;
6329 else if (curr != first)
6330 /* can't fit this insn */
6333 if (template != orig_template)
6334 /* if we switch the template, we need to reset the NOPs
6335 after slot i. The slot-types of the instructions ahead
6336 of i never change, so we don't need to worry about
6337 changing NOPs in front of this slot. */
6338 for (j = i; j < 3; ++j)
6339 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6341 required_unit = ia64_templ_desc[template].exec_unit[i];
6343 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6344 if (idesc->type == IA64_TYPE_DYN)
6346 if ((strcmp (idesc->name, "nop") == 0)
6347 || (strcmp (idesc->name, "hint") == 0)
6348 || (strcmp (idesc->name, "break") == 0))
6349 insn_unit = required_unit;
6350 else if (strcmp (idesc->name, "chk.s") == 0)
6352 insn_unit = IA64_UNIT_M;
6353 if (required_unit == IA64_UNIT_I)
6354 insn_unit = IA64_UNIT_I;
6357 as_fatal ("emit_one_bundle: unexpected dynamic op");
6359 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6360 ia64_free_opcode (idesc);
6361 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6363 know (!idesc->next); /* no resolved dynamic ops have collisions */
6368 insn_type = idesc->type;
6369 insn_unit = IA64_UNIT_NIL;
6373 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6374 insn_unit = required_unit;
6376 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6377 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6378 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6379 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6380 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6385 if (insn_unit != required_unit)
6387 if (required_unit == IA64_UNIT_L
6388 && insn_unit == IA64_UNIT_I
6389 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6391 /* we got ourselves an MLX template but the current
6392 instruction isn't an X-unit, or an I-unit instruction
6393 that can go into the X slot of an MLX template. Duh. */
6394 if (md.num_slots_in_use >= NUM_SLOTS)
6396 as_bad_where (md.slot[curr].src_file,
6397 md.slot[curr].src_line,
6398 "`%s' can't go in X slot of "
6399 "MLX template", idesc->name);
6400 /* drop this insn so we don't livelock: */
6401 --md.num_slots_in_use;
6405 continue; /* try next slot */
6411 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6412 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6415 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6416 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6418 build_insn (md.slot + curr, insn + i);
6420 ptr = md.slot[curr].unwind_record;
6423 /* Set slot numbers for all remaining unwind records belonging to the
6424 current insn. There can not be any prologue/body unwind records
6426 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6427 for (; ptr != end_ptr; ptr = ptr->next)
6429 ptr->slot_number = (unsigned long) f + i;
6430 ptr->slot_frag = frag_now;
6432 md.slot[curr].unwind_record = NULL;
6435 if (required_unit == IA64_UNIT_L)
6438 /* skip one slot for long/X-unit instructions */
6441 --md.num_slots_in_use;
6443 /* now is a good time to fix up the labels for this insn: */
6444 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6446 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6447 symbol_set_frag (lfix->sym, frag_now);
6449 /* and fix up the tags also. */
6450 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6452 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6453 symbol_set_frag (lfix->sym, frag_now);
6456 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6458 ifix = md.slot[curr].fixup + j;
6459 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6460 &ifix->expr, ifix->is_pcrel, ifix->code);
6461 fix->tc_fix_data.opnd = ifix->opnd;
6462 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6463 fix->fx_file = md.slot[curr].src_file;
6464 fix->fx_line = md.slot[curr].src_line;
6467 end_of_insn_group = md.slot[curr].end_of_insn_group;
6469 if (end_of_insn_group)
6471 md.group_idx = (md.group_idx + 1) % 3;
6472 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6476 ia64_free_opcode (md.slot[curr].idesc);
6477 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6478 md.slot[curr].user_template = -1;
6480 if (manual_bundling_off)
6482 manual_bundling = 0;
6485 curr = (curr + 1) % NUM_SLOTS;
6486 idesc = md.slot[curr].idesc;
6488 if (manual_bundling)
6490 if (md.num_slots_in_use > 0)
6491 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6492 "`%s' does not fit into %s template",
6493 idesc->name, ia64_templ_desc[template].name);
6495 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6496 "Missing '}' at end of file");
6498 know (md.num_slots_in_use < NUM_SLOTS);
6500 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6501 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6503 number_to_chars_littleendian (f + 0, t0, 8);
6504 number_to_chars_littleendian (f + 8, t1, 8);
6508 unwind.list->next_slot_number = (unsigned long) f + 16;
6509 unwind.list->next_slot_frag = frag_now;
6514 md_parse_option (c, arg)
6521 /* Switches from the Intel assembler. */
6523 if (strcmp (arg, "ilp64") == 0
6524 || strcmp (arg, "lp64") == 0
6525 || strcmp (arg, "p64") == 0)
6527 md.flags |= EF_IA_64_ABI64;
6529 else if (strcmp (arg, "ilp32") == 0)
6531 md.flags &= ~EF_IA_64_ABI64;
6533 else if (strcmp (arg, "le") == 0)
6535 md.flags &= ~EF_IA_64_BE;
6536 default_big_endian = 0;
6538 else if (strcmp (arg, "be") == 0)
6540 md.flags |= EF_IA_64_BE;
6541 default_big_endian = 1;
6548 if (strcmp (arg, "so") == 0)
6550 /* Suppress signon message. */
6552 else if (strcmp (arg, "pi") == 0)
6554 /* Reject privileged instructions. FIXME */
6556 else if (strcmp (arg, "us") == 0)
6558 /* Allow union of signed and unsigned range. FIXME */
6560 else if (strcmp (arg, "close_fcalls") == 0)
6562 /* Do not resolve global function calls. */
6569 /* temp[="prefix"] Insert temporary labels into the object file
6570 symbol table prefixed by "prefix".
6571 Default prefix is ":temp:".
6576 /* indirect=<tgt> Assume unannotated indirect branches behavior
6577 according to <tgt> --
6578 exit: branch out from the current context (default)
6579 labels: all labels in context may be branch targets
6581 if (strncmp (arg, "indirect=", 9) != 0)
6586 /* -X conflicts with an ignored option, use -x instead */
6588 if (!arg || strcmp (arg, "explicit") == 0)
6590 /* set default mode to explicit */
6591 md.default_explicit_mode = 1;
6594 else if (strcmp (arg, "auto") == 0)
6596 md.default_explicit_mode = 0;
6598 else if (strcmp (arg, "debug") == 0)
6602 else if (strcmp (arg, "debugx") == 0)
6604 md.default_explicit_mode = 1;
6609 as_bad (_("Unrecognized option '-x%s'"), arg);
6614 /* nops Print nops statistics. */
6617 /* GNU specific switches for gcc. */
6618 case OPTION_MCONSTANT_GP:
6619 md.flags |= EF_IA_64_CONS_GP;
6622 case OPTION_MAUTO_PIC:
6623 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6634 md_show_usage (stream)
6639 --mconstant-gp mark output file as using the constant-GP model\n\
6640 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6641 --mauto-pic mark output file as using the constant-GP model\n\
6642 without function descriptors (sets ELF header flag\n\
6643 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6644 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6645 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6646 -x | -xexplicit turn on dependency violation checking (default)\n\
6647 -xauto automagically remove dependency violations\n\
6648 -xdebug debug dependency violation checker\n"),
6653 ia64_after_parse_args ()
6655 if (debug_type == DEBUG_STABS)
6656 as_fatal (_("--gstabs is not supported for ia64"));
6659 /* Return true if TYPE fits in TEMPL at SLOT. */
6662 match (int templ, int type, int slot)
6664 enum ia64_unit unit;
6667 unit = ia64_templ_desc[templ].exec_unit[slot];
6670 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6672 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6674 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6675 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6676 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6677 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6678 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6679 default: result = 0; break;
6684 /* Add a bit of extra goodness if a nop of type F or B would fit
6685 in TEMPL at SLOT. */
6688 extra_goodness (int templ, int slot)
6690 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6692 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6697 /* This function is called once, at assembler startup time. It sets
6698 up all the tables, etc. that the MD part of the assembler will need
6699 that can be determined before arguments are parsed. */
6703 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6708 md.explicit_mode = md.default_explicit_mode;
6710 bfd_set_section_alignment (stdoutput, text_section, 4);
6712 /* Make sure function pointers get initialized. */
6713 target_big_endian = -1;
6714 dot_byteorder (default_big_endian);
6716 alias_hash = hash_new ();
6717 alias_name_hash = hash_new ();
6718 secalias_hash = hash_new ();
6719 secalias_name_hash = hash_new ();
6721 pseudo_func[FUNC_DTP_MODULE].u.sym =
6722 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6723 &zero_address_frag);
6725 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6726 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6727 &zero_address_frag);
6729 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6730 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6731 &zero_address_frag);
6733 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6734 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6735 &zero_address_frag);
6737 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6738 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6739 &zero_address_frag);
6741 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6742 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6743 &zero_address_frag);
6745 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6746 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6747 &zero_address_frag);
6749 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6750 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6751 &zero_address_frag);
6753 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6754 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6755 &zero_address_frag);
6757 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6758 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6759 &zero_address_frag);
6761 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6762 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6763 &zero_address_frag);
6765 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6766 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6767 &zero_address_frag);
6769 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6770 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6771 &zero_address_frag);
6773 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6774 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6775 &zero_address_frag);
6777 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6778 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6779 &zero_address_frag);
6781 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6782 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6783 &zero_address_frag);
6785 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6786 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6787 &zero_address_frag);
6789 /* Compute the table of best templates. We compute goodness as a
6790 base 4 value, in which each match counts for 3, each F counts
6791 for 2, each B counts for 1. This should maximize the number of
6792 F and B nops in the chosen bundles, which is good because these
6793 pipelines are least likely to be overcommitted. */
6794 for (i = 0; i < IA64_NUM_TYPES; ++i)
6795 for (j = 0; j < IA64_NUM_TYPES; ++j)
6796 for (k = 0; k < IA64_NUM_TYPES; ++k)
6799 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6802 if (match (t, i, 0))
6804 if (match (t, j, 1))
6806 if (match (t, k, 2))
6807 goodness = 3 + 3 + 3;
6809 goodness = 3 + 3 + extra_goodness (t, 2);
6811 else if (match (t, j, 2))
6812 goodness = 3 + 3 + extra_goodness (t, 1);
6816 goodness += extra_goodness (t, 1);
6817 goodness += extra_goodness (t, 2);
6820 else if (match (t, i, 1))
6822 if (match (t, j, 2))
6825 goodness = 3 + extra_goodness (t, 2);
6827 else if (match (t, i, 2))
6828 goodness = 3 + extra_goodness (t, 1);
6830 if (goodness > best)
6833 best_template[i][j][k] = t;
6838 for (i = 0; i < NUM_SLOTS; ++i)
6839 md.slot[i].user_template = -1;
6841 md.pseudo_hash = hash_new ();
6842 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6844 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6845 (void *) (pseudo_opcode + i));
6847 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6848 pseudo_opcode[i].name, err);
6851 md.reg_hash = hash_new ();
6852 md.dynreg_hash = hash_new ();
6853 md.const_hash = hash_new ();
6854 md.entry_hash = hash_new ();
6856 /* general registers: */
6859 for (i = 0; i < total; ++i)
6861 sprintf (name, "r%d", i - REG_GR);
6862 md.regsym[i] = declare_register (name, i);
6865 /* floating point registers: */
6867 for (; i < total; ++i)
6869 sprintf (name, "f%d", i - REG_FR);
6870 md.regsym[i] = declare_register (name, i);
6873 /* application registers: */
6876 for (; i < total; ++i)
6878 sprintf (name, "ar%d", i - REG_AR);
6879 md.regsym[i] = declare_register (name, i);
6882 /* control registers: */
6885 for (; i < total; ++i)
6887 sprintf (name, "cr%d", i - REG_CR);
6888 md.regsym[i] = declare_register (name, i);
6891 /* predicate registers: */
6893 for (; i < total; ++i)
6895 sprintf (name, "p%d", i - REG_P);
6896 md.regsym[i] = declare_register (name, i);
6899 /* branch registers: */
6901 for (; i < total; ++i)
6903 sprintf (name, "b%d", i - REG_BR);
6904 md.regsym[i] = declare_register (name, i);
6907 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6908 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6909 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6910 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6911 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6912 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6913 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6915 for (i = 0; i < NELEMS (indirect_reg); ++i)
6917 regnum = indirect_reg[i].regnum;
6918 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6921 /* define synonyms for application registers: */
6922 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6923 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6924 REG_AR + ar[i - REG_AR].regnum);
6926 /* define synonyms for control registers: */
6927 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6928 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6929 REG_CR + cr[i - REG_CR].regnum);
6931 declare_register ("gp", REG_GR + 1);
6932 declare_register ("sp", REG_GR + 12);
6933 declare_register ("rp", REG_BR + 0);
6935 /* pseudo-registers used to specify unwind info: */
6936 declare_register ("psp", REG_PSP);
6938 declare_register_set ("ret", 4, REG_GR + 8);
6939 declare_register_set ("farg", 8, REG_FR + 8);
6940 declare_register_set ("fret", 8, REG_FR + 8);
6942 for (i = 0; i < NELEMS (const_bits); ++i)
6944 err = hash_insert (md.const_hash, const_bits[i].name,
6945 (PTR) (const_bits + i));
6947 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6951 /* Set the architecture and machine depending on defaults and command line
6953 if (md.flags & EF_IA_64_ABI64)
6954 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6956 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6959 as_warn (_("Could not set architecture and machine"));
6961 /* Set the pointer size and pointer shift size depending on md.flags */
6963 if (md.flags & EF_IA_64_ABI64)
6965 md.pointer_size = 8; /* pointers are 8 bytes */
6966 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6970 md.pointer_size = 4; /* pointers are 4 bytes */
6971 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6974 md.mem_offset.hint = 0;
6977 md.entry_labels = NULL;
6980 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6981 because that is called after md_parse_option which is where we do the
6982 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6983 default endianness. */
6986 ia64_init (argc, argv)
6987 int argc ATTRIBUTE_UNUSED;
6988 char **argv ATTRIBUTE_UNUSED;
6990 md.flags = MD_FLAGS_DEFAULT;
6993 /* Return a string for the target object file format. */
6996 ia64_target_format ()
6998 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7000 if (md.flags & EF_IA_64_BE)
7002 if (md.flags & EF_IA_64_ABI64)
7003 #if defined(TE_AIX50)
7004 return "elf64-ia64-aix-big";
7005 #elif defined(TE_HPUX)
7006 return "elf64-ia64-hpux-big";
7008 return "elf64-ia64-big";
7011 #if defined(TE_AIX50)
7012 return "elf32-ia64-aix-big";
7013 #elif defined(TE_HPUX)
7014 return "elf32-ia64-hpux-big";
7016 return "elf32-ia64-big";
7021 if (md.flags & EF_IA_64_ABI64)
7023 return "elf64-ia64-aix-little";
7025 return "elf64-ia64-little";
7029 return "elf32-ia64-aix-little";
7031 return "elf32-ia64-little";
7036 return "unknown-format";
7040 ia64_end_of_source ()
7042 /* terminate insn group upon reaching end of file: */
7043 insn_group_break (1, 0, 0);
7045 /* emits slots we haven't written yet: */
7046 ia64_flush_insns ();
7048 bfd_set_private_flags (stdoutput, md.flags);
7050 md.mem_offset.hint = 0;
7056 if (md.qp.X_op == O_register)
7057 as_bad ("qualifying predicate not followed by instruction");
7058 md.qp.X_op = O_absent;
7060 if (ignore_input ())
7063 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7065 if (md.detect_dv && !md.explicit_mode)
7066 as_warn (_("Explicit stops are ignored in auto mode"));
7068 insn_group_break (1, 0, 0);
7072 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7074 static int defining_tag = 0;
7077 ia64_unrecognized_line (ch)
7083 expression (&md.qp);
7084 if (*input_line_pointer++ != ')')
7086 as_bad ("Expected ')'");
7089 if (md.qp.X_op != O_register)
7091 as_bad ("Qualifying predicate expected");
7094 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7096 as_bad ("Predicate register expected");
7102 if (md.manual_bundling)
7103 as_warn ("Found '{' when manual bundling is already turned on");
7105 CURR_SLOT.manual_bundling_on = 1;
7106 md.manual_bundling = 1;
7108 /* Bundling is only acceptable in explicit mode
7109 or when in default automatic mode. */
7110 if (md.detect_dv && !md.explicit_mode)
7112 if (!md.mode_explicitly_set
7113 && !md.default_explicit_mode)
7116 as_warn (_("Found '{' after explicit switch to automatic mode"));
7121 if (!md.manual_bundling)
7122 as_warn ("Found '}' when manual bundling is off");
7124 PREV_SLOT.manual_bundling_off = 1;
7125 md.manual_bundling = 0;
7127 /* switch back to automatic mode, if applicable */
7130 && !md.mode_explicitly_set
7131 && !md.default_explicit_mode)
7134 /* Allow '{' to follow on the same line. We also allow ";;", but that
7135 happens automatically because ';' is an end of line marker. */
7137 if (input_line_pointer[0] == '{')
7139 input_line_pointer++;
7140 return ia64_unrecognized_line ('{');
7143 demand_empty_rest_of_line ();
7153 if (md.qp.X_op == O_register)
7155 as_bad ("Tag must come before qualifying predicate.");
7159 /* This implements just enough of read_a_source_file in read.c to
7160 recognize labels. */
7161 if (is_name_beginner (*input_line_pointer))
7163 s = input_line_pointer;
7164 c = get_symbol_end ();
7166 else if (LOCAL_LABELS_FB
7167 && ISDIGIT (*input_line_pointer))
7170 while (ISDIGIT (*input_line_pointer))
7171 temp = (temp * 10) + *input_line_pointer++ - '0';
7172 fb_label_instance_inc (temp);
7173 s = fb_label_name (temp, 0);
7174 c = *input_line_pointer;
7183 /* Put ':' back for error messages' sake. */
7184 *input_line_pointer++ = ':';
7185 as_bad ("Expected ':'");
7192 /* Put ':' back for error messages' sake. */
7193 *input_line_pointer++ = ':';
7194 if (*input_line_pointer++ != ']')
7196 as_bad ("Expected ']'");
7201 as_bad ("Tag name expected");
7211 /* Not a valid line. */
7216 ia64_frob_label (sym)
7219 struct label_fix *fix;
7221 /* Tags need special handling since they are not bundle breaks like
7225 fix = obstack_alloc (¬es, sizeof (*fix));
7227 fix->next = CURR_SLOT.tag_fixups;
7228 CURR_SLOT.tag_fixups = fix;
7233 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7235 md.last_text_seg = now_seg;
7236 fix = obstack_alloc (¬es, sizeof (*fix));
7238 fix->next = CURR_SLOT.label_fixups;
7239 CURR_SLOT.label_fixups = fix;
7241 /* Keep track of how many code entry points we've seen. */
7242 if (md.path == md.maxpaths)
7245 md.entry_labels = (const char **)
7246 xrealloc ((void *) md.entry_labels,
7247 md.maxpaths * sizeof (char *));
7249 md.entry_labels[md.path++] = S_GET_NAME (sym);
7254 /* The HP-UX linker will give unresolved symbol errors for symbols
7255 that are declared but unused. This routine removes declared,
7256 unused symbols from an object. */
7258 ia64_frob_symbol (sym)
7261 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7262 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7263 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7264 && ! S_IS_EXTERNAL (sym)))
7271 ia64_flush_pending_output ()
7273 if (!md.keep_pending_output
7274 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7276 /* ??? This causes many unnecessary stop bits to be emitted.
7277 Unfortunately, it isn't clear if it is safe to remove this. */
7278 insn_group_break (1, 0, 0);
7279 ia64_flush_insns ();
7283 /* Do ia64-specific expression optimization. All that's done here is
7284 to transform index expressions that are either due to the indexing
7285 of rotating registers or due to the indexing of indirect register
7288 ia64_optimize_expr (l, op, r)
7297 if (l->X_op == O_register && r->X_op == O_constant)
7299 num_regs = (l->X_add_number >> 16);
7300 if ((unsigned) r->X_add_number >= num_regs)
7303 as_bad ("No current frame");
7305 as_bad ("Index out of range 0..%u", num_regs - 1);
7306 r->X_add_number = 0;
7308 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7311 else if (l->X_op == O_register && r->X_op == O_register)
7313 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7314 || l->X_add_number == IND_MEM)
7316 as_bad ("Indirect register set name expected");
7317 l->X_add_number = IND_CPUID;
7320 l->X_op_symbol = md.regsym[l->X_add_number];
7321 l->X_add_number = r->X_add_number;
7329 ia64_parse_name (name, e)
7333 struct const_desc *cdesc;
7334 struct dynreg *dr = 0;
7335 unsigned int regnum;
7339 /* first see if NAME is a known register name: */
7340 sym = hash_find (md.reg_hash, name);
7343 e->X_op = O_register;
7344 e->X_add_number = S_GET_VALUE (sym);
7348 cdesc = hash_find (md.const_hash, name);
7351 e->X_op = O_constant;
7352 e->X_add_number = cdesc->value;
7356 /* check for inN, locN, or outN: */
7360 if (name[1] == 'n' && ISDIGIT (name[2]))
7368 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7376 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7389 /* The name is inN, locN, or outN; parse the register number. */
7390 regnum = strtoul (name, &end, 10);
7391 if (end > name && *end == '\0')
7393 if ((unsigned) regnum >= dr->num_regs)
7396 as_bad ("No current frame");
7398 as_bad ("Register number out of range 0..%u",
7402 e->X_op = O_register;
7403 e->X_add_number = dr->base + regnum;
7408 if ((dr = hash_find (md.dynreg_hash, name)))
7410 /* We've got ourselves the name of a rotating register set.
7411 Store the base register number in the low 16 bits of
7412 X_add_number and the size of the register set in the top 16
7414 e->X_op = O_register;
7415 e->X_add_number = dr->base | (dr->num_regs << 16);
7421 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7424 ia64_canonicalize_symbol_name (name)
7427 size_t len = strlen (name);
7428 if (len > 1 && name[len - 1] == '#')
7429 name[len - 1] = '\0';
7433 /* Return true if idesc is a conditional branch instruction. This excludes
7434 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7435 because they always read/write resources regardless of the value of the
7436 qualifying predicate. br.ia must always use p0, and hence is always
7437 taken. Thus this function returns true for branches which can fall
7438 through, and which use no resources if they do fall through. */
7441 is_conditional_branch (idesc)
7442 struct ia64_opcode *idesc;
7444 /* br is a conditional branch. Everything that starts with br. except
7445 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7446 Everything that starts with brl is a conditional branch. */
7447 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7448 && (idesc->name[2] == '\0'
7449 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7450 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7451 || idesc->name[2] == 'l'
7452 /* br.cond, br.call, br.clr */
7453 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7454 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7455 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7458 /* Return whether the given opcode is a taken branch. If there's any doubt,
7462 is_taken_branch (idesc)
7463 struct ia64_opcode *idesc;
7465 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7466 || strncmp (idesc->name, "br.ia", 5) == 0);
7469 /* Return whether the given opcode is an interruption or rfi. If there's any
7470 doubt, returns zero. */
7473 is_interruption_or_rfi (idesc)
7474 struct ia64_opcode *idesc;
7476 if (strcmp (idesc->name, "rfi") == 0)
7481 /* Returns the index of the given dependency in the opcode's list of chks, or
7482 -1 if there is no dependency. */
7485 depends_on (depind, idesc)
7487 struct ia64_opcode *idesc;
7490 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7491 for (i = 0; i < dep->nchks; i++)
7493 if (depind == DEP (dep->chks[i]))
7499 /* Determine a set of specific resources used for a particular resource
7500 class. Returns the number of specific resources identified For those
7501 cases which are not determinable statically, the resource returned is
7504 Meanings of value in 'NOTE':
7505 1) only read/write when the register number is explicitly encoded in the
7507 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7508 accesses CFM when qualifying predicate is in the rotating region.
7509 3) general register value is used to specify an indirect register; not
7510 determinable statically.
7511 4) only read the given resource when bits 7:0 of the indirect index
7512 register value does not match the register number of the resource; not
7513 determinable statically.
7514 5) all rules are implementation specific.
7515 6) only when both the index specified by the reader and the index specified
7516 by the writer have the same value in bits 63:61; not determinable
7518 7) only access the specified resource when the corresponding mask bit is
7520 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7521 only read when these insns reference FR2-31
7522 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7523 written when these insns write FR32-127
7524 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7526 11) The target predicates are written independently of PR[qp], but source
7527 registers are only read if PR[qp] is true. Since the state of PR[qp]
7528 cannot statically be determined, all source registers are marked used.
7529 12) This insn only reads the specified predicate register when that
7530 register is the PR[qp].
7531 13) This reference to ld-c only applies to teh GR whose value is loaded
7532 with data returned from memory, not the post-incremented address register.
7533 14) The RSE resource includes the implementation-specific RSE internal
7534 state resources. At least one (and possibly more) of these resources are
7535 read by each instruction listed in IC:rse-readers. At least one (and
7536 possibly more) of these resources are written by each insn listed in
7538 15+16) Represents reserved instructions, which the assembler does not
7541 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7542 this code; there are no dependency violations based on memory access.
7545 #define MAX_SPECS 256
7550 specify_resource (dep, idesc, type, specs, note, path)
7551 const struct ia64_dependency *dep;
7552 struct ia64_opcode *idesc;
7553 int type; /* is this a DV chk or a DV reg? */
7554 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7555 int note; /* resource note for this insn's usage */
7556 int path; /* which execution path to examine */
7563 if (dep->mode == IA64_DV_WAW
7564 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7565 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7568 /* template for any resources we identify */
7569 tmpl.dependency = dep;
7571 tmpl.insn_srlz = tmpl.data_srlz = 0;
7572 tmpl.qp_regno = CURR_SLOT.qp_regno;
7573 tmpl.link_to_qp_branch = 1;
7574 tmpl.mem_offset.hint = 0;
7577 tmpl.cmp_type = CMP_NONE;
7580 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7581 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7582 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7584 /* we don't need to track these */
7585 if (dep->semantics == IA64_DVS_NONE)
7588 switch (dep->specifier)
7593 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7595 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7596 if (regno >= 0 && regno <= 7)
7598 specs[count] = tmpl;
7599 specs[count++].index = regno;
7605 for (i = 0; i < 8; i++)
7607 specs[count] = tmpl;
7608 specs[count++].index = i;
7617 case IA64_RS_AR_UNAT:
7618 /* This is a mov =AR or mov AR= instruction. */
7619 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7621 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7622 if (regno == AR_UNAT)
7624 specs[count++] = tmpl;
7629 /* This is a spill/fill, or other instruction that modifies the
7632 /* Unless we can determine the specific bits used, mark the whole
7633 thing; bits 8:3 of the memory address indicate the bit used in
7634 UNAT. The .mem.offset hint may be used to eliminate a small
7635 subset of conflicts. */
7636 specs[count] = tmpl;
7637 if (md.mem_offset.hint)
7640 fprintf (stderr, " Using hint for spill/fill\n");
7641 /* The index isn't actually used, just set it to something
7642 approximating the bit index. */
7643 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7644 specs[count].mem_offset.hint = 1;
7645 specs[count].mem_offset.offset = md.mem_offset.offset;
7646 specs[count++].mem_offset.base = md.mem_offset.base;
7650 specs[count++].specific = 0;
7658 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7660 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7661 if ((regno >= 8 && regno <= 15)
7662 || (regno >= 20 && regno <= 23)
7663 || (regno >= 31 && regno <= 39)
7664 || (regno >= 41 && regno <= 47)
7665 || (regno >= 67 && regno <= 111))
7667 specs[count] = tmpl;
7668 specs[count++].index = regno;
7681 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7683 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7684 if ((regno >= 48 && regno <= 63)
7685 || (regno >= 112 && regno <= 127))
7687 specs[count] = tmpl;
7688 specs[count++].index = regno;
7694 for (i = 48; i < 64; i++)
7696 specs[count] = tmpl;
7697 specs[count++].index = i;
7699 for (i = 112; i < 128; i++)
7701 specs[count] = tmpl;
7702 specs[count++].index = i;
7720 for (i = 0; i < idesc->num_outputs; i++)
7721 if (idesc->operands[i] == IA64_OPND_B1
7722 || idesc->operands[i] == IA64_OPND_B2)
7724 specs[count] = tmpl;
7725 specs[count++].index =
7726 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7731 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7732 if (idesc->operands[i] == IA64_OPND_B1
7733 || idesc->operands[i] == IA64_OPND_B2)
7735 specs[count] = tmpl;
7736 specs[count++].index =
7737 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7743 case IA64_RS_CPUID: /* four or more registers */
7746 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7748 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7749 if (regno >= 0 && regno < NELEMS (gr_values)
7752 specs[count] = tmpl;
7753 specs[count++].index = gr_values[regno].value & 0xFF;
7757 specs[count] = tmpl;
7758 specs[count++].specific = 0;
7768 case IA64_RS_DBR: /* four or more registers */
7771 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7773 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7774 if (regno >= 0 && regno < NELEMS (gr_values)
7777 specs[count] = tmpl;
7778 specs[count++].index = gr_values[regno].value & 0xFF;
7782 specs[count] = tmpl;
7783 specs[count++].specific = 0;
7787 else if (note == 0 && !rsrc_write)
7789 specs[count] = tmpl;
7790 specs[count++].specific = 0;
7798 case IA64_RS_IBR: /* four or more registers */
7801 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7803 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7804 if (regno >= 0 && regno < NELEMS (gr_values)
7807 specs[count] = tmpl;
7808 specs[count++].index = gr_values[regno].value & 0xFF;
7812 specs[count] = tmpl;
7813 specs[count++].specific = 0;
7826 /* These are implementation specific. Force all references to
7827 conflict with all other references. */
7828 specs[count] = tmpl;
7829 specs[count++].specific = 0;
7837 case IA64_RS_PKR: /* 16 or more registers */
7838 if (note == 3 || note == 4)
7840 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7842 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7843 if (regno >= 0 && regno < NELEMS (gr_values)
7848 specs[count] = tmpl;
7849 specs[count++].index = gr_values[regno].value & 0xFF;
7852 for (i = 0; i < NELEMS (gr_values); i++)
7854 /* Uses all registers *except* the one in R3. */
7855 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7857 specs[count] = tmpl;
7858 specs[count++].index = i;
7864 specs[count] = tmpl;
7865 specs[count++].specific = 0;
7872 specs[count] = tmpl;
7873 specs[count++].specific = 0;
7877 case IA64_RS_PMC: /* four or more registers */
7880 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7881 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7884 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7886 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7887 if (regno >= 0 && regno < NELEMS (gr_values)
7890 specs[count] = tmpl;
7891 specs[count++].index = gr_values[regno].value & 0xFF;
7895 specs[count] = tmpl;
7896 specs[count++].specific = 0;
7906 case IA64_RS_PMD: /* four or more registers */
7909 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7911 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7912 if (regno >= 0 && regno < NELEMS (gr_values)
7915 specs[count] = tmpl;
7916 specs[count++].index = gr_values[regno].value & 0xFF;
7920 specs[count] = tmpl;
7921 specs[count++].specific = 0;
7931 case IA64_RS_RR: /* eight registers */
7934 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7936 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7937 if (regno >= 0 && regno < NELEMS (gr_values)
7940 specs[count] = tmpl;
7941 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7945 specs[count] = tmpl;
7946 specs[count++].specific = 0;
7950 else if (note == 0 && !rsrc_write)
7952 specs[count] = tmpl;
7953 specs[count++].specific = 0;
7961 case IA64_RS_CR_IRR:
7964 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7965 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7967 && idesc->operands[1] == IA64_OPND_CR3
7970 for (i = 0; i < 4; i++)
7972 specs[count] = tmpl;
7973 specs[count++].index = CR_IRR0 + i;
7979 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7980 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7982 && regno <= CR_IRR3)
7984 specs[count] = tmpl;
7985 specs[count++].index = regno;
7994 case IA64_RS_CR_LRR:
8001 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8002 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8003 && (regno == CR_LRR0 || regno == CR_LRR1))
8005 specs[count] = tmpl;
8006 specs[count++].index = regno;
8014 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8016 specs[count] = tmpl;
8017 specs[count++].index =
8018 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8033 else if (rsrc_write)
8035 if (dep->specifier == IA64_RS_FRb
8036 && idesc->operands[0] == IA64_OPND_F1)
8038 specs[count] = tmpl;
8039 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8044 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8046 if (idesc->operands[i] == IA64_OPND_F2
8047 || idesc->operands[i] == IA64_OPND_F3
8048 || idesc->operands[i] == IA64_OPND_F4)
8050 specs[count] = tmpl;
8051 specs[count++].index =
8052 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8061 /* This reference applies only to the GR whose value is loaded with
8062 data returned from memory. */
8063 specs[count] = tmpl;
8064 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8070 for (i = 0; i < idesc->num_outputs; i++)
8071 if (idesc->operands[i] == IA64_OPND_R1
8072 || idesc->operands[i] == IA64_OPND_R2
8073 || idesc->operands[i] == IA64_OPND_R3)
8075 specs[count] = tmpl;
8076 specs[count++].index =
8077 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8079 if (idesc->flags & IA64_OPCODE_POSTINC)
8080 for (i = 0; i < NELEMS (idesc->operands); i++)
8081 if (idesc->operands[i] == IA64_OPND_MR3)
8083 specs[count] = tmpl;
8084 specs[count++].index =
8085 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8090 /* Look for anything that reads a GR. */
8091 for (i = 0; i < NELEMS (idesc->operands); i++)
8093 if (idesc->operands[i] == IA64_OPND_MR3
8094 || idesc->operands[i] == IA64_OPND_CPUID_R3
8095 || idesc->operands[i] == IA64_OPND_DBR_R3
8096 || idesc->operands[i] == IA64_OPND_IBR_R3
8097 || idesc->operands[i] == IA64_OPND_MSR_R3
8098 || idesc->operands[i] == IA64_OPND_PKR_R3
8099 || idesc->operands[i] == IA64_OPND_PMC_R3
8100 || idesc->operands[i] == IA64_OPND_PMD_R3
8101 || idesc->operands[i] == IA64_OPND_RR_R3
8102 || ((i >= idesc->num_outputs)
8103 && (idesc->operands[i] == IA64_OPND_R1
8104 || idesc->operands[i] == IA64_OPND_R2
8105 || idesc->operands[i] == IA64_OPND_R3
8106 /* addl source register. */
8107 || idesc->operands[i] == IA64_OPND_R3_2)))
8109 specs[count] = tmpl;
8110 specs[count++].index =
8111 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8122 /* This is the same as IA64_RS_PRr, except that the register range is
8123 from 1 - 15, and there are no rotating register reads/writes here. */
8127 for (i = 1; i < 16; i++)
8129 specs[count] = tmpl;
8130 specs[count++].index = i;
8136 /* Mark only those registers indicated by the mask. */
8139 mask = CURR_SLOT.opnd[2].X_add_number;
8140 for (i = 1; i < 16; i++)
8141 if (mask & ((valueT) 1 << i))
8143 specs[count] = tmpl;
8144 specs[count++].index = i;
8152 else if (note == 11) /* note 11 implies note 1 as well */
8156 for (i = 0; i < idesc->num_outputs; i++)
8158 if (idesc->operands[i] == IA64_OPND_P1
8159 || idesc->operands[i] == IA64_OPND_P2)
8161 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8162 if (regno >= 1 && regno < 16)
8164 specs[count] = tmpl;
8165 specs[count++].index = regno;
8175 else if (note == 12)
8177 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8179 specs[count] = tmpl;
8180 specs[count++].index = CURR_SLOT.qp_regno;
8187 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8188 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8189 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8190 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8192 if ((idesc->operands[0] == IA64_OPND_P1
8193 || idesc->operands[0] == IA64_OPND_P2)
8194 && p1 >= 1 && p1 < 16)
8196 specs[count] = tmpl;
8197 specs[count].cmp_type =
8198 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8199 specs[count++].index = p1;
8201 if ((idesc->operands[1] == IA64_OPND_P1
8202 || idesc->operands[1] == IA64_OPND_P2)
8203 && p2 >= 1 && p2 < 16)
8205 specs[count] = tmpl;
8206 specs[count].cmp_type =
8207 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8208 specs[count++].index = p2;
8213 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8215 specs[count] = tmpl;
8216 specs[count++].index = CURR_SLOT.qp_regno;
8218 if (idesc->operands[1] == IA64_OPND_PR)
8220 for (i = 1; i < 16; i++)
8222 specs[count] = tmpl;
8223 specs[count++].index = i;
8234 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8235 simplified cases of this. */
8239 for (i = 16; i < 63; i++)
8241 specs[count] = tmpl;
8242 specs[count++].index = i;
8248 /* Mark only those registers indicated by the mask. */
8250 && idesc->operands[0] == IA64_OPND_PR)
8252 mask = CURR_SLOT.opnd[2].X_add_number;
8253 if (mask & ((valueT) 1 << 16))
8254 for (i = 16; i < 63; i++)
8256 specs[count] = tmpl;
8257 specs[count++].index = i;
8261 && idesc->operands[0] == IA64_OPND_PR_ROT)
8263 for (i = 16; i < 63; i++)
8265 specs[count] = tmpl;
8266 specs[count++].index = i;
8274 else if (note == 11) /* note 11 implies note 1 as well */
8278 for (i = 0; i < idesc->num_outputs; i++)
8280 if (idesc->operands[i] == IA64_OPND_P1
8281 || idesc->operands[i] == IA64_OPND_P2)
8283 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8284 if (regno >= 16 && regno < 63)
8286 specs[count] = tmpl;
8287 specs[count++].index = regno;
8297 else if (note == 12)
8299 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8301 specs[count] = tmpl;
8302 specs[count++].index = CURR_SLOT.qp_regno;
8309 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8310 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8311 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8312 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8314 if ((idesc->operands[0] == IA64_OPND_P1
8315 || idesc->operands[0] == IA64_OPND_P2)
8316 && p1 >= 16 && p1 < 63)
8318 specs[count] = tmpl;
8319 specs[count].cmp_type =
8320 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8321 specs[count++].index = p1;
8323 if ((idesc->operands[1] == IA64_OPND_P1
8324 || idesc->operands[1] == IA64_OPND_P2)
8325 && p2 >= 16 && p2 < 63)
8327 specs[count] = tmpl;
8328 specs[count].cmp_type =
8329 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8330 specs[count++].index = p2;
8335 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8337 specs[count] = tmpl;
8338 specs[count++].index = CURR_SLOT.qp_regno;
8340 if (idesc->operands[1] == IA64_OPND_PR)
8342 for (i = 16; i < 63; i++)
8344 specs[count] = tmpl;
8345 specs[count++].index = i;
8357 /* Verify that the instruction is using the PSR bit indicated in
8361 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8363 if (dep->regindex < 6)
8365 specs[count++] = tmpl;
8368 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8370 if (dep->regindex < 32
8371 || dep->regindex == 35
8372 || dep->regindex == 36
8373 || (!rsrc_write && dep->regindex == PSR_CPL))
8375 specs[count++] = tmpl;
8378 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8380 if (dep->regindex < 32
8381 || dep->regindex == 35
8382 || dep->regindex == 36
8383 || (rsrc_write && dep->regindex == PSR_CPL))
8385 specs[count++] = tmpl;
8390 /* Several PSR bits have very specific dependencies. */
8391 switch (dep->regindex)
8394 specs[count++] = tmpl;
8399 specs[count++] = tmpl;
8403 /* Only certain CR accesses use PSR.ic */
8404 if (idesc->operands[0] == IA64_OPND_CR3
8405 || idesc->operands[1] == IA64_OPND_CR3)
8408 ((idesc->operands[0] == IA64_OPND_CR3)
8411 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8426 specs[count++] = tmpl;
8435 specs[count++] = tmpl;
8439 /* Only some AR accesses use cpl */
8440 if (idesc->operands[0] == IA64_OPND_AR3
8441 || idesc->operands[1] == IA64_OPND_AR3)
8444 ((idesc->operands[0] == IA64_OPND_AR3)
8447 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8454 && regno <= AR_K7))))
8456 specs[count++] = tmpl;
8461 specs[count++] = tmpl;
8471 if (idesc->operands[0] == IA64_OPND_IMMU24)
8473 mask = CURR_SLOT.opnd[0].X_add_number;
8479 if (mask & ((valueT) 1 << dep->regindex))
8481 specs[count++] = tmpl;
8486 int min = dep->regindex == PSR_DFL ? 2 : 32;
8487 int max = dep->regindex == PSR_DFL ? 31 : 127;
8488 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8489 for (i = 0; i < NELEMS (idesc->operands); i++)
8491 if (idesc->operands[i] == IA64_OPND_F1
8492 || idesc->operands[i] == IA64_OPND_F2
8493 || idesc->operands[i] == IA64_OPND_F3
8494 || idesc->operands[i] == IA64_OPND_F4)
8496 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8497 if (reg >= min && reg <= max)
8499 specs[count++] = tmpl;
8506 int min = dep->regindex == PSR_MFL ? 2 : 32;
8507 int max = dep->regindex == PSR_MFL ? 31 : 127;
8508 /* mfh is read on writes to FR32-127; mfl is read on writes to
8510 for (i = 0; i < idesc->num_outputs; i++)
8512 if (idesc->operands[i] == IA64_OPND_F1)
8514 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8515 if (reg >= min && reg <= max)
8517 specs[count++] = tmpl;
8522 else if (note == 10)
8524 for (i = 0; i < NELEMS (idesc->operands); i++)
8526 if (idesc->operands[i] == IA64_OPND_R1
8527 || idesc->operands[i] == IA64_OPND_R2
8528 || idesc->operands[i] == IA64_OPND_R3)
8530 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8531 if (regno >= 16 && regno <= 31)
8533 specs[count++] = tmpl;
8544 case IA64_RS_AR_FPSR:
8545 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8547 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8548 if (regno == AR_FPSR)
8550 specs[count++] = tmpl;
8555 specs[count++] = tmpl;
8560 /* Handle all AR[REG] resources */
8561 if (note == 0 || note == 1)
8563 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8564 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8565 && regno == dep->regindex)
8567 specs[count++] = tmpl;
8569 /* other AR[REG] resources may be affected by AR accesses */
8570 else if (idesc->operands[0] == IA64_OPND_AR3)
8573 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8574 switch (dep->regindex)
8580 if (regno == AR_BSPSTORE)
8582 specs[count++] = tmpl;
8586 (regno == AR_BSPSTORE
8587 || regno == AR_RNAT))
8589 specs[count++] = tmpl;
8594 else if (idesc->operands[1] == IA64_OPND_AR3)
8597 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8598 switch (dep->regindex)
8603 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8605 specs[count++] = tmpl;
8612 specs[count++] = tmpl;
8622 /* Handle all CR[REG] resources */
8623 if (note == 0 || note == 1)
8625 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8627 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8628 if (regno == dep->regindex)
8630 specs[count++] = tmpl;
8632 else if (!rsrc_write)
8634 /* Reads from CR[IVR] affect other resources. */
8635 if (regno == CR_IVR)
8637 if ((dep->regindex >= CR_IRR0
8638 && dep->regindex <= CR_IRR3)
8639 || dep->regindex == CR_TPR)
8641 specs[count++] = tmpl;
8648 specs[count++] = tmpl;
8657 case IA64_RS_INSERVICE:
8658 /* look for write of EOI (67) or read of IVR (65) */
8659 if ((idesc->operands[0] == IA64_OPND_CR3
8660 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8661 || (idesc->operands[1] == IA64_OPND_CR3
8662 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8664 specs[count++] = tmpl;
8671 specs[count++] = tmpl;
8682 specs[count++] = tmpl;
8686 /* Check if any of the registers accessed are in the rotating region.
8687 mov to/from pr accesses CFM only when qp_regno is in the rotating
8689 for (i = 0; i < NELEMS (idesc->operands); i++)
8691 if (idesc->operands[i] == IA64_OPND_R1
8692 || idesc->operands[i] == IA64_OPND_R2
8693 || idesc->operands[i] == IA64_OPND_R3)
8695 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8696 /* Assumes that md.rot.num_regs is always valid */
8697 if (md.rot.num_regs > 0
8699 && num < 31 + md.rot.num_regs)
8701 specs[count] = tmpl;
8702 specs[count++].specific = 0;
8705 else if (idesc->operands[i] == IA64_OPND_F1
8706 || idesc->operands[i] == IA64_OPND_F2
8707 || idesc->operands[i] == IA64_OPND_F3
8708 || idesc->operands[i] == IA64_OPND_F4)
8710 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8713 specs[count] = tmpl;
8714 specs[count++].specific = 0;
8717 else if (idesc->operands[i] == IA64_OPND_P1
8718 || idesc->operands[i] == IA64_OPND_P2)
8720 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8723 specs[count] = tmpl;
8724 specs[count++].specific = 0;
8728 if (CURR_SLOT.qp_regno > 15)
8730 specs[count] = tmpl;
8731 specs[count++].specific = 0;
8736 /* This is the same as IA64_RS_PRr, except simplified to account for
8737 the fact that there is only one register. */
8741 specs[count++] = tmpl;
8746 if (idesc->operands[2] == IA64_OPND_IMM17)
8747 mask = CURR_SLOT.opnd[2].X_add_number;
8748 if (mask & ((valueT) 1 << 63))
8749 specs[count++] = tmpl;
8751 else if (note == 11)
8753 if ((idesc->operands[0] == IA64_OPND_P1
8754 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8755 || (idesc->operands[1] == IA64_OPND_P2
8756 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8758 specs[count++] = tmpl;
8761 else if (note == 12)
8763 if (CURR_SLOT.qp_regno == 63)
8765 specs[count++] = tmpl;
8772 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8773 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8774 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8775 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8778 && (idesc->operands[0] == IA64_OPND_P1
8779 || idesc->operands[0] == IA64_OPND_P2))
8781 specs[count] = tmpl;
8782 specs[count++].cmp_type =
8783 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8786 && (idesc->operands[1] == IA64_OPND_P1
8787 || idesc->operands[1] == IA64_OPND_P2))
8789 specs[count] = tmpl;
8790 specs[count++].cmp_type =
8791 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8796 if (CURR_SLOT.qp_regno == 63)
8798 specs[count++] = tmpl;
8809 /* FIXME we can identify some individual RSE written resources, but RSE
8810 read resources have not yet been completely identified, so for now
8811 treat RSE as a single resource */
8812 if (strncmp (idesc->name, "mov", 3) == 0)
8816 if (idesc->operands[0] == IA64_OPND_AR3
8817 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8819 specs[count] = tmpl;
8820 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8825 if (idesc->operands[0] == IA64_OPND_AR3)
8827 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8828 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8830 specs[count++] = tmpl;
8833 else if (idesc->operands[1] == IA64_OPND_AR3)
8835 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8836 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8837 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8839 specs[count++] = tmpl;
8846 specs[count++] = tmpl;
8851 /* FIXME -- do any of these need to be non-specific? */
8852 specs[count++] = tmpl;
8856 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8863 /* Clear branch flags on marked resources. This breaks the link between the
8864 QP of the marking instruction and a subsequent branch on the same QP. */
8867 clear_qp_branch_flag (mask)
8871 for (i = 0; i < regdepslen; i++)
8873 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8874 if ((bit & mask) != 0)
8876 regdeps[i].link_to_qp_branch = 0;
8881 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8882 any mutexes which contain one of the PRs and create new ones when
8886 update_qp_mutex (valueT mask)
8892 while (i < qp_mutexeslen)
8894 if ((qp_mutexes[i].prmask & mask) != 0)
8896 /* If it destroys and creates the same mutex, do nothing. */
8897 if (qp_mutexes[i].prmask == mask
8898 && qp_mutexes[i].path == md.path)
8909 fprintf (stderr, " Clearing mutex relation");
8910 print_prmask (qp_mutexes[i].prmask);
8911 fprintf (stderr, "\n");
8914 /* Deal with the old mutex with more than 3+ PRs only if
8915 the new mutex on the same execution path with it.
8917 FIXME: The 3+ mutex support is incomplete.
8918 dot_pred_rel () may be a better place to fix it. */
8919 if (qp_mutexes[i].path == md.path)
8921 /* If it is a proper subset of the mutex, create a
8924 && (qp_mutexes[i].prmask & mask) == mask)
8927 qp_mutexes[i].prmask &= ~mask;
8928 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8930 /* Modify the mutex if there are more than one
8938 /* Remove the mutex. */
8939 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8947 add_qp_mutex (mask);
8952 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8954 Any changes to a PR clears the mutex relations which include that PR. */
8957 clear_qp_mutex (mask)
8963 while (i < qp_mutexeslen)
8965 if ((qp_mutexes[i].prmask & mask) != 0)
8969 fprintf (stderr, " Clearing mutex relation");
8970 print_prmask (qp_mutexes[i].prmask);
8971 fprintf (stderr, "\n");
8973 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8980 /* Clear implies relations which contain PRs in the given masks.
8981 P1_MASK indicates the source of the implies relation, while P2_MASK
8982 indicates the implied PR. */
8985 clear_qp_implies (p1_mask, p2_mask)
8992 while (i < qp_implieslen)
8994 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8995 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8998 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8999 qp_implies[i].p1, qp_implies[i].p2);
9000 qp_implies[i] = qp_implies[--qp_implieslen];
9007 /* Add the PRs specified to the list of implied relations. */
9010 add_qp_imply (p1, p2)
9017 /* p0 is not meaningful here. */
9018 if (p1 == 0 || p2 == 0)
9024 /* If it exists already, ignore it. */
9025 for (i = 0; i < qp_implieslen; i++)
9027 if (qp_implies[i].p1 == p1
9028 && qp_implies[i].p2 == p2
9029 && qp_implies[i].path == md.path
9030 && !qp_implies[i].p2_branched)
9034 if (qp_implieslen == qp_impliestotlen)
9036 qp_impliestotlen += 20;
9037 qp_implies = (struct qp_imply *)
9038 xrealloc ((void *) qp_implies,
9039 qp_impliestotlen * sizeof (struct qp_imply));
9042 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9043 qp_implies[qp_implieslen].p1 = p1;
9044 qp_implies[qp_implieslen].p2 = p2;
9045 qp_implies[qp_implieslen].path = md.path;
9046 qp_implies[qp_implieslen++].p2_branched = 0;
9048 /* Add in the implied transitive relations; for everything that p2 implies,
9049 make p1 imply that, too; for everything that implies p1, make it imply p2
9051 for (i = 0; i < qp_implieslen; i++)
9053 if (qp_implies[i].p1 == p2)
9054 add_qp_imply (p1, qp_implies[i].p2);
9055 if (qp_implies[i].p2 == p1)
9056 add_qp_imply (qp_implies[i].p1, p2);
9058 /* Add in mutex relations implied by this implies relation; for each mutex
9059 relation containing p2, duplicate it and replace p2 with p1. */
9060 bit = (valueT) 1 << p1;
9061 mask = (valueT) 1 << p2;
9062 for (i = 0; i < qp_mutexeslen; i++)
9064 if (qp_mutexes[i].prmask & mask)
9065 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9069 /* Add the PRs specified in the mask to the mutex list; this means that only
9070 one of the PRs can be true at any time. PR0 should never be included in
9080 if (qp_mutexeslen == qp_mutexestotlen)
9082 qp_mutexestotlen += 20;
9083 qp_mutexes = (struct qpmutex *)
9084 xrealloc ((void *) qp_mutexes,
9085 qp_mutexestotlen * sizeof (struct qpmutex));
9089 fprintf (stderr, " Registering mutex on");
9090 print_prmask (mask);
9091 fprintf (stderr, "\n");
9093 qp_mutexes[qp_mutexeslen].path = md.path;
9094 qp_mutexes[qp_mutexeslen++].prmask = mask;
9098 has_suffix_p (name, suffix)
9102 size_t namelen = strlen (name);
9103 size_t sufflen = strlen (suffix);
9105 if (namelen <= sufflen)
9107 return strcmp (name + namelen - sufflen, suffix) == 0;
9111 clear_register_values ()
9115 fprintf (stderr, " Clearing register values\n");
9116 for (i = 1; i < NELEMS (gr_values); i++)
9117 gr_values[i].known = 0;
9120 /* Keep track of register values/changes which affect DV tracking.
9122 optimization note: should add a flag to classes of insns where otherwise we
9123 have to examine a group of strings to identify them. */
9126 note_register_values (idesc)
9127 struct ia64_opcode *idesc;
9129 valueT qp_changemask = 0;
9132 /* Invalidate values for registers being written to. */
9133 for (i = 0; i < idesc->num_outputs; i++)
9135 if (idesc->operands[i] == IA64_OPND_R1
9136 || idesc->operands[i] == IA64_OPND_R2
9137 || idesc->operands[i] == IA64_OPND_R3)
9139 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9140 if (regno > 0 && regno < NELEMS (gr_values))
9141 gr_values[regno].known = 0;
9143 else if (idesc->operands[i] == IA64_OPND_R3_2)
9145 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9146 if (regno > 0 && regno < 4)
9147 gr_values[regno].known = 0;
9149 else if (idesc->operands[i] == IA64_OPND_P1
9150 || idesc->operands[i] == IA64_OPND_P2)
9152 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9153 qp_changemask |= (valueT) 1 << regno;
9155 else if (idesc->operands[i] == IA64_OPND_PR)
9157 if (idesc->operands[2] & (valueT) 0x10000)
9158 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9160 qp_changemask = idesc->operands[2];
9163 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9165 if (idesc->operands[1] & ((valueT) 1 << 43))
9166 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9168 qp_changemask = idesc->operands[1];
9169 qp_changemask &= ~(valueT) 0xFFFF;
9174 /* Always clear qp branch flags on any PR change. */
9175 /* FIXME there may be exceptions for certain compares. */
9176 clear_qp_branch_flag (qp_changemask);
9178 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9179 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9181 qp_changemask |= ~(valueT) 0xFFFF;
9182 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9184 for (i = 32; i < 32 + md.rot.num_regs; i++)
9185 gr_values[i].known = 0;
9187 clear_qp_mutex (qp_changemask);
9188 clear_qp_implies (qp_changemask, qp_changemask);
9190 /* After a call, all register values are undefined, except those marked
9192 else if (strncmp (idesc->name, "br.call", 6) == 0
9193 || strncmp (idesc->name, "brl.call", 7) == 0)
9195 /* FIXME keep GR values which are marked as "safe_across_calls" */
9196 clear_register_values ();
9197 clear_qp_mutex (~qp_safe_across_calls);
9198 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9199 clear_qp_branch_flag (~qp_safe_across_calls);
9201 else if (is_interruption_or_rfi (idesc)
9202 || is_taken_branch (idesc))
9204 clear_register_values ();
9205 clear_qp_mutex (~(valueT) 0);
9206 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9208 /* Look for mutex and implies relations. */
9209 else if ((idesc->operands[0] == IA64_OPND_P1
9210 || idesc->operands[0] == IA64_OPND_P2)
9211 && (idesc->operands[1] == IA64_OPND_P1
9212 || idesc->operands[1] == IA64_OPND_P2))
9214 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9215 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9216 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9217 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9219 /* If both PRs are PR0, we can't really do anything. */
9220 if (p1 == 0 && p2 == 0)
9223 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9225 /* In general, clear mutexes and implies which include P1 or P2,
9226 with the following exceptions. */
9227 else if (has_suffix_p (idesc->name, ".or.andcm")
9228 || has_suffix_p (idesc->name, ".and.orcm"))
9230 clear_qp_implies (p2mask, p1mask);
9232 else if (has_suffix_p (idesc->name, ".andcm")
9233 || has_suffix_p (idesc->name, ".and"))
9235 clear_qp_implies (0, p1mask | p2mask);
9237 else if (has_suffix_p (idesc->name, ".orcm")
9238 || has_suffix_p (idesc->name, ".or"))
9240 clear_qp_mutex (p1mask | p2mask);
9241 clear_qp_implies (p1mask | p2mask, 0);
9247 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9249 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9250 if (p1 == 0 || p2 == 0)
9251 clear_qp_mutex (p1mask | p2mask);
9253 added = update_qp_mutex (p1mask | p2mask);
9255 if (CURR_SLOT.qp_regno == 0
9256 || has_suffix_p (idesc->name, ".unc"))
9258 if (added == 0 && p1 && p2)
9259 add_qp_mutex (p1mask | p2mask);
9260 if (CURR_SLOT.qp_regno != 0)
9263 add_qp_imply (p1, CURR_SLOT.qp_regno);
9265 add_qp_imply (p2, CURR_SLOT.qp_regno);
9270 /* Look for mov imm insns into GRs. */
9271 else if (idesc->operands[0] == IA64_OPND_R1
9272 && (idesc->operands[1] == IA64_OPND_IMM22
9273 || idesc->operands[1] == IA64_OPND_IMMU64)
9274 && (strcmp (idesc->name, "mov") == 0
9275 || strcmp (idesc->name, "movl") == 0))
9277 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9278 if (regno > 0 && regno < NELEMS (gr_values))
9280 gr_values[regno].known = 1;
9281 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9282 gr_values[regno].path = md.path;
9285 fprintf (stderr, " Know gr%d = ", regno);
9286 fprintf_vma (stderr, gr_values[regno].value);
9287 fputs ("\n", stderr);
9293 clear_qp_mutex (qp_changemask);
9294 clear_qp_implies (qp_changemask, qp_changemask);
9298 /* Return whether the given predicate registers are currently mutex. */
9301 qp_mutex (p1, p2, path)
9311 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9312 for (i = 0; i < qp_mutexeslen; i++)
9314 if (qp_mutexes[i].path >= path
9315 && (qp_mutexes[i].prmask & mask) == mask)
9322 /* Return whether the given resource is in the given insn's list of chks
9323 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9327 resources_match (rs, idesc, note, qp_regno, path)
9329 struct ia64_opcode *idesc;
9334 struct rsrc specs[MAX_SPECS];
9337 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9338 we don't need to check. One exception is note 11, which indicates that
9339 target predicates are written regardless of PR[qp]. */
9340 if (qp_mutex (rs->qp_regno, qp_regno, path)
9344 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9347 /* UNAT checking is a bit more specific than other resources */
9348 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9349 && specs[count].mem_offset.hint
9350 && rs->mem_offset.hint)
9352 if (rs->mem_offset.base == specs[count].mem_offset.base)
9354 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9355 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9362 /* Skip apparent PR write conflicts where both writes are an AND or both
9363 writes are an OR. */
9364 if (rs->dependency->specifier == IA64_RS_PR
9365 || rs->dependency->specifier == IA64_RS_PRr
9366 || rs->dependency->specifier == IA64_RS_PR63)
9368 if (specs[count].cmp_type != CMP_NONE
9369 && specs[count].cmp_type == rs->cmp_type)
9372 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9373 dv_mode[rs->dependency->mode],
9374 rs->dependency->specifier != IA64_RS_PR63 ?
9375 specs[count].index : 63);
9380 " %s on parallel compare conflict %s vs %s on PR%d\n",
9381 dv_mode[rs->dependency->mode],
9382 dv_cmp_type[rs->cmp_type],
9383 dv_cmp_type[specs[count].cmp_type],
9384 rs->dependency->specifier != IA64_RS_PR63 ?
9385 specs[count].index : 63);
9389 /* If either resource is not specific, conservatively assume a conflict
9391 if (!specs[count].specific || !rs->specific)
9393 else if (specs[count].index == rs->index)
9398 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9404 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9405 insert a stop to create the break. Update all resource dependencies
9406 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9407 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9408 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9412 insn_group_break (insert_stop, qp_regno, save_current)
9419 if (insert_stop && md.num_slots_in_use > 0)
9420 PREV_SLOT.end_of_insn_group = 1;
9424 fprintf (stderr, " Insn group break%s",
9425 (insert_stop ? " (w/stop)" : ""));
9427 fprintf (stderr, " effective for QP=%d", qp_regno);
9428 fprintf (stderr, "\n");
9432 while (i < regdepslen)
9434 const struct ia64_dependency *dep = regdeps[i].dependency;
9437 && regdeps[i].qp_regno != qp_regno)
9444 && CURR_SLOT.src_file == regdeps[i].file
9445 && CURR_SLOT.src_line == regdeps[i].line)
9451 /* clear dependencies which are automatically cleared by a stop, or
9452 those that have reached the appropriate state of insn serialization */
9453 if (dep->semantics == IA64_DVS_IMPLIED
9454 || dep->semantics == IA64_DVS_IMPLIEDF
9455 || regdeps[i].insn_srlz == STATE_SRLZ)
9457 print_dependency ("Removing", i);
9458 regdeps[i] = regdeps[--regdepslen];
9462 if (dep->semantics == IA64_DVS_DATA
9463 || dep->semantics == IA64_DVS_INSTR
9464 || dep->semantics == IA64_DVS_SPECIFIC)
9466 if (regdeps[i].insn_srlz == STATE_NONE)
9467 regdeps[i].insn_srlz = STATE_STOP;
9468 if (regdeps[i].data_srlz == STATE_NONE)
9469 regdeps[i].data_srlz = STATE_STOP;
9476 /* Add the given resource usage spec to the list of active dependencies. */
9479 mark_resource (idesc, dep, spec, depind, path)
9480 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9481 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9486 if (regdepslen == regdepstotlen)
9488 regdepstotlen += 20;
9489 regdeps = (struct rsrc *)
9490 xrealloc ((void *) regdeps,
9491 regdepstotlen * sizeof (struct rsrc));
9494 regdeps[regdepslen] = *spec;
9495 regdeps[regdepslen].depind = depind;
9496 regdeps[regdepslen].path = path;
9497 regdeps[regdepslen].file = CURR_SLOT.src_file;
9498 regdeps[regdepslen].line = CURR_SLOT.src_line;
9500 print_dependency ("Adding", regdepslen);
9506 print_dependency (action, depind)
9512 fprintf (stderr, " %s %s '%s'",
9513 action, dv_mode[(regdeps[depind].dependency)->mode],
9514 (regdeps[depind].dependency)->name);
9515 if (regdeps[depind].specific && regdeps[depind].index != 0)
9516 fprintf (stderr, " (%d)", regdeps[depind].index);
9517 if (regdeps[depind].mem_offset.hint)
9519 fputs (" ", stderr);
9520 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9521 fputs ("+", stderr);
9522 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9524 fprintf (stderr, "\n");
9529 instruction_serialization ()
9533 fprintf (stderr, " Instruction serialization\n");
9534 for (i = 0; i < regdepslen; i++)
9535 if (regdeps[i].insn_srlz == STATE_STOP)
9536 regdeps[i].insn_srlz = STATE_SRLZ;
9540 data_serialization ()
9544 fprintf (stderr, " Data serialization\n");
9545 while (i < regdepslen)
9547 if (regdeps[i].data_srlz == STATE_STOP
9548 /* Note: as of 991210, all "other" dependencies are cleared by a
9549 data serialization. This might change with new tables */
9550 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9552 print_dependency ("Removing", i);
9553 regdeps[i] = regdeps[--regdepslen];
9560 /* Insert stops and serializations as needed to avoid DVs. */
9563 remove_marked_resource (rs)
9566 switch (rs->dependency->semantics)
9568 case IA64_DVS_SPECIFIC:
9570 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9571 /* ...fall through... */
9572 case IA64_DVS_INSTR:
9574 fprintf (stderr, "Inserting instr serialization\n");
9575 if (rs->insn_srlz < STATE_STOP)
9576 insn_group_break (1, 0, 0);
9577 if (rs->insn_srlz < STATE_SRLZ)
9579 struct slot oldslot = CURR_SLOT;
9580 /* Manually jam a srlz.i insn into the stream */
9581 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9582 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9583 instruction_serialization ();
9584 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9585 if (++md.num_slots_in_use >= NUM_SLOTS)
9587 CURR_SLOT = oldslot;
9589 insn_group_break (1, 0, 0);
9591 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9592 "other" types of DV are eliminated
9593 by a data serialization */
9596 fprintf (stderr, "Inserting data serialization\n");
9597 if (rs->data_srlz < STATE_STOP)
9598 insn_group_break (1, 0, 0);
9600 struct slot oldslot = CURR_SLOT;
9601 /* Manually jam a srlz.d insn into the stream */
9602 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9603 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9604 data_serialization ();
9605 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9606 if (++md.num_slots_in_use >= NUM_SLOTS)
9608 CURR_SLOT = oldslot;
9611 case IA64_DVS_IMPLIED:
9612 case IA64_DVS_IMPLIEDF:
9614 fprintf (stderr, "Inserting stop\n");
9615 insn_group_break (1, 0, 0);
9622 /* Check the resources used by the given opcode against the current dependency
9625 The check is run once for each execution path encountered. In this case,
9626 a unique execution path is the sequence of instructions following a code
9627 entry point, e.g. the following has three execution paths, one starting
9628 at L0, one at L1, and one at L2.
9637 check_dependencies (idesc)
9638 struct ia64_opcode *idesc;
9640 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9644 /* Note that the number of marked resources may change within the
9645 loop if in auto mode. */
9647 while (i < regdepslen)
9649 struct rsrc *rs = ®deps[i];
9650 const struct ia64_dependency *dep = rs->dependency;
9655 if (dep->semantics == IA64_DVS_NONE
9656 || (chkind = depends_on (rs->depind, idesc)) == -1)
9662 note = NOTE (opdeps->chks[chkind]);
9664 /* Check this resource against each execution path seen thus far. */
9665 for (path = 0; path <= md.path; path++)
9669 /* If the dependency wasn't on the path being checked, ignore it. */
9670 if (rs->path < path)
9673 /* If the QP for this insn implies a QP which has branched, don't
9674 bother checking. Ed. NOTE: I don't think this check is terribly
9675 useful; what's the point of generating code which will only be
9676 reached if its QP is zero?
9677 This code was specifically inserted to handle the following code,
9678 based on notes from Intel's DV checking code, where p1 implies p2.
9684 if (CURR_SLOT.qp_regno != 0)
9688 for (implies = 0; implies < qp_implieslen; implies++)
9690 if (qp_implies[implies].path >= path
9691 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9692 && qp_implies[implies].p2_branched)
9702 if ((matchtype = resources_match (rs, idesc, note,
9703 CURR_SLOT.qp_regno, path)) != 0)
9706 char pathmsg[256] = "";
9707 char indexmsg[256] = "";
9708 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9711 sprintf (pathmsg, " when entry is at label '%s'",
9712 md.entry_labels[path - 1]);
9713 if (rs->specific && rs->index != 0)
9714 sprintf (indexmsg, ", specific resource number is %d",
9716 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9718 (certain ? "violates" : "may violate"),
9719 dv_mode[dep->mode], dep->name,
9720 dv_sem[dep->semantics],
9723 if (md.explicit_mode)
9725 as_warn ("%s", msg);
9727 as_warn (_("Only the first path encountering the conflict "
9729 as_warn_where (rs->file, rs->line,
9730 _("This is the location of the "
9731 "conflicting usage"));
9732 /* Don't bother checking other paths, to avoid duplicating
9739 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9741 remove_marked_resource (rs);
9743 /* since the set of dependencies has changed, start over */
9744 /* FIXME -- since we're removing dvs as we go, we
9745 probably don't really need to start over... */
9758 /* Register new dependencies based on the given opcode. */
9761 mark_resources (idesc)
9762 struct ia64_opcode *idesc;
9765 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9766 int add_only_qp_reads = 0;
9768 /* A conditional branch only uses its resources if it is taken; if it is
9769 taken, we stop following that path. The other branch types effectively
9770 *always* write their resources. If it's not taken, register only QP
9772 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9774 add_only_qp_reads = 1;
9778 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9780 for (i = 0; i < opdeps->nregs; i++)
9782 const struct ia64_dependency *dep;
9783 struct rsrc specs[MAX_SPECS];
9788 dep = ia64_find_dependency (opdeps->regs[i]);
9789 note = NOTE (opdeps->regs[i]);
9791 if (add_only_qp_reads
9792 && !(dep->mode == IA64_DV_WAR
9793 && (dep->specifier == IA64_RS_PR
9794 || dep->specifier == IA64_RS_PRr
9795 || dep->specifier == IA64_RS_PR63)))
9798 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9801 if (md.debug_dv && !count)
9802 fprintf (stderr, " No %s %s usage found (path %d)\n",
9803 dv_mode[dep->mode], dep->name, md.path);
9808 mark_resource (idesc, dep, &specs[count],
9809 DEP (opdeps->regs[i]), md.path);
9812 /* The execution path may affect register values, which may in turn
9813 affect which indirect-access resources are accessed. */
9814 switch (dep->specifier)
9826 for (path = 0; path < md.path; path++)
9828 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9830 mark_resource (idesc, dep, &specs[count],
9831 DEP (opdeps->regs[i]), path);
9838 /* Remove dependencies when they no longer apply. */
9841 update_dependencies (idesc)
9842 struct ia64_opcode *idesc;
9846 if (strcmp (idesc->name, "srlz.i") == 0)
9848 instruction_serialization ();
9850 else if (strcmp (idesc->name, "srlz.d") == 0)
9852 data_serialization ();
9854 else if (is_interruption_or_rfi (idesc)
9855 || is_taken_branch (idesc))
9857 /* Although technically the taken branch doesn't clear dependencies
9858 which require a srlz.[id], we don't follow the branch; the next
9859 instruction is assumed to start with a clean slate. */
9863 else if (is_conditional_branch (idesc)
9864 && CURR_SLOT.qp_regno != 0)
9866 int is_call = strstr (idesc->name, ".call") != NULL;
9868 for (i = 0; i < qp_implieslen; i++)
9870 /* If the conditional branch's predicate is implied by the predicate
9871 in an existing dependency, remove that dependency. */
9872 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9875 /* Note that this implied predicate takes a branch so that if
9876 a later insn generates a DV but its predicate implies this
9877 one, we can avoid the false DV warning. */
9878 qp_implies[i].p2_branched = 1;
9879 while (depind < regdepslen)
9881 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9883 print_dependency ("Removing", depind);
9884 regdeps[depind] = regdeps[--regdepslen];
9891 /* Any marked resources which have this same predicate should be
9892 cleared, provided that the QP hasn't been modified between the
9893 marking instruction and the branch. */
9896 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9901 while (i < regdepslen)
9903 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9904 && regdeps[i].link_to_qp_branch
9905 && (regdeps[i].file != CURR_SLOT.src_file
9906 || regdeps[i].line != CURR_SLOT.src_line))
9908 /* Treat like a taken branch */
9909 print_dependency ("Removing", i);
9910 regdeps[i] = regdeps[--regdepslen];
9919 /* Examine the current instruction for dependency violations. */
9923 struct ia64_opcode *idesc;
9927 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9928 idesc->name, CURR_SLOT.src_line,
9929 idesc->dependencies->nchks,
9930 idesc->dependencies->nregs);
9933 /* Look through the list of currently marked resources; if the current
9934 instruction has the dependency in its chks list which uses that resource,
9935 check against the specific resources used. */
9936 check_dependencies (idesc);
9938 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9939 then add them to the list of marked resources. */
9940 mark_resources (idesc);
9942 /* There are several types of dependency semantics, and each has its own
9943 requirements for being cleared
9945 Instruction serialization (insns separated by interruption, rfi, or
9946 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9948 Data serialization (instruction serialization, or writer + srlz.d +
9949 reader, where writer and srlz.d are in separate groups) clears
9950 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9951 always be the case).
9953 Instruction group break (groups separated by stop, taken branch,
9954 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9956 update_dependencies (idesc);
9958 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9959 warning. Keep track of as many as possible that are useful. */
9960 note_register_values (idesc);
9962 /* We don't need or want this anymore. */
9963 md.mem_offset.hint = 0;
9968 /* Translate one line of assembly. Pseudo ops and labels do not show
9974 char *saved_input_line_pointer, *mnemonic;
9975 const struct pseudo_opcode *pdesc;
9976 struct ia64_opcode *idesc;
9977 unsigned char qp_regno;
9981 saved_input_line_pointer = input_line_pointer;
9982 input_line_pointer = str;
9984 /* extract the opcode (mnemonic): */
9986 mnemonic = input_line_pointer;
9987 ch = get_symbol_end ();
9988 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9991 *input_line_pointer = ch;
9992 (*pdesc->handler) (pdesc->arg);
9996 /* Find the instruction descriptor matching the arguments. */
9998 idesc = ia64_find_opcode (mnemonic);
9999 *input_line_pointer = ch;
10002 as_bad ("Unknown opcode `%s'", mnemonic);
10006 idesc = parse_operands (idesc);
10010 /* Handle the dynamic ops we can handle now: */
10011 if (idesc->type == IA64_TYPE_DYN)
10013 if (strcmp (idesc->name, "add") == 0)
10015 if (CURR_SLOT.opnd[2].X_op == O_register
10016 && CURR_SLOT.opnd[2].X_add_number < 4)
10020 ia64_free_opcode (idesc);
10021 idesc = ia64_find_opcode (mnemonic);
10023 know (!idesc->next);
10026 else if (strcmp (idesc->name, "mov") == 0)
10028 enum ia64_opnd opnd1, opnd2;
10031 opnd1 = idesc->operands[0];
10032 opnd2 = idesc->operands[1];
10033 if (opnd1 == IA64_OPND_AR3)
10035 else if (opnd2 == IA64_OPND_AR3)
10039 if (CURR_SLOT.opnd[rop].X_op == O_register)
10041 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10042 mnemonic = "mov.i";
10044 mnemonic = "mov.m";
10048 ia64_free_opcode (idesc);
10049 idesc = ia64_find_opcode (mnemonic);
10050 while (idesc != NULL
10051 && (idesc->operands[0] != opnd1
10052 || idesc->operands[1] != opnd2))
10053 idesc = get_next_opcode (idesc);
10056 else if (strcmp (idesc->name, "mov.i") == 0
10057 || strcmp (idesc->name, "mov.m") == 0)
10059 enum ia64_opnd opnd1, opnd2;
10062 opnd1 = idesc->operands[0];
10063 opnd2 = idesc->operands[1];
10064 if (opnd1 == IA64_OPND_AR3)
10066 else if (opnd2 == IA64_OPND_AR3)
10070 if (CURR_SLOT.opnd[rop].X_op == O_register)
10073 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10075 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10077 if (unit != 'a' && unit != idesc->name [4])
10078 as_bad ("AR %d cannot be accessed by %c-unit",
10079 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10085 if (md.qp.X_op == O_register)
10087 qp_regno = md.qp.X_add_number - REG_P;
10088 md.qp.X_op = O_absent;
10091 flags = idesc->flags;
10093 if ((flags & IA64_OPCODE_FIRST) != 0)
10095 /* The alignment frag has to end with a stop bit only if the
10096 next instruction after the alignment directive has to be
10097 the first instruction in an instruction group. */
10100 while (align_frag->fr_type != rs_align_code)
10102 align_frag = align_frag->fr_next;
10106 /* align_frag can be NULL if there are directives in
10108 if (align_frag && align_frag->fr_next == frag_now)
10109 align_frag->tc_frag_data = 1;
10112 insn_group_break (1, 0, 0);
10116 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10118 as_bad ("`%s' cannot be predicated", idesc->name);
10122 /* Build the instruction. */
10123 CURR_SLOT.qp_regno = qp_regno;
10124 CURR_SLOT.idesc = idesc;
10125 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10126 dwarf2_where (&CURR_SLOT.debug_line);
10128 /* Add unwind entry, if there is one. */
10129 if (unwind.current_entry)
10131 CURR_SLOT.unwind_record = unwind.current_entry;
10132 unwind.current_entry = NULL;
10135 /* Check for dependency violations. */
10139 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10140 if (++md.num_slots_in_use >= NUM_SLOTS)
10141 emit_one_bundle ();
10143 if ((flags & IA64_OPCODE_LAST) != 0)
10144 insn_group_break (1, 0, 0);
10146 md.last_text_seg = now_seg;
10149 input_line_pointer = saved_input_line_pointer;
10152 /* Called when symbol NAME cannot be found in the symbol table.
10153 Should be used for dynamic valued symbols only. */
10156 md_undefined_symbol (name)
10157 char *name ATTRIBUTE_UNUSED;
10162 /* Called for any expression that can not be recognized. When the
10163 function is called, `input_line_pointer' will point to the start of
10170 enum pseudo_type pseudo_type;
10175 switch (*input_line_pointer)
10178 /* Find what relocation pseudo-function we're dealing with. */
10180 ch = *++input_line_pointer;
10181 for (i = 0; i < NELEMS (pseudo_func); ++i)
10182 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10184 len = strlen (pseudo_func[i].name);
10185 if (strncmp (pseudo_func[i].name + 1,
10186 input_line_pointer + 1, len - 1) == 0
10187 && !is_part_of_name (input_line_pointer[len]))
10189 input_line_pointer += len;
10190 pseudo_type = pseudo_func[i].type;
10194 switch (pseudo_type)
10196 case PSEUDO_FUNC_RELOC:
10197 SKIP_WHITESPACE ();
10198 if (*input_line_pointer != '(')
10200 as_bad ("Expected '('");
10204 ++input_line_pointer;
10206 if (*input_line_pointer++ != ')')
10208 as_bad ("Missing ')'");
10211 if (e->X_op != O_symbol)
10213 if (e->X_op != O_pseudo_fixup)
10215 as_bad ("Not a symbolic expression");
10218 if (i != FUNC_LT_RELATIVE)
10220 as_bad ("Illegal combination of relocation functions");
10223 switch (S_GET_VALUE (e->X_op_symbol))
10225 case FUNC_FPTR_RELATIVE:
10226 i = FUNC_LT_FPTR_RELATIVE; break;
10227 case FUNC_DTP_MODULE:
10228 i = FUNC_LT_DTP_MODULE; break;
10229 case FUNC_DTP_RELATIVE:
10230 i = FUNC_LT_DTP_RELATIVE; break;
10231 case FUNC_TP_RELATIVE:
10232 i = FUNC_LT_TP_RELATIVE; break;
10234 as_bad ("Illegal combination of relocation functions");
10238 /* Make sure gas doesn't get rid of local symbols that are used
10240 e->X_op = O_pseudo_fixup;
10241 e->X_op_symbol = pseudo_func[i].u.sym;
10244 case PSEUDO_FUNC_CONST:
10245 e->X_op = O_constant;
10246 e->X_add_number = pseudo_func[i].u.ival;
10249 case PSEUDO_FUNC_REG:
10250 e->X_op = O_register;
10251 e->X_add_number = pseudo_func[i].u.ival;
10255 name = input_line_pointer - 1;
10257 as_bad ("Unknown pseudo function `%s'", name);
10263 ++input_line_pointer;
10265 if (*input_line_pointer != ']')
10267 as_bad ("Closing bracket misssing");
10272 if (e->X_op != O_register)
10273 as_bad ("Register expected as index");
10275 ++input_line_pointer;
10286 ignore_rest_of_line ();
10289 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10290 a section symbol plus some offset. For relocs involving @fptr(),
10291 directives we don't want such adjustments since we need to have the
10292 original symbol's name in the reloc. */
10294 ia64_fix_adjustable (fix)
10297 /* Prevent all adjustments to global symbols */
10298 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10301 switch (fix->fx_r_type)
10303 case BFD_RELOC_IA64_FPTR64I:
10304 case BFD_RELOC_IA64_FPTR32MSB:
10305 case BFD_RELOC_IA64_FPTR32LSB:
10306 case BFD_RELOC_IA64_FPTR64MSB:
10307 case BFD_RELOC_IA64_FPTR64LSB:
10308 case BFD_RELOC_IA64_LTOFF_FPTR22:
10309 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10319 ia64_force_relocation (fix)
10322 switch (fix->fx_r_type)
10324 case BFD_RELOC_IA64_FPTR64I:
10325 case BFD_RELOC_IA64_FPTR32MSB:
10326 case BFD_RELOC_IA64_FPTR32LSB:
10327 case BFD_RELOC_IA64_FPTR64MSB:
10328 case BFD_RELOC_IA64_FPTR64LSB:
10330 case BFD_RELOC_IA64_LTOFF22:
10331 case BFD_RELOC_IA64_LTOFF64I:
10332 case BFD_RELOC_IA64_LTOFF_FPTR22:
10333 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10334 case BFD_RELOC_IA64_PLTOFF22:
10335 case BFD_RELOC_IA64_PLTOFF64I:
10336 case BFD_RELOC_IA64_PLTOFF64MSB:
10337 case BFD_RELOC_IA64_PLTOFF64LSB:
10339 case BFD_RELOC_IA64_LTOFF22X:
10340 case BFD_RELOC_IA64_LDXMOV:
10347 return generic_force_reloc (fix);
10350 /* Decide from what point a pc-relative relocation is relative to,
10351 relative to the pc-relative fixup. Er, relatively speaking. */
10353 ia64_pcrel_from_section (fix, sec)
10357 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10359 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10366 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10368 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10372 expr.X_op = O_pseudo_fixup;
10373 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10374 expr.X_add_number = 0;
10375 expr.X_add_symbol = symbol;
10376 emit_expr (&expr, size);
10379 /* This is called whenever some data item (not an instruction) needs a
10380 fixup. We pick the right reloc code depending on the byteorder
10381 currently in effect. */
10383 ia64_cons_fix_new (f, where, nbytes, exp)
10389 bfd_reloc_code_real_type code;
10394 /* There are no reloc for 8 and 16 bit quantities, but we allow
10395 them here since they will work fine as long as the expression
10396 is fully defined at the end of the pass over the source file. */
10397 case 1: code = BFD_RELOC_8; break;
10398 case 2: code = BFD_RELOC_16; break;
10400 if (target_big_endian)
10401 code = BFD_RELOC_IA64_DIR32MSB;
10403 code = BFD_RELOC_IA64_DIR32LSB;
10407 /* In 32-bit mode, data8 could mean function descriptors too. */
10408 if (exp->X_op == O_pseudo_fixup
10409 && exp->X_op_symbol
10410 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10411 && !(md.flags & EF_IA_64_ABI64))
10413 if (target_big_endian)
10414 code = BFD_RELOC_IA64_IPLTMSB;
10416 code = BFD_RELOC_IA64_IPLTLSB;
10417 exp->X_op = O_symbol;
10422 if (target_big_endian)
10423 code = BFD_RELOC_IA64_DIR64MSB;
10425 code = BFD_RELOC_IA64_DIR64LSB;
10430 if (exp->X_op == O_pseudo_fixup
10431 && exp->X_op_symbol
10432 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10434 if (target_big_endian)
10435 code = BFD_RELOC_IA64_IPLTMSB;
10437 code = BFD_RELOC_IA64_IPLTLSB;
10438 exp->X_op = O_symbol;
10444 as_bad ("Unsupported fixup size %d", nbytes);
10445 ignore_rest_of_line ();
10449 if (exp->X_op == O_pseudo_fixup)
10451 exp->X_op = O_symbol;
10452 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10453 /* ??? If code unchanged, unsupported. */
10456 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10457 /* We need to store the byte order in effect in case we're going
10458 to fix an 8 or 16 bit relocation (for which there no real
10459 relocs available). See md_apply_fix3(). */
10460 fix->tc_fix_data.bigendian = target_big_endian;
10463 /* Return the actual relocation we wish to associate with the pseudo
10464 reloc described by SYM and R_TYPE. SYM should be one of the
10465 symbols in the pseudo_func array, or NULL. */
10467 static bfd_reloc_code_real_type
10468 ia64_gen_real_reloc_type (sym, r_type)
10469 struct symbol *sym;
10470 bfd_reloc_code_real_type r_type;
10472 bfd_reloc_code_real_type new = 0;
10479 switch (S_GET_VALUE (sym))
10481 case FUNC_FPTR_RELATIVE:
10484 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10485 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10486 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10487 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10488 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10493 case FUNC_GP_RELATIVE:
10496 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10497 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10498 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10499 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10500 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10501 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10506 case FUNC_LT_RELATIVE:
10509 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10510 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10515 case FUNC_LT_RELATIVE_X:
10518 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10523 case FUNC_PC_RELATIVE:
10526 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10527 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10528 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10529 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10530 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10531 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10536 case FUNC_PLT_RELATIVE:
10539 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10540 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10541 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10542 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10547 case FUNC_SEC_RELATIVE:
10550 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10551 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10552 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10553 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10558 case FUNC_SEG_RELATIVE:
10561 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10562 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10563 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10564 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10569 case FUNC_LTV_RELATIVE:
10572 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10573 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10574 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10575 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10580 case FUNC_LT_FPTR_RELATIVE:
10583 case BFD_RELOC_IA64_IMM22:
10584 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10585 case BFD_RELOC_IA64_IMM64:
10586 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10592 case FUNC_TP_RELATIVE:
10595 case BFD_RELOC_IA64_IMM14:
10596 new = BFD_RELOC_IA64_TPREL14; break;
10597 case BFD_RELOC_IA64_IMM22:
10598 new = BFD_RELOC_IA64_TPREL22; break;
10599 case BFD_RELOC_IA64_IMM64:
10600 new = BFD_RELOC_IA64_TPREL64I; break;
10606 case FUNC_LT_TP_RELATIVE:
10609 case BFD_RELOC_IA64_IMM22:
10610 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10616 case FUNC_LT_DTP_MODULE:
10619 case BFD_RELOC_IA64_IMM22:
10620 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10626 case FUNC_DTP_RELATIVE:
10629 case BFD_RELOC_IA64_DIR64MSB:
10630 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10631 case BFD_RELOC_IA64_DIR64LSB:
10632 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10633 case BFD_RELOC_IA64_IMM14:
10634 new = BFD_RELOC_IA64_DTPREL14; break;
10635 case BFD_RELOC_IA64_IMM22:
10636 new = BFD_RELOC_IA64_DTPREL22; break;
10637 case BFD_RELOC_IA64_IMM64:
10638 new = BFD_RELOC_IA64_DTPREL64I; break;
10644 case FUNC_LT_DTP_RELATIVE:
10647 case BFD_RELOC_IA64_IMM22:
10648 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10654 case FUNC_IPLT_RELOC:
10661 /* Hmmmm. Should this ever occur? */
10668 /* Here is where generate the appropriate reloc for pseudo relocation
10671 ia64_validate_fix (fix)
10674 switch (fix->fx_r_type)
10676 case BFD_RELOC_IA64_FPTR64I:
10677 case BFD_RELOC_IA64_FPTR32MSB:
10678 case BFD_RELOC_IA64_FPTR64LSB:
10679 case BFD_RELOC_IA64_LTOFF_FPTR22:
10680 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10681 if (fix->fx_offset != 0)
10682 as_bad_where (fix->fx_file, fix->fx_line,
10683 "No addend allowed in @fptr() relocation");
10691 fix_insn (fix, odesc, value)
10693 const struct ia64_operand *odesc;
10696 bfd_vma insn[3], t0, t1, control_bits;
10701 slot = fix->fx_where & 0x3;
10702 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10704 /* Bundles are always in little-endian byte order */
10705 t0 = bfd_getl64 (fixpos);
10706 t1 = bfd_getl64 (fixpos + 8);
10707 control_bits = t0 & 0x1f;
10708 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10709 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10710 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10713 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10715 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10716 insn[2] |= (((value & 0x7f) << 13)
10717 | (((value >> 7) & 0x1ff) << 27)
10718 | (((value >> 16) & 0x1f) << 22)
10719 | (((value >> 21) & 0x1) << 21)
10720 | (((value >> 63) & 0x1) << 36));
10722 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10724 if (value & ~0x3fffffffffffffffULL)
10725 err = "integer operand out of range";
10726 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10727 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10729 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10732 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10733 insn[2] |= ((((value >> 59) & 0x1) << 36)
10734 | (((value >> 0) & 0xfffff) << 13));
10737 err = (*odesc->insert) (odesc, value, insn + slot);
10740 as_bad_where (fix->fx_file, fix->fx_line, err);
10742 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10743 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10744 number_to_chars_littleendian (fixpos + 0, t0, 8);
10745 number_to_chars_littleendian (fixpos + 8, t1, 8);
10748 /* Attempt to simplify or even eliminate a fixup. The return value is
10749 ignored; perhaps it was once meaningful, but now it is historical.
10750 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10752 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10756 md_apply_fix3 (fix, valP, seg)
10759 segT seg ATTRIBUTE_UNUSED;
10762 valueT value = *valP;
10764 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10768 switch (fix->fx_r_type)
10770 case BFD_RELOC_IA64_DIR32MSB:
10771 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10774 case BFD_RELOC_IA64_DIR32LSB:
10775 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10778 case BFD_RELOC_IA64_DIR64MSB:
10779 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10782 case BFD_RELOC_IA64_DIR64LSB:
10783 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10792 switch (fix->fx_r_type)
10794 case BFD_RELOC_UNUSED:
10795 /* This must be a TAG13 or TAG13b operand. There are no external
10796 relocs defined for them, so we must give an error. */
10797 as_bad_where (fix->fx_file, fix->fx_line,
10798 "%s must have a constant value",
10799 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10803 case BFD_RELOC_IA64_TPREL14:
10804 case BFD_RELOC_IA64_TPREL22:
10805 case BFD_RELOC_IA64_TPREL64I:
10806 case BFD_RELOC_IA64_LTOFF_TPREL22:
10807 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10808 case BFD_RELOC_IA64_DTPREL14:
10809 case BFD_RELOC_IA64_DTPREL22:
10810 case BFD_RELOC_IA64_DTPREL64I:
10811 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10812 S_SET_THREAD_LOCAL (fix->fx_addsy);
10819 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10821 if (fix->tc_fix_data.bigendian)
10822 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10824 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10829 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10834 /* Generate the BFD reloc to be stuck in the object file from the
10835 fixup used internally in the assembler. */
10838 tc_gen_reloc (sec, fixp)
10839 asection *sec ATTRIBUTE_UNUSED;
10844 reloc = xmalloc (sizeof (*reloc));
10845 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10846 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10847 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10848 reloc->addend = fixp->fx_offset;
10849 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10853 as_bad_where (fixp->fx_file, fixp->fx_line,
10854 "Cannot represent %s relocation in object file",
10855 bfd_get_reloc_code_name (fixp->fx_r_type));
10860 /* Turn a string in input_line_pointer into a floating point constant
10861 of type TYPE, and store the appropriate bytes in *LIT. The number
10862 of LITTLENUMS emitted is stored in *SIZE. An error message is
10863 returned, or NULL on OK. */
10865 #define MAX_LITTLENUMS 5
10868 md_atof (type, lit, size)
10873 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10903 return "Bad call to MD_ATOF()";
10905 t = atof_ieee (input_line_pointer, type, words);
10907 input_line_pointer = t;
10909 (*ia64_float_to_chars) (lit, words, prec);
10913 /* It is 10 byte floating point with 6 byte padding. */
10914 memset (&lit [10], 0, 6);
10915 *size = 8 * sizeof (LITTLENUM_TYPE);
10918 *size = prec * sizeof (LITTLENUM_TYPE);
10923 /* Handle ia64 specific semantics of the align directive. */
10926 ia64_md_do_align (n, fill, len, max)
10927 int n ATTRIBUTE_UNUSED;
10928 const char *fill ATTRIBUTE_UNUSED;
10929 int len ATTRIBUTE_UNUSED;
10930 int max ATTRIBUTE_UNUSED;
10932 if (subseg_text_p (now_seg))
10933 ia64_flush_insns ();
10936 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10937 of an rs_align_code fragment. */
10940 ia64_handle_align (fragp)
10943 /* Use mfi bundle of nops with no stop bits. */
10944 static const unsigned char le_nop[]
10945 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10946 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10947 static const unsigned char le_nop_stop[]
10948 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10949 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10953 const unsigned char *nop;
10955 if (fragp->fr_type != rs_align_code)
10958 /* Check if this frag has to end with a stop bit. */
10959 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10961 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10962 p = fragp->fr_literal + fragp->fr_fix;
10964 /* If no paddings are needed, we check if we need a stop bit. */
10965 if (!bytes && fragp->tc_frag_data)
10967 if (fragp->fr_fix < 16)
10969 /* FIXME: It won't work with
10971 alloc r32=ar.pfs,1,2,4,0
10975 as_bad_where (fragp->fr_file, fragp->fr_line,
10976 _("Can't add stop bit to mark end of instruction group"));
10979 /* Bundles are always in little-endian byte order. Make sure
10980 the previous bundle has the stop bit. */
10984 /* Make sure we are on a 16-byte boundary, in case someone has been
10985 putting data into a text section. */
10988 int fix = bytes & 15;
10989 memset (p, 0, fix);
10992 fragp->fr_fix += fix;
10995 /* Instruction bundles are always little-endian. */
10996 memcpy (p, nop, 16);
10997 fragp->fr_var = 16;
11001 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11006 number_to_chars_bigendian (lit, (long) (*words++),
11007 sizeof (LITTLENUM_TYPE));
11008 lit += sizeof (LITTLENUM_TYPE);
11013 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11018 number_to_chars_littleendian (lit, (long) (words[prec]),
11019 sizeof (LITTLENUM_TYPE));
11020 lit += sizeof (LITTLENUM_TYPE);
11025 ia64_elf_section_change_hook (void)
11027 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11028 && elf_linked_to_section (now_seg) == NULL)
11029 elf_linked_to_section (now_seg) = text_section;
11030 dot_byteorder (-1);
11033 /* Check if a label should be made global. */
11035 ia64_check_label (symbolS *label)
11037 if (*input_line_pointer == ':')
11039 S_SET_EXTERNAL (label);
11040 input_line_pointer++;
11044 /* Used to remember where .alias and .secalias directives are seen. We
11045 will rename symbol and section names when we are about to output
11046 the relocatable file. */
11049 char *file; /* The file where the directive is seen. */
11050 unsigned int line; /* The line number the directive is at. */
11051 const char *name; /* The orignale name of the symbol. */
11054 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11055 .secalias. Otherwise, it is .alias. */
11057 dot_alias (int section)
11059 char *name, *alias;
11063 const char *error_string;
11066 struct hash_control *ahash, *nhash;
11069 name = input_line_pointer;
11070 delim = get_symbol_end ();
11071 end_name = input_line_pointer;
11074 if (name == end_name)
11076 as_bad (_("expected symbol name"));
11077 discard_rest_of_line ();
11081 SKIP_WHITESPACE ();
11083 if (*input_line_pointer != ',')
11086 as_bad (_("expected comma after \"%s\""), name);
11088 ignore_rest_of_line ();
11092 input_line_pointer++;
11095 /* We call demand_copy_C_string to check if alias string is valid.
11096 There should be a closing `"' and no `\0' in the string. */
11097 alias = demand_copy_C_string (&len);
11100 ignore_rest_of_line ();
11104 /* Make a copy of name string. */
11105 len = strlen (name) + 1;
11106 obstack_grow (¬es, name, len);
11107 name = obstack_finish (¬es);
11112 ahash = secalias_hash;
11113 nhash = secalias_name_hash;
11118 ahash = alias_hash;
11119 nhash = alias_name_hash;
11122 /* Check if alias has been used before. */
11123 h = (struct alias *) hash_find (ahash, alias);
11126 if (strcmp (h->name, name))
11127 as_bad (_("`%s' is already the alias of %s `%s'"),
11128 alias, kind, h->name);
11132 /* Check if name already has an alias. */
11133 a = (const char *) hash_find (nhash, name);
11136 if (strcmp (a, alias))
11137 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11141 h = (struct alias *) xmalloc (sizeof (struct alias));
11142 as_where (&h->file, &h->line);
11145 error_string = hash_jam (ahash, alias, (PTR) h);
11148 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11149 alias, kind, error_string);
11153 error_string = hash_jam (nhash, name, (PTR) alias);
11156 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11157 alias, kind, error_string);
11159 obstack_free (¬es, name);
11160 obstack_free (¬es, alias);
11163 demand_empty_rest_of_line ();
11166 /* It renames the original symbol name to its alias. */
11168 do_alias (const char *alias, PTR value)
11170 struct alias *h = (struct alias *) value;
11171 symbolS *sym = symbol_find (h->name);
11174 as_warn_where (h->file, h->line,
11175 _("symbol `%s' aliased to `%s' is not used"),
11178 S_SET_NAME (sym, (char *) alias);
11181 /* Called from write_object_file. */
11183 ia64_adjust_symtab (void)
11185 hash_traverse (alias_hash, do_alias);
11188 /* It renames the original section name to its alias. */
11190 do_secalias (const char *alias, PTR value)
11192 struct alias *h = (struct alias *) value;
11193 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11196 as_warn_where (h->file, h->line,
11197 _("section `%s' aliased to `%s' is not used"),
11203 /* Called from write_object_file. */
11205 ia64_frob_file (void)
11207 hash_traverse (secalias_hash, do_secalias);