1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 static char *special_linkonce_name[] =
576 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template[N][N][N];
585 /* Resource dependencies currently in effect */
587 int depind; /* dependency index */
588 const struct ia64_dependency *dependency; /* actual dependency */
589 unsigned specific:1, /* is this a specific bit/regno? */
590 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
591 int index; /* specific regno/bit within dependency */
592 int note; /* optional qualifying note (0 if none) */
596 int insn_srlz; /* current insn serialization state */
597 int data_srlz; /* current data serialization state */
598 int qp_regno; /* qualifying predicate for this usage */
599 char *file; /* what file marked this dependency */
600 unsigned int line; /* what line marked this dependency */
601 struct mem_offset mem_offset; /* optional memory offset hint */
602 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
603 int path; /* corresponding code entry index */
605 static int regdepslen = 0;
606 static int regdepstotlen = 0;
607 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex {
616 } *qp_mutexes = NULL; /* QP mutex bitmasks */
617 static int qp_mutexeslen = 0;
618 static int qp_mutexestotlen = 0;
619 static valueT qp_safe_across_calls = 0;
621 /* Current state of PR implications */
622 static struct qp_imply {
625 unsigned p2_branched:1;
627 } *qp_implies = NULL;
628 static int qp_implieslen = 0;
629 static int qp_impliestotlen = 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values[128] = {{ 1, 0, 0 }};
639 /* These are the routines required to output the various types of
642 /* A slot_number is a frag address plus the slot index (0-2). We use the
643 frag address here so that if there is a section switch in the middle of
644 a function, then instructions emitted to a different section are not
645 counted. Since there may be more than one frag for a function, this
646 means we also need to keep track of which frag this address belongs to
647 so we can compute inter-frag distances. This also nicely solves the
648 problem with nops emitted for align directives, which can't easily be
649 counted, but can easily be derived from frag sizes. */
651 typedef struct unw_rec_list {
653 unsigned long slot_number;
655 unsigned long next_slot_number;
656 fragS *next_slot_frag;
657 struct unw_rec_list *next;
660 #define SLOT_NUM_NOT_SET (unsigned)-1
662 /* Linked list of saved prologue counts. A very poor
663 implementation of a map from label numbers to prologue counts. */
664 typedef struct label_prologue_count
666 struct label_prologue_count *next;
667 unsigned long label_number;
668 unsigned int prologue_count;
669 } label_prologue_count;
673 /* Maintain a list of unwind entries for the current function. */
677 /* Any unwind entires that should be attached to the current slot
678 that an insn is being constructed for. */
679 unw_rec_list *current_entry;
681 /* These are used to create the unwind table entry for this function. */
684 symbolS *info; /* pointer to unwind info */
685 symbolS *personality_routine;
687 subsegT saved_text_subseg;
688 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
690 /* TRUE if processing unwind directives in a prologue region. */
693 unsigned int prologue_count; /* number of .prologues seen so far */
694 /* Prologue counts at previous .label_state directives. */
695 struct label_prologue_count * saved_prologue_counts;
698 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
700 /* Forward declarations: */
701 static int ar_is_in_integer_unit PARAMS ((int regnum));
702 static void set_section PARAMS ((char *name));
703 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
704 unsigned int, unsigned int));
705 static void dot_radix PARAMS ((int));
706 static void dot_special_section PARAMS ((int));
707 static void dot_proc PARAMS ((int));
708 static void dot_fframe PARAMS ((int));
709 static void dot_vframe PARAMS ((int));
710 static void dot_vframesp PARAMS ((int));
711 static void dot_vframepsp PARAMS ((int));
712 static void dot_save PARAMS ((int));
713 static void dot_restore PARAMS ((int));
714 static void dot_restorereg PARAMS ((int));
715 static void dot_restorereg_p PARAMS ((int));
716 static void dot_handlerdata PARAMS ((int));
717 static void dot_unwentry PARAMS ((int));
718 static void dot_altrp PARAMS ((int));
719 static void dot_savemem PARAMS ((int));
720 static void dot_saveg PARAMS ((int));
721 static void dot_savef PARAMS ((int));
722 static void dot_saveb PARAMS ((int));
723 static void dot_savegf PARAMS ((int));
724 static void dot_spill PARAMS ((int));
725 static void dot_spillreg PARAMS ((int));
726 static void dot_spillmem PARAMS ((int));
727 static void dot_spillreg_p PARAMS ((int));
728 static void dot_spillmem_p PARAMS ((int));
729 static void dot_label_state PARAMS ((int));
730 static void dot_copy_state PARAMS ((int));
731 static void dot_unwabi PARAMS ((int));
732 static void dot_personality PARAMS ((int));
733 static void dot_body PARAMS ((int));
734 static void dot_prologue PARAMS ((int));
735 static void dot_endp PARAMS ((int));
736 static void dot_template PARAMS ((int));
737 static void dot_regstk PARAMS ((int));
738 static void dot_rot PARAMS ((int));
739 static void dot_byteorder PARAMS ((int));
740 static void dot_psr PARAMS ((int));
741 static void dot_alias PARAMS ((int));
742 static void dot_ln PARAMS ((int));
743 static char *parse_section_name PARAMS ((void));
744 static void dot_xdata PARAMS ((int));
745 static void stmt_float_cons PARAMS ((int));
746 static void stmt_cons_ua PARAMS ((int));
747 static void dot_xfloat_cons PARAMS ((int));
748 static void dot_xstringer PARAMS ((int));
749 static void dot_xdata_ua PARAMS ((int));
750 static void dot_xfloat_cons_ua PARAMS ((int));
751 static void print_prmask PARAMS ((valueT mask));
752 static void dot_pred_rel PARAMS ((int));
753 static void dot_reg_val PARAMS ((int));
754 static void dot_dv_mode PARAMS ((int));
755 static void dot_entry PARAMS ((int));
756 static void dot_mem_offset PARAMS ((int));
757 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
758 static symbolS *declare_register PARAMS ((const char *name, int regnum));
759 static void declare_register_set PARAMS ((const char *, int, int));
760 static unsigned int operand_width PARAMS ((enum ia64_opnd));
761 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
764 static int parse_operand PARAMS ((expressionS *e));
765 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
766 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
767 static void build_insn PARAMS ((struct slot *, bfd_vma *));
768 static void emit_one_bundle PARAMS ((void));
769 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
770 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
771 bfd_reloc_code_real_type r_type));
772 static void insn_group_break PARAMS ((int, int, int));
773 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
774 struct rsrc *, int depind, int path));
775 static void add_qp_mutex PARAMS((valueT mask));
776 static void add_qp_imply PARAMS((int p1, int p2));
777 static void clear_qp_branch_flag PARAMS((valueT mask));
778 static void clear_qp_mutex PARAMS((valueT mask));
779 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
780 static int has_suffix_p PARAMS((const char *, const char *));
781 static void clear_register_values PARAMS ((void));
782 static void print_dependency PARAMS ((const char *action, int depind));
783 static void instruction_serialization PARAMS ((void));
784 static void data_serialization PARAMS ((void));
785 static void remove_marked_resource PARAMS ((struct rsrc *));
786 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
787 static int is_taken_branch PARAMS ((struct ia64_opcode *));
788 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
789 static int depends_on PARAMS ((int, struct ia64_opcode *));
790 static int specify_resource PARAMS ((const struct ia64_dependency *,
791 struct ia64_opcode *, int, struct rsrc [], int, int));
792 static int check_dv PARAMS((struct ia64_opcode *idesc));
793 static void check_dependencies PARAMS((struct ia64_opcode *));
794 static void mark_resources PARAMS((struct ia64_opcode *));
795 static void update_dependencies PARAMS((struct ia64_opcode *));
796 static void note_register_values PARAMS((struct ia64_opcode *));
797 static int qp_mutex PARAMS ((int, int, int));
798 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
799 static void output_vbyte_mem PARAMS ((int, char *, char *));
800 static void count_output PARAMS ((int, char *, char *));
801 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
802 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
803 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
804 static void output_P1_format PARAMS ((vbyte_func, int));
805 static void output_P2_format PARAMS ((vbyte_func, int, int));
806 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
807 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
808 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
809 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
810 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
811 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
812 static void output_P9_format PARAMS ((vbyte_func, int, int));
813 static void output_P10_format PARAMS ((vbyte_func, int, int));
814 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
817 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818 static char format_ab_reg PARAMS ((int, int));
819 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
821 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
822 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
824 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
825 static unw_rec_list *output_prologue PARAMS ((void));
826 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list *output_body PARAMS ((void));
828 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
829 static unw_rec_list *output_mem_stack_v PARAMS ((void));
830 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
831 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
832 static unw_rec_list *output_rp_when PARAMS ((void));
833 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
834 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_pfs_when PARAMS ((void));
838 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_preds_when PARAMS ((void));
842 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
846 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
849 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
852 static unw_rec_list *output_unat_when PARAMS ((void));
853 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_lc_when PARAMS ((void));
857 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_fpsr_when PARAMS ((void));
861 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
865 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
866 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_bsp_when PARAMS ((void));
870 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bspstore_when PARAMS ((void));
874 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_rnat_when PARAMS ((void));
878 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
883 static unw_rec_list *output_label_state PARAMS ((unsigned long));
884 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
885 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
896 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
897 static int calc_record_size PARAMS ((unw_rec_list *));
898 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
899 static int count_bits PARAMS ((unsigned long));
900 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
901 unsigned long, fragS *));
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static void generate_unwind_image PARAMS ((const char *));
907 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
908 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
909 static void free_saved_prologue_counts PARAMS ((void));
911 /* Build the unwind section name by appending the (possibly stripped)
912 text section NAME to the unwind PREFIX. The resulting string
913 pointer is assigned to RESULT. The string is allocated on the
914 stack, so this must be a macro... */
915 #define make_unw_section_name(special, text_name, result) \
917 const char *_prefix = special_section_name[special]; \
918 const char *_suffix = text_name; \
919 size_t _prefix_len, _suffix_len; \
921 if (strncmp (text_name, ".gnu.linkonce.t.", \
922 sizeof (".gnu.linkonce.t.") - 1) == 0) \
924 _prefix = special_linkonce_name[special - SPECIAL_SECTION_UNWIND]; \
925 _suffix += sizeof (".gnu.linkonce.t.") - 1; \
927 _prefix_len = strlen (_prefix), _suffix_len = strlen (_suffix); \
928 _result = alloca (_prefix_len + _suffix_len + 1); \
929 memcpy (_result, _prefix, _prefix_len); \
930 memcpy (_result + _prefix_len, _suffix, _suffix_len); \
931 _result[_prefix_len + _suffix_len] = '\0'; \
936 /* Determine if application register REGNUM resides in the integer
937 unit (as opposed to the memory unit). */
939 ar_is_in_integer_unit (reg)
944 return (reg == 64 /* pfs */
945 || reg == 65 /* lc */
946 || reg == 66 /* ec */
947 /* ??? ias accepts and puts these in the integer unit. */
948 || (reg >= 112 && reg <= 127));
951 /* Switch to section NAME and create section if necessary. It's
952 rather ugly that we have to manipulate input_line_pointer but I
953 don't see any other way to accomplish the same thing without
954 changing obj-elf.c (which may be the Right Thing, in the end). */
959 char *saved_input_line_pointer;
961 saved_input_line_pointer = input_line_pointer;
962 input_line_pointer = name;
964 input_line_pointer = saved_input_line_pointer;
967 /* Map 's' to SHF_IA_64_SHORT. */
970 ia64_elf_section_letter (letter, ptr_msg)
975 return SHF_IA_64_SHORT;
976 else if (letter == 'o')
977 return SHF_LINK_ORDER;
979 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
983 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
986 ia64_elf_section_flags (flags, attr, type)
988 int attr, type ATTRIBUTE_UNUSED;
990 if (attr & SHF_IA_64_SHORT)
991 flags |= SEC_SMALL_DATA;
996 ia64_elf_section_type (str, len)
1000 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1002 if (STREQ (ELF_STRING_ia64_unwind_info))
1003 return SHT_PROGBITS;
1005 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1006 return SHT_PROGBITS;
1008 if (STREQ (ELF_STRING_ia64_unwind))
1009 return SHT_IA_64_UNWIND;
1011 if (STREQ (ELF_STRING_ia64_unwind_once))
1012 return SHT_IA_64_UNWIND;
1014 if (STREQ ("unwind"))
1015 return SHT_IA_64_UNWIND;
1017 if (STREQ ("init_array"))
1018 return SHT_INIT_ARRAY;
1020 if (STREQ ("fini_array"))
1021 return SHT_FINI_ARRAY;
1028 set_regstack (ins, locs, outs, rots)
1029 unsigned int ins, locs, outs, rots;
1031 /* Size of frame. */
1034 sof = ins + locs + outs;
1037 as_bad ("Size of frame exceeds maximum of 96 registers");
1042 as_warn ("Size of rotating registers exceeds frame size");
1045 md.in.base = REG_GR + 32;
1046 md.loc.base = md.in.base + ins;
1047 md.out.base = md.loc.base + locs;
1049 md.in.num_regs = ins;
1050 md.loc.num_regs = locs;
1051 md.out.num_regs = outs;
1052 md.rot.num_regs = rots;
1059 struct label_fix *lfix;
1061 subsegT saved_subseg;
1064 if (!md.last_text_seg)
1067 saved_seg = now_seg;
1068 saved_subseg = now_subseg;
1070 subseg_set (md.last_text_seg, 0);
1072 while (md.num_slots_in_use > 0)
1073 emit_one_bundle (); /* force out queued instructions */
1075 /* In case there are labels following the last instruction, resolve
1077 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1079 S_SET_VALUE (lfix->sym, frag_now_fix ());
1080 symbol_set_frag (lfix->sym, frag_now);
1082 CURR_SLOT.label_fixups = 0;
1083 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1085 S_SET_VALUE (lfix->sym, frag_now_fix ());
1086 symbol_set_frag (lfix->sym, frag_now);
1088 CURR_SLOT.tag_fixups = 0;
1090 /* In case there are unwind directives following the last instruction,
1091 resolve those now. We only handle body and prologue directives here.
1092 Give an error for others. */
1093 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1095 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
1096 || ptr->r.type == body)
1098 ptr->slot_number = (unsigned long) frag_more (0);
1099 ptr->slot_frag = frag_now;
1102 as_bad (_("Unwind directive not followed by an instruction."));
1104 unwind.current_entry = NULL;
1106 subseg_set (saved_seg, saved_subseg);
1108 if (md.qp.X_op == O_register)
1109 as_bad ("qualifying predicate not followed by instruction");
1113 ia64_do_align (nbytes)
1116 char *saved_input_line_pointer = input_line_pointer;
1118 input_line_pointer = "";
1119 s_align_bytes (nbytes);
1120 input_line_pointer = saved_input_line_pointer;
1124 ia64_cons_align (nbytes)
1129 char *saved_input_line_pointer = input_line_pointer;
1130 input_line_pointer = "";
1131 s_align_bytes (nbytes);
1132 input_line_pointer = saved_input_line_pointer;
1136 /* Output COUNT bytes to a memory location. */
1137 static unsigned char *vbyte_mem_ptr = NULL;
1140 output_vbyte_mem (count, ptr, comment)
1143 char *comment ATTRIBUTE_UNUSED;
1146 if (vbyte_mem_ptr == NULL)
1151 for (x = 0; x < count; x++)
1152 *(vbyte_mem_ptr++) = ptr[x];
1155 /* Count the number of bytes required for records. */
1156 static int vbyte_count = 0;
1158 count_output (count, ptr, comment)
1160 char *ptr ATTRIBUTE_UNUSED;
1161 char *comment ATTRIBUTE_UNUSED;
1163 vbyte_count += count;
1167 output_R1_format (f, rtype, rlen)
1169 unw_record_type rtype;
1176 output_R3_format (f, rtype, rlen);
1182 else if (rtype != prologue)
1183 as_bad ("record type is not valid");
1185 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1186 (*f) (1, &byte, NULL);
1190 output_R2_format (f, mask, grsave, rlen)
1197 mask = (mask & 0x0f);
1198 grsave = (grsave & 0x7f);
1200 bytes[0] = (UNW_R2 | (mask >> 1));
1201 bytes[1] = (((mask & 0x01) << 7) | grsave);
1202 count += output_leb128 (bytes + 2, rlen, 0);
1203 (*f) (count, bytes, NULL);
1207 output_R3_format (f, rtype, rlen)
1209 unw_record_type rtype;
1216 output_R1_format (f, rtype, rlen);
1222 else if (rtype != prologue)
1223 as_bad ("record type is not valid");
1224 bytes[0] = (UNW_R3 | r);
1225 count = output_leb128 (bytes + 1, rlen, 0);
1226 (*f) (count + 1, bytes, NULL);
1230 output_P1_format (f, brmask)
1235 byte = UNW_P1 | (brmask & 0x1f);
1236 (*f) (1, &byte, NULL);
1240 output_P2_format (f, brmask, gr)
1246 brmask = (brmask & 0x1f);
1247 bytes[0] = UNW_P2 | (brmask >> 1);
1248 bytes[1] = (((brmask & 1) << 7) | gr);
1249 (*f) (2, bytes, NULL);
1253 output_P3_format (f, rtype, reg)
1255 unw_record_type rtype;
1300 as_bad ("Invalid record type for P3 format.");
1302 bytes[0] = (UNW_P3 | (r >> 1));
1303 bytes[1] = (((r & 1) << 7) | reg);
1304 (*f) (2, bytes, NULL);
1308 output_P4_format (f, imask, imask_size)
1310 unsigned char *imask;
1311 unsigned long imask_size;
1314 (*f) (imask_size, imask, NULL);
1318 output_P5_format (f, grmask, frmask)
1321 unsigned long frmask;
1324 grmask = (grmask & 0x0f);
1327 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1328 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1329 bytes[3] = (frmask & 0x000000ff);
1330 (*f) (4, bytes, NULL);
1334 output_P6_format (f, rtype, rmask)
1336 unw_record_type rtype;
1342 if (rtype == gr_mem)
1344 else if (rtype != fr_mem)
1345 as_bad ("Invalid record type for format P6");
1346 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1347 (*f) (1, &byte, NULL);
1351 output_P7_format (f, rtype, w1, w2)
1353 unw_record_type rtype;
1360 count += output_leb128 (bytes + 1, w1, 0);
1365 count += output_leb128 (bytes + count, w2 >> 4, 0);
1415 bytes[0] = (UNW_P7 | r);
1416 (*f) (count, bytes, NULL);
1420 output_P8_format (f, rtype, t)
1422 unw_record_type rtype;
1461 case bspstore_psprel:
1464 case bspstore_sprel:
1476 case priunat_when_gr:
1479 case priunat_psprel:
1485 case priunat_when_mem:
1492 count += output_leb128 (bytes + 2, t, 0);
1493 (*f) (count, bytes, NULL);
1497 output_P9_format (f, grmask, gr)
1504 bytes[1] = (grmask & 0x0f);
1505 bytes[2] = (gr & 0x7f);
1506 (*f) (3, bytes, NULL);
1510 output_P10_format (f, abi, context)
1517 bytes[1] = (abi & 0xff);
1518 bytes[2] = (context & 0xff);
1519 (*f) (3, bytes, NULL);
1523 output_B1_format (f, rtype, label)
1525 unw_record_type rtype;
1526 unsigned long label;
1532 output_B4_format (f, rtype, label);
1535 if (rtype == copy_state)
1537 else if (rtype != label_state)
1538 as_bad ("Invalid record type for format B1");
1540 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1541 (*f) (1, &byte, NULL);
1545 output_B2_format (f, ecount, t)
1547 unsigned long ecount;
1554 output_B3_format (f, ecount, t);
1557 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1558 count += output_leb128 (bytes + 1, t, 0);
1559 (*f) (count, bytes, NULL);
1563 output_B3_format (f, ecount, t)
1565 unsigned long ecount;
1572 output_B2_format (f, ecount, t);
1576 count += output_leb128 (bytes + 1, t, 0);
1577 count += output_leb128 (bytes + count, ecount, 0);
1578 (*f) (count, bytes, NULL);
1582 output_B4_format (f, rtype, label)
1584 unw_record_type rtype;
1585 unsigned long label;
1592 output_B1_format (f, rtype, label);
1596 if (rtype == copy_state)
1598 else if (rtype != label_state)
1599 as_bad ("Invalid record type for format B1");
1601 bytes[0] = (UNW_B4 | (r << 3));
1602 count += output_leb128 (bytes + 1, label, 0);
1603 (*f) (count, bytes, NULL);
1607 format_ab_reg (ab, reg)
1614 ret = (ab << 5) | reg;
1619 output_X1_format (f, rtype, ab, reg, t, w1)
1621 unw_record_type rtype;
1631 if (rtype == spill_sprel)
1633 else if (rtype != spill_psprel)
1634 as_bad ("Invalid record type for format X1");
1635 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1636 count += output_leb128 (bytes + 2, t, 0);
1637 count += output_leb128 (bytes + count, w1, 0);
1638 (*f) (count, bytes, NULL);
1642 output_X2_format (f, ab, reg, x, y, treg, t)
1651 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1652 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1653 count += output_leb128 (bytes + 3, t, 0);
1654 (*f) (count, bytes, NULL);
1658 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1660 unw_record_type rtype;
1671 if (rtype == spill_sprel_p)
1673 else if (rtype != spill_psprel_p)
1674 as_bad ("Invalid record type for format X3");
1675 bytes[1] = ((r << 7) | (qp & 0x3f));
1676 bytes[2] = format_ab_reg (ab, reg);
1677 count += output_leb128 (bytes + 3, t, 0);
1678 count += output_leb128 (bytes + count, w1, 0);
1679 (*f) (count, bytes, NULL);
1683 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1693 bytes[1] = (qp & 0x3f);
1694 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1695 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1696 count += output_leb128 (bytes + 4, t, 0);
1697 (*f) (count, bytes, NULL);
1700 /* This function allocates a record list structure, and initializes fields. */
1702 static unw_rec_list *
1703 alloc_record (unw_record_type t)
1706 ptr = xmalloc (sizeof (*ptr));
1708 ptr->slot_number = SLOT_NUM_NOT_SET;
1710 ptr->next_slot_number = 0;
1711 ptr->next_slot_frag = 0;
1715 static unw_rec_list *
1718 unw_rec_list *ptr = alloc_record (prologue);
1719 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1723 static unw_rec_list *
1724 output_prologue_gr (saved_mask, reg)
1725 unsigned int saved_mask;
1728 unw_rec_list *ptr = alloc_record (prologue_gr);
1729 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1730 ptr->r.record.r.grmask = saved_mask;
1731 ptr->r.record.r.grsave = reg;
1735 static unw_rec_list *
1738 unw_rec_list *ptr = alloc_record (body);
1742 static unw_rec_list *
1743 output_mem_stack_f (size)
1746 unw_rec_list *ptr = alloc_record (mem_stack_f);
1747 ptr->r.record.p.size = size;
1751 static unw_rec_list *
1752 output_mem_stack_v ()
1754 unw_rec_list *ptr = alloc_record (mem_stack_v);
1758 static unw_rec_list *
1762 unw_rec_list *ptr = alloc_record (psp_gr);
1763 ptr->r.record.p.gr = gr;
1767 static unw_rec_list *
1768 output_psp_sprel (offset)
1769 unsigned int offset;
1771 unw_rec_list *ptr = alloc_record (psp_sprel);
1772 ptr->r.record.p.spoff = offset / 4;
1776 static unw_rec_list *
1779 unw_rec_list *ptr = alloc_record (rp_when);
1783 static unw_rec_list *
1787 unw_rec_list *ptr = alloc_record (rp_gr);
1788 ptr->r.record.p.gr = gr;
1792 static unw_rec_list *
1796 unw_rec_list *ptr = alloc_record (rp_br);
1797 ptr->r.record.p.br = br;
1801 static unw_rec_list *
1802 output_rp_psprel (offset)
1803 unsigned int offset;
1805 unw_rec_list *ptr = alloc_record (rp_psprel);
1806 ptr->r.record.p.pspoff = offset / 4;
1810 static unw_rec_list *
1811 output_rp_sprel (offset)
1812 unsigned int offset;
1814 unw_rec_list *ptr = alloc_record (rp_sprel);
1815 ptr->r.record.p.spoff = offset / 4;
1819 static unw_rec_list *
1822 unw_rec_list *ptr = alloc_record (pfs_when);
1826 static unw_rec_list *
1830 unw_rec_list *ptr = alloc_record (pfs_gr);
1831 ptr->r.record.p.gr = gr;
1835 static unw_rec_list *
1836 output_pfs_psprel (offset)
1837 unsigned int offset;
1839 unw_rec_list *ptr = alloc_record (pfs_psprel);
1840 ptr->r.record.p.pspoff = offset / 4;
1844 static unw_rec_list *
1845 output_pfs_sprel (offset)
1846 unsigned int offset;
1848 unw_rec_list *ptr = alloc_record (pfs_sprel);
1849 ptr->r.record.p.spoff = offset / 4;
1853 static unw_rec_list *
1854 output_preds_when ()
1856 unw_rec_list *ptr = alloc_record (preds_when);
1860 static unw_rec_list *
1861 output_preds_gr (gr)
1864 unw_rec_list *ptr = alloc_record (preds_gr);
1865 ptr->r.record.p.gr = gr;
1869 static unw_rec_list *
1870 output_preds_psprel (offset)
1871 unsigned int offset;
1873 unw_rec_list *ptr = alloc_record (preds_psprel);
1874 ptr->r.record.p.pspoff = offset / 4;
1878 static unw_rec_list *
1879 output_preds_sprel (offset)
1880 unsigned int offset;
1882 unw_rec_list *ptr = alloc_record (preds_sprel);
1883 ptr->r.record.p.spoff = offset / 4;
1887 static unw_rec_list *
1888 output_fr_mem (mask)
1891 unw_rec_list *ptr = alloc_record (fr_mem);
1892 ptr->r.record.p.rmask = mask;
1896 static unw_rec_list *
1897 output_frgr_mem (gr_mask, fr_mask)
1898 unsigned int gr_mask;
1899 unsigned int fr_mask;
1901 unw_rec_list *ptr = alloc_record (frgr_mem);
1902 ptr->r.record.p.grmask = gr_mask;
1903 ptr->r.record.p.frmask = fr_mask;
1907 static unw_rec_list *
1908 output_gr_gr (mask, reg)
1912 unw_rec_list *ptr = alloc_record (gr_gr);
1913 ptr->r.record.p.grmask = mask;
1914 ptr->r.record.p.gr = reg;
1918 static unw_rec_list *
1919 output_gr_mem (mask)
1922 unw_rec_list *ptr = alloc_record (gr_mem);
1923 ptr->r.record.p.rmask = mask;
1927 static unw_rec_list *
1928 output_br_mem (unsigned int mask)
1930 unw_rec_list *ptr = alloc_record (br_mem);
1931 ptr->r.record.p.brmask = mask;
1935 static unw_rec_list *
1936 output_br_gr (save_mask, reg)
1937 unsigned int save_mask;
1940 unw_rec_list *ptr = alloc_record (br_gr);
1941 ptr->r.record.p.brmask = save_mask;
1942 ptr->r.record.p.gr = reg;
1946 static unw_rec_list *
1947 output_spill_base (offset)
1948 unsigned int offset;
1950 unw_rec_list *ptr = alloc_record (spill_base);
1951 ptr->r.record.p.pspoff = offset / 4;
1955 static unw_rec_list *
1958 unw_rec_list *ptr = alloc_record (unat_when);
1962 static unw_rec_list *
1966 unw_rec_list *ptr = alloc_record (unat_gr);
1967 ptr->r.record.p.gr = gr;
1971 static unw_rec_list *
1972 output_unat_psprel (offset)
1973 unsigned int offset;
1975 unw_rec_list *ptr = alloc_record (unat_psprel);
1976 ptr->r.record.p.pspoff = offset / 4;
1980 static unw_rec_list *
1981 output_unat_sprel (offset)
1982 unsigned int offset;
1984 unw_rec_list *ptr = alloc_record (unat_sprel);
1985 ptr->r.record.p.spoff = offset / 4;
1989 static unw_rec_list *
1992 unw_rec_list *ptr = alloc_record (lc_when);
1996 static unw_rec_list *
2000 unw_rec_list *ptr = alloc_record (lc_gr);
2001 ptr->r.record.p.gr = gr;
2005 static unw_rec_list *
2006 output_lc_psprel (offset)
2007 unsigned int offset;
2009 unw_rec_list *ptr = alloc_record (lc_psprel);
2010 ptr->r.record.p.pspoff = offset / 4;
2014 static unw_rec_list *
2015 output_lc_sprel (offset)
2016 unsigned int offset;
2018 unw_rec_list *ptr = alloc_record (lc_sprel);
2019 ptr->r.record.p.spoff = offset / 4;
2023 static unw_rec_list *
2026 unw_rec_list *ptr = alloc_record (fpsr_when);
2030 static unw_rec_list *
2034 unw_rec_list *ptr = alloc_record (fpsr_gr);
2035 ptr->r.record.p.gr = gr;
2039 static unw_rec_list *
2040 output_fpsr_psprel (offset)
2041 unsigned int offset;
2043 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2044 ptr->r.record.p.pspoff = offset / 4;
2048 static unw_rec_list *
2049 output_fpsr_sprel (offset)
2050 unsigned int offset;
2052 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2053 ptr->r.record.p.spoff = offset / 4;
2057 static unw_rec_list *
2058 output_priunat_when_gr ()
2060 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2064 static unw_rec_list *
2065 output_priunat_when_mem ()
2067 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2071 static unw_rec_list *
2072 output_priunat_gr (gr)
2075 unw_rec_list *ptr = alloc_record (priunat_gr);
2076 ptr->r.record.p.gr = gr;
2080 static unw_rec_list *
2081 output_priunat_psprel (offset)
2082 unsigned int offset;
2084 unw_rec_list *ptr = alloc_record (priunat_psprel);
2085 ptr->r.record.p.pspoff = offset / 4;
2089 static unw_rec_list *
2090 output_priunat_sprel (offset)
2091 unsigned int offset;
2093 unw_rec_list *ptr = alloc_record (priunat_sprel);
2094 ptr->r.record.p.spoff = offset / 4;
2098 static unw_rec_list *
2101 unw_rec_list *ptr = alloc_record (bsp_when);
2105 static unw_rec_list *
2109 unw_rec_list *ptr = alloc_record (bsp_gr);
2110 ptr->r.record.p.gr = gr;
2114 static unw_rec_list *
2115 output_bsp_psprel (offset)
2116 unsigned int offset;
2118 unw_rec_list *ptr = alloc_record (bsp_psprel);
2119 ptr->r.record.p.pspoff = offset / 4;
2123 static unw_rec_list *
2124 output_bsp_sprel (offset)
2125 unsigned int offset;
2127 unw_rec_list *ptr = alloc_record (bsp_sprel);
2128 ptr->r.record.p.spoff = offset / 4;
2132 static unw_rec_list *
2133 output_bspstore_when ()
2135 unw_rec_list *ptr = alloc_record (bspstore_when);
2139 static unw_rec_list *
2140 output_bspstore_gr (gr)
2143 unw_rec_list *ptr = alloc_record (bspstore_gr);
2144 ptr->r.record.p.gr = gr;
2148 static unw_rec_list *
2149 output_bspstore_psprel (offset)
2150 unsigned int offset;
2152 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2153 ptr->r.record.p.pspoff = offset / 4;
2157 static unw_rec_list *
2158 output_bspstore_sprel (offset)
2159 unsigned int offset;
2161 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2162 ptr->r.record.p.spoff = offset / 4;
2166 static unw_rec_list *
2169 unw_rec_list *ptr = alloc_record (rnat_when);
2173 static unw_rec_list *
2177 unw_rec_list *ptr = alloc_record (rnat_gr);
2178 ptr->r.record.p.gr = gr;
2182 static unw_rec_list *
2183 output_rnat_psprel (offset)
2184 unsigned int offset;
2186 unw_rec_list *ptr = alloc_record (rnat_psprel);
2187 ptr->r.record.p.pspoff = offset / 4;
2191 static unw_rec_list *
2192 output_rnat_sprel (offset)
2193 unsigned int offset;
2195 unw_rec_list *ptr = alloc_record (rnat_sprel);
2196 ptr->r.record.p.spoff = offset / 4;
2200 static unw_rec_list *
2201 output_unwabi (abi, context)
2203 unsigned long context;
2205 unw_rec_list *ptr = alloc_record (unwabi);
2206 ptr->r.record.p.abi = abi;
2207 ptr->r.record.p.context = context;
2211 static unw_rec_list *
2212 output_epilogue (unsigned long ecount)
2214 unw_rec_list *ptr = alloc_record (epilogue);
2215 ptr->r.record.b.ecount = ecount;
2219 static unw_rec_list *
2220 output_label_state (unsigned long label)
2222 unw_rec_list *ptr = alloc_record (label_state);
2223 ptr->r.record.b.label = label;
2227 static unw_rec_list *
2228 output_copy_state (unsigned long label)
2230 unw_rec_list *ptr = alloc_record (copy_state);
2231 ptr->r.record.b.label = label;
2235 static unw_rec_list *
2236 output_spill_psprel (ab, reg, offset)
2239 unsigned int offset;
2241 unw_rec_list *ptr = alloc_record (spill_psprel);
2242 ptr->r.record.x.ab = ab;
2243 ptr->r.record.x.reg = reg;
2244 ptr->r.record.x.pspoff = offset / 4;
2248 static unw_rec_list *
2249 output_spill_sprel (ab, reg, offset)
2252 unsigned int offset;
2254 unw_rec_list *ptr = alloc_record (spill_sprel);
2255 ptr->r.record.x.ab = ab;
2256 ptr->r.record.x.reg = reg;
2257 ptr->r.record.x.spoff = offset / 4;
2261 static unw_rec_list *
2262 output_spill_psprel_p (ab, reg, offset, predicate)
2265 unsigned int offset;
2266 unsigned int predicate;
2268 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2269 ptr->r.record.x.ab = ab;
2270 ptr->r.record.x.reg = reg;
2271 ptr->r.record.x.pspoff = offset / 4;
2272 ptr->r.record.x.qp = predicate;
2276 static unw_rec_list *
2277 output_spill_sprel_p (ab, reg, offset, predicate)
2280 unsigned int offset;
2281 unsigned int predicate;
2283 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2284 ptr->r.record.x.ab = ab;
2285 ptr->r.record.x.reg = reg;
2286 ptr->r.record.x.spoff = offset / 4;
2287 ptr->r.record.x.qp = predicate;
2291 static unw_rec_list *
2292 output_spill_reg (ab, reg, targ_reg, xy)
2295 unsigned int targ_reg;
2298 unw_rec_list *ptr = alloc_record (spill_reg);
2299 ptr->r.record.x.ab = ab;
2300 ptr->r.record.x.reg = reg;
2301 ptr->r.record.x.treg = targ_reg;
2302 ptr->r.record.x.xy = xy;
2306 static unw_rec_list *
2307 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2310 unsigned int targ_reg;
2312 unsigned int predicate;
2314 unw_rec_list *ptr = alloc_record (spill_reg_p);
2315 ptr->r.record.x.ab = ab;
2316 ptr->r.record.x.reg = reg;
2317 ptr->r.record.x.treg = targ_reg;
2318 ptr->r.record.x.xy = xy;
2319 ptr->r.record.x.qp = predicate;
2323 /* Given a unw_rec_list process the correct format with the
2324 specified function. */
2327 process_one_record (ptr, f)
2331 unsigned long fr_mask, gr_mask;
2333 switch (ptr->r.type)
2339 /* These are taken care of by prologue/prologue_gr. */
2344 if (ptr->r.type == prologue_gr)
2345 output_R2_format (f, ptr->r.record.r.grmask,
2346 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2348 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2350 /* Output descriptor(s) for union of register spills (if any). */
2351 gr_mask = ptr->r.record.r.mask.gr_mem;
2352 fr_mask = ptr->r.record.r.mask.fr_mem;
2355 if ((fr_mask & ~0xfUL) == 0)
2356 output_P6_format (f, fr_mem, fr_mask);
2359 output_P5_format (f, gr_mask, fr_mask);
2364 output_P6_format (f, gr_mem, gr_mask);
2365 if (ptr->r.record.r.mask.br_mem)
2366 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2368 /* output imask descriptor if necessary: */
2369 if (ptr->r.record.r.mask.i)
2370 output_P4_format (f, ptr->r.record.r.mask.i,
2371 ptr->r.record.r.imask_size);
2375 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2379 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2380 ptr->r.record.p.size);
2393 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2396 output_P3_format (f, rp_br, ptr->r.record.p.br);
2399 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2407 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2416 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2426 case bspstore_sprel:
2428 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2431 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2434 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2437 as_bad ("spill_mask record unimplemented.");
2439 case priunat_when_gr:
2440 case priunat_when_mem:
2444 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2446 case priunat_psprel:
2448 case bspstore_psprel:
2450 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2453 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2456 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2460 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2463 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2464 ptr->r.record.x.reg, ptr->r.record.x.t,
2465 ptr->r.record.x.pspoff);
2468 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2469 ptr->r.record.x.reg, ptr->r.record.x.t,
2470 ptr->r.record.x.spoff);
2473 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2474 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2475 ptr->r.record.x.treg, ptr->r.record.x.t);
2477 case spill_psprel_p:
2478 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2479 ptr->r.record.x.ab, ptr->r.record.x.reg,
2480 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2483 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2484 ptr->r.record.x.ab, ptr->r.record.x.reg,
2485 ptr->r.record.x.t, ptr->r.record.x.spoff);
2488 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2489 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2490 ptr->r.record.x.xy, ptr->r.record.x.treg,
2494 as_bad ("record_type_not_valid");
2499 /* Given a unw_rec_list list, process all the records with
2500 the specified function. */
2502 process_unw_records (list, f)
2507 for (ptr = list; ptr; ptr = ptr->next)
2508 process_one_record (ptr, f);
2511 /* Determine the size of a record list in bytes. */
2513 calc_record_size (list)
2517 process_unw_records (list, count_output);
2521 /* Update IMASK bitmask to reflect the fact that one or more registers
2522 of type TYPE are saved starting at instruction with index T. If N
2523 bits are set in REGMASK, it is assumed that instructions T through
2524 T+N-1 save these registers.
2528 1: instruction saves next fp reg
2529 2: instruction saves next general reg
2530 3: instruction saves next branch reg */
2532 set_imask (region, regmask, t, type)
2533 unw_rec_list *region;
2534 unsigned long regmask;
2538 unsigned char *imask;
2539 unsigned long imask_size;
2543 imask = region->r.record.r.mask.i;
2544 imask_size = region->r.record.r.imask_size;
2547 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2548 imask = xmalloc (imask_size);
2549 memset (imask, 0, imask_size);
2551 region->r.record.r.imask_size = imask_size;
2552 region->r.record.r.mask.i = imask;
2556 pos = 2 * (3 - t % 4);
2559 if (i >= imask_size)
2561 as_bad ("Ignoring attempt to spill beyond end of region");
2565 imask[i] |= (type & 0x3) << pos;
2567 regmask &= (regmask - 1);
2578 count_bits (unsigned long mask)
2590 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2591 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2592 containing FIRST_ADDR. */
2595 slot_index (slot_addr, slot_frag, first_addr, first_frag)
2596 unsigned long slot_addr;
2598 unsigned long first_addr;
2601 unsigned long index = 0;
2603 /* First time we are called, the initial address and frag are invalid. */
2604 if (first_addr == 0)
2607 /* If the two addresses are in different frags, then we need to add in
2608 the remaining size of this frag, and then the entire size of intermediate
2610 while (slot_frag != first_frag)
2612 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2616 /* We can get the final addresses only after relaxation is
2618 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2619 index += 3 * ((first_frag->fr_next->fr_address
2620 - first_frag->fr_address
2621 - first_frag->fr_fix) >> 4);
2624 /* We don't know what the final addresses will be. We try our
2625 best to estimate. */
2626 switch (first_frag->fr_type)
2632 as_fatal ("only constant space allocation is supported");
2638 /* Take alignment into account. Assume the worst case
2639 before relaxation. */
2640 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2644 if (first_frag->fr_symbol)
2646 as_fatal ("only constant offsets are supported");
2650 index += 3 * (first_frag->fr_offset >> 4);
2654 /* Add in the full size of the frag converted to instruction slots. */
2655 index += 3 * (first_frag->fr_fix >> 4);
2656 /* Subtract away the initial part before first_addr. */
2657 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2658 + ((first_addr & 0x3) - (start_addr & 0x3)));
2660 /* Move to the beginning of the next frag. */
2661 first_frag = first_frag->fr_next;
2662 first_addr = (unsigned long) &first_frag->fr_literal;
2665 /* Add in the used part of the last frag. */
2666 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2667 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2671 /* Optimize unwind record directives. */
2673 static unw_rec_list *
2674 optimize_unw_records (list)
2680 /* If the only unwind record is ".prologue" or ".prologue" followed
2681 by ".body", then we can optimize the unwind directives away. */
2682 if (list->r.type == prologue
2683 && (list->next == NULL
2684 || (list->next->r.type == body && list->next->next == NULL)))
2690 /* Given a complete record list, process any records which have
2691 unresolved fields, (ie length counts for a prologue). After
2692 this has been run, all necessary information should be available
2693 within each record to generate an image. */
2696 fixup_unw_records (list)
2699 unw_rec_list *ptr, *region = 0;
2700 unsigned long first_addr = 0, rlen = 0, t;
2701 fragS *first_frag = 0;
2703 for (ptr = list; ptr; ptr = ptr->next)
2705 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2706 as_bad (" Insn slot not set in unwind record.");
2707 t = slot_index (ptr->slot_number, ptr->slot_frag,
2708 first_addr, first_frag);
2709 switch (ptr->r.type)
2716 int size, dir_len = 0;
2717 unsigned long last_addr;
2720 first_addr = ptr->slot_number;
2721 first_frag = ptr->slot_frag;
2722 /* Find either the next body/prologue start, or the end of
2723 the list, and determine the size of the region. */
2724 last_addr = list->next_slot_number;
2725 last_frag = list->next_slot_frag;
2726 for (last = ptr->next; last != NULL; last = last->next)
2727 if (last->r.type == prologue || last->r.type == prologue_gr
2728 || last->r.type == body)
2730 last_addr = last->slot_number;
2731 last_frag = last->slot_frag;
2734 else if (!last->next)
2736 /* In the absence of an explicit .body directive,
2737 the prologue ends after the last instruction
2738 covered by an unwind directive. */
2739 if (ptr->r.type != body)
2741 last_addr = last->slot_number;
2742 last_frag = last->slot_frag;
2743 switch (last->r.type)
2746 dir_len = (count_bits (last->r.record.p.frmask)
2747 + count_bits (last->r.record.p.grmask));
2751 dir_len += count_bits (last->r.record.p.rmask);
2755 dir_len += count_bits (last->r.record.p.brmask);
2758 dir_len += count_bits (last->r.record.p.grmask);
2767 size = (slot_index (last_addr, last_frag, first_addr, first_frag)
2769 rlen = ptr->r.record.r.rlen = size;
2770 if (ptr->r.type == body)
2771 /* End of region. */
2778 ptr->r.record.b.t = rlen - 1 - t;
2789 case priunat_when_gr:
2790 case priunat_when_mem:
2794 ptr->r.record.p.t = t;
2802 case spill_psprel_p:
2803 ptr->r.record.x.t = t;
2809 as_bad ("frgr_mem record before region record!\n");
2812 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2813 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2814 set_imask (region, ptr->r.record.p.frmask, t, 1);
2815 set_imask (region, ptr->r.record.p.grmask, t, 2);
2820 as_bad ("fr_mem record before region record!\n");
2823 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2824 set_imask (region, ptr->r.record.p.rmask, t, 1);
2829 as_bad ("gr_mem record before region record!\n");
2832 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2833 set_imask (region, ptr->r.record.p.rmask, t, 2);
2838 as_bad ("br_mem record before region record!\n");
2841 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2842 set_imask (region, ptr->r.record.p.brmask, t, 3);
2848 as_bad ("gr_gr record before region record!\n");
2851 set_imask (region, ptr->r.record.p.grmask, t, 2);
2856 as_bad ("br_gr record before region record!\n");
2859 set_imask (region, ptr->r.record.p.brmask, t, 3);
2868 /* This function converts a rs_machine_dependent variant frag into a
2869 normal fill frag with the unwind image from the the record list. */
2871 ia64_convert_frag (fragS *frag)
2877 list = (unw_rec_list *) frag->fr_opcode;
2878 fixup_unw_records (list);
2880 len = calc_record_size (list);
2881 /* pad to pointer-size boundary. */
2882 pad = len % md.pointer_size;
2884 len += md.pointer_size - pad;
2885 /* Add 8 for the header + a pointer for the personality offset. */
2886 size = len + 8 + md.pointer_size;
2888 /* fr_var carries the max_chars that we created the fragment with.
2889 We must, of course, have allocated enough memory earlier. */
2890 assert (frag->fr_var >= size);
2892 /* Initialize the header area. fr_offset is initialized with
2893 unwind.personality_routine. */
2894 if (frag->fr_offset)
2896 if (md.flags & EF_IA_64_ABI64)
2897 flag_value = (bfd_vma) 3 << 32;
2899 /* 32-bit unwind info block. */
2900 flag_value = (bfd_vma) 0x1003 << 32;
2905 md_number_to_chars (frag->fr_literal,
2906 (((bfd_vma) 1 << 48) /* Version. */
2907 | flag_value /* U & E handler flags. */
2908 | (len / md.pointer_size)), /* Length. */
2911 /* Skip the header. */
2912 vbyte_mem_ptr = frag->fr_literal + 8;
2913 process_unw_records (list, output_vbyte_mem);
2914 frag->fr_fix += size;
2915 frag->fr_type = rs_fill;
2917 frag->fr_offset = 0;
2921 convert_expr_to_ab_reg (e, ab, regp)
2928 if (e->X_op != O_register)
2931 reg = e->X_add_number;
2932 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2935 *regp = reg - REG_GR;
2937 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2938 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2941 *regp = reg - REG_FR;
2943 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2946 *regp = reg - REG_BR;
2953 case REG_PR: *regp = 0; break;
2954 case REG_PSP: *regp = 1; break;
2955 case REG_PRIUNAT: *regp = 2; break;
2956 case REG_BR + 0: *regp = 3; break;
2957 case REG_AR + AR_BSP: *regp = 4; break;
2958 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2959 case REG_AR + AR_RNAT: *regp = 6; break;
2960 case REG_AR + AR_UNAT: *regp = 7; break;
2961 case REG_AR + AR_FPSR: *regp = 8; break;
2962 case REG_AR + AR_PFS: *regp = 9; break;
2963 case REG_AR + AR_LC: *regp = 10; break;
2973 convert_expr_to_xy_reg (e, xy, regp)
2980 if (e->X_op != O_register)
2983 reg = e->X_add_number;
2985 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2988 *regp = reg - REG_GR;
2990 else if (reg >= REG_FR && reg <= (REG_FR + 127))
2993 *regp = reg - REG_FR;
2995 else if (reg >= REG_BR && reg <= (REG_BR + 7))
2998 *regp = reg - REG_BR;
3007 int dummy ATTRIBUTE_UNUSED;
3012 radix = *input_line_pointer++;
3014 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3016 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3017 ignore_rest_of_line ();
3022 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3024 dot_special_section (which)
3027 set_section ((char *) special_section_name[which]);
3031 add_unwind_entry (ptr)
3035 unwind.tail->next = ptr;
3040 /* The current entry can in fact be a chain of unwind entries. */
3041 if (unwind.current_entry == NULL)
3042 unwind.current_entry = ptr;
3047 int dummy ATTRIBUTE_UNUSED;
3053 if (e.X_op != O_constant)
3054 as_bad ("Operand to .fframe must be a constant");
3056 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3061 int dummy ATTRIBUTE_UNUSED;
3067 reg = e.X_add_number - REG_GR;
3068 if (e.X_op == O_register && reg < 128)
3070 add_unwind_entry (output_mem_stack_v ());
3071 if (! (unwind.prologue_mask & 2))
3072 add_unwind_entry (output_psp_gr (reg));
3075 as_bad ("First operand to .vframe must be a general register");
3079 dot_vframesp (dummy)
3080 int dummy ATTRIBUTE_UNUSED;
3085 if (e.X_op == O_constant)
3087 add_unwind_entry (output_mem_stack_v ());
3088 add_unwind_entry (output_psp_sprel (e.X_add_number));
3091 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3095 dot_vframepsp (dummy)
3096 int dummy ATTRIBUTE_UNUSED;
3101 if (e.X_op == O_constant)
3103 add_unwind_entry (output_mem_stack_v ());
3104 add_unwind_entry (output_psp_sprel (e.X_add_number));
3107 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3112 int dummy ATTRIBUTE_UNUSED;
3118 sep = parse_operand (&e1);
3120 as_bad ("No second operand to .save");
3121 sep = parse_operand (&e2);
3123 reg1 = e1.X_add_number;
3124 reg2 = e2.X_add_number - REG_GR;
3126 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3127 if (e1.X_op == O_register)
3129 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3133 case REG_AR + AR_BSP:
3134 add_unwind_entry (output_bsp_when ());
3135 add_unwind_entry (output_bsp_gr (reg2));
3137 case REG_AR + AR_BSPSTORE:
3138 add_unwind_entry (output_bspstore_when ());
3139 add_unwind_entry (output_bspstore_gr (reg2));
3141 case REG_AR + AR_RNAT:
3142 add_unwind_entry (output_rnat_when ());
3143 add_unwind_entry (output_rnat_gr (reg2));
3145 case REG_AR + AR_UNAT:
3146 add_unwind_entry (output_unat_when ());
3147 add_unwind_entry (output_unat_gr (reg2));
3149 case REG_AR + AR_FPSR:
3150 add_unwind_entry (output_fpsr_when ());
3151 add_unwind_entry (output_fpsr_gr (reg2));
3153 case REG_AR + AR_PFS:
3154 add_unwind_entry (output_pfs_when ());
3155 if (! (unwind.prologue_mask & 4))
3156 add_unwind_entry (output_pfs_gr (reg2));
3158 case REG_AR + AR_LC:
3159 add_unwind_entry (output_lc_when ());
3160 add_unwind_entry (output_lc_gr (reg2));
3163 add_unwind_entry (output_rp_when ());
3164 if (! (unwind.prologue_mask & 8))
3165 add_unwind_entry (output_rp_gr (reg2));
3168 add_unwind_entry (output_preds_when ());
3169 if (! (unwind.prologue_mask & 1))
3170 add_unwind_entry (output_preds_gr (reg2));
3173 add_unwind_entry (output_priunat_when_gr ());
3174 add_unwind_entry (output_priunat_gr (reg2));
3177 as_bad ("First operand not a valid register");
3181 as_bad (" Second operand not a valid register");
3184 as_bad ("First operand not a register");
3189 int dummy ATTRIBUTE_UNUSED;
3192 unsigned long ecount; /* # of _additional_ regions to pop */
3195 sep = parse_operand (&e1);
3196 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3198 as_bad ("First operand to .restore must be stack pointer (sp)");
3204 parse_operand (&e2);
3205 if (e2.X_op != O_constant || e2.X_add_number < 0)
3207 as_bad ("Second operand to .restore must be a constant >= 0");
3210 ecount = e2.X_add_number;
3213 ecount = unwind.prologue_count - 1;
3215 if (ecount >= unwind.prologue_count)
3217 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3218 ecount + 1, unwind.prologue_count);
3222 add_unwind_entry (output_epilogue (ecount));
3224 if (ecount < unwind.prologue_count)
3225 unwind.prologue_count -= ecount + 1;
3227 unwind.prologue_count = 0;
3231 dot_restorereg (dummy)
3232 int dummy ATTRIBUTE_UNUSED;
3234 unsigned int ab, reg;
3239 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3241 as_bad ("First operand to .restorereg must be a preserved register");
3244 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3248 dot_restorereg_p (dummy)
3249 int dummy ATTRIBUTE_UNUSED;
3251 unsigned int qp, ab, reg;
3255 sep = parse_operand (&e1);
3258 as_bad ("No second operand to .restorereg.p");
3262 parse_operand (&e2);
3264 qp = e1.X_add_number - REG_P;
3265 if (e1.X_op != O_register || qp > 63)
3267 as_bad ("First operand to .restorereg.p must be a predicate");
3271 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3273 as_bad ("Second operand to .restorereg.p must be a preserved register");
3276 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3280 generate_unwind_image (text_name)
3281 const char *text_name;
3286 /* Force out pending instructions, to make sure all unwind records have
3287 a valid slot_number field. */
3288 ia64_flush_insns ();
3290 /* Generate the unwind record. */
3291 list = optimize_unw_records (unwind.list);
3292 fixup_unw_records (list);
3293 size = calc_record_size (list);
3295 if (size > 0 || unwind.force_unwind_entry)
3297 unwind.force_unwind_entry = 0;
3298 /* pad to pointer-size boundary. */
3299 pad = size % md.pointer_size;
3301 size += md.pointer_size - pad;
3302 /* Add 8 for the header + a pointer for the personality
3304 size += 8 + md.pointer_size;
3307 /* If there are unwind records, switch sections, and output the info. */
3312 bfd_reloc_code_real_type reloc;
3314 make_unw_section_name (SPECIAL_SECTION_UNWIND_INFO, text_name, sec_name);
3315 set_section (sec_name);
3316 bfd_set_section_flags (stdoutput, now_seg,
3317 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3319 /* Make sure the section has 4 byte alignment for ILP32 and
3320 8 byte alignment for LP64. */
3321 frag_align (md.pointer_size_shift, 0, 0);
3322 record_alignment (now_seg, md.pointer_size_shift);
3324 /* Set expression which points to start of unwind descriptor area. */
3325 unwind.info = expr_build_dot ();
3327 frag_var (rs_machine_dependent, size, size, 0, 0,
3328 (offsetT) unwind.personality_routine, (char *) list);
3330 /* Add the personality address to the image. */
3331 if (unwind.personality_routine != 0)
3333 exp.X_op = O_symbol;
3334 exp.X_add_symbol = unwind.personality_routine;
3335 exp.X_add_number = 0;
3337 if (md.flags & EF_IA_64_BE)
3339 if (md.flags & EF_IA_64_ABI64)
3340 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3342 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3346 if (md.flags & EF_IA_64_ABI64)
3347 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3349 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3352 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3353 md.pointer_size, &exp, 0, reloc);
3354 unwind.personality_routine = 0;
3358 free_saved_prologue_counts ();
3359 unwind.list = unwind.tail = unwind.current_entry = NULL;
3363 dot_handlerdata (dummy)
3364 int dummy ATTRIBUTE_UNUSED;
3366 const char *text_name = segment_name (now_seg);
3368 /* If text section name starts with ".text" (which it should),
3369 strip this prefix off. */
3370 if (strcmp (text_name, ".text") == 0)
3373 unwind.force_unwind_entry = 1;
3375 /* Remember which segment we're in so we can switch back after .endp */
3376 unwind.saved_text_seg = now_seg;
3377 unwind.saved_text_subseg = now_subseg;
3379 /* Generate unwind info into unwind-info section and then leave that
3380 section as the currently active one so dataXX directives go into
3381 the language specific data area of the unwind info block. */
3382 generate_unwind_image (text_name);
3383 demand_empty_rest_of_line ();
3387 dot_unwentry (dummy)
3388 int dummy ATTRIBUTE_UNUSED;
3390 unwind.force_unwind_entry = 1;
3391 demand_empty_rest_of_line ();
3396 int dummy ATTRIBUTE_UNUSED;
3402 reg = e.X_add_number - REG_BR;
3403 if (e.X_op == O_register && reg < 8)
3404 add_unwind_entry (output_rp_br (reg));
3406 as_bad ("First operand not a valid branch register");
3410 dot_savemem (psprel)
3417 sep = parse_operand (&e1);
3419 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3420 sep = parse_operand (&e2);
3422 reg1 = e1.X_add_number;
3423 val = e2.X_add_number;
3425 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3426 if (e1.X_op == O_register)
3428 if (e2.X_op == O_constant)
3432 case REG_AR + AR_BSP:
3433 add_unwind_entry (output_bsp_when ());
3434 add_unwind_entry ((psprel
3436 : output_bsp_sprel) (val));
3438 case REG_AR + AR_BSPSTORE:
3439 add_unwind_entry (output_bspstore_when ());
3440 add_unwind_entry ((psprel
3441 ? output_bspstore_psprel
3442 : output_bspstore_sprel) (val));
3444 case REG_AR + AR_RNAT:
3445 add_unwind_entry (output_rnat_when ());
3446 add_unwind_entry ((psprel
3447 ? output_rnat_psprel
3448 : output_rnat_sprel) (val));
3450 case REG_AR + AR_UNAT:
3451 add_unwind_entry (output_unat_when ());
3452 add_unwind_entry ((psprel
3453 ? output_unat_psprel
3454 : output_unat_sprel) (val));
3456 case REG_AR + AR_FPSR:
3457 add_unwind_entry (output_fpsr_when ());
3458 add_unwind_entry ((psprel
3459 ? output_fpsr_psprel
3460 : output_fpsr_sprel) (val));
3462 case REG_AR + AR_PFS:
3463 add_unwind_entry (output_pfs_when ());
3464 add_unwind_entry ((psprel
3466 : output_pfs_sprel) (val));
3468 case REG_AR + AR_LC:
3469 add_unwind_entry (output_lc_when ());
3470 add_unwind_entry ((psprel
3472 : output_lc_sprel) (val));
3475 add_unwind_entry (output_rp_when ());
3476 add_unwind_entry ((psprel
3478 : output_rp_sprel) (val));
3481 add_unwind_entry (output_preds_when ());
3482 add_unwind_entry ((psprel
3483 ? output_preds_psprel
3484 : output_preds_sprel) (val));
3487 add_unwind_entry (output_priunat_when_mem ());
3488 add_unwind_entry ((psprel
3489 ? output_priunat_psprel
3490 : output_priunat_sprel) (val));
3493 as_bad ("First operand not a valid register");
3497 as_bad (" Second operand not a valid constant");
3500 as_bad ("First operand not a register");
3505 int dummy ATTRIBUTE_UNUSED;
3509 sep = parse_operand (&e1);
3511 parse_operand (&e2);
3513 if (e1.X_op != O_constant)
3514 as_bad ("First operand to .save.g must be a constant.");
3517 int grmask = e1.X_add_number;
3519 add_unwind_entry (output_gr_mem (grmask));
3522 int reg = e2.X_add_number - REG_GR;
3523 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3524 add_unwind_entry (output_gr_gr (grmask, reg));
3526 as_bad ("Second operand is an invalid register.");
3533 int dummy ATTRIBUTE_UNUSED;
3537 sep = parse_operand (&e1);
3539 if (e1.X_op != O_constant)
3540 as_bad ("Operand to .save.f must be a constant.");
3542 add_unwind_entry (output_fr_mem (e1.X_add_number));
3547 int dummy ATTRIBUTE_UNUSED;
3554 sep = parse_operand (&e1);
3555 if (e1.X_op != O_constant)
3557 as_bad ("First operand to .save.b must be a constant.");
3560 brmask = e1.X_add_number;
3564 sep = parse_operand (&e2);
3565 reg = e2.X_add_number - REG_GR;
3566 if (e2.X_op != O_register || reg > 127)
3568 as_bad ("Second operand to .save.b must be a general register.");
3571 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3574 add_unwind_entry (output_br_mem (brmask));
3576 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3577 ignore_rest_of_line ();
3582 int dummy ATTRIBUTE_UNUSED;
3586 sep = parse_operand (&e1);
3588 parse_operand (&e2);
3590 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3591 as_bad ("Both operands of .save.gf must be constants.");
3594 int grmask = e1.X_add_number;
3595 int frmask = e2.X_add_number;
3596 add_unwind_entry (output_frgr_mem (grmask, frmask));
3602 int dummy ATTRIBUTE_UNUSED;
3607 sep = parse_operand (&e);
3608 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3609 ignore_rest_of_line ();
3611 if (e.X_op != O_constant)
3612 as_bad ("Operand to .spill must be a constant");
3614 add_unwind_entry (output_spill_base (e.X_add_number));
3618 dot_spillreg (dummy)
3619 int dummy ATTRIBUTE_UNUSED;
3621 int sep, ab, xy, reg, treg;
3624 sep = parse_operand (&e1);
3627 as_bad ("No second operand to .spillreg");
3631 parse_operand (&e2);
3633 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3635 as_bad ("First operand to .spillreg must be a preserved register");
3639 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3641 as_bad ("Second operand to .spillreg must be a register");
3645 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3649 dot_spillmem (psprel)
3655 sep = parse_operand (&e1);
3658 as_bad ("Second operand missing");
3662 parse_operand (&e2);
3664 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3666 as_bad ("First operand to .spill%s must be a preserved register",
3667 psprel ? "psp" : "sp");
3671 if (e2.X_op != O_constant)
3673 as_bad ("Second operand to .spill%s must be a constant",
3674 psprel ? "psp" : "sp");
3679 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3681 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3685 dot_spillreg_p (dummy)
3686 int dummy ATTRIBUTE_UNUSED;
3688 int sep, ab, xy, reg, treg;
3689 expressionS e1, e2, e3;
3692 sep = parse_operand (&e1);
3695 as_bad ("No second and third operand to .spillreg.p");
3699 sep = parse_operand (&e2);
3702 as_bad ("No third operand to .spillreg.p");
3706 parse_operand (&e3);
3708 qp = e1.X_add_number - REG_P;
3710 if (e1.X_op != O_register || qp > 63)
3712 as_bad ("First operand to .spillreg.p must be a predicate");
3716 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3718 as_bad ("Second operand to .spillreg.p must be a preserved register");
3722 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3724 as_bad ("Third operand to .spillreg.p must be a register");
3728 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3732 dot_spillmem_p (psprel)
3735 expressionS e1, e2, e3;
3739 sep = parse_operand (&e1);
3742 as_bad ("Second operand missing");
3746 parse_operand (&e2);
3749 as_bad ("Second operand missing");
3753 parse_operand (&e3);
3755 qp = e1.X_add_number - REG_P;
3756 if (e1.X_op != O_register || qp > 63)
3758 as_bad ("First operand to .spill%s_p must be a predicate",
3759 psprel ? "psp" : "sp");
3763 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3765 as_bad ("Second operand to .spill%s_p must be a preserved register",
3766 psprel ? "psp" : "sp");
3770 if (e3.X_op != O_constant)
3772 as_bad ("Third operand to .spill%s_p must be a constant",
3773 psprel ? "psp" : "sp");
3778 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3780 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3784 get_saved_prologue_count (lbl)
3787 label_prologue_count *lpc = unwind.saved_prologue_counts;
3789 while (lpc != NULL && lpc->label_number != lbl)
3793 return lpc->prologue_count;
3795 as_bad ("Missing .label_state %ld", lbl);
3800 save_prologue_count (lbl, count)
3804 label_prologue_count *lpc = unwind.saved_prologue_counts;
3806 while (lpc != NULL && lpc->label_number != lbl)
3810 lpc->prologue_count = count;
3813 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3815 new_lpc->next = unwind.saved_prologue_counts;
3816 new_lpc->label_number = lbl;
3817 new_lpc->prologue_count = count;
3818 unwind.saved_prologue_counts = new_lpc;
3823 free_saved_prologue_counts ()
3825 label_prologue_count *lpc = unwind.saved_prologue_counts;
3826 label_prologue_count *next;
3835 unwind.saved_prologue_counts = NULL;
3839 dot_label_state (dummy)
3840 int dummy ATTRIBUTE_UNUSED;
3845 if (e.X_op != O_constant)
3847 as_bad ("Operand to .label_state must be a constant");
3850 add_unwind_entry (output_label_state (e.X_add_number));
3851 save_prologue_count (e.X_add_number, unwind.prologue_count);
3855 dot_copy_state (dummy)
3856 int dummy ATTRIBUTE_UNUSED;
3861 if (e.X_op != O_constant)
3863 as_bad ("Operand to .copy_state must be a constant");
3866 add_unwind_entry (output_copy_state (e.X_add_number));
3867 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3872 int dummy ATTRIBUTE_UNUSED;
3877 sep = parse_operand (&e1);
3880 as_bad ("Second operand to .unwabi missing");
3883 sep = parse_operand (&e2);
3884 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3885 ignore_rest_of_line ();
3887 if (e1.X_op != O_constant)
3889 as_bad ("First operand to .unwabi must be a constant");
3893 if (e2.X_op != O_constant)
3895 as_bad ("Second operand to .unwabi must be a constant");
3899 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
3903 dot_personality (dummy)
3904 int dummy ATTRIBUTE_UNUSED;
3908 name = input_line_pointer;
3909 c = get_symbol_end ();
3910 p = input_line_pointer;
3911 unwind.personality_routine = symbol_find_or_make (name);
3912 unwind.force_unwind_entry = 1;
3915 demand_empty_rest_of_line ();
3920 int dummy ATTRIBUTE_UNUSED;
3925 unwind.proc_start = expr_build_dot ();
3926 /* Parse names of main and alternate entry points and mark them as
3927 function symbols: */
3931 name = input_line_pointer;
3932 c = get_symbol_end ();
3933 p = input_line_pointer;
3934 sym = symbol_find_or_make (name);
3935 if (unwind.proc_start == 0)
3937 unwind.proc_start = sym;
3939 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
3942 if (*input_line_pointer != ',')
3944 ++input_line_pointer;
3946 demand_empty_rest_of_line ();
3949 unwind.prologue_count = 0;
3950 unwind.list = unwind.tail = unwind.current_entry = NULL;
3951 unwind.personality_routine = 0;
3956 int dummy ATTRIBUTE_UNUSED;
3958 unwind.prologue = 0;
3959 unwind.prologue_mask = 0;
3961 add_unwind_entry (output_body ());
3962 demand_empty_rest_of_line ();
3966 dot_prologue (dummy)
3967 int dummy ATTRIBUTE_UNUSED;
3970 int mask = 0, grsave = 0;
3972 if (!is_it_end_of_statement ())
3975 sep = parse_operand (&e1);
3977 as_bad ("No second operand to .prologue");
3978 sep = parse_operand (&e2);
3979 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3980 ignore_rest_of_line ();
3982 if (e1.X_op == O_constant)
3984 mask = e1.X_add_number;
3986 if (e2.X_op == O_constant)
3987 grsave = e2.X_add_number;
3988 else if (e2.X_op == O_register
3989 && (grsave = e2.X_add_number - REG_GR) < 128)
3992 as_bad ("Second operand not a constant or general register");
3994 add_unwind_entry (output_prologue_gr (mask, grsave));
3997 as_bad ("First operand not a constant");
4000 add_unwind_entry (output_prologue ());
4002 unwind.prologue = 1;
4003 unwind.prologue_mask = mask;
4004 ++unwind.prologue_count;
4009 int dummy ATTRIBUTE_UNUSED;
4013 int bytes_per_address;
4016 subsegT saved_subseg;
4017 const char *sec_name, *text_name;
4021 if (unwind.saved_text_seg)
4023 saved_seg = unwind.saved_text_seg;
4024 saved_subseg = unwind.saved_text_subseg;
4025 unwind.saved_text_seg = NULL;
4029 saved_seg = now_seg;
4030 saved_subseg = now_subseg;
4034 Use a slightly ugly scheme to derive the unwind section names from
4035 the text section name:
4037 text sect. unwind table sect.
4038 name: name: comments:
4039 ---------- ----------------- --------------------------------
4041 .text.foo .IA_64.unwind.text.foo
4042 .foo .IA_64.unwind.foo
4044 .gnu.linkonce.ia64unw.foo
4045 _info .IA_64.unwind_info gas issues error message (ditto)
4046 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
4048 This mapping is done so that:
4050 (a) An object file with unwind info only in .text will use
4051 unwind section names .IA_64.unwind and .IA_64.unwind_info.
4052 This follows the letter of the ABI and also ensures backwards
4053 compatibility with older toolchains.
4055 (b) An object file with unwind info in multiple text sections
4056 will use separate unwind sections for each text section.
4057 This allows us to properly set the "sh_info" and "sh_link"
4058 fields in SHT_IA_64_UNWIND as required by the ABI and also
4059 lets GNU ld support programs with multiple segments
4060 containing unwind info (as might be the case for certain
4061 embedded applications).
4063 (c) An error is issued if there would be a name clash.
4065 text_name = segment_name (saved_seg);
4066 if (strncmp (text_name, "_info", 5) == 0)
4068 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
4070 ignore_rest_of_line ();
4073 if (strcmp (text_name, ".text") == 0)
4076 insn_group_break (1, 0, 0);
4078 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4080 generate_unwind_image (text_name);
4082 if (unwind.info || unwind.force_unwind_entry)
4084 subseg_set (md.last_text_seg, 0);
4085 unwind.proc_end = expr_build_dot ();
4087 make_unw_section_name (SPECIAL_SECTION_UNWIND, text_name, sec_name);
4088 set_section ((char *) sec_name);
4089 bfd_set_section_flags (stdoutput, now_seg,
4090 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
4092 /* Make sure that section has 4 byte alignment for ILP32 and
4093 8 byte alignment for LP64. */
4094 record_alignment (now_seg, md.pointer_size_shift);
4096 /* Need space for 3 pointers for procedure start, procedure end,
4098 ptr = frag_more (3 * md.pointer_size);
4099 where = frag_now_fix () - (3 * md.pointer_size);
4100 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4102 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4103 e.X_op = O_pseudo_fixup;
4104 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4106 e.X_add_symbol = unwind.proc_start;
4107 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4109 e.X_op = O_pseudo_fixup;
4110 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4112 e.X_add_symbol = unwind.proc_end;
4113 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4114 bytes_per_address, &e);
4118 e.X_op = O_pseudo_fixup;
4119 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4121 e.X_add_symbol = unwind.info;
4122 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4123 bytes_per_address, &e);
4126 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4130 subseg_set (saved_seg, saved_subseg);
4132 /* Parse names of main and alternate entry points and set symbol sizes. */
4136 name = input_line_pointer;
4137 c = get_symbol_end ();
4138 p = input_line_pointer;
4139 sym = symbol_find (name);
4140 if (sym && unwind.proc_start
4141 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4142 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4144 fragS *fr = symbol_get_frag (unwind.proc_start);
4145 fragS *frag = symbol_get_frag (sym);
4147 /* Check whether the function label is at or beyond last
4149 while (fr && fr != frag)
4153 if (frag == frag_now && SEG_NORMAL (now_seg))
4154 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4157 symbol_get_obj (sym)->size =
4158 (expressionS *) xmalloc (sizeof (expressionS));
4159 symbol_get_obj (sym)->size->X_op = O_subtract;
4160 symbol_get_obj (sym)->size->X_add_symbol
4161 = symbol_new (FAKE_LABEL_NAME, now_seg,
4162 frag_now_fix (), frag_now);
4163 symbol_get_obj (sym)->size->X_op_symbol = sym;
4164 symbol_get_obj (sym)->size->X_add_number = 0;
4170 if (*input_line_pointer != ',')
4172 ++input_line_pointer;
4174 demand_empty_rest_of_line ();
4175 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4179 dot_template (template)
4182 CURR_SLOT.user_template = template;
4187 int dummy ATTRIBUTE_UNUSED;
4189 int ins, locs, outs, rots;
4191 if (is_it_end_of_statement ())
4192 ins = locs = outs = rots = 0;
4195 ins = get_absolute_expression ();
4196 if (*input_line_pointer++ != ',')
4198 locs = get_absolute_expression ();
4199 if (*input_line_pointer++ != ',')
4201 outs = get_absolute_expression ();
4202 if (*input_line_pointer++ != ',')
4204 rots = get_absolute_expression ();
4206 set_regstack (ins, locs, outs, rots);
4210 as_bad ("Comma expected");
4211 ignore_rest_of_line ();
4218 unsigned num_regs, num_alloced = 0;
4219 struct dynreg **drpp, *dr;
4220 int ch, base_reg = 0;
4226 case DYNREG_GR: base_reg = REG_GR + 32; break;
4227 case DYNREG_FR: base_reg = REG_FR + 32; break;
4228 case DYNREG_PR: base_reg = REG_P + 16; break;
4232 /* First, remove existing names from hash table. */
4233 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4235 hash_delete (md.dynreg_hash, dr->name);
4239 drpp = &md.dynreg[type];
4242 start = input_line_pointer;
4243 ch = get_symbol_end ();
4244 *input_line_pointer = ch;
4245 len = (input_line_pointer - start);
4248 if (*input_line_pointer != '[')
4250 as_bad ("Expected '['");
4253 ++input_line_pointer; /* skip '[' */
4255 num_regs = get_absolute_expression ();
4257 if (*input_line_pointer++ != ']')
4259 as_bad ("Expected ']'");
4264 num_alloced += num_regs;
4268 if (num_alloced > md.rot.num_regs)
4270 as_bad ("Used more than the declared %d rotating registers",
4276 if (num_alloced > 96)
4278 as_bad ("Used more than the available 96 rotating registers");
4283 if (num_alloced > 48)
4285 as_bad ("Used more than the available 48 rotating registers");
4294 name = obstack_alloc (¬es, len + 1);
4295 memcpy (name, start, len);
4300 *drpp = obstack_alloc (¬es, sizeof (*dr));
4301 memset (*drpp, 0, sizeof (*dr));
4306 dr->num_regs = num_regs;
4307 dr->base = base_reg;
4309 base_reg += num_regs;
4311 if (hash_insert (md.dynreg_hash, name, dr))
4313 as_bad ("Attempt to redefine register set `%s'", name);
4317 if (*input_line_pointer != ',')
4319 ++input_line_pointer; /* skip comma */
4322 demand_empty_rest_of_line ();
4326 ignore_rest_of_line ();
4330 dot_byteorder (byteorder)
4333 segment_info_type *seginfo = seg_info (now_seg);
4335 if (byteorder == -1)
4337 if (seginfo->tc_segment_info_data.endian == 0)
4338 seginfo->tc_segment_info_data.endian
4339 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4340 byteorder = seginfo->tc_segment_info_data.endian == 1;
4343 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4345 if (target_big_endian != byteorder)
4347 target_big_endian = byteorder;
4348 if (target_big_endian)
4350 ia64_number_to_chars = number_to_chars_bigendian;
4351 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4355 ia64_number_to_chars = number_to_chars_littleendian;
4356 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4363 int dummy ATTRIBUTE_UNUSED;
4370 option = input_line_pointer;
4371 ch = get_symbol_end ();
4372 if (strcmp (option, "lsb") == 0)
4373 md.flags &= ~EF_IA_64_BE;
4374 else if (strcmp (option, "msb") == 0)
4375 md.flags |= EF_IA_64_BE;
4376 else if (strcmp (option, "abi32") == 0)
4377 md.flags &= ~EF_IA_64_ABI64;
4378 else if (strcmp (option, "abi64") == 0)
4379 md.flags |= EF_IA_64_ABI64;
4381 as_bad ("Unknown psr option `%s'", option);
4382 *input_line_pointer = ch;
4385 if (*input_line_pointer != ',')
4388 ++input_line_pointer;
4391 demand_empty_rest_of_line ();
4396 int dummy ATTRIBUTE_UNUSED;
4398 new_logical_line (0, get_absolute_expression ());
4399 demand_empty_rest_of_line ();
4403 parse_section_name ()
4409 if (*input_line_pointer != '"')
4411 as_bad ("Missing section name");
4412 ignore_rest_of_line ();
4415 name = demand_copy_C_string (&len);
4418 ignore_rest_of_line ();
4422 if (*input_line_pointer != ',')
4424 as_bad ("Comma expected after section name");
4425 ignore_rest_of_line ();
4428 ++input_line_pointer; /* skip comma */
4436 char *name = parse_section_name ();
4440 md.keep_pending_output = 1;
4443 obj_elf_previous (0);
4444 md.keep_pending_output = 0;
4447 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4450 stmt_float_cons (kind)
4471 ia64_do_align (alignment);
4479 int saved_auto_align = md.auto_align;
4483 md.auto_align = saved_auto_align;
4487 dot_xfloat_cons (kind)
4490 char *name = parse_section_name ();
4494 md.keep_pending_output = 1;
4496 stmt_float_cons (kind);
4497 obj_elf_previous (0);
4498 md.keep_pending_output = 0;
4502 dot_xstringer (zero)
4505 char *name = parse_section_name ();
4509 md.keep_pending_output = 1;
4512 obj_elf_previous (0);
4513 md.keep_pending_output = 0;
4520 int saved_auto_align = md.auto_align;
4521 char *name = parse_section_name ();
4525 md.keep_pending_output = 1;
4529 md.auto_align = saved_auto_align;
4530 obj_elf_previous (0);
4531 md.keep_pending_output = 0;
4535 dot_xfloat_cons_ua (kind)
4538 int saved_auto_align = md.auto_align;
4539 char *name = parse_section_name ();
4543 md.keep_pending_output = 1;
4546 stmt_float_cons (kind);
4547 md.auto_align = saved_auto_align;
4548 obj_elf_previous (0);
4549 md.keep_pending_output = 0;
4552 /* .reg.val <regname>,value */
4556 int dummy ATTRIBUTE_UNUSED;
4561 if (reg.X_op != O_register)
4563 as_bad (_("Register name expected"));
4564 ignore_rest_of_line ();
4566 else if (*input_line_pointer++ != ',')
4568 as_bad (_("Comma expected"));
4569 ignore_rest_of_line ();
4573 valueT value = get_absolute_expression ();
4574 int regno = reg.X_add_number;
4575 if (regno < REG_GR || regno > REG_GR + 128)
4576 as_warn (_("Register value annotation ignored"));
4579 gr_values[regno - REG_GR].known = 1;
4580 gr_values[regno - REG_GR].value = value;
4581 gr_values[regno - REG_GR].path = md.path;
4584 demand_empty_rest_of_line ();
4587 /* select dv checking mode
4592 A stop is inserted when changing modes
4599 if (md.manual_bundling)
4600 as_warn (_("Directive invalid within a bundle"));
4602 if (type == 'E' || type == 'A')
4603 md.mode_explicitly_set = 0;
4605 md.mode_explicitly_set = 1;
4612 if (md.explicit_mode)
4613 insn_group_break (1, 0, 0);
4614 md.explicit_mode = 0;
4618 if (!md.explicit_mode)
4619 insn_group_break (1, 0, 0);
4620 md.explicit_mode = 1;
4624 if (md.explicit_mode != md.default_explicit_mode)
4625 insn_group_break (1, 0, 0);
4626 md.explicit_mode = md.default_explicit_mode;
4627 md.mode_explicitly_set = 0;
4638 for (regno = 0; regno < 64; regno++)
4640 if (mask & ((valueT) 1 << regno))
4642 fprintf (stderr, "%s p%d", comma, regno);
4649 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4650 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4651 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4652 .pred.safe_across_calls p1 [, p2 [,...]]
4661 int p1 = -1, p2 = -1;
4665 if (*input_line_pointer != '"')
4667 as_bad (_("Missing predicate relation type"));
4668 ignore_rest_of_line ();
4674 char *form = demand_copy_C_string (&len);
4675 if (strcmp (form, "mutex") == 0)
4677 else if (strcmp (form, "clear") == 0)
4679 else if (strcmp (form, "imply") == 0)
4683 as_bad (_("Unrecognized predicate relation type"));
4684 ignore_rest_of_line ();
4688 if (*input_line_pointer == ',')
4689 ++input_line_pointer;
4699 if (TOUPPER (*input_line_pointer) != 'P'
4700 || (regno = atoi (++input_line_pointer)) < 0
4703 as_bad (_("Predicate register expected"));
4704 ignore_rest_of_line ();
4707 while (ISDIGIT (*input_line_pointer))
4708 ++input_line_pointer;
4715 as_warn (_("Duplicate predicate register ignored"));
4718 /* See if it's a range. */
4719 if (*input_line_pointer == '-')
4722 ++input_line_pointer;
4724 if (TOUPPER (*input_line_pointer) != 'P'
4725 || (regno = atoi (++input_line_pointer)) < 0
4728 as_bad (_("Predicate register expected"));
4729 ignore_rest_of_line ();
4732 while (ISDIGIT (*input_line_pointer))
4733 ++input_line_pointer;
4737 as_bad (_("Bad register range"));
4738 ignore_rest_of_line ();
4749 if (*input_line_pointer != ',')
4751 ++input_line_pointer;
4760 clear_qp_mutex (mask);
4761 clear_qp_implies (mask, (valueT) 0);
4764 if (count != 2 || p1 == -1 || p2 == -1)
4765 as_bad (_("Predicate source and target required"));
4766 else if (p1 == 0 || p2 == 0)
4767 as_bad (_("Use of p0 is not valid in this context"));
4769 add_qp_imply (p1, p2);
4774 as_bad (_("At least two PR arguments expected"));
4779 as_bad (_("Use of p0 is not valid in this context"));
4782 add_qp_mutex (mask);
4785 /* note that we don't override any existing relations */
4788 as_bad (_("At least one PR argument expected"));
4793 fprintf (stderr, "Safe across calls: ");
4794 print_prmask (mask);
4795 fprintf (stderr, "\n");
4797 qp_safe_across_calls = mask;
4800 demand_empty_rest_of_line ();
4803 /* .entry label [, label [, ...]]
4804 Hint to DV code that the given labels are to be considered entry points.
4805 Otherwise, only global labels are considered entry points. */
4809 int dummy ATTRIBUTE_UNUSED;
4818 name = input_line_pointer;
4819 c = get_symbol_end ();
4820 symbolP = symbol_find_or_make (name);
4822 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4824 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4827 *input_line_pointer = c;
4829 c = *input_line_pointer;
4832 input_line_pointer++;
4834 if (*input_line_pointer == '\n')
4840 demand_empty_rest_of_line ();
4843 /* .mem.offset offset, base
4844 "base" is used to distinguish between offsets from a different base. */
4847 dot_mem_offset (dummy)
4848 int dummy ATTRIBUTE_UNUSED;
4850 md.mem_offset.hint = 1;
4851 md.mem_offset.offset = get_absolute_expression ();
4852 if (*input_line_pointer != ',')
4854 as_bad (_("Comma expected"));
4855 ignore_rest_of_line ();
4858 ++input_line_pointer;
4859 md.mem_offset.base = get_absolute_expression ();
4860 demand_empty_rest_of_line ();
4863 /* ia64-specific pseudo-ops: */
4864 const pseudo_typeS md_pseudo_table[] =
4866 { "radix", dot_radix, 0 },
4867 { "lcomm", s_lcomm_bytes, 1 },
4868 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4869 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4870 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4871 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4872 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4873 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4874 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4875 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4876 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4877 { "proc", dot_proc, 0 },
4878 { "body", dot_body, 0 },
4879 { "prologue", dot_prologue, 0 },
4880 { "endp", dot_endp, 0 },
4882 { "fframe", dot_fframe, 0 },
4883 { "vframe", dot_vframe, 0 },
4884 { "vframesp", dot_vframesp, 0 },
4885 { "vframepsp", dot_vframepsp, 0 },
4886 { "save", dot_save, 0 },
4887 { "restore", dot_restore, 0 },
4888 { "restorereg", dot_restorereg, 0 },
4889 { "restorereg.p", dot_restorereg_p, 0 },
4890 { "handlerdata", dot_handlerdata, 0 },
4891 { "unwentry", dot_unwentry, 0 },
4892 { "altrp", dot_altrp, 0 },
4893 { "savesp", dot_savemem, 0 },
4894 { "savepsp", dot_savemem, 1 },
4895 { "save.g", dot_saveg, 0 },
4896 { "save.f", dot_savef, 0 },
4897 { "save.b", dot_saveb, 0 },
4898 { "save.gf", dot_savegf, 0 },
4899 { "spill", dot_spill, 0 },
4900 { "spillreg", dot_spillreg, 0 },
4901 { "spillsp", dot_spillmem, 0 },
4902 { "spillpsp", dot_spillmem, 1 },
4903 { "spillreg.p", dot_spillreg_p, 0 },
4904 { "spillsp.p", dot_spillmem_p, 0 },
4905 { "spillpsp.p", dot_spillmem_p, 1 },
4906 { "label_state", dot_label_state, 0 },
4907 { "copy_state", dot_copy_state, 0 },
4908 { "unwabi", dot_unwabi, 0 },
4909 { "personality", dot_personality, 0 },
4911 { "estate", dot_estate, 0 },
4913 { "mii", dot_template, 0x0 },
4914 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
4915 { "mlx", dot_template, 0x2 },
4916 { "mmi", dot_template, 0x4 },
4917 { "mfi", dot_template, 0x6 },
4918 { "mmf", dot_template, 0x7 },
4919 { "mib", dot_template, 0x8 },
4920 { "mbb", dot_template, 0x9 },
4921 { "bbb", dot_template, 0xb },
4922 { "mmb", dot_template, 0xc },
4923 { "mfb", dot_template, 0xe },
4925 { "lb", dot_scope, 0 },
4926 { "le", dot_scope, 1 },
4928 { "align", s_align_bytes, 0 },
4929 { "regstk", dot_regstk, 0 },
4930 { "rotr", dot_rot, DYNREG_GR },
4931 { "rotf", dot_rot, DYNREG_FR },
4932 { "rotp", dot_rot, DYNREG_PR },
4933 { "lsb", dot_byteorder, 0 },
4934 { "msb", dot_byteorder, 1 },
4935 { "psr", dot_psr, 0 },
4936 { "alias", dot_alias, 0 },
4937 { "secalias", dot_alias, 1 },
4938 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
4940 { "xdata1", dot_xdata, 1 },
4941 { "xdata2", dot_xdata, 2 },
4942 { "xdata4", dot_xdata, 4 },
4943 { "xdata8", dot_xdata, 8 },
4944 { "xreal4", dot_xfloat_cons, 'f' },
4945 { "xreal8", dot_xfloat_cons, 'd' },
4946 { "xreal10", dot_xfloat_cons, 'x' },
4947 { "xreal16", dot_xfloat_cons, 'X' },
4948 { "xstring", dot_xstringer, 0 },
4949 { "xstringz", dot_xstringer, 1 },
4951 /* unaligned versions: */
4952 { "xdata2.ua", dot_xdata_ua, 2 },
4953 { "xdata4.ua", dot_xdata_ua, 4 },
4954 { "xdata8.ua", dot_xdata_ua, 8 },
4955 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
4956 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
4957 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
4958 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
4960 /* annotations/DV checking support */
4961 { "entry", dot_entry, 0 },
4962 { "mem.offset", dot_mem_offset, 0 },
4963 { "pred.rel", dot_pred_rel, 0 },
4964 { "pred.rel.clear", dot_pred_rel, 'c' },
4965 { "pred.rel.imply", dot_pred_rel, 'i' },
4966 { "pred.rel.mutex", dot_pred_rel, 'm' },
4967 { "pred.safe_across_calls", dot_pred_rel, 's' },
4968 { "reg.val", dot_reg_val, 0 },
4969 { "auto", dot_dv_mode, 'a' },
4970 { "explicit", dot_dv_mode, 'e' },
4971 { "default", dot_dv_mode, 'd' },
4973 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
4974 IA-64 aligns data allocation pseudo-ops by default, so we have to
4975 tell it that these ones are supposed to be unaligned. Long term,
4976 should rewrite so that only IA-64 specific data allocation pseudo-ops
4977 are aligned by default. */
4978 {"2byte", stmt_cons_ua, 2},
4979 {"4byte", stmt_cons_ua, 4},
4980 {"8byte", stmt_cons_ua, 8},
4985 static const struct pseudo_opcode
4988 void (*handler) (int);
4993 /* these are more like pseudo-ops, but don't start with a dot */
4994 { "data1", cons, 1 },
4995 { "data2", cons, 2 },
4996 { "data4", cons, 4 },
4997 { "data8", cons, 8 },
4998 { "data16", cons, 16 },
4999 { "real4", stmt_float_cons, 'f' },
5000 { "real8", stmt_float_cons, 'd' },
5001 { "real10", stmt_float_cons, 'x' },
5002 { "real16", stmt_float_cons, 'X' },
5003 { "string", stringer, 0 },
5004 { "stringz", stringer, 1 },
5006 /* unaligned versions: */
5007 { "data2.ua", stmt_cons_ua, 2 },
5008 { "data4.ua", stmt_cons_ua, 4 },
5009 { "data8.ua", stmt_cons_ua, 8 },
5010 { "data16.ua", stmt_cons_ua, 16 },
5011 { "real4.ua", float_cons, 'f' },
5012 { "real8.ua", float_cons, 'd' },
5013 { "real10.ua", float_cons, 'x' },
5014 { "real16.ua", float_cons, 'X' },
5017 /* Declare a register by creating a symbol for it and entering it in
5018 the symbol table. */
5021 declare_register (name, regnum)
5028 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5030 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5032 as_fatal ("Inserting \"%s\" into register table failed: %s",
5039 declare_register_set (prefix, num_regs, base_regnum)
5047 for (i = 0; i < num_regs; ++i)
5049 sprintf (name, "%s%u", prefix, i);
5050 declare_register (name, base_regnum + i);
5055 operand_width (opnd)
5056 enum ia64_opnd opnd;
5058 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5059 unsigned int bits = 0;
5063 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5064 bits += odesc->field[i].bits;
5069 static enum operand_match_result
5070 operand_match (idesc, index, e)
5071 const struct ia64_opcode *idesc;
5075 enum ia64_opnd opnd = idesc->operands[index];
5076 int bits, relocatable = 0;
5077 struct insn_fix *fix;
5084 case IA64_OPND_AR_CCV:
5085 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5086 return OPERAND_MATCH;
5089 case IA64_OPND_AR_CSD:
5090 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5091 return OPERAND_MATCH;
5094 case IA64_OPND_AR_PFS:
5095 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5096 return OPERAND_MATCH;
5100 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5101 return OPERAND_MATCH;
5105 if (e->X_op == O_register && e->X_add_number == REG_IP)
5106 return OPERAND_MATCH;
5110 if (e->X_op == O_register && e->X_add_number == REG_PR)
5111 return OPERAND_MATCH;
5114 case IA64_OPND_PR_ROT:
5115 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5116 return OPERAND_MATCH;
5120 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5121 return OPERAND_MATCH;
5124 case IA64_OPND_PSR_L:
5125 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5126 return OPERAND_MATCH;
5129 case IA64_OPND_PSR_UM:
5130 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5131 return OPERAND_MATCH;
5135 if (e->X_op == O_constant)
5137 if (e->X_add_number == 1)
5138 return OPERAND_MATCH;
5140 return OPERAND_OUT_OF_RANGE;
5145 if (e->X_op == O_constant)
5147 if (e->X_add_number == 8)
5148 return OPERAND_MATCH;
5150 return OPERAND_OUT_OF_RANGE;
5155 if (e->X_op == O_constant)
5157 if (e->X_add_number == 16)
5158 return OPERAND_MATCH;
5160 return OPERAND_OUT_OF_RANGE;
5164 /* register operands: */
5167 if (e->X_op == O_register && e->X_add_number >= REG_AR
5168 && e->X_add_number < REG_AR + 128)
5169 return OPERAND_MATCH;
5174 if (e->X_op == O_register && e->X_add_number >= REG_BR
5175 && e->X_add_number < REG_BR + 8)
5176 return OPERAND_MATCH;
5180 if (e->X_op == O_register && e->X_add_number >= REG_CR
5181 && e->X_add_number < REG_CR + 128)
5182 return OPERAND_MATCH;
5189 if (e->X_op == O_register && e->X_add_number >= REG_FR
5190 && e->X_add_number < REG_FR + 128)
5191 return OPERAND_MATCH;
5196 if (e->X_op == O_register && e->X_add_number >= REG_P
5197 && e->X_add_number < REG_P + 64)
5198 return OPERAND_MATCH;
5204 if (e->X_op == O_register && e->X_add_number >= REG_GR
5205 && e->X_add_number < REG_GR + 128)
5206 return OPERAND_MATCH;
5209 case IA64_OPND_R3_2:
5210 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5212 if (e->X_add_number < REG_GR + 4)
5213 return OPERAND_MATCH;
5214 else if (e->X_add_number < REG_GR + 128)
5215 return OPERAND_OUT_OF_RANGE;
5219 /* indirect operands: */
5220 case IA64_OPND_CPUID_R3:
5221 case IA64_OPND_DBR_R3:
5222 case IA64_OPND_DTR_R3:
5223 case IA64_OPND_ITR_R3:
5224 case IA64_OPND_IBR_R3:
5225 case IA64_OPND_MSR_R3:
5226 case IA64_OPND_PKR_R3:
5227 case IA64_OPND_PMC_R3:
5228 case IA64_OPND_PMD_R3:
5229 case IA64_OPND_RR_R3:
5230 if (e->X_op == O_index && e->X_op_symbol
5231 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5232 == opnd - IA64_OPND_CPUID_R3))
5233 return OPERAND_MATCH;
5237 if (e->X_op == O_index && !e->X_op_symbol)
5238 return OPERAND_MATCH;
5241 /* immediate operands: */
5242 case IA64_OPND_CNT2a:
5243 case IA64_OPND_LEN4:
5244 case IA64_OPND_LEN6:
5245 bits = operand_width (idesc->operands[index]);
5246 if (e->X_op == O_constant)
5248 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5249 return OPERAND_MATCH;
5251 return OPERAND_OUT_OF_RANGE;
5255 case IA64_OPND_CNT2b:
5256 if (e->X_op == O_constant)
5258 if ((bfd_vma) (e->X_add_number - 1) < 3)
5259 return OPERAND_MATCH;
5261 return OPERAND_OUT_OF_RANGE;
5265 case IA64_OPND_CNT2c:
5266 val = e->X_add_number;
5267 if (e->X_op == O_constant)
5269 if ((val == 0 || val == 7 || val == 15 || val == 16))
5270 return OPERAND_MATCH;
5272 return OPERAND_OUT_OF_RANGE;
5277 /* SOR must be an integer multiple of 8 */
5278 if (e->X_op == O_constant && e->X_add_number & 0x7)
5279 return OPERAND_OUT_OF_RANGE;
5282 if (e->X_op == O_constant)
5284 if ((bfd_vma) e->X_add_number <= 96)
5285 return OPERAND_MATCH;
5287 return OPERAND_OUT_OF_RANGE;
5291 case IA64_OPND_IMMU62:
5292 if (e->X_op == O_constant)
5294 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5295 return OPERAND_MATCH;
5297 return OPERAND_OUT_OF_RANGE;
5301 /* FIXME -- need 62-bit relocation type */
5302 as_bad (_("62-bit relocation not yet implemented"));
5306 case IA64_OPND_IMMU64:
5307 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5308 || e->X_op == O_subtract)
5310 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5311 fix->code = BFD_RELOC_IA64_IMM64;
5312 if (e->X_op != O_subtract)
5314 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5315 if (e->X_op == O_pseudo_fixup)
5319 fix->opnd = idesc->operands[index];
5322 ++CURR_SLOT.num_fixups;
5323 return OPERAND_MATCH;
5325 else if (e->X_op == O_constant)
5326 return OPERAND_MATCH;
5329 case IA64_OPND_CCNT5:
5330 case IA64_OPND_CNT5:
5331 case IA64_OPND_CNT6:
5332 case IA64_OPND_CPOS6a:
5333 case IA64_OPND_CPOS6b:
5334 case IA64_OPND_CPOS6c:
5335 case IA64_OPND_IMMU2:
5336 case IA64_OPND_IMMU7a:
5337 case IA64_OPND_IMMU7b:
5338 case IA64_OPND_IMMU21:
5339 case IA64_OPND_IMMU24:
5340 case IA64_OPND_MBTYPE4:
5341 case IA64_OPND_MHTYPE8:
5342 case IA64_OPND_POS6:
5343 bits = operand_width (idesc->operands[index]);
5344 if (e->X_op == O_constant)
5346 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5347 return OPERAND_MATCH;
5349 return OPERAND_OUT_OF_RANGE;
5353 case IA64_OPND_IMMU9:
5354 bits = operand_width (idesc->operands[index]);
5355 if (e->X_op == O_constant)
5357 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5359 int lobits = e->X_add_number & 0x3;
5360 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5361 e->X_add_number |= (bfd_vma) 0x3;
5362 return OPERAND_MATCH;
5365 return OPERAND_OUT_OF_RANGE;
5369 case IA64_OPND_IMM44:
5370 /* least 16 bits must be zero */
5371 if ((e->X_add_number & 0xffff) != 0)
5372 /* XXX technically, this is wrong: we should not be issuing warning
5373 messages until we're sure this instruction pattern is going to
5375 as_warn (_("lower 16 bits of mask ignored"));
5377 if (e->X_op == O_constant)
5379 if (((e->X_add_number >= 0
5380 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5381 || (e->X_add_number < 0
5382 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5385 if (e->X_add_number >= 0
5386 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5388 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5390 return OPERAND_MATCH;
5393 return OPERAND_OUT_OF_RANGE;
5397 case IA64_OPND_IMM17:
5398 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5399 if (e->X_op == O_constant)
5401 if (((e->X_add_number >= 0
5402 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5403 || (e->X_add_number < 0
5404 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5407 if (e->X_add_number >= 0
5408 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5410 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5412 return OPERAND_MATCH;
5415 return OPERAND_OUT_OF_RANGE;
5419 case IA64_OPND_IMM14:
5420 case IA64_OPND_IMM22:
5422 case IA64_OPND_IMM1:
5423 case IA64_OPND_IMM8:
5424 case IA64_OPND_IMM8U4:
5425 case IA64_OPND_IMM8M1:
5426 case IA64_OPND_IMM8M1U4:
5427 case IA64_OPND_IMM8M1U8:
5428 case IA64_OPND_IMM9a:
5429 case IA64_OPND_IMM9b:
5430 bits = operand_width (idesc->operands[index]);
5431 if (relocatable && (e->X_op == O_symbol
5432 || e->X_op == O_subtract
5433 || e->X_op == O_pseudo_fixup))
5435 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5437 if (idesc->operands[index] == IA64_OPND_IMM14)
5438 fix->code = BFD_RELOC_IA64_IMM14;
5440 fix->code = BFD_RELOC_IA64_IMM22;
5442 if (e->X_op != O_subtract)
5444 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5445 if (e->X_op == O_pseudo_fixup)
5449 fix->opnd = idesc->operands[index];
5452 ++CURR_SLOT.num_fixups;
5453 return OPERAND_MATCH;
5455 else if (e->X_op != O_constant
5456 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5457 return OPERAND_MISMATCH;
5459 if (opnd == IA64_OPND_IMM8M1U4)
5461 /* Zero is not valid for unsigned compares that take an adjusted
5462 constant immediate range. */
5463 if (e->X_add_number == 0)
5464 return OPERAND_OUT_OF_RANGE;
5466 /* Sign-extend 32-bit unsigned numbers, so that the following range
5467 checks will work. */
5468 val = e->X_add_number;
5469 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5470 && ((val & ((bfd_vma) 1 << 31)) != 0))
5471 val = ((val << 32) >> 32);
5473 /* Check for 0x100000000. This is valid because
5474 0x100000000-1 is the same as ((uint32_t) -1). */
5475 if (val == ((bfd_signed_vma) 1 << 32))
5476 return OPERAND_MATCH;
5480 else if (opnd == IA64_OPND_IMM8M1U8)
5482 /* Zero is not valid for unsigned compares that take an adjusted
5483 constant immediate range. */
5484 if (e->X_add_number == 0)
5485 return OPERAND_OUT_OF_RANGE;
5487 /* Check for 0x10000000000000000. */
5488 if (e->X_op == O_big)
5490 if (generic_bignum[0] == 0
5491 && generic_bignum[1] == 0
5492 && generic_bignum[2] == 0
5493 && generic_bignum[3] == 0
5494 && generic_bignum[4] == 1)
5495 return OPERAND_MATCH;
5497 return OPERAND_OUT_OF_RANGE;
5500 val = e->X_add_number - 1;
5502 else if (opnd == IA64_OPND_IMM8M1)
5503 val = e->X_add_number - 1;
5504 else if (opnd == IA64_OPND_IMM8U4)
5506 /* Sign-extend 32-bit unsigned numbers, so that the following range
5507 checks will work. */
5508 val = e->X_add_number;
5509 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5510 && ((val & ((bfd_vma) 1 << 31)) != 0))
5511 val = ((val << 32) >> 32);
5514 val = e->X_add_number;
5516 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5517 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5518 return OPERAND_MATCH;
5520 return OPERAND_OUT_OF_RANGE;
5522 case IA64_OPND_INC3:
5523 /* +/- 1, 4, 8, 16 */
5524 val = e->X_add_number;
5527 if (e->X_op == O_constant)
5529 if ((val == 1 || val == 4 || val == 8 || val == 16))
5530 return OPERAND_MATCH;
5532 return OPERAND_OUT_OF_RANGE;
5536 case IA64_OPND_TGT25:
5537 case IA64_OPND_TGT25b:
5538 case IA64_OPND_TGT25c:
5539 case IA64_OPND_TGT64:
5540 if (e->X_op == O_symbol)
5542 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5543 if (opnd == IA64_OPND_TGT25)
5544 fix->code = BFD_RELOC_IA64_PCREL21F;
5545 else if (opnd == IA64_OPND_TGT25b)
5546 fix->code = BFD_RELOC_IA64_PCREL21M;
5547 else if (opnd == IA64_OPND_TGT25c)
5548 fix->code = BFD_RELOC_IA64_PCREL21B;
5549 else if (opnd == IA64_OPND_TGT64)
5550 fix->code = BFD_RELOC_IA64_PCREL60B;
5554 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5555 fix->opnd = idesc->operands[index];
5558 ++CURR_SLOT.num_fixups;
5559 return OPERAND_MATCH;
5561 case IA64_OPND_TAG13:
5562 case IA64_OPND_TAG13b:
5566 return OPERAND_MATCH;
5569 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5570 /* There are no external relocs for TAG13/TAG13b fields, so we
5571 create a dummy reloc. This will not live past md_apply_fix3. */
5572 fix->code = BFD_RELOC_UNUSED;
5573 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5574 fix->opnd = idesc->operands[index];
5577 ++CURR_SLOT.num_fixups;
5578 return OPERAND_MATCH;
5585 case IA64_OPND_LDXMOV:
5586 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5587 fix->code = BFD_RELOC_IA64_LDXMOV;
5588 fix->opnd = idesc->operands[index];
5591 ++CURR_SLOT.num_fixups;
5592 return OPERAND_MATCH;
5597 return OPERAND_MISMATCH;
5606 memset (e, 0, sizeof (*e));
5609 if (*input_line_pointer != '}')
5611 sep = *input_line_pointer++;
5615 if (!md.manual_bundling)
5616 as_warn ("Found '}' when manual bundling is off");
5618 CURR_SLOT.manual_bundling_off = 1;
5619 md.manual_bundling = 0;
5625 /* Returns the next entry in the opcode table that matches the one in
5626 IDESC, and frees the entry in IDESC. If no matching entry is
5627 found, NULL is returned instead. */
5629 static struct ia64_opcode *
5630 get_next_opcode (struct ia64_opcode *idesc)
5632 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5633 ia64_free_opcode (idesc);
5637 /* Parse the operands for the opcode and find the opcode variant that
5638 matches the specified operands, or NULL if no match is possible. */
5640 static struct ia64_opcode *
5641 parse_operands (idesc)
5642 struct ia64_opcode *idesc;
5644 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5645 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5646 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5647 enum operand_match_result result;
5649 char *first_arg = 0, *end, *saved_input_pointer;
5652 assert (strlen (idesc->name) <= 128);
5654 strcpy (mnemonic, idesc->name);
5655 if (idesc->operands[2] == IA64_OPND_SOF)
5657 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5658 can't parse the first operand until we have parsed the
5659 remaining operands of the "alloc" instruction. */
5661 first_arg = input_line_pointer;
5662 end = strchr (input_line_pointer, '=');
5665 as_bad ("Expected separator `='");
5668 input_line_pointer = end + 1;
5673 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5675 sep = parse_operand (CURR_SLOT.opnd + i);
5676 if (CURR_SLOT.opnd[i].X_op == O_absent)
5681 if (sep != '=' && sep != ',')
5686 if (num_outputs > 0)
5687 as_bad ("Duplicate equal sign (=) in instruction");
5689 num_outputs = i + 1;
5694 as_bad ("Illegal operand separator `%c'", sep);
5698 if (idesc->operands[2] == IA64_OPND_SOF)
5700 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5701 know (strcmp (idesc->name, "alloc") == 0);
5702 if (num_operands == 5 /* first_arg not included in this count! */
5703 && CURR_SLOT.opnd[2].X_op == O_constant
5704 && CURR_SLOT.opnd[3].X_op == O_constant
5705 && CURR_SLOT.opnd[4].X_op == O_constant
5706 && CURR_SLOT.opnd[5].X_op == O_constant)
5708 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5709 CURR_SLOT.opnd[3].X_add_number,
5710 CURR_SLOT.opnd[4].X_add_number,
5711 CURR_SLOT.opnd[5].X_add_number);
5713 /* now we can parse the first arg: */
5714 saved_input_pointer = input_line_pointer;
5715 input_line_pointer = first_arg;
5716 sep = parse_operand (CURR_SLOT.opnd + 0);
5718 --num_outputs; /* force error */
5719 input_line_pointer = saved_input_pointer;
5721 CURR_SLOT.opnd[2].X_add_number = sof;
5722 CURR_SLOT.opnd[3].X_add_number
5723 = sof - CURR_SLOT.opnd[4].X_add_number;
5724 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5728 highest_unmatched_operand = 0;
5729 curr_out_of_range_pos = -1;
5731 expected_operand = idesc->operands[0];
5732 for (; idesc; idesc = get_next_opcode (idesc))
5734 if (num_outputs != idesc->num_outputs)
5735 continue; /* mismatch in # of outputs */
5737 CURR_SLOT.num_fixups = 0;
5739 /* Try to match all operands. If we see an out-of-range operand,
5740 then continue trying to match the rest of the operands, since if
5741 the rest match, then this idesc will give the best error message. */
5743 out_of_range_pos = -1;
5744 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5746 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5747 if (result != OPERAND_MATCH)
5749 if (result != OPERAND_OUT_OF_RANGE)
5751 if (out_of_range_pos < 0)
5752 /* remember position of the first out-of-range operand: */
5753 out_of_range_pos = i;
5757 /* If we did not match all operands, or if at least one operand was
5758 out-of-range, then this idesc does not match. Keep track of which
5759 idesc matched the most operands before failing. If we have two
5760 idescs that failed at the same position, and one had an out-of-range
5761 operand, then prefer the out-of-range operand. Thus if we have
5762 "add r0=0x1000000,r1" we get an error saying the constant is out
5763 of range instead of an error saying that the constant should have been
5766 if (i != num_operands || out_of_range_pos >= 0)
5768 if (i > highest_unmatched_operand
5769 || (i == highest_unmatched_operand
5770 && out_of_range_pos > curr_out_of_range_pos))
5772 highest_unmatched_operand = i;
5773 if (out_of_range_pos >= 0)
5775 expected_operand = idesc->operands[out_of_range_pos];
5776 error_pos = out_of_range_pos;
5780 expected_operand = idesc->operands[i];
5783 curr_out_of_range_pos = out_of_range_pos;
5788 if (num_operands < NELEMS (idesc->operands)
5789 && idesc->operands[num_operands])
5790 continue; /* mismatch in number of arguments */
5796 if (expected_operand)
5797 as_bad ("Operand %u of `%s' should be %s",
5798 error_pos + 1, mnemonic,
5799 elf64_ia64_operands[expected_operand].desc);
5801 as_bad ("Operand mismatch");
5807 /* Keep track of state necessary to determine whether a NOP is necessary
5808 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5809 detect a case where additional NOPs may be necessary. */
5811 errata_nop_necessary_p (slot, insn_unit)
5813 enum ia64_unit insn_unit;
5816 struct group *this_group = md.last_groups + md.group_idx;
5817 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5818 struct ia64_opcode *idesc = slot->idesc;
5820 /* Test whether this could be the first insn in a problematic sequence. */
5821 if (insn_unit == IA64_UNIT_F)
5823 for (i = 0; i < idesc->num_outputs; i++)
5824 if (idesc->operands[i] == IA64_OPND_P1
5825 || idesc->operands[i] == IA64_OPND_P2)
5827 int regno = slot->opnd[i].X_add_number - REG_P;
5828 /* Ignore invalid operands; they generate errors elsewhere. */
5831 this_group->p_reg_set[regno] = 1;
5835 /* Test whether this could be the second insn in a problematic sequence. */
5836 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5837 && prev_group->p_reg_set[slot->qp_regno])
5839 for (i = 0; i < idesc->num_outputs; i++)
5840 if (idesc->operands[i] == IA64_OPND_R1
5841 || idesc->operands[i] == IA64_OPND_R2
5842 || idesc->operands[i] == IA64_OPND_R3)
5844 int regno = slot->opnd[i].X_add_number - REG_GR;
5845 /* Ignore invalid operands; they generate errors elsewhere. */
5848 if (strncmp (idesc->name, "add", 3) != 0
5849 && strncmp (idesc->name, "sub", 3) != 0
5850 && strncmp (idesc->name, "shladd", 6) != 0
5851 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5852 this_group->g_reg_set_conditionally[regno] = 1;
5856 /* Test whether this could be the third insn in a problematic sequence. */
5857 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5859 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5860 idesc->operands[i] == IA64_OPND_R3
5861 /* For mov indirect. */
5862 || idesc->operands[i] == IA64_OPND_RR_R3
5863 || idesc->operands[i] == IA64_OPND_DBR_R3
5864 || idesc->operands[i] == IA64_OPND_IBR_R3
5865 || idesc->operands[i] == IA64_OPND_PKR_R3
5866 || idesc->operands[i] == IA64_OPND_PMC_R3
5867 || idesc->operands[i] == IA64_OPND_PMD_R3
5868 || idesc->operands[i] == IA64_OPND_MSR_R3
5869 || idesc->operands[i] == IA64_OPND_CPUID_R3
5871 || idesc->operands[i] == IA64_OPND_ITR_R3
5872 || idesc->operands[i] == IA64_OPND_DTR_R3
5873 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5874 || idesc->operands[i] == IA64_OPND_MR3)
5876 int regno = slot->opnd[i].X_add_number - REG_GR;
5877 /* Ignore invalid operands; they generate errors elsewhere. */
5880 if (idesc->operands[i] == IA64_OPND_R3)
5882 if (strcmp (idesc->name, "fc") != 0
5883 && strcmp (idesc->name, "tak") != 0
5884 && strcmp (idesc->name, "thash") != 0
5885 && strcmp (idesc->name, "tpa") != 0
5886 && strcmp (idesc->name, "ttag") != 0
5887 && strncmp (idesc->name, "ptr", 3) != 0
5888 && strncmp (idesc->name, "ptc", 3) != 0
5889 && strncmp (idesc->name, "probe", 5) != 0)
5892 if (prev_group->g_reg_set_conditionally[regno])
5900 build_insn (slot, insnp)
5904 const struct ia64_operand *odesc, *o2desc;
5905 struct ia64_opcode *idesc = slot->idesc;
5906 bfd_signed_vma insn, val;
5910 insn = idesc->opcode | slot->qp_regno;
5912 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
5914 if (slot->opnd[i].X_op == O_register
5915 || slot->opnd[i].X_op == O_constant
5916 || slot->opnd[i].X_op == O_index)
5917 val = slot->opnd[i].X_add_number;
5918 else if (slot->opnd[i].X_op == O_big)
5920 /* This must be the value 0x10000000000000000. */
5921 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
5927 switch (idesc->operands[i])
5929 case IA64_OPND_IMMU64:
5930 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
5931 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
5932 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
5933 | (((val >> 63) & 0x1) << 36));
5936 case IA64_OPND_IMMU62:
5937 val &= 0x3fffffffffffffffULL;
5938 if (val != slot->opnd[i].X_add_number)
5939 as_warn (_("Value truncated to 62 bits"));
5940 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
5941 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
5944 case IA64_OPND_TGT64:
5946 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
5947 insn |= ((((val >> 59) & 0x1) << 36)
5948 | (((val >> 0) & 0xfffff) << 13));
5979 case IA64_OPND_R3_2:
5980 case IA64_OPND_CPUID_R3:
5981 case IA64_OPND_DBR_R3:
5982 case IA64_OPND_DTR_R3:
5983 case IA64_OPND_ITR_R3:
5984 case IA64_OPND_IBR_R3:
5986 case IA64_OPND_MSR_R3:
5987 case IA64_OPND_PKR_R3:
5988 case IA64_OPND_PMC_R3:
5989 case IA64_OPND_PMD_R3:
5990 case IA64_OPND_RR_R3:
5998 odesc = elf64_ia64_operands + idesc->operands[i];
5999 err = (*odesc->insert) (odesc, val, &insn);
6001 as_bad_where (slot->src_file, slot->src_line,
6002 "Bad operand value: %s", err);
6003 if (idesc->flags & IA64_OPCODE_PSEUDO)
6005 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6006 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6008 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6009 (*o2desc->insert) (o2desc, val, &insn);
6011 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6012 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6013 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6015 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6016 (*o2desc->insert) (o2desc, 64 - val, &insn);
6026 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6027 unsigned int manual_bundling = 0;
6028 enum ia64_unit required_unit, insn_unit = 0;
6029 enum ia64_insn_type type[3], insn_type;
6030 unsigned int template, orig_template;
6031 bfd_vma insn[3] = { -1, -1, -1 };
6032 struct ia64_opcode *idesc;
6033 int end_of_insn_group = 0, user_template = -1;
6034 int n, i, j, first, curr;
6036 bfd_vma t0 = 0, t1 = 0;
6037 struct label_fix *lfix;
6038 struct insn_fix *ifix;
6043 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6044 know (first >= 0 & first < NUM_SLOTS);
6045 n = MIN (3, md.num_slots_in_use);
6047 /* Determine template: user user_template if specified, best match
6050 if (md.slot[first].user_template >= 0)
6051 user_template = template = md.slot[first].user_template;
6054 /* Auto select appropriate template. */
6055 memset (type, 0, sizeof (type));
6057 for (i = 0; i < n; ++i)
6059 if (md.slot[curr].label_fixups && i != 0)
6061 type[i] = md.slot[curr].idesc->type;
6062 curr = (curr + 1) % NUM_SLOTS;
6064 template = best_template[type[0]][type[1]][type[2]];
6067 /* initialize instructions with appropriate nops: */
6068 for (i = 0; i < 3; ++i)
6069 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6073 /* now fill in slots with as many insns as possible: */
6075 idesc = md.slot[curr].idesc;
6076 end_of_insn_group = 0;
6077 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6079 /* Set the slot number for prologue/body records now as those
6080 refer to the current point, not the point after the
6081 instruction has been issued: */
6082 /* Don't try to delete prologue/body records here, as that will cause
6083 them to also be deleted from the master list of unwind records. */
6084 for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next)
6085 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6086 || ptr->r.type == body)
6088 ptr->slot_number = (unsigned long) f + i;
6089 ptr->slot_frag = frag_now;
6092 if (idesc->flags & IA64_OPCODE_SLOT2)
6094 if (manual_bundling && i != 2)
6095 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6096 "`%s' must be last in bundle", idesc->name);
6100 if (idesc->flags & IA64_OPCODE_LAST)
6103 unsigned int required_template;
6105 /* If we need a stop bit after an M slot, our only choice is
6106 template 5 (M;;MI). If we need a stop bit after a B
6107 slot, our only choice is to place it at the end of the
6108 bundle, because the only available templates are MIB,
6109 MBB, BBB, MMB, and MFB. We don't handle anything other
6110 than M and B slots because these are the only kind of
6111 instructions that can have the IA64_OPCODE_LAST bit set. */
6112 required_template = template;
6113 switch (idesc->type)
6117 required_template = 5;
6125 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6126 "Internal error: don't know how to force %s to end"
6127 "of instruction group", idesc->name);
6131 if (manual_bundling && i != required_slot)
6132 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6133 "`%s' must be last in instruction group",
6135 if (required_slot < i)
6136 /* Can't fit this instruction. */
6140 if (required_template != template)
6142 /* If we switch the template, we need to reset the NOPs
6143 after slot i. The slot-types of the instructions ahead
6144 of i never change, so we don't need to worry about
6145 changing NOPs in front of this slot. */
6146 for (j = i; j < 3; ++j)
6147 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6149 template = required_template;
6151 if (curr != first && md.slot[curr].label_fixups)
6153 if (manual_bundling_on)
6154 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6155 "Label must be first in a bundle");
6156 /* This insn must go into the first slot of a bundle. */
6160 manual_bundling_on = md.slot[curr].manual_bundling_on;
6161 manual_bundling_off = md.slot[curr].manual_bundling_off;
6163 if (manual_bundling_on)
6166 manual_bundling = 1;
6168 break; /* need to start a new bundle */
6171 if (end_of_insn_group && md.num_slots_in_use >= 1)
6173 /* We need an instruction group boundary in the middle of a
6174 bundle. See if we can switch to an other template with
6175 an appropriate boundary. */
6177 orig_template = template;
6178 if (i == 1 && (user_template == 4
6179 || (user_template < 0
6180 && (ia64_templ_desc[template].exec_unit[0]
6184 end_of_insn_group = 0;
6186 else if (i == 2 && (user_template == 0
6187 || (user_template < 0
6188 && (ia64_templ_desc[template].exec_unit[1]
6190 /* This test makes sure we don't switch the template if
6191 the next instruction is one that needs to be first in
6192 an instruction group. Since all those instructions are
6193 in the M group, there is no way such an instruction can
6194 fit in this bundle even if we switch the template. The
6195 reason we have to check for this is that otherwise we
6196 may end up generating "MI;;I M.." which has the deadly
6197 effect that the second M instruction is no longer the
6198 first in the bundle! --davidm 99/12/16 */
6199 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6202 end_of_insn_group = 0;
6204 else if (curr != first)
6205 /* can't fit this insn */
6208 if (template != orig_template)
6209 /* if we switch the template, we need to reset the NOPs
6210 after slot i. The slot-types of the instructions ahead
6211 of i never change, so we don't need to worry about
6212 changing NOPs in front of this slot. */
6213 for (j = i; j < 3; ++j)
6214 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6216 required_unit = ia64_templ_desc[template].exec_unit[i];
6218 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6219 if (idesc->type == IA64_TYPE_DYN)
6221 if ((strcmp (idesc->name, "nop") == 0)
6222 || (strcmp (idesc->name, "hint") == 0)
6223 || (strcmp (idesc->name, "break") == 0))
6224 insn_unit = required_unit;
6225 else if (strcmp (idesc->name, "chk.s") == 0)
6227 insn_unit = IA64_UNIT_M;
6228 if (required_unit == IA64_UNIT_I)
6229 insn_unit = IA64_UNIT_I;
6232 as_fatal ("emit_one_bundle: unexpected dynamic op");
6234 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6235 ia64_free_opcode (idesc);
6236 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6238 know (!idesc->next); /* no resolved dynamic ops have collisions */
6243 insn_type = idesc->type;
6244 insn_unit = IA64_UNIT_NIL;
6248 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6249 insn_unit = required_unit;
6251 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6252 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6253 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6254 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6255 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6260 if (insn_unit != required_unit)
6262 if (required_unit == IA64_UNIT_L
6263 && insn_unit == IA64_UNIT_I
6264 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6266 /* we got ourselves an MLX template but the current
6267 instruction isn't an X-unit, or an I-unit instruction
6268 that can go into the X slot of an MLX template. Duh. */
6269 if (md.num_slots_in_use >= NUM_SLOTS)
6271 as_bad_where (md.slot[curr].src_file,
6272 md.slot[curr].src_line,
6273 "`%s' can't go in X slot of "
6274 "MLX template", idesc->name);
6275 /* drop this insn so we don't livelock: */
6276 --md.num_slots_in_use;
6280 continue; /* try next slot */
6286 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6287 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6290 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6291 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6293 build_insn (md.slot + curr, insn + i);
6295 /* Set slot counts for non prologue/body unwind records. */
6296 for (ptr = md.slot[curr].unwind_record; ptr; ptr = ptr->next)
6297 if (ptr->r.type != prologue && ptr->r.type != prologue_gr
6298 && ptr->r.type != body)
6300 ptr->slot_number = (unsigned long) f + i;
6301 ptr->slot_frag = frag_now;
6303 md.slot[curr].unwind_record = NULL;
6305 if (required_unit == IA64_UNIT_L)
6308 /* skip one slot for long/X-unit instructions */
6311 --md.num_slots_in_use;
6313 /* now is a good time to fix up the labels for this insn: */
6314 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6316 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6317 symbol_set_frag (lfix->sym, frag_now);
6319 /* and fix up the tags also. */
6320 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6322 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6323 symbol_set_frag (lfix->sym, frag_now);
6326 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6328 ifix = md.slot[curr].fixup + j;
6329 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6330 &ifix->expr, ifix->is_pcrel, ifix->code);
6331 fix->tc_fix_data.opnd = ifix->opnd;
6332 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6333 fix->fx_file = md.slot[curr].src_file;
6334 fix->fx_line = md.slot[curr].src_line;
6337 end_of_insn_group = md.slot[curr].end_of_insn_group;
6339 if (end_of_insn_group)
6341 md.group_idx = (md.group_idx + 1) % 3;
6342 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6346 ia64_free_opcode (md.slot[curr].idesc);
6347 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6348 md.slot[curr].user_template = -1;
6350 if (manual_bundling_off)
6352 manual_bundling = 0;
6355 curr = (curr + 1) % NUM_SLOTS;
6356 idesc = md.slot[curr].idesc;
6358 if (manual_bundling)
6360 if (md.num_slots_in_use > 0)
6361 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6362 "`%s' does not fit into %s template",
6363 idesc->name, ia64_templ_desc[template].name);
6365 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6366 "Missing '}' at end of file");
6368 know (md.num_slots_in_use < NUM_SLOTS);
6370 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6371 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6373 number_to_chars_littleendian (f + 0, t0, 8);
6374 number_to_chars_littleendian (f + 8, t1, 8);
6378 unwind.list->next_slot_number = (unsigned long) f + 16;
6379 unwind.list->next_slot_frag = frag_now;
6384 md_parse_option (c, arg)
6391 /* Switches from the Intel assembler. */
6393 if (strcmp (arg, "ilp64") == 0
6394 || strcmp (arg, "lp64") == 0
6395 || strcmp (arg, "p64") == 0)
6397 md.flags |= EF_IA_64_ABI64;
6399 else if (strcmp (arg, "ilp32") == 0)
6401 md.flags &= ~EF_IA_64_ABI64;
6403 else if (strcmp (arg, "le") == 0)
6405 md.flags &= ~EF_IA_64_BE;
6407 else if (strcmp (arg, "be") == 0)
6409 md.flags |= EF_IA_64_BE;
6416 if (strcmp (arg, "so") == 0)
6418 /* Suppress signon message. */
6420 else if (strcmp (arg, "pi") == 0)
6422 /* Reject privileged instructions. FIXME */
6424 else if (strcmp (arg, "us") == 0)
6426 /* Allow union of signed and unsigned range. FIXME */
6428 else if (strcmp (arg, "close_fcalls") == 0)
6430 /* Do not resolve global function calls. */
6437 /* temp[="prefix"] Insert temporary labels into the object file
6438 symbol table prefixed by "prefix".
6439 Default prefix is ":temp:".
6444 /* indirect=<tgt> Assume unannotated indirect branches behavior
6445 according to <tgt> --
6446 exit: branch out from the current context (default)
6447 labels: all labels in context may be branch targets
6449 if (strncmp (arg, "indirect=", 9) != 0)
6454 /* -X conflicts with an ignored option, use -x instead */
6456 if (!arg || strcmp (arg, "explicit") == 0)
6458 /* set default mode to explicit */
6459 md.default_explicit_mode = 1;
6462 else if (strcmp (arg, "auto") == 0)
6464 md.default_explicit_mode = 0;
6466 else if (strcmp (arg, "debug") == 0)
6470 else if (strcmp (arg, "debugx") == 0)
6472 md.default_explicit_mode = 1;
6477 as_bad (_("Unrecognized option '-x%s'"), arg);
6482 /* nops Print nops statistics. */
6485 /* GNU specific switches for gcc. */
6486 case OPTION_MCONSTANT_GP:
6487 md.flags |= EF_IA_64_CONS_GP;
6490 case OPTION_MAUTO_PIC:
6491 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6502 md_show_usage (stream)
6507 --mconstant-gp mark output file as using the constant-GP model\n\
6508 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6509 --mauto-pic mark output file as using the constant-GP model\n\
6510 without function descriptors (sets ELF header flag\n\
6511 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6512 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6513 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6514 -x | -xexplicit turn on dependency violation checking (default)\n\
6515 -xauto automagically remove dependency violations\n\
6516 -xdebug debug dependency violation checker\n"),
6521 ia64_after_parse_args ()
6523 if (debug_type == DEBUG_STABS)
6524 as_fatal (_("--gstabs is not supported for ia64"));
6527 /* Return true if TYPE fits in TEMPL at SLOT. */
6530 match (int templ, int type, int slot)
6532 enum ia64_unit unit;
6535 unit = ia64_templ_desc[templ].exec_unit[slot];
6538 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6540 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6542 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6543 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6544 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6545 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6546 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6547 default: result = 0; break;
6552 /* Add a bit of extra goodness if a nop of type F or B would fit
6553 in TEMPL at SLOT. */
6556 extra_goodness (int templ, int slot)
6558 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6560 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6565 /* This function is called once, at assembler startup time. It sets
6566 up all the tables, etc. that the MD part of the assembler will need
6567 that can be determined before arguments are parsed. */
6571 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6576 md.explicit_mode = md.default_explicit_mode;
6578 bfd_set_section_alignment (stdoutput, text_section, 4);
6580 /* Make sure function pointers get initialized. */
6581 target_big_endian = -1;
6582 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6584 alias_hash = hash_new ();
6585 alias_name_hash = hash_new ();
6586 secalias_hash = hash_new ();
6587 secalias_name_hash = hash_new ();
6589 pseudo_func[FUNC_DTP_MODULE].u.sym =
6590 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6591 &zero_address_frag);
6593 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6594 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6595 &zero_address_frag);
6597 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6598 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6599 &zero_address_frag);
6601 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6602 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6603 &zero_address_frag);
6605 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6606 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6607 &zero_address_frag);
6609 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6610 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6611 &zero_address_frag);
6613 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6614 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6615 &zero_address_frag);
6617 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6618 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6619 &zero_address_frag);
6621 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6622 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6623 &zero_address_frag);
6625 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6626 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6627 &zero_address_frag);
6629 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6630 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6631 &zero_address_frag);
6633 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6634 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6635 &zero_address_frag);
6637 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6638 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6639 &zero_address_frag);
6641 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6642 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6643 &zero_address_frag);
6645 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6646 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6647 &zero_address_frag);
6649 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6650 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6651 &zero_address_frag);
6653 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6654 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6655 &zero_address_frag);
6657 /* Compute the table of best templates. We compute goodness as a
6658 base 4 value, in which each match counts for 3, each F counts
6659 for 2, each B counts for 1. This should maximize the number of
6660 F and B nops in the chosen bundles, which is good because these
6661 pipelines are least likely to be overcommitted. */
6662 for (i = 0; i < IA64_NUM_TYPES; ++i)
6663 for (j = 0; j < IA64_NUM_TYPES; ++j)
6664 for (k = 0; k < IA64_NUM_TYPES; ++k)
6667 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6670 if (match (t, i, 0))
6672 if (match (t, j, 1))
6674 if (match (t, k, 2))
6675 goodness = 3 + 3 + 3;
6677 goodness = 3 + 3 + extra_goodness (t, 2);
6679 else if (match (t, j, 2))
6680 goodness = 3 + 3 + extra_goodness (t, 1);
6684 goodness += extra_goodness (t, 1);
6685 goodness += extra_goodness (t, 2);
6688 else if (match (t, i, 1))
6690 if (match (t, j, 2))
6693 goodness = 3 + extra_goodness (t, 2);
6695 else if (match (t, i, 2))
6696 goodness = 3 + extra_goodness (t, 1);
6698 if (goodness > best)
6701 best_template[i][j][k] = t;
6706 for (i = 0; i < NUM_SLOTS; ++i)
6707 md.slot[i].user_template = -1;
6709 md.pseudo_hash = hash_new ();
6710 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6712 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6713 (void *) (pseudo_opcode + i));
6715 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6716 pseudo_opcode[i].name, err);
6719 md.reg_hash = hash_new ();
6720 md.dynreg_hash = hash_new ();
6721 md.const_hash = hash_new ();
6722 md.entry_hash = hash_new ();
6724 /* general registers: */
6727 for (i = 0; i < total; ++i)
6729 sprintf (name, "r%d", i - REG_GR);
6730 md.regsym[i] = declare_register (name, i);
6733 /* floating point registers: */
6735 for (; i < total; ++i)
6737 sprintf (name, "f%d", i - REG_FR);
6738 md.regsym[i] = declare_register (name, i);
6741 /* application registers: */
6744 for (; i < total; ++i)
6746 sprintf (name, "ar%d", i - REG_AR);
6747 md.regsym[i] = declare_register (name, i);
6750 /* control registers: */
6753 for (; i < total; ++i)
6755 sprintf (name, "cr%d", i - REG_CR);
6756 md.regsym[i] = declare_register (name, i);
6759 /* predicate registers: */
6761 for (; i < total; ++i)
6763 sprintf (name, "p%d", i - REG_P);
6764 md.regsym[i] = declare_register (name, i);
6767 /* branch registers: */
6769 for (; i < total; ++i)
6771 sprintf (name, "b%d", i - REG_BR);
6772 md.regsym[i] = declare_register (name, i);
6775 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6776 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6777 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6778 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6779 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6780 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6781 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6783 for (i = 0; i < NELEMS (indirect_reg); ++i)
6785 regnum = indirect_reg[i].regnum;
6786 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6789 /* define synonyms for application registers: */
6790 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6791 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6792 REG_AR + ar[i - REG_AR].regnum);
6794 /* define synonyms for control registers: */
6795 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6796 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6797 REG_CR + cr[i - REG_CR].regnum);
6799 declare_register ("gp", REG_GR + 1);
6800 declare_register ("sp", REG_GR + 12);
6801 declare_register ("rp", REG_BR + 0);
6803 /* pseudo-registers used to specify unwind info: */
6804 declare_register ("psp", REG_PSP);
6806 declare_register_set ("ret", 4, REG_GR + 8);
6807 declare_register_set ("farg", 8, REG_FR + 8);
6808 declare_register_set ("fret", 8, REG_FR + 8);
6810 for (i = 0; i < NELEMS (const_bits); ++i)
6812 err = hash_insert (md.const_hash, const_bits[i].name,
6813 (PTR) (const_bits + i));
6815 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6819 /* Set the architecture and machine depending on defaults and command line
6821 if (md.flags & EF_IA_64_ABI64)
6822 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6824 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6827 as_warn (_("Could not set architecture and machine"));
6829 /* Set the pointer size and pointer shift size depending on md.flags */
6831 if (md.flags & EF_IA_64_ABI64)
6833 md.pointer_size = 8; /* pointers are 8 bytes */
6834 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6838 md.pointer_size = 4; /* pointers are 4 bytes */
6839 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6842 md.mem_offset.hint = 0;
6845 md.entry_labels = NULL;
6848 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6849 because that is called after md_parse_option which is where we do the
6850 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6851 default endianness. */
6854 ia64_init (argc, argv)
6855 int argc ATTRIBUTE_UNUSED;
6856 char **argv ATTRIBUTE_UNUSED;
6858 md.flags = MD_FLAGS_DEFAULT;
6861 /* Return a string for the target object file format. */
6864 ia64_target_format ()
6866 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6868 if (md.flags & EF_IA_64_BE)
6870 if (md.flags & EF_IA_64_ABI64)
6871 #if defined(TE_AIX50)
6872 return "elf64-ia64-aix-big";
6873 #elif defined(TE_HPUX)
6874 return "elf64-ia64-hpux-big";
6876 return "elf64-ia64-big";
6879 #if defined(TE_AIX50)
6880 return "elf32-ia64-aix-big";
6881 #elif defined(TE_HPUX)
6882 return "elf32-ia64-hpux-big";
6884 return "elf32-ia64-big";
6889 if (md.flags & EF_IA_64_ABI64)
6891 return "elf64-ia64-aix-little";
6893 return "elf64-ia64-little";
6897 return "elf32-ia64-aix-little";
6899 return "elf32-ia64-little";
6904 return "unknown-format";
6908 ia64_end_of_source ()
6910 /* terminate insn group upon reaching end of file: */
6911 insn_group_break (1, 0, 0);
6913 /* emits slots we haven't written yet: */
6914 ia64_flush_insns ();
6916 bfd_set_private_flags (stdoutput, md.flags);
6918 md.mem_offset.hint = 0;
6924 if (md.qp.X_op == O_register)
6925 as_bad ("qualifying predicate not followed by instruction");
6926 md.qp.X_op = O_absent;
6928 if (ignore_input ())
6931 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
6933 if (md.detect_dv && !md.explicit_mode)
6934 as_warn (_("Explicit stops are ignored in auto mode"));
6936 insn_group_break (1, 0, 0);
6940 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
6942 static int defining_tag = 0;
6945 ia64_unrecognized_line (ch)
6951 expression (&md.qp);
6952 if (*input_line_pointer++ != ')')
6954 as_bad ("Expected ')'");
6957 if (md.qp.X_op != O_register)
6959 as_bad ("Qualifying predicate expected");
6962 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
6964 as_bad ("Predicate register expected");
6970 if (md.manual_bundling)
6971 as_warn ("Found '{' when manual bundling is already turned on");
6973 CURR_SLOT.manual_bundling_on = 1;
6974 md.manual_bundling = 1;
6976 /* Bundling is only acceptable in explicit mode
6977 or when in default automatic mode. */
6978 if (md.detect_dv && !md.explicit_mode)
6980 if (!md.mode_explicitly_set
6981 && !md.default_explicit_mode)
6984 as_warn (_("Found '{' after explicit switch to automatic mode"));
6989 if (!md.manual_bundling)
6990 as_warn ("Found '}' when manual bundling is off");
6992 PREV_SLOT.manual_bundling_off = 1;
6993 md.manual_bundling = 0;
6995 /* switch back to automatic mode, if applicable */
6998 && !md.mode_explicitly_set
6999 && !md.default_explicit_mode)
7002 /* Allow '{' to follow on the same line. We also allow ";;", but that
7003 happens automatically because ';' is an end of line marker. */
7005 if (input_line_pointer[0] == '{')
7007 input_line_pointer++;
7008 return ia64_unrecognized_line ('{');
7011 demand_empty_rest_of_line ();
7021 if (md.qp.X_op == O_register)
7023 as_bad ("Tag must come before qualifying predicate.");
7027 /* This implements just enough of read_a_source_file in read.c to
7028 recognize labels. */
7029 if (is_name_beginner (*input_line_pointer))
7031 s = input_line_pointer;
7032 c = get_symbol_end ();
7034 else if (LOCAL_LABELS_FB
7035 && ISDIGIT (*input_line_pointer))
7038 while (ISDIGIT (*input_line_pointer))
7039 temp = (temp * 10) + *input_line_pointer++ - '0';
7040 fb_label_instance_inc (temp);
7041 s = fb_label_name (temp, 0);
7042 c = *input_line_pointer;
7051 /* Put ':' back for error messages' sake. */
7052 *input_line_pointer++ = ':';
7053 as_bad ("Expected ':'");
7060 /* Put ':' back for error messages' sake. */
7061 *input_line_pointer++ = ':';
7062 if (*input_line_pointer++ != ']')
7064 as_bad ("Expected ']'");
7069 as_bad ("Tag name expected");
7079 /* Not a valid line. */
7084 ia64_frob_label (sym)
7087 struct label_fix *fix;
7089 /* Tags need special handling since they are not bundle breaks like
7093 fix = obstack_alloc (¬es, sizeof (*fix));
7095 fix->next = CURR_SLOT.tag_fixups;
7096 CURR_SLOT.tag_fixups = fix;
7101 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7103 md.last_text_seg = now_seg;
7104 fix = obstack_alloc (¬es, sizeof (*fix));
7106 fix->next = CURR_SLOT.label_fixups;
7107 CURR_SLOT.label_fixups = fix;
7109 /* Keep track of how many code entry points we've seen. */
7110 if (md.path == md.maxpaths)
7113 md.entry_labels = (const char **)
7114 xrealloc ((void *) md.entry_labels,
7115 md.maxpaths * sizeof (char *));
7117 md.entry_labels[md.path++] = S_GET_NAME (sym);
7122 ia64_flush_pending_output ()
7124 if (!md.keep_pending_output
7125 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7127 /* ??? This causes many unnecessary stop bits to be emitted.
7128 Unfortunately, it isn't clear if it is safe to remove this. */
7129 insn_group_break (1, 0, 0);
7130 ia64_flush_insns ();
7134 /* Do ia64-specific expression optimization. All that's done here is
7135 to transform index expressions that are either due to the indexing
7136 of rotating registers or due to the indexing of indirect register
7139 ia64_optimize_expr (l, op, r)
7148 if (l->X_op == O_register && r->X_op == O_constant)
7150 num_regs = (l->X_add_number >> 16);
7151 if ((unsigned) r->X_add_number >= num_regs)
7154 as_bad ("No current frame");
7156 as_bad ("Index out of range 0..%u", num_regs - 1);
7157 r->X_add_number = 0;
7159 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7162 else if (l->X_op == O_register && r->X_op == O_register)
7164 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7165 || l->X_add_number == IND_MEM)
7167 as_bad ("Indirect register set name expected");
7168 l->X_add_number = IND_CPUID;
7171 l->X_op_symbol = md.regsym[l->X_add_number];
7172 l->X_add_number = r->X_add_number;
7180 ia64_parse_name (name, e)
7184 struct const_desc *cdesc;
7185 struct dynreg *dr = 0;
7186 unsigned int regnum;
7190 /* first see if NAME is a known register name: */
7191 sym = hash_find (md.reg_hash, name);
7194 e->X_op = O_register;
7195 e->X_add_number = S_GET_VALUE (sym);
7199 cdesc = hash_find (md.const_hash, name);
7202 e->X_op = O_constant;
7203 e->X_add_number = cdesc->value;
7207 /* check for inN, locN, or outN: */
7211 if (name[1] == 'n' && ISDIGIT (name[2]))
7219 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7227 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7240 /* The name is inN, locN, or outN; parse the register number. */
7241 regnum = strtoul (name, &end, 10);
7242 if (end > name && *end == '\0')
7244 if ((unsigned) regnum >= dr->num_regs)
7247 as_bad ("No current frame");
7249 as_bad ("Register number out of range 0..%u",
7253 e->X_op = O_register;
7254 e->X_add_number = dr->base + regnum;
7259 if ((dr = hash_find (md.dynreg_hash, name)))
7261 /* We've got ourselves the name of a rotating register set.
7262 Store the base register number in the low 16 bits of
7263 X_add_number and the size of the register set in the top 16
7265 e->X_op = O_register;
7266 e->X_add_number = dr->base | (dr->num_regs << 16);
7272 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7275 ia64_canonicalize_symbol_name (name)
7278 size_t len = strlen (name);
7279 if (len > 1 && name[len - 1] == '#')
7280 name[len - 1] = '\0';
7284 /* Return true if idesc is a conditional branch instruction. This excludes
7285 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7286 because they always read/write resources regardless of the value of the
7287 qualifying predicate. br.ia must always use p0, and hence is always
7288 taken. Thus this function returns true for branches which can fall
7289 through, and which use no resources if they do fall through. */
7292 is_conditional_branch (idesc)
7293 struct ia64_opcode *idesc;
7295 /* br is a conditional branch. Everything that starts with br. except
7296 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7297 Everything that starts with brl is a conditional branch. */
7298 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7299 && (idesc->name[2] == '\0'
7300 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7301 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7302 || idesc->name[2] == 'l'
7303 /* br.cond, br.call, br.clr */
7304 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7305 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7306 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7309 /* Return whether the given opcode is a taken branch. If there's any doubt,
7313 is_taken_branch (idesc)
7314 struct ia64_opcode *idesc;
7316 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7317 || strncmp (idesc->name, "br.ia", 5) == 0);
7320 /* Return whether the given opcode is an interruption or rfi. If there's any
7321 doubt, returns zero. */
7324 is_interruption_or_rfi (idesc)
7325 struct ia64_opcode *idesc;
7327 if (strcmp (idesc->name, "rfi") == 0)
7332 /* Returns the index of the given dependency in the opcode's list of chks, or
7333 -1 if there is no dependency. */
7336 depends_on (depind, idesc)
7338 struct ia64_opcode *idesc;
7341 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7342 for (i = 0; i < dep->nchks; i++)
7344 if (depind == DEP (dep->chks[i]))
7350 /* Determine a set of specific resources used for a particular resource
7351 class. Returns the number of specific resources identified For those
7352 cases which are not determinable statically, the resource returned is
7355 Meanings of value in 'NOTE':
7356 1) only read/write when the register number is explicitly encoded in the
7358 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7359 accesses CFM when qualifying predicate is in the rotating region.
7360 3) general register value is used to specify an indirect register; not
7361 determinable statically.
7362 4) only read the given resource when bits 7:0 of the indirect index
7363 register value does not match the register number of the resource; not
7364 determinable statically.
7365 5) all rules are implementation specific.
7366 6) only when both the index specified by the reader and the index specified
7367 by the writer have the same value in bits 63:61; not determinable
7369 7) only access the specified resource when the corresponding mask bit is
7371 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7372 only read when these insns reference FR2-31
7373 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7374 written when these insns write FR32-127
7375 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7377 11) The target predicates are written independently of PR[qp], but source
7378 registers are only read if PR[qp] is true. Since the state of PR[qp]
7379 cannot statically be determined, all source registers are marked used.
7380 12) This insn only reads the specified predicate register when that
7381 register is the PR[qp].
7382 13) This reference to ld-c only applies to teh GR whose value is loaded
7383 with data returned from memory, not the post-incremented address register.
7384 14) The RSE resource includes the implementation-specific RSE internal
7385 state resources. At least one (and possibly more) of these resources are
7386 read by each instruction listed in IC:rse-readers. At least one (and
7387 possibly more) of these resources are written by each insn listed in
7389 15+16) Represents reserved instructions, which the assembler does not
7392 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7393 this code; there are no dependency violations based on memory access.
7396 #define MAX_SPECS 256
7401 specify_resource (dep, idesc, type, specs, note, path)
7402 const struct ia64_dependency *dep;
7403 struct ia64_opcode *idesc;
7404 int type; /* is this a DV chk or a DV reg? */
7405 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7406 int note; /* resource note for this insn's usage */
7407 int path; /* which execution path to examine */
7414 if (dep->mode == IA64_DV_WAW
7415 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7416 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7419 /* template for any resources we identify */
7420 tmpl.dependency = dep;
7422 tmpl.insn_srlz = tmpl.data_srlz = 0;
7423 tmpl.qp_regno = CURR_SLOT.qp_regno;
7424 tmpl.link_to_qp_branch = 1;
7425 tmpl.mem_offset.hint = 0;
7428 tmpl.cmp_type = CMP_NONE;
7431 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7432 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7433 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7435 /* we don't need to track these */
7436 if (dep->semantics == IA64_DVS_NONE)
7439 switch (dep->specifier)
7444 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7446 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7447 if (regno >= 0 && regno <= 7)
7449 specs[count] = tmpl;
7450 specs[count++].index = regno;
7456 for (i = 0; i < 8; i++)
7458 specs[count] = tmpl;
7459 specs[count++].index = i;
7468 case IA64_RS_AR_UNAT:
7469 /* This is a mov =AR or mov AR= instruction. */
7470 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7472 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7473 if (regno == AR_UNAT)
7475 specs[count++] = tmpl;
7480 /* This is a spill/fill, or other instruction that modifies the
7483 /* Unless we can determine the specific bits used, mark the whole
7484 thing; bits 8:3 of the memory address indicate the bit used in
7485 UNAT. The .mem.offset hint may be used to eliminate a small
7486 subset of conflicts. */
7487 specs[count] = tmpl;
7488 if (md.mem_offset.hint)
7491 fprintf (stderr, " Using hint for spill/fill\n");
7492 /* The index isn't actually used, just set it to something
7493 approximating the bit index. */
7494 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7495 specs[count].mem_offset.hint = 1;
7496 specs[count].mem_offset.offset = md.mem_offset.offset;
7497 specs[count++].mem_offset.base = md.mem_offset.base;
7501 specs[count++].specific = 0;
7509 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7511 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7512 if ((regno >= 8 && regno <= 15)
7513 || (regno >= 20 && regno <= 23)
7514 || (regno >= 31 && regno <= 39)
7515 || (regno >= 41 && regno <= 47)
7516 || (regno >= 67 && regno <= 111))
7518 specs[count] = tmpl;
7519 specs[count++].index = regno;
7532 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7534 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7535 if ((regno >= 48 && regno <= 63)
7536 || (regno >= 112 && regno <= 127))
7538 specs[count] = tmpl;
7539 specs[count++].index = regno;
7545 for (i = 48; i < 64; i++)
7547 specs[count] = tmpl;
7548 specs[count++].index = i;
7550 for (i = 112; i < 128; i++)
7552 specs[count] = tmpl;
7553 specs[count++].index = i;
7571 for (i = 0; i < idesc->num_outputs; i++)
7572 if (idesc->operands[i] == IA64_OPND_B1
7573 || idesc->operands[i] == IA64_OPND_B2)
7575 specs[count] = tmpl;
7576 specs[count++].index =
7577 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7582 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7583 if (idesc->operands[i] == IA64_OPND_B1
7584 || idesc->operands[i] == IA64_OPND_B2)
7586 specs[count] = tmpl;
7587 specs[count++].index =
7588 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7594 case IA64_RS_CPUID: /* four or more registers */
7597 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7599 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7600 if (regno >= 0 && regno < NELEMS (gr_values)
7603 specs[count] = tmpl;
7604 specs[count++].index = gr_values[regno].value & 0xFF;
7608 specs[count] = tmpl;
7609 specs[count++].specific = 0;
7619 case IA64_RS_DBR: /* four or more registers */
7622 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7624 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7625 if (regno >= 0 && regno < NELEMS (gr_values)
7628 specs[count] = tmpl;
7629 specs[count++].index = gr_values[regno].value & 0xFF;
7633 specs[count] = tmpl;
7634 specs[count++].specific = 0;
7638 else if (note == 0 && !rsrc_write)
7640 specs[count] = tmpl;
7641 specs[count++].specific = 0;
7649 case IA64_RS_IBR: /* four or more registers */
7652 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7654 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7655 if (regno >= 0 && regno < NELEMS (gr_values)
7658 specs[count] = tmpl;
7659 specs[count++].index = gr_values[regno].value & 0xFF;
7663 specs[count] = tmpl;
7664 specs[count++].specific = 0;
7677 /* These are implementation specific. Force all references to
7678 conflict with all other references. */
7679 specs[count] = tmpl;
7680 specs[count++].specific = 0;
7688 case IA64_RS_PKR: /* 16 or more registers */
7689 if (note == 3 || note == 4)
7691 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7693 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7694 if (regno >= 0 && regno < NELEMS (gr_values)
7699 specs[count] = tmpl;
7700 specs[count++].index = gr_values[regno].value & 0xFF;
7703 for (i = 0; i < NELEMS (gr_values); i++)
7705 /* Uses all registers *except* the one in R3. */
7706 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7708 specs[count] = tmpl;
7709 specs[count++].index = i;
7715 specs[count] = tmpl;
7716 specs[count++].specific = 0;
7723 specs[count] = tmpl;
7724 specs[count++].specific = 0;
7728 case IA64_RS_PMC: /* four or more registers */
7731 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7732 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7735 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7737 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7738 if (regno >= 0 && regno < NELEMS (gr_values)
7741 specs[count] = tmpl;
7742 specs[count++].index = gr_values[regno].value & 0xFF;
7746 specs[count] = tmpl;
7747 specs[count++].specific = 0;
7757 case IA64_RS_PMD: /* four or more registers */
7760 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7762 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7763 if (regno >= 0 && regno < NELEMS (gr_values)
7766 specs[count] = tmpl;
7767 specs[count++].index = gr_values[regno].value & 0xFF;
7771 specs[count] = tmpl;
7772 specs[count++].specific = 0;
7782 case IA64_RS_RR: /* eight registers */
7785 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7787 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7788 if (regno >= 0 && regno < NELEMS (gr_values)
7791 specs[count] = tmpl;
7792 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7796 specs[count] = tmpl;
7797 specs[count++].specific = 0;
7801 else if (note == 0 && !rsrc_write)
7803 specs[count] = tmpl;
7804 specs[count++].specific = 0;
7812 case IA64_RS_CR_IRR:
7815 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7816 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7818 && idesc->operands[1] == IA64_OPND_CR3
7821 for (i = 0; i < 4; i++)
7823 specs[count] = tmpl;
7824 specs[count++].index = CR_IRR0 + i;
7830 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7831 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7833 && regno <= CR_IRR3)
7835 specs[count] = tmpl;
7836 specs[count++].index = regno;
7845 case IA64_RS_CR_LRR:
7852 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7853 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7854 && (regno == CR_LRR0 || regno == CR_LRR1))
7856 specs[count] = tmpl;
7857 specs[count++].index = regno;
7865 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
7867 specs[count] = tmpl;
7868 specs[count++].index =
7869 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7884 else if (rsrc_write)
7886 if (dep->specifier == IA64_RS_FRb
7887 && idesc->operands[0] == IA64_OPND_F1)
7889 specs[count] = tmpl;
7890 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
7895 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7897 if (idesc->operands[i] == IA64_OPND_F2
7898 || idesc->operands[i] == IA64_OPND_F3
7899 || idesc->operands[i] == IA64_OPND_F4)
7901 specs[count] = tmpl;
7902 specs[count++].index =
7903 CURR_SLOT.opnd[i].X_add_number - REG_FR;
7912 /* This reference applies only to the GR whose value is loaded with
7913 data returned from memory. */
7914 specs[count] = tmpl;
7915 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
7921 for (i = 0; i < idesc->num_outputs; i++)
7922 if (idesc->operands[i] == IA64_OPND_R1
7923 || idesc->operands[i] == IA64_OPND_R2
7924 || idesc->operands[i] == IA64_OPND_R3)
7926 specs[count] = tmpl;
7927 specs[count++].index =
7928 CURR_SLOT.opnd[i].X_add_number - REG_GR;
7930 if (idesc->flags & IA64_OPCODE_POSTINC)
7931 for (i = 0; i < NELEMS (idesc->operands); i++)
7932 if (idesc->operands[i] == IA64_OPND_MR3)
7934 specs[count] = tmpl;
7935 specs[count++].index =
7936 CURR_SLOT.opnd[i].X_add_number - REG_GR;
7941 /* Look for anything that reads a GR. */
7942 for (i = 0; i < NELEMS (idesc->operands); i++)
7944 if (idesc->operands[i] == IA64_OPND_MR3
7945 || idesc->operands[i] == IA64_OPND_CPUID_R3
7946 || idesc->operands[i] == IA64_OPND_DBR_R3
7947 || idesc->operands[i] == IA64_OPND_IBR_R3
7948 || idesc->operands[i] == IA64_OPND_MSR_R3
7949 || idesc->operands[i] == IA64_OPND_PKR_R3
7950 || idesc->operands[i] == IA64_OPND_PMC_R3
7951 || idesc->operands[i] == IA64_OPND_PMD_R3
7952 || idesc->operands[i] == IA64_OPND_RR_R3
7953 || ((i >= idesc->num_outputs)
7954 && (idesc->operands[i] == IA64_OPND_R1
7955 || idesc->operands[i] == IA64_OPND_R2
7956 || idesc->operands[i] == IA64_OPND_R3
7957 /* addl source register. */
7958 || idesc->operands[i] == IA64_OPND_R3_2)))
7960 specs[count] = tmpl;
7961 specs[count++].index =
7962 CURR_SLOT.opnd[i].X_add_number - REG_GR;
7973 /* This is the same as IA64_RS_PRr, except that the register range is
7974 from 1 - 15, and there are no rotating register reads/writes here. */
7978 for (i = 1; i < 16; i++)
7980 specs[count] = tmpl;
7981 specs[count++].index = i;
7987 /* Mark only those registers indicated by the mask. */
7990 mask = CURR_SLOT.opnd[2].X_add_number;
7991 for (i = 1; i < 16; i++)
7992 if (mask & ((valueT) 1 << i))
7994 specs[count] = tmpl;
7995 specs[count++].index = i;
8003 else if (note == 11) /* note 11 implies note 1 as well */
8007 for (i = 0; i < idesc->num_outputs; i++)
8009 if (idesc->operands[i] == IA64_OPND_P1
8010 || idesc->operands[i] == IA64_OPND_P2)
8012 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8013 if (regno >= 1 && regno < 16)
8015 specs[count] = tmpl;
8016 specs[count++].index = regno;
8026 else if (note == 12)
8028 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8030 specs[count] = tmpl;
8031 specs[count++].index = CURR_SLOT.qp_regno;
8038 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8039 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8040 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8041 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8043 if ((idesc->operands[0] == IA64_OPND_P1
8044 || idesc->operands[0] == IA64_OPND_P2)
8045 && p1 >= 1 && p1 < 16)
8047 specs[count] = tmpl;
8048 specs[count].cmp_type =
8049 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8050 specs[count++].index = p1;
8052 if ((idesc->operands[1] == IA64_OPND_P1
8053 || idesc->operands[1] == IA64_OPND_P2)
8054 && p2 >= 1 && p2 < 16)
8056 specs[count] = tmpl;
8057 specs[count].cmp_type =
8058 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8059 specs[count++].index = p2;
8064 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8066 specs[count] = tmpl;
8067 specs[count++].index = CURR_SLOT.qp_regno;
8069 if (idesc->operands[1] == IA64_OPND_PR)
8071 for (i = 1; i < 16; i++)
8073 specs[count] = tmpl;
8074 specs[count++].index = i;
8085 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8086 simplified cases of this. */
8090 for (i = 16; i < 63; i++)
8092 specs[count] = tmpl;
8093 specs[count++].index = i;
8099 /* Mark only those registers indicated by the mask. */
8101 && idesc->operands[0] == IA64_OPND_PR)
8103 mask = CURR_SLOT.opnd[2].X_add_number;
8104 if (mask & ((valueT) 1 << 16))
8105 for (i = 16; i < 63; i++)
8107 specs[count] = tmpl;
8108 specs[count++].index = i;
8112 && idesc->operands[0] == IA64_OPND_PR_ROT)
8114 for (i = 16; i < 63; i++)
8116 specs[count] = tmpl;
8117 specs[count++].index = i;
8125 else if (note == 11) /* note 11 implies note 1 as well */
8129 for (i = 0; i < idesc->num_outputs; i++)
8131 if (idesc->operands[i] == IA64_OPND_P1
8132 || idesc->operands[i] == IA64_OPND_P2)
8134 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8135 if (regno >= 16 && regno < 63)
8137 specs[count] = tmpl;
8138 specs[count++].index = regno;
8148 else if (note == 12)
8150 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8152 specs[count] = tmpl;
8153 specs[count++].index = CURR_SLOT.qp_regno;
8160 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8161 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8162 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8163 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8165 if ((idesc->operands[0] == IA64_OPND_P1
8166 || idesc->operands[0] == IA64_OPND_P2)
8167 && p1 >= 16 && p1 < 63)
8169 specs[count] = tmpl;
8170 specs[count].cmp_type =
8171 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8172 specs[count++].index = p1;
8174 if ((idesc->operands[1] == IA64_OPND_P1
8175 || idesc->operands[1] == IA64_OPND_P2)
8176 && p2 >= 16 && p2 < 63)
8178 specs[count] = tmpl;
8179 specs[count].cmp_type =
8180 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8181 specs[count++].index = p2;
8186 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8188 specs[count] = tmpl;
8189 specs[count++].index = CURR_SLOT.qp_regno;
8191 if (idesc->operands[1] == IA64_OPND_PR)
8193 for (i = 16; i < 63; i++)
8195 specs[count] = tmpl;
8196 specs[count++].index = i;
8208 /* Verify that the instruction is using the PSR bit indicated in
8212 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8214 if (dep->regindex < 6)
8216 specs[count++] = tmpl;
8219 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8221 if (dep->regindex < 32
8222 || dep->regindex == 35
8223 || dep->regindex == 36
8224 || (!rsrc_write && dep->regindex == PSR_CPL))
8226 specs[count++] = tmpl;
8229 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8231 if (dep->regindex < 32
8232 || dep->regindex == 35
8233 || dep->regindex == 36
8234 || (rsrc_write && dep->regindex == PSR_CPL))
8236 specs[count++] = tmpl;
8241 /* Several PSR bits have very specific dependencies. */
8242 switch (dep->regindex)
8245 specs[count++] = tmpl;
8250 specs[count++] = tmpl;
8254 /* Only certain CR accesses use PSR.ic */
8255 if (idesc->operands[0] == IA64_OPND_CR3
8256 || idesc->operands[1] == IA64_OPND_CR3)
8259 ((idesc->operands[0] == IA64_OPND_CR3)
8262 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8277 specs[count++] = tmpl;
8286 specs[count++] = tmpl;
8290 /* Only some AR accesses use cpl */
8291 if (idesc->operands[0] == IA64_OPND_AR3
8292 || idesc->operands[1] == IA64_OPND_AR3)
8295 ((idesc->operands[0] == IA64_OPND_AR3)
8298 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8305 && regno <= AR_K7))))
8307 specs[count++] = tmpl;
8312 specs[count++] = tmpl;
8322 if (idesc->operands[0] == IA64_OPND_IMMU24)
8324 mask = CURR_SLOT.opnd[0].X_add_number;
8330 if (mask & ((valueT) 1 << dep->regindex))
8332 specs[count++] = tmpl;
8337 int min = dep->regindex == PSR_DFL ? 2 : 32;
8338 int max = dep->regindex == PSR_DFL ? 31 : 127;
8339 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8340 for (i = 0; i < NELEMS (idesc->operands); i++)
8342 if (idesc->operands[i] == IA64_OPND_F1
8343 || idesc->operands[i] == IA64_OPND_F2
8344 || idesc->operands[i] == IA64_OPND_F3
8345 || idesc->operands[i] == IA64_OPND_F4)
8347 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8348 if (reg >= min && reg <= max)
8350 specs[count++] = tmpl;
8357 int min = dep->regindex == PSR_MFL ? 2 : 32;
8358 int max = dep->regindex == PSR_MFL ? 31 : 127;
8359 /* mfh is read on writes to FR32-127; mfl is read on writes to
8361 for (i = 0; i < idesc->num_outputs; i++)
8363 if (idesc->operands[i] == IA64_OPND_F1)
8365 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8366 if (reg >= min && reg <= max)
8368 specs[count++] = tmpl;
8373 else if (note == 10)
8375 for (i = 0; i < NELEMS (idesc->operands); i++)
8377 if (idesc->operands[i] == IA64_OPND_R1
8378 || idesc->operands[i] == IA64_OPND_R2
8379 || idesc->operands[i] == IA64_OPND_R3)
8381 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8382 if (regno >= 16 && regno <= 31)
8384 specs[count++] = tmpl;
8395 case IA64_RS_AR_FPSR:
8396 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8398 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8399 if (regno == AR_FPSR)
8401 specs[count++] = tmpl;
8406 specs[count++] = tmpl;
8411 /* Handle all AR[REG] resources */
8412 if (note == 0 || note == 1)
8414 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8415 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8416 && regno == dep->regindex)
8418 specs[count++] = tmpl;
8420 /* other AR[REG] resources may be affected by AR accesses */
8421 else if (idesc->operands[0] == IA64_OPND_AR3)
8424 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8425 switch (dep->regindex)
8431 if (regno == AR_BSPSTORE)
8433 specs[count++] = tmpl;
8437 (regno == AR_BSPSTORE
8438 || regno == AR_RNAT))
8440 specs[count++] = tmpl;
8445 else if (idesc->operands[1] == IA64_OPND_AR3)
8448 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8449 switch (dep->regindex)
8454 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8456 specs[count++] = tmpl;
8463 specs[count++] = tmpl;
8473 /* Handle all CR[REG] resources */
8474 if (note == 0 || note == 1)
8476 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8478 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8479 if (regno == dep->regindex)
8481 specs[count++] = tmpl;
8483 else if (!rsrc_write)
8485 /* Reads from CR[IVR] affect other resources. */
8486 if (regno == CR_IVR)
8488 if ((dep->regindex >= CR_IRR0
8489 && dep->regindex <= CR_IRR3)
8490 || dep->regindex == CR_TPR)
8492 specs[count++] = tmpl;
8499 specs[count++] = tmpl;
8508 case IA64_RS_INSERVICE:
8509 /* look for write of EOI (67) or read of IVR (65) */
8510 if ((idesc->operands[0] == IA64_OPND_CR3
8511 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8512 || (idesc->operands[1] == IA64_OPND_CR3
8513 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8515 specs[count++] = tmpl;
8522 specs[count++] = tmpl;
8533 specs[count++] = tmpl;
8537 /* Check if any of the registers accessed are in the rotating region.
8538 mov to/from pr accesses CFM only when qp_regno is in the rotating
8540 for (i = 0; i < NELEMS (idesc->operands); i++)
8542 if (idesc->operands[i] == IA64_OPND_R1
8543 || idesc->operands[i] == IA64_OPND_R2
8544 || idesc->operands[i] == IA64_OPND_R3)
8546 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8547 /* Assumes that md.rot.num_regs is always valid */
8548 if (md.rot.num_regs > 0
8550 && num < 31 + md.rot.num_regs)
8552 specs[count] = tmpl;
8553 specs[count++].specific = 0;
8556 else if (idesc->operands[i] == IA64_OPND_F1
8557 || idesc->operands[i] == IA64_OPND_F2
8558 || idesc->operands[i] == IA64_OPND_F3
8559 || idesc->operands[i] == IA64_OPND_F4)
8561 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8564 specs[count] = tmpl;
8565 specs[count++].specific = 0;
8568 else if (idesc->operands[i] == IA64_OPND_P1
8569 || idesc->operands[i] == IA64_OPND_P2)
8571 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8574 specs[count] = tmpl;
8575 specs[count++].specific = 0;
8579 if (CURR_SLOT.qp_regno > 15)
8581 specs[count] = tmpl;
8582 specs[count++].specific = 0;
8587 /* This is the same as IA64_RS_PRr, except simplified to account for
8588 the fact that there is only one register. */
8592 specs[count++] = tmpl;
8597 if (idesc->operands[2] == IA64_OPND_IMM17)
8598 mask = CURR_SLOT.opnd[2].X_add_number;
8599 if (mask & ((valueT) 1 << 63))
8600 specs[count++] = tmpl;
8602 else if (note == 11)
8604 if ((idesc->operands[0] == IA64_OPND_P1
8605 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8606 || (idesc->operands[1] == IA64_OPND_P2
8607 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8609 specs[count++] = tmpl;
8612 else if (note == 12)
8614 if (CURR_SLOT.qp_regno == 63)
8616 specs[count++] = tmpl;
8623 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8624 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8625 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8626 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8629 && (idesc->operands[0] == IA64_OPND_P1
8630 || idesc->operands[0] == IA64_OPND_P2))
8632 specs[count] = tmpl;
8633 specs[count++].cmp_type =
8634 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8637 && (idesc->operands[1] == IA64_OPND_P1
8638 || idesc->operands[1] == IA64_OPND_P2))
8640 specs[count] = tmpl;
8641 specs[count++].cmp_type =
8642 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8647 if (CURR_SLOT.qp_regno == 63)
8649 specs[count++] = tmpl;
8660 /* FIXME we can identify some individual RSE written resources, but RSE
8661 read resources have not yet been completely identified, so for now
8662 treat RSE as a single resource */
8663 if (strncmp (idesc->name, "mov", 3) == 0)
8667 if (idesc->operands[0] == IA64_OPND_AR3
8668 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8670 specs[count] = tmpl;
8671 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8676 if (idesc->operands[0] == IA64_OPND_AR3)
8678 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8679 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8681 specs[count++] = tmpl;
8684 else if (idesc->operands[1] == IA64_OPND_AR3)
8686 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8687 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8688 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8690 specs[count++] = tmpl;
8697 specs[count++] = tmpl;
8702 /* FIXME -- do any of these need to be non-specific? */
8703 specs[count++] = tmpl;
8707 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8714 /* Clear branch flags on marked resources. This breaks the link between the
8715 QP of the marking instruction and a subsequent branch on the same QP. */
8718 clear_qp_branch_flag (mask)
8722 for (i = 0; i < regdepslen; i++)
8724 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8725 if ((bit & mask) != 0)
8727 regdeps[i].link_to_qp_branch = 0;
8732 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8733 any mutexes which contain one of the PRs and create new ones when
8737 update_qp_mutex (valueT mask)
8743 while (i < qp_mutexeslen)
8745 if ((qp_mutexes[i].prmask & mask) != 0)
8747 /* If it destroys and creates the same mutex, do nothing. */
8748 if (qp_mutexes[i].prmask == mask
8749 && qp_mutexes[i].path == md.path)
8760 fprintf (stderr, " Clearing mutex relation");
8761 print_prmask (qp_mutexes[i].prmask);
8762 fprintf (stderr, "\n");
8765 /* Deal with the old mutex with more than 3+ PRs only if
8766 the new mutex on the same execution path with it.
8768 FIXME: The 3+ mutex support is incomplete.
8769 dot_pred_rel () may be a better place to fix it. */
8770 if (qp_mutexes[i].path == md.path)
8772 /* If it is a proper subset of the mutex, create a
8775 && (qp_mutexes[i].prmask & mask) == mask)
8778 qp_mutexes[i].prmask &= ~mask;
8779 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8781 /* Modify the mutex if there are more than one
8789 /* Remove the mutex. */
8790 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8798 add_qp_mutex (mask);
8803 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8805 Any changes to a PR clears the mutex relations which include that PR. */
8808 clear_qp_mutex (mask)
8814 while (i < qp_mutexeslen)
8816 if ((qp_mutexes[i].prmask & mask) != 0)
8820 fprintf (stderr, " Clearing mutex relation");
8821 print_prmask (qp_mutexes[i].prmask);
8822 fprintf (stderr, "\n");
8824 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8831 /* Clear implies relations which contain PRs in the given masks.
8832 P1_MASK indicates the source of the implies relation, while P2_MASK
8833 indicates the implied PR. */
8836 clear_qp_implies (p1_mask, p2_mask)
8843 while (i < qp_implieslen)
8845 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8846 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8849 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8850 qp_implies[i].p1, qp_implies[i].p2);
8851 qp_implies[i] = qp_implies[--qp_implieslen];
8858 /* Add the PRs specified to the list of implied relations. */
8861 add_qp_imply (p1, p2)
8868 /* p0 is not meaningful here. */
8869 if (p1 == 0 || p2 == 0)
8875 /* If it exists already, ignore it. */
8876 for (i = 0; i < qp_implieslen; i++)
8878 if (qp_implies[i].p1 == p1
8879 && qp_implies[i].p2 == p2
8880 && qp_implies[i].path == md.path
8881 && !qp_implies[i].p2_branched)
8885 if (qp_implieslen == qp_impliestotlen)
8887 qp_impliestotlen += 20;
8888 qp_implies = (struct qp_imply *)
8889 xrealloc ((void *) qp_implies,
8890 qp_impliestotlen * sizeof (struct qp_imply));
8893 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
8894 qp_implies[qp_implieslen].p1 = p1;
8895 qp_implies[qp_implieslen].p2 = p2;
8896 qp_implies[qp_implieslen].path = md.path;
8897 qp_implies[qp_implieslen++].p2_branched = 0;
8899 /* Add in the implied transitive relations; for everything that p2 implies,
8900 make p1 imply that, too; for everything that implies p1, make it imply p2
8902 for (i = 0; i < qp_implieslen; i++)
8904 if (qp_implies[i].p1 == p2)
8905 add_qp_imply (p1, qp_implies[i].p2);
8906 if (qp_implies[i].p2 == p1)
8907 add_qp_imply (qp_implies[i].p1, p2);
8909 /* Add in mutex relations implied by this implies relation; for each mutex
8910 relation containing p2, duplicate it and replace p2 with p1. */
8911 bit = (valueT) 1 << p1;
8912 mask = (valueT) 1 << p2;
8913 for (i = 0; i < qp_mutexeslen; i++)
8915 if (qp_mutexes[i].prmask & mask)
8916 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
8920 /* Add the PRs specified in the mask to the mutex list; this means that only
8921 one of the PRs can be true at any time. PR0 should never be included in
8931 if (qp_mutexeslen == qp_mutexestotlen)
8933 qp_mutexestotlen += 20;
8934 qp_mutexes = (struct qpmutex *)
8935 xrealloc ((void *) qp_mutexes,
8936 qp_mutexestotlen * sizeof (struct qpmutex));
8940 fprintf (stderr, " Registering mutex on");
8941 print_prmask (mask);
8942 fprintf (stderr, "\n");
8944 qp_mutexes[qp_mutexeslen].path = md.path;
8945 qp_mutexes[qp_mutexeslen++].prmask = mask;
8949 has_suffix_p (name, suffix)
8953 size_t namelen = strlen (name);
8954 size_t sufflen = strlen (suffix);
8956 if (namelen <= sufflen)
8958 return strcmp (name + namelen - sufflen, suffix) == 0;
8962 clear_register_values ()
8966 fprintf (stderr, " Clearing register values\n");
8967 for (i = 1; i < NELEMS (gr_values); i++)
8968 gr_values[i].known = 0;
8971 /* Keep track of register values/changes which affect DV tracking.
8973 optimization note: should add a flag to classes of insns where otherwise we
8974 have to examine a group of strings to identify them. */
8977 note_register_values (idesc)
8978 struct ia64_opcode *idesc;
8980 valueT qp_changemask = 0;
8983 /* Invalidate values for registers being written to. */
8984 for (i = 0; i < idesc->num_outputs; i++)
8986 if (idesc->operands[i] == IA64_OPND_R1
8987 || idesc->operands[i] == IA64_OPND_R2
8988 || idesc->operands[i] == IA64_OPND_R3)
8990 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8991 if (regno > 0 && regno < NELEMS (gr_values))
8992 gr_values[regno].known = 0;
8994 else if (idesc->operands[i] == IA64_OPND_R3_2)
8996 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8997 if (regno > 0 && regno < 4)
8998 gr_values[regno].known = 0;
9000 else if (idesc->operands[i] == IA64_OPND_P1
9001 || idesc->operands[i] == IA64_OPND_P2)
9003 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9004 qp_changemask |= (valueT) 1 << regno;
9006 else if (idesc->operands[i] == IA64_OPND_PR)
9008 if (idesc->operands[2] & (valueT) 0x10000)
9009 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9011 qp_changemask = idesc->operands[2];
9014 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9016 if (idesc->operands[1] & ((valueT) 1 << 43))
9017 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9019 qp_changemask = idesc->operands[1];
9020 qp_changemask &= ~(valueT) 0xFFFF;
9025 /* Always clear qp branch flags on any PR change. */
9026 /* FIXME there may be exceptions for certain compares. */
9027 clear_qp_branch_flag (qp_changemask);
9029 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9030 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9032 qp_changemask |= ~(valueT) 0xFFFF;
9033 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9035 for (i = 32; i < 32 + md.rot.num_regs; i++)
9036 gr_values[i].known = 0;
9038 clear_qp_mutex (qp_changemask);
9039 clear_qp_implies (qp_changemask, qp_changemask);
9041 /* After a call, all register values are undefined, except those marked
9043 else if (strncmp (idesc->name, "br.call", 6) == 0
9044 || strncmp (idesc->name, "brl.call", 7) == 0)
9046 /* FIXME keep GR values which are marked as "safe_across_calls" */
9047 clear_register_values ();
9048 clear_qp_mutex (~qp_safe_across_calls);
9049 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9050 clear_qp_branch_flag (~qp_safe_across_calls);
9052 else if (is_interruption_or_rfi (idesc)
9053 || is_taken_branch (idesc))
9055 clear_register_values ();
9056 clear_qp_mutex (~(valueT) 0);
9057 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9059 /* Look for mutex and implies relations. */
9060 else if ((idesc->operands[0] == IA64_OPND_P1
9061 || idesc->operands[0] == IA64_OPND_P2)
9062 && (idesc->operands[1] == IA64_OPND_P1
9063 || idesc->operands[1] == IA64_OPND_P2))
9065 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9066 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9067 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9068 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9070 /* If both PRs are PR0, we can't really do anything. */
9071 if (p1 == 0 && p2 == 0)
9074 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9076 /* In general, clear mutexes and implies which include P1 or P2,
9077 with the following exceptions. */
9078 else if (has_suffix_p (idesc->name, ".or.andcm")
9079 || has_suffix_p (idesc->name, ".and.orcm"))
9081 clear_qp_implies (p2mask, p1mask);
9083 else if (has_suffix_p (idesc->name, ".andcm")
9084 || has_suffix_p (idesc->name, ".and"))
9086 clear_qp_implies (0, p1mask | p2mask);
9088 else if (has_suffix_p (idesc->name, ".orcm")
9089 || has_suffix_p (idesc->name, ".or"))
9091 clear_qp_mutex (p1mask | p2mask);
9092 clear_qp_implies (p1mask | p2mask, 0);
9098 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9100 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9101 if (p1 == 0 || p2 == 0)
9102 clear_qp_mutex (p1mask | p2mask);
9104 added = update_qp_mutex (p1mask | p2mask);
9106 if (CURR_SLOT.qp_regno == 0
9107 || has_suffix_p (idesc->name, ".unc"))
9109 if (added == 0 && p1 && p2)
9110 add_qp_mutex (p1mask | p2mask);
9111 if (CURR_SLOT.qp_regno != 0)
9114 add_qp_imply (p1, CURR_SLOT.qp_regno);
9116 add_qp_imply (p2, CURR_SLOT.qp_regno);
9121 /* Look for mov imm insns into GRs. */
9122 else if (idesc->operands[0] == IA64_OPND_R1
9123 && (idesc->operands[1] == IA64_OPND_IMM22
9124 || idesc->operands[1] == IA64_OPND_IMMU64)
9125 && (strcmp (idesc->name, "mov") == 0
9126 || strcmp (idesc->name, "movl") == 0))
9128 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9129 if (regno > 0 && regno < NELEMS (gr_values))
9131 gr_values[regno].known = 1;
9132 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9133 gr_values[regno].path = md.path;
9136 fprintf (stderr, " Know gr%d = ", regno);
9137 fprintf_vma (stderr, gr_values[regno].value);
9138 fputs ("\n", stderr);
9144 clear_qp_mutex (qp_changemask);
9145 clear_qp_implies (qp_changemask, qp_changemask);
9149 /* Return whether the given predicate registers are currently mutex. */
9152 qp_mutex (p1, p2, path)
9162 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9163 for (i = 0; i < qp_mutexeslen; i++)
9165 if (qp_mutexes[i].path >= path
9166 && (qp_mutexes[i].prmask & mask) == mask)
9173 /* Return whether the given resource is in the given insn's list of chks
9174 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9178 resources_match (rs, idesc, note, qp_regno, path)
9180 struct ia64_opcode *idesc;
9185 struct rsrc specs[MAX_SPECS];
9188 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9189 we don't need to check. One exception is note 11, which indicates that
9190 target predicates are written regardless of PR[qp]. */
9191 if (qp_mutex (rs->qp_regno, qp_regno, path)
9195 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9198 /* UNAT checking is a bit more specific than other resources */
9199 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9200 && specs[count].mem_offset.hint
9201 && rs->mem_offset.hint)
9203 if (rs->mem_offset.base == specs[count].mem_offset.base)
9205 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9206 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9213 /* Skip apparent PR write conflicts where both writes are an AND or both
9214 writes are an OR. */
9215 if (rs->dependency->specifier == IA64_RS_PR
9216 || rs->dependency->specifier == IA64_RS_PRr
9217 || rs->dependency->specifier == IA64_RS_PR63)
9219 if (specs[count].cmp_type != CMP_NONE
9220 && specs[count].cmp_type == rs->cmp_type)
9223 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9224 dv_mode[rs->dependency->mode],
9225 rs->dependency->specifier != IA64_RS_PR63 ?
9226 specs[count].index : 63);
9231 " %s on parallel compare conflict %s vs %s on PR%d\n",
9232 dv_mode[rs->dependency->mode],
9233 dv_cmp_type[rs->cmp_type],
9234 dv_cmp_type[specs[count].cmp_type],
9235 rs->dependency->specifier != IA64_RS_PR63 ?
9236 specs[count].index : 63);
9240 /* If either resource is not specific, conservatively assume a conflict
9242 if (!specs[count].specific || !rs->specific)
9244 else if (specs[count].index == rs->index)
9249 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9255 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9256 insert a stop to create the break. Update all resource dependencies
9257 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9258 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9259 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9263 insn_group_break (insert_stop, qp_regno, save_current)
9270 if (insert_stop && md.num_slots_in_use > 0)
9271 PREV_SLOT.end_of_insn_group = 1;
9275 fprintf (stderr, " Insn group break%s",
9276 (insert_stop ? " (w/stop)" : ""));
9278 fprintf (stderr, " effective for QP=%d", qp_regno);
9279 fprintf (stderr, "\n");
9283 while (i < regdepslen)
9285 const struct ia64_dependency *dep = regdeps[i].dependency;
9288 && regdeps[i].qp_regno != qp_regno)
9295 && CURR_SLOT.src_file == regdeps[i].file
9296 && CURR_SLOT.src_line == regdeps[i].line)
9302 /* clear dependencies which are automatically cleared by a stop, or
9303 those that have reached the appropriate state of insn serialization */
9304 if (dep->semantics == IA64_DVS_IMPLIED
9305 || dep->semantics == IA64_DVS_IMPLIEDF
9306 || regdeps[i].insn_srlz == STATE_SRLZ)
9308 print_dependency ("Removing", i);
9309 regdeps[i] = regdeps[--regdepslen];
9313 if (dep->semantics == IA64_DVS_DATA
9314 || dep->semantics == IA64_DVS_INSTR
9315 || dep->semantics == IA64_DVS_SPECIFIC)
9317 if (regdeps[i].insn_srlz == STATE_NONE)
9318 regdeps[i].insn_srlz = STATE_STOP;
9319 if (regdeps[i].data_srlz == STATE_NONE)
9320 regdeps[i].data_srlz = STATE_STOP;
9327 /* Add the given resource usage spec to the list of active dependencies. */
9330 mark_resource (idesc, dep, spec, depind, path)
9331 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9332 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9337 if (regdepslen == regdepstotlen)
9339 regdepstotlen += 20;
9340 regdeps = (struct rsrc *)
9341 xrealloc ((void *) regdeps,
9342 regdepstotlen * sizeof (struct rsrc));
9345 regdeps[regdepslen] = *spec;
9346 regdeps[regdepslen].depind = depind;
9347 regdeps[regdepslen].path = path;
9348 regdeps[regdepslen].file = CURR_SLOT.src_file;
9349 regdeps[regdepslen].line = CURR_SLOT.src_line;
9351 print_dependency ("Adding", regdepslen);
9357 print_dependency (action, depind)
9363 fprintf (stderr, " %s %s '%s'",
9364 action, dv_mode[(regdeps[depind].dependency)->mode],
9365 (regdeps[depind].dependency)->name);
9366 if (regdeps[depind].specific && regdeps[depind].index != 0)
9367 fprintf (stderr, " (%d)", regdeps[depind].index);
9368 if (regdeps[depind].mem_offset.hint)
9370 fputs (" ", stderr);
9371 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9372 fputs ("+", stderr);
9373 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9375 fprintf (stderr, "\n");
9380 instruction_serialization ()
9384 fprintf (stderr, " Instruction serialization\n");
9385 for (i = 0; i < regdepslen; i++)
9386 if (regdeps[i].insn_srlz == STATE_STOP)
9387 regdeps[i].insn_srlz = STATE_SRLZ;
9391 data_serialization ()
9395 fprintf (stderr, " Data serialization\n");
9396 while (i < regdepslen)
9398 if (regdeps[i].data_srlz == STATE_STOP
9399 /* Note: as of 991210, all "other" dependencies are cleared by a
9400 data serialization. This might change with new tables */
9401 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9403 print_dependency ("Removing", i);
9404 regdeps[i] = regdeps[--regdepslen];
9411 /* Insert stops and serializations as needed to avoid DVs. */
9414 remove_marked_resource (rs)
9417 switch (rs->dependency->semantics)
9419 case IA64_DVS_SPECIFIC:
9421 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9422 /* ...fall through... */
9423 case IA64_DVS_INSTR:
9425 fprintf (stderr, "Inserting instr serialization\n");
9426 if (rs->insn_srlz < STATE_STOP)
9427 insn_group_break (1, 0, 0);
9428 if (rs->insn_srlz < STATE_SRLZ)
9430 int oldqp = CURR_SLOT.qp_regno;
9431 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9432 /* Manually jam a srlz.i insn into the stream */
9433 CURR_SLOT.qp_regno = 0;
9434 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9435 instruction_serialization ();
9436 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9437 if (++md.num_slots_in_use >= NUM_SLOTS)
9439 CURR_SLOT.qp_regno = oldqp;
9440 CURR_SLOT.idesc = oldidesc;
9442 insn_group_break (1, 0, 0);
9444 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9445 "other" types of DV are eliminated
9446 by a data serialization */
9449 fprintf (stderr, "Inserting data serialization\n");
9450 if (rs->data_srlz < STATE_STOP)
9451 insn_group_break (1, 0, 0);
9453 int oldqp = CURR_SLOT.qp_regno;
9454 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9455 /* Manually jam a srlz.d insn into the stream */
9456 CURR_SLOT.qp_regno = 0;
9457 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9458 data_serialization ();
9459 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9460 if (++md.num_slots_in_use >= NUM_SLOTS)
9462 CURR_SLOT.qp_regno = oldqp;
9463 CURR_SLOT.idesc = oldidesc;
9466 case IA64_DVS_IMPLIED:
9467 case IA64_DVS_IMPLIEDF:
9469 fprintf (stderr, "Inserting stop\n");
9470 insn_group_break (1, 0, 0);
9477 /* Check the resources used by the given opcode against the current dependency
9480 The check is run once for each execution path encountered. In this case,
9481 a unique execution path is the sequence of instructions following a code
9482 entry point, e.g. the following has three execution paths, one starting
9483 at L0, one at L1, and one at L2.
9492 check_dependencies (idesc)
9493 struct ia64_opcode *idesc;
9495 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9499 /* Note that the number of marked resources may change within the
9500 loop if in auto mode. */
9502 while (i < regdepslen)
9504 struct rsrc *rs = ®deps[i];
9505 const struct ia64_dependency *dep = rs->dependency;
9510 if (dep->semantics == IA64_DVS_NONE
9511 || (chkind = depends_on (rs->depind, idesc)) == -1)
9517 note = NOTE (opdeps->chks[chkind]);
9519 /* Check this resource against each execution path seen thus far. */
9520 for (path = 0; path <= md.path; path++)
9524 /* If the dependency wasn't on the path being checked, ignore it. */
9525 if (rs->path < path)
9528 /* If the QP for this insn implies a QP which has branched, don't
9529 bother checking. Ed. NOTE: I don't think this check is terribly
9530 useful; what's the point of generating code which will only be
9531 reached if its QP is zero?
9532 This code was specifically inserted to handle the following code,
9533 based on notes from Intel's DV checking code, where p1 implies p2.
9539 if (CURR_SLOT.qp_regno != 0)
9543 for (implies = 0; implies < qp_implieslen; implies++)
9545 if (qp_implies[implies].path >= path
9546 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9547 && qp_implies[implies].p2_branched)
9557 if ((matchtype = resources_match (rs, idesc, note,
9558 CURR_SLOT.qp_regno, path)) != 0)
9561 char pathmsg[256] = "";
9562 char indexmsg[256] = "";
9563 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9566 sprintf (pathmsg, " when entry is at label '%s'",
9567 md.entry_labels[path - 1]);
9568 if (rs->specific && rs->index != 0)
9569 sprintf (indexmsg, ", specific resource number is %d",
9571 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9573 (certain ? "violates" : "may violate"),
9574 dv_mode[dep->mode], dep->name,
9575 dv_sem[dep->semantics],
9578 if (md.explicit_mode)
9580 as_warn ("%s", msg);
9582 as_warn (_("Only the first path encountering the conflict "
9584 as_warn_where (rs->file, rs->line,
9585 _("This is the location of the "
9586 "conflicting usage"));
9587 /* Don't bother checking other paths, to avoid duplicating
9594 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9596 remove_marked_resource (rs);
9598 /* since the set of dependencies has changed, start over */
9599 /* FIXME -- since we're removing dvs as we go, we
9600 probably don't really need to start over... */
9613 /* Register new dependencies based on the given opcode. */
9616 mark_resources (idesc)
9617 struct ia64_opcode *idesc;
9620 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9621 int add_only_qp_reads = 0;
9623 /* A conditional branch only uses its resources if it is taken; if it is
9624 taken, we stop following that path. The other branch types effectively
9625 *always* write their resources. If it's not taken, register only QP
9627 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9629 add_only_qp_reads = 1;
9633 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9635 for (i = 0; i < opdeps->nregs; i++)
9637 const struct ia64_dependency *dep;
9638 struct rsrc specs[MAX_SPECS];
9643 dep = ia64_find_dependency (opdeps->regs[i]);
9644 note = NOTE (opdeps->regs[i]);
9646 if (add_only_qp_reads
9647 && !(dep->mode == IA64_DV_WAR
9648 && (dep->specifier == IA64_RS_PR
9649 || dep->specifier == IA64_RS_PRr
9650 || dep->specifier == IA64_RS_PR63)))
9653 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9656 if (md.debug_dv && !count)
9657 fprintf (stderr, " No %s %s usage found (path %d)\n",
9658 dv_mode[dep->mode], dep->name, md.path);
9663 mark_resource (idesc, dep, &specs[count],
9664 DEP (opdeps->regs[i]), md.path);
9667 /* The execution path may affect register values, which may in turn
9668 affect which indirect-access resources are accessed. */
9669 switch (dep->specifier)
9681 for (path = 0; path < md.path; path++)
9683 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9685 mark_resource (idesc, dep, &specs[count],
9686 DEP (opdeps->regs[i]), path);
9693 /* Remove dependencies when they no longer apply. */
9696 update_dependencies (idesc)
9697 struct ia64_opcode *idesc;
9701 if (strcmp (idesc->name, "srlz.i") == 0)
9703 instruction_serialization ();
9705 else if (strcmp (idesc->name, "srlz.d") == 0)
9707 data_serialization ();
9709 else if (is_interruption_or_rfi (idesc)
9710 || is_taken_branch (idesc))
9712 /* Although technically the taken branch doesn't clear dependencies
9713 which require a srlz.[id], we don't follow the branch; the next
9714 instruction is assumed to start with a clean slate. */
9718 else if (is_conditional_branch (idesc)
9719 && CURR_SLOT.qp_regno != 0)
9721 int is_call = strstr (idesc->name, ".call") != NULL;
9723 for (i = 0; i < qp_implieslen; i++)
9725 /* If the conditional branch's predicate is implied by the predicate
9726 in an existing dependency, remove that dependency. */
9727 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9730 /* Note that this implied predicate takes a branch so that if
9731 a later insn generates a DV but its predicate implies this
9732 one, we can avoid the false DV warning. */
9733 qp_implies[i].p2_branched = 1;
9734 while (depind < regdepslen)
9736 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9738 print_dependency ("Removing", depind);
9739 regdeps[depind] = regdeps[--regdepslen];
9746 /* Any marked resources which have this same predicate should be
9747 cleared, provided that the QP hasn't been modified between the
9748 marking instruction and the branch. */
9751 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9756 while (i < regdepslen)
9758 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9759 && regdeps[i].link_to_qp_branch
9760 && (regdeps[i].file != CURR_SLOT.src_file
9761 || regdeps[i].line != CURR_SLOT.src_line))
9763 /* Treat like a taken branch */
9764 print_dependency ("Removing", i);
9765 regdeps[i] = regdeps[--regdepslen];
9774 /* Examine the current instruction for dependency violations. */
9778 struct ia64_opcode *idesc;
9782 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9783 idesc->name, CURR_SLOT.src_line,
9784 idesc->dependencies->nchks,
9785 idesc->dependencies->nregs);
9788 /* Look through the list of currently marked resources; if the current
9789 instruction has the dependency in its chks list which uses that resource,
9790 check against the specific resources used. */
9791 check_dependencies (idesc);
9793 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9794 then add them to the list of marked resources. */
9795 mark_resources (idesc);
9797 /* There are several types of dependency semantics, and each has its own
9798 requirements for being cleared
9800 Instruction serialization (insns separated by interruption, rfi, or
9801 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9803 Data serialization (instruction serialization, or writer + srlz.d +
9804 reader, where writer and srlz.d are in separate groups) clears
9805 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9806 always be the case).
9808 Instruction group break (groups separated by stop, taken branch,
9809 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9811 update_dependencies (idesc);
9813 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9814 warning. Keep track of as many as possible that are useful. */
9815 note_register_values (idesc);
9817 /* We don't need or want this anymore. */
9818 md.mem_offset.hint = 0;
9823 /* Translate one line of assembly. Pseudo ops and labels do not show
9829 char *saved_input_line_pointer, *mnemonic;
9830 const struct pseudo_opcode *pdesc;
9831 struct ia64_opcode *idesc;
9832 unsigned char qp_regno;
9836 saved_input_line_pointer = input_line_pointer;
9837 input_line_pointer = str;
9839 /* extract the opcode (mnemonic): */
9841 mnemonic = input_line_pointer;
9842 ch = get_symbol_end ();
9843 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9846 *input_line_pointer = ch;
9847 (*pdesc->handler) (pdesc->arg);
9851 /* Find the instruction descriptor matching the arguments. */
9853 idesc = ia64_find_opcode (mnemonic);
9854 *input_line_pointer = ch;
9857 as_bad ("Unknown opcode `%s'", mnemonic);
9861 idesc = parse_operands (idesc);
9865 /* Handle the dynamic ops we can handle now: */
9866 if (idesc->type == IA64_TYPE_DYN)
9868 if (strcmp (idesc->name, "add") == 0)
9870 if (CURR_SLOT.opnd[2].X_op == O_register
9871 && CURR_SLOT.opnd[2].X_add_number < 4)
9875 ia64_free_opcode (idesc);
9876 idesc = ia64_find_opcode (mnemonic);
9878 know (!idesc->next);
9881 else if (strcmp (idesc->name, "mov") == 0)
9883 enum ia64_opnd opnd1, opnd2;
9886 opnd1 = idesc->operands[0];
9887 opnd2 = idesc->operands[1];
9888 if (opnd1 == IA64_OPND_AR3)
9890 else if (opnd2 == IA64_OPND_AR3)
9894 if (CURR_SLOT.opnd[rop].X_op == O_register
9895 && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
9899 ia64_free_opcode (idesc);
9900 idesc = ia64_find_opcode (mnemonic);
9901 while (idesc != NULL
9902 && (idesc->operands[0] != opnd1
9903 || idesc->operands[1] != opnd2))
9904 idesc = get_next_opcode (idesc);
9909 if (md.qp.X_op == O_register)
9911 qp_regno = md.qp.X_add_number - REG_P;
9912 md.qp.X_op = O_absent;
9915 flags = idesc->flags;
9917 if ((flags & IA64_OPCODE_FIRST) != 0)
9918 insn_group_break (1, 0, 0);
9920 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
9922 as_bad ("`%s' cannot be predicated", idesc->name);
9926 /* Build the instruction. */
9927 CURR_SLOT.qp_regno = qp_regno;
9928 CURR_SLOT.idesc = idesc;
9929 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
9930 dwarf2_where (&CURR_SLOT.debug_line);
9932 /* Add unwind entry, if there is one. */
9933 if (unwind.current_entry)
9935 CURR_SLOT.unwind_record = unwind.current_entry;
9936 unwind.current_entry = NULL;
9939 /* Check for dependency violations. */
9943 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9944 if (++md.num_slots_in_use >= NUM_SLOTS)
9947 if ((flags & IA64_OPCODE_LAST) != 0)
9948 insn_group_break (1, 0, 0);
9950 md.last_text_seg = now_seg;
9953 input_line_pointer = saved_input_line_pointer;
9956 /* Called when symbol NAME cannot be found in the symbol table.
9957 Should be used for dynamic valued symbols only. */
9960 md_undefined_symbol (name)
9961 char *name ATTRIBUTE_UNUSED;
9966 /* Called for any expression that can not be recognized. When the
9967 function is called, `input_line_pointer' will point to the start of
9974 enum pseudo_type pseudo_type;
9979 switch (*input_line_pointer)
9982 /* Find what relocation pseudo-function we're dealing with. */
9984 ch = *++input_line_pointer;
9985 for (i = 0; i < NELEMS (pseudo_func); ++i)
9986 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
9988 len = strlen (pseudo_func[i].name);
9989 if (strncmp (pseudo_func[i].name + 1,
9990 input_line_pointer + 1, len - 1) == 0
9991 && !is_part_of_name (input_line_pointer[len]))
9993 input_line_pointer += len;
9994 pseudo_type = pseudo_func[i].type;
9998 switch (pseudo_type)
10000 case PSEUDO_FUNC_RELOC:
10001 SKIP_WHITESPACE ();
10002 if (*input_line_pointer != '(')
10004 as_bad ("Expected '('");
10008 ++input_line_pointer;
10010 if (*input_line_pointer++ != ')')
10012 as_bad ("Missing ')'");
10015 if (e->X_op != O_symbol)
10017 if (e->X_op != O_pseudo_fixup)
10019 as_bad ("Not a symbolic expression");
10022 if (i != FUNC_LT_RELATIVE)
10024 as_bad ("Illegal combination of relocation functions");
10027 switch (S_GET_VALUE (e->X_op_symbol))
10029 case FUNC_FPTR_RELATIVE:
10030 i = FUNC_LT_FPTR_RELATIVE; break;
10031 case FUNC_DTP_MODULE:
10032 i = FUNC_LT_DTP_MODULE; break;
10033 case FUNC_DTP_RELATIVE:
10034 i = FUNC_LT_DTP_RELATIVE; break;
10035 case FUNC_TP_RELATIVE:
10036 i = FUNC_LT_TP_RELATIVE; break;
10038 as_bad ("Illegal combination of relocation functions");
10042 /* Make sure gas doesn't get rid of local symbols that are used
10044 e->X_op = O_pseudo_fixup;
10045 e->X_op_symbol = pseudo_func[i].u.sym;
10048 case PSEUDO_FUNC_CONST:
10049 e->X_op = O_constant;
10050 e->X_add_number = pseudo_func[i].u.ival;
10053 case PSEUDO_FUNC_REG:
10054 e->X_op = O_register;
10055 e->X_add_number = pseudo_func[i].u.ival;
10059 name = input_line_pointer - 1;
10061 as_bad ("Unknown pseudo function `%s'", name);
10067 ++input_line_pointer;
10069 if (*input_line_pointer != ']')
10071 as_bad ("Closing bracket misssing");
10076 if (e->X_op != O_register)
10077 as_bad ("Register expected as index");
10079 ++input_line_pointer;
10090 ignore_rest_of_line ();
10093 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10094 a section symbol plus some offset. For relocs involving @fptr(),
10095 directives we don't want such adjustments since we need to have the
10096 original symbol's name in the reloc. */
10098 ia64_fix_adjustable (fix)
10101 /* Prevent all adjustments to global symbols */
10102 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10105 switch (fix->fx_r_type)
10107 case BFD_RELOC_IA64_FPTR64I:
10108 case BFD_RELOC_IA64_FPTR32MSB:
10109 case BFD_RELOC_IA64_FPTR32LSB:
10110 case BFD_RELOC_IA64_FPTR64MSB:
10111 case BFD_RELOC_IA64_FPTR64LSB:
10112 case BFD_RELOC_IA64_LTOFF_FPTR22:
10113 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10123 ia64_force_relocation (fix)
10126 switch (fix->fx_r_type)
10128 case BFD_RELOC_IA64_FPTR64I:
10129 case BFD_RELOC_IA64_FPTR32MSB:
10130 case BFD_RELOC_IA64_FPTR32LSB:
10131 case BFD_RELOC_IA64_FPTR64MSB:
10132 case BFD_RELOC_IA64_FPTR64LSB:
10134 case BFD_RELOC_IA64_LTOFF22:
10135 case BFD_RELOC_IA64_LTOFF64I:
10136 case BFD_RELOC_IA64_LTOFF_FPTR22:
10137 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10138 case BFD_RELOC_IA64_PLTOFF22:
10139 case BFD_RELOC_IA64_PLTOFF64I:
10140 case BFD_RELOC_IA64_PLTOFF64MSB:
10141 case BFD_RELOC_IA64_PLTOFF64LSB:
10143 case BFD_RELOC_IA64_LTOFF22X:
10144 case BFD_RELOC_IA64_LDXMOV:
10151 return generic_force_reloc (fix);
10154 /* Decide from what point a pc-relative relocation is relative to,
10155 relative to the pc-relative fixup. Er, relatively speaking. */
10157 ia64_pcrel_from_section (fix, sec)
10161 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10163 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10170 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10172 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10176 expr.X_op = O_pseudo_fixup;
10177 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10178 expr.X_add_number = 0;
10179 expr.X_add_symbol = symbol;
10180 emit_expr (&expr, size);
10183 /* This is called whenever some data item (not an instruction) needs a
10184 fixup. We pick the right reloc code depending on the byteorder
10185 currently in effect. */
10187 ia64_cons_fix_new (f, where, nbytes, exp)
10193 bfd_reloc_code_real_type code;
10198 /* There are no reloc for 8 and 16 bit quantities, but we allow
10199 them here since they will work fine as long as the expression
10200 is fully defined at the end of the pass over the source file. */
10201 case 1: code = BFD_RELOC_8; break;
10202 case 2: code = BFD_RELOC_16; break;
10204 if (target_big_endian)
10205 code = BFD_RELOC_IA64_DIR32MSB;
10207 code = BFD_RELOC_IA64_DIR32LSB;
10211 /* In 32-bit mode, data8 could mean function descriptors too. */
10212 if (exp->X_op == O_pseudo_fixup
10213 && exp->X_op_symbol
10214 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10215 && !(md.flags & EF_IA_64_ABI64))
10217 if (target_big_endian)
10218 code = BFD_RELOC_IA64_IPLTMSB;
10220 code = BFD_RELOC_IA64_IPLTLSB;
10221 exp->X_op = O_symbol;
10226 if (target_big_endian)
10227 code = BFD_RELOC_IA64_DIR64MSB;
10229 code = BFD_RELOC_IA64_DIR64LSB;
10234 if (exp->X_op == O_pseudo_fixup
10235 && exp->X_op_symbol
10236 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10238 if (target_big_endian)
10239 code = BFD_RELOC_IA64_IPLTMSB;
10241 code = BFD_RELOC_IA64_IPLTLSB;
10242 exp->X_op = O_symbol;
10248 as_bad ("Unsupported fixup size %d", nbytes);
10249 ignore_rest_of_line ();
10253 if (exp->X_op == O_pseudo_fixup)
10255 exp->X_op = O_symbol;
10256 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10257 /* ??? If code unchanged, unsupported. */
10260 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10261 /* We need to store the byte order in effect in case we're going
10262 to fix an 8 or 16 bit relocation (for which there no real
10263 relocs available). See md_apply_fix3(). */
10264 fix->tc_fix_data.bigendian = target_big_endian;
10267 /* Return the actual relocation we wish to associate with the pseudo
10268 reloc described by SYM and R_TYPE. SYM should be one of the
10269 symbols in the pseudo_func array, or NULL. */
10271 static bfd_reloc_code_real_type
10272 ia64_gen_real_reloc_type (sym, r_type)
10273 struct symbol *sym;
10274 bfd_reloc_code_real_type r_type;
10276 bfd_reloc_code_real_type new = 0;
10283 switch (S_GET_VALUE (sym))
10285 case FUNC_FPTR_RELATIVE:
10288 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10289 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10290 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10291 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10292 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10297 case FUNC_GP_RELATIVE:
10300 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10301 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10302 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10303 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10304 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10305 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10310 case FUNC_LT_RELATIVE:
10313 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10314 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10319 case FUNC_LT_RELATIVE_X:
10322 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10327 case FUNC_PC_RELATIVE:
10330 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10331 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10332 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10333 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10334 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10335 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10340 case FUNC_PLT_RELATIVE:
10343 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10344 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10345 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10346 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10351 case FUNC_SEC_RELATIVE:
10354 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10355 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10356 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10357 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10362 case FUNC_SEG_RELATIVE:
10365 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10366 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10367 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10368 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10373 case FUNC_LTV_RELATIVE:
10376 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10377 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10378 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10379 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10384 case FUNC_LT_FPTR_RELATIVE:
10387 case BFD_RELOC_IA64_IMM22:
10388 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10389 case BFD_RELOC_IA64_IMM64:
10390 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10396 case FUNC_TP_RELATIVE:
10399 case BFD_RELOC_IA64_IMM14:
10400 new = BFD_RELOC_IA64_TPREL14; break;
10401 case BFD_RELOC_IA64_IMM22:
10402 new = BFD_RELOC_IA64_TPREL22; break;
10403 case BFD_RELOC_IA64_IMM64:
10404 new = BFD_RELOC_IA64_TPREL64I; break;
10410 case FUNC_LT_TP_RELATIVE:
10413 case BFD_RELOC_IA64_IMM22:
10414 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10420 case FUNC_LT_DTP_MODULE:
10423 case BFD_RELOC_IA64_IMM22:
10424 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10430 case FUNC_DTP_RELATIVE:
10433 case BFD_RELOC_IA64_DIR64MSB:
10434 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10435 case BFD_RELOC_IA64_DIR64LSB:
10436 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10437 case BFD_RELOC_IA64_IMM14:
10438 new = BFD_RELOC_IA64_DTPREL14; break;
10439 case BFD_RELOC_IA64_IMM22:
10440 new = BFD_RELOC_IA64_DTPREL22; break;
10441 case BFD_RELOC_IA64_IMM64:
10442 new = BFD_RELOC_IA64_DTPREL64I; break;
10448 case FUNC_LT_DTP_RELATIVE:
10451 case BFD_RELOC_IA64_IMM22:
10452 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10458 case FUNC_IPLT_RELOC:
10465 /* Hmmmm. Should this ever occur? */
10472 /* Here is where generate the appropriate reloc for pseudo relocation
10475 ia64_validate_fix (fix)
10478 switch (fix->fx_r_type)
10480 case BFD_RELOC_IA64_FPTR64I:
10481 case BFD_RELOC_IA64_FPTR32MSB:
10482 case BFD_RELOC_IA64_FPTR64LSB:
10483 case BFD_RELOC_IA64_LTOFF_FPTR22:
10484 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10485 if (fix->fx_offset != 0)
10486 as_bad_where (fix->fx_file, fix->fx_line,
10487 "No addend allowed in @fptr() relocation");
10495 fix_insn (fix, odesc, value)
10497 const struct ia64_operand *odesc;
10500 bfd_vma insn[3], t0, t1, control_bits;
10505 slot = fix->fx_where & 0x3;
10506 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10508 /* Bundles are always in little-endian byte order */
10509 t0 = bfd_getl64 (fixpos);
10510 t1 = bfd_getl64 (fixpos + 8);
10511 control_bits = t0 & 0x1f;
10512 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10513 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10514 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10517 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10519 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10520 insn[2] |= (((value & 0x7f) << 13)
10521 | (((value >> 7) & 0x1ff) << 27)
10522 | (((value >> 16) & 0x1f) << 22)
10523 | (((value >> 21) & 0x1) << 21)
10524 | (((value >> 63) & 0x1) << 36));
10526 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10528 if (value & ~0x3fffffffffffffffULL)
10529 err = "integer operand out of range";
10530 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10531 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10533 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10536 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10537 insn[2] |= ((((value >> 59) & 0x1) << 36)
10538 | (((value >> 0) & 0xfffff) << 13));
10541 err = (*odesc->insert) (odesc, value, insn + slot);
10544 as_bad_where (fix->fx_file, fix->fx_line, err);
10546 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10547 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10548 number_to_chars_littleendian (fixpos + 0, t0, 8);
10549 number_to_chars_littleendian (fixpos + 8, t1, 8);
10552 /* Attempt to simplify or even eliminate a fixup. The return value is
10553 ignored; perhaps it was once meaningful, but now it is historical.
10554 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10556 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10560 md_apply_fix3 (fix, valP, seg)
10563 segT seg ATTRIBUTE_UNUSED;
10566 valueT value = *valP;
10568 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10572 switch (fix->fx_r_type)
10574 case BFD_RELOC_IA64_DIR32MSB:
10575 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10578 case BFD_RELOC_IA64_DIR32LSB:
10579 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10582 case BFD_RELOC_IA64_DIR64MSB:
10583 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10586 case BFD_RELOC_IA64_DIR64LSB:
10587 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10596 switch (fix->fx_r_type)
10598 case BFD_RELOC_UNUSED:
10599 /* This must be a TAG13 or TAG13b operand. There are no external
10600 relocs defined for them, so we must give an error. */
10601 as_bad_where (fix->fx_file, fix->fx_line,
10602 "%s must have a constant value",
10603 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10607 case BFD_RELOC_IA64_TPREL14:
10608 case BFD_RELOC_IA64_TPREL22:
10609 case BFD_RELOC_IA64_TPREL64I:
10610 case BFD_RELOC_IA64_LTOFF_TPREL22:
10611 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10612 case BFD_RELOC_IA64_DTPREL14:
10613 case BFD_RELOC_IA64_DTPREL22:
10614 case BFD_RELOC_IA64_DTPREL64I:
10615 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10616 S_SET_THREAD_LOCAL (fix->fx_addsy);
10623 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10625 if (fix->tc_fix_data.bigendian)
10626 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10628 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10633 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10638 /* Generate the BFD reloc to be stuck in the object file from the
10639 fixup used internally in the assembler. */
10642 tc_gen_reloc (sec, fixp)
10643 asection *sec ATTRIBUTE_UNUSED;
10648 reloc = xmalloc (sizeof (*reloc));
10649 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10650 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10651 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10652 reloc->addend = fixp->fx_offset;
10653 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10657 as_bad_where (fixp->fx_file, fixp->fx_line,
10658 "Cannot represent %s relocation in object file",
10659 bfd_get_reloc_code_name (fixp->fx_r_type));
10664 /* Turn a string in input_line_pointer into a floating point constant
10665 of type TYPE, and store the appropriate bytes in *LIT. The number
10666 of LITTLENUMS emitted is stored in *SIZE. An error message is
10667 returned, or NULL on OK. */
10669 #define MAX_LITTLENUMS 5
10672 md_atof (type, lit, size)
10677 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10707 return "Bad call to MD_ATOF()";
10709 t = atof_ieee (input_line_pointer, type, words);
10711 input_line_pointer = t;
10713 (*ia64_float_to_chars) (lit, words, prec);
10717 /* It is 10 byte floating point with 6 byte padding. */
10718 memset (&lit [10], 0, 6);
10719 *size = 8 * sizeof (LITTLENUM_TYPE);
10722 *size = prec * sizeof (LITTLENUM_TYPE);
10727 /* Handle ia64 specific semantics of the align directive. */
10730 ia64_md_do_align (n, fill, len, max)
10731 int n ATTRIBUTE_UNUSED;
10732 const char *fill ATTRIBUTE_UNUSED;
10733 int len ATTRIBUTE_UNUSED;
10734 int max ATTRIBUTE_UNUSED;
10736 if (subseg_text_p (now_seg))
10737 ia64_flush_insns ();
10740 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10741 of an rs_align_code fragment. */
10744 ia64_handle_align (fragp)
10747 /* Use mfi bundle of nops with no stop bits. */
10748 static const unsigned char le_nop[]
10749 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10750 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10755 if (fragp->fr_type != rs_align_code)
10758 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10759 p = fragp->fr_literal + fragp->fr_fix;
10761 /* Make sure we are on a 16-byte boundary, in case someone has been
10762 putting data into a text section. */
10765 int fix = bytes & 15;
10766 memset (p, 0, fix);
10769 fragp->fr_fix += fix;
10772 /* Instruction bundles are always little-endian. */
10773 memcpy (p, le_nop, 16);
10774 fragp->fr_var = 16;
10778 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10783 number_to_chars_bigendian (lit, (long) (*words++),
10784 sizeof (LITTLENUM_TYPE));
10785 lit += sizeof (LITTLENUM_TYPE);
10790 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
10795 number_to_chars_littleendian (lit, (long) (words[prec]),
10796 sizeof (LITTLENUM_TYPE));
10797 lit += sizeof (LITTLENUM_TYPE);
10802 ia64_elf_section_change_hook (void)
10804 dot_byteorder (-1);
10807 /* Check if a label should be made global. */
10809 ia64_check_label (symbolS *label)
10811 if (*input_line_pointer == ':')
10813 S_SET_EXTERNAL (label);
10814 input_line_pointer++;
10818 /* Used to remember where .alias and .secalias directives are seen. We
10819 will rename symbol and section names when we are about to output
10820 the relocatable file. */
10823 char *file; /* The file where the directive is seen. */
10824 unsigned int line; /* The line number the directive is at. */
10825 const char *name; /* The orignale name of the symbol. */
10828 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10829 .secalias. Otherwise, it is .alias. */
10831 dot_alias (int section)
10833 char *name, *alias;
10837 const char *error_string;
10840 struct hash_control *ahash, *nhash;
10843 name = input_line_pointer;
10844 delim = get_symbol_end ();
10845 end_name = input_line_pointer;
10848 if (name == end_name)
10850 as_bad (_("expected symbol name"));
10851 discard_rest_of_line ();
10855 SKIP_WHITESPACE ();
10857 if (*input_line_pointer != ',')
10860 as_bad (_("expected comma after \"%s\""), name);
10862 ignore_rest_of_line ();
10866 input_line_pointer++;
10869 /* We call demand_copy_C_string to check if alias string is valid.
10870 There should be a closing `"' and no `\0' in the string. */
10871 alias = demand_copy_C_string (&len);
10874 ignore_rest_of_line ();
10878 /* Make a copy of name string. */
10879 len = strlen (name) + 1;
10880 obstack_grow (¬es, name, len);
10881 name = obstack_finish (¬es);
10886 ahash = secalias_hash;
10887 nhash = secalias_name_hash;
10892 ahash = alias_hash;
10893 nhash = alias_name_hash;
10896 /* Check if alias has been used before. */
10897 h = (struct alias *) hash_find (ahash, alias);
10900 if (strcmp (h->name, name))
10901 as_bad (_("`%s' is already the alias of %s `%s'"),
10902 alias, kind, h->name);
10906 /* Check if name already has an alias. */
10907 a = (const char *) hash_find (nhash, name);
10910 if (strcmp (a, alias))
10911 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
10915 h = (struct alias *) xmalloc (sizeof (struct alias));
10916 as_where (&h->file, &h->line);
10919 error_string = hash_jam (ahash, alias, (PTR) h);
10922 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
10923 alias, kind, error_string);
10927 error_string = hash_jam (nhash, name, (PTR) alias);
10930 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
10931 alias, kind, error_string);
10933 obstack_free (¬es, name);
10934 obstack_free (¬es, alias);
10937 demand_empty_rest_of_line ();
10940 /* It renames the original symbol name to its alias. */
10942 do_alias (const char *alias, PTR value)
10944 struct alias *h = (struct alias *) value;
10945 symbolS *sym = symbol_find (h->name);
10948 as_warn_where (h->file, h->line,
10949 _("symbol `%s' aliased to `%s' is not used"),
10952 S_SET_NAME (sym, (char *) alias);
10955 /* Called from write_object_file. */
10957 ia64_adjust_symtab (void)
10959 hash_traverse (alias_hash, do_alias);
10962 /* It renames the original section name to its alias. */
10964 do_secalias (const char *alias, PTR value)
10966 struct alias *h = (struct alias *) value;
10967 segT sec = bfd_get_section_by_name (stdoutput, h->name);
10970 as_warn_where (h->file, h->line,
10971 _("section `%s' aliased to `%s' is not used"),
10977 /* Called from write_object_file. */
10979 ia64_frob_file (void)
10981 hash_traverse (secalias_hash, do_secalias);