1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS = 0,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
92 FUNC_LT_FPTR_RELATIVE,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix *next;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian;
160 /* This is the default endianness. */
161 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
163 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169 static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
172 static struct hash_control *alias_hash;
173 static struct hash_control *alias_name_hash;
174 static struct hash_control *secalias_hash;
175 static struct hash_control *secalias_name_hash;
177 /* List of chars besides those in app.c:symbol_chars that can start an
178 operand. Used to prevent the scrubber eating vital white-space. */
179 const char ia64_symbol_chars[] = "@?";
181 /* Characters which always start a comment. */
182 const char comment_chars[] = "";
184 /* Characters which start a comment at the beginning of a line. */
185 const char line_comment_chars[] = "#";
187 /* Characters which may be used to separate multiple commands on a
189 const char line_separator_chars[] = ";";
191 /* Characters which are used to indicate an exponent in a floating
193 const char EXP_CHARS[] = "eE";
195 /* Characters which mean that a number is a floating point constant,
197 const char FLT_CHARS[] = "rRsSfFdDxXpP";
199 /* ia64-specific option processing: */
201 const char *md_shortopts = "m:N:x::";
203 struct option md_longopts[] =
205 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
206 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
207 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
208 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
211 size_t md_longopts_size = sizeof (md_longopts);
215 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
216 struct hash_control *reg_hash; /* register name hash table */
217 struct hash_control *dynreg_hash; /* dynamic register hash table */
218 struct hash_control *const_hash; /* constant hash table */
219 struct hash_control *entry_hash; /* code entry hint hash table */
221 symbolS *regsym[REG_NUM];
223 /* If X_op is != O_absent, the registername for the instruction's
224 qualifying predicate. If NULL, p0 is assumed for instructions
225 that are predicatable. */
232 explicit_mode : 1, /* which mode we're in */
233 default_explicit_mode : 1, /* which mode is the default */
234 mode_explicitly_set : 1, /* was the current mode explicitly set? */
236 keep_pending_output : 1;
238 /* What to do when something is wrong with unwind directives. */
241 unwind_check_warning,
245 /* Each bundle consists of up to three instructions. We keep
246 track of four most recent instructions so we can correctly set
247 the end_of_insn_group for the last instruction in a bundle. */
249 int num_slots_in_use;
253 end_of_insn_group : 1,
254 manual_bundling_on : 1,
255 manual_bundling_off : 1,
256 loc_directive_seen : 1;
257 signed char user_template; /* user-selected template, if any */
258 unsigned char qp_regno; /* qualifying predicate */
259 /* This duplicates a good fraction of "struct fix" but we
260 can't use a "struct fix" instead since we can't call
261 fix_new_exp() until we know the address of the instruction. */
265 bfd_reloc_code_real_type code;
266 enum ia64_opnd opnd; /* type of operand in need of fix */
267 unsigned int is_pcrel : 1; /* is operand pc-relative? */
268 expressionS expr; /* the value to be inserted */
270 fixup[2]; /* at most two fixups per insn */
271 struct ia64_opcode *idesc;
272 struct label_fix *label_fixups;
273 struct label_fix *tag_fixups;
274 struct unw_rec_list *unwind_record; /* Unwind directive. */
277 unsigned int src_line;
278 struct dwarf2_line_info debug_line;
286 struct dynreg *next; /* next dynamic register */
288 unsigned short base; /* the base register number */
289 unsigned short num_regs; /* # of registers in this set */
291 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
293 flagword flags; /* ELF-header flags */
296 unsigned hint:1; /* is this hint currently valid? */
297 bfd_vma offset; /* mem.offset offset */
298 bfd_vma base; /* mem.offset base */
301 int path; /* number of alt. entry points seen */
302 const char **entry_labels; /* labels of all alternate paths in
303 the current DV-checking block. */
304 int maxpaths; /* size currently allocated for
307 int pointer_size; /* size in bytes of a pointer */
308 int pointer_size_shift; /* shift size of a pointer for alignment */
312 /* application registers: */
318 #define AR_BSPSTORE 18
333 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
334 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
335 {"ar.rsc", 16}, {"ar.bsp", 17},
336 {"ar.bspstore", 18}, {"ar.rnat", 19},
337 {"ar.fcr", 21}, {"ar.eflag", 24},
338 {"ar.csd", 25}, {"ar.ssd", 26},
339 {"ar.cflg", 27}, {"ar.fsr", 28},
340 {"ar.fir", 29}, {"ar.fdr", 30},
341 {"ar.ccv", 32}, {"ar.unat", 36},
342 {"ar.fpsr", 40}, {"ar.itc", 44},
343 {"ar.pfs", 64}, {"ar.lc", 65},
364 /* control registers: */
406 static const struct const_desc
413 /* PSR constant masks: */
416 {"psr.be", ((valueT) 1) << 1},
417 {"psr.up", ((valueT) 1) << 2},
418 {"psr.ac", ((valueT) 1) << 3},
419 {"psr.mfl", ((valueT) 1) << 4},
420 {"psr.mfh", ((valueT) 1) << 5},
422 {"psr.ic", ((valueT) 1) << 13},
423 {"psr.i", ((valueT) 1) << 14},
424 {"psr.pk", ((valueT) 1) << 15},
426 {"psr.dt", ((valueT) 1) << 17},
427 {"psr.dfl", ((valueT) 1) << 18},
428 {"psr.dfh", ((valueT) 1) << 19},
429 {"psr.sp", ((valueT) 1) << 20},
430 {"psr.pp", ((valueT) 1) << 21},
431 {"psr.di", ((valueT) 1) << 22},
432 {"psr.si", ((valueT) 1) << 23},
433 {"psr.db", ((valueT) 1) << 24},
434 {"psr.lp", ((valueT) 1) << 25},
435 {"psr.tb", ((valueT) 1) << 26},
436 {"psr.rt", ((valueT) 1) << 27},
437 /* 28-31: reserved */
438 /* 32-33: cpl (current privilege level) */
439 {"psr.is", ((valueT) 1) << 34},
440 {"psr.mc", ((valueT) 1) << 35},
441 {"psr.it", ((valueT) 1) << 36},
442 {"psr.id", ((valueT) 1) << 37},
443 {"psr.da", ((valueT) 1) << 38},
444 {"psr.dd", ((valueT) 1) << 39},
445 {"psr.ss", ((valueT) 1) << 40},
446 /* 41-42: ri (restart instruction) */
447 {"psr.ed", ((valueT) 1) << 43},
448 {"psr.bn", ((valueT) 1) << 44},
451 /* indirect register-sets/memory: */
460 { "CPUID", IND_CPUID },
461 { "cpuid", IND_CPUID },
473 /* Pseudo functions used to indicate relocation types (these functions
474 start with an at sign (@). */
496 /* reloc pseudo functions (these must come first!): */
497 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
498 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
499 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
500 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
502 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
503 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
504 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
505 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
507 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
509 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
510 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
511 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
512 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
513 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
515 /* mbtype4 constants: */
516 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
517 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
518 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
519 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
520 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
522 /* fclass constants: */
523 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
524 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
525 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
526 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
527 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
528 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
529 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
530 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
531 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
533 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
535 /* hint constants: */
536 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
538 /* unwind-related constants: */
539 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
540 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
541 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
542 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
543 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
544 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
545 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
547 /* unwind-related registers: */
548 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
551 /* 41-bit nop opcodes (one per unit): */
552 static const bfd_vma nop[IA64_NUM_UNITS] =
554 0x0000000000LL, /* NIL => break 0 */
555 0x0008000000LL, /* I-unit nop */
556 0x0008000000LL, /* M-unit nop */
557 0x4000000000LL, /* B-unit nop */
558 0x0008000000LL, /* F-unit nop */
559 0x0008000000LL, /* L-"unit" nop */
560 0x0008000000LL, /* X-unit nop */
563 /* Can't be `const' as it's passed to input routines (which have the
564 habit of setting temporary sentinels. */
565 static char special_section_name[][20] =
567 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
568 {".IA_64.unwind"}, {".IA_64.unwind_info"},
569 {".init_array"}, {".fini_array"}
572 /* The best template for a particular sequence of up to three
574 #define N IA64_NUM_TYPES
575 static unsigned char best_template[N][N][N];
578 /* Resource dependencies currently in effect */
580 int depind; /* dependency index */
581 const struct ia64_dependency *dependency; /* actual dependency */
582 unsigned specific:1, /* is this a specific bit/regno? */
583 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
584 int index; /* specific regno/bit within dependency */
585 int note; /* optional qualifying note (0 if none) */
589 int insn_srlz; /* current insn serialization state */
590 int data_srlz; /* current data serialization state */
591 int qp_regno; /* qualifying predicate for this usage */
592 char *file; /* what file marked this dependency */
593 unsigned int line; /* what line marked this dependency */
594 struct mem_offset mem_offset; /* optional memory offset hint */
595 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
596 int path; /* corresponding code entry index */
598 static int regdepslen = 0;
599 static int regdepstotlen = 0;
600 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
601 static const char *dv_sem[] = { "none", "implied", "impliedf",
602 "data", "instr", "specific", "stop", "other" };
603 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
605 /* Current state of PR mutexation */
606 static struct qpmutex {
609 } *qp_mutexes = NULL; /* QP mutex bitmasks */
610 static int qp_mutexeslen = 0;
611 static int qp_mutexestotlen = 0;
612 static valueT qp_safe_across_calls = 0;
614 /* Current state of PR implications */
615 static struct qp_imply {
618 unsigned p2_branched:1;
620 } *qp_implies = NULL;
621 static int qp_implieslen = 0;
622 static int qp_impliestotlen = 0;
624 /* Keep track of static GR values so that indirect register usage can
625 sometimes be tracked. */
630 } gr_values[128] = {{ 1, 0, 0 }};
632 /* Remember the alignment frag. */
633 static fragS *align_frag;
635 /* These are the routines required to output the various types of
638 /* A slot_number is a frag address plus the slot index (0-2). We use the
639 frag address here so that if there is a section switch in the middle of
640 a function, then instructions emitted to a different section are not
641 counted. Since there may be more than one frag for a function, this
642 means we also need to keep track of which frag this address belongs to
643 so we can compute inter-frag distances. This also nicely solves the
644 problem with nops emitted for align directives, which can't easily be
645 counted, but can easily be derived from frag sizes. */
647 typedef struct unw_rec_list {
649 unsigned long slot_number;
651 unsigned long next_slot_number;
652 fragS *next_slot_frag;
653 struct unw_rec_list *next;
656 #define SLOT_NUM_NOT_SET (unsigned)-1
658 /* Linked list of saved prologue counts. A very poor
659 implementation of a map from label numbers to prologue counts. */
660 typedef struct label_prologue_count
662 struct label_prologue_count *next;
663 unsigned long label_number;
664 unsigned int prologue_count;
665 } label_prologue_count;
669 /* Maintain a list of unwind entries for the current function. */
673 /* Any unwind entires that should be attached to the current slot
674 that an insn is being constructed for. */
675 unw_rec_list *current_entry;
677 /* These are used to create the unwind table entry for this function. */
679 symbolS *info; /* pointer to unwind info */
680 symbolS *personality_routine;
682 subsegT saved_text_subseg;
683 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
685 /* TRUE if processing unwind directives in a prologue region. */
686 unsigned int prologue : 1;
687 unsigned int prologue_mask : 4;
688 unsigned int body : 1;
689 unsigned int insn : 1;
690 unsigned int prologue_count; /* number of .prologues seen so far */
691 /* Prologue counts at previous .label_state directives. */
692 struct label_prologue_count * saved_prologue_counts;
695 /* The input value is a negated offset from psp, and specifies an address
696 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
697 must add 16 and divide by 4 to get the encoded value. */
699 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
701 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
703 /* Forward declarations: */
704 static void set_section PARAMS ((char *name));
705 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
706 unsigned int, unsigned int));
707 static void dot_align (int);
708 static void dot_radix PARAMS ((int));
709 static void dot_special_section PARAMS ((int));
710 static void dot_proc PARAMS ((int));
711 static void dot_fframe PARAMS ((int));
712 static void dot_vframe PARAMS ((int));
713 static void dot_vframesp PARAMS ((int));
714 static void dot_vframepsp PARAMS ((int));
715 static void dot_save PARAMS ((int));
716 static void dot_restore PARAMS ((int));
717 static void dot_restorereg PARAMS ((int));
718 static void dot_restorereg_p PARAMS ((int));
719 static void dot_handlerdata PARAMS ((int));
720 static void dot_unwentry PARAMS ((int));
721 static void dot_altrp PARAMS ((int));
722 static void dot_savemem PARAMS ((int));
723 static void dot_saveg PARAMS ((int));
724 static void dot_savef PARAMS ((int));
725 static void dot_saveb PARAMS ((int));
726 static void dot_savegf PARAMS ((int));
727 static void dot_spill PARAMS ((int));
728 static void dot_spillreg PARAMS ((int));
729 static void dot_spillmem PARAMS ((int));
730 static void dot_spillreg_p PARAMS ((int));
731 static void dot_spillmem_p PARAMS ((int));
732 static void dot_label_state PARAMS ((int));
733 static void dot_copy_state PARAMS ((int));
734 static void dot_unwabi PARAMS ((int));
735 static void dot_personality PARAMS ((int));
736 static void dot_body PARAMS ((int));
737 static void dot_prologue PARAMS ((int));
738 static void dot_endp PARAMS ((int));
739 static void dot_template PARAMS ((int));
740 static void dot_regstk PARAMS ((int));
741 static void dot_rot PARAMS ((int));
742 static void dot_byteorder PARAMS ((int));
743 static void dot_psr PARAMS ((int));
744 static void dot_alias PARAMS ((int));
745 static void dot_ln PARAMS ((int));
746 static char *parse_section_name PARAMS ((void));
747 static void dot_xdata PARAMS ((int));
748 static void stmt_float_cons PARAMS ((int));
749 static void stmt_cons_ua PARAMS ((int));
750 static void dot_xfloat_cons PARAMS ((int));
751 static void dot_xstringer PARAMS ((int));
752 static void dot_xdata_ua PARAMS ((int));
753 static void dot_xfloat_cons_ua PARAMS ((int));
754 static void print_prmask PARAMS ((valueT mask));
755 static void dot_pred_rel PARAMS ((int));
756 static void dot_reg_val PARAMS ((int));
757 static void dot_serialize PARAMS ((int));
758 static void dot_dv_mode PARAMS ((int));
759 static void dot_entry PARAMS ((int));
760 static void dot_mem_offset PARAMS ((int));
761 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
762 static symbolS *declare_register PARAMS ((const char *name, int regnum));
763 static void declare_register_set PARAMS ((const char *, int, int));
764 static unsigned int operand_width PARAMS ((enum ia64_opnd));
765 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
768 static int parse_operand PARAMS ((expressionS *e));
769 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
770 static void build_insn PARAMS ((struct slot *, bfd_vma *));
771 static void emit_one_bundle PARAMS ((void));
772 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
773 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
774 bfd_reloc_code_real_type r_type));
775 static void insn_group_break PARAMS ((int, int, int));
776 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
777 struct rsrc *, int depind, int path));
778 static void add_qp_mutex PARAMS((valueT mask));
779 static void add_qp_imply PARAMS((int p1, int p2));
780 static void clear_qp_branch_flag PARAMS((valueT mask));
781 static void clear_qp_mutex PARAMS((valueT mask));
782 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
783 static int has_suffix_p PARAMS((const char *, const char *));
784 static void clear_register_values PARAMS ((void));
785 static void print_dependency PARAMS ((const char *action, int depind));
786 static void instruction_serialization PARAMS ((void));
787 static void data_serialization PARAMS ((void));
788 static void remove_marked_resource PARAMS ((struct rsrc *));
789 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
790 static int is_taken_branch PARAMS ((struct ia64_opcode *));
791 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
792 static int depends_on PARAMS ((int, struct ia64_opcode *));
793 static int specify_resource PARAMS ((const struct ia64_dependency *,
794 struct ia64_opcode *, int, struct rsrc [], int, int));
795 static int check_dv PARAMS((struct ia64_opcode *idesc));
796 static void check_dependencies PARAMS((struct ia64_opcode *));
797 static void mark_resources PARAMS((struct ia64_opcode *));
798 static void update_dependencies PARAMS((struct ia64_opcode *));
799 static void note_register_values PARAMS((struct ia64_opcode *));
800 static int qp_mutex PARAMS ((int, int, int));
801 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
802 static void output_vbyte_mem PARAMS ((int, char *, char *));
803 static void count_output PARAMS ((int, char *, char *));
804 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
805 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
806 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
807 static void output_P1_format PARAMS ((vbyte_func, int));
808 static void output_P2_format PARAMS ((vbyte_func, int, int));
809 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
810 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
811 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
812 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
813 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
814 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
815 static void output_P9_format PARAMS ((vbyte_func, int, int));
816 static void output_P10_format PARAMS ((vbyte_func, int, int));
817 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
818 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
819 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
820 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
821 static char format_ab_reg PARAMS ((int, int));
822 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
824 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
825 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
827 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
828 static unw_rec_list *output_endp PARAMS ((void));
829 static unw_rec_list *output_prologue PARAMS ((void));
830 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
831 static unw_rec_list *output_body PARAMS ((void));
832 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
833 static unw_rec_list *output_mem_stack_v PARAMS ((void));
834 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
835 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_when PARAMS ((void));
837 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
838 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
839 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_pfs_when PARAMS ((void));
842 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_preds_when PARAMS ((void));
846 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
847 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
848 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
849 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
852 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
853 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
854 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
855 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
856 static unw_rec_list *output_unat_when PARAMS ((void));
857 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_lc_when PARAMS ((void));
861 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_fpsr_when PARAMS ((void));
865 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
866 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
867 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
869 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
870 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bsp_when PARAMS ((void));
874 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_bspstore_when PARAMS ((void));
878 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_rnat_when PARAMS ((void));
882 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
883 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
884 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
885 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
886 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
887 static unw_rec_list *output_label_state PARAMS ((unsigned long));
888 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
889 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
890 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
891 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
895 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
897 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
898 unsigned int, unsigned int));
899 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
900 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
901 static int calc_record_size PARAMS ((unw_rec_list *));
902 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
903 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
904 unsigned long, fragS *,
906 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
907 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
908 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
909 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
910 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
911 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
912 static void free_saved_prologue_counts PARAMS ((void));
914 /* Determine if application register REGNUM resides only in the integer
915 unit (as opposed to the memory unit). */
917 ar_is_only_in_integer_unit (int reg)
920 return reg >= 64 && reg <= 111;
923 /* Determine if application register REGNUM resides only in the memory
924 unit (as opposed to the integer unit). */
926 ar_is_only_in_memory_unit (int reg)
929 return reg >= 0 && reg <= 47;
932 /* Switch to section NAME and create section if necessary. It's
933 rather ugly that we have to manipulate input_line_pointer but I
934 don't see any other way to accomplish the same thing without
935 changing obj-elf.c (which may be the Right Thing, in the end). */
940 char *saved_input_line_pointer;
942 saved_input_line_pointer = input_line_pointer;
943 input_line_pointer = name;
945 input_line_pointer = saved_input_line_pointer;
948 /* Map 's' to SHF_IA_64_SHORT. */
951 ia64_elf_section_letter (letter, ptr_msg)
956 return SHF_IA_64_SHORT;
957 else if (letter == 'o')
958 return SHF_LINK_ORDER;
960 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
964 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
967 ia64_elf_section_flags (flags, attr, type)
969 int attr, type ATTRIBUTE_UNUSED;
971 if (attr & SHF_IA_64_SHORT)
972 flags |= SEC_SMALL_DATA;
977 ia64_elf_section_type (str, len)
981 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
983 if (STREQ (ELF_STRING_ia64_unwind_info))
986 if (STREQ (ELF_STRING_ia64_unwind_info_once))
989 if (STREQ (ELF_STRING_ia64_unwind))
990 return SHT_IA_64_UNWIND;
992 if (STREQ (ELF_STRING_ia64_unwind_once))
993 return SHT_IA_64_UNWIND;
995 if (STREQ ("unwind"))
996 return SHT_IA_64_UNWIND;
1003 set_regstack (ins, locs, outs, rots)
1004 unsigned int ins, locs, outs, rots;
1006 /* Size of frame. */
1009 sof = ins + locs + outs;
1012 as_bad ("Size of frame exceeds maximum of 96 registers");
1017 as_warn ("Size of rotating registers exceeds frame size");
1020 md.in.base = REG_GR + 32;
1021 md.loc.base = md.in.base + ins;
1022 md.out.base = md.loc.base + locs;
1024 md.in.num_regs = ins;
1025 md.loc.num_regs = locs;
1026 md.out.num_regs = outs;
1027 md.rot.num_regs = rots;
1034 struct label_fix *lfix;
1036 subsegT saved_subseg;
1039 if (!md.last_text_seg)
1042 saved_seg = now_seg;
1043 saved_subseg = now_subseg;
1045 subseg_set (md.last_text_seg, 0);
1047 while (md.num_slots_in_use > 0)
1048 emit_one_bundle (); /* force out queued instructions */
1050 /* In case there are labels following the last instruction, resolve
1052 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1054 S_SET_VALUE (lfix->sym, frag_now_fix ());
1055 symbol_set_frag (lfix->sym, frag_now);
1057 CURR_SLOT.label_fixups = 0;
1058 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1060 S_SET_VALUE (lfix->sym, frag_now_fix ());
1061 symbol_set_frag (lfix->sym, frag_now);
1063 CURR_SLOT.tag_fixups = 0;
1065 /* In case there are unwind directives following the last instruction,
1066 resolve those now. We only handle prologue, body, and endp directives
1067 here. Give an error for others. */
1068 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1070 switch (ptr->r.type)
1076 ptr->slot_number = (unsigned long) frag_more (0);
1077 ptr->slot_frag = frag_now;
1080 /* Allow any record which doesn't have a "t" field (i.e.,
1081 doesn't relate to a particular instruction). */
1097 as_bad (_("Unwind directive not followed by an instruction."));
1101 unwind.current_entry = NULL;
1103 subseg_set (saved_seg, saved_subseg);
1105 if (md.qp.X_op == O_register)
1106 as_bad ("qualifying predicate not followed by instruction");
1110 ia64_do_align (int nbytes)
1112 char *saved_input_line_pointer = input_line_pointer;
1114 input_line_pointer = "";
1115 s_align_bytes (nbytes);
1116 input_line_pointer = saved_input_line_pointer;
1120 ia64_cons_align (nbytes)
1125 char *saved_input_line_pointer = input_line_pointer;
1126 input_line_pointer = "";
1127 s_align_bytes (nbytes);
1128 input_line_pointer = saved_input_line_pointer;
1132 /* Output COUNT bytes to a memory location. */
1133 static unsigned char *vbyte_mem_ptr = NULL;
1136 output_vbyte_mem (count, ptr, comment)
1139 char *comment ATTRIBUTE_UNUSED;
1142 if (vbyte_mem_ptr == NULL)
1147 for (x = 0; x < count; x++)
1148 *(vbyte_mem_ptr++) = ptr[x];
1151 /* Count the number of bytes required for records. */
1152 static int vbyte_count = 0;
1154 count_output (count, ptr, comment)
1156 char *ptr ATTRIBUTE_UNUSED;
1157 char *comment ATTRIBUTE_UNUSED;
1159 vbyte_count += count;
1163 output_R1_format (f, rtype, rlen)
1165 unw_record_type rtype;
1172 output_R3_format (f, rtype, rlen);
1178 else if (rtype != prologue)
1179 as_bad ("record type is not valid");
1181 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1182 (*f) (1, &byte, NULL);
1186 output_R2_format (f, mask, grsave, rlen)
1193 mask = (mask & 0x0f);
1194 grsave = (grsave & 0x7f);
1196 bytes[0] = (UNW_R2 | (mask >> 1));
1197 bytes[1] = (((mask & 0x01) << 7) | grsave);
1198 count += output_leb128 (bytes + 2, rlen, 0);
1199 (*f) (count, bytes, NULL);
1203 output_R3_format (f, rtype, rlen)
1205 unw_record_type rtype;
1212 output_R1_format (f, rtype, rlen);
1218 else if (rtype != prologue)
1219 as_bad ("record type is not valid");
1220 bytes[0] = (UNW_R3 | r);
1221 count = output_leb128 (bytes + 1, rlen, 0);
1222 (*f) (count + 1, bytes, NULL);
1226 output_P1_format (f, brmask)
1231 byte = UNW_P1 | (brmask & 0x1f);
1232 (*f) (1, &byte, NULL);
1236 output_P2_format (f, brmask, gr)
1242 brmask = (brmask & 0x1f);
1243 bytes[0] = UNW_P2 | (brmask >> 1);
1244 bytes[1] = (((brmask & 1) << 7) | gr);
1245 (*f) (2, bytes, NULL);
1249 output_P3_format (f, rtype, reg)
1251 unw_record_type rtype;
1296 as_bad ("Invalid record type for P3 format.");
1298 bytes[0] = (UNW_P3 | (r >> 1));
1299 bytes[1] = (((r & 1) << 7) | reg);
1300 (*f) (2, bytes, NULL);
1304 output_P4_format (f, imask, imask_size)
1306 unsigned char *imask;
1307 unsigned long imask_size;
1310 (*f) (imask_size, imask, NULL);
1314 output_P5_format (f, grmask, frmask)
1317 unsigned long frmask;
1320 grmask = (grmask & 0x0f);
1323 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1324 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1325 bytes[3] = (frmask & 0x000000ff);
1326 (*f) (4, bytes, NULL);
1330 output_P6_format (f, rtype, rmask)
1332 unw_record_type rtype;
1338 if (rtype == gr_mem)
1340 else if (rtype != fr_mem)
1341 as_bad ("Invalid record type for format P6");
1342 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1343 (*f) (1, &byte, NULL);
1347 output_P7_format (f, rtype, w1, w2)
1349 unw_record_type rtype;
1356 count += output_leb128 (bytes + 1, w1, 0);
1361 count += output_leb128 (bytes + count, w2 >> 4, 0);
1411 bytes[0] = (UNW_P7 | r);
1412 (*f) (count, bytes, NULL);
1416 output_P8_format (f, rtype, t)
1418 unw_record_type rtype;
1457 case bspstore_psprel:
1460 case bspstore_sprel:
1472 case priunat_when_gr:
1475 case priunat_psprel:
1481 case priunat_when_mem:
1488 count += output_leb128 (bytes + 2, t, 0);
1489 (*f) (count, bytes, NULL);
1493 output_P9_format (f, grmask, gr)
1500 bytes[1] = (grmask & 0x0f);
1501 bytes[2] = (gr & 0x7f);
1502 (*f) (3, bytes, NULL);
1506 output_P10_format (f, abi, context)
1513 bytes[1] = (abi & 0xff);
1514 bytes[2] = (context & 0xff);
1515 (*f) (3, bytes, NULL);
1519 output_B1_format (f, rtype, label)
1521 unw_record_type rtype;
1522 unsigned long label;
1528 output_B4_format (f, rtype, label);
1531 if (rtype == copy_state)
1533 else if (rtype != label_state)
1534 as_bad ("Invalid record type for format B1");
1536 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1537 (*f) (1, &byte, NULL);
1541 output_B2_format (f, ecount, t)
1543 unsigned long ecount;
1550 output_B3_format (f, ecount, t);
1553 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1554 count += output_leb128 (bytes + 1, t, 0);
1555 (*f) (count, bytes, NULL);
1559 output_B3_format (f, ecount, t)
1561 unsigned long ecount;
1568 output_B2_format (f, ecount, t);
1572 count += output_leb128 (bytes + 1, t, 0);
1573 count += output_leb128 (bytes + count, ecount, 0);
1574 (*f) (count, bytes, NULL);
1578 output_B4_format (f, rtype, label)
1580 unw_record_type rtype;
1581 unsigned long label;
1588 output_B1_format (f, rtype, label);
1592 if (rtype == copy_state)
1594 else if (rtype != label_state)
1595 as_bad ("Invalid record type for format B1");
1597 bytes[0] = (UNW_B4 | (r << 3));
1598 count += output_leb128 (bytes + 1, label, 0);
1599 (*f) (count, bytes, NULL);
1603 format_ab_reg (ab, reg)
1610 ret = (ab << 5) | reg;
1615 output_X1_format (f, rtype, ab, reg, t, w1)
1617 unw_record_type rtype;
1627 if (rtype == spill_sprel)
1629 else if (rtype != spill_psprel)
1630 as_bad ("Invalid record type for format X1");
1631 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1632 count += output_leb128 (bytes + 2, t, 0);
1633 count += output_leb128 (bytes + count, w1, 0);
1634 (*f) (count, bytes, NULL);
1638 output_X2_format (f, ab, reg, x, y, treg, t)
1647 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1648 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1649 count += output_leb128 (bytes + 3, t, 0);
1650 (*f) (count, bytes, NULL);
1654 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1656 unw_record_type rtype;
1667 if (rtype == spill_sprel_p)
1669 else if (rtype != spill_psprel_p)
1670 as_bad ("Invalid record type for format X3");
1671 bytes[1] = ((r << 7) | (qp & 0x3f));
1672 bytes[2] = format_ab_reg (ab, reg);
1673 count += output_leb128 (bytes + 3, t, 0);
1674 count += output_leb128 (bytes + count, w1, 0);
1675 (*f) (count, bytes, NULL);
1679 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1689 bytes[1] = (qp & 0x3f);
1690 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1691 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1692 count += output_leb128 (bytes + 4, t, 0);
1693 (*f) (count, bytes, NULL);
1696 /* This function allocates a record list structure, and initializes fields. */
1698 static unw_rec_list *
1699 alloc_record (unw_record_type t)
1702 ptr = xmalloc (sizeof (*ptr));
1704 ptr->slot_number = SLOT_NUM_NOT_SET;
1706 ptr->next_slot_number = 0;
1707 ptr->next_slot_frag = 0;
1711 /* Dummy unwind record used for calculating the length of the last prologue or
1714 static unw_rec_list *
1717 unw_rec_list *ptr = alloc_record (endp);
1721 static unw_rec_list *
1724 unw_rec_list *ptr = alloc_record (prologue);
1725 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1729 static unw_rec_list *
1730 output_prologue_gr (saved_mask, reg)
1731 unsigned int saved_mask;
1734 unw_rec_list *ptr = alloc_record (prologue_gr);
1735 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1736 ptr->r.record.r.grmask = saved_mask;
1737 ptr->r.record.r.grsave = reg;
1741 static unw_rec_list *
1744 unw_rec_list *ptr = alloc_record (body);
1748 static unw_rec_list *
1749 output_mem_stack_f (size)
1752 unw_rec_list *ptr = alloc_record (mem_stack_f);
1753 ptr->r.record.p.size = size;
1757 static unw_rec_list *
1758 output_mem_stack_v ()
1760 unw_rec_list *ptr = alloc_record (mem_stack_v);
1764 static unw_rec_list *
1768 unw_rec_list *ptr = alloc_record (psp_gr);
1769 ptr->r.record.p.gr = gr;
1773 static unw_rec_list *
1774 output_psp_sprel (offset)
1775 unsigned int offset;
1777 unw_rec_list *ptr = alloc_record (psp_sprel);
1778 ptr->r.record.p.spoff = offset / 4;
1782 static unw_rec_list *
1785 unw_rec_list *ptr = alloc_record (rp_when);
1789 static unw_rec_list *
1793 unw_rec_list *ptr = alloc_record (rp_gr);
1794 ptr->r.record.p.gr = gr;
1798 static unw_rec_list *
1802 unw_rec_list *ptr = alloc_record (rp_br);
1803 ptr->r.record.p.br = br;
1807 static unw_rec_list *
1808 output_rp_psprel (offset)
1809 unsigned int offset;
1811 unw_rec_list *ptr = alloc_record (rp_psprel);
1812 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1816 static unw_rec_list *
1817 output_rp_sprel (offset)
1818 unsigned int offset;
1820 unw_rec_list *ptr = alloc_record (rp_sprel);
1821 ptr->r.record.p.spoff = offset / 4;
1825 static unw_rec_list *
1828 unw_rec_list *ptr = alloc_record (pfs_when);
1832 static unw_rec_list *
1836 unw_rec_list *ptr = alloc_record (pfs_gr);
1837 ptr->r.record.p.gr = gr;
1841 static unw_rec_list *
1842 output_pfs_psprel (offset)
1843 unsigned int offset;
1845 unw_rec_list *ptr = alloc_record (pfs_psprel);
1846 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1850 static unw_rec_list *
1851 output_pfs_sprel (offset)
1852 unsigned int offset;
1854 unw_rec_list *ptr = alloc_record (pfs_sprel);
1855 ptr->r.record.p.spoff = offset / 4;
1859 static unw_rec_list *
1860 output_preds_when ()
1862 unw_rec_list *ptr = alloc_record (preds_when);
1866 static unw_rec_list *
1867 output_preds_gr (gr)
1870 unw_rec_list *ptr = alloc_record (preds_gr);
1871 ptr->r.record.p.gr = gr;
1875 static unw_rec_list *
1876 output_preds_psprel (offset)
1877 unsigned int offset;
1879 unw_rec_list *ptr = alloc_record (preds_psprel);
1880 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1884 static unw_rec_list *
1885 output_preds_sprel (offset)
1886 unsigned int offset;
1888 unw_rec_list *ptr = alloc_record (preds_sprel);
1889 ptr->r.record.p.spoff = offset / 4;
1893 static unw_rec_list *
1894 output_fr_mem (mask)
1897 unw_rec_list *ptr = alloc_record (fr_mem);
1898 ptr->r.record.p.rmask = mask;
1902 static unw_rec_list *
1903 output_frgr_mem (gr_mask, fr_mask)
1904 unsigned int gr_mask;
1905 unsigned int fr_mask;
1907 unw_rec_list *ptr = alloc_record (frgr_mem);
1908 ptr->r.record.p.grmask = gr_mask;
1909 ptr->r.record.p.frmask = fr_mask;
1913 static unw_rec_list *
1914 output_gr_gr (mask, reg)
1918 unw_rec_list *ptr = alloc_record (gr_gr);
1919 ptr->r.record.p.grmask = mask;
1920 ptr->r.record.p.gr = reg;
1924 static unw_rec_list *
1925 output_gr_mem (mask)
1928 unw_rec_list *ptr = alloc_record (gr_mem);
1929 ptr->r.record.p.rmask = mask;
1933 static unw_rec_list *
1934 output_br_mem (unsigned int mask)
1936 unw_rec_list *ptr = alloc_record (br_mem);
1937 ptr->r.record.p.brmask = mask;
1941 static unw_rec_list *
1942 output_br_gr (save_mask, reg)
1943 unsigned int save_mask;
1946 unw_rec_list *ptr = alloc_record (br_gr);
1947 ptr->r.record.p.brmask = save_mask;
1948 ptr->r.record.p.gr = reg;
1952 static unw_rec_list *
1953 output_spill_base (offset)
1954 unsigned int offset;
1956 unw_rec_list *ptr = alloc_record (spill_base);
1957 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1961 static unw_rec_list *
1964 unw_rec_list *ptr = alloc_record (unat_when);
1968 static unw_rec_list *
1972 unw_rec_list *ptr = alloc_record (unat_gr);
1973 ptr->r.record.p.gr = gr;
1977 static unw_rec_list *
1978 output_unat_psprel (offset)
1979 unsigned int offset;
1981 unw_rec_list *ptr = alloc_record (unat_psprel);
1982 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1986 static unw_rec_list *
1987 output_unat_sprel (offset)
1988 unsigned int offset;
1990 unw_rec_list *ptr = alloc_record (unat_sprel);
1991 ptr->r.record.p.spoff = offset / 4;
1995 static unw_rec_list *
1998 unw_rec_list *ptr = alloc_record (lc_when);
2002 static unw_rec_list *
2006 unw_rec_list *ptr = alloc_record (lc_gr);
2007 ptr->r.record.p.gr = gr;
2011 static unw_rec_list *
2012 output_lc_psprel (offset)
2013 unsigned int offset;
2015 unw_rec_list *ptr = alloc_record (lc_psprel);
2016 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2020 static unw_rec_list *
2021 output_lc_sprel (offset)
2022 unsigned int offset;
2024 unw_rec_list *ptr = alloc_record (lc_sprel);
2025 ptr->r.record.p.spoff = offset / 4;
2029 static unw_rec_list *
2032 unw_rec_list *ptr = alloc_record (fpsr_when);
2036 static unw_rec_list *
2040 unw_rec_list *ptr = alloc_record (fpsr_gr);
2041 ptr->r.record.p.gr = gr;
2045 static unw_rec_list *
2046 output_fpsr_psprel (offset)
2047 unsigned int offset;
2049 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2050 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2054 static unw_rec_list *
2055 output_fpsr_sprel (offset)
2056 unsigned int offset;
2058 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2059 ptr->r.record.p.spoff = offset / 4;
2063 static unw_rec_list *
2064 output_priunat_when_gr ()
2066 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2070 static unw_rec_list *
2071 output_priunat_when_mem ()
2073 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2077 static unw_rec_list *
2078 output_priunat_gr (gr)
2081 unw_rec_list *ptr = alloc_record (priunat_gr);
2082 ptr->r.record.p.gr = gr;
2086 static unw_rec_list *
2087 output_priunat_psprel (offset)
2088 unsigned int offset;
2090 unw_rec_list *ptr = alloc_record (priunat_psprel);
2091 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2095 static unw_rec_list *
2096 output_priunat_sprel (offset)
2097 unsigned int offset;
2099 unw_rec_list *ptr = alloc_record (priunat_sprel);
2100 ptr->r.record.p.spoff = offset / 4;
2104 static unw_rec_list *
2107 unw_rec_list *ptr = alloc_record (bsp_when);
2111 static unw_rec_list *
2115 unw_rec_list *ptr = alloc_record (bsp_gr);
2116 ptr->r.record.p.gr = gr;
2120 static unw_rec_list *
2121 output_bsp_psprel (offset)
2122 unsigned int offset;
2124 unw_rec_list *ptr = alloc_record (bsp_psprel);
2125 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2129 static unw_rec_list *
2130 output_bsp_sprel (offset)
2131 unsigned int offset;
2133 unw_rec_list *ptr = alloc_record (bsp_sprel);
2134 ptr->r.record.p.spoff = offset / 4;
2138 static unw_rec_list *
2139 output_bspstore_when ()
2141 unw_rec_list *ptr = alloc_record (bspstore_when);
2145 static unw_rec_list *
2146 output_bspstore_gr (gr)
2149 unw_rec_list *ptr = alloc_record (bspstore_gr);
2150 ptr->r.record.p.gr = gr;
2154 static unw_rec_list *
2155 output_bspstore_psprel (offset)
2156 unsigned int offset;
2158 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2159 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2163 static unw_rec_list *
2164 output_bspstore_sprel (offset)
2165 unsigned int offset;
2167 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2168 ptr->r.record.p.spoff = offset / 4;
2172 static unw_rec_list *
2175 unw_rec_list *ptr = alloc_record (rnat_when);
2179 static unw_rec_list *
2183 unw_rec_list *ptr = alloc_record (rnat_gr);
2184 ptr->r.record.p.gr = gr;
2188 static unw_rec_list *
2189 output_rnat_psprel (offset)
2190 unsigned int offset;
2192 unw_rec_list *ptr = alloc_record (rnat_psprel);
2193 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2197 static unw_rec_list *
2198 output_rnat_sprel (offset)
2199 unsigned int offset;
2201 unw_rec_list *ptr = alloc_record (rnat_sprel);
2202 ptr->r.record.p.spoff = offset / 4;
2206 static unw_rec_list *
2207 output_unwabi (abi, context)
2209 unsigned long context;
2211 unw_rec_list *ptr = alloc_record (unwabi);
2212 ptr->r.record.p.abi = abi;
2213 ptr->r.record.p.context = context;
2217 static unw_rec_list *
2218 output_epilogue (unsigned long ecount)
2220 unw_rec_list *ptr = alloc_record (epilogue);
2221 ptr->r.record.b.ecount = ecount;
2225 static unw_rec_list *
2226 output_label_state (unsigned long label)
2228 unw_rec_list *ptr = alloc_record (label_state);
2229 ptr->r.record.b.label = label;
2233 static unw_rec_list *
2234 output_copy_state (unsigned long label)
2236 unw_rec_list *ptr = alloc_record (copy_state);
2237 ptr->r.record.b.label = label;
2241 static unw_rec_list *
2242 output_spill_psprel (ab, reg, offset)
2245 unsigned int offset;
2247 unw_rec_list *ptr = alloc_record (spill_psprel);
2248 ptr->r.record.x.ab = ab;
2249 ptr->r.record.x.reg = reg;
2250 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2254 static unw_rec_list *
2255 output_spill_sprel (ab, reg, offset)
2258 unsigned int offset;
2260 unw_rec_list *ptr = alloc_record (spill_sprel);
2261 ptr->r.record.x.ab = ab;
2262 ptr->r.record.x.reg = reg;
2263 ptr->r.record.x.spoff = offset / 4;
2267 static unw_rec_list *
2268 output_spill_psprel_p (ab, reg, offset, predicate)
2271 unsigned int offset;
2272 unsigned int predicate;
2274 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2275 ptr->r.record.x.ab = ab;
2276 ptr->r.record.x.reg = reg;
2277 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2278 ptr->r.record.x.qp = predicate;
2282 static unw_rec_list *
2283 output_spill_sprel_p (ab, reg, offset, predicate)
2286 unsigned int offset;
2287 unsigned int predicate;
2289 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2290 ptr->r.record.x.ab = ab;
2291 ptr->r.record.x.reg = reg;
2292 ptr->r.record.x.spoff = offset / 4;
2293 ptr->r.record.x.qp = predicate;
2297 static unw_rec_list *
2298 output_spill_reg (ab, reg, targ_reg, xy)
2301 unsigned int targ_reg;
2304 unw_rec_list *ptr = alloc_record (spill_reg);
2305 ptr->r.record.x.ab = ab;
2306 ptr->r.record.x.reg = reg;
2307 ptr->r.record.x.treg = targ_reg;
2308 ptr->r.record.x.xy = xy;
2312 static unw_rec_list *
2313 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2316 unsigned int targ_reg;
2318 unsigned int predicate;
2320 unw_rec_list *ptr = alloc_record (spill_reg_p);
2321 ptr->r.record.x.ab = ab;
2322 ptr->r.record.x.reg = reg;
2323 ptr->r.record.x.treg = targ_reg;
2324 ptr->r.record.x.xy = xy;
2325 ptr->r.record.x.qp = predicate;
2329 /* Given a unw_rec_list process the correct format with the
2330 specified function. */
2333 process_one_record (ptr, f)
2337 unsigned long fr_mask, gr_mask;
2339 switch (ptr->r.type)
2341 /* This is a dummy record that takes up no space in the output. */
2349 /* These are taken care of by prologue/prologue_gr. */
2354 if (ptr->r.type == prologue_gr)
2355 output_R2_format (f, ptr->r.record.r.grmask,
2356 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2358 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2360 /* Output descriptor(s) for union of register spills (if any). */
2361 gr_mask = ptr->r.record.r.mask.gr_mem;
2362 fr_mask = ptr->r.record.r.mask.fr_mem;
2365 if ((fr_mask & ~0xfUL) == 0)
2366 output_P6_format (f, fr_mem, fr_mask);
2369 output_P5_format (f, gr_mask, fr_mask);
2374 output_P6_format (f, gr_mem, gr_mask);
2375 if (ptr->r.record.r.mask.br_mem)
2376 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2378 /* output imask descriptor if necessary: */
2379 if (ptr->r.record.r.mask.i)
2380 output_P4_format (f, ptr->r.record.r.mask.i,
2381 ptr->r.record.r.imask_size);
2385 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2389 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2390 ptr->r.record.p.size);
2403 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2406 output_P3_format (f, rp_br, ptr->r.record.p.br);
2409 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2417 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2426 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2436 case bspstore_sprel:
2438 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2441 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2444 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2447 as_bad ("spill_mask record unimplemented.");
2449 case priunat_when_gr:
2450 case priunat_when_mem:
2454 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2456 case priunat_psprel:
2458 case bspstore_psprel:
2460 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2463 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2466 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2470 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2473 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2474 ptr->r.record.x.reg, ptr->r.record.x.t,
2475 ptr->r.record.x.pspoff);
2478 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2479 ptr->r.record.x.reg, ptr->r.record.x.t,
2480 ptr->r.record.x.spoff);
2483 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2484 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2485 ptr->r.record.x.treg, ptr->r.record.x.t);
2487 case spill_psprel_p:
2488 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2489 ptr->r.record.x.ab, ptr->r.record.x.reg,
2490 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2493 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2494 ptr->r.record.x.ab, ptr->r.record.x.reg,
2495 ptr->r.record.x.t, ptr->r.record.x.spoff);
2498 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2499 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2500 ptr->r.record.x.xy, ptr->r.record.x.treg,
2504 as_bad ("record_type_not_valid");
2509 /* Given a unw_rec_list list, process all the records with
2510 the specified function. */
2512 process_unw_records (list, f)
2517 for (ptr = list; ptr; ptr = ptr->next)
2518 process_one_record (ptr, f);
2521 /* Determine the size of a record list in bytes. */
2523 calc_record_size (list)
2527 process_unw_records (list, count_output);
2531 /* Update IMASK bitmask to reflect the fact that one or more registers
2532 of type TYPE are saved starting at instruction with index T. If N
2533 bits are set in REGMASK, it is assumed that instructions T through
2534 T+N-1 save these registers.
2538 1: instruction saves next fp reg
2539 2: instruction saves next general reg
2540 3: instruction saves next branch reg */
2542 set_imask (region, regmask, t, type)
2543 unw_rec_list *region;
2544 unsigned long regmask;
2548 unsigned char *imask;
2549 unsigned long imask_size;
2553 imask = region->r.record.r.mask.i;
2554 imask_size = region->r.record.r.imask_size;
2557 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2558 imask = xmalloc (imask_size);
2559 memset (imask, 0, imask_size);
2561 region->r.record.r.imask_size = imask_size;
2562 region->r.record.r.mask.i = imask;
2566 pos = 2 * (3 - t % 4);
2569 if (i >= imask_size)
2571 as_bad ("Ignoring attempt to spill beyond end of region");
2575 imask[i] |= (type & 0x3) << pos;
2577 regmask &= (regmask - 1);
2587 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2588 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2589 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2593 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2594 unsigned long slot_addr;
2596 unsigned long first_addr;
2600 unsigned long index = 0;
2602 /* First time we are called, the initial address and frag are invalid. */
2603 if (first_addr == 0)
2606 /* If the two addresses are in different frags, then we need to add in
2607 the remaining size of this frag, and then the entire size of intermediate
2609 while (slot_frag != first_frag)
2611 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2615 /* We can get the final addresses only during and after
2617 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2618 index += 3 * ((first_frag->fr_next->fr_address
2619 - first_frag->fr_address
2620 - first_frag->fr_fix) >> 4);
2623 /* We don't know what the final addresses will be. We try our
2624 best to estimate. */
2625 switch (first_frag->fr_type)
2631 as_fatal ("only constant space allocation is supported");
2637 /* Take alignment into account. Assume the worst case
2638 before relaxation. */
2639 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2643 if (first_frag->fr_symbol)
2645 as_fatal ("only constant offsets are supported");
2649 index += 3 * (first_frag->fr_offset >> 4);
2653 /* Add in the full size of the frag converted to instruction slots. */
2654 index += 3 * (first_frag->fr_fix >> 4);
2655 /* Subtract away the initial part before first_addr. */
2656 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2657 + ((first_addr & 0x3) - (start_addr & 0x3)));
2659 /* Move to the beginning of the next frag. */
2660 first_frag = first_frag->fr_next;
2661 first_addr = (unsigned long) &first_frag->fr_literal;
2664 /* Add in the used part of the last frag. */
2665 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2666 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2670 /* Optimize unwind record directives. */
2672 static unw_rec_list *
2673 optimize_unw_records (list)
2679 /* If the only unwind record is ".prologue" or ".prologue" followed
2680 by ".body", then we can optimize the unwind directives away. */
2681 if (list->r.type == prologue
2682 && (list->next->r.type == endp
2683 || (list->next->r.type == body && list->next->next->r.type == endp)))
2689 /* Given a complete record list, process any records which have
2690 unresolved fields, (ie length counts for a prologue). After
2691 this has been run, all necessary information should be available
2692 within each record to generate an image. */
2695 fixup_unw_records (list, before_relax)
2699 unw_rec_list *ptr, *region = 0;
2700 unsigned long first_addr = 0, rlen = 0, t;
2701 fragS *first_frag = 0;
2703 for (ptr = list; ptr; ptr = ptr->next)
2705 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2706 as_bad (" Insn slot not set in unwind record.");
2707 t = slot_index (ptr->slot_number, ptr->slot_frag,
2708 first_addr, first_frag, before_relax);
2709 switch (ptr->r.type)
2717 unsigned long last_addr = 0;
2718 fragS *last_frag = NULL;
2720 first_addr = ptr->slot_number;
2721 first_frag = ptr->slot_frag;
2722 /* Find either the next body/prologue start, or the end of
2723 the function, and determine the size of the region. */
2724 for (last = ptr->next; last != NULL; last = last->next)
2725 if (last->r.type == prologue || last->r.type == prologue_gr
2726 || last->r.type == body || last->r.type == endp)
2728 last_addr = last->slot_number;
2729 last_frag = last->slot_frag;
2732 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2734 rlen = ptr->r.record.r.rlen = size;
2735 if (ptr->r.type == body)
2736 /* End of region. */
2744 ptr->r.record.b.t = rlen - 1 - t;
2746 /* This happens when a memory-stack-less procedure uses a
2747 ".restore sp" directive at the end of a region to pop
2749 ptr->r.record.b.t = 0;
2760 case priunat_when_gr:
2761 case priunat_when_mem:
2765 ptr->r.record.p.t = t;
2773 case spill_psprel_p:
2774 ptr->r.record.x.t = t;
2780 as_bad ("frgr_mem record before region record!");
2783 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2784 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2785 set_imask (region, ptr->r.record.p.frmask, t, 1);
2786 set_imask (region, ptr->r.record.p.grmask, t, 2);
2791 as_bad ("fr_mem record before region record!");
2794 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2795 set_imask (region, ptr->r.record.p.rmask, t, 1);
2800 as_bad ("gr_mem record before region record!");
2803 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2804 set_imask (region, ptr->r.record.p.rmask, t, 2);
2809 as_bad ("br_mem record before region record!");
2812 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2813 set_imask (region, ptr->r.record.p.brmask, t, 3);
2819 as_bad ("gr_gr record before region record!");
2822 set_imask (region, ptr->r.record.p.grmask, t, 2);
2827 as_bad ("br_gr record before region record!");
2830 set_imask (region, ptr->r.record.p.brmask, t, 3);
2839 /* Estimate the size of a frag before relaxing. We only have one type of frag
2840 to handle here, which is the unwind info frag. */
2843 ia64_estimate_size_before_relax (fragS *frag,
2844 asection *segtype ATTRIBUTE_UNUSED)
2849 /* ??? This code is identical to the first part of ia64_convert_frag. */
2850 list = (unw_rec_list *) frag->fr_opcode;
2851 fixup_unw_records (list, 0);
2853 len = calc_record_size (list);
2854 /* pad to pointer-size boundary. */
2855 pad = len % md.pointer_size;
2857 len += md.pointer_size - pad;
2858 /* Add 8 for the header. */
2860 /* Add a pointer for the personality offset. */
2861 if (frag->fr_offset)
2862 size += md.pointer_size;
2864 /* fr_var carries the max_chars that we created the fragment with.
2865 We must, of course, have allocated enough memory earlier. */
2866 assert (frag->fr_var >= size);
2868 return frag->fr_fix + size;
2871 /* This function converts a rs_machine_dependent variant frag into a
2872 normal fill frag with the unwind image from the the record list. */
2874 ia64_convert_frag (fragS *frag)
2880 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2881 list = (unw_rec_list *) frag->fr_opcode;
2882 fixup_unw_records (list, 0);
2884 len = calc_record_size (list);
2885 /* pad to pointer-size boundary. */
2886 pad = len % md.pointer_size;
2888 len += md.pointer_size - pad;
2889 /* Add 8 for the header. */
2891 /* Add a pointer for the personality offset. */
2892 if (frag->fr_offset)
2893 size += md.pointer_size;
2895 /* fr_var carries the max_chars that we created the fragment with.
2896 We must, of course, have allocated enough memory earlier. */
2897 assert (frag->fr_var >= size);
2899 /* Initialize the header area. fr_offset is initialized with
2900 unwind.personality_routine. */
2901 if (frag->fr_offset)
2903 if (md.flags & EF_IA_64_ABI64)
2904 flag_value = (bfd_vma) 3 << 32;
2906 /* 32-bit unwind info block. */
2907 flag_value = (bfd_vma) 0x1003 << 32;
2912 md_number_to_chars (frag->fr_literal,
2913 (((bfd_vma) 1 << 48) /* Version. */
2914 | flag_value /* U & E handler flags. */
2915 | (len / md.pointer_size)), /* Length. */
2918 /* Skip the header. */
2919 vbyte_mem_ptr = frag->fr_literal + 8;
2920 process_unw_records (list, output_vbyte_mem);
2922 /* Fill the padding bytes with zeros. */
2924 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2925 md.pointer_size - pad);
2927 frag->fr_fix += size;
2928 frag->fr_type = rs_fill;
2930 frag->fr_offset = 0;
2934 convert_expr_to_ab_reg (e, ab, regp)
2941 if (e->X_op != O_register)
2944 reg = e->X_add_number;
2945 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2948 *regp = reg - REG_GR;
2950 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2951 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2954 *regp = reg - REG_FR;
2956 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2959 *regp = reg - REG_BR;
2966 case REG_PR: *regp = 0; break;
2967 case REG_PSP: *regp = 1; break;
2968 case REG_PRIUNAT: *regp = 2; break;
2969 case REG_BR + 0: *regp = 3; break;
2970 case REG_AR + AR_BSP: *regp = 4; break;
2971 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2972 case REG_AR + AR_RNAT: *regp = 6; break;
2973 case REG_AR + AR_UNAT: *regp = 7; break;
2974 case REG_AR + AR_FPSR: *regp = 8; break;
2975 case REG_AR + AR_PFS: *regp = 9; break;
2976 case REG_AR + AR_LC: *regp = 10; break;
2986 convert_expr_to_xy_reg (e, xy, regp)
2993 if (e->X_op != O_register)
2996 reg = e->X_add_number;
2998 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3001 *regp = reg - REG_GR;
3003 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3006 *regp = reg - REG_FR;
3008 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3011 *regp = reg - REG_BR;
3021 /* The current frag is an alignment frag. */
3022 align_frag = frag_now;
3023 s_align_bytes (arg);
3028 int dummy ATTRIBUTE_UNUSED;
3033 radix = *input_line_pointer++;
3035 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3037 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3038 ignore_rest_of_line ();
3043 /* Helper function for .loc directives. If the assembler is not generating
3044 line number info, then we need to remember which instructions have a .loc
3045 directive, and only call dwarf2_gen_line_info for those instructions. */
3050 CURR_SLOT.loc_directive_seen = 1;
3051 dwarf2_directive_loc (x);
3054 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3056 dot_special_section (which)
3059 set_section ((char *) special_section_name[which]);
3062 /* Return -1 for warning and 0 for error. */
3065 unwind_diagnostic (const char * region, const char *directive)
3067 if (md.unwind_check == unwind_check_warning)
3069 as_warn (".%s outside of %s", directive, region);
3074 as_bad (".%s outside of %s", directive, region);
3075 ignore_rest_of_line ();
3080 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3081 a procedure but the unwind directive check is set to warning, 0 if
3082 a directive isn't in a procedure and the unwind directive check is set
3086 in_procedure (const char *directive)
3088 if (unwind.proc_start
3089 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3091 return unwind_diagnostic ("procedure", directive);
3094 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3095 a prologue but the unwind directive check is set to warning, 0 if
3096 a directive isn't in a prologue and the unwind directive check is set
3100 in_prologue (const char *directive)
3102 int in = in_procedure (directive);
3105 /* We are in a procedure. Check if we are in a prologue. */
3106 if (unwind.prologue)
3108 /* We only want to issue one message. */
3110 return unwind_diagnostic ("prologue", directive);
3117 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3118 a body but the unwind directive check is set to warning, 0 if
3119 a directive isn't in a body and the unwind directive check is set
3123 in_body (const char *directive)
3125 int in = in_procedure (directive);
3128 /* We are in a procedure. Check if we are in a body. */
3131 /* We only want to issue one message. */
3133 return unwind_diagnostic ("body region", directive);
3141 add_unwind_entry (ptr)
3145 unwind.tail->next = ptr;
3150 /* The current entry can in fact be a chain of unwind entries. */
3151 if (unwind.current_entry == NULL)
3152 unwind.current_entry = ptr;
3157 int dummy ATTRIBUTE_UNUSED;
3161 if (!in_prologue ("fframe"))
3166 if (e.X_op != O_constant)
3167 as_bad ("Operand to .fframe must be a constant");
3169 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3174 int dummy ATTRIBUTE_UNUSED;
3179 if (!in_prologue ("vframe"))
3183 reg = e.X_add_number - REG_GR;
3184 if (e.X_op == O_register && reg < 128)
3186 add_unwind_entry (output_mem_stack_v ());
3187 if (! (unwind.prologue_mask & 2))
3188 add_unwind_entry (output_psp_gr (reg));
3191 as_bad ("First operand to .vframe must be a general register");
3195 dot_vframesp (dummy)
3196 int dummy ATTRIBUTE_UNUSED;
3200 if (!in_prologue ("vframesp"))
3204 if (e.X_op == O_constant)
3206 add_unwind_entry (output_mem_stack_v ());
3207 add_unwind_entry (output_psp_sprel (e.X_add_number));
3210 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3214 dot_vframepsp (dummy)
3215 int dummy ATTRIBUTE_UNUSED;
3219 if (!in_prologue ("vframepsp"))
3223 if (e.X_op == O_constant)
3225 add_unwind_entry (output_mem_stack_v ());
3226 add_unwind_entry (output_psp_sprel (e.X_add_number));
3229 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3234 int dummy ATTRIBUTE_UNUSED;
3240 if (!in_prologue ("save"))
3243 sep = parse_operand (&e1);
3245 as_bad ("No second operand to .save");
3246 sep = parse_operand (&e2);
3248 reg1 = e1.X_add_number;
3249 reg2 = e2.X_add_number - REG_GR;
3251 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3252 if (e1.X_op == O_register)
3254 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3258 case REG_AR + AR_BSP:
3259 add_unwind_entry (output_bsp_when ());
3260 add_unwind_entry (output_bsp_gr (reg2));
3262 case REG_AR + AR_BSPSTORE:
3263 add_unwind_entry (output_bspstore_when ());
3264 add_unwind_entry (output_bspstore_gr (reg2));
3266 case REG_AR + AR_RNAT:
3267 add_unwind_entry (output_rnat_when ());
3268 add_unwind_entry (output_rnat_gr (reg2));
3270 case REG_AR + AR_UNAT:
3271 add_unwind_entry (output_unat_when ());
3272 add_unwind_entry (output_unat_gr (reg2));
3274 case REG_AR + AR_FPSR:
3275 add_unwind_entry (output_fpsr_when ());
3276 add_unwind_entry (output_fpsr_gr (reg2));
3278 case REG_AR + AR_PFS:
3279 add_unwind_entry (output_pfs_when ());
3280 if (! (unwind.prologue_mask & 4))
3281 add_unwind_entry (output_pfs_gr (reg2));
3283 case REG_AR + AR_LC:
3284 add_unwind_entry (output_lc_when ());
3285 add_unwind_entry (output_lc_gr (reg2));
3288 add_unwind_entry (output_rp_when ());
3289 if (! (unwind.prologue_mask & 8))
3290 add_unwind_entry (output_rp_gr (reg2));
3293 add_unwind_entry (output_preds_when ());
3294 if (! (unwind.prologue_mask & 1))
3295 add_unwind_entry (output_preds_gr (reg2));
3298 add_unwind_entry (output_priunat_when_gr ());
3299 add_unwind_entry (output_priunat_gr (reg2));
3302 as_bad ("First operand not a valid register");
3306 as_bad (" Second operand not a valid register");
3309 as_bad ("First operand not a register");
3314 int dummy ATTRIBUTE_UNUSED;
3317 unsigned long ecount; /* # of _additional_ regions to pop */
3320 if (!in_body ("restore"))
3323 sep = parse_operand (&e1);
3324 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3326 as_bad ("First operand to .restore must be stack pointer (sp)");
3332 parse_operand (&e2);
3333 if (e2.X_op != O_constant || e2.X_add_number < 0)
3335 as_bad ("Second operand to .restore must be a constant >= 0");
3338 ecount = e2.X_add_number;
3341 ecount = unwind.prologue_count - 1;
3343 if (ecount >= unwind.prologue_count)
3345 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3346 ecount + 1, unwind.prologue_count);
3350 add_unwind_entry (output_epilogue (ecount));
3352 if (ecount < unwind.prologue_count)
3353 unwind.prologue_count -= ecount + 1;
3355 unwind.prologue_count = 0;
3359 dot_restorereg (dummy)
3360 int dummy ATTRIBUTE_UNUSED;
3362 unsigned int ab, reg;
3365 if (!in_procedure ("restorereg"))
3370 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3372 as_bad ("First operand to .restorereg must be a preserved register");
3375 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3379 dot_restorereg_p (dummy)
3380 int dummy ATTRIBUTE_UNUSED;
3382 unsigned int qp, ab, reg;
3386 if (!in_procedure ("restorereg.p"))
3389 sep = parse_operand (&e1);
3392 as_bad ("No second operand to .restorereg.p");
3396 parse_operand (&e2);
3398 qp = e1.X_add_number - REG_P;
3399 if (e1.X_op != O_register || qp > 63)
3401 as_bad ("First operand to .restorereg.p must be a predicate");
3405 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3407 as_bad ("Second operand to .restorereg.p must be a preserved register");
3410 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3413 static char *special_linkonce_name[] =
3415 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3419 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3422 Use a slightly ugly scheme to derive the unwind section names from
3423 the text section name:
3425 text sect. unwind table sect.
3426 name: name: comments:
3427 ---------- ----------------- --------------------------------
3429 .text.foo .IA_64.unwind.text.foo
3430 .foo .IA_64.unwind.foo
3432 .gnu.linkonce.ia64unw.foo
3433 _info .IA_64.unwind_info gas issues error message (ditto)
3434 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3436 This mapping is done so that:
3438 (a) An object file with unwind info only in .text will use
3439 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3440 This follows the letter of the ABI and also ensures backwards
3441 compatibility with older toolchains.
3443 (b) An object file with unwind info in multiple text sections
3444 will use separate unwind sections for each text section.
3445 This allows us to properly set the "sh_info" and "sh_link"
3446 fields in SHT_IA_64_UNWIND as required by the ABI and also
3447 lets GNU ld support programs with multiple segments
3448 containing unwind info (as might be the case for certain
3449 embedded applications).
3451 (c) An error is issued if there would be a name clash.
3454 const char *text_name, *sec_text_name;
3456 const char *prefix = special_section_name [sec_index];
3458 size_t prefix_len, suffix_len, sec_name_len;
3460 sec_text_name = segment_name (text_seg);
3461 text_name = sec_text_name;
3462 if (strncmp (text_name, "_info", 5) == 0)
3464 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3466 ignore_rest_of_line ();
3469 if (strcmp (text_name, ".text") == 0)
3472 /* Build the unwind section name by appending the (possibly stripped)
3473 text section name to the unwind prefix. */
3475 if (strncmp (text_name, ".gnu.linkonce.t.",
3476 sizeof (".gnu.linkonce.t.") - 1) == 0)
3478 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3479 suffix += sizeof (".gnu.linkonce.t.") - 1;
3481 else if (linkonce_empty)
3484 prefix_len = strlen (prefix);
3485 suffix_len = strlen (suffix);
3486 sec_name_len = prefix_len + suffix_len;
3487 sec_name = alloca (sec_name_len + 1);
3488 memcpy (sec_name, prefix, prefix_len);
3489 memcpy (sec_name + prefix_len, suffix, suffix_len);
3490 sec_name [sec_name_len] = '\0';
3492 /* Handle COMDAT group. */
3493 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3496 size_t len, group_name_len;
3497 const char *group_name = elf_group_name (text_seg);
3499 if (group_name == NULL)
3501 as_bad ("Group section `%s' has no group signature",
3503 ignore_rest_of_line ();
3506 /* We have to construct a fake section directive. */
3507 group_name_len = strlen (group_name);
3509 + 16 /* ,"aG",@progbits, */
3510 + group_name_len /* ,group_name */
3513 section = alloca (len + 1);
3514 memcpy (section, sec_name, sec_name_len);
3515 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3516 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3517 memcpy (section + len - 7, ",comdat", 7);
3518 section [len] = '\0';
3519 set_section (section);
3523 set_section (sec_name);
3524 bfd_set_section_flags (stdoutput, now_seg,
3525 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3528 elf_linked_to_section (now_seg) = text_seg;
3532 generate_unwind_image (const segT text_seg)
3537 /* Mark the end of the unwind info, so that we can compute the size of the
3538 last unwind region. */
3539 add_unwind_entry (output_endp ());
3541 /* Force out pending instructions, to make sure all unwind records have
3542 a valid slot_number field. */
3543 ia64_flush_insns ();
3545 /* Generate the unwind record. */
3546 list = optimize_unw_records (unwind.list);
3547 fixup_unw_records (list, 1);
3548 size = calc_record_size (list);
3550 if (size > 0 || unwind.force_unwind_entry)
3552 unwind.force_unwind_entry = 0;
3553 /* pad to pointer-size boundary. */
3554 pad = size % md.pointer_size;
3556 size += md.pointer_size - pad;
3557 /* Add 8 for the header. */
3559 /* Add a pointer for the personality offset. */
3560 if (unwind.personality_routine)
3561 size += md.pointer_size;
3564 /* If there are unwind records, switch sections, and output the info. */
3568 bfd_reloc_code_real_type reloc;
3570 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3572 /* Make sure the section has 4 byte alignment for ILP32 and
3573 8 byte alignment for LP64. */
3574 frag_align (md.pointer_size_shift, 0, 0);
3575 record_alignment (now_seg, md.pointer_size_shift);
3577 /* Set expression which points to start of unwind descriptor area. */
3578 unwind.info = expr_build_dot ();
3580 frag_var (rs_machine_dependent, size, size, 0, 0,
3581 (offsetT) (long) unwind.personality_routine,
3584 /* Add the personality address to the image. */
3585 if (unwind.personality_routine != 0)
3587 exp.X_op = O_symbol;
3588 exp.X_add_symbol = unwind.personality_routine;
3589 exp.X_add_number = 0;
3591 if (md.flags & EF_IA_64_BE)
3593 if (md.flags & EF_IA_64_ABI64)
3594 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3596 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3600 if (md.flags & EF_IA_64_ABI64)
3601 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3603 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3606 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3607 md.pointer_size, &exp, 0, reloc);
3608 unwind.personality_routine = 0;
3612 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3614 free_saved_prologue_counts ();
3615 unwind.list = unwind.tail = unwind.current_entry = NULL;
3619 dot_handlerdata (dummy)
3620 int dummy ATTRIBUTE_UNUSED;
3622 if (!in_procedure ("handlerdata"))
3624 unwind.force_unwind_entry = 1;
3626 /* Remember which segment we're in so we can switch back after .endp */
3627 unwind.saved_text_seg = now_seg;
3628 unwind.saved_text_subseg = now_subseg;
3630 /* Generate unwind info into unwind-info section and then leave that
3631 section as the currently active one so dataXX directives go into
3632 the language specific data area of the unwind info block. */
3633 generate_unwind_image (now_seg);
3634 demand_empty_rest_of_line ();
3638 dot_unwentry (dummy)
3639 int dummy ATTRIBUTE_UNUSED;
3641 if (!in_procedure ("unwentry"))
3643 unwind.force_unwind_entry = 1;
3644 demand_empty_rest_of_line ();
3649 int dummy ATTRIBUTE_UNUSED;
3654 if (!in_prologue ("altrp"))
3658 reg = e.X_add_number - REG_BR;
3659 if (e.X_op == O_register && reg < 8)
3660 add_unwind_entry (output_rp_br (reg));
3662 as_bad ("First operand not a valid branch register");
3666 dot_savemem (psprel)
3673 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3676 sep = parse_operand (&e1);
3678 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3679 sep = parse_operand (&e2);
3681 reg1 = e1.X_add_number;
3682 val = e2.X_add_number;
3684 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3685 if (e1.X_op == O_register)
3687 if (e2.X_op == O_constant)
3691 case REG_AR + AR_BSP:
3692 add_unwind_entry (output_bsp_when ());
3693 add_unwind_entry ((psprel
3695 : output_bsp_sprel) (val));
3697 case REG_AR + AR_BSPSTORE:
3698 add_unwind_entry (output_bspstore_when ());
3699 add_unwind_entry ((psprel
3700 ? output_bspstore_psprel
3701 : output_bspstore_sprel) (val));
3703 case REG_AR + AR_RNAT:
3704 add_unwind_entry (output_rnat_when ());
3705 add_unwind_entry ((psprel
3706 ? output_rnat_psprel
3707 : output_rnat_sprel) (val));
3709 case REG_AR + AR_UNAT:
3710 add_unwind_entry (output_unat_when ());
3711 add_unwind_entry ((psprel
3712 ? output_unat_psprel
3713 : output_unat_sprel) (val));
3715 case REG_AR + AR_FPSR:
3716 add_unwind_entry (output_fpsr_when ());
3717 add_unwind_entry ((psprel
3718 ? output_fpsr_psprel
3719 : output_fpsr_sprel) (val));
3721 case REG_AR + AR_PFS:
3722 add_unwind_entry (output_pfs_when ());
3723 add_unwind_entry ((psprel
3725 : output_pfs_sprel) (val));
3727 case REG_AR + AR_LC:
3728 add_unwind_entry (output_lc_when ());
3729 add_unwind_entry ((psprel
3731 : output_lc_sprel) (val));
3734 add_unwind_entry (output_rp_when ());
3735 add_unwind_entry ((psprel
3737 : output_rp_sprel) (val));
3740 add_unwind_entry (output_preds_when ());
3741 add_unwind_entry ((psprel
3742 ? output_preds_psprel
3743 : output_preds_sprel) (val));
3746 add_unwind_entry (output_priunat_when_mem ());
3747 add_unwind_entry ((psprel
3748 ? output_priunat_psprel
3749 : output_priunat_sprel) (val));
3752 as_bad ("First operand not a valid register");
3756 as_bad (" Second operand not a valid constant");
3759 as_bad ("First operand not a register");
3764 int dummy ATTRIBUTE_UNUSED;
3769 if (!in_prologue ("save.g"))
3772 sep = parse_operand (&e1);
3774 parse_operand (&e2);
3776 if (e1.X_op != O_constant)
3777 as_bad ("First operand to .save.g must be a constant.");
3780 int grmask = e1.X_add_number;
3782 add_unwind_entry (output_gr_mem (grmask));
3785 int reg = e2.X_add_number - REG_GR;
3786 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3787 add_unwind_entry (output_gr_gr (grmask, reg));
3789 as_bad ("Second operand is an invalid register.");
3796 int dummy ATTRIBUTE_UNUSED;
3801 if (!in_prologue ("save.f"))
3804 sep = parse_operand (&e1);
3806 if (e1.X_op != O_constant)
3807 as_bad ("Operand to .save.f must be a constant.");
3809 add_unwind_entry (output_fr_mem (e1.X_add_number));
3814 int dummy ATTRIBUTE_UNUSED;
3821 if (!in_prologue ("save.b"))
3824 sep = parse_operand (&e1);
3825 if (e1.X_op != O_constant)
3827 as_bad ("First operand to .save.b must be a constant.");
3830 brmask = e1.X_add_number;
3834 sep = parse_operand (&e2);
3835 reg = e2.X_add_number - REG_GR;
3836 if (e2.X_op != O_register || reg > 127)
3838 as_bad ("Second operand to .save.b must be a general register.");
3841 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3844 add_unwind_entry (output_br_mem (brmask));
3846 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3847 demand_empty_rest_of_line ();
3852 int dummy ATTRIBUTE_UNUSED;
3857 if (!in_prologue ("save.gf"))
3860 sep = parse_operand (&e1);
3862 parse_operand (&e2);
3864 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3865 as_bad ("Both operands of .save.gf must be constants.");
3868 int grmask = e1.X_add_number;
3869 int frmask = e2.X_add_number;
3870 add_unwind_entry (output_frgr_mem (grmask, frmask));
3876 int dummy ATTRIBUTE_UNUSED;
3881 if (!in_prologue ("spill"))
3884 sep = parse_operand (&e);
3885 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3886 demand_empty_rest_of_line ();
3888 if (e.X_op != O_constant)
3889 as_bad ("Operand to .spill must be a constant");
3891 add_unwind_entry (output_spill_base (e.X_add_number));
3895 dot_spillreg (dummy)
3896 int dummy ATTRIBUTE_UNUSED;
3898 int sep, ab, xy, reg, treg;
3901 if (!in_procedure ("spillreg"))
3904 sep = parse_operand (&e1);
3907 as_bad ("No second operand to .spillreg");
3911 parse_operand (&e2);
3913 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3915 as_bad ("First operand to .spillreg must be a preserved register");
3919 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3921 as_bad ("Second operand to .spillreg must be a register");
3925 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3929 dot_spillmem (psprel)
3935 if (!in_procedure ("spillmem"))
3938 sep = parse_operand (&e1);
3941 as_bad ("Second operand missing");
3945 parse_operand (&e2);
3947 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3949 as_bad ("First operand to .spill%s must be a preserved register",
3950 psprel ? "psp" : "sp");
3954 if (e2.X_op != O_constant)
3956 as_bad ("Second operand to .spill%s must be a constant",
3957 psprel ? "psp" : "sp");
3962 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3964 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3968 dot_spillreg_p (dummy)
3969 int dummy ATTRIBUTE_UNUSED;
3971 int sep, ab, xy, reg, treg;
3972 expressionS e1, e2, e3;
3975 if (!in_procedure ("spillreg.p"))
3978 sep = parse_operand (&e1);
3981 as_bad ("No second and third operand to .spillreg.p");
3985 sep = parse_operand (&e2);
3988 as_bad ("No third operand to .spillreg.p");
3992 parse_operand (&e3);
3994 qp = e1.X_add_number - REG_P;
3996 if (e1.X_op != O_register || qp > 63)
3998 as_bad ("First operand to .spillreg.p must be a predicate");
4002 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4004 as_bad ("Second operand to .spillreg.p must be a preserved register");
4008 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4010 as_bad ("Third operand to .spillreg.p must be a register");
4014 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4018 dot_spillmem_p (psprel)
4021 expressionS e1, e2, e3;
4025 if (!in_procedure ("spillmem.p"))
4028 sep = parse_operand (&e1);
4031 as_bad ("Second operand missing");
4035 parse_operand (&e2);
4038 as_bad ("Second operand missing");
4042 parse_operand (&e3);
4044 qp = e1.X_add_number - REG_P;
4045 if (e1.X_op != O_register || qp > 63)
4047 as_bad ("First operand to .spill%s_p must be a predicate",
4048 psprel ? "psp" : "sp");
4052 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4054 as_bad ("Second operand to .spill%s_p must be a preserved register",
4055 psprel ? "psp" : "sp");
4059 if (e3.X_op != O_constant)
4061 as_bad ("Third operand to .spill%s_p must be a constant",
4062 psprel ? "psp" : "sp");
4067 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4069 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4073 get_saved_prologue_count (lbl)
4076 label_prologue_count *lpc = unwind.saved_prologue_counts;
4078 while (lpc != NULL && lpc->label_number != lbl)
4082 return lpc->prologue_count;
4084 as_bad ("Missing .label_state %ld", lbl);
4089 save_prologue_count (lbl, count)
4093 label_prologue_count *lpc = unwind.saved_prologue_counts;
4095 while (lpc != NULL && lpc->label_number != lbl)
4099 lpc->prologue_count = count;
4102 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4104 new_lpc->next = unwind.saved_prologue_counts;
4105 new_lpc->label_number = lbl;
4106 new_lpc->prologue_count = count;
4107 unwind.saved_prologue_counts = new_lpc;
4112 free_saved_prologue_counts ()
4114 label_prologue_count *lpc = unwind.saved_prologue_counts;
4115 label_prologue_count *next;
4124 unwind.saved_prologue_counts = NULL;
4128 dot_label_state (dummy)
4129 int dummy ATTRIBUTE_UNUSED;
4133 if (!in_body ("label_state"))
4137 if (e.X_op != O_constant)
4139 as_bad ("Operand to .label_state must be a constant");
4142 add_unwind_entry (output_label_state (e.X_add_number));
4143 save_prologue_count (e.X_add_number, unwind.prologue_count);
4147 dot_copy_state (dummy)
4148 int dummy ATTRIBUTE_UNUSED;
4152 if (!in_body ("copy_state"))
4156 if (e.X_op != O_constant)
4158 as_bad ("Operand to .copy_state must be a constant");
4161 add_unwind_entry (output_copy_state (e.X_add_number));
4162 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4167 int dummy ATTRIBUTE_UNUSED;
4172 if (!in_procedure ("unwabi"))
4175 sep = parse_operand (&e1);
4178 as_bad ("Second operand to .unwabi missing");
4181 sep = parse_operand (&e2);
4182 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4183 demand_empty_rest_of_line ();
4185 if (e1.X_op != O_constant)
4187 as_bad ("First operand to .unwabi must be a constant");
4191 if (e2.X_op != O_constant)
4193 as_bad ("Second operand to .unwabi must be a constant");
4197 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4201 dot_personality (dummy)
4202 int dummy ATTRIBUTE_UNUSED;
4205 if (!in_procedure ("personality"))
4208 name = input_line_pointer;
4209 c = get_symbol_end ();
4210 p = input_line_pointer;
4211 unwind.personality_routine = symbol_find_or_make (name);
4212 unwind.force_unwind_entry = 1;
4215 demand_empty_rest_of_line ();
4220 int dummy ATTRIBUTE_UNUSED;
4225 unwind.proc_start = 0;
4226 /* Parse names of main and alternate entry points and mark them as
4227 function symbols: */
4231 name = input_line_pointer;
4232 c = get_symbol_end ();
4233 p = input_line_pointer;
4235 as_bad ("Empty argument of .proc");
4238 sym = symbol_find_or_make (name);
4239 if (S_IS_DEFINED (sym))
4240 as_bad ("`%s' was already defined", name);
4241 else if (unwind.proc_start == 0)
4243 unwind.proc_start = sym;
4245 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4249 if (*input_line_pointer != ',')
4251 ++input_line_pointer;
4253 if (unwind.proc_start == 0)
4254 unwind.proc_start = expr_build_dot ();
4255 demand_empty_rest_of_line ();
4258 unwind.prologue = 0;
4259 unwind.prologue_count = 0;
4262 unwind.list = unwind.tail = unwind.current_entry = NULL;
4263 unwind.personality_routine = 0;
4268 int dummy ATTRIBUTE_UNUSED;
4270 if (!in_procedure ("body"))
4272 if (!unwind.prologue && !unwind.body && unwind.insn)
4273 as_warn ("Initial .body should precede any instructions");
4275 unwind.prologue = 0;
4276 unwind.prologue_mask = 0;
4279 add_unwind_entry (output_body ());
4280 demand_empty_rest_of_line ();
4284 dot_prologue (dummy)
4285 int dummy ATTRIBUTE_UNUSED;
4288 int mask = 0, grsave = 0;
4290 if (!in_procedure ("prologue"))
4292 if (unwind.prologue)
4294 as_bad (".prologue within prologue");
4295 ignore_rest_of_line ();
4298 if (!unwind.body && unwind.insn)
4299 as_warn ("Initial .prologue should precede any instructions");
4301 if (!is_it_end_of_statement ())
4304 sep = parse_operand (&e1);
4306 as_bad ("No second operand to .prologue");
4307 sep = parse_operand (&e2);
4308 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4309 demand_empty_rest_of_line ();
4311 if (e1.X_op == O_constant)
4313 mask = e1.X_add_number;
4315 if (e2.X_op == O_constant)
4316 grsave = e2.X_add_number;
4317 else if (e2.X_op == O_register
4318 && (grsave = e2.X_add_number - REG_GR) < 128)
4321 as_bad ("Second operand not a constant or general register");
4323 add_unwind_entry (output_prologue_gr (mask, grsave));
4326 as_bad ("First operand not a constant");
4329 add_unwind_entry (output_prologue ());
4331 unwind.prologue = 1;
4332 unwind.prologue_mask = mask;
4334 ++unwind.prologue_count;
4339 int dummy ATTRIBUTE_UNUSED;
4343 int bytes_per_address;
4346 subsegT saved_subseg;
4347 char *name, *default_name, *p, c;
4349 int unwind_check = md.unwind_check;
4351 md.unwind_check = unwind_check_error;
4352 if (!in_procedure ("endp"))
4354 md.unwind_check = unwind_check;
4356 if (unwind.saved_text_seg)
4358 saved_seg = unwind.saved_text_seg;
4359 saved_subseg = unwind.saved_text_subseg;
4360 unwind.saved_text_seg = NULL;
4364 saved_seg = now_seg;
4365 saved_subseg = now_subseg;
4368 insn_group_break (1, 0, 0);
4370 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4372 generate_unwind_image (saved_seg);
4374 if (unwind.info || unwind.force_unwind_entry)
4378 subseg_set (md.last_text_seg, 0);
4379 proc_end = expr_build_dot ();
4381 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4383 /* Make sure that section has 4 byte alignment for ILP32 and
4384 8 byte alignment for LP64. */
4385 record_alignment (now_seg, md.pointer_size_shift);
4387 /* Need space for 3 pointers for procedure start, procedure end,
4389 ptr = frag_more (3 * md.pointer_size);
4390 where = frag_now_fix () - (3 * md.pointer_size);
4391 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4393 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4394 e.X_op = O_pseudo_fixup;
4395 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4397 e.X_add_symbol = unwind.proc_start;
4398 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4400 e.X_op = O_pseudo_fixup;
4401 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4403 e.X_add_symbol = proc_end;
4404 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4405 bytes_per_address, &e);
4409 e.X_op = O_pseudo_fixup;
4410 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4412 e.X_add_symbol = unwind.info;
4413 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4414 bytes_per_address, &e);
4417 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4422 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4424 subseg_set (saved_seg, saved_subseg);
4426 if (unwind.proc_start)
4427 default_name = (char *) S_GET_NAME (unwind.proc_start);
4429 default_name = NULL;
4431 /* Parse names of main and alternate entry points and set symbol sizes. */
4435 name = input_line_pointer;
4436 c = get_symbol_end ();
4437 p = input_line_pointer;
4440 if (md.unwind_check == unwind_check_warning)
4444 as_warn ("Empty argument of .endp. Use the default name `%s'",
4446 name = default_name;
4449 as_warn ("Empty argument of .endp");
4452 as_bad ("Empty argument of .endp");
4456 sym = symbol_find (name);
4458 && md.unwind_check == unwind_check_warning
4460 && default_name != name)
4462 /* We have a bad name. Try the default one if needed. */
4463 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4464 name, default_name);
4465 name = default_name;
4466 sym = symbol_find (name);
4468 if (!sym || !S_IS_DEFINED (sym))
4469 as_bad ("`%s' was not defined within procedure", name);
4470 else if (unwind.proc_start
4471 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4472 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4474 fragS *fr = symbol_get_frag (unwind.proc_start);
4475 fragS *frag = symbol_get_frag (sym);
4477 /* Check whether the function label is at or beyond last
4479 while (fr && fr != frag)
4483 if (frag == frag_now && SEG_NORMAL (now_seg))
4484 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4487 symbol_get_obj (sym)->size =
4488 (expressionS *) xmalloc (sizeof (expressionS));
4489 symbol_get_obj (sym)->size->X_op = O_subtract;
4490 symbol_get_obj (sym)->size->X_add_symbol
4491 = symbol_new (FAKE_LABEL_NAME, now_seg,
4492 frag_now_fix (), frag_now);
4493 symbol_get_obj (sym)->size->X_op_symbol = sym;
4494 symbol_get_obj (sym)->size->X_add_number = 0;
4501 if (*input_line_pointer != ',')
4503 ++input_line_pointer;
4505 demand_empty_rest_of_line ();
4506 unwind.proc_start = unwind.info = 0;
4510 dot_template (template)
4513 CURR_SLOT.user_template = template;
4518 int dummy ATTRIBUTE_UNUSED;
4520 int ins, locs, outs, rots;
4522 if (is_it_end_of_statement ())
4523 ins = locs = outs = rots = 0;
4526 ins = get_absolute_expression ();
4527 if (*input_line_pointer++ != ',')
4529 locs = get_absolute_expression ();
4530 if (*input_line_pointer++ != ',')
4532 outs = get_absolute_expression ();
4533 if (*input_line_pointer++ != ',')
4535 rots = get_absolute_expression ();
4537 set_regstack (ins, locs, outs, rots);
4541 as_bad ("Comma expected");
4542 ignore_rest_of_line ();
4549 unsigned num_regs, num_alloced = 0;
4550 struct dynreg **drpp, *dr;
4551 int ch, base_reg = 0;
4557 case DYNREG_GR: base_reg = REG_GR + 32; break;
4558 case DYNREG_FR: base_reg = REG_FR + 32; break;
4559 case DYNREG_PR: base_reg = REG_P + 16; break;
4563 /* First, remove existing names from hash table. */
4564 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4566 hash_delete (md.dynreg_hash, dr->name);
4567 /* FIXME: Free dr->name. */
4571 drpp = &md.dynreg[type];
4574 start = input_line_pointer;
4575 ch = get_symbol_end ();
4576 len = strlen (ia64_canonicalize_symbol_name (start));
4577 *input_line_pointer = ch;
4580 if (*input_line_pointer != '[')
4582 as_bad ("Expected '['");
4585 ++input_line_pointer; /* skip '[' */
4587 num_regs = get_absolute_expression ();
4589 if (*input_line_pointer++ != ']')
4591 as_bad ("Expected ']'");
4596 num_alloced += num_regs;
4600 if (num_alloced > md.rot.num_regs)
4602 as_bad ("Used more than the declared %d rotating registers",
4608 if (num_alloced > 96)
4610 as_bad ("Used more than the available 96 rotating registers");
4615 if (num_alloced > 48)
4617 as_bad ("Used more than the available 48 rotating registers");
4628 *drpp = obstack_alloc (¬es, sizeof (*dr));
4629 memset (*drpp, 0, sizeof (*dr));
4632 name = obstack_alloc (¬es, len + 1);
4633 memcpy (name, start, len);
4638 dr->num_regs = num_regs;
4639 dr->base = base_reg;
4641 base_reg += num_regs;
4643 if (hash_insert (md.dynreg_hash, name, dr))
4645 as_bad ("Attempt to redefine register set `%s'", name);
4646 obstack_free (¬es, name);
4650 if (*input_line_pointer != ',')
4652 ++input_line_pointer; /* skip comma */
4655 demand_empty_rest_of_line ();
4659 ignore_rest_of_line ();
4663 dot_byteorder (byteorder)
4666 segment_info_type *seginfo = seg_info (now_seg);
4668 if (byteorder == -1)
4670 if (seginfo->tc_segment_info_data.endian == 0)
4671 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4672 byteorder = seginfo->tc_segment_info_data.endian == 1;
4675 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4677 if (target_big_endian != byteorder)
4679 target_big_endian = byteorder;
4680 if (target_big_endian)
4682 ia64_number_to_chars = number_to_chars_bigendian;
4683 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4687 ia64_number_to_chars = number_to_chars_littleendian;
4688 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4695 int dummy ATTRIBUTE_UNUSED;
4702 option = input_line_pointer;
4703 ch = get_symbol_end ();
4704 if (strcmp (option, "lsb") == 0)
4705 md.flags &= ~EF_IA_64_BE;
4706 else if (strcmp (option, "msb") == 0)
4707 md.flags |= EF_IA_64_BE;
4708 else if (strcmp (option, "abi32") == 0)
4709 md.flags &= ~EF_IA_64_ABI64;
4710 else if (strcmp (option, "abi64") == 0)
4711 md.flags |= EF_IA_64_ABI64;
4713 as_bad ("Unknown psr option `%s'", option);
4714 *input_line_pointer = ch;
4717 if (*input_line_pointer != ',')
4720 ++input_line_pointer;
4723 demand_empty_rest_of_line ();
4728 int dummy ATTRIBUTE_UNUSED;
4730 new_logical_line (0, get_absolute_expression ());
4731 demand_empty_rest_of_line ();
4735 parse_section_name ()
4741 if (*input_line_pointer == '"')
4742 name = demand_copy_C_string (&len);
4745 char *start = input_line_pointer;
4746 char c = get_symbol_end ();
4748 if (input_line_pointer == start)
4750 as_bad ("Missing section name");
4751 ignore_rest_of_line ();
4754 name = obstack_copy (¬es, start, input_line_pointer - start + 1);
4755 *input_line_pointer = c;
4759 ignore_rest_of_line ();
4763 if (*input_line_pointer != ',')
4765 as_bad ("Comma expected after section name");
4766 ignore_rest_of_line ();
4769 ++input_line_pointer; /* skip comma */
4777 char *name = parse_section_name ();
4781 md.keep_pending_output = 1;
4784 obj_elf_previous (0);
4785 md.keep_pending_output = 0;
4788 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4791 stmt_float_cons (kind)
4812 ia64_do_align (alignment);
4820 int saved_auto_align = md.auto_align;
4824 md.auto_align = saved_auto_align;
4828 dot_xfloat_cons (kind)
4831 char *name = parse_section_name ();
4835 md.keep_pending_output = 1;
4837 stmt_float_cons (kind);
4838 obj_elf_previous (0);
4839 md.keep_pending_output = 0;
4843 dot_xstringer (zero)
4846 char *name = parse_section_name ();
4850 md.keep_pending_output = 1;
4853 obj_elf_previous (0);
4854 md.keep_pending_output = 0;
4861 int saved_auto_align = md.auto_align;
4862 char *name = parse_section_name ();
4866 md.keep_pending_output = 1;
4870 md.auto_align = saved_auto_align;
4871 obj_elf_previous (0);
4872 md.keep_pending_output = 0;
4876 dot_xfloat_cons_ua (kind)
4879 int saved_auto_align = md.auto_align;
4880 char *name = parse_section_name ();
4884 md.keep_pending_output = 1;
4887 stmt_float_cons (kind);
4888 md.auto_align = saved_auto_align;
4889 obj_elf_previous (0);
4890 md.keep_pending_output = 0;
4893 /* .reg.val <regname>,value */
4897 int dummy ATTRIBUTE_UNUSED;
4902 if (reg.X_op != O_register)
4904 as_bad (_("Register name expected"));
4905 ignore_rest_of_line ();
4907 else if (*input_line_pointer++ != ',')
4909 as_bad (_("Comma expected"));
4910 ignore_rest_of_line ();
4914 valueT value = get_absolute_expression ();
4915 int regno = reg.X_add_number;
4916 if (regno < REG_GR || regno > REG_GR + 128)
4917 as_warn (_("Register value annotation ignored"));
4920 gr_values[regno - REG_GR].known = 1;
4921 gr_values[regno - REG_GR].value = value;
4922 gr_values[regno - REG_GR].path = md.path;
4925 demand_empty_rest_of_line ();
4930 .serialize.instruction
4933 dot_serialize (type)
4936 insn_group_break (0, 0, 0);
4938 instruction_serialization ();
4940 data_serialization ();
4941 insn_group_break (0, 0, 0);
4942 demand_empty_rest_of_line ();
4945 /* select dv checking mode
4950 A stop is inserted when changing modes
4957 if (md.manual_bundling)
4958 as_warn (_("Directive invalid within a bundle"));
4960 if (type == 'E' || type == 'A')
4961 md.mode_explicitly_set = 0;
4963 md.mode_explicitly_set = 1;
4970 if (md.explicit_mode)
4971 insn_group_break (1, 0, 0);
4972 md.explicit_mode = 0;
4976 if (!md.explicit_mode)
4977 insn_group_break (1, 0, 0);
4978 md.explicit_mode = 1;
4982 if (md.explicit_mode != md.default_explicit_mode)
4983 insn_group_break (1, 0, 0);
4984 md.explicit_mode = md.default_explicit_mode;
4985 md.mode_explicitly_set = 0;
4996 for (regno = 0; regno < 64; regno++)
4998 if (mask & ((valueT) 1 << regno))
5000 fprintf (stderr, "%s p%d", comma, regno);
5007 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5008 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5009 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5010 .pred.safe_across_calls p1 [, p2 [,...]]
5019 int p1 = -1, p2 = -1;
5023 if (*input_line_pointer == '"')
5026 char *form = demand_copy_C_string (&len);
5028 if (strcmp (form, "mutex") == 0)
5030 else if (strcmp (form, "clear") == 0)
5032 else if (strcmp (form, "imply") == 0)
5034 obstack_free (¬es, form);
5036 else if (*input_line_pointer == '@')
5038 char *form = ++input_line_pointer;
5039 char c = get_symbol_end();
5041 if (strcmp (form, "mutex") == 0)
5043 else if (strcmp (form, "clear") == 0)
5045 else if (strcmp (form, "imply") == 0)
5047 *input_line_pointer = c;
5051 as_bad (_("Missing predicate relation type"));
5052 ignore_rest_of_line ();
5057 as_bad (_("Unrecognized predicate relation type"));
5058 ignore_rest_of_line ();
5061 if (*input_line_pointer == ',')
5062 ++input_line_pointer;
5071 expressionS pr, *pr1, *pr2;
5074 if (pr.X_op == O_register
5075 && pr.X_add_number >= REG_P
5076 && pr.X_add_number <= REG_P + 63)
5078 regno = pr.X_add_number - REG_P;
5086 else if (type != 'i'
5087 && pr.X_op == O_subtract
5088 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5089 && pr1->X_op == O_register
5090 && pr1->X_add_number >= REG_P
5091 && pr1->X_add_number <= REG_P + 63
5092 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5093 && pr2->X_op == O_register
5094 && pr2->X_add_number >= REG_P
5095 && pr2->X_add_number <= REG_P + 63)
5100 regno = pr1->X_add_number - REG_P;
5101 stop = pr2->X_add_number - REG_P;
5104 as_bad (_("Bad register range"));
5105 ignore_rest_of_line ();
5108 bits = ((bits << stop) << 1) - (bits << regno);
5109 count += stop - regno + 1;
5113 as_bad (_("Predicate register expected"));
5114 ignore_rest_of_line ();
5118 as_warn (_("Duplicate predicate register ignored"));
5120 if (*input_line_pointer != ',')
5122 ++input_line_pointer;
5131 clear_qp_mutex (mask);
5132 clear_qp_implies (mask, (valueT) 0);
5135 if (count != 2 || p1 == -1 || p2 == -1)
5136 as_bad (_("Predicate source and target required"));
5137 else if (p1 == 0 || p2 == 0)
5138 as_bad (_("Use of p0 is not valid in this context"));
5140 add_qp_imply (p1, p2);
5145 as_bad (_("At least two PR arguments expected"));
5150 as_bad (_("Use of p0 is not valid in this context"));
5153 add_qp_mutex (mask);
5156 /* note that we don't override any existing relations */
5159 as_bad (_("At least one PR argument expected"));
5164 fprintf (stderr, "Safe across calls: ");
5165 print_prmask (mask);
5166 fprintf (stderr, "\n");
5168 qp_safe_across_calls = mask;
5171 demand_empty_rest_of_line ();
5174 /* .entry label [, label [, ...]]
5175 Hint to DV code that the given labels are to be considered entry points.
5176 Otherwise, only global labels are considered entry points. */
5180 int dummy ATTRIBUTE_UNUSED;
5189 name = input_line_pointer;
5190 c = get_symbol_end ();
5191 symbolP = symbol_find_or_make (name);
5193 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5195 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5198 *input_line_pointer = c;
5200 c = *input_line_pointer;
5203 input_line_pointer++;
5205 if (*input_line_pointer == '\n')
5211 demand_empty_rest_of_line ();
5214 /* .mem.offset offset, base
5215 "base" is used to distinguish between offsets from a different base. */
5218 dot_mem_offset (dummy)
5219 int dummy ATTRIBUTE_UNUSED;
5221 md.mem_offset.hint = 1;
5222 md.mem_offset.offset = get_absolute_expression ();
5223 if (*input_line_pointer != ',')
5225 as_bad (_("Comma expected"));
5226 ignore_rest_of_line ();
5229 ++input_line_pointer;
5230 md.mem_offset.base = get_absolute_expression ();
5231 demand_empty_rest_of_line ();
5234 /* ia64-specific pseudo-ops: */
5235 const pseudo_typeS md_pseudo_table[] =
5237 { "radix", dot_radix, 0 },
5238 { "lcomm", s_lcomm_bytes, 1 },
5239 { "loc", dot_loc, 0 },
5240 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5241 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5242 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5243 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5244 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5245 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5246 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5247 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5248 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5249 { "proc", dot_proc, 0 },
5250 { "body", dot_body, 0 },
5251 { "prologue", dot_prologue, 0 },
5252 { "endp", dot_endp, 0 },
5254 { "fframe", dot_fframe, 0 },
5255 { "vframe", dot_vframe, 0 },
5256 { "vframesp", dot_vframesp, 0 },
5257 { "vframepsp", dot_vframepsp, 0 },
5258 { "save", dot_save, 0 },
5259 { "restore", dot_restore, 0 },
5260 { "restorereg", dot_restorereg, 0 },
5261 { "restorereg.p", dot_restorereg_p, 0 },
5262 { "handlerdata", dot_handlerdata, 0 },
5263 { "unwentry", dot_unwentry, 0 },
5264 { "altrp", dot_altrp, 0 },
5265 { "savesp", dot_savemem, 0 },
5266 { "savepsp", dot_savemem, 1 },
5267 { "save.g", dot_saveg, 0 },
5268 { "save.f", dot_savef, 0 },
5269 { "save.b", dot_saveb, 0 },
5270 { "save.gf", dot_savegf, 0 },
5271 { "spill", dot_spill, 0 },
5272 { "spillreg", dot_spillreg, 0 },
5273 { "spillsp", dot_spillmem, 0 },
5274 { "spillpsp", dot_spillmem, 1 },
5275 { "spillreg.p", dot_spillreg_p, 0 },
5276 { "spillsp.p", dot_spillmem_p, 0 },
5277 { "spillpsp.p", dot_spillmem_p, 1 },
5278 { "label_state", dot_label_state, 0 },
5279 { "copy_state", dot_copy_state, 0 },
5280 { "unwabi", dot_unwabi, 0 },
5281 { "personality", dot_personality, 0 },
5282 { "mii", dot_template, 0x0 },
5283 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5284 { "mlx", dot_template, 0x2 },
5285 { "mmi", dot_template, 0x4 },
5286 { "mfi", dot_template, 0x6 },
5287 { "mmf", dot_template, 0x7 },
5288 { "mib", dot_template, 0x8 },
5289 { "mbb", dot_template, 0x9 },
5290 { "bbb", dot_template, 0xb },
5291 { "mmb", dot_template, 0xc },
5292 { "mfb", dot_template, 0xe },
5293 { "align", dot_align, 0 },
5294 { "regstk", dot_regstk, 0 },
5295 { "rotr", dot_rot, DYNREG_GR },
5296 { "rotf", dot_rot, DYNREG_FR },
5297 { "rotp", dot_rot, DYNREG_PR },
5298 { "lsb", dot_byteorder, 0 },
5299 { "msb", dot_byteorder, 1 },
5300 { "psr", dot_psr, 0 },
5301 { "alias", dot_alias, 0 },
5302 { "secalias", dot_alias, 1 },
5303 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5305 { "xdata1", dot_xdata, 1 },
5306 { "xdata2", dot_xdata, 2 },
5307 { "xdata4", dot_xdata, 4 },
5308 { "xdata8", dot_xdata, 8 },
5309 { "xdata16", dot_xdata, 16 },
5310 { "xreal4", dot_xfloat_cons, 'f' },
5311 { "xreal8", dot_xfloat_cons, 'd' },
5312 { "xreal10", dot_xfloat_cons, 'x' },
5313 { "xreal16", dot_xfloat_cons, 'X' },
5314 { "xstring", dot_xstringer, 0 },
5315 { "xstringz", dot_xstringer, 1 },
5317 /* unaligned versions: */
5318 { "xdata2.ua", dot_xdata_ua, 2 },
5319 { "xdata4.ua", dot_xdata_ua, 4 },
5320 { "xdata8.ua", dot_xdata_ua, 8 },
5321 { "xdata16.ua", dot_xdata_ua, 16 },
5322 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5323 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5324 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5325 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5327 /* annotations/DV checking support */
5328 { "entry", dot_entry, 0 },
5329 { "mem.offset", dot_mem_offset, 0 },
5330 { "pred.rel", dot_pred_rel, 0 },
5331 { "pred.rel.clear", dot_pred_rel, 'c' },
5332 { "pred.rel.imply", dot_pred_rel, 'i' },
5333 { "pred.rel.mutex", dot_pred_rel, 'm' },
5334 { "pred.safe_across_calls", dot_pred_rel, 's' },
5335 { "reg.val", dot_reg_val, 0 },
5336 { "serialize.data", dot_serialize, 0 },
5337 { "serialize.instruction", dot_serialize, 1 },
5338 { "auto", dot_dv_mode, 'a' },
5339 { "explicit", dot_dv_mode, 'e' },
5340 { "default", dot_dv_mode, 'd' },
5342 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5343 IA-64 aligns data allocation pseudo-ops by default, so we have to
5344 tell it that these ones are supposed to be unaligned. Long term,
5345 should rewrite so that only IA-64 specific data allocation pseudo-ops
5346 are aligned by default. */
5347 {"2byte", stmt_cons_ua, 2},
5348 {"4byte", stmt_cons_ua, 4},
5349 {"8byte", stmt_cons_ua, 8},
5354 static const struct pseudo_opcode
5357 void (*handler) (int);
5362 /* these are more like pseudo-ops, but don't start with a dot */
5363 { "data1", cons, 1 },
5364 { "data2", cons, 2 },
5365 { "data4", cons, 4 },
5366 { "data8", cons, 8 },
5367 { "data16", cons, 16 },
5368 { "real4", stmt_float_cons, 'f' },
5369 { "real8", stmt_float_cons, 'd' },
5370 { "real10", stmt_float_cons, 'x' },
5371 { "real16", stmt_float_cons, 'X' },
5372 { "string", stringer, 0 },
5373 { "stringz", stringer, 1 },
5375 /* unaligned versions: */
5376 { "data2.ua", stmt_cons_ua, 2 },
5377 { "data4.ua", stmt_cons_ua, 4 },
5378 { "data8.ua", stmt_cons_ua, 8 },
5379 { "data16.ua", stmt_cons_ua, 16 },
5380 { "real4.ua", float_cons, 'f' },
5381 { "real8.ua", float_cons, 'd' },
5382 { "real10.ua", float_cons, 'x' },
5383 { "real16.ua", float_cons, 'X' },
5386 /* Declare a register by creating a symbol for it and entering it in
5387 the symbol table. */
5390 declare_register (name, regnum)
5397 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5399 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5401 as_fatal ("Inserting \"%s\" into register table failed: %s",
5408 declare_register_set (prefix, num_regs, base_regnum)
5416 for (i = 0; i < num_regs; ++i)
5418 sprintf (name, "%s%u", prefix, i);
5419 declare_register (name, base_regnum + i);
5424 operand_width (opnd)
5425 enum ia64_opnd opnd;
5427 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5428 unsigned int bits = 0;
5432 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5433 bits += odesc->field[i].bits;
5438 static enum operand_match_result
5439 operand_match (idesc, index, e)
5440 const struct ia64_opcode *idesc;
5444 enum ia64_opnd opnd = idesc->operands[index];
5445 int bits, relocatable = 0;
5446 struct insn_fix *fix;
5453 case IA64_OPND_AR_CCV:
5454 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5455 return OPERAND_MATCH;
5458 case IA64_OPND_AR_CSD:
5459 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5460 return OPERAND_MATCH;
5463 case IA64_OPND_AR_PFS:
5464 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5465 return OPERAND_MATCH;
5469 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5470 return OPERAND_MATCH;
5474 if (e->X_op == O_register && e->X_add_number == REG_IP)
5475 return OPERAND_MATCH;
5479 if (e->X_op == O_register && e->X_add_number == REG_PR)
5480 return OPERAND_MATCH;
5483 case IA64_OPND_PR_ROT:
5484 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5485 return OPERAND_MATCH;
5489 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5490 return OPERAND_MATCH;
5493 case IA64_OPND_PSR_L:
5494 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5495 return OPERAND_MATCH;
5498 case IA64_OPND_PSR_UM:
5499 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5500 return OPERAND_MATCH;
5504 if (e->X_op == O_constant)
5506 if (e->X_add_number == 1)
5507 return OPERAND_MATCH;
5509 return OPERAND_OUT_OF_RANGE;
5514 if (e->X_op == O_constant)
5516 if (e->X_add_number == 8)
5517 return OPERAND_MATCH;
5519 return OPERAND_OUT_OF_RANGE;
5524 if (e->X_op == O_constant)
5526 if (e->X_add_number == 16)
5527 return OPERAND_MATCH;
5529 return OPERAND_OUT_OF_RANGE;
5533 /* register operands: */
5536 if (e->X_op == O_register && e->X_add_number >= REG_AR
5537 && e->X_add_number < REG_AR + 128)
5538 return OPERAND_MATCH;
5543 if (e->X_op == O_register && e->X_add_number >= REG_BR
5544 && e->X_add_number < REG_BR + 8)
5545 return OPERAND_MATCH;
5549 if (e->X_op == O_register && e->X_add_number >= REG_CR
5550 && e->X_add_number < REG_CR + 128)
5551 return OPERAND_MATCH;
5558 if (e->X_op == O_register && e->X_add_number >= REG_FR
5559 && e->X_add_number < REG_FR + 128)
5560 return OPERAND_MATCH;
5565 if (e->X_op == O_register && e->X_add_number >= REG_P
5566 && e->X_add_number < REG_P + 64)
5567 return OPERAND_MATCH;
5573 if (e->X_op == O_register && e->X_add_number >= REG_GR
5574 && e->X_add_number < REG_GR + 128)
5575 return OPERAND_MATCH;
5578 case IA64_OPND_R3_2:
5579 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5581 if (e->X_add_number < REG_GR + 4)
5582 return OPERAND_MATCH;
5583 else if (e->X_add_number < REG_GR + 128)
5584 return OPERAND_OUT_OF_RANGE;
5588 /* indirect operands: */
5589 case IA64_OPND_CPUID_R3:
5590 case IA64_OPND_DBR_R3:
5591 case IA64_OPND_DTR_R3:
5592 case IA64_OPND_ITR_R3:
5593 case IA64_OPND_IBR_R3:
5594 case IA64_OPND_MSR_R3:
5595 case IA64_OPND_PKR_R3:
5596 case IA64_OPND_PMC_R3:
5597 case IA64_OPND_PMD_R3:
5598 case IA64_OPND_RR_R3:
5599 if (e->X_op == O_index && e->X_op_symbol
5600 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5601 == opnd - IA64_OPND_CPUID_R3))
5602 return OPERAND_MATCH;
5606 if (e->X_op == O_index && !e->X_op_symbol)
5607 return OPERAND_MATCH;
5610 /* immediate operands: */
5611 case IA64_OPND_CNT2a:
5612 case IA64_OPND_LEN4:
5613 case IA64_OPND_LEN6:
5614 bits = operand_width (idesc->operands[index]);
5615 if (e->X_op == O_constant)
5617 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5618 return OPERAND_MATCH;
5620 return OPERAND_OUT_OF_RANGE;
5624 case IA64_OPND_CNT2b:
5625 if (e->X_op == O_constant)
5627 if ((bfd_vma) (e->X_add_number - 1) < 3)
5628 return OPERAND_MATCH;
5630 return OPERAND_OUT_OF_RANGE;
5634 case IA64_OPND_CNT2c:
5635 val = e->X_add_number;
5636 if (e->X_op == O_constant)
5638 if ((val == 0 || val == 7 || val == 15 || val == 16))
5639 return OPERAND_MATCH;
5641 return OPERAND_OUT_OF_RANGE;
5646 /* SOR must be an integer multiple of 8 */
5647 if (e->X_op == O_constant && e->X_add_number & 0x7)
5648 return OPERAND_OUT_OF_RANGE;
5651 if (e->X_op == O_constant)
5653 if ((bfd_vma) e->X_add_number <= 96)
5654 return OPERAND_MATCH;
5656 return OPERAND_OUT_OF_RANGE;
5660 case IA64_OPND_IMMU62:
5661 if (e->X_op == O_constant)
5663 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5664 return OPERAND_MATCH;
5666 return OPERAND_OUT_OF_RANGE;
5670 /* FIXME -- need 62-bit relocation type */
5671 as_bad (_("62-bit relocation not yet implemented"));
5675 case IA64_OPND_IMMU64:
5676 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5677 || e->X_op == O_subtract)
5679 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5680 fix->code = BFD_RELOC_IA64_IMM64;
5681 if (e->X_op != O_subtract)
5683 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5684 if (e->X_op == O_pseudo_fixup)
5688 fix->opnd = idesc->operands[index];
5691 ++CURR_SLOT.num_fixups;
5692 return OPERAND_MATCH;
5694 else if (e->X_op == O_constant)
5695 return OPERAND_MATCH;
5698 case IA64_OPND_CCNT5:
5699 case IA64_OPND_CNT5:
5700 case IA64_OPND_CNT6:
5701 case IA64_OPND_CPOS6a:
5702 case IA64_OPND_CPOS6b:
5703 case IA64_OPND_CPOS6c:
5704 case IA64_OPND_IMMU2:
5705 case IA64_OPND_IMMU7a:
5706 case IA64_OPND_IMMU7b:
5707 case IA64_OPND_IMMU21:
5708 case IA64_OPND_IMMU24:
5709 case IA64_OPND_MBTYPE4:
5710 case IA64_OPND_MHTYPE8:
5711 case IA64_OPND_POS6:
5712 bits = operand_width (idesc->operands[index]);
5713 if (e->X_op == O_constant)
5715 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5716 return OPERAND_MATCH;
5718 return OPERAND_OUT_OF_RANGE;
5722 case IA64_OPND_IMMU9:
5723 bits = operand_width (idesc->operands[index]);
5724 if (e->X_op == O_constant)
5726 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5728 int lobits = e->X_add_number & 0x3;
5729 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5730 e->X_add_number |= (bfd_vma) 0x3;
5731 return OPERAND_MATCH;
5734 return OPERAND_OUT_OF_RANGE;
5738 case IA64_OPND_IMM44:
5739 /* least 16 bits must be zero */
5740 if ((e->X_add_number & 0xffff) != 0)
5741 /* XXX technically, this is wrong: we should not be issuing warning
5742 messages until we're sure this instruction pattern is going to
5744 as_warn (_("lower 16 bits of mask ignored"));
5746 if (e->X_op == O_constant)
5748 if (((e->X_add_number >= 0
5749 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5750 || (e->X_add_number < 0
5751 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5754 if (e->X_add_number >= 0
5755 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5757 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5759 return OPERAND_MATCH;
5762 return OPERAND_OUT_OF_RANGE;
5766 case IA64_OPND_IMM17:
5767 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5768 if (e->X_op == O_constant)
5770 if (((e->X_add_number >= 0
5771 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5772 || (e->X_add_number < 0
5773 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5776 if (e->X_add_number >= 0
5777 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5779 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5781 return OPERAND_MATCH;
5784 return OPERAND_OUT_OF_RANGE;
5788 case IA64_OPND_IMM14:
5789 case IA64_OPND_IMM22:
5791 case IA64_OPND_IMM1:
5792 case IA64_OPND_IMM8:
5793 case IA64_OPND_IMM8U4:
5794 case IA64_OPND_IMM8M1:
5795 case IA64_OPND_IMM8M1U4:
5796 case IA64_OPND_IMM8M1U8:
5797 case IA64_OPND_IMM9a:
5798 case IA64_OPND_IMM9b:
5799 bits = operand_width (idesc->operands[index]);
5800 if (relocatable && (e->X_op == O_symbol
5801 || e->X_op == O_subtract
5802 || e->X_op == O_pseudo_fixup))
5804 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5806 if (idesc->operands[index] == IA64_OPND_IMM14)
5807 fix->code = BFD_RELOC_IA64_IMM14;
5809 fix->code = BFD_RELOC_IA64_IMM22;
5811 if (e->X_op != O_subtract)
5813 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5814 if (e->X_op == O_pseudo_fixup)
5818 fix->opnd = idesc->operands[index];
5821 ++CURR_SLOT.num_fixups;
5822 return OPERAND_MATCH;
5824 else if (e->X_op != O_constant
5825 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5826 return OPERAND_MISMATCH;
5828 if (opnd == IA64_OPND_IMM8M1U4)
5830 /* Zero is not valid for unsigned compares that take an adjusted
5831 constant immediate range. */
5832 if (e->X_add_number == 0)
5833 return OPERAND_OUT_OF_RANGE;
5835 /* Sign-extend 32-bit unsigned numbers, so that the following range
5836 checks will work. */
5837 val = e->X_add_number;
5838 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5839 && ((val & ((bfd_vma) 1 << 31)) != 0))
5840 val = ((val << 32) >> 32);
5842 /* Check for 0x100000000. This is valid because
5843 0x100000000-1 is the same as ((uint32_t) -1). */
5844 if (val == ((bfd_signed_vma) 1 << 32))
5845 return OPERAND_MATCH;
5849 else if (opnd == IA64_OPND_IMM8M1U8)
5851 /* Zero is not valid for unsigned compares that take an adjusted
5852 constant immediate range. */
5853 if (e->X_add_number == 0)
5854 return OPERAND_OUT_OF_RANGE;
5856 /* Check for 0x10000000000000000. */
5857 if (e->X_op == O_big)
5859 if (generic_bignum[0] == 0
5860 && generic_bignum[1] == 0
5861 && generic_bignum[2] == 0
5862 && generic_bignum[3] == 0
5863 && generic_bignum[4] == 1)
5864 return OPERAND_MATCH;
5866 return OPERAND_OUT_OF_RANGE;
5869 val = e->X_add_number - 1;
5871 else if (opnd == IA64_OPND_IMM8M1)
5872 val = e->X_add_number - 1;
5873 else if (opnd == IA64_OPND_IMM8U4)
5875 /* Sign-extend 32-bit unsigned numbers, so that the following range
5876 checks will work. */
5877 val = e->X_add_number;
5878 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5879 && ((val & ((bfd_vma) 1 << 31)) != 0))
5880 val = ((val << 32) >> 32);
5883 val = e->X_add_number;
5885 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5886 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5887 return OPERAND_MATCH;
5889 return OPERAND_OUT_OF_RANGE;
5891 case IA64_OPND_INC3:
5892 /* +/- 1, 4, 8, 16 */
5893 val = e->X_add_number;
5896 if (e->X_op == O_constant)
5898 if ((val == 1 || val == 4 || val == 8 || val == 16))
5899 return OPERAND_MATCH;
5901 return OPERAND_OUT_OF_RANGE;
5905 case IA64_OPND_TGT25:
5906 case IA64_OPND_TGT25b:
5907 case IA64_OPND_TGT25c:
5908 case IA64_OPND_TGT64:
5909 if (e->X_op == O_symbol)
5911 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5912 if (opnd == IA64_OPND_TGT25)
5913 fix->code = BFD_RELOC_IA64_PCREL21F;
5914 else if (opnd == IA64_OPND_TGT25b)
5915 fix->code = BFD_RELOC_IA64_PCREL21M;
5916 else if (opnd == IA64_OPND_TGT25c)
5917 fix->code = BFD_RELOC_IA64_PCREL21B;
5918 else if (opnd == IA64_OPND_TGT64)
5919 fix->code = BFD_RELOC_IA64_PCREL60B;
5923 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5924 fix->opnd = idesc->operands[index];
5927 ++CURR_SLOT.num_fixups;
5928 return OPERAND_MATCH;
5930 case IA64_OPND_TAG13:
5931 case IA64_OPND_TAG13b:
5935 return OPERAND_MATCH;
5938 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5939 /* There are no external relocs for TAG13/TAG13b fields, so we
5940 create a dummy reloc. This will not live past md_apply_fix3. */
5941 fix->code = BFD_RELOC_UNUSED;
5942 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5943 fix->opnd = idesc->operands[index];
5946 ++CURR_SLOT.num_fixups;
5947 return OPERAND_MATCH;
5954 case IA64_OPND_LDXMOV:
5955 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5956 fix->code = BFD_RELOC_IA64_LDXMOV;
5957 fix->opnd = idesc->operands[index];
5960 ++CURR_SLOT.num_fixups;
5961 return OPERAND_MATCH;
5966 return OPERAND_MISMATCH;
5975 memset (e, 0, sizeof (*e));
5978 if (*input_line_pointer != '}')
5980 sep = *input_line_pointer++;
5984 if (!md.manual_bundling)
5985 as_warn ("Found '}' when manual bundling is off");
5987 CURR_SLOT.manual_bundling_off = 1;
5988 md.manual_bundling = 0;
5994 /* Returns the next entry in the opcode table that matches the one in
5995 IDESC, and frees the entry in IDESC. If no matching entry is
5996 found, NULL is returned instead. */
5998 static struct ia64_opcode *
5999 get_next_opcode (struct ia64_opcode *idesc)
6001 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6002 ia64_free_opcode (idesc);
6006 /* Parse the operands for the opcode and find the opcode variant that
6007 matches the specified operands, or NULL if no match is possible. */
6009 static struct ia64_opcode *
6010 parse_operands (idesc)
6011 struct ia64_opcode *idesc;
6013 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
6014 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
6015 enum ia64_opnd expected_operand = IA64_OPND_NIL;
6016 enum operand_match_result result;
6018 char *first_arg = 0, *end, *saved_input_pointer;
6021 assert (strlen (idesc->name) <= 128);
6023 strcpy (mnemonic, idesc->name);
6024 if (idesc->operands[2] == IA64_OPND_SOF
6025 || idesc->operands[1] == IA64_OPND_SOF)
6027 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6028 can't parse the first operand until we have parsed the
6029 remaining operands of the "alloc" instruction. */
6031 first_arg = input_line_pointer;
6032 end = strchr (input_line_pointer, '=');
6035 as_bad ("Expected separator `='");
6038 input_line_pointer = end + 1;
6045 if (i < NELEMS (CURR_SLOT.opnd))
6047 sep = parse_operand (CURR_SLOT.opnd + i);
6048 if (CURR_SLOT.opnd[i].X_op == O_absent)
6055 sep = parse_operand (&dummy);
6056 if (dummy.X_op == O_absent)
6062 if (sep != '=' && sep != ',')
6067 if (num_outputs > 0)
6068 as_bad ("Duplicate equal sign (=) in instruction");
6070 num_outputs = i + 1;
6075 as_bad ("Illegal operand separator `%c'", sep);
6079 if (idesc->operands[2] == IA64_OPND_SOF
6080 || idesc->operands[1] == IA64_OPND_SOF)
6082 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6083 know (strcmp (idesc->name, "alloc") == 0);
6084 i = (CURR_SLOT.opnd[1].X_op == O_register
6085 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6086 if (num_operands == i + 3 /* first_arg not included in this count! */
6087 && CURR_SLOT.opnd[i].X_op == O_constant
6088 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6089 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6090 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6092 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6093 CURR_SLOT.opnd[i + 1].X_add_number,
6094 CURR_SLOT.opnd[i + 2].X_add_number,
6095 CURR_SLOT.opnd[i + 3].X_add_number);
6097 /* now we can parse the first arg: */
6098 saved_input_pointer = input_line_pointer;
6099 input_line_pointer = first_arg;
6100 sep = parse_operand (CURR_SLOT.opnd + 0);
6102 --num_outputs; /* force error */
6103 input_line_pointer = saved_input_pointer;
6105 CURR_SLOT.opnd[i].X_add_number = sof;
6106 CURR_SLOT.opnd[i + 1].X_add_number
6107 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6108 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6112 highest_unmatched_operand = -4;
6113 curr_out_of_range_pos = -1;
6115 for (; idesc; idesc = get_next_opcode (idesc))
6117 if (num_outputs != idesc->num_outputs)
6118 continue; /* mismatch in # of outputs */
6119 if (highest_unmatched_operand < 0)
6120 highest_unmatched_operand |= 1;
6121 if (num_operands > NELEMS (idesc->operands)
6122 || (num_operands < NELEMS (idesc->operands)
6123 && idesc->operands[num_operands])
6124 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6125 continue; /* mismatch in number of arguments */
6126 if (highest_unmatched_operand < 0)
6127 highest_unmatched_operand |= 2;
6129 CURR_SLOT.num_fixups = 0;
6131 /* Try to match all operands. If we see an out-of-range operand,
6132 then continue trying to match the rest of the operands, since if
6133 the rest match, then this idesc will give the best error message. */
6135 out_of_range_pos = -1;
6136 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6138 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6139 if (result != OPERAND_MATCH)
6141 if (result != OPERAND_OUT_OF_RANGE)
6143 if (out_of_range_pos < 0)
6144 /* remember position of the first out-of-range operand: */
6145 out_of_range_pos = i;
6149 /* If we did not match all operands, or if at least one operand was
6150 out-of-range, then this idesc does not match. Keep track of which
6151 idesc matched the most operands before failing. If we have two
6152 idescs that failed at the same position, and one had an out-of-range
6153 operand, then prefer the out-of-range operand. Thus if we have
6154 "add r0=0x1000000,r1" we get an error saying the constant is out
6155 of range instead of an error saying that the constant should have been
6158 if (i != num_operands || out_of_range_pos >= 0)
6160 if (i > highest_unmatched_operand
6161 || (i == highest_unmatched_operand
6162 && out_of_range_pos > curr_out_of_range_pos))
6164 highest_unmatched_operand = i;
6165 if (out_of_range_pos >= 0)
6167 expected_operand = idesc->operands[out_of_range_pos];
6168 error_pos = out_of_range_pos;
6172 expected_operand = idesc->operands[i];
6175 curr_out_of_range_pos = out_of_range_pos;
6184 if (expected_operand)
6185 as_bad ("Operand %u of `%s' should be %s",
6186 error_pos + 1, mnemonic,
6187 elf64_ia64_operands[expected_operand].desc);
6188 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6189 as_bad ("Wrong number of output operands");
6190 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6191 as_bad ("Wrong number of input operands");
6193 as_bad ("Operand mismatch");
6200 build_insn (slot, insnp)
6204 const struct ia64_operand *odesc, *o2desc;
6205 struct ia64_opcode *idesc = slot->idesc;
6206 bfd_signed_vma insn, val;
6210 insn = idesc->opcode | slot->qp_regno;
6212 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6214 if (slot->opnd[i].X_op == O_register
6215 || slot->opnd[i].X_op == O_constant
6216 || slot->opnd[i].X_op == O_index)
6217 val = slot->opnd[i].X_add_number;
6218 else if (slot->opnd[i].X_op == O_big)
6220 /* This must be the value 0x10000000000000000. */
6221 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6227 switch (idesc->operands[i])
6229 case IA64_OPND_IMMU64:
6230 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6231 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6232 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6233 | (((val >> 63) & 0x1) << 36));
6236 case IA64_OPND_IMMU62:
6237 val &= 0x3fffffffffffffffULL;
6238 if (val != slot->opnd[i].X_add_number)
6239 as_warn (_("Value truncated to 62 bits"));
6240 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6241 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6244 case IA64_OPND_TGT64:
6246 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6247 insn |= ((((val >> 59) & 0x1) << 36)
6248 | (((val >> 0) & 0xfffff) << 13));
6279 case IA64_OPND_R3_2:
6280 case IA64_OPND_CPUID_R3:
6281 case IA64_OPND_DBR_R3:
6282 case IA64_OPND_DTR_R3:
6283 case IA64_OPND_ITR_R3:
6284 case IA64_OPND_IBR_R3:
6286 case IA64_OPND_MSR_R3:
6287 case IA64_OPND_PKR_R3:
6288 case IA64_OPND_PMC_R3:
6289 case IA64_OPND_PMD_R3:
6290 case IA64_OPND_RR_R3:
6298 odesc = elf64_ia64_operands + idesc->operands[i];
6299 err = (*odesc->insert) (odesc, val, &insn);
6301 as_bad_where (slot->src_file, slot->src_line,
6302 "Bad operand value: %s", err);
6303 if (idesc->flags & IA64_OPCODE_PSEUDO)
6305 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6306 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6308 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6309 (*o2desc->insert) (o2desc, val, &insn);
6311 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6312 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6313 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6315 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6316 (*o2desc->insert) (o2desc, 64 - val, &insn);
6326 int manual_bundling_off = 0, manual_bundling = 0;
6327 enum ia64_unit required_unit, insn_unit = 0;
6328 enum ia64_insn_type type[3], insn_type;
6329 unsigned int template, orig_template;
6330 bfd_vma insn[3] = { -1, -1, -1 };
6331 struct ia64_opcode *idesc;
6332 int end_of_insn_group = 0, user_template = -1;
6333 int n, i, j, first, curr;
6334 unw_rec_list *ptr, *last_ptr, *end_ptr;
6335 bfd_vma t0 = 0, t1 = 0;
6336 struct label_fix *lfix;
6337 struct insn_fix *ifix;
6343 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6344 know (first >= 0 & first < NUM_SLOTS);
6345 n = MIN (3, md.num_slots_in_use);
6347 /* Determine template: user user_template if specified, best match
6350 if (md.slot[first].user_template >= 0)
6351 user_template = template = md.slot[first].user_template;
6354 /* Auto select appropriate template. */
6355 memset (type, 0, sizeof (type));
6357 for (i = 0; i < n; ++i)
6359 if (md.slot[curr].label_fixups && i != 0)
6361 type[i] = md.slot[curr].idesc->type;
6362 curr = (curr + 1) % NUM_SLOTS;
6364 template = best_template[type[0]][type[1]][type[2]];
6367 /* initialize instructions with appropriate nops: */
6368 for (i = 0; i < 3; ++i)
6369 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6373 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6374 from the start of the frag. */
6375 addr_mod = frag_now_fix () & 15;
6376 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6377 as_bad (_("instruction address is not a multiple of 16"));
6378 frag_now->insn_addr = addr_mod;
6379 frag_now->has_code = 1;
6381 /* now fill in slots with as many insns as possible: */
6383 idesc = md.slot[curr].idesc;
6384 end_of_insn_group = 0;
6385 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6387 /* If we have unwind records, we may need to update some now. */
6388 ptr = md.slot[curr].unwind_record;
6391 /* Find the last prologue/body record in the list for the current
6392 insn, and set the slot number for all records up to that point.
6393 This needs to be done now, because prologue/body records refer to
6394 the current point, not the point after the instruction has been
6395 issued. This matters because there may have been nops emitted
6396 meanwhile. Any non-prologue non-body record followed by a
6397 prologue/body record must also refer to the current point. */
6399 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6400 for (; ptr != end_ptr; ptr = ptr->next)
6401 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6402 || ptr->r.type == body)
6406 /* Make last_ptr point one after the last prologue/body
6408 last_ptr = last_ptr->next;
6409 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6412 ptr->slot_number = (unsigned long) f + i;
6413 ptr->slot_frag = frag_now;
6415 /* Remove the initialized records, so that we won't accidentally
6416 update them again if we insert a nop and continue. */
6417 md.slot[curr].unwind_record = last_ptr;
6421 manual_bundling_off = md.slot[curr].manual_bundling_off;
6422 if (md.slot[curr].manual_bundling_on)
6425 manual_bundling = 1;
6427 break; /* Need to start a new bundle. */
6430 if (idesc->flags & IA64_OPCODE_SLOT2)
6432 if (manual_bundling && !manual_bundling_off)
6434 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6435 "`%s' must be last in bundle", idesc->name);
6437 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6441 if (idesc->flags & IA64_OPCODE_LAST)
6444 unsigned int required_template;
6446 /* If we need a stop bit after an M slot, our only choice is
6447 template 5 (M;;MI). If we need a stop bit after a B
6448 slot, our only choice is to place it at the end of the
6449 bundle, because the only available templates are MIB,
6450 MBB, BBB, MMB, and MFB. We don't handle anything other
6451 than M and B slots because these are the only kind of
6452 instructions that can have the IA64_OPCODE_LAST bit set. */
6453 required_template = template;
6454 switch (idesc->type)
6458 required_template = 5;
6466 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6467 "Internal error: don't know how to force %s to end"
6468 "of instruction group", idesc->name);
6473 && (i > required_slot
6474 || (required_slot == 2 && !manual_bundling_off)
6475 || (user_template >= 0
6476 /* Changing from MMI to M;MI is OK. */
6477 && (template ^ required_template) > 1)))
6479 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6480 "`%s' must be last in instruction group",
6482 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6483 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6485 if (required_slot < i)
6486 /* Can't fit this instruction. */
6490 if (required_template != template)
6492 /* If we switch the template, we need to reset the NOPs
6493 after slot i. The slot-types of the instructions ahead
6494 of i never change, so we don't need to worry about
6495 changing NOPs in front of this slot. */
6496 for (j = i; j < 3; ++j)
6497 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6499 template = required_template;
6501 if (curr != first && md.slot[curr].label_fixups)
6503 if (manual_bundling)
6505 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6506 "Label must be first in a bundle");
6507 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6509 /* This insn must go into the first slot of a bundle. */
6513 if (end_of_insn_group && md.num_slots_in_use >= 1)
6515 /* We need an instruction group boundary in the middle of a
6516 bundle. See if we can switch to an other template with
6517 an appropriate boundary. */
6519 orig_template = template;
6520 if (i == 1 && (user_template == 4
6521 || (user_template < 0
6522 && (ia64_templ_desc[template].exec_unit[0]
6526 end_of_insn_group = 0;
6528 else if (i == 2 && (user_template == 0
6529 || (user_template < 0
6530 && (ia64_templ_desc[template].exec_unit[1]
6532 /* This test makes sure we don't switch the template if
6533 the next instruction is one that needs to be first in
6534 an instruction group. Since all those instructions are
6535 in the M group, there is no way such an instruction can
6536 fit in this bundle even if we switch the template. The
6537 reason we have to check for this is that otherwise we
6538 may end up generating "MI;;I M.." which has the deadly
6539 effect that the second M instruction is no longer the
6540 first in the group! --davidm 99/12/16 */
6541 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6544 end_of_insn_group = 0;
6547 && user_template == 0
6548 && !(idesc->flags & IA64_OPCODE_FIRST))
6549 /* Use the next slot. */
6551 else if (curr != first)
6552 /* can't fit this insn */
6555 if (template != orig_template)
6556 /* if we switch the template, we need to reset the NOPs
6557 after slot i. The slot-types of the instructions ahead
6558 of i never change, so we don't need to worry about
6559 changing NOPs in front of this slot. */
6560 for (j = i; j < 3; ++j)
6561 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6563 required_unit = ia64_templ_desc[template].exec_unit[i];
6565 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6566 if (idesc->type == IA64_TYPE_DYN)
6568 enum ia64_opnd opnd1, opnd2;
6570 if ((strcmp (idesc->name, "nop") == 0)
6571 || (strcmp (idesc->name, "hint") == 0)
6572 || (strcmp (idesc->name, "break") == 0))
6573 insn_unit = required_unit;
6574 else if (strcmp (idesc->name, "chk.s") == 0
6575 || strcmp (idesc->name, "mov") == 0)
6577 insn_unit = IA64_UNIT_M;
6578 if (required_unit == IA64_UNIT_I
6579 || (required_unit == IA64_UNIT_F && template == 6))
6580 insn_unit = IA64_UNIT_I;
6583 as_fatal ("emit_one_bundle: unexpected dynamic op");
6585 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6586 opnd1 = idesc->operands[0];
6587 opnd2 = idesc->operands[1];
6588 ia64_free_opcode (idesc);
6589 idesc = ia64_find_opcode (mnemonic);
6590 /* moves to/from ARs have collisions */
6591 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6593 while (idesc != NULL
6594 && (idesc->operands[0] != opnd1
6595 || idesc->operands[1] != opnd2))
6596 idesc = get_next_opcode (idesc);
6598 md.slot[curr].idesc = idesc;
6602 insn_type = idesc->type;
6603 insn_unit = IA64_UNIT_NIL;
6607 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6608 insn_unit = required_unit;
6610 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6611 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6612 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6613 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6614 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6619 if (insn_unit != required_unit)
6621 if (required_unit == IA64_UNIT_L
6622 && insn_unit == IA64_UNIT_I
6623 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6625 /* we got ourselves an MLX template but the current
6626 instruction isn't an X-unit, or an I-unit instruction
6627 that can go into the X slot of an MLX template. Duh. */
6628 if (md.num_slots_in_use >= NUM_SLOTS)
6630 as_bad_where (md.slot[curr].src_file,
6631 md.slot[curr].src_line,
6632 "`%s' can't go in X slot of "
6633 "MLX template", idesc->name);
6634 /* drop this insn so we don't livelock: */
6635 --md.num_slots_in_use;
6639 continue; /* try next slot */
6642 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6644 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6646 md.slot[curr].loc_directive_seen = 0;
6647 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6650 build_insn (md.slot + curr, insn + i);
6652 ptr = md.slot[curr].unwind_record;
6655 /* Set slot numbers for all remaining unwind records belonging to the
6656 current insn. There can not be any prologue/body unwind records
6658 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6659 for (; ptr != end_ptr; ptr = ptr->next)
6661 ptr->slot_number = (unsigned long) f + i;
6662 ptr->slot_frag = frag_now;
6664 md.slot[curr].unwind_record = NULL;
6667 if (required_unit == IA64_UNIT_L)
6670 /* skip one slot for long/X-unit instructions */
6673 --md.num_slots_in_use;
6675 /* now is a good time to fix up the labels for this insn: */
6676 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6678 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6679 symbol_set_frag (lfix->sym, frag_now);
6681 /* and fix up the tags also. */
6682 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6684 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6685 symbol_set_frag (lfix->sym, frag_now);
6688 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6690 ifix = md.slot[curr].fixup + j;
6691 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6692 &ifix->expr, ifix->is_pcrel, ifix->code);
6693 fix->tc_fix_data.opnd = ifix->opnd;
6694 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6695 fix->fx_file = md.slot[curr].src_file;
6696 fix->fx_line = md.slot[curr].src_line;
6699 end_of_insn_group = md.slot[curr].end_of_insn_group;
6702 ia64_free_opcode (md.slot[curr].idesc);
6703 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6704 md.slot[curr].user_template = -1;
6706 if (manual_bundling_off)
6708 manual_bundling = 0;
6711 curr = (curr + 1) % NUM_SLOTS;
6712 idesc = md.slot[curr].idesc;
6714 if (manual_bundling > 0)
6716 if (md.num_slots_in_use > 0)
6718 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6719 "`%s' does not fit into %s template",
6720 idesc->name, ia64_templ_desc[template].name);
6721 --md.num_slots_in_use;
6724 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6725 "Missing '}' at end of file");
6727 know (md.num_slots_in_use < NUM_SLOTS);
6729 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6730 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6732 number_to_chars_littleendian (f + 0, t0, 8);
6733 number_to_chars_littleendian (f + 8, t1, 8);
6737 unwind.list->next_slot_number = (unsigned long) f + 16;
6738 unwind.list->next_slot_frag = frag_now;
6743 md_parse_option (c, arg)
6750 /* Switches from the Intel assembler. */
6752 if (strcmp (arg, "ilp64") == 0
6753 || strcmp (arg, "lp64") == 0
6754 || strcmp (arg, "p64") == 0)
6756 md.flags |= EF_IA_64_ABI64;
6758 else if (strcmp (arg, "ilp32") == 0)
6760 md.flags &= ~EF_IA_64_ABI64;
6762 else if (strcmp (arg, "le") == 0)
6764 md.flags &= ~EF_IA_64_BE;
6765 default_big_endian = 0;
6767 else if (strcmp (arg, "be") == 0)
6769 md.flags |= EF_IA_64_BE;
6770 default_big_endian = 1;
6772 else if (strncmp (arg, "unwind-check=", 13) == 0)
6775 if (strcmp (arg, "warning") == 0)
6776 md.unwind_check = unwind_check_warning;
6777 else if (strcmp (arg, "error") == 0)
6778 md.unwind_check = unwind_check_error;
6787 if (strcmp (arg, "so") == 0)
6789 /* Suppress signon message. */
6791 else if (strcmp (arg, "pi") == 0)
6793 /* Reject privileged instructions. FIXME */
6795 else if (strcmp (arg, "us") == 0)
6797 /* Allow union of signed and unsigned range. FIXME */
6799 else if (strcmp (arg, "close_fcalls") == 0)
6801 /* Do not resolve global function calls. */
6808 /* temp[="prefix"] Insert temporary labels into the object file
6809 symbol table prefixed by "prefix".
6810 Default prefix is ":temp:".
6815 /* indirect=<tgt> Assume unannotated indirect branches behavior
6816 according to <tgt> --
6817 exit: branch out from the current context (default)
6818 labels: all labels in context may be branch targets
6820 if (strncmp (arg, "indirect=", 9) != 0)
6825 /* -X conflicts with an ignored option, use -x instead */
6827 if (!arg || strcmp (arg, "explicit") == 0)
6829 /* set default mode to explicit */
6830 md.default_explicit_mode = 1;
6833 else if (strcmp (arg, "auto") == 0)
6835 md.default_explicit_mode = 0;
6837 else if (strcmp (arg, "none") == 0)
6841 else if (strcmp (arg, "debug") == 0)
6845 else if (strcmp (arg, "debugx") == 0)
6847 md.default_explicit_mode = 1;
6850 else if (strcmp (arg, "debugn") == 0)
6857 as_bad (_("Unrecognized option '-x%s'"), arg);
6862 /* nops Print nops statistics. */
6865 /* GNU specific switches for gcc. */
6866 case OPTION_MCONSTANT_GP:
6867 md.flags |= EF_IA_64_CONS_GP;
6870 case OPTION_MAUTO_PIC:
6871 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6882 md_show_usage (stream)
6887 --mconstant-gp mark output file as using the constant-GP model\n\
6888 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6889 --mauto-pic mark output file as using the constant-GP model\n\
6890 without function descriptors (sets ELF header flag\n\
6891 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6892 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6893 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6894 -munwind-check=[warning|error]\n\
6895 unwind directive check (default -munwind-check=warning)\n\
6896 -x | -xexplicit turn on dependency violation checking\n\
6897 -xauto automagically remove dependency violations (default)\n\
6898 -xnone turn off dependency violation checking\n\
6899 -xdebug debug dependency violation checker\n\
6900 -xdebugn debug dependency violation checker but turn off\n\
6901 dependency violation checking\n\
6902 -xdebugx debug dependency violation checker and turn on\n\
6903 dependency violation checking\n"),
6908 ia64_after_parse_args ()
6910 if (debug_type == DEBUG_STABS)
6911 as_fatal (_("--gstabs is not supported for ia64"));
6914 /* Return true if TYPE fits in TEMPL at SLOT. */
6917 match (int templ, int type, int slot)
6919 enum ia64_unit unit;
6922 unit = ia64_templ_desc[templ].exec_unit[slot];
6925 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6927 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6929 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6930 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6931 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6932 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6933 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6934 default: result = 0; break;
6939 /* Add a bit of extra goodness if a nop of type F or B would fit
6940 in TEMPL at SLOT. */
6943 extra_goodness (int templ, int slot)
6945 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6947 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6952 /* This function is called once, at assembler startup time. It sets
6953 up all the tables, etc. that the MD part of the assembler will need
6954 that can be determined before arguments are parsed. */
6958 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6963 md.explicit_mode = md.default_explicit_mode;
6965 bfd_set_section_alignment (stdoutput, text_section, 4);
6967 /* Make sure function pointers get initialized. */
6968 target_big_endian = -1;
6969 dot_byteorder (default_big_endian);
6971 alias_hash = hash_new ();
6972 alias_name_hash = hash_new ();
6973 secalias_hash = hash_new ();
6974 secalias_name_hash = hash_new ();
6976 pseudo_func[FUNC_DTP_MODULE].u.sym =
6977 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6978 &zero_address_frag);
6980 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6981 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6982 &zero_address_frag);
6984 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6985 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6986 &zero_address_frag);
6988 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6989 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6990 &zero_address_frag);
6992 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6993 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6994 &zero_address_frag);
6996 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6997 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6998 &zero_address_frag);
7000 pseudo_func[FUNC_PC_RELATIVE].u.sym =
7001 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7002 &zero_address_frag);
7004 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
7005 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7006 &zero_address_frag);
7008 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
7009 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7010 &zero_address_frag);
7012 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
7013 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7014 &zero_address_frag);
7016 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7017 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7018 &zero_address_frag);
7020 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7021 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7022 &zero_address_frag);
7024 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7025 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7026 &zero_address_frag);
7028 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7029 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7030 &zero_address_frag);
7032 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7033 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7034 &zero_address_frag);
7036 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7037 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7038 &zero_address_frag);
7040 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7041 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7042 &zero_address_frag);
7044 /* Compute the table of best templates. We compute goodness as a
7045 base 4 value, in which each match counts for 3, each F counts
7046 for 2, each B counts for 1. This should maximize the number of
7047 F and B nops in the chosen bundles, which is good because these
7048 pipelines are least likely to be overcommitted. */
7049 for (i = 0; i < IA64_NUM_TYPES; ++i)
7050 for (j = 0; j < IA64_NUM_TYPES; ++j)
7051 for (k = 0; k < IA64_NUM_TYPES; ++k)
7054 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7057 if (match (t, i, 0))
7059 if (match (t, j, 1))
7061 if (match (t, k, 2))
7062 goodness = 3 + 3 + 3;
7064 goodness = 3 + 3 + extra_goodness (t, 2);
7066 else if (match (t, j, 2))
7067 goodness = 3 + 3 + extra_goodness (t, 1);
7071 goodness += extra_goodness (t, 1);
7072 goodness += extra_goodness (t, 2);
7075 else if (match (t, i, 1))
7077 if (match (t, j, 2))
7080 goodness = 3 + extra_goodness (t, 2);
7082 else if (match (t, i, 2))
7083 goodness = 3 + extra_goodness (t, 1);
7085 if (goodness > best)
7088 best_template[i][j][k] = t;
7093 for (i = 0; i < NUM_SLOTS; ++i)
7094 md.slot[i].user_template = -1;
7096 md.pseudo_hash = hash_new ();
7097 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7099 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7100 (void *) (pseudo_opcode + i));
7102 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7103 pseudo_opcode[i].name, err);
7106 md.reg_hash = hash_new ();
7107 md.dynreg_hash = hash_new ();
7108 md.const_hash = hash_new ();
7109 md.entry_hash = hash_new ();
7111 /* general registers: */
7114 for (i = 0; i < total; ++i)
7116 sprintf (name, "r%d", i - REG_GR);
7117 md.regsym[i] = declare_register (name, i);
7120 /* floating point registers: */
7122 for (; i < total; ++i)
7124 sprintf (name, "f%d", i - REG_FR);
7125 md.regsym[i] = declare_register (name, i);
7128 /* application registers: */
7131 for (; i < total; ++i)
7133 sprintf (name, "ar%d", i - REG_AR);
7134 md.regsym[i] = declare_register (name, i);
7137 /* control registers: */
7140 for (; i < total; ++i)
7142 sprintf (name, "cr%d", i - REG_CR);
7143 md.regsym[i] = declare_register (name, i);
7146 /* predicate registers: */
7148 for (; i < total; ++i)
7150 sprintf (name, "p%d", i - REG_P);
7151 md.regsym[i] = declare_register (name, i);
7154 /* branch registers: */
7156 for (; i < total; ++i)
7158 sprintf (name, "b%d", i - REG_BR);
7159 md.regsym[i] = declare_register (name, i);
7162 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7163 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7164 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7165 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7166 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7167 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7168 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7170 for (i = 0; i < NELEMS (indirect_reg); ++i)
7172 regnum = indirect_reg[i].regnum;
7173 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7176 /* define synonyms for application registers: */
7177 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7178 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7179 REG_AR + ar[i - REG_AR].regnum);
7181 /* define synonyms for control registers: */
7182 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7183 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7184 REG_CR + cr[i - REG_CR].regnum);
7186 declare_register ("gp", REG_GR + 1);
7187 declare_register ("sp", REG_GR + 12);
7188 declare_register ("rp", REG_BR + 0);
7190 /* pseudo-registers used to specify unwind info: */
7191 declare_register ("psp", REG_PSP);
7193 declare_register_set ("ret", 4, REG_GR + 8);
7194 declare_register_set ("farg", 8, REG_FR + 8);
7195 declare_register_set ("fret", 8, REG_FR + 8);
7197 for (i = 0; i < NELEMS (const_bits); ++i)
7199 err = hash_insert (md.const_hash, const_bits[i].name,
7200 (PTR) (const_bits + i));
7202 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7206 /* Set the architecture and machine depending on defaults and command line
7208 if (md.flags & EF_IA_64_ABI64)
7209 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7211 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7214 as_warn (_("Could not set architecture and machine"));
7216 /* Set the pointer size and pointer shift size depending on md.flags */
7218 if (md.flags & EF_IA_64_ABI64)
7220 md.pointer_size = 8; /* pointers are 8 bytes */
7221 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7225 md.pointer_size = 4; /* pointers are 4 bytes */
7226 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7229 md.mem_offset.hint = 0;
7232 md.entry_labels = NULL;
7235 /* Set the default options in md. Cannot do this in md_begin because
7236 that is called after md_parse_option which is where we set the
7237 options in md based on command line options. */
7240 ia64_init (argc, argv)
7241 int argc ATTRIBUTE_UNUSED;
7242 char **argv ATTRIBUTE_UNUSED;
7244 md.flags = MD_FLAGS_DEFAULT;
7246 /* FIXME: We should change it to unwind_check_error someday. */
7247 md.unwind_check = unwind_check_warning;
7250 /* Return a string for the target object file format. */
7253 ia64_target_format ()
7255 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7257 if (md.flags & EF_IA_64_BE)
7259 if (md.flags & EF_IA_64_ABI64)
7260 #if defined(TE_AIX50)
7261 return "elf64-ia64-aix-big";
7262 #elif defined(TE_HPUX)
7263 return "elf64-ia64-hpux-big";
7265 return "elf64-ia64-big";
7268 #if defined(TE_AIX50)
7269 return "elf32-ia64-aix-big";
7270 #elif defined(TE_HPUX)
7271 return "elf32-ia64-hpux-big";
7273 return "elf32-ia64-big";
7278 if (md.flags & EF_IA_64_ABI64)
7280 return "elf64-ia64-aix-little";
7282 return "elf64-ia64-little";
7286 return "elf32-ia64-aix-little";
7288 return "elf32-ia64-little";
7293 return "unknown-format";
7297 ia64_end_of_source ()
7299 /* terminate insn group upon reaching end of file: */
7300 insn_group_break (1, 0, 0);
7302 /* emits slots we haven't written yet: */
7303 ia64_flush_insns ();
7305 bfd_set_private_flags (stdoutput, md.flags);
7307 md.mem_offset.hint = 0;
7313 if (md.qp.X_op == O_register)
7314 as_bad ("qualifying predicate not followed by instruction");
7315 md.qp.X_op = O_absent;
7317 if (ignore_input ())
7320 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7322 if (md.detect_dv && !md.explicit_mode)
7329 as_warn (_("Explicit stops are ignored in auto mode"));
7333 insn_group_break (1, 0, 0);
7337 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7339 static int defining_tag = 0;
7342 ia64_unrecognized_line (ch)
7348 expression (&md.qp);
7349 if (*input_line_pointer++ != ')')
7351 as_bad ("Expected ')'");
7354 if (md.qp.X_op != O_register)
7356 as_bad ("Qualifying predicate expected");
7359 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7361 as_bad ("Predicate register expected");
7367 if (md.manual_bundling)
7368 as_warn ("Found '{' when manual bundling is already turned on");
7370 CURR_SLOT.manual_bundling_on = 1;
7371 md.manual_bundling = 1;
7373 /* Bundling is only acceptable in explicit mode
7374 or when in default automatic mode. */
7375 if (md.detect_dv && !md.explicit_mode)
7377 if (!md.mode_explicitly_set
7378 && !md.default_explicit_mode)
7381 as_warn (_("Found '{' after explicit switch to automatic mode"));
7386 if (!md.manual_bundling)
7387 as_warn ("Found '}' when manual bundling is off");
7389 PREV_SLOT.manual_bundling_off = 1;
7390 md.manual_bundling = 0;
7392 /* switch back to automatic mode, if applicable */
7395 && !md.mode_explicitly_set
7396 && !md.default_explicit_mode)
7399 /* Allow '{' to follow on the same line. We also allow ";;", but that
7400 happens automatically because ';' is an end of line marker. */
7402 if (input_line_pointer[0] == '{')
7404 input_line_pointer++;
7405 return ia64_unrecognized_line ('{');
7408 demand_empty_rest_of_line ();
7418 if (md.qp.X_op == O_register)
7420 as_bad ("Tag must come before qualifying predicate.");
7424 /* This implements just enough of read_a_source_file in read.c to
7425 recognize labels. */
7426 if (is_name_beginner (*input_line_pointer))
7428 s = input_line_pointer;
7429 c = get_symbol_end ();
7431 else if (LOCAL_LABELS_FB
7432 && ISDIGIT (*input_line_pointer))
7435 while (ISDIGIT (*input_line_pointer))
7436 temp = (temp * 10) + *input_line_pointer++ - '0';
7437 fb_label_instance_inc (temp);
7438 s = fb_label_name (temp, 0);
7439 c = *input_line_pointer;
7448 /* Put ':' back for error messages' sake. */
7449 *input_line_pointer++ = ':';
7450 as_bad ("Expected ':'");
7457 /* Put ':' back for error messages' sake. */
7458 *input_line_pointer++ = ':';
7459 if (*input_line_pointer++ != ']')
7461 as_bad ("Expected ']'");
7466 as_bad ("Tag name expected");
7476 /* Not a valid line. */
7481 ia64_frob_label (sym)
7484 struct label_fix *fix;
7486 /* Tags need special handling since they are not bundle breaks like
7490 fix = obstack_alloc (¬es, sizeof (*fix));
7492 fix->next = CURR_SLOT.tag_fixups;
7493 CURR_SLOT.tag_fixups = fix;
7498 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7500 md.last_text_seg = now_seg;
7501 fix = obstack_alloc (¬es, sizeof (*fix));
7503 fix->next = CURR_SLOT.label_fixups;
7504 CURR_SLOT.label_fixups = fix;
7506 /* Keep track of how many code entry points we've seen. */
7507 if (md.path == md.maxpaths)
7510 md.entry_labels = (const char **)
7511 xrealloc ((void *) md.entry_labels,
7512 md.maxpaths * sizeof (char *));
7514 md.entry_labels[md.path++] = S_GET_NAME (sym);
7519 /* The HP-UX linker will give unresolved symbol errors for symbols
7520 that are declared but unused. This routine removes declared,
7521 unused symbols from an object. */
7523 ia64_frob_symbol (sym)
7526 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7527 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7528 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7529 && ! S_IS_EXTERNAL (sym)))
7536 ia64_flush_pending_output ()
7538 if (!md.keep_pending_output
7539 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7541 /* ??? This causes many unnecessary stop bits to be emitted.
7542 Unfortunately, it isn't clear if it is safe to remove this. */
7543 insn_group_break (1, 0, 0);
7544 ia64_flush_insns ();
7548 /* Do ia64-specific expression optimization. All that's done here is
7549 to transform index expressions that are either due to the indexing
7550 of rotating registers or due to the indexing of indirect register
7553 ia64_optimize_expr (l, op, r)
7562 if (l->X_op == O_register && r->X_op == O_constant)
7564 num_regs = (l->X_add_number >> 16);
7565 if ((unsigned) r->X_add_number >= num_regs)
7568 as_bad ("No current frame");
7570 as_bad ("Index out of range 0..%u", num_regs - 1);
7571 r->X_add_number = 0;
7573 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7576 else if (l->X_op == O_register && r->X_op == O_register)
7578 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7579 || l->X_add_number == IND_MEM)
7581 as_bad ("Indirect register set name expected");
7582 l->X_add_number = IND_CPUID;
7585 l->X_op_symbol = md.regsym[l->X_add_number];
7586 l->X_add_number = r->X_add_number;
7594 ia64_parse_name (name, e, nextcharP)
7599 struct const_desc *cdesc;
7600 struct dynreg *dr = 0;
7601 unsigned int regnum;
7608 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7610 /* Find what relocation pseudo-function we're dealing with. */
7611 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7612 if (pseudo_func[idx].name
7613 && pseudo_func[idx].name[0] == name[1]
7614 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7616 pseudo_type = pseudo_func[idx].type;
7619 switch (pseudo_type)
7621 case PSEUDO_FUNC_RELOC:
7622 end = input_line_pointer;
7623 if (*nextcharP != '(')
7625 as_bad ("Expected '('");
7629 ++input_line_pointer;
7631 if (*input_line_pointer != ')')
7633 as_bad ("Missing ')'");
7637 ++input_line_pointer;
7638 if (e->X_op != O_symbol)
7640 if (e->X_op != O_pseudo_fixup)
7642 as_bad ("Not a symbolic expression");
7645 if (idx != FUNC_LT_RELATIVE)
7647 as_bad ("Illegal combination of relocation functions");
7650 switch (S_GET_VALUE (e->X_op_symbol))
7652 case FUNC_FPTR_RELATIVE:
7653 idx = FUNC_LT_FPTR_RELATIVE; break;
7654 case FUNC_DTP_MODULE:
7655 idx = FUNC_LT_DTP_MODULE; break;
7656 case FUNC_DTP_RELATIVE:
7657 idx = FUNC_LT_DTP_RELATIVE; break;
7658 case FUNC_TP_RELATIVE:
7659 idx = FUNC_LT_TP_RELATIVE; break;
7661 as_bad ("Illegal combination of relocation functions");
7665 /* Make sure gas doesn't get rid of local symbols that are used
7667 e->X_op = O_pseudo_fixup;
7668 e->X_op_symbol = pseudo_func[idx].u.sym;
7670 *nextcharP = *input_line_pointer;
7673 case PSEUDO_FUNC_CONST:
7674 e->X_op = O_constant;
7675 e->X_add_number = pseudo_func[idx].u.ival;
7678 case PSEUDO_FUNC_REG:
7679 e->X_op = O_register;
7680 e->X_add_number = pseudo_func[idx].u.ival;
7689 /* first see if NAME is a known register name: */
7690 sym = hash_find (md.reg_hash, name);
7693 e->X_op = O_register;
7694 e->X_add_number = S_GET_VALUE (sym);
7698 cdesc = hash_find (md.const_hash, name);
7701 e->X_op = O_constant;
7702 e->X_add_number = cdesc->value;
7706 /* check for inN, locN, or outN: */
7710 if (name[1] == 'n' && ISDIGIT (name[2]))
7718 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7726 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7739 /* The name is inN, locN, or outN; parse the register number. */
7740 regnum = strtoul (name, &end, 10);
7741 if (end > name && *end == '\0')
7743 if ((unsigned) regnum >= dr->num_regs)
7746 as_bad ("No current frame");
7748 as_bad ("Register number out of range 0..%u",
7752 e->X_op = O_register;
7753 e->X_add_number = dr->base + regnum;
7758 end = alloca (strlen (name) + 1);
7760 name = ia64_canonicalize_symbol_name (end);
7761 if ((dr = hash_find (md.dynreg_hash, name)))
7763 /* We've got ourselves the name of a rotating register set.
7764 Store the base register number in the low 16 bits of
7765 X_add_number and the size of the register set in the top 16
7767 e->X_op = O_register;
7768 e->X_add_number = dr->base | (dr->num_regs << 16);
7774 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7777 ia64_canonicalize_symbol_name (name)
7780 size_t len = strlen (name), full = len;
7782 while (len > 0 && name[len - 1] == '#')
7787 as_bad ("Standalone `#' is illegal");
7789 as_bad ("Zero-length symbol is illegal");
7791 else if (len < full - 1)
7792 as_warn ("Redundant `#' suffix operators");
7797 /* Return true if idesc is a conditional branch instruction. This excludes
7798 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7799 because they always read/write resources regardless of the value of the
7800 qualifying predicate. br.ia must always use p0, and hence is always
7801 taken. Thus this function returns true for branches which can fall
7802 through, and which use no resources if they do fall through. */
7805 is_conditional_branch (idesc)
7806 struct ia64_opcode *idesc;
7808 /* br is a conditional branch. Everything that starts with br. except
7809 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7810 Everything that starts with brl is a conditional branch. */
7811 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7812 && (idesc->name[2] == '\0'
7813 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7814 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7815 || idesc->name[2] == 'l'
7816 /* br.cond, br.call, br.clr */
7817 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7818 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7819 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7822 /* Return whether the given opcode is a taken branch. If there's any doubt,
7826 is_taken_branch (idesc)
7827 struct ia64_opcode *idesc;
7829 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7830 || strncmp (idesc->name, "br.ia", 5) == 0);
7833 /* Return whether the given opcode is an interruption or rfi. If there's any
7834 doubt, returns zero. */
7837 is_interruption_or_rfi (idesc)
7838 struct ia64_opcode *idesc;
7840 if (strcmp (idesc->name, "rfi") == 0)
7845 /* Returns the index of the given dependency in the opcode's list of chks, or
7846 -1 if there is no dependency. */
7849 depends_on (depind, idesc)
7851 struct ia64_opcode *idesc;
7854 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7855 for (i = 0; i < dep->nchks; i++)
7857 if (depind == DEP (dep->chks[i]))
7863 /* Determine a set of specific resources used for a particular resource
7864 class. Returns the number of specific resources identified For those
7865 cases which are not determinable statically, the resource returned is
7868 Meanings of value in 'NOTE':
7869 1) only read/write when the register number is explicitly encoded in the
7871 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7872 accesses CFM when qualifying predicate is in the rotating region.
7873 3) general register value is used to specify an indirect register; not
7874 determinable statically.
7875 4) only read the given resource when bits 7:0 of the indirect index
7876 register value does not match the register number of the resource; not
7877 determinable statically.
7878 5) all rules are implementation specific.
7879 6) only when both the index specified by the reader and the index specified
7880 by the writer have the same value in bits 63:61; not determinable
7882 7) only access the specified resource when the corresponding mask bit is
7884 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7885 only read when these insns reference FR2-31
7886 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7887 written when these insns write FR32-127
7888 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7890 11) The target predicates are written independently of PR[qp], but source
7891 registers are only read if PR[qp] is true. Since the state of PR[qp]
7892 cannot statically be determined, all source registers are marked used.
7893 12) This insn only reads the specified predicate register when that
7894 register is the PR[qp].
7895 13) This reference to ld-c only applies to teh GR whose value is loaded
7896 with data returned from memory, not the post-incremented address register.
7897 14) The RSE resource includes the implementation-specific RSE internal
7898 state resources. At least one (and possibly more) of these resources are
7899 read by each instruction listed in IC:rse-readers. At least one (and
7900 possibly more) of these resources are written by each insn listed in
7902 15+16) Represents reserved instructions, which the assembler does not
7905 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7906 this code; there are no dependency violations based on memory access.
7909 #define MAX_SPECS 256
7914 specify_resource (dep, idesc, type, specs, note, path)
7915 const struct ia64_dependency *dep;
7916 struct ia64_opcode *idesc;
7917 int type; /* is this a DV chk or a DV reg? */
7918 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7919 int note; /* resource note for this insn's usage */
7920 int path; /* which execution path to examine */
7927 if (dep->mode == IA64_DV_WAW
7928 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7929 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7932 /* template for any resources we identify */
7933 tmpl.dependency = dep;
7935 tmpl.insn_srlz = tmpl.data_srlz = 0;
7936 tmpl.qp_regno = CURR_SLOT.qp_regno;
7937 tmpl.link_to_qp_branch = 1;
7938 tmpl.mem_offset.hint = 0;
7941 tmpl.cmp_type = CMP_NONE;
7944 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7945 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7946 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7948 /* we don't need to track these */
7949 if (dep->semantics == IA64_DVS_NONE)
7952 switch (dep->specifier)
7957 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7959 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7960 if (regno >= 0 && regno <= 7)
7962 specs[count] = tmpl;
7963 specs[count++].index = regno;
7969 for (i = 0; i < 8; i++)
7971 specs[count] = tmpl;
7972 specs[count++].index = i;
7981 case IA64_RS_AR_UNAT:
7982 /* This is a mov =AR or mov AR= instruction. */
7983 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7985 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7986 if (regno == AR_UNAT)
7988 specs[count++] = tmpl;
7993 /* This is a spill/fill, or other instruction that modifies the
7996 /* Unless we can determine the specific bits used, mark the whole
7997 thing; bits 8:3 of the memory address indicate the bit used in
7998 UNAT. The .mem.offset hint may be used to eliminate a small
7999 subset of conflicts. */
8000 specs[count] = tmpl;
8001 if (md.mem_offset.hint)
8004 fprintf (stderr, " Using hint for spill/fill\n");
8005 /* The index isn't actually used, just set it to something
8006 approximating the bit index. */
8007 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8008 specs[count].mem_offset.hint = 1;
8009 specs[count].mem_offset.offset = md.mem_offset.offset;
8010 specs[count++].mem_offset.base = md.mem_offset.base;
8014 specs[count++].specific = 0;
8022 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8024 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8025 if ((regno >= 8 && regno <= 15)
8026 || (regno >= 20 && regno <= 23)
8027 || (regno >= 31 && regno <= 39)
8028 || (regno >= 41 && regno <= 47)
8029 || (regno >= 67 && regno <= 111))
8031 specs[count] = tmpl;
8032 specs[count++].index = regno;
8045 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8047 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8048 if ((regno >= 48 && regno <= 63)
8049 || (regno >= 112 && regno <= 127))
8051 specs[count] = tmpl;
8052 specs[count++].index = regno;
8058 for (i = 48; i < 64; i++)
8060 specs[count] = tmpl;
8061 specs[count++].index = i;
8063 for (i = 112; i < 128; i++)
8065 specs[count] = tmpl;
8066 specs[count++].index = i;
8084 for (i = 0; i < idesc->num_outputs; i++)
8085 if (idesc->operands[i] == IA64_OPND_B1
8086 || idesc->operands[i] == IA64_OPND_B2)
8088 specs[count] = tmpl;
8089 specs[count++].index =
8090 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8095 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8096 if (idesc->operands[i] == IA64_OPND_B1
8097 || idesc->operands[i] == IA64_OPND_B2)
8099 specs[count] = tmpl;
8100 specs[count++].index =
8101 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8107 case IA64_RS_CPUID: /* four or more registers */
8110 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8112 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8113 if (regno >= 0 && regno < NELEMS (gr_values)
8116 specs[count] = tmpl;
8117 specs[count++].index = gr_values[regno].value & 0xFF;
8121 specs[count] = tmpl;
8122 specs[count++].specific = 0;
8132 case IA64_RS_DBR: /* four or more registers */
8135 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8137 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8138 if (regno >= 0 && regno < NELEMS (gr_values)
8141 specs[count] = tmpl;
8142 specs[count++].index = gr_values[regno].value & 0xFF;
8146 specs[count] = tmpl;
8147 specs[count++].specific = 0;
8151 else if (note == 0 && !rsrc_write)
8153 specs[count] = tmpl;
8154 specs[count++].specific = 0;
8162 case IA64_RS_IBR: /* four or more registers */
8165 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8167 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8168 if (regno >= 0 && regno < NELEMS (gr_values)
8171 specs[count] = tmpl;
8172 specs[count++].index = gr_values[regno].value & 0xFF;
8176 specs[count] = tmpl;
8177 specs[count++].specific = 0;
8190 /* These are implementation specific. Force all references to
8191 conflict with all other references. */
8192 specs[count] = tmpl;
8193 specs[count++].specific = 0;
8201 case IA64_RS_PKR: /* 16 or more registers */
8202 if (note == 3 || note == 4)
8204 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8206 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8207 if (regno >= 0 && regno < NELEMS (gr_values)
8212 specs[count] = tmpl;
8213 specs[count++].index = gr_values[regno].value & 0xFF;
8216 for (i = 0; i < NELEMS (gr_values); i++)
8218 /* Uses all registers *except* the one in R3. */
8219 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8221 specs[count] = tmpl;
8222 specs[count++].index = i;
8228 specs[count] = tmpl;
8229 specs[count++].specific = 0;
8236 specs[count] = tmpl;
8237 specs[count++].specific = 0;
8241 case IA64_RS_PMC: /* four or more registers */
8244 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8245 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8248 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8250 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8251 if (regno >= 0 && regno < NELEMS (gr_values)
8254 specs[count] = tmpl;
8255 specs[count++].index = gr_values[regno].value & 0xFF;
8259 specs[count] = tmpl;
8260 specs[count++].specific = 0;
8270 case IA64_RS_PMD: /* four or more registers */
8273 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8275 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8276 if (regno >= 0 && regno < NELEMS (gr_values)
8279 specs[count] = tmpl;
8280 specs[count++].index = gr_values[regno].value & 0xFF;
8284 specs[count] = tmpl;
8285 specs[count++].specific = 0;
8295 case IA64_RS_RR: /* eight registers */
8298 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8300 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8301 if (regno >= 0 && regno < NELEMS (gr_values)
8304 specs[count] = tmpl;
8305 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8309 specs[count] = tmpl;
8310 specs[count++].specific = 0;
8314 else if (note == 0 && !rsrc_write)
8316 specs[count] = tmpl;
8317 specs[count++].specific = 0;
8325 case IA64_RS_CR_IRR:
8328 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8329 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8331 && idesc->operands[1] == IA64_OPND_CR3
8334 for (i = 0; i < 4; i++)
8336 specs[count] = tmpl;
8337 specs[count++].index = CR_IRR0 + i;
8343 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8344 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8346 && regno <= CR_IRR3)
8348 specs[count] = tmpl;
8349 specs[count++].index = regno;
8358 case IA64_RS_CR_LRR:
8365 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8366 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8367 && (regno == CR_LRR0 || regno == CR_LRR1))
8369 specs[count] = tmpl;
8370 specs[count++].index = regno;
8378 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8380 specs[count] = tmpl;
8381 specs[count++].index =
8382 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8397 else if (rsrc_write)
8399 if (dep->specifier == IA64_RS_FRb
8400 && idesc->operands[0] == IA64_OPND_F1)
8402 specs[count] = tmpl;
8403 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8408 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8410 if (idesc->operands[i] == IA64_OPND_F2
8411 || idesc->operands[i] == IA64_OPND_F3
8412 || idesc->operands[i] == IA64_OPND_F4)
8414 specs[count] = tmpl;
8415 specs[count++].index =
8416 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8425 /* This reference applies only to the GR whose value is loaded with
8426 data returned from memory. */
8427 specs[count] = tmpl;
8428 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8434 for (i = 0; i < idesc->num_outputs; i++)
8435 if (idesc->operands[i] == IA64_OPND_R1
8436 || idesc->operands[i] == IA64_OPND_R2
8437 || idesc->operands[i] == IA64_OPND_R3)
8439 specs[count] = tmpl;
8440 specs[count++].index =
8441 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8443 if (idesc->flags & IA64_OPCODE_POSTINC)
8444 for (i = 0; i < NELEMS (idesc->operands); i++)
8445 if (idesc->operands[i] == IA64_OPND_MR3)
8447 specs[count] = tmpl;
8448 specs[count++].index =
8449 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8454 /* Look for anything that reads a GR. */
8455 for (i = 0; i < NELEMS (idesc->operands); i++)
8457 if (idesc->operands[i] == IA64_OPND_MR3
8458 || idesc->operands[i] == IA64_OPND_CPUID_R3
8459 || idesc->operands[i] == IA64_OPND_DBR_R3
8460 || idesc->operands[i] == IA64_OPND_IBR_R3
8461 || idesc->operands[i] == IA64_OPND_MSR_R3
8462 || idesc->operands[i] == IA64_OPND_PKR_R3
8463 || idesc->operands[i] == IA64_OPND_PMC_R3
8464 || idesc->operands[i] == IA64_OPND_PMD_R3
8465 || idesc->operands[i] == IA64_OPND_RR_R3
8466 || ((i >= idesc->num_outputs)
8467 && (idesc->operands[i] == IA64_OPND_R1
8468 || idesc->operands[i] == IA64_OPND_R2
8469 || idesc->operands[i] == IA64_OPND_R3
8470 /* addl source register. */
8471 || idesc->operands[i] == IA64_OPND_R3_2)))
8473 specs[count] = tmpl;
8474 specs[count++].index =
8475 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8486 /* This is the same as IA64_RS_PRr, except that the register range is
8487 from 1 - 15, and there are no rotating register reads/writes here. */
8491 for (i = 1; i < 16; i++)
8493 specs[count] = tmpl;
8494 specs[count++].index = i;
8500 /* Mark only those registers indicated by the mask. */
8503 mask = CURR_SLOT.opnd[2].X_add_number;
8504 for (i = 1; i < 16; i++)
8505 if (mask & ((valueT) 1 << i))
8507 specs[count] = tmpl;
8508 specs[count++].index = i;
8516 else if (note == 11) /* note 11 implies note 1 as well */
8520 for (i = 0; i < idesc->num_outputs; i++)
8522 if (idesc->operands[i] == IA64_OPND_P1
8523 || idesc->operands[i] == IA64_OPND_P2)
8525 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8526 if (regno >= 1 && regno < 16)
8528 specs[count] = tmpl;
8529 specs[count++].index = regno;
8539 else if (note == 12)
8541 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8543 specs[count] = tmpl;
8544 specs[count++].index = CURR_SLOT.qp_regno;
8551 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8552 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8553 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8554 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8556 if ((idesc->operands[0] == IA64_OPND_P1
8557 || idesc->operands[0] == IA64_OPND_P2)
8558 && p1 >= 1 && p1 < 16)
8560 specs[count] = tmpl;
8561 specs[count].cmp_type =
8562 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8563 specs[count++].index = p1;
8565 if ((idesc->operands[1] == IA64_OPND_P1
8566 || idesc->operands[1] == IA64_OPND_P2)
8567 && p2 >= 1 && p2 < 16)
8569 specs[count] = tmpl;
8570 specs[count].cmp_type =
8571 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8572 specs[count++].index = p2;
8577 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8579 specs[count] = tmpl;
8580 specs[count++].index = CURR_SLOT.qp_regno;
8582 if (idesc->operands[1] == IA64_OPND_PR)
8584 for (i = 1; i < 16; i++)
8586 specs[count] = tmpl;
8587 specs[count++].index = i;
8598 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8599 simplified cases of this. */
8603 for (i = 16; i < 63; i++)
8605 specs[count] = tmpl;
8606 specs[count++].index = i;
8612 /* Mark only those registers indicated by the mask. */
8614 && idesc->operands[0] == IA64_OPND_PR)
8616 mask = CURR_SLOT.opnd[2].X_add_number;
8617 if (mask & ((valueT) 1 << 16))
8618 for (i = 16; i < 63; i++)
8620 specs[count] = tmpl;
8621 specs[count++].index = i;
8625 && idesc->operands[0] == IA64_OPND_PR_ROT)
8627 for (i = 16; i < 63; i++)
8629 specs[count] = tmpl;
8630 specs[count++].index = i;
8638 else if (note == 11) /* note 11 implies note 1 as well */
8642 for (i = 0; i < idesc->num_outputs; i++)
8644 if (idesc->operands[i] == IA64_OPND_P1
8645 || idesc->operands[i] == IA64_OPND_P2)
8647 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8648 if (regno >= 16 && regno < 63)
8650 specs[count] = tmpl;
8651 specs[count++].index = regno;
8661 else if (note == 12)
8663 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8665 specs[count] = tmpl;
8666 specs[count++].index = CURR_SLOT.qp_regno;
8673 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8674 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8675 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8676 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8678 if ((idesc->operands[0] == IA64_OPND_P1
8679 || idesc->operands[0] == IA64_OPND_P2)
8680 && p1 >= 16 && p1 < 63)
8682 specs[count] = tmpl;
8683 specs[count].cmp_type =
8684 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8685 specs[count++].index = p1;
8687 if ((idesc->operands[1] == IA64_OPND_P1
8688 || idesc->operands[1] == IA64_OPND_P2)
8689 && p2 >= 16 && p2 < 63)
8691 specs[count] = tmpl;
8692 specs[count].cmp_type =
8693 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8694 specs[count++].index = p2;
8699 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8701 specs[count] = tmpl;
8702 specs[count++].index = CURR_SLOT.qp_regno;
8704 if (idesc->operands[1] == IA64_OPND_PR)
8706 for (i = 16; i < 63; i++)
8708 specs[count] = tmpl;
8709 specs[count++].index = i;
8721 /* Verify that the instruction is using the PSR bit indicated in
8725 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8727 if (dep->regindex < 6)
8729 specs[count++] = tmpl;
8732 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8734 if (dep->regindex < 32
8735 || dep->regindex == 35
8736 || dep->regindex == 36
8737 || (!rsrc_write && dep->regindex == PSR_CPL))
8739 specs[count++] = tmpl;
8742 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8744 if (dep->regindex < 32
8745 || dep->regindex == 35
8746 || dep->regindex == 36
8747 || (rsrc_write && dep->regindex == PSR_CPL))
8749 specs[count++] = tmpl;
8754 /* Several PSR bits have very specific dependencies. */
8755 switch (dep->regindex)
8758 specs[count++] = tmpl;
8763 specs[count++] = tmpl;
8767 /* Only certain CR accesses use PSR.ic */
8768 if (idesc->operands[0] == IA64_OPND_CR3
8769 || idesc->operands[1] == IA64_OPND_CR3)
8772 ((idesc->operands[0] == IA64_OPND_CR3)
8775 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8790 specs[count++] = tmpl;
8799 specs[count++] = tmpl;
8803 /* Only some AR accesses use cpl */
8804 if (idesc->operands[0] == IA64_OPND_AR3
8805 || idesc->operands[1] == IA64_OPND_AR3)
8808 ((idesc->operands[0] == IA64_OPND_AR3)
8811 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8818 && regno <= AR_K7))))
8820 specs[count++] = tmpl;
8825 specs[count++] = tmpl;
8835 if (idesc->operands[0] == IA64_OPND_IMMU24)
8837 mask = CURR_SLOT.opnd[0].X_add_number;
8843 if (mask & ((valueT) 1 << dep->regindex))
8845 specs[count++] = tmpl;
8850 int min = dep->regindex == PSR_DFL ? 2 : 32;
8851 int max = dep->regindex == PSR_DFL ? 31 : 127;
8852 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8853 for (i = 0; i < NELEMS (idesc->operands); i++)
8855 if (idesc->operands[i] == IA64_OPND_F1
8856 || idesc->operands[i] == IA64_OPND_F2
8857 || idesc->operands[i] == IA64_OPND_F3
8858 || idesc->operands[i] == IA64_OPND_F4)
8860 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8861 if (reg >= min && reg <= max)
8863 specs[count++] = tmpl;
8870 int min = dep->regindex == PSR_MFL ? 2 : 32;
8871 int max = dep->regindex == PSR_MFL ? 31 : 127;
8872 /* mfh is read on writes to FR32-127; mfl is read on writes to
8874 for (i = 0; i < idesc->num_outputs; i++)
8876 if (idesc->operands[i] == IA64_OPND_F1)
8878 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8879 if (reg >= min && reg <= max)
8881 specs[count++] = tmpl;
8886 else if (note == 10)
8888 for (i = 0; i < NELEMS (idesc->operands); i++)
8890 if (idesc->operands[i] == IA64_OPND_R1
8891 || idesc->operands[i] == IA64_OPND_R2
8892 || idesc->operands[i] == IA64_OPND_R3)
8894 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8895 if (regno >= 16 && regno <= 31)
8897 specs[count++] = tmpl;
8908 case IA64_RS_AR_FPSR:
8909 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8911 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8912 if (regno == AR_FPSR)
8914 specs[count++] = tmpl;
8919 specs[count++] = tmpl;
8924 /* Handle all AR[REG] resources */
8925 if (note == 0 || note == 1)
8927 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8928 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8929 && regno == dep->regindex)
8931 specs[count++] = tmpl;
8933 /* other AR[REG] resources may be affected by AR accesses */
8934 else if (idesc->operands[0] == IA64_OPND_AR3)
8937 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8938 switch (dep->regindex)
8944 if (regno == AR_BSPSTORE)
8946 specs[count++] = tmpl;
8950 (regno == AR_BSPSTORE
8951 || regno == AR_RNAT))
8953 specs[count++] = tmpl;
8958 else if (idesc->operands[1] == IA64_OPND_AR3)
8961 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8962 switch (dep->regindex)
8967 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8969 specs[count++] = tmpl;
8976 specs[count++] = tmpl;
8986 /* Handle all CR[REG] resources */
8987 if (note == 0 || note == 1)
8989 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8991 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8992 if (regno == dep->regindex)
8994 specs[count++] = tmpl;
8996 else if (!rsrc_write)
8998 /* Reads from CR[IVR] affect other resources. */
8999 if (regno == CR_IVR)
9001 if ((dep->regindex >= CR_IRR0
9002 && dep->regindex <= CR_IRR3)
9003 || dep->regindex == CR_TPR)
9005 specs[count++] = tmpl;
9012 specs[count++] = tmpl;
9021 case IA64_RS_INSERVICE:
9022 /* look for write of EOI (67) or read of IVR (65) */
9023 if ((idesc->operands[0] == IA64_OPND_CR3
9024 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9025 || (idesc->operands[1] == IA64_OPND_CR3
9026 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9028 specs[count++] = tmpl;
9035 specs[count++] = tmpl;
9046 specs[count++] = tmpl;
9050 /* Check if any of the registers accessed are in the rotating region.
9051 mov to/from pr accesses CFM only when qp_regno is in the rotating
9053 for (i = 0; i < NELEMS (idesc->operands); i++)
9055 if (idesc->operands[i] == IA64_OPND_R1
9056 || idesc->operands[i] == IA64_OPND_R2
9057 || idesc->operands[i] == IA64_OPND_R3)
9059 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9060 /* Assumes that md.rot.num_regs is always valid */
9061 if (md.rot.num_regs > 0
9063 && num < 31 + md.rot.num_regs)
9065 specs[count] = tmpl;
9066 specs[count++].specific = 0;
9069 else if (idesc->operands[i] == IA64_OPND_F1
9070 || idesc->operands[i] == IA64_OPND_F2
9071 || idesc->operands[i] == IA64_OPND_F3
9072 || idesc->operands[i] == IA64_OPND_F4)
9074 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9077 specs[count] = tmpl;
9078 specs[count++].specific = 0;
9081 else if (idesc->operands[i] == IA64_OPND_P1
9082 || idesc->operands[i] == IA64_OPND_P2)
9084 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9087 specs[count] = tmpl;
9088 specs[count++].specific = 0;
9092 if (CURR_SLOT.qp_regno > 15)
9094 specs[count] = tmpl;
9095 specs[count++].specific = 0;
9100 /* This is the same as IA64_RS_PRr, except simplified to account for
9101 the fact that there is only one register. */
9105 specs[count++] = tmpl;
9110 if (idesc->operands[2] == IA64_OPND_IMM17)
9111 mask = CURR_SLOT.opnd[2].X_add_number;
9112 if (mask & ((valueT) 1 << 63))
9113 specs[count++] = tmpl;
9115 else if (note == 11)
9117 if ((idesc->operands[0] == IA64_OPND_P1
9118 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9119 || (idesc->operands[1] == IA64_OPND_P2
9120 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9122 specs[count++] = tmpl;
9125 else if (note == 12)
9127 if (CURR_SLOT.qp_regno == 63)
9129 specs[count++] = tmpl;
9136 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9137 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9138 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9139 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9142 && (idesc->operands[0] == IA64_OPND_P1
9143 || idesc->operands[0] == IA64_OPND_P2))
9145 specs[count] = tmpl;
9146 specs[count++].cmp_type =
9147 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9150 && (idesc->operands[1] == IA64_OPND_P1
9151 || idesc->operands[1] == IA64_OPND_P2))
9153 specs[count] = tmpl;
9154 specs[count++].cmp_type =
9155 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9160 if (CURR_SLOT.qp_regno == 63)
9162 specs[count++] = tmpl;
9173 /* FIXME we can identify some individual RSE written resources, but RSE
9174 read resources have not yet been completely identified, so for now
9175 treat RSE as a single resource */
9176 if (strncmp (idesc->name, "mov", 3) == 0)
9180 if (idesc->operands[0] == IA64_OPND_AR3
9181 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9183 specs[count] = tmpl;
9184 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9189 if (idesc->operands[0] == IA64_OPND_AR3)
9191 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9192 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9194 specs[count++] = tmpl;
9197 else if (idesc->operands[1] == IA64_OPND_AR3)
9199 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9200 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9201 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9203 specs[count++] = tmpl;
9210 specs[count++] = tmpl;
9215 /* FIXME -- do any of these need to be non-specific? */
9216 specs[count++] = tmpl;
9220 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9227 /* Clear branch flags on marked resources. This breaks the link between the
9228 QP of the marking instruction and a subsequent branch on the same QP. */
9231 clear_qp_branch_flag (mask)
9235 for (i = 0; i < regdepslen; i++)
9237 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9238 if ((bit & mask) != 0)
9240 regdeps[i].link_to_qp_branch = 0;
9245 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9246 any mutexes which contain one of the PRs and create new ones when
9250 update_qp_mutex (valueT mask)
9256 while (i < qp_mutexeslen)
9258 if ((qp_mutexes[i].prmask & mask) != 0)
9260 /* If it destroys and creates the same mutex, do nothing. */
9261 if (qp_mutexes[i].prmask == mask
9262 && qp_mutexes[i].path == md.path)
9273 fprintf (stderr, " Clearing mutex relation");
9274 print_prmask (qp_mutexes[i].prmask);
9275 fprintf (stderr, "\n");
9278 /* Deal with the old mutex with more than 3+ PRs only if
9279 the new mutex on the same execution path with it.
9281 FIXME: The 3+ mutex support is incomplete.
9282 dot_pred_rel () may be a better place to fix it. */
9283 if (qp_mutexes[i].path == md.path)
9285 /* If it is a proper subset of the mutex, create a
9288 && (qp_mutexes[i].prmask & mask) == mask)
9291 qp_mutexes[i].prmask &= ~mask;
9292 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9294 /* Modify the mutex if there are more than one
9302 /* Remove the mutex. */
9303 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9311 add_qp_mutex (mask);
9316 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9318 Any changes to a PR clears the mutex relations which include that PR. */
9321 clear_qp_mutex (mask)
9327 while (i < qp_mutexeslen)
9329 if ((qp_mutexes[i].prmask & mask) != 0)
9333 fprintf (stderr, " Clearing mutex relation");
9334 print_prmask (qp_mutexes[i].prmask);
9335 fprintf (stderr, "\n");
9337 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9344 /* Clear implies relations which contain PRs in the given masks.
9345 P1_MASK indicates the source of the implies relation, while P2_MASK
9346 indicates the implied PR. */
9349 clear_qp_implies (p1_mask, p2_mask)
9356 while (i < qp_implieslen)
9358 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9359 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9362 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9363 qp_implies[i].p1, qp_implies[i].p2);
9364 qp_implies[i] = qp_implies[--qp_implieslen];
9371 /* Add the PRs specified to the list of implied relations. */
9374 add_qp_imply (p1, p2)
9381 /* p0 is not meaningful here. */
9382 if (p1 == 0 || p2 == 0)
9388 /* If it exists already, ignore it. */
9389 for (i = 0; i < qp_implieslen; i++)
9391 if (qp_implies[i].p1 == p1
9392 && qp_implies[i].p2 == p2
9393 && qp_implies[i].path == md.path
9394 && !qp_implies[i].p2_branched)
9398 if (qp_implieslen == qp_impliestotlen)
9400 qp_impliestotlen += 20;
9401 qp_implies = (struct qp_imply *)
9402 xrealloc ((void *) qp_implies,
9403 qp_impliestotlen * sizeof (struct qp_imply));
9406 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9407 qp_implies[qp_implieslen].p1 = p1;
9408 qp_implies[qp_implieslen].p2 = p2;
9409 qp_implies[qp_implieslen].path = md.path;
9410 qp_implies[qp_implieslen++].p2_branched = 0;
9412 /* Add in the implied transitive relations; for everything that p2 implies,
9413 make p1 imply that, too; for everything that implies p1, make it imply p2
9415 for (i = 0; i < qp_implieslen; i++)
9417 if (qp_implies[i].p1 == p2)
9418 add_qp_imply (p1, qp_implies[i].p2);
9419 if (qp_implies[i].p2 == p1)
9420 add_qp_imply (qp_implies[i].p1, p2);
9422 /* Add in mutex relations implied by this implies relation; for each mutex
9423 relation containing p2, duplicate it and replace p2 with p1. */
9424 bit = (valueT) 1 << p1;
9425 mask = (valueT) 1 << p2;
9426 for (i = 0; i < qp_mutexeslen; i++)
9428 if (qp_mutexes[i].prmask & mask)
9429 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9433 /* Add the PRs specified in the mask to the mutex list; this means that only
9434 one of the PRs can be true at any time. PR0 should never be included in
9444 if (qp_mutexeslen == qp_mutexestotlen)
9446 qp_mutexestotlen += 20;
9447 qp_mutexes = (struct qpmutex *)
9448 xrealloc ((void *) qp_mutexes,
9449 qp_mutexestotlen * sizeof (struct qpmutex));
9453 fprintf (stderr, " Registering mutex on");
9454 print_prmask (mask);
9455 fprintf (stderr, "\n");
9457 qp_mutexes[qp_mutexeslen].path = md.path;
9458 qp_mutexes[qp_mutexeslen++].prmask = mask;
9462 has_suffix_p (name, suffix)
9466 size_t namelen = strlen (name);
9467 size_t sufflen = strlen (suffix);
9469 if (namelen <= sufflen)
9471 return strcmp (name + namelen - sufflen, suffix) == 0;
9475 clear_register_values ()
9479 fprintf (stderr, " Clearing register values\n");
9480 for (i = 1; i < NELEMS (gr_values); i++)
9481 gr_values[i].known = 0;
9484 /* Keep track of register values/changes which affect DV tracking.
9486 optimization note: should add a flag to classes of insns where otherwise we
9487 have to examine a group of strings to identify them. */
9490 note_register_values (idesc)
9491 struct ia64_opcode *idesc;
9493 valueT qp_changemask = 0;
9496 /* Invalidate values for registers being written to. */
9497 for (i = 0; i < idesc->num_outputs; i++)
9499 if (idesc->operands[i] == IA64_OPND_R1
9500 || idesc->operands[i] == IA64_OPND_R2
9501 || idesc->operands[i] == IA64_OPND_R3)
9503 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9504 if (regno > 0 && regno < NELEMS (gr_values))
9505 gr_values[regno].known = 0;
9507 else if (idesc->operands[i] == IA64_OPND_R3_2)
9509 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9510 if (regno > 0 && regno < 4)
9511 gr_values[regno].known = 0;
9513 else if (idesc->operands[i] == IA64_OPND_P1
9514 || idesc->operands[i] == IA64_OPND_P2)
9516 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9517 qp_changemask |= (valueT) 1 << regno;
9519 else if (idesc->operands[i] == IA64_OPND_PR)
9521 if (idesc->operands[2] & (valueT) 0x10000)
9522 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9524 qp_changemask = idesc->operands[2];
9527 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9529 if (idesc->operands[1] & ((valueT) 1 << 43))
9530 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9532 qp_changemask = idesc->operands[1];
9533 qp_changemask &= ~(valueT) 0xFFFF;
9538 /* Always clear qp branch flags on any PR change. */
9539 /* FIXME there may be exceptions for certain compares. */
9540 clear_qp_branch_flag (qp_changemask);
9542 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9543 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9545 qp_changemask |= ~(valueT) 0xFFFF;
9546 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9548 for (i = 32; i < 32 + md.rot.num_regs; i++)
9549 gr_values[i].known = 0;
9551 clear_qp_mutex (qp_changemask);
9552 clear_qp_implies (qp_changemask, qp_changemask);
9554 /* After a call, all register values are undefined, except those marked
9556 else if (strncmp (idesc->name, "br.call", 6) == 0
9557 || strncmp (idesc->name, "brl.call", 7) == 0)
9559 /* FIXME keep GR values which are marked as "safe_across_calls" */
9560 clear_register_values ();
9561 clear_qp_mutex (~qp_safe_across_calls);
9562 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9563 clear_qp_branch_flag (~qp_safe_across_calls);
9565 else if (is_interruption_or_rfi (idesc)
9566 || is_taken_branch (idesc))
9568 clear_register_values ();
9569 clear_qp_mutex (~(valueT) 0);
9570 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9572 /* Look for mutex and implies relations. */
9573 else if ((idesc->operands[0] == IA64_OPND_P1
9574 || idesc->operands[0] == IA64_OPND_P2)
9575 && (idesc->operands[1] == IA64_OPND_P1
9576 || idesc->operands[1] == IA64_OPND_P2))
9578 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9579 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9580 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9581 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9583 /* If both PRs are PR0, we can't really do anything. */
9584 if (p1 == 0 && p2 == 0)
9587 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9589 /* In general, clear mutexes and implies which include P1 or P2,
9590 with the following exceptions. */
9591 else if (has_suffix_p (idesc->name, ".or.andcm")
9592 || has_suffix_p (idesc->name, ".and.orcm"))
9594 clear_qp_implies (p2mask, p1mask);
9596 else if (has_suffix_p (idesc->name, ".andcm")
9597 || has_suffix_p (idesc->name, ".and"))
9599 clear_qp_implies (0, p1mask | p2mask);
9601 else if (has_suffix_p (idesc->name, ".orcm")
9602 || has_suffix_p (idesc->name, ".or"))
9604 clear_qp_mutex (p1mask | p2mask);
9605 clear_qp_implies (p1mask | p2mask, 0);
9611 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9613 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9614 if (p1 == 0 || p2 == 0)
9615 clear_qp_mutex (p1mask | p2mask);
9617 added = update_qp_mutex (p1mask | p2mask);
9619 if (CURR_SLOT.qp_regno == 0
9620 || has_suffix_p (idesc->name, ".unc"))
9622 if (added == 0 && p1 && p2)
9623 add_qp_mutex (p1mask | p2mask);
9624 if (CURR_SLOT.qp_regno != 0)
9627 add_qp_imply (p1, CURR_SLOT.qp_regno);
9629 add_qp_imply (p2, CURR_SLOT.qp_regno);
9634 /* Look for mov imm insns into GRs. */
9635 else if (idesc->operands[0] == IA64_OPND_R1
9636 && (idesc->operands[1] == IA64_OPND_IMM22
9637 || idesc->operands[1] == IA64_OPND_IMMU64)
9638 && (strcmp (idesc->name, "mov") == 0
9639 || strcmp (idesc->name, "movl") == 0))
9641 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9642 if (regno > 0 && regno < NELEMS (gr_values))
9644 gr_values[regno].known = 1;
9645 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9646 gr_values[regno].path = md.path;
9649 fprintf (stderr, " Know gr%d = ", regno);
9650 fprintf_vma (stderr, gr_values[regno].value);
9651 fputs ("\n", stderr);
9657 clear_qp_mutex (qp_changemask);
9658 clear_qp_implies (qp_changemask, qp_changemask);
9662 /* Return whether the given predicate registers are currently mutex. */
9665 qp_mutex (p1, p2, path)
9675 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9676 for (i = 0; i < qp_mutexeslen; i++)
9678 if (qp_mutexes[i].path >= path
9679 && (qp_mutexes[i].prmask & mask) == mask)
9686 /* Return whether the given resource is in the given insn's list of chks
9687 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9691 resources_match (rs, idesc, note, qp_regno, path)
9693 struct ia64_opcode *idesc;
9698 struct rsrc specs[MAX_SPECS];
9701 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9702 we don't need to check. One exception is note 11, which indicates that
9703 target predicates are written regardless of PR[qp]. */
9704 if (qp_mutex (rs->qp_regno, qp_regno, path)
9708 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9711 /* UNAT checking is a bit more specific than other resources */
9712 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9713 && specs[count].mem_offset.hint
9714 && rs->mem_offset.hint)
9716 if (rs->mem_offset.base == specs[count].mem_offset.base)
9718 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9719 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9726 /* Skip apparent PR write conflicts where both writes are an AND or both
9727 writes are an OR. */
9728 if (rs->dependency->specifier == IA64_RS_PR
9729 || rs->dependency->specifier == IA64_RS_PRr
9730 || rs->dependency->specifier == IA64_RS_PR63)
9732 if (specs[count].cmp_type != CMP_NONE
9733 && specs[count].cmp_type == rs->cmp_type)
9736 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9737 dv_mode[rs->dependency->mode],
9738 rs->dependency->specifier != IA64_RS_PR63 ?
9739 specs[count].index : 63);
9744 " %s on parallel compare conflict %s vs %s on PR%d\n",
9745 dv_mode[rs->dependency->mode],
9746 dv_cmp_type[rs->cmp_type],
9747 dv_cmp_type[specs[count].cmp_type],
9748 rs->dependency->specifier != IA64_RS_PR63 ?
9749 specs[count].index : 63);
9753 /* If either resource is not specific, conservatively assume a conflict
9755 if (!specs[count].specific || !rs->specific)
9757 else if (specs[count].index == rs->index)
9764 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9765 insert a stop to create the break. Update all resource dependencies
9766 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9767 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9768 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9772 insn_group_break (insert_stop, qp_regno, save_current)
9779 if (insert_stop && md.num_slots_in_use > 0)
9780 PREV_SLOT.end_of_insn_group = 1;
9784 fprintf (stderr, " Insn group break%s",
9785 (insert_stop ? " (w/stop)" : ""));
9787 fprintf (stderr, " effective for QP=%d", qp_regno);
9788 fprintf (stderr, "\n");
9792 while (i < regdepslen)
9794 const struct ia64_dependency *dep = regdeps[i].dependency;
9797 && regdeps[i].qp_regno != qp_regno)
9804 && CURR_SLOT.src_file == regdeps[i].file
9805 && CURR_SLOT.src_line == regdeps[i].line)
9811 /* clear dependencies which are automatically cleared by a stop, or
9812 those that have reached the appropriate state of insn serialization */
9813 if (dep->semantics == IA64_DVS_IMPLIED
9814 || dep->semantics == IA64_DVS_IMPLIEDF
9815 || regdeps[i].insn_srlz == STATE_SRLZ)
9817 print_dependency ("Removing", i);
9818 regdeps[i] = regdeps[--regdepslen];
9822 if (dep->semantics == IA64_DVS_DATA
9823 || dep->semantics == IA64_DVS_INSTR
9824 || dep->semantics == IA64_DVS_SPECIFIC)
9826 if (regdeps[i].insn_srlz == STATE_NONE)
9827 regdeps[i].insn_srlz = STATE_STOP;
9828 if (regdeps[i].data_srlz == STATE_NONE)
9829 regdeps[i].data_srlz = STATE_STOP;
9836 /* Add the given resource usage spec to the list of active dependencies. */
9839 mark_resource (idesc, dep, spec, depind, path)
9840 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9841 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9846 if (regdepslen == regdepstotlen)
9848 regdepstotlen += 20;
9849 regdeps = (struct rsrc *)
9850 xrealloc ((void *) regdeps,
9851 regdepstotlen * sizeof (struct rsrc));
9854 regdeps[regdepslen] = *spec;
9855 regdeps[regdepslen].depind = depind;
9856 regdeps[regdepslen].path = path;
9857 regdeps[regdepslen].file = CURR_SLOT.src_file;
9858 regdeps[regdepslen].line = CURR_SLOT.src_line;
9860 print_dependency ("Adding", regdepslen);
9866 print_dependency (action, depind)
9872 fprintf (stderr, " %s %s '%s'",
9873 action, dv_mode[(regdeps[depind].dependency)->mode],
9874 (regdeps[depind].dependency)->name);
9875 if (regdeps[depind].specific && regdeps[depind].index != 0)
9876 fprintf (stderr, " (%d)", regdeps[depind].index);
9877 if (regdeps[depind].mem_offset.hint)
9879 fputs (" ", stderr);
9880 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9881 fputs ("+", stderr);
9882 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9884 fprintf (stderr, "\n");
9889 instruction_serialization ()
9893 fprintf (stderr, " Instruction serialization\n");
9894 for (i = 0; i < regdepslen; i++)
9895 if (regdeps[i].insn_srlz == STATE_STOP)
9896 regdeps[i].insn_srlz = STATE_SRLZ;
9900 data_serialization ()
9904 fprintf (stderr, " Data serialization\n");
9905 while (i < regdepslen)
9907 if (regdeps[i].data_srlz == STATE_STOP
9908 /* Note: as of 991210, all "other" dependencies are cleared by a
9909 data serialization. This might change with new tables */
9910 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9912 print_dependency ("Removing", i);
9913 regdeps[i] = regdeps[--regdepslen];
9920 /* Insert stops and serializations as needed to avoid DVs. */
9923 remove_marked_resource (rs)
9926 switch (rs->dependency->semantics)
9928 case IA64_DVS_SPECIFIC:
9930 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9931 /* ...fall through... */
9932 case IA64_DVS_INSTR:
9934 fprintf (stderr, "Inserting instr serialization\n");
9935 if (rs->insn_srlz < STATE_STOP)
9936 insn_group_break (1, 0, 0);
9937 if (rs->insn_srlz < STATE_SRLZ)
9939 struct slot oldslot = CURR_SLOT;
9940 /* Manually jam a srlz.i insn into the stream */
9941 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9942 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9943 instruction_serialization ();
9944 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9945 if (++md.num_slots_in_use >= NUM_SLOTS)
9947 CURR_SLOT = oldslot;
9949 insn_group_break (1, 0, 0);
9951 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9952 "other" types of DV are eliminated
9953 by a data serialization */
9956 fprintf (stderr, "Inserting data serialization\n");
9957 if (rs->data_srlz < STATE_STOP)
9958 insn_group_break (1, 0, 0);
9960 struct slot oldslot = CURR_SLOT;
9961 /* Manually jam a srlz.d insn into the stream */
9962 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9963 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9964 data_serialization ();
9965 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9966 if (++md.num_slots_in_use >= NUM_SLOTS)
9968 CURR_SLOT = oldslot;
9971 case IA64_DVS_IMPLIED:
9972 case IA64_DVS_IMPLIEDF:
9974 fprintf (stderr, "Inserting stop\n");
9975 insn_group_break (1, 0, 0);
9982 /* Check the resources used by the given opcode against the current dependency
9985 The check is run once for each execution path encountered. In this case,
9986 a unique execution path is the sequence of instructions following a code
9987 entry point, e.g. the following has three execution paths, one starting
9988 at L0, one at L1, and one at L2.
9997 check_dependencies (idesc)
9998 struct ia64_opcode *idesc;
10000 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10004 /* Note that the number of marked resources may change within the
10005 loop if in auto mode. */
10007 while (i < regdepslen)
10009 struct rsrc *rs = ®deps[i];
10010 const struct ia64_dependency *dep = rs->dependency;
10013 int start_over = 0;
10015 if (dep->semantics == IA64_DVS_NONE
10016 || (chkind = depends_on (rs->depind, idesc)) == -1)
10022 note = NOTE (opdeps->chks[chkind]);
10024 /* Check this resource against each execution path seen thus far. */
10025 for (path = 0; path <= md.path; path++)
10029 /* If the dependency wasn't on the path being checked, ignore it. */
10030 if (rs->path < path)
10033 /* If the QP for this insn implies a QP which has branched, don't
10034 bother checking. Ed. NOTE: I don't think this check is terribly
10035 useful; what's the point of generating code which will only be
10036 reached if its QP is zero?
10037 This code was specifically inserted to handle the following code,
10038 based on notes from Intel's DV checking code, where p1 implies p2.
10044 if (CURR_SLOT.qp_regno != 0)
10048 for (implies = 0; implies < qp_implieslen; implies++)
10050 if (qp_implies[implies].path >= path
10051 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10052 && qp_implies[implies].p2_branched)
10062 if ((matchtype = resources_match (rs, idesc, note,
10063 CURR_SLOT.qp_regno, path)) != 0)
10066 char pathmsg[256] = "";
10067 char indexmsg[256] = "";
10068 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10071 sprintf (pathmsg, " when entry is at label '%s'",
10072 md.entry_labels[path - 1]);
10073 if (rs->specific && rs->index != 0)
10074 sprintf (indexmsg, ", specific resource number is %d",
10076 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10078 (certain ? "violates" : "may violate"),
10079 dv_mode[dep->mode], dep->name,
10080 dv_sem[dep->semantics],
10081 pathmsg, indexmsg);
10083 if (md.explicit_mode)
10085 as_warn ("%s", msg);
10086 if (path < md.path)
10087 as_warn (_("Only the first path encountering the conflict "
10089 as_warn_where (rs->file, rs->line,
10090 _("This is the location of the "
10091 "conflicting usage"));
10092 /* Don't bother checking other paths, to avoid duplicating
10093 the same warning */
10099 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10101 remove_marked_resource (rs);
10103 /* since the set of dependencies has changed, start over */
10104 /* FIXME -- since we're removing dvs as we go, we
10105 probably don't really need to start over... */
10118 /* Register new dependencies based on the given opcode. */
10121 mark_resources (idesc)
10122 struct ia64_opcode *idesc;
10125 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10126 int add_only_qp_reads = 0;
10128 /* A conditional branch only uses its resources if it is taken; if it is
10129 taken, we stop following that path. The other branch types effectively
10130 *always* write their resources. If it's not taken, register only QP
10132 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10134 add_only_qp_reads = 1;
10138 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10140 for (i = 0; i < opdeps->nregs; i++)
10142 const struct ia64_dependency *dep;
10143 struct rsrc specs[MAX_SPECS];
10148 dep = ia64_find_dependency (opdeps->regs[i]);
10149 note = NOTE (opdeps->regs[i]);
10151 if (add_only_qp_reads
10152 && !(dep->mode == IA64_DV_WAR
10153 && (dep->specifier == IA64_RS_PR
10154 || dep->specifier == IA64_RS_PRr
10155 || dep->specifier == IA64_RS_PR63)))
10158 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10160 while (count-- > 0)
10162 mark_resource (idesc, dep, &specs[count],
10163 DEP (opdeps->regs[i]), md.path);
10166 /* The execution path may affect register values, which may in turn
10167 affect which indirect-access resources are accessed. */
10168 switch (dep->specifier)
10172 case IA64_RS_CPUID:
10180 for (path = 0; path < md.path; path++)
10182 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10183 while (count-- > 0)
10184 mark_resource (idesc, dep, &specs[count],
10185 DEP (opdeps->regs[i]), path);
10192 /* Remove dependencies when they no longer apply. */
10195 update_dependencies (idesc)
10196 struct ia64_opcode *idesc;
10200 if (strcmp (idesc->name, "srlz.i") == 0)
10202 instruction_serialization ();
10204 else if (strcmp (idesc->name, "srlz.d") == 0)
10206 data_serialization ();
10208 else if (is_interruption_or_rfi (idesc)
10209 || is_taken_branch (idesc))
10211 /* Although technically the taken branch doesn't clear dependencies
10212 which require a srlz.[id], we don't follow the branch; the next
10213 instruction is assumed to start with a clean slate. */
10217 else if (is_conditional_branch (idesc)
10218 && CURR_SLOT.qp_regno != 0)
10220 int is_call = strstr (idesc->name, ".call") != NULL;
10222 for (i = 0; i < qp_implieslen; i++)
10224 /* If the conditional branch's predicate is implied by the predicate
10225 in an existing dependency, remove that dependency. */
10226 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10229 /* Note that this implied predicate takes a branch so that if
10230 a later insn generates a DV but its predicate implies this
10231 one, we can avoid the false DV warning. */
10232 qp_implies[i].p2_branched = 1;
10233 while (depind < regdepslen)
10235 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10237 print_dependency ("Removing", depind);
10238 regdeps[depind] = regdeps[--regdepslen];
10245 /* Any marked resources which have this same predicate should be
10246 cleared, provided that the QP hasn't been modified between the
10247 marking instruction and the branch. */
10250 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10255 while (i < regdepslen)
10257 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10258 && regdeps[i].link_to_qp_branch
10259 && (regdeps[i].file != CURR_SLOT.src_file
10260 || regdeps[i].line != CURR_SLOT.src_line))
10262 /* Treat like a taken branch */
10263 print_dependency ("Removing", i);
10264 regdeps[i] = regdeps[--regdepslen];
10273 /* Examine the current instruction for dependency violations. */
10277 struct ia64_opcode *idesc;
10281 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10282 idesc->name, CURR_SLOT.src_line,
10283 idesc->dependencies->nchks,
10284 idesc->dependencies->nregs);
10287 /* Look through the list of currently marked resources; if the current
10288 instruction has the dependency in its chks list which uses that resource,
10289 check against the specific resources used. */
10290 check_dependencies (idesc);
10292 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10293 then add them to the list of marked resources. */
10294 mark_resources (idesc);
10296 /* There are several types of dependency semantics, and each has its own
10297 requirements for being cleared
10299 Instruction serialization (insns separated by interruption, rfi, or
10300 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10302 Data serialization (instruction serialization, or writer + srlz.d +
10303 reader, where writer and srlz.d are in separate groups) clears
10304 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10305 always be the case).
10307 Instruction group break (groups separated by stop, taken branch,
10308 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10310 update_dependencies (idesc);
10312 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10313 warning. Keep track of as many as possible that are useful. */
10314 note_register_values (idesc);
10316 /* We don't need or want this anymore. */
10317 md.mem_offset.hint = 0;
10322 /* Translate one line of assembly. Pseudo ops and labels do not show
10328 char *saved_input_line_pointer, *mnemonic;
10329 const struct pseudo_opcode *pdesc;
10330 struct ia64_opcode *idesc;
10331 unsigned char qp_regno;
10332 unsigned int flags;
10335 saved_input_line_pointer = input_line_pointer;
10336 input_line_pointer = str;
10338 /* extract the opcode (mnemonic): */
10340 mnemonic = input_line_pointer;
10341 ch = get_symbol_end ();
10342 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10345 *input_line_pointer = ch;
10346 (*pdesc->handler) (pdesc->arg);
10350 /* Find the instruction descriptor matching the arguments. */
10352 idesc = ia64_find_opcode (mnemonic);
10353 *input_line_pointer = ch;
10356 as_bad ("Unknown opcode `%s'", mnemonic);
10360 idesc = parse_operands (idesc);
10364 /* Handle the dynamic ops we can handle now: */
10365 if (idesc->type == IA64_TYPE_DYN)
10367 if (strcmp (idesc->name, "add") == 0)
10369 if (CURR_SLOT.opnd[2].X_op == O_register
10370 && CURR_SLOT.opnd[2].X_add_number < 4)
10374 ia64_free_opcode (idesc);
10375 idesc = ia64_find_opcode (mnemonic);
10377 else if (strcmp (idesc->name, "mov") == 0)
10379 enum ia64_opnd opnd1, opnd2;
10382 opnd1 = idesc->operands[0];
10383 opnd2 = idesc->operands[1];
10384 if (opnd1 == IA64_OPND_AR3)
10386 else if (opnd2 == IA64_OPND_AR3)
10390 if (CURR_SLOT.opnd[rop].X_op == O_register)
10392 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10393 mnemonic = "mov.i";
10394 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10395 mnemonic = "mov.m";
10403 ia64_free_opcode (idesc);
10404 idesc = ia64_find_opcode (mnemonic);
10405 while (idesc != NULL
10406 && (idesc->operands[0] != opnd1
10407 || idesc->operands[1] != opnd2))
10408 idesc = get_next_opcode (idesc);
10412 else if (strcmp (idesc->name, "mov.i") == 0
10413 || strcmp (idesc->name, "mov.m") == 0)
10415 enum ia64_opnd opnd1, opnd2;
10418 opnd1 = idesc->operands[0];
10419 opnd2 = idesc->operands[1];
10420 if (opnd1 == IA64_OPND_AR3)
10422 else if (opnd2 == IA64_OPND_AR3)
10426 if (CURR_SLOT.opnd[rop].X_op == O_register)
10429 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10431 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10433 if (unit != 'a' && unit != idesc->name [4])
10434 as_bad ("AR %d cannot be accessed by %c-unit",
10435 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10441 if (md.qp.X_op == O_register)
10443 qp_regno = md.qp.X_add_number - REG_P;
10444 md.qp.X_op = O_absent;
10447 flags = idesc->flags;
10449 if ((flags & IA64_OPCODE_FIRST) != 0)
10451 /* The alignment frag has to end with a stop bit only if the
10452 next instruction after the alignment directive has to be
10453 the first instruction in an instruction group. */
10456 while (align_frag->fr_type != rs_align_code)
10458 align_frag = align_frag->fr_next;
10462 /* align_frag can be NULL if there are directives in
10464 if (align_frag && align_frag->fr_next == frag_now)
10465 align_frag->tc_frag_data = 1;
10468 insn_group_break (1, 0, 0);
10472 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10474 as_bad ("`%s' cannot be predicated", idesc->name);
10478 /* Build the instruction. */
10479 CURR_SLOT.qp_regno = qp_regno;
10480 CURR_SLOT.idesc = idesc;
10481 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10482 dwarf2_where (&CURR_SLOT.debug_line);
10484 /* Add unwind entry, if there is one. */
10485 if (unwind.current_entry)
10487 CURR_SLOT.unwind_record = unwind.current_entry;
10488 unwind.current_entry = NULL;
10490 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10493 /* Check for dependency violations. */
10497 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10498 if (++md.num_slots_in_use >= NUM_SLOTS)
10499 emit_one_bundle ();
10501 if ((flags & IA64_OPCODE_LAST) != 0)
10502 insn_group_break (1, 0, 0);
10504 md.last_text_seg = now_seg;
10507 input_line_pointer = saved_input_line_pointer;
10510 /* Called when symbol NAME cannot be found in the symbol table.
10511 Should be used for dynamic valued symbols only. */
10514 md_undefined_symbol (name)
10515 char *name ATTRIBUTE_UNUSED;
10520 /* Called for any expression that can not be recognized. When the
10521 function is called, `input_line_pointer' will point to the start of
10528 switch (*input_line_pointer)
10531 ++input_line_pointer;
10533 if (*input_line_pointer != ']')
10535 as_bad ("Closing bracket missing");
10540 if (e->X_op != O_register)
10541 as_bad ("Register expected as index");
10543 ++input_line_pointer;
10554 ignore_rest_of_line ();
10557 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10558 a section symbol plus some offset. For relocs involving @fptr(),
10559 directives we don't want such adjustments since we need to have the
10560 original symbol's name in the reloc. */
10562 ia64_fix_adjustable (fix)
10565 /* Prevent all adjustments to global symbols */
10566 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10569 switch (fix->fx_r_type)
10571 case BFD_RELOC_IA64_FPTR64I:
10572 case BFD_RELOC_IA64_FPTR32MSB:
10573 case BFD_RELOC_IA64_FPTR32LSB:
10574 case BFD_RELOC_IA64_FPTR64MSB:
10575 case BFD_RELOC_IA64_FPTR64LSB:
10576 case BFD_RELOC_IA64_LTOFF_FPTR22:
10577 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10587 ia64_force_relocation (fix)
10590 switch (fix->fx_r_type)
10592 case BFD_RELOC_IA64_FPTR64I:
10593 case BFD_RELOC_IA64_FPTR32MSB:
10594 case BFD_RELOC_IA64_FPTR32LSB:
10595 case BFD_RELOC_IA64_FPTR64MSB:
10596 case BFD_RELOC_IA64_FPTR64LSB:
10598 case BFD_RELOC_IA64_LTOFF22:
10599 case BFD_RELOC_IA64_LTOFF64I:
10600 case BFD_RELOC_IA64_LTOFF_FPTR22:
10601 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10602 case BFD_RELOC_IA64_PLTOFF22:
10603 case BFD_RELOC_IA64_PLTOFF64I:
10604 case BFD_RELOC_IA64_PLTOFF64MSB:
10605 case BFD_RELOC_IA64_PLTOFF64LSB:
10607 case BFD_RELOC_IA64_LTOFF22X:
10608 case BFD_RELOC_IA64_LDXMOV:
10615 return generic_force_reloc (fix);
10618 /* Decide from what point a pc-relative relocation is relative to,
10619 relative to the pc-relative fixup. Er, relatively speaking. */
10621 ia64_pcrel_from_section (fix, sec)
10625 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10627 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10634 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10636 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10640 expr.X_op = O_pseudo_fixup;
10641 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10642 expr.X_add_number = 0;
10643 expr.X_add_symbol = symbol;
10644 emit_expr (&expr, size);
10647 /* This is called whenever some data item (not an instruction) needs a
10648 fixup. We pick the right reloc code depending on the byteorder
10649 currently in effect. */
10651 ia64_cons_fix_new (f, where, nbytes, exp)
10657 bfd_reloc_code_real_type code;
10662 /* There are no reloc for 8 and 16 bit quantities, but we allow
10663 them here since they will work fine as long as the expression
10664 is fully defined at the end of the pass over the source file. */
10665 case 1: code = BFD_RELOC_8; break;
10666 case 2: code = BFD_RELOC_16; break;
10668 if (target_big_endian)
10669 code = BFD_RELOC_IA64_DIR32MSB;
10671 code = BFD_RELOC_IA64_DIR32LSB;
10675 /* In 32-bit mode, data8 could mean function descriptors too. */
10676 if (exp->X_op == O_pseudo_fixup
10677 && exp->X_op_symbol
10678 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10679 && !(md.flags & EF_IA_64_ABI64))
10681 if (target_big_endian)
10682 code = BFD_RELOC_IA64_IPLTMSB;
10684 code = BFD_RELOC_IA64_IPLTLSB;
10685 exp->X_op = O_symbol;
10690 if (target_big_endian)
10691 code = BFD_RELOC_IA64_DIR64MSB;
10693 code = BFD_RELOC_IA64_DIR64LSB;
10698 if (exp->X_op == O_pseudo_fixup
10699 && exp->X_op_symbol
10700 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10702 if (target_big_endian)
10703 code = BFD_RELOC_IA64_IPLTMSB;
10705 code = BFD_RELOC_IA64_IPLTLSB;
10706 exp->X_op = O_symbol;
10712 as_bad ("Unsupported fixup size %d", nbytes);
10713 ignore_rest_of_line ();
10717 if (exp->X_op == O_pseudo_fixup)
10719 exp->X_op = O_symbol;
10720 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10721 /* ??? If code unchanged, unsupported. */
10724 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10725 /* We need to store the byte order in effect in case we're going
10726 to fix an 8 or 16 bit relocation (for which there no real
10727 relocs available). See md_apply_fix3(). */
10728 fix->tc_fix_data.bigendian = target_big_endian;
10731 /* Return the actual relocation we wish to associate with the pseudo
10732 reloc described by SYM and R_TYPE. SYM should be one of the
10733 symbols in the pseudo_func array, or NULL. */
10735 static bfd_reloc_code_real_type
10736 ia64_gen_real_reloc_type (sym, r_type)
10737 struct symbol *sym;
10738 bfd_reloc_code_real_type r_type;
10740 bfd_reloc_code_real_type new = 0;
10741 const char *type = NULL, *suffix = "";
10748 switch (S_GET_VALUE (sym))
10750 case FUNC_FPTR_RELATIVE:
10753 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10754 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10755 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10756 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10757 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10758 default: type = "FPTR"; break;
10762 case FUNC_GP_RELATIVE:
10765 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10766 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10767 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10768 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10769 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10770 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10771 default: type = "GPREL"; break;
10775 case FUNC_LT_RELATIVE:
10778 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10779 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10780 default: type = "LTOFF"; break;
10784 case FUNC_LT_RELATIVE_X:
10787 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10788 default: type = "LTOFF"; suffix = "X"; break;
10792 case FUNC_PC_RELATIVE:
10795 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10796 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10797 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10798 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10799 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10800 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10801 default: type = "PCREL"; break;
10805 case FUNC_PLT_RELATIVE:
10808 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10809 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10810 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10811 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10812 default: type = "PLTOFF"; break;
10816 case FUNC_SEC_RELATIVE:
10819 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10820 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10821 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10822 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10823 default: type = "SECREL"; break;
10827 case FUNC_SEG_RELATIVE:
10830 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10831 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10832 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10833 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10834 default: type = "SEGREL"; break;
10838 case FUNC_LTV_RELATIVE:
10841 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10842 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10843 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10844 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10845 default: type = "LTV"; break;
10849 case FUNC_LT_FPTR_RELATIVE:
10852 case BFD_RELOC_IA64_IMM22:
10853 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10854 case BFD_RELOC_IA64_IMM64:
10855 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10856 case BFD_RELOC_IA64_DIR32MSB:
10857 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
10858 case BFD_RELOC_IA64_DIR32LSB:
10859 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
10860 case BFD_RELOC_IA64_DIR64MSB:
10861 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
10862 case BFD_RELOC_IA64_DIR64LSB:
10863 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
10865 type = "LTOFF_FPTR"; break;
10869 case FUNC_TP_RELATIVE:
10872 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
10873 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
10874 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
10875 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
10876 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
10877 default: type = "TPREL"; break;
10881 case FUNC_LT_TP_RELATIVE:
10884 case BFD_RELOC_IA64_IMM22:
10885 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10887 type = "LTOFF_TPREL"; break;
10891 case FUNC_DTP_MODULE:
10894 case BFD_RELOC_IA64_DIR64MSB:
10895 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
10896 case BFD_RELOC_IA64_DIR64LSB:
10897 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
10899 type = "DTPMOD"; break;
10903 case FUNC_LT_DTP_MODULE:
10906 case BFD_RELOC_IA64_IMM22:
10907 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10909 type = "LTOFF_DTPMOD"; break;
10913 case FUNC_DTP_RELATIVE:
10916 case BFD_RELOC_IA64_DIR32MSB:
10917 new = BFD_RELOC_IA64_DTPREL32MSB; break;
10918 case BFD_RELOC_IA64_DIR32LSB:
10919 new = BFD_RELOC_IA64_DTPREL32LSB; break;
10920 case BFD_RELOC_IA64_DIR64MSB:
10921 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10922 case BFD_RELOC_IA64_DIR64LSB:
10923 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10924 case BFD_RELOC_IA64_IMM14:
10925 new = BFD_RELOC_IA64_DTPREL14; break;
10926 case BFD_RELOC_IA64_IMM22:
10927 new = BFD_RELOC_IA64_DTPREL22; break;
10928 case BFD_RELOC_IA64_IMM64:
10929 new = BFD_RELOC_IA64_DTPREL64I; break;
10931 type = "DTPREL"; break;
10935 case FUNC_LT_DTP_RELATIVE:
10938 case BFD_RELOC_IA64_IMM22:
10939 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10941 type = "LTOFF_DTPREL"; break;
10945 case FUNC_IPLT_RELOC:
10948 case BFD_RELOC_IA64_IPLTMSB: return r_type;
10949 case BFD_RELOC_IA64_IPLTLSB: return r_type;
10950 default: type = "IPLT"; break;
10968 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
10969 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
10970 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
10971 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
10972 case BFD_RELOC_IA64_IMM14: width = 14; break;
10973 case BFD_RELOC_IA64_IMM22: width = 22; break;
10974 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
10978 /* This should be an error, but since previously there wasn't any
10979 diagnostic here, dont't make it fail because of this for now. */
10980 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
10985 /* Here is where generate the appropriate reloc for pseudo relocation
10988 ia64_validate_fix (fix)
10991 switch (fix->fx_r_type)
10993 case BFD_RELOC_IA64_FPTR64I:
10994 case BFD_RELOC_IA64_FPTR32MSB:
10995 case BFD_RELOC_IA64_FPTR64LSB:
10996 case BFD_RELOC_IA64_LTOFF_FPTR22:
10997 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10998 if (fix->fx_offset != 0)
10999 as_bad_where (fix->fx_file, fix->fx_line,
11000 "No addend allowed in @fptr() relocation");
11008 fix_insn (fix, odesc, value)
11010 const struct ia64_operand *odesc;
11013 bfd_vma insn[3], t0, t1, control_bits;
11018 slot = fix->fx_where & 0x3;
11019 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11021 /* Bundles are always in little-endian byte order */
11022 t0 = bfd_getl64 (fixpos);
11023 t1 = bfd_getl64 (fixpos + 8);
11024 control_bits = t0 & 0x1f;
11025 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11026 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11027 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11030 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
11032 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11033 insn[2] |= (((value & 0x7f) << 13)
11034 | (((value >> 7) & 0x1ff) << 27)
11035 | (((value >> 16) & 0x1f) << 22)
11036 | (((value >> 21) & 0x1) << 21)
11037 | (((value >> 63) & 0x1) << 36));
11039 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11041 if (value & ~0x3fffffffffffffffULL)
11042 err = "integer operand out of range";
11043 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11044 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11046 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11049 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11050 insn[2] |= ((((value >> 59) & 0x1) << 36)
11051 | (((value >> 0) & 0xfffff) << 13));
11054 err = (*odesc->insert) (odesc, value, insn + slot);
11057 as_bad_where (fix->fx_file, fix->fx_line, err);
11059 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11060 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
11061 number_to_chars_littleendian (fixpos + 0, t0, 8);
11062 number_to_chars_littleendian (fixpos + 8, t1, 8);
11065 /* Attempt to simplify or even eliminate a fixup. The return value is
11066 ignored; perhaps it was once meaningful, but now it is historical.
11067 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11069 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11073 md_apply_fix3 (fix, valP, seg)
11076 segT seg ATTRIBUTE_UNUSED;
11079 valueT value = *valP;
11081 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11085 switch (fix->fx_r_type)
11087 case BFD_RELOC_IA64_DIR32MSB:
11088 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
11091 case BFD_RELOC_IA64_DIR32LSB:
11092 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
11095 case BFD_RELOC_IA64_DIR64MSB:
11096 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
11099 case BFD_RELOC_IA64_DIR64LSB:
11100 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
11109 switch (fix->fx_r_type)
11111 case BFD_RELOC_UNUSED:
11112 /* This must be a TAG13 or TAG13b operand. There are no external
11113 relocs defined for them, so we must give an error. */
11114 as_bad_where (fix->fx_file, fix->fx_line,
11115 "%s must have a constant value",
11116 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11120 case BFD_RELOC_IA64_TPREL14:
11121 case BFD_RELOC_IA64_TPREL22:
11122 case BFD_RELOC_IA64_TPREL64I:
11123 case BFD_RELOC_IA64_LTOFF_TPREL22:
11124 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11125 case BFD_RELOC_IA64_DTPREL14:
11126 case BFD_RELOC_IA64_DTPREL22:
11127 case BFD_RELOC_IA64_DTPREL64I:
11128 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11129 S_SET_THREAD_LOCAL (fix->fx_addsy);
11136 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11138 if (fix->tc_fix_data.bigendian)
11139 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11141 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11146 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11151 /* Generate the BFD reloc to be stuck in the object file from the
11152 fixup used internally in the assembler. */
11155 tc_gen_reloc (sec, fixp)
11156 asection *sec ATTRIBUTE_UNUSED;
11161 reloc = xmalloc (sizeof (*reloc));
11162 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11163 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11164 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11165 reloc->addend = fixp->fx_offset;
11166 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11170 as_bad_where (fixp->fx_file, fixp->fx_line,
11171 "Cannot represent %s relocation in object file",
11172 bfd_get_reloc_code_name (fixp->fx_r_type));
11177 /* Turn a string in input_line_pointer into a floating point constant
11178 of type TYPE, and store the appropriate bytes in *LIT. The number
11179 of LITTLENUMS emitted is stored in *SIZE. An error message is
11180 returned, or NULL on OK. */
11182 #define MAX_LITTLENUMS 5
11185 md_atof (type, lit, size)
11190 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11220 return "Bad call to MD_ATOF()";
11222 t = atof_ieee (input_line_pointer, type, words);
11224 input_line_pointer = t;
11226 (*ia64_float_to_chars) (lit, words, prec);
11230 /* It is 10 byte floating point with 6 byte padding. */
11231 memset (&lit [10], 0, 6);
11232 *size = 8 * sizeof (LITTLENUM_TYPE);
11235 *size = prec * sizeof (LITTLENUM_TYPE);
11240 /* Handle ia64 specific semantics of the align directive. */
11243 ia64_md_do_align (n, fill, len, max)
11244 int n ATTRIBUTE_UNUSED;
11245 const char *fill ATTRIBUTE_UNUSED;
11246 int len ATTRIBUTE_UNUSED;
11247 int max ATTRIBUTE_UNUSED;
11249 if (subseg_text_p (now_seg))
11250 ia64_flush_insns ();
11253 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11254 of an rs_align_code fragment. */
11257 ia64_handle_align (fragp)
11260 /* Use mfi bundle of nops with no stop bits. */
11261 static const unsigned char le_nop[]
11262 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11263 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11264 static const unsigned char le_nop_stop[]
11265 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11266 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11270 const unsigned char *nop;
11272 if (fragp->fr_type != rs_align_code)
11275 /* Check if this frag has to end with a stop bit. */
11276 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11278 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11279 p = fragp->fr_literal + fragp->fr_fix;
11281 /* If no paddings are needed, we check if we need a stop bit. */
11282 if (!bytes && fragp->tc_frag_data)
11284 if (fragp->fr_fix < 16)
11286 /* FIXME: It won't work with
11288 alloc r32=ar.pfs,1,2,4,0
11292 as_bad_where (fragp->fr_file, fragp->fr_line,
11293 _("Can't add stop bit to mark end of instruction group"));
11296 /* Bundles are always in little-endian byte order. Make sure
11297 the previous bundle has the stop bit. */
11301 /* Make sure we are on a 16-byte boundary, in case someone has been
11302 putting data into a text section. */
11305 int fix = bytes & 15;
11306 memset (p, 0, fix);
11309 fragp->fr_fix += fix;
11312 /* Instruction bundles are always little-endian. */
11313 memcpy (p, nop, 16);
11314 fragp->fr_var = 16;
11318 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11323 number_to_chars_bigendian (lit, (long) (*words++),
11324 sizeof (LITTLENUM_TYPE));
11325 lit += sizeof (LITTLENUM_TYPE);
11330 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11335 number_to_chars_littleendian (lit, (long) (words[prec]),
11336 sizeof (LITTLENUM_TYPE));
11337 lit += sizeof (LITTLENUM_TYPE);
11342 ia64_elf_section_change_hook (void)
11344 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11345 && elf_linked_to_section (now_seg) == NULL)
11346 elf_linked_to_section (now_seg) = text_section;
11347 dot_byteorder (-1);
11350 /* Check if a label should be made global. */
11352 ia64_check_label (symbolS *label)
11354 if (*input_line_pointer == ':')
11356 S_SET_EXTERNAL (label);
11357 input_line_pointer++;
11361 /* Used to remember where .alias and .secalias directives are seen. We
11362 will rename symbol and section names when we are about to output
11363 the relocatable file. */
11366 char *file; /* The file where the directive is seen. */
11367 unsigned int line; /* The line number the directive is at. */
11368 const char *name; /* The orignale name of the symbol. */
11371 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11372 .secalias. Otherwise, it is .alias. */
11374 dot_alias (int section)
11376 char *name, *alias;
11380 const char *error_string;
11383 struct hash_control *ahash, *nhash;
11386 name = input_line_pointer;
11387 delim = get_symbol_end ();
11388 end_name = input_line_pointer;
11391 if (name == end_name)
11393 as_bad (_("expected symbol name"));
11394 discard_rest_of_line ();
11398 SKIP_WHITESPACE ();
11400 if (*input_line_pointer != ',')
11403 as_bad (_("expected comma after \"%s\""), name);
11405 ignore_rest_of_line ();
11409 input_line_pointer++;
11411 ia64_canonicalize_symbol_name (name);
11413 /* We call demand_copy_C_string to check if alias string is valid.
11414 There should be a closing `"' and no `\0' in the string. */
11415 alias = demand_copy_C_string (&len);
11418 ignore_rest_of_line ();
11422 /* Make a copy of name string. */
11423 len = strlen (name) + 1;
11424 obstack_grow (¬es, name, len);
11425 name = obstack_finish (¬es);
11430 ahash = secalias_hash;
11431 nhash = secalias_name_hash;
11436 ahash = alias_hash;
11437 nhash = alias_name_hash;
11440 /* Check if alias has been used before. */
11441 h = (struct alias *) hash_find (ahash, alias);
11444 if (strcmp (h->name, name))
11445 as_bad (_("`%s' is already the alias of %s `%s'"),
11446 alias, kind, h->name);
11450 /* Check if name already has an alias. */
11451 a = (const char *) hash_find (nhash, name);
11454 if (strcmp (a, alias))
11455 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11459 h = (struct alias *) xmalloc (sizeof (struct alias));
11460 as_where (&h->file, &h->line);
11463 error_string = hash_jam (ahash, alias, (PTR) h);
11466 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11467 alias, kind, error_string);
11471 error_string = hash_jam (nhash, name, (PTR) alias);
11474 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11475 alias, kind, error_string);
11477 obstack_free (¬es, name);
11478 obstack_free (¬es, alias);
11481 demand_empty_rest_of_line ();
11484 /* It renames the original symbol name to its alias. */
11486 do_alias (const char *alias, PTR value)
11488 struct alias *h = (struct alias *) value;
11489 symbolS *sym = symbol_find (h->name);
11492 as_warn_where (h->file, h->line,
11493 _("symbol `%s' aliased to `%s' is not used"),
11496 S_SET_NAME (sym, (char *) alias);
11499 /* Called from write_object_file. */
11501 ia64_adjust_symtab (void)
11503 hash_traverse (alias_hash, do_alias);
11506 /* It renames the original section name to its alias. */
11508 do_secalias (const char *alias, PTR value)
11510 struct alias *h = (struct alias *) value;
11511 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11514 as_warn_where (h->file, h->line,
11515 _("section `%s' aliased to `%s' is not used"),
11521 /* Called from write_object_file. */
11523 ia64_frob_file (void)
11525 hash_traverse (secalias_hash, do_secalias);