1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS = 0,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
92 FUNC_LT_FPTR_RELATIVE,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix *next;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian;
160 /* This is the default endianness. */
161 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
163 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169 static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
172 static struct hash_control *alias_hash;
173 static struct hash_control *alias_name_hash;
174 static struct hash_control *secalias_hash;
175 static struct hash_control *secalias_name_hash;
177 /* Characters which always start a comment. */
178 const char comment_chars[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts = "m:N:x::";
199 struct option md_longopts[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
207 size_t md_longopts_size = sizeof (md_longopts);
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
217 symbolS *regsym[REG_NUM];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
232 keep_pending_output : 1;
234 /* What to do when something is wrong with unwind directives. */
237 unwind_check_warning,
241 /* Each bundle consists of up to three instructions. We keep
242 track of four most recent instructions so we can correctly set
243 the end_of_insn_group for the last instruction in a bundle. */
245 int num_slots_in_use;
249 end_of_insn_group : 1,
250 manual_bundling_on : 1,
251 manual_bundling_off : 1,
252 loc_directive_seen : 1;
253 signed char user_template; /* user-selected template, if any */
254 unsigned char qp_regno; /* qualifying predicate */
255 /* This duplicates a good fraction of "struct fix" but we
256 can't use a "struct fix" instead since we can't call
257 fix_new_exp() until we know the address of the instruction. */
261 bfd_reloc_code_real_type code;
262 enum ia64_opnd opnd; /* type of operand in need of fix */
263 unsigned int is_pcrel : 1; /* is operand pc-relative? */
264 expressionS expr; /* the value to be inserted */
266 fixup[2]; /* at most two fixups per insn */
267 struct ia64_opcode *idesc;
268 struct label_fix *label_fixups;
269 struct label_fix *tag_fixups;
270 struct unw_rec_list *unwind_record; /* Unwind directive. */
273 unsigned int src_line;
274 struct dwarf2_line_info debug_line;
282 struct dynreg *next; /* next dynamic register */
284 unsigned short base; /* the base register number */
285 unsigned short num_regs; /* # of registers in this set */
287 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
289 flagword flags; /* ELF-header flags */
292 unsigned hint:1; /* is this hint currently valid? */
293 bfd_vma offset; /* mem.offset offset */
294 bfd_vma base; /* mem.offset base */
297 int path; /* number of alt. entry points seen */
298 const char **entry_labels; /* labels of all alternate paths in
299 the current DV-checking block. */
300 int maxpaths; /* size currently allocated for
303 int pointer_size; /* size in bytes of a pointer */
304 int pointer_size_shift; /* shift size of a pointer for alignment */
308 /* application registers: */
314 #define AR_BSPSTORE 18
329 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
330 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
331 {"ar.rsc", 16}, {"ar.bsp", 17},
332 {"ar.bspstore", 18}, {"ar.rnat", 19},
333 {"ar.fcr", 21}, {"ar.eflag", 24},
334 {"ar.csd", 25}, {"ar.ssd", 26},
335 {"ar.cflg", 27}, {"ar.fsr", 28},
336 {"ar.fir", 29}, {"ar.fdr", 30},
337 {"ar.ccv", 32}, {"ar.unat", 36},
338 {"ar.fpsr", 40}, {"ar.itc", 44},
339 {"ar.pfs", 64}, {"ar.lc", 65},
360 /* control registers: */
402 static const struct const_desc
409 /* PSR constant masks: */
412 {"psr.be", ((valueT) 1) << 1},
413 {"psr.up", ((valueT) 1) << 2},
414 {"psr.ac", ((valueT) 1) << 3},
415 {"psr.mfl", ((valueT) 1) << 4},
416 {"psr.mfh", ((valueT) 1) << 5},
418 {"psr.ic", ((valueT) 1) << 13},
419 {"psr.i", ((valueT) 1) << 14},
420 {"psr.pk", ((valueT) 1) << 15},
422 {"psr.dt", ((valueT) 1) << 17},
423 {"psr.dfl", ((valueT) 1) << 18},
424 {"psr.dfh", ((valueT) 1) << 19},
425 {"psr.sp", ((valueT) 1) << 20},
426 {"psr.pp", ((valueT) 1) << 21},
427 {"psr.di", ((valueT) 1) << 22},
428 {"psr.si", ((valueT) 1) << 23},
429 {"psr.db", ((valueT) 1) << 24},
430 {"psr.lp", ((valueT) 1) << 25},
431 {"psr.tb", ((valueT) 1) << 26},
432 {"psr.rt", ((valueT) 1) << 27},
433 /* 28-31: reserved */
434 /* 32-33: cpl (current privilege level) */
435 {"psr.is", ((valueT) 1) << 34},
436 {"psr.mc", ((valueT) 1) << 35},
437 {"psr.it", ((valueT) 1) << 36},
438 {"psr.id", ((valueT) 1) << 37},
439 {"psr.da", ((valueT) 1) << 38},
440 {"psr.dd", ((valueT) 1) << 39},
441 {"psr.ss", ((valueT) 1) << 40},
442 /* 41-42: ri (restart instruction) */
443 {"psr.ed", ((valueT) 1) << 43},
444 {"psr.bn", ((valueT) 1) << 44},
447 /* indirect register-sets/memory: */
456 { "CPUID", IND_CPUID },
457 { "cpuid", IND_CPUID },
469 /* Pseudo functions used to indicate relocation types (these functions
470 start with an at sign (@). */
492 /* reloc pseudo functions (these must come first!): */
493 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
494 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
495 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
496 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
497 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
498 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
499 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
500 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
501 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
502 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
505 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
506 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
507 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
508 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
509 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
511 /* mbtype4 constants: */
512 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
513 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
514 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
515 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
516 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
518 /* fclass constants: */
519 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
520 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
521 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
522 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
523 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
524 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
525 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
526 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
527 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
529 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
531 /* hint constants: */
532 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
534 /* unwind-related constants: */
535 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
536 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
537 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
538 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
539 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
540 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
541 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
543 /* unwind-related registers: */
544 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
547 /* 41-bit nop opcodes (one per unit): */
548 static const bfd_vma nop[IA64_NUM_UNITS] =
550 0x0000000000LL, /* NIL => break 0 */
551 0x0008000000LL, /* I-unit nop */
552 0x0008000000LL, /* M-unit nop */
553 0x4000000000LL, /* B-unit nop */
554 0x0008000000LL, /* F-unit nop */
555 0x0008000000LL, /* L-"unit" nop */
556 0x0008000000LL, /* X-unit nop */
559 /* Can't be `const' as it's passed to input routines (which have the
560 habit of setting temporary sentinels. */
561 static char special_section_name[][20] =
563 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
564 {".IA_64.unwind"}, {".IA_64.unwind_info"},
565 {".init_array"}, {".fini_array"}
568 /* The best template for a particular sequence of up to three
570 #define N IA64_NUM_TYPES
571 static unsigned char best_template[N][N][N];
574 /* Resource dependencies currently in effect */
576 int depind; /* dependency index */
577 const struct ia64_dependency *dependency; /* actual dependency */
578 unsigned specific:1, /* is this a specific bit/regno? */
579 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
580 int index; /* specific regno/bit within dependency */
581 int note; /* optional qualifying note (0 if none) */
585 int insn_srlz; /* current insn serialization state */
586 int data_srlz; /* current data serialization state */
587 int qp_regno; /* qualifying predicate for this usage */
588 char *file; /* what file marked this dependency */
589 unsigned int line; /* what line marked this dependency */
590 struct mem_offset mem_offset; /* optional memory offset hint */
591 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
592 int path; /* corresponding code entry index */
594 static int regdepslen = 0;
595 static int regdepstotlen = 0;
596 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
597 static const char *dv_sem[] = { "none", "implied", "impliedf",
598 "data", "instr", "specific", "stop", "other" };
599 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
601 /* Current state of PR mutexation */
602 static struct qpmutex {
605 } *qp_mutexes = NULL; /* QP mutex bitmasks */
606 static int qp_mutexeslen = 0;
607 static int qp_mutexestotlen = 0;
608 static valueT qp_safe_across_calls = 0;
610 /* Current state of PR implications */
611 static struct qp_imply {
614 unsigned p2_branched:1;
616 } *qp_implies = NULL;
617 static int qp_implieslen = 0;
618 static int qp_impliestotlen = 0;
620 /* Keep track of static GR values so that indirect register usage can
621 sometimes be tracked. */
626 } gr_values[128] = {{ 1, 0, 0 }};
628 /* Remember the alignment frag. */
629 static fragS *align_frag;
631 /* These are the routines required to output the various types of
634 /* A slot_number is a frag address plus the slot index (0-2). We use the
635 frag address here so that if there is a section switch in the middle of
636 a function, then instructions emitted to a different section are not
637 counted. Since there may be more than one frag for a function, this
638 means we also need to keep track of which frag this address belongs to
639 so we can compute inter-frag distances. This also nicely solves the
640 problem with nops emitted for align directives, which can't easily be
641 counted, but can easily be derived from frag sizes. */
643 typedef struct unw_rec_list {
645 unsigned long slot_number;
647 unsigned long next_slot_number;
648 fragS *next_slot_frag;
649 struct unw_rec_list *next;
652 #define SLOT_NUM_NOT_SET (unsigned)-1
654 /* Linked list of saved prologue counts. A very poor
655 implementation of a map from label numbers to prologue counts. */
656 typedef struct label_prologue_count
658 struct label_prologue_count *next;
659 unsigned long label_number;
660 unsigned int prologue_count;
661 } label_prologue_count;
665 /* Maintain a list of unwind entries for the current function. */
669 /* Any unwind entires that should be attached to the current slot
670 that an insn is being constructed for. */
671 unw_rec_list *current_entry;
673 /* These are used to create the unwind table entry for this function. */
675 symbolS *info; /* pointer to unwind info */
676 symbolS *personality_routine;
678 subsegT saved_text_subseg;
679 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
681 /* TRUE if processing unwind directives in a prologue region. */
682 unsigned int prologue : 1;
683 unsigned int prologue_mask : 4;
684 unsigned int body : 1;
685 unsigned int insn : 1;
686 unsigned int prologue_count; /* number of .prologues seen so far */
687 /* Prologue counts at previous .label_state directives. */
688 struct label_prologue_count * saved_prologue_counts;
691 /* The input value is a negated offset from psp, and specifies an address
692 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
693 must add 16 and divide by 4 to get the encoded value. */
695 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
697 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
699 /* Forward declarations: */
700 static void set_section PARAMS ((char *name));
701 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
702 unsigned int, unsigned int));
703 static void dot_align (int);
704 static void dot_radix PARAMS ((int));
705 static void dot_special_section PARAMS ((int));
706 static void dot_proc PARAMS ((int));
707 static void dot_fframe PARAMS ((int));
708 static void dot_vframe PARAMS ((int));
709 static void dot_vframesp PARAMS ((int));
710 static void dot_vframepsp PARAMS ((int));
711 static void dot_save PARAMS ((int));
712 static void dot_restore PARAMS ((int));
713 static void dot_restorereg PARAMS ((int));
714 static void dot_restorereg_p PARAMS ((int));
715 static void dot_handlerdata PARAMS ((int));
716 static void dot_unwentry PARAMS ((int));
717 static void dot_altrp PARAMS ((int));
718 static void dot_savemem PARAMS ((int));
719 static void dot_saveg PARAMS ((int));
720 static void dot_savef PARAMS ((int));
721 static void dot_saveb PARAMS ((int));
722 static void dot_savegf PARAMS ((int));
723 static void dot_spill PARAMS ((int));
724 static void dot_spillreg PARAMS ((int));
725 static void dot_spillmem PARAMS ((int));
726 static void dot_spillreg_p PARAMS ((int));
727 static void dot_spillmem_p PARAMS ((int));
728 static void dot_label_state PARAMS ((int));
729 static void dot_copy_state PARAMS ((int));
730 static void dot_unwabi PARAMS ((int));
731 static void dot_personality PARAMS ((int));
732 static void dot_body PARAMS ((int));
733 static void dot_prologue PARAMS ((int));
734 static void dot_endp PARAMS ((int));
735 static void dot_template PARAMS ((int));
736 static void dot_regstk PARAMS ((int));
737 static void dot_rot PARAMS ((int));
738 static void dot_byteorder PARAMS ((int));
739 static void dot_psr PARAMS ((int));
740 static void dot_alias PARAMS ((int));
741 static void dot_ln PARAMS ((int));
742 static char *parse_section_name PARAMS ((void));
743 static void dot_xdata PARAMS ((int));
744 static void stmt_float_cons PARAMS ((int));
745 static void stmt_cons_ua PARAMS ((int));
746 static void dot_xfloat_cons PARAMS ((int));
747 static void dot_xstringer PARAMS ((int));
748 static void dot_xdata_ua PARAMS ((int));
749 static void dot_xfloat_cons_ua PARAMS ((int));
750 static void print_prmask PARAMS ((valueT mask));
751 static void dot_pred_rel PARAMS ((int));
752 static void dot_reg_val PARAMS ((int));
753 static void dot_serialize PARAMS ((int));
754 static void dot_dv_mode PARAMS ((int));
755 static void dot_entry PARAMS ((int));
756 static void dot_mem_offset PARAMS ((int));
757 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
758 static symbolS *declare_register PARAMS ((const char *name, int regnum));
759 static void declare_register_set PARAMS ((const char *, int, int));
760 static unsigned int operand_width PARAMS ((enum ia64_opnd));
761 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
764 static int parse_operand PARAMS ((expressionS *e));
765 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
766 static void build_insn PARAMS ((struct slot *, bfd_vma *));
767 static void emit_one_bundle PARAMS ((void));
768 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
769 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
770 bfd_reloc_code_real_type r_type));
771 static void insn_group_break PARAMS ((int, int, int));
772 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
773 struct rsrc *, int depind, int path));
774 static void add_qp_mutex PARAMS((valueT mask));
775 static void add_qp_imply PARAMS((int p1, int p2));
776 static void clear_qp_branch_flag PARAMS((valueT mask));
777 static void clear_qp_mutex PARAMS((valueT mask));
778 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
779 static int has_suffix_p PARAMS((const char *, const char *));
780 static void clear_register_values PARAMS ((void));
781 static void print_dependency PARAMS ((const char *action, int depind));
782 static void instruction_serialization PARAMS ((void));
783 static void data_serialization PARAMS ((void));
784 static void remove_marked_resource PARAMS ((struct rsrc *));
785 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
786 static int is_taken_branch PARAMS ((struct ia64_opcode *));
787 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
788 static int depends_on PARAMS ((int, struct ia64_opcode *));
789 static int specify_resource PARAMS ((const struct ia64_dependency *,
790 struct ia64_opcode *, int, struct rsrc [], int, int));
791 static int check_dv PARAMS((struct ia64_opcode *idesc));
792 static void check_dependencies PARAMS((struct ia64_opcode *));
793 static void mark_resources PARAMS((struct ia64_opcode *));
794 static void update_dependencies PARAMS((struct ia64_opcode *));
795 static void note_register_values PARAMS((struct ia64_opcode *));
796 static int qp_mutex PARAMS ((int, int, int));
797 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
798 static void output_vbyte_mem PARAMS ((int, char *, char *));
799 static void count_output PARAMS ((int, char *, char *));
800 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
801 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
802 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
803 static void output_P1_format PARAMS ((vbyte_func, int));
804 static void output_P2_format PARAMS ((vbyte_func, int, int));
805 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
806 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
807 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
808 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
809 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
810 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
811 static void output_P9_format PARAMS ((vbyte_func, int, int));
812 static void output_P10_format PARAMS ((vbyte_func, int, int));
813 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
814 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
815 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
817 static char format_ab_reg PARAMS ((int, int));
818 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
820 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
821 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
823 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
824 static unw_rec_list *output_endp PARAMS ((void));
825 static unw_rec_list *output_prologue PARAMS ((void));
826 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list *output_body PARAMS ((void));
828 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
829 static unw_rec_list *output_mem_stack_v PARAMS ((void));
830 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
831 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
832 static unw_rec_list *output_rp_when PARAMS ((void));
833 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
834 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_pfs_when PARAMS ((void));
838 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_preds_when PARAMS ((void));
842 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
846 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
849 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
852 static unw_rec_list *output_unat_when PARAMS ((void));
853 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_lc_when PARAMS ((void));
857 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_fpsr_when PARAMS ((void));
861 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
865 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
866 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_bsp_when PARAMS ((void));
870 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bspstore_when PARAMS ((void));
874 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_rnat_when PARAMS ((void));
878 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
883 static unw_rec_list *output_label_state PARAMS ((unsigned long));
884 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
885 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
896 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
897 static int calc_record_size PARAMS ((unw_rec_list *));
898 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
899 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
900 unsigned long, fragS *,
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
907 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
908 static void free_saved_prologue_counts PARAMS ((void));
910 /* Determine if application register REGNUM resides only in the integer
911 unit (as opposed to the memory unit). */
913 ar_is_only_in_integer_unit (int reg)
916 return reg >= 64 && reg <= 111;
919 /* Determine if application register REGNUM resides only in the memory
920 unit (as opposed to the integer unit). */
922 ar_is_only_in_memory_unit (int reg)
925 return reg >= 0 && reg <= 47;
928 /* Switch to section NAME and create section if necessary. It's
929 rather ugly that we have to manipulate input_line_pointer but I
930 don't see any other way to accomplish the same thing without
931 changing obj-elf.c (which may be the Right Thing, in the end). */
936 char *saved_input_line_pointer;
938 saved_input_line_pointer = input_line_pointer;
939 input_line_pointer = name;
941 input_line_pointer = saved_input_line_pointer;
944 /* Map 's' to SHF_IA_64_SHORT. */
947 ia64_elf_section_letter (letter, ptr_msg)
952 return SHF_IA_64_SHORT;
953 else if (letter == 'o')
954 return SHF_LINK_ORDER;
956 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
960 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
963 ia64_elf_section_flags (flags, attr, type)
965 int attr, type ATTRIBUTE_UNUSED;
967 if (attr & SHF_IA_64_SHORT)
968 flags |= SEC_SMALL_DATA;
973 ia64_elf_section_type (str, len)
977 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
979 if (STREQ (ELF_STRING_ia64_unwind_info))
982 if (STREQ (ELF_STRING_ia64_unwind_info_once))
985 if (STREQ (ELF_STRING_ia64_unwind))
986 return SHT_IA_64_UNWIND;
988 if (STREQ (ELF_STRING_ia64_unwind_once))
989 return SHT_IA_64_UNWIND;
991 if (STREQ ("unwind"))
992 return SHT_IA_64_UNWIND;
999 set_regstack (ins, locs, outs, rots)
1000 unsigned int ins, locs, outs, rots;
1002 /* Size of frame. */
1005 sof = ins + locs + outs;
1008 as_bad ("Size of frame exceeds maximum of 96 registers");
1013 as_warn ("Size of rotating registers exceeds frame size");
1016 md.in.base = REG_GR + 32;
1017 md.loc.base = md.in.base + ins;
1018 md.out.base = md.loc.base + locs;
1020 md.in.num_regs = ins;
1021 md.loc.num_regs = locs;
1022 md.out.num_regs = outs;
1023 md.rot.num_regs = rots;
1030 struct label_fix *lfix;
1032 subsegT saved_subseg;
1035 if (!md.last_text_seg)
1038 saved_seg = now_seg;
1039 saved_subseg = now_subseg;
1041 subseg_set (md.last_text_seg, 0);
1043 while (md.num_slots_in_use > 0)
1044 emit_one_bundle (); /* force out queued instructions */
1046 /* In case there are labels following the last instruction, resolve
1048 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1050 S_SET_VALUE (lfix->sym, frag_now_fix ());
1051 symbol_set_frag (lfix->sym, frag_now);
1053 CURR_SLOT.label_fixups = 0;
1054 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1056 S_SET_VALUE (lfix->sym, frag_now_fix ());
1057 symbol_set_frag (lfix->sym, frag_now);
1059 CURR_SLOT.tag_fixups = 0;
1061 /* In case there are unwind directives following the last instruction,
1062 resolve those now. We only handle prologue, body, and endp directives
1063 here. Give an error for others. */
1064 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1066 switch (ptr->r.type)
1072 ptr->slot_number = (unsigned long) frag_more (0);
1073 ptr->slot_frag = frag_now;
1076 /* Allow any record which doesn't have a "t" field (i.e.,
1077 doesn't relate to a particular instruction). */
1093 as_bad (_("Unwind directive not followed by an instruction."));
1097 unwind.current_entry = NULL;
1099 subseg_set (saved_seg, saved_subseg);
1101 if (md.qp.X_op == O_register)
1102 as_bad ("qualifying predicate not followed by instruction");
1106 ia64_do_align (int nbytes)
1108 char *saved_input_line_pointer = input_line_pointer;
1110 input_line_pointer = "";
1111 s_align_bytes (nbytes);
1112 input_line_pointer = saved_input_line_pointer;
1116 ia64_cons_align (nbytes)
1121 char *saved_input_line_pointer = input_line_pointer;
1122 input_line_pointer = "";
1123 s_align_bytes (nbytes);
1124 input_line_pointer = saved_input_line_pointer;
1128 /* Output COUNT bytes to a memory location. */
1129 static unsigned char *vbyte_mem_ptr = NULL;
1132 output_vbyte_mem (count, ptr, comment)
1135 char *comment ATTRIBUTE_UNUSED;
1138 if (vbyte_mem_ptr == NULL)
1143 for (x = 0; x < count; x++)
1144 *(vbyte_mem_ptr++) = ptr[x];
1147 /* Count the number of bytes required for records. */
1148 static int vbyte_count = 0;
1150 count_output (count, ptr, comment)
1152 char *ptr ATTRIBUTE_UNUSED;
1153 char *comment ATTRIBUTE_UNUSED;
1155 vbyte_count += count;
1159 output_R1_format (f, rtype, rlen)
1161 unw_record_type rtype;
1168 output_R3_format (f, rtype, rlen);
1174 else if (rtype != prologue)
1175 as_bad ("record type is not valid");
1177 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1178 (*f) (1, &byte, NULL);
1182 output_R2_format (f, mask, grsave, rlen)
1189 mask = (mask & 0x0f);
1190 grsave = (grsave & 0x7f);
1192 bytes[0] = (UNW_R2 | (mask >> 1));
1193 bytes[1] = (((mask & 0x01) << 7) | grsave);
1194 count += output_leb128 (bytes + 2, rlen, 0);
1195 (*f) (count, bytes, NULL);
1199 output_R3_format (f, rtype, rlen)
1201 unw_record_type rtype;
1208 output_R1_format (f, rtype, rlen);
1214 else if (rtype != prologue)
1215 as_bad ("record type is not valid");
1216 bytes[0] = (UNW_R3 | r);
1217 count = output_leb128 (bytes + 1, rlen, 0);
1218 (*f) (count + 1, bytes, NULL);
1222 output_P1_format (f, brmask)
1227 byte = UNW_P1 | (brmask & 0x1f);
1228 (*f) (1, &byte, NULL);
1232 output_P2_format (f, brmask, gr)
1238 brmask = (brmask & 0x1f);
1239 bytes[0] = UNW_P2 | (brmask >> 1);
1240 bytes[1] = (((brmask & 1) << 7) | gr);
1241 (*f) (2, bytes, NULL);
1245 output_P3_format (f, rtype, reg)
1247 unw_record_type rtype;
1292 as_bad ("Invalid record type for P3 format.");
1294 bytes[0] = (UNW_P3 | (r >> 1));
1295 bytes[1] = (((r & 1) << 7) | reg);
1296 (*f) (2, bytes, NULL);
1300 output_P4_format (f, imask, imask_size)
1302 unsigned char *imask;
1303 unsigned long imask_size;
1306 (*f) (imask_size, imask, NULL);
1310 output_P5_format (f, grmask, frmask)
1313 unsigned long frmask;
1316 grmask = (grmask & 0x0f);
1319 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1320 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1321 bytes[3] = (frmask & 0x000000ff);
1322 (*f) (4, bytes, NULL);
1326 output_P6_format (f, rtype, rmask)
1328 unw_record_type rtype;
1334 if (rtype == gr_mem)
1336 else if (rtype != fr_mem)
1337 as_bad ("Invalid record type for format P6");
1338 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1339 (*f) (1, &byte, NULL);
1343 output_P7_format (f, rtype, w1, w2)
1345 unw_record_type rtype;
1352 count += output_leb128 (bytes + 1, w1, 0);
1357 count += output_leb128 (bytes + count, w2 >> 4, 0);
1407 bytes[0] = (UNW_P7 | r);
1408 (*f) (count, bytes, NULL);
1412 output_P8_format (f, rtype, t)
1414 unw_record_type rtype;
1453 case bspstore_psprel:
1456 case bspstore_sprel:
1468 case priunat_when_gr:
1471 case priunat_psprel:
1477 case priunat_when_mem:
1484 count += output_leb128 (bytes + 2, t, 0);
1485 (*f) (count, bytes, NULL);
1489 output_P9_format (f, grmask, gr)
1496 bytes[1] = (grmask & 0x0f);
1497 bytes[2] = (gr & 0x7f);
1498 (*f) (3, bytes, NULL);
1502 output_P10_format (f, abi, context)
1509 bytes[1] = (abi & 0xff);
1510 bytes[2] = (context & 0xff);
1511 (*f) (3, bytes, NULL);
1515 output_B1_format (f, rtype, label)
1517 unw_record_type rtype;
1518 unsigned long label;
1524 output_B4_format (f, rtype, label);
1527 if (rtype == copy_state)
1529 else if (rtype != label_state)
1530 as_bad ("Invalid record type for format B1");
1532 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1533 (*f) (1, &byte, NULL);
1537 output_B2_format (f, ecount, t)
1539 unsigned long ecount;
1546 output_B3_format (f, ecount, t);
1549 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1550 count += output_leb128 (bytes + 1, t, 0);
1551 (*f) (count, bytes, NULL);
1555 output_B3_format (f, ecount, t)
1557 unsigned long ecount;
1564 output_B2_format (f, ecount, t);
1568 count += output_leb128 (bytes + 1, t, 0);
1569 count += output_leb128 (bytes + count, ecount, 0);
1570 (*f) (count, bytes, NULL);
1574 output_B4_format (f, rtype, label)
1576 unw_record_type rtype;
1577 unsigned long label;
1584 output_B1_format (f, rtype, label);
1588 if (rtype == copy_state)
1590 else if (rtype != label_state)
1591 as_bad ("Invalid record type for format B1");
1593 bytes[0] = (UNW_B4 | (r << 3));
1594 count += output_leb128 (bytes + 1, label, 0);
1595 (*f) (count, bytes, NULL);
1599 format_ab_reg (ab, reg)
1606 ret = (ab << 5) | reg;
1611 output_X1_format (f, rtype, ab, reg, t, w1)
1613 unw_record_type rtype;
1623 if (rtype == spill_sprel)
1625 else if (rtype != spill_psprel)
1626 as_bad ("Invalid record type for format X1");
1627 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1628 count += output_leb128 (bytes + 2, t, 0);
1629 count += output_leb128 (bytes + count, w1, 0);
1630 (*f) (count, bytes, NULL);
1634 output_X2_format (f, ab, reg, x, y, treg, t)
1643 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1644 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1645 count += output_leb128 (bytes + 3, t, 0);
1646 (*f) (count, bytes, NULL);
1650 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1652 unw_record_type rtype;
1663 if (rtype == spill_sprel_p)
1665 else if (rtype != spill_psprel_p)
1666 as_bad ("Invalid record type for format X3");
1667 bytes[1] = ((r << 7) | (qp & 0x3f));
1668 bytes[2] = format_ab_reg (ab, reg);
1669 count += output_leb128 (bytes + 3, t, 0);
1670 count += output_leb128 (bytes + count, w1, 0);
1671 (*f) (count, bytes, NULL);
1675 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1685 bytes[1] = (qp & 0x3f);
1686 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1687 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1688 count += output_leb128 (bytes + 4, t, 0);
1689 (*f) (count, bytes, NULL);
1692 /* This function allocates a record list structure, and initializes fields. */
1694 static unw_rec_list *
1695 alloc_record (unw_record_type t)
1698 ptr = xmalloc (sizeof (*ptr));
1700 ptr->slot_number = SLOT_NUM_NOT_SET;
1702 ptr->next_slot_number = 0;
1703 ptr->next_slot_frag = 0;
1707 /* Dummy unwind record used for calculating the length of the last prologue or
1710 static unw_rec_list *
1713 unw_rec_list *ptr = alloc_record (endp);
1717 static unw_rec_list *
1720 unw_rec_list *ptr = alloc_record (prologue);
1721 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1725 static unw_rec_list *
1726 output_prologue_gr (saved_mask, reg)
1727 unsigned int saved_mask;
1730 unw_rec_list *ptr = alloc_record (prologue_gr);
1731 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1732 ptr->r.record.r.grmask = saved_mask;
1733 ptr->r.record.r.grsave = reg;
1737 static unw_rec_list *
1740 unw_rec_list *ptr = alloc_record (body);
1744 static unw_rec_list *
1745 output_mem_stack_f (size)
1748 unw_rec_list *ptr = alloc_record (mem_stack_f);
1749 ptr->r.record.p.size = size;
1753 static unw_rec_list *
1754 output_mem_stack_v ()
1756 unw_rec_list *ptr = alloc_record (mem_stack_v);
1760 static unw_rec_list *
1764 unw_rec_list *ptr = alloc_record (psp_gr);
1765 ptr->r.record.p.gr = gr;
1769 static unw_rec_list *
1770 output_psp_sprel (offset)
1771 unsigned int offset;
1773 unw_rec_list *ptr = alloc_record (psp_sprel);
1774 ptr->r.record.p.spoff = offset / 4;
1778 static unw_rec_list *
1781 unw_rec_list *ptr = alloc_record (rp_when);
1785 static unw_rec_list *
1789 unw_rec_list *ptr = alloc_record (rp_gr);
1790 ptr->r.record.p.gr = gr;
1794 static unw_rec_list *
1798 unw_rec_list *ptr = alloc_record (rp_br);
1799 ptr->r.record.p.br = br;
1803 static unw_rec_list *
1804 output_rp_psprel (offset)
1805 unsigned int offset;
1807 unw_rec_list *ptr = alloc_record (rp_psprel);
1808 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1812 static unw_rec_list *
1813 output_rp_sprel (offset)
1814 unsigned int offset;
1816 unw_rec_list *ptr = alloc_record (rp_sprel);
1817 ptr->r.record.p.spoff = offset / 4;
1821 static unw_rec_list *
1824 unw_rec_list *ptr = alloc_record (pfs_when);
1828 static unw_rec_list *
1832 unw_rec_list *ptr = alloc_record (pfs_gr);
1833 ptr->r.record.p.gr = gr;
1837 static unw_rec_list *
1838 output_pfs_psprel (offset)
1839 unsigned int offset;
1841 unw_rec_list *ptr = alloc_record (pfs_psprel);
1842 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1846 static unw_rec_list *
1847 output_pfs_sprel (offset)
1848 unsigned int offset;
1850 unw_rec_list *ptr = alloc_record (pfs_sprel);
1851 ptr->r.record.p.spoff = offset / 4;
1855 static unw_rec_list *
1856 output_preds_when ()
1858 unw_rec_list *ptr = alloc_record (preds_when);
1862 static unw_rec_list *
1863 output_preds_gr (gr)
1866 unw_rec_list *ptr = alloc_record (preds_gr);
1867 ptr->r.record.p.gr = gr;
1871 static unw_rec_list *
1872 output_preds_psprel (offset)
1873 unsigned int offset;
1875 unw_rec_list *ptr = alloc_record (preds_psprel);
1876 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1880 static unw_rec_list *
1881 output_preds_sprel (offset)
1882 unsigned int offset;
1884 unw_rec_list *ptr = alloc_record (preds_sprel);
1885 ptr->r.record.p.spoff = offset / 4;
1889 static unw_rec_list *
1890 output_fr_mem (mask)
1893 unw_rec_list *ptr = alloc_record (fr_mem);
1894 ptr->r.record.p.rmask = mask;
1898 static unw_rec_list *
1899 output_frgr_mem (gr_mask, fr_mask)
1900 unsigned int gr_mask;
1901 unsigned int fr_mask;
1903 unw_rec_list *ptr = alloc_record (frgr_mem);
1904 ptr->r.record.p.grmask = gr_mask;
1905 ptr->r.record.p.frmask = fr_mask;
1909 static unw_rec_list *
1910 output_gr_gr (mask, reg)
1914 unw_rec_list *ptr = alloc_record (gr_gr);
1915 ptr->r.record.p.grmask = mask;
1916 ptr->r.record.p.gr = reg;
1920 static unw_rec_list *
1921 output_gr_mem (mask)
1924 unw_rec_list *ptr = alloc_record (gr_mem);
1925 ptr->r.record.p.rmask = mask;
1929 static unw_rec_list *
1930 output_br_mem (unsigned int mask)
1932 unw_rec_list *ptr = alloc_record (br_mem);
1933 ptr->r.record.p.brmask = mask;
1937 static unw_rec_list *
1938 output_br_gr (save_mask, reg)
1939 unsigned int save_mask;
1942 unw_rec_list *ptr = alloc_record (br_gr);
1943 ptr->r.record.p.brmask = save_mask;
1944 ptr->r.record.p.gr = reg;
1948 static unw_rec_list *
1949 output_spill_base (offset)
1950 unsigned int offset;
1952 unw_rec_list *ptr = alloc_record (spill_base);
1953 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1957 static unw_rec_list *
1960 unw_rec_list *ptr = alloc_record (unat_when);
1964 static unw_rec_list *
1968 unw_rec_list *ptr = alloc_record (unat_gr);
1969 ptr->r.record.p.gr = gr;
1973 static unw_rec_list *
1974 output_unat_psprel (offset)
1975 unsigned int offset;
1977 unw_rec_list *ptr = alloc_record (unat_psprel);
1978 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1982 static unw_rec_list *
1983 output_unat_sprel (offset)
1984 unsigned int offset;
1986 unw_rec_list *ptr = alloc_record (unat_sprel);
1987 ptr->r.record.p.spoff = offset / 4;
1991 static unw_rec_list *
1994 unw_rec_list *ptr = alloc_record (lc_when);
1998 static unw_rec_list *
2002 unw_rec_list *ptr = alloc_record (lc_gr);
2003 ptr->r.record.p.gr = gr;
2007 static unw_rec_list *
2008 output_lc_psprel (offset)
2009 unsigned int offset;
2011 unw_rec_list *ptr = alloc_record (lc_psprel);
2012 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2016 static unw_rec_list *
2017 output_lc_sprel (offset)
2018 unsigned int offset;
2020 unw_rec_list *ptr = alloc_record (lc_sprel);
2021 ptr->r.record.p.spoff = offset / 4;
2025 static unw_rec_list *
2028 unw_rec_list *ptr = alloc_record (fpsr_when);
2032 static unw_rec_list *
2036 unw_rec_list *ptr = alloc_record (fpsr_gr);
2037 ptr->r.record.p.gr = gr;
2041 static unw_rec_list *
2042 output_fpsr_psprel (offset)
2043 unsigned int offset;
2045 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2046 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2050 static unw_rec_list *
2051 output_fpsr_sprel (offset)
2052 unsigned int offset;
2054 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2055 ptr->r.record.p.spoff = offset / 4;
2059 static unw_rec_list *
2060 output_priunat_when_gr ()
2062 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2066 static unw_rec_list *
2067 output_priunat_when_mem ()
2069 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2073 static unw_rec_list *
2074 output_priunat_gr (gr)
2077 unw_rec_list *ptr = alloc_record (priunat_gr);
2078 ptr->r.record.p.gr = gr;
2082 static unw_rec_list *
2083 output_priunat_psprel (offset)
2084 unsigned int offset;
2086 unw_rec_list *ptr = alloc_record (priunat_psprel);
2087 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2091 static unw_rec_list *
2092 output_priunat_sprel (offset)
2093 unsigned int offset;
2095 unw_rec_list *ptr = alloc_record (priunat_sprel);
2096 ptr->r.record.p.spoff = offset / 4;
2100 static unw_rec_list *
2103 unw_rec_list *ptr = alloc_record (bsp_when);
2107 static unw_rec_list *
2111 unw_rec_list *ptr = alloc_record (bsp_gr);
2112 ptr->r.record.p.gr = gr;
2116 static unw_rec_list *
2117 output_bsp_psprel (offset)
2118 unsigned int offset;
2120 unw_rec_list *ptr = alloc_record (bsp_psprel);
2121 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2125 static unw_rec_list *
2126 output_bsp_sprel (offset)
2127 unsigned int offset;
2129 unw_rec_list *ptr = alloc_record (bsp_sprel);
2130 ptr->r.record.p.spoff = offset / 4;
2134 static unw_rec_list *
2135 output_bspstore_when ()
2137 unw_rec_list *ptr = alloc_record (bspstore_when);
2141 static unw_rec_list *
2142 output_bspstore_gr (gr)
2145 unw_rec_list *ptr = alloc_record (bspstore_gr);
2146 ptr->r.record.p.gr = gr;
2150 static unw_rec_list *
2151 output_bspstore_psprel (offset)
2152 unsigned int offset;
2154 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2155 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2159 static unw_rec_list *
2160 output_bspstore_sprel (offset)
2161 unsigned int offset;
2163 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2164 ptr->r.record.p.spoff = offset / 4;
2168 static unw_rec_list *
2171 unw_rec_list *ptr = alloc_record (rnat_when);
2175 static unw_rec_list *
2179 unw_rec_list *ptr = alloc_record (rnat_gr);
2180 ptr->r.record.p.gr = gr;
2184 static unw_rec_list *
2185 output_rnat_psprel (offset)
2186 unsigned int offset;
2188 unw_rec_list *ptr = alloc_record (rnat_psprel);
2189 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2193 static unw_rec_list *
2194 output_rnat_sprel (offset)
2195 unsigned int offset;
2197 unw_rec_list *ptr = alloc_record (rnat_sprel);
2198 ptr->r.record.p.spoff = offset / 4;
2202 static unw_rec_list *
2203 output_unwabi (abi, context)
2205 unsigned long context;
2207 unw_rec_list *ptr = alloc_record (unwabi);
2208 ptr->r.record.p.abi = abi;
2209 ptr->r.record.p.context = context;
2213 static unw_rec_list *
2214 output_epilogue (unsigned long ecount)
2216 unw_rec_list *ptr = alloc_record (epilogue);
2217 ptr->r.record.b.ecount = ecount;
2221 static unw_rec_list *
2222 output_label_state (unsigned long label)
2224 unw_rec_list *ptr = alloc_record (label_state);
2225 ptr->r.record.b.label = label;
2229 static unw_rec_list *
2230 output_copy_state (unsigned long label)
2232 unw_rec_list *ptr = alloc_record (copy_state);
2233 ptr->r.record.b.label = label;
2237 static unw_rec_list *
2238 output_spill_psprel (ab, reg, offset)
2241 unsigned int offset;
2243 unw_rec_list *ptr = alloc_record (spill_psprel);
2244 ptr->r.record.x.ab = ab;
2245 ptr->r.record.x.reg = reg;
2246 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2250 static unw_rec_list *
2251 output_spill_sprel (ab, reg, offset)
2254 unsigned int offset;
2256 unw_rec_list *ptr = alloc_record (spill_sprel);
2257 ptr->r.record.x.ab = ab;
2258 ptr->r.record.x.reg = reg;
2259 ptr->r.record.x.spoff = offset / 4;
2263 static unw_rec_list *
2264 output_spill_psprel_p (ab, reg, offset, predicate)
2267 unsigned int offset;
2268 unsigned int predicate;
2270 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2271 ptr->r.record.x.ab = ab;
2272 ptr->r.record.x.reg = reg;
2273 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2274 ptr->r.record.x.qp = predicate;
2278 static unw_rec_list *
2279 output_spill_sprel_p (ab, reg, offset, predicate)
2282 unsigned int offset;
2283 unsigned int predicate;
2285 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2286 ptr->r.record.x.ab = ab;
2287 ptr->r.record.x.reg = reg;
2288 ptr->r.record.x.spoff = offset / 4;
2289 ptr->r.record.x.qp = predicate;
2293 static unw_rec_list *
2294 output_spill_reg (ab, reg, targ_reg, xy)
2297 unsigned int targ_reg;
2300 unw_rec_list *ptr = alloc_record (spill_reg);
2301 ptr->r.record.x.ab = ab;
2302 ptr->r.record.x.reg = reg;
2303 ptr->r.record.x.treg = targ_reg;
2304 ptr->r.record.x.xy = xy;
2308 static unw_rec_list *
2309 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2312 unsigned int targ_reg;
2314 unsigned int predicate;
2316 unw_rec_list *ptr = alloc_record (spill_reg_p);
2317 ptr->r.record.x.ab = ab;
2318 ptr->r.record.x.reg = reg;
2319 ptr->r.record.x.treg = targ_reg;
2320 ptr->r.record.x.xy = xy;
2321 ptr->r.record.x.qp = predicate;
2325 /* Given a unw_rec_list process the correct format with the
2326 specified function. */
2329 process_one_record (ptr, f)
2333 unsigned long fr_mask, gr_mask;
2335 switch (ptr->r.type)
2337 /* This is a dummy record that takes up no space in the output. */
2345 /* These are taken care of by prologue/prologue_gr. */
2350 if (ptr->r.type == prologue_gr)
2351 output_R2_format (f, ptr->r.record.r.grmask,
2352 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2354 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2356 /* Output descriptor(s) for union of register spills (if any). */
2357 gr_mask = ptr->r.record.r.mask.gr_mem;
2358 fr_mask = ptr->r.record.r.mask.fr_mem;
2361 if ((fr_mask & ~0xfUL) == 0)
2362 output_P6_format (f, fr_mem, fr_mask);
2365 output_P5_format (f, gr_mask, fr_mask);
2370 output_P6_format (f, gr_mem, gr_mask);
2371 if (ptr->r.record.r.mask.br_mem)
2372 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2374 /* output imask descriptor if necessary: */
2375 if (ptr->r.record.r.mask.i)
2376 output_P4_format (f, ptr->r.record.r.mask.i,
2377 ptr->r.record.r.imask_size);
2381 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2385 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2386 ptr->r.record.p.size);
2399 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2402 output_P3_format (f, rp_br, ptr->r.record.p.br);
2405 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2413 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2422 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2432 case bspstore_sprel:
2434 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2437 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2440 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2443 as_bad ("spill_mask record unimplemented.");
2445 case priunat_when_gr:
2446 case priunat_when_mem:
2450 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2452 case priunat_psprel:
2454 case bspstore_psprel:
2456 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2459 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2462 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2466 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2469 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2470 ptr->r.record.x.reg, ptr->r.record.x.t,
2471 ptr->r.record.x.pspoff);
2474 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2475 ptr->r.record.x.reg, ptr->r.record.x.t,
2476 ptr->r.record.x.spoff);
2479 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2480 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2481 ptr->r.record.x.treg, ptr->r.record.x.t);
2483 case spill_psprel_p:
2484 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2485 ptr->r.record.x.ab, ptr->r.record.x.reg,
2486 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2489 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2490 ptr->r.record.x.ab, ptr->r.record.x.reg,
2491 ptr->r.record.x.t, ptr->r.record.x.spoff);
2494 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2495 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2496 ptr->r.record.x.xy, ptr->r.record.x.treg,
2500 as_bad ("record_type_not_valid");
2505 /* Given a unw_rec_list list, process all the records with
2506 the specified function. */
2508 process_unw_records (list, f)
2513 for (ptr = list; ptr; ptr = ptr->next)
2514 process_one_record (ptr, f);
2517 /* Determine the size of a record list in bytes. */
2519 calc_record_size (list)
2523 process_unw_records (list, count_output);
2527 /* Update IMASK bitmask to reflect the fact that one or more registers
2528 of type TYPE are saved starting at instruction with index T. If N
2529 bits are set in REGMASK, it is assumed that instructions T through
2530 T+N-1 save these registers.
2534 1: instruction saves next fp reg
2535 2: instruction saves next general reg
2536 3: instruction saves next branch reg */
2538 set_imask (region, regmask, t, type)
2539 unw_rec_list *region;
2540 unsigned long regmask;
2544 unsigned char *imask;
2545 unsigned long imask_size;
2549 imask = region->r.record.r.mask.i;
2550 imask_size = region->r.record.r.imask_size;
2553 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2554 imask = xmalloc (imask_size);
2555 memset (imask, 0, imask_size);
2557 region->r.record.r.imask_size = imask_size;
2558 region->r.record.r.mask.i = imask;
2562 pos = 2 * (3 - t % 4);
2565 if (i >= imask_size)
2567 as_bad ("Ignoring attempt to spill beyond end of region");
2571 imask[i] |= (type & 0x3) << pos;
2573 regmask &= (regmask - 1);
2583 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2584 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2585 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2589 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2590 unsigned long slot_addr;
2592 unsigned long first_addr;
2596 unsigned long index = 0;
2598 /* First time we are called, the initial address and frag are invalid. */
2599 if (first_addr == 0)
2602 /* If the two addresses are in different frags, then we need to add in
2603 the remaining size of this frag, and then the entire size of intermediate
2605 while (slot_frag != first_frag)
2607 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2611 /* We can get the final addresses only during and after
2613 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2614 index += 3 * ((first_frag->fr_next->fr_address
2615 - first_frag->fr_address
2616 - first_frag->fr_fix) >> 4);
2619 /* We don't know what the final addresses will be. We try our
2620 best to estimate. */
2621 switch (first_frag->fr_type)
2627 as_fatal ("only constant space allocation is supported");
2633 /* Take alignment into account. Assume the worst case
2634 before relaxation. */
2635 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2639 if (first_frag->fr_symbol)
2641 as_fatal ("only constant offsets are supported");
2645 index += 3 * (first_frag->fr_offset >> 4);
2649 /* Add in the full size of the frag converted to instruction slots. */
2650 index += 3 * (first_frag->fr_fix >> 4);
2651 /* Subtract away the initial part before first_addr. */
2652 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2653 + ((first_addr & 0x3) - (start_addr & 0x3)));
2655 /* Move to the beginning of the next frag. */
2656 first_frag = first_frag->fr_next;
2657 first_addr = (unsigned long) &first_frag->fr_literal;
2660 /* Add in the used part of the last frag. */
2661 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2662 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2666 /* Optimize unwind record directives. */
2668 static unw_rec_list *
2669 optimize_unw_records (list)
2675 /* If the only unwind record is ".prologue" or ".prologue" followed
2676 by ".body", then we can optimize the unwind directives away. */
2677 if (list->r.type == prologue
2678 && (list->next->r.type == endp
2679 || (list->next->r.type == body && list->next->next->r.type == endp)))
2685 /* Given a complete record list, process any records which have
2686 unresolved fields, (ie length counts for a prologue). After
2687 this has been run, all necessary information should be available
2688 within each record to generate an image. */
2691 fixup_unw_records (list, before_relax)
2695 unw_rec_list *ptr, *region = 0;
2696 unsigned long first_addr = 0, rlen = 0, t;
2697 fragS *first_frag = 0;
2699 for (ptr = list; ptr; ptr = ptr->next)
2701 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2702 as_bad (" Insn slot not set in unwind record.");
2703 t = slot_index (ptr->slot_number, ptr->slot_frag,
2704 first_addr, first_frag, before_relax);
2705 switch (ptr->r.type)
2713 unsigned long last_addr = 0;
2714 fragS *last_frag = NULL;
2716 first_addr = ptr->slot_number;
2717 first_frag = ptr->slot_frag;
2718 /* Find either the next body/prologue start, or the end of
2719 the function, and determine the size of the region. */
2720 for (last = ptr->next; last != NULL; last = last->next)
2721 if (last->r.type == prologue || last->r.type == prologue_gr
2722 || last->r.type == body || last->r.type == endp)
2724 last_addr = last->slot_number;
2725 last_frag = last->slot_frag;
2728 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2730 rlen = ptr->r.record.r.rlen = size;
2731 if (ptr->r.type == body)
2732 /* End of region. */
2740 ptr->r.record.b.t = rlen - 1 - t;
2742 /* This happens when a memory-stack-less procedure uses a
2743 ".restore sp" directive at the end of a region to pop
2745 ptr->r.record.b.t = 0;
2756 case priunat_when_gr:
2757 case priunat_when_mem:
2761 ptr->r.record.p.t = t;
2769 case spill_psprel_p:
2770 ptr->r.record.x.t = t;
2776 as_bad ("frgr_mem record before region record!");
2779 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2780 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2781 set_imask (region, ptr->r.record.p.frmask, t, 1);
2782 set_imask (region, ptr->r.record.p.grmask, t, 2);
2787 as_bad ("fr_mem record before region record!");
2790 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2791 set_imask (region, ptr->r.record.p.rmask, t, 1);
2796 as_bad ("gr_mem record before region record!");
2799 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2800 set_imask (region, ptr->r.record.p.rmask, t, 2);
2805 as_bad ("br_mem record before region record!");
2808 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2809 set_imask (region, ptr->r.record.p.brmask, t, 3);
2815 as_bad ("gr_gr record before region record!");
2818 set_imask (region, ptr->r.record.p.grmask, t, 2);
2823 as_bad ("br_gr record before region record!");
2826 set_imask (region, ptr->r.record.p.brmask, t, 3);
2835 /* Estimate the size of a frag before relaxing. We only have one type of frag
2836 to handle here, which is the unwind info frag. */
2839 ia64_estimate_size_before_relax (fragS *frag,
2840 asection *segtype ATTRIBUTE_UNUSED)
2845 /* ??? This code is identical to the first part of ia64_convert_frag. */
2846 list = (unw_rec_list *) frag->fr_opcode;
2847 fixup_unw_records (list, 0);
2849 len = calc_record_size (list);
2850 /* pad to pointer-size boundary. */
2851 pad = len % md.pointer_size;
2853 len += md.pointer_size - pad;
2854 /* Add 8 for the header. */
2856 /* Add a pointer for the personality offset. */
2857 if (frag->fr_offset)
2858 size += md.pointer_size;
2860 /* fr_var carries the max_chars that we created the fragment with.
2861 We must, of course, have allocated enough memory earlier. */
2862 assert (frag->fr_var >= size);
2864 return frag->fr_fix + size;
2867 /* This function converts a rs_machine_dependent variant frag into a
2868 normal fill frag with the unwind image from the the record list. */
2870 ia64_convert_frag (fragS *frag)
2876 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2877 list = (unw_rec_list *) frag->fr_opcode;
2878 fixup_unw_records (list, 0);
2880 len = calc_record_size (list);
2881 /* pad to pointer-size boundary. */
2882 pad = len % md.pointer_size;
2884 len += md.pointer_size - pad;
2885 /* Add 8 for the header. */
2887 /* Add a pointer for the personality offset. */
2888 if (frag->fr_offset)
2889 size += md.pointer_size;
2891 /* fr_var carries the max_chars that we created the fragment with.
2892 We must, of course, have allocated enough memory earlier. */
2893 assert (frag->fr_var >= size);
2895 /* Initialize the header area. fr_offset is initialized with
2896 unwind.personality_routine. */
2897 if (frag->fr_offset)
2899 if (md.flags & EF_IA_64_ABI64)
2900 flag_value = (bfd_vma) 3 << 32;
2902 /* 32-bit unwind info block. */
2903 flag_value = (bfd_vma) 0x1003 << 32;
2908 md_number_to_chars (frag->fr_literal,
2909 (((bfd_vma) 1 << 48) /* Version. */
2910 | flag_value /* U & E handler flags. */
2911 | (len / md.pointer_size)), /* Length. */
2914 /* Skip the header. */
2915 vbyte_mem_ptr = frag->fr_literal + 8;
2916 process_unw_records (list, output_vbyte_mem);
2918 /* Fill the padding bytes with zeros. */
2920 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2921 md.pointer_size - pad);
2923 frag->fr_fix += size;
2924 frag->fr_type = rs_fill;
2926 frag->fr_offset = 0;
2930 convert_expr_to_ab_reg (e, ab, regp)
2937 if (e->X_op != O_register)
2940 reg = e->X_add_number;
2941 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2944 *regp = reg - REG_GR;
2946 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2947 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2950 *regp = reg - REG_FR;
2952 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2955 *regp = reg - REG_BR;
2962 case REG_PR: *regp = 0; break;
2963 case REG_PSP: *regp = 1; break;
2964 case REG_PRIUNAT: *regp = 2; break;
2965 case REG_BR + 0: *regp = 3; break;
2966 case REG_AR + AR_BSP: *regp = 4; break;
2967 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2968 case REG_AR + AR_RNAT: *regp = 6; break;
2969 case REG_AR + AR_UNAT: *regp = 7; break;
2970 case REG_AR + AR_FPSR: *regp = 8; break;
2971 case REG_AR + AR_PFS: *regp = 9; break;
2972 case REG_AR + AR_LC: *regp = 10; break;
2982 convert_expr_to_xy_reg (e, xy, regp)
2989 if (e->X_op != O_register)
2992 reg = e->X_add_number;
2994 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2997 *regp = reg - REG_GR;
2999 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3002 *regp = reg - REG_FR;
3004 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3007 *regp = reg - REG_BR;
3017 /* The current frag is an alignment frag. */
3018 align_frag = frag_now;
3019 s_align_bytes (arg);
3024 int dummy ATTRIBUTE_UNUSED;
3029 radix = *input_line_pointer++;
3031 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3033 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3034 ignore_rest_of_line ();
3039 /* Helper function for .loc directives. If the assembler is not generating
3040 line number info, then we need to remember which instructions have a .loc
3041 directive, and only call dwarf2_gen_line_info for those instructions. */
3046 CURR_SLOT.loc_directive_seen = 1;
3047 dwarf2_directive_loc (x);
3050 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3052 dot_special_section (which)
3055 set_section ((char *) special_section_name[which]);
3058 /* Return -1 for warning and 0 for error. */
3061 unwind_diagnostic (const char * region, const char *directive)
3063 if (md.unwind_check == unwind_check_warning)
3065 as_warn (".%s outside of %s", directive, region);
3070 as_bad (".%s outside of %s", directive, region);
3071 ignore_rest_of_line ();
3076 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3077 a procedure but the unwind directive check is set to warning, 0 if
3078 a directive isn't in a procedure and the unwind directive check is set
3082 in_procedure (const char *directive)
3084 if (unwind.proc_start
3085 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3087 return unwind_diagnostic ("procedure", directive);
3090 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3091 a prologue but the unwind directive check is set to warning, 0 if
3092 a directive isn't in a prologue and the unwind directive check is set
3096 in_prologue (const char *directive)
3098 int in = in_procedure (directive);
3101 /* We are in a procedure. Check if we are in a prologue. */
3102 if (unwind.prologue)
3104 /* We only want to issue one message. */
3106 return unwind_diagnostic ("prologue", directive);
3113 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3114 a body but the unwind directive check is set to warning, 0 if
3115 a directive isn't in a body and the unwind directive check is set
3119 in_body (const char *directive)
3121 int in = in_procedure (directive);
3124 /* We are in a procedure. Check if we are in a body. */
3127 /* We only want to issue one message. */
3129 return unwind_diagnostic ("body region", directive);
3137 add_unwind_entry (ptr)
3141 unwind.tail->next = ptr;
3146 /* The current entry can in fact be a chain of unwind entries. */
3147 if (unwind.current_entry == NULL)
3148 unwind.current_entry = ptr;
3153 int dummy ATTRIBUTE_UNUSED;
3157 if (!in_prologue ("fframe"))
3162 if (e.X_op != O_constant)
3163 as_bad ("Operand to .fframe must be a constant");
3165 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3170 int dummy ATTRIBUTE_UNUSED;
3175 if (!in_prologue ("vframe"))
3179 reg = e.X_add_number - REG_GR;
3180 if (e.X_op == O_register && reg < 128)
3182 add_unwind_entry (output_mem_stack_v ());
3183 if (! (unwind.prologue_mask & 2))
3184 add_unwind_entry (output_psp_gr (reg));
3187 as_bad ("First operand to .vframe must be a general register");
3191 dot_vframesp (dummy)
3192 int dummy ATTRIBUTE_UNUSED;
3196 if (!in_prologue ("vframesp"))
3200 if (e.X_op == O_constant)
3202 add_unwind_entry (output_mem_stack_v ());
3203 add_unwind_entry (output_psp_sprel (e.X_add_number));
3206 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3210 dot_vframepsp (dummy)
3211 int dummy ATTRIBUTE_UNUSED;
3215 if (!in_prologue ("vframepsp"))
3219 if (e.X_op == O_constant)
3221 add_unwind_entry (output_mem_stack_v ());
3222 add_unwind_entry (output_psp_sprel (e.X_add_number));
3225 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3230 int dummy ATTRIBUTE_UNUSED;
3236 if (!in_prologue ("save"))
3239 sep = parse_operand (&e1);
3241 as_bad ("No second operand to .save");
3242 sep = parse_operand (&e2);
3244 reg1 = e1.X_add_number;
3245 reg2 = e2.X_add_number - REG_GR;
3247 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3248 if (e1.X_op == O_register)
3250 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3254 case REG_AR + AR_BSP:
3255 add_unwind_entry (output_bsp_when ());
3256 add_unwind_entry (output_bsp_gr (reg2));
3258 case REG_AR + AR_BSPSTORE:
3259 add_unwind_entry (output_bspstore_when ());
3260 add_unwind_entry (output_bspstore_gr (reg2));
3262 case REG_AR + AR_RNAT:
3263 add_unwind_entry (output_rnat_when ());
3264 add_unwind_entry (output_rnat_gr (reg2));
3266 case REG_AR + AR_UNAT:
3267 add_unwind_entry (output_unat_when ());
3268 add_unwind_entry (output_unat_gr (reg2));
3270 case REG_AR + AR_FPSR:
3271 add_unwind_entry (output_fpsr_when ());
3272 add_unwind_entry (output_fpsr_gr (reg2));
3274 case REG_AR + AR_PFS:
3275 add_unwind_entry (output_pfs_when ());
3276 if (! (unwind.prologue_mask & 4))
3277 add_unwind_entry (output_pfs_gr (reg2));
3279 case REG_AR + AR_LC:
3280 add_unwind_entry (output_lc_when ());
3281 add_unwind_entry (output_lc_gr (reg2));
3284 add_unwind_entry (output_rp_when ());
3285 if (! (unwind.prologue_mask & 8))
3286 add_unwind_entry (output_rp_gr (reg2));
3289 add_unwind_entry (output_preds_when ());
3290 if (! (unwind.prologue_mask & 1))
3291 add_unwind_entry (output_preds_gr (reg2));
3294 add_unwind_entry (output_priunat_when_gr ());
3295 add_unwind_entry (output_priunat_gr (reg2));
3298 as_bad ("First operand not a valid register");
3302 as_bad (" Second operand not a valid register");
3305 as_bad ("First operand not a register");
3310 int dummy ATTRIBUTE_UNUSED;
3313 unsigned long ecount; /* # of _additional_ regions to pop */
3316 if (!in_body ("restore"))
3319 sep = parse_operand (&e1);
3320 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3322 as_bad ("First operand to .restore must be stack pointer (sp)");
3328 parse_operand (&e2);
3329 if (e2.X_op != O_constant || e2.X_add_number < 0)
3331 as_bad ("Second operand to .restore must be a constant >= 0");
3334 ecount = e2.X_add_number;
3337 ecount = unwind.prologue_count - 1;
3339 if (ecount >= unwind.prologue_count)
3341 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3342 ecount + 1, unwind.prologue_count);
3346 add_unwind_entry (output_epilogue (ecount));
3348 if (ecount < unwind.prologue_count)
3349 unwind.prologue_count -= ecount + 1;
3351 unwind.prologue_count = 0;
3355 dot_restorereg (dummy)
3356 int dummy ATTRIBUTE_UNUSED;
3358 unsigned int ab, reg;
3361 if (!in_procedure ("restorereg"))
3366 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3368 as_bad ("First operand to .restorereg must be a preserved register");
3371 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3375 dot_restorereg_p (dummy)
3376 int dummy ATTRIBUTE_UNUSED;
3378 unsigned int qp, ab, reg;
3382 if (!in_procedure ("restorereg.p"))
3385 sep = parse_operand (&e1);
3388 as_bad ("No second operand to .restorereg.p");
3392 parse_operand (&e2);
3394 qp = e1.X_add_number - REG_P;
3395 if (e1.X_op != O_register || qp > 63)
3397 as_bad ("First operand to .restorereg.p must be a predicate");
3401 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3403 as_bad ("Second operand to .restorereg.p must be a preserved register");
3406 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3409 static char *special_linkonce_name[] =
3411 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3415 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3418 Use a slightly ugly scheme to derive the unwind section names from
3419 the text section name:
3421 text sect. unwind table sect.
3422 name: name: comments:
3423 ---------- ----------------- --------------------------------
3425 .text.foo .IA_64.unwind.text.foo
3426 .foo .IA_64.unwind.foo
3428 .gnu.linkonce.ia64unw.foo
3429 _info .IA_64.unwind_info gas issues error message (ditto)
3430 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3432 This mapping is done so that:
3434 (a) An object file with unwind info only in .text will use
3435 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3436 This follows the letter of the ABI and also ensures backwards
3437 compatibility with older toolchains.
3439 (b) An object file with unwind info in multiple text sections
3440 will use separate unwind sections for each text section.
3441 This allows us to properly set the "sh_info" and "sh_link"
3442 fields in SHT_IA_64_UNWIND as required by the ABI and also
3443 lets GNU ld support programs with multiple segments
3444 containing unwind info (as might be the case for certain
3445 embedded applications).
3447 (c) An error is issued if there would be a name clash.
3450 const char *text_name, *sec_text_name;
3452 const char *prefix = special_section_name [sec_index];
3454 size_t prefix_len, suffix_len, sec_name_len;
3456 sec_text_name = segment_name (text_seg);
3457 text_name = sec_text_name;
3458 if (strncmp (text_name, "_info", 5) == 0)
3460 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3462 ignore_rest_of_line ();
3465 if (strcmp (text_name, ".text") == 0)
3468 /* Build the unwind section name by appending the (possibly stripped)
3469 text section name to the unwind prefix. */
3471 if (strncmp (text_name, ".gnu.linkonce.t.",
3472 sizeof (".gnu.linkonce.t.") - 1) == 0)
3474 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3475 suffix += sizeof (".gnu.linkonce.t.") - 1;
3477 else if (linkonce_empty)
3480 prefix_len = strlen (prefix);
3481 suffix_len = strlen (suffix);
3482 sec_name_len = prefix_len + suffix_len;
3483 sec_name = alloca (sec_name_len + 1);
3484 memcpy (sec_name, prefix, prefix_len);
3485 memcpy (sec_name + prefix_len, suffix, suffix_len);
3486 sec_name [sec_name_len] = '\0';
3488 /* Handle COMDAT group. */
3489 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3492 size_t len, group_name_len;
3493 const char *group_name = elf_group_name (text_seg);
3495 if (group_name == NULL)
3497 as_bad ("Group section `%s' has no group signature",
3499 ignore_rest_of_line ();
3502 /* We have to construct a fake section directive. */
3503 group_name_len = strlen (group_name);
3505 + 16 /* ,"aG",@progbits, */
3506 + group_name_len /* ,group_name */
3509 section = alloca (len + 1);
3510 memcpy (section, sec_name, sec_name_len);
3511 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3512 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3513 memcpy (section + len - 7, ",comdat", 7);
3514 section [len] = '\0';
3515 set_section (section);
3519 set_section (sec_name);
3520 bfd_set_section_flags (stdoutput, now_seg,
3521 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3524 elf_linked_to_section (now_seg) = text_seg;
3528 generate_unwind_image (const segT text_seg)
3533 /* Mark the end of the unwind info, so that we can compute the size of the
3534 last unwind region. */
3535 add_unwind_entry (output_endp ());
3537 /* Force out pending instructions, to make sure all unwind records have
3538 a valid slot_number field. */
3539 ia64_flush_insns ();
3541 /* Generate the unwind record. */
3542 list = optimize_unw_records (unwind.list);
3543 fixup_unw_records (list, 1);
3544 size = calc_record_size (list);
3546 if (size > 0 || unwind.force_unwind_entry)
3548 unwind.force_unwind_entry = 0;
3549 /* pad to pointer-size boundary. */
3550 pad = size % md.pointer_size;
3552 size += md.pointer_size - pad;
3553 /* Add 8 for the header. */
3555 /* Add a pointer for the personality offset. */
3556 if (unwind.personality_routine)
3557 size += md.pointer_size;
3560 /* If there are unwind records, switch sections, and output the info. */
3564 bfd_reloc_code_real_type reloc;
3566 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3568 /* Make sure the section has 4 byte alignment for ILP32 and
3569 8 byte alignment for LP64. */
3570 frag_align (md.pointer_size_shift, 0, 0);
3571 record_alignment (now_seg, md.pointer_size_shift);
3573 /* Set expression which points to start of unwind descriptor area. */
3574 unwind.info = expr_build_dot ();
3576 frag_var (rs_machine_dependent, size, size, 0, 0,
3577 (offsetT) (long) unwind.personality_routine,
3580 /* Add the personality address to the image. */
3581 if (unwind.personality_routine != 0)
3583 exp.X_op = O_symbol;
3584 exp.X_add_symbol = unwind.personality_routine;
3585 exp.X_add_number = 0;
3587 if (md.flags & EF_IA_64_BE)
3589 if (md.flags & EF_IA_64_ABI64)
3590 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3592 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3596 if (md.flags & EF_IA_64_ABI64)
3597 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3599 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3602 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3603 md.pointer_size, &exp, 0, reloc);
3604 unwind.personality_routine = 0;
3608 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3610 free_saved_prologue_counts ();
3611 unwind.list = unwind.tail = unwind.current_entry = NULL;
3615 dot_handlerdata (dummy)
3616 int dummy ATTRIBUTE_UNUSED;
3618 if (!in_procedure ("handlerdata"))
3620 unwind.force_unwind_entry = 1;
3622 /* Remember which segment we're in so we can switch back after .endp */
3623 unwind.saved_text_seg = now_seg;
3624 unwind.saved_text_subseg = now_subseg;
3626 /* Generate unwind info into unwind-info section and then leave that
3627 section as the currently active one so dataXX directives go into
3628 the language specific data area of the unwind info block. */
3629 generate_unwind_image (now_seg);
3630 demand_empty_rest_of_line ();
3634 dot_unwentry (dummy)
3635 int dummy ATTRIBUTE_UNUSED;
3637 if (!in_procedure ("unwentry"))
3639 unwind.force_unwind_entry = 1;
3640 demand_empty_rest_of_line ();
3645 int dummy ATTRIBUTE_UNUSED;
3650 if (!in_prologue ("altrp"))
3654 reg = e.X_add_number - REG_BR;
3655 if (e.X_op == O_register && reg < 8)
3656 add_unwind_entry (output_rp_br (reg));
3658 as_bad ("First operand not a valid branch register");
3662 dot_savemem (psprel)
3669 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3672 sep = parse_operand (&e1);
3674 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3675 sep = parse_operand (&e2);
3677 reg1 = e1.X_add_number;
3678 val = e2.X_add_number;
3680 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3681 if (e1.X_op == O_register)
3683 if (e2.X_op == O_constant)
3687 case REG_AR + AR_BSP:
3688 add_unwind_entry (output_bsp_when ());
3689 add_unwind_entry ((psprel
3691 : output_bsp_sprel) (val));
3693 case REG_AR + AR_BSPSTORE:
3694 add_unwind_entry (output_bspstore_when ());
3695 add_unwind_entry ((psprel
3696 ? output_bspstore_psprel
3697 : output_bspstore_sprel) (val));
3699 case REG_AR + AR_RNAT:
3700 add_unwind_entry (output_rnat_when ());
3701 add_unwind_entry ((psprel
3702 ? output_rnat_psprel
3703 : output_rnat_sprel) (val));
3705 case REG_AR + AR_UNAT:
3706 add_unwind_entry (output_unat_when ());
3707 add_unwind_entry ((psprel
3708 ? output_unat_psprel
3709 : output_unat_sprel) (val));
3711 case REG_AR + AR_FPSR:
3712 add_unwind_entry (output_fpsr_when ());
3713 add_unwind_entry ((psprel
3714 ? output_fpsr_psprel
3715 : output_fpsr_sprel) (val));
3717 case REG_AR + AR_PFS:
3718 add_unwind_entry (output_pfs_when ());
3719 add_unwind_entry ((psprel
3721 : output_pfs_sprel) (val));
3723 case REG_AR + AR_LC:
3724 add_unwind_entry (output_lc_when ());
3725 add_unwind_entry ((psprel
3727 : output_lc_sprel) (val));
3730 add_unwind_entry (output_rp_when ());
3731 add_unwind_entry ((psprel
3733 : output_rp_sprel) (val));
3736 add_unwind_entry (output_preds_when ());
3737 add_unwind_entry ((psprel
3738 ? output_preds_psprel
3739 : output_preds_sprel) (val));
3742 add_unwind_entry (output_priunat_when_mem ());
3743 add_unwind_entry ((psprel
3744 ? output_priunat_psprel
3745 : output_priunat_sprel) (val));
3748 as_bad ("First operand not a valid register");
3752 as_bad (" Second operand not a valid constant");
3755 as_bad ("First operand not a register");
3760 int dummy ATTRIBUTE_UNUSED;
3765 if (!in_prologue ("save.g"))
3768 sep = parse_operand (&e1);
3770 parse_operand (&e2);
3772 if (e1.X_op != O_constant)
3773 as_bad ("First operand to .save.g must be a constant.");
3776 int grmask = e1.X_add_number;
3778 add_unwind_entry (output_gr_mem (grmask));
3781 int reg = e2.X_add_number - REG_GR;
3782 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3783 add_unwind_entry (output_gr_gr (grmask, reg));
3785 as_bad ("Second operand is an invalid register.");
3792 int dummy ATTRIBUTE_UNUSED;
3797 if (!in_prologue ("save.f"))
3800 sep = parse_operand (&e1);
3802 if (e1.X_op != O_constant)
3803 as_bad ("Operand to .save.f must be a constant.");
3805 add_unwind_entry (output_fr_mem (e1.X_add_number));
3810 int dummy ATTRIBUTE_UNUSED;
3817 if (!in_prologue ("save.b"))
3820 sep = parse_operand (&e1);
3821 if (e1.X_op != O_constant)
3823 as_bad ("First operand to .save.b must be a constant.");
3826 brmask = e1.X_add_number;
3830 sep = parse_operand (&e2);
3831 reg = e2.X_add_number - REG_GR;
3832 if (e2.X_op != O_register || reg > 127)
3834 as_bad ("Second operand to .save.b must be a general register.");
3837 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3840 add_unwind_entry (output_br_mem (brmask));
3842 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3843 demand_empty_rest_of_line ();
3848 int dummy ATTRIBUTE_UNUSED;
3853 if (!in_prologue ("save.gf"))
3856 sep = parse_operand (&e1);
3858 parse_operand (&e2);
3860 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3861 as_bad ("Both operands of .save.gf must be constants.");
3864 int grmask = e1.X_add_number;
3865 int frmask = e2.X_add_number;
3866 add_unwind_entry (output_frgr_mem (grmask, frmask));
3872 int dummy ATTRIBUTE_UNUSED;
3877 if (!in_prologue ("spill"))
3880 sep = parse_operand (&e);
3881 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3882 demand_empty_rest_of_line ();
3884 if (e.X_op != O_constant)
3885 as_bad ("Operand to .spill must be a constant");
3887 add_unwind_entry (output_spill_base (e.X_add_number));
3891 dot_spillreg (dummy)
3892 int dummy ATTRIBUTE_UNUSED;
3894 int sep, ab, xy, reg, treg;
3897 if (!in_procedure ("spillreg"))
3900 sep = parse_operand (&e1);
3903 as_bad ("No second operand to .spillreg");
3907 parse_operand (&e2);
3909 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3911 as_bad ("First operand to .spillreg must be a preserved register");
3915 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3917 as_bad ("Second operand to .spillreg must be a register");
3921 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3925 dot_spillmem (psprel)
3931 if (!in_procedure ("spillmem"))
3934 sep = parse_operand (&e1);
3937 as_bad ("Second operand missing");
3941 parse_operand (&e2);
3943 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3945 as_bad ("First operand to .spill%s must be a preserved register",
3946 psprel ? "psp" : "sp");
3950 if (e2.X_op != O_constant)
3952 as_bad ("Second operand to .spill%s must be a constant",
3953 psprel ? "psp" : "sp");
3958 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3960 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3964 dot_spillreg_p (dummy)
3965 int dummy ATTRIBUTE_UNUSED;
3967 int sep, ab, xy, reg, treg;
3968 expressionS e1, e2, e3;
3971 if (!in_procedure ("spillreg.p"))
3974 sep = parse_operand (&e1);
3977 as_bad ("No second and third operand to .spillreg.p");
3981 sep = parse_operand (&e2);
3984 as_bad ("No third operand to .spillreg.p");
3988 parse_operand (&e3);
3990 qp = e1.X_add_number - REG_P;
3992 if (e1.X_op != O_register || qp > 63)
3994 as_bad ("First operand to .spillreg.p must be a predicate");
3998 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4000 as_bad ("Second operand to .spillreg.p must be a preserved register");
4004 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4006 as_bad ("Third operand to .spillreg.p must be a register");
4010 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4014 dot_spillmem_p (psprel)
4017 expressionS e1, e2, e3;
4021 if (!in_procedure ("spillmem.p"))
4024 sep = parse_operand (&e1);
4027 as_bad ("Second operand missing");
4031 parse_operand (&e2);
4034 as_bad ("Second operand missing");
4038 parse_operand (&e3);
4040 qp = e1.X_add_number - REG_P;
4041 if (e1.X_op != O_register || qp > 63)
4043 as_bad ("First operand to .spill%s_p must be a predicate",
4044 psprel ? "psp" : "sp");
4048 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4050 as_bad ("Second operand to .spill%s_p must be a preserved register",
4051 psprel ? "psp" : "sp");
4055 if (e3.X_op != O_constant)
4057 as_bad ("Third operand to .spill%s_p must be a constant",
4058 psprel ? "psp" : "sp");
4063 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4065 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4069 get_saved_prologue_count (lbl)
4072 label_prologue_count *lpc = unwind.saved_prologue_counts;
4074 while (lpc != NULL && lpc->label_number != lbl)
4078 return lpc->prologue_count;
4080 as_bad ("Missing .label_state %ld", lbl);
4085 save_prologue_count (lbl, count)
4089 label_prologue_count *lpc = unwind.saved_prologue_counts;
4091 while (lpc != NULL && lpc->label_number != lbl)
4095 lpc->prologue_count = count;
4098 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4100 new_lpc->next = unwind.saved_prologue_counts;
4101 new_lpc->label_number = lbl;
4102 new_lpc->prologue_count = count;
4103 unwind.saved_prologue_counts = new_lpc;
4108 free_saved_prologue_counts ()
4110 label_prologue_count *lpc = unwind.saved_prologue_counts;
4111 label_prologue_count *next;
4120 unwind.saved_prologue_counts = NULL;
4124 dot_label_state (dummy)
4125 int dummy ATTRIBUTE_UNUSED;
4129 if (!in_body ("label_state"))
4133 if (e.X_op != O_constant)
4135 as_bad ("Operand to .label_state must be a constant");
4138 add_unwind_entry (output_label_state (e.X_add_number));
4139 save_prologue_count (e.X_add_number, unwind.prologue_count);
4143 dot_copy_state (dummy)
4144 int dummy ATTRIBUTE_UNUSED;
4148 if (!in_body ("copy_state"))
4152 if (e.X_op != O_constant)
4154 as_bad ("Operand to .copy_state must be a constant");
4157 add_unwind_entry (output_copy_state (e.X_add_number));
4158 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4163 int dummy ATTRIBUTE_UNUSED;
4168 if (!in_procedure ("unwabi"))
4171 sep = parse_operand (&e1);
4174 as_bad ("Second operand to .unwabi missing");
4177 sep = parse_operand (&e2);
4178 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4179 demand_empty_rest_of_line ();
4181 if (e1.X_op != O_constant)
4183 as_bad ("First operand to .unwabi must be a constant");
4187 if (e2.X_op != O_constant)
4189 as_bad ("Second operand to .unwabi must be a constant");
4193 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4197 dot_personality (dummy)
4198 int dummy ATTRIBUTE_UNUSED;
4201 if (!in_procedure ("personality"))
4204 name = input_line_pointer;
4205 c = get_symbol_end ();
4206 p = input_line_pointer;
4207 unwind.personality_routine = symbol_find_or_make (name);
4208 unwind.force_unwind_entry = 1;
4211 demand_empty_rest_of_line ();
4216 int dummy ATTRIBUTE_UNUSED;
4221 unwind.proc_start = 0;
4222 /* Parse names of main and alternate entry points and mark them as
4223 function symbols: */
4227 name = input_line_pointer;
4228 c = get_symbol_end ();
4229 p = input_line_pointer;
4231 as_bad ("Empty argument of .proc");
4234 sym = symbol_find_or_make (name);
4235 if (S_IS_DEFINED (sym))
4236 as_bad ("`%s' was already defined", name);
4237 else if (unwind.proc_start == 0)
4239 unwind.proc_start = sym;
4241 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4245 if (*input_line_pointer != ',')
4247 ++input_line_pointer;
4249 if (unwind.proc_start == 0)
4250 unwind.proc_start = expr_build_dot ();
4251 demand_empty_rest_of_line ();
4254 unwind.prologue = 0;
4255 unwind.prologue_count = 0;
4258 unwind.list = unwind.tail = unwind.current_entry = NULL;
4259 unwind.personality_routine = 0;
4264 int dummy ATTRIBUTE_UNUSED;
4266 if (!in_procedure ("body"))
4268 if (!unwind.prologue && !unwind.body && unwind.insn)
4269 as_warn ("Initial .body should precede any instructions");
4271 unwind.prologue = 0;
4272 unwind.prologue_mask = 0;
4275 add_unwind_entry (output_body ());
4276 demand_empty_rest_of_line ();
4280 dot_prologue (dummy)
4281 int dummy ATTRIBUTE_UNUSED;
4284 int mask = 0, grsave = 0;
4286 if (!in_procedure ("prologue"))
4288 if (unwind.prologue)
4290 as_bad (".prologue within prologue");
4291 ignore_rest_of_line ();
4294 if (!unwind.body && unwind.insn)
4295 as_warn ("Initial .prologue should precede any instructions");
4297 if (!is_it_end_of_statement ())
4300 sep = parse_operand (&e1);
4302 as_bad ("No second operand to .prologue");
4303 sep = parse_operand (&e2);
4304 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4305 demand_empty_rest_of_line ();
4307 if (e1.X_op == O_constant)
4309 mask = e1.X_add_number;
4311 if (e2.X_op == O_constant)
4312 grsave = e2.X_add_number;
4313 else if (e2.X_op == O_register
4314 && (grsave = e2.X_add_number - REG_GR) < 128)
4317 as_bad ("Second operand not a constant or general register");
4319 add_unwind_entry (output_prologue_gr (mask, grsave));
4322 as_bad ("First operand not a constant");
4325 add_unwind_entry (output_prologue ());
4327 unwind.prologue = 1;
4328 unwind.prologue_mask = mask;
4330 ++unwind.prologue_count;
4335 int dummy ATTRIBUTE_UNUSED;
4339 int bytes_per_address;
4342 subsegT saved_subseg;
4343 char *name, *default_name, *p, c;
4345 int unwind_check = md.unwind_check;
4347 md.unwind_check = unwind_check_error;
4348 if (!in_procedure ("endp"))
4350 md.unwind_check = unwind_check;
4352 if (unwind.saved_text_seg)
4354 saved_seg = unwind.saved_text_seg;
4355 saved_subseg = unwind.saved_text_subseg;
4356 unwind.saved_text_seg = NULL;
4360 saved_seg = now_seg;
4361 saved_subseg = now_subseg;
4364 insn_group_break (1, 0, 0);
4366 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4368 generate_unwind_image (saved_seg);
4370 if (unwind.info || unwind.force_unwind_entry)
4374 subseg_set (md.last_text_seg, 0);
4375 proc_end = expr_build_dot ();
4377 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4379 /* Make sure that section has 4 byte alignment for ILP32 and
4380 8 byte alignment for LP64. */
4381 record_alignment (now_seg, md.pointer_size_shift);
4383 /* Need space for 3 pointers for procedure start, procedure end,
4385 ptr = frag_more (3 * md.pointer_size);
4386 where = frag_now_fix () - (3 * md.pointer_size);
4387 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4389 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4390 e.X_op = O_pseudo_fixup;
4391 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4393 e.X_add_symbol = unwind.proc_start;
4394 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4396 e.X_op = O_pseudo_fixup;
4397 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4399 e.X_add_symbol = proc_end;
4400 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4401 bytes_per_address, &e);
4405 e.X_op = O_pseudo_fixup;
4406 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4408 e.X_add_symbol = unwind.info;
4409 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4410 bytes_per_address, &e);
4413 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4418 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4420 subseg_set (saved_seg, saved_subseg);
4422 if (unwind.proc_start)
4423 default_name = (char *) S_GET_NAME (unwind.proc_start);
4425 default_name = NULL;
4427 /* Parse names of main and alternate entry points and set symbol sizes. */
4431 name = input_line_pointer;
4432 c = get_symbol_end ();
4433 p = input_line_pointer;
4436 if (md.unwind_check == unwind_check_warning)
4440 as_warn ("Empty argument of .endp. Use the default name `%s'",
4442 name = default_name;
4445 as_warn ("Empty argument of .endp");
4448 as_bad ("Empty argument of .endp");
4452 sym = symbol_find (name);
4454 && md.unwind_check == unwind_check_warning
4456 && default_name != name)
4458 /* We have a bad name. Try the default one if needed. */
4459 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4460 name, default_name);
4461 name = default_name;
4462 sym = symbol_find (name);
4464 if (!sym || !S_IS_DEFINED (sym))
4465 as_bad ("`%s' was not defined within procedure", name);
4466 else if (unwind.proc_start
4467 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4468 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4470 fragS *fr = symbol_get_frag (unwind.proc_start);
4471 fragS *frag = symbol_get_frag (sym);
4473 /* Check whether the function label is at or beyond last
4475 while (fr && fr != frag)
4479 if (frag == frag_now && SEG_NORMAL (now_seg))
4480 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4483 symbol_get_obj (sym)->size =
4484 (expressionS *) xmalloc (sizeof (expressionS));
4485 symbol_get_obj (sym)->size->X_op = O_subtract;
4486 symbol_get_obj (sym)->size->X_add_symbol
4487 = symbol_new (FAKE_LABEL_NAME, now_seg,
4488 frag_now_fix (), frag_now);
4489 symbol_get_obj (sym)->size->X_op_symbol = sym;
4490 symbol_get_obj (sym)->size->X_add_number = 0;
4497 if (*input_line_pointer != ',')
4499 ++input_line_pointer;
4501 demand_empty_rest_of_line ();
4502 unwind.proc_start = unwind.info = 0;
4506 dot_template (template)
4509 CURR_SLOT.user_template = template;
4514 int dummy ATTRIBUTE_UNUSED;
4516 int ins, locs, outs, rots;
4518 if (is_it_end_of_statement ())
4519 ins = locs = outs = rots = 0;
4522 ins = get_absolute_expression ();
4523 if (*input_line_pointer++ != ',')
4525 locs = get_absolute_expression ();
4526 if (*input_line_pointer++ != ',')
4528 outs = get_absolute_expression ();
4529 if (*input_line_pointer++ != ',')
4531 rots = get_absolute_expression ();
4533 set_regstack (ins, locs, outs, rots);
4537 as_bad ("Comma expected");
4538 ignore_rest_of_line ();
4545 unsigned num_regs, num_alloced = 0;
4546 struct dynreg **drpp, *dr;
4547 int ch, base_reg = 0;
4553 case DYNREG_GR: base_reg = REG_GR + 32; break;
4554 case DYNREG_FR: base_reg = REG_FR + 32; break;
4555 case DYNREG_PR: base_reg = REG_P + 16; break;
4559 /* First, remove existing names from hash table. */
4560 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4562 hash_delete (md.dynreg_hash, dr->name);
4566 drpp = &md.dynreg[type];
4569 start = input_line_pointer;
4570 ch = get_symbol_end ();
4571 *input_line_pointer = ch;
4572 len = (input_line_pointer - start);
4575 if (*input_line_pointer != '[')
4577 as_bad ("Expected '['");
4580 ++input_line_pointer; /* skip '[' */
4582 num_regs = get_absolute_expression ();
4584 if (*input_line_pointer++ != ']')
4586 as_bad ("Expected ']'");
4591 num_alloced += num_regs;
4595 if (num_alloced > md.rot.num_regs)
4597 as_bad ("Used more than the declared %d rotating registers",
4603 if (num_alloced > 96)
4605 as_bad ("Used more than the available 96 rotating registers");
4610 if (num_alloced > 48)
4612 as_bad ("Used more than the available 48 rotating registers");
4621 name = obstack_alloc (¬es, len + 1);
4622 memcpy (name, start, len);
4627 *drpp = obstack_alloc (¬es, sizeof (*dr));
4628 memset (*drpp, 0, sizeof (*dr));
4633 dr->num_regs = num_regs;
4634 dr->base = base_reg;
4636 base_reg += num_regs;
4638 if (hash_insert (md.dynreg_hash, name, dr))
4640 as_bad ("Attempt to redefine register set `%s'", name);
4644 if (*input_line_pointer != ',')
4646 ++input_line_pointer; /* skip comma */
4649 demand_empty_rest_of_line ();
4653 ignore_rest_of_line ();
4657 dot_byteorder (byteorder)
4660 segment_info_type *seginfo = seg_info (now_seg);
4662 if (byteorder == -1)
4664 if (seginfo->tc_segment_info_data.endian == 0)
4665 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4666 byteorder = seginfo->tc_segment_info_data.endian == 1;
4669 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4671 if (target_big_endian != byteorder)
4673 target_big_endian = byteorder;
4674 if (target_big_endian)
4676 ia64_number_to_chars = number_to_chars_bigendian;
4677 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4681 ia64_number_to_chars = number_to_chars_littleendian;
4682 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4689 int dummy ATTRIBUTE_UNUSED;
4696 option = input_line_pointer;
4697 ch = get_symbol_end ();
4698 if (strcmp (option, "lsb") == 0)
4699 md.flags &= ~EF_IA_64_BE;
4700 else if (strcmp (option, "msb") == 0)
4701 md.flags |= EF_IA_64_BE;
4702 else if (strcmp (option, "abi32") == 0)
4703 md.flags &= ~EF_IA_64_ABI64;
4704 else if (strcmp (option, "abi64") == 0)
4705 md.flags |= EF_IA_64_ABI64;
4707 as_bad ("Unknown psr option `%s'", option);
4708 *input_line_pointer = ch;
4711 if (*input_line_pointer != ',')
4714 ++input_line_pointer;
4717 demand_empty_rest_of_line ();
4722 int dummy ATTRIBUTE_UNUSED;
4724 new_logical_line (0, get_absolute_expression ());
4725 demand_empty_rest_of_line ();
4729 parse_section_name ()
4735 if (*input_line_pointer == '"')
4736 name = demand_copy_C_string (&len);
4739 char *start = input_line_pointer;
4740 char c = get_symbol_end ();
4742 if (input_line_pointer == start)
4744 as_bad ("Missing section name");
4745 ignore_rest_of_line ();
4748 name = obstack_copy (¬es, start, input_line_pointer - start + 1);
4749 *input_line_pointer = c;
4753 ignore_rest_of_line ();
4757 if (*input_line_pointer != ',')
4759 as_bad ("Comma expected after section name");
4760 ignore_rest_of_line ();
4763 ++input_line_pointer; /* skip comma */
4771 char *name = parse_section_name ();
4775 md.keep_pending_output = 1;
4778 obj_elf_previous (0);
4779 md.keep_pending_output = 0;
4782 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4785 stmt_float_cons (kind)
4806 ia64_do_align (alignment);
4814 int saved_auto_align = md.auto_align;
4818 md.auto_align = saved_auto_align;
4822 dot_xfloat_cons (kind)
4825 char *name = parse_section_name ();
4829 md.keep_pending_output = 1;
4831 stmt_float_cons (kind);
4832 obj_elf_previous (0);
4833 md.keep_pending_output = 0;
4837 dot_xstringer (zero)
4840 char *name = parse_section_name ();
4844 md.keep_pending_output = 1;
4847 obj_elf_previous (0);
4848 md.keep_pending_output = 0;
4855 int saved_auto_align = md.auto_align;
4856 char *name = parse_section_name ();
4860 md.keep_pending_output = 1;
4864 md.auto_align = saved_auto_align;
4865 obj_elf_previous (0);
4866 md.keep_pending_output = 0;
4870 dot_xfloat_cons_ua (kind)
4873 int saved_auto_align = md.auto_align;
4874 char *name = parse_section_name ();
4878 md.keep_pending_output = 1;
4881 stmt_float_cons (kind);
4882 md.auto_align = saved_auto_align;
4883 obj_elf_previous (0);
4884 md.keep_pending_output = 0;
4887 /* .reg.val <regname>,value */
4891 int dummy ATTRIBUTE_UNUSED;
4896 if (reg.X_op != O_register)
4898 as_bad (_("Register name expected"));
4899 ignore_rest_of_line ();
4901 else if (*input_line_pointer++ != ',')
4903 as_bad (_("Comma expected"));
4904 ignore_rest_of_line ();
4908 valueT value = get_absolute_expression ();
4909 int regno = reg.X_add_number;
4910 if (regno < REG_GR || regno > REG_GR + 128)
4911 as_warn (_("Register value annotation ignored"));
4914 gr_values[regno - REG_GR].known = 1;
4915 gr_values[regno - REG_GR].value = value;
4916 gr_values[regno - REG_GR].path = md.path;
4919 demand_empty_rest_of_line ();
4924 .serialize.instruction
4927 dot_serialize (type)
4930 insn_group_break (0, 0, 0);
4932 instruction_serialization ();
4934 data_serialization ();
4935 insn_group_break (0, 0, 0);
4936 demand_empty_rest_of_line ();
4939 /* select dv checking mode
4944 A stop is inserted when changing modes
4951 if (md.manual_bundling)
4952 as_warn (_("Directive invalid within a bundle"));
4954 if (type == 'E' || type == 'A')
4955 md.mode_explicitly_set = 0;
4957 md.mode_explicitly_set = 1;
4964 if (md.explicit_mode)
4965 insn_group_break (1, 0, 0);
4966 md.explicit_mode = 0;
4970 if (!md.explicit_mode)
4971 insn_group_break (1, 0, 0);
4972 md.explicit_mode = 1;
4976 if (md.explicit_mode != md.default_explicit_mode)
4977 insn_group_break (1, 0, 0);
4978 md.explicit_mode = md.default_explicit_mode;
4979 md.mode_explicitly_set = 0;
4990 for (regno = 0; regno < 64; regno++)
4992 if (mask & ((valueT) 1 << regno))
4994 fprintf (stderr, "%s p%d", comma, regno);
5001 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5002 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5003 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5004 .pred.safe_across_calls p1 [, p2 [,...]]
5013 int p1 = -1, p2 = -1;
5017 if (*input_line_pointer == '"')
5020 char *form = demand_copy_C_string (&len);
5022 if (strcmp (form, "mutex") == 0)
5024 else if (strcmp (form, "clear") == 0)
5026 else if (strcmp (form, "imply") == 0)
5028 obstack_free (¬es, form);
5030 else if (*input_line_pointer == '@')
5032 char *form = ++input_line_pointer;
5033 char c = get_symbol_end();
5035 if (strcmp (form, "mutex") == 0)
5037 else if (strcmp (form, "clear") == 0)
5039 else if (strcmp (form, "imply") == 0)
5041 *input_line_pointer = c;
5045 as_bad (_("Missing predicate relation type"));
5046 ignore_rest_of_line ();
5051 as_bad (_("Unrecognized predicate relation type"));
5052 ignore_rest_of_line ();
5055 if (*input_line_pointer == ',')
5056 ++input_line_pointer;
5066 if (TOUPPER (*input_line_pointer) != 'P'
5067 || (regno = atoi (++input_line_pointer)) < 0
5070 as_bad (_("Predicate register expected"));
5071 ignore_rest_of_line ();
5074 while (ISDIGIT (*input_line_pointer))
5075 ++input_line_pointer;
5082 as_warn (_("Duplicate predicate register ignored"));
5085 /* See if it's a range. */
5086 if (*input_line_pointer == '-')
5089 ++input_line_pointer;
5091 if (TOUPPER (*input_line_pointer) != 'P'
5092 || (regno = atoi (++input_line_pointer)) < 0
5095 as_bad (_("Predicate register expected"));
5096 ignore_rest_of_line ();
5099 while (ISDIGIT (*input_line_pointer))
5100 ++input_line_pointer;
5104 as_bad (_("Bad register range"));
5105 ignore_rest_of_line ();
5116 if (*input_line_pointer != ',')
5118 ++input_line_pointer;
5127 clear_qp_mutex (mask);
5128 clear_qp_implies (mask, (valueT) 0);
5131 if (count != 2 || p1 == -1 || p2 == -1)
5132 as_bad (_("Predicate source and target required"));
5133 else if (p1 == 0 || p2 == 0)
5134 as_bad (_("Use of p0 is not valid in this context"));
5136 add_qp_imply (p1, p2);
5141 as_bad (_("At least two PR arguments expected"));
5146 as_bad (_("Use of p0 is not valid in this context"));
5149 add_qp_mutex (mask);
5152 /* note that we don't override any existing relations */
5155 as_bad (_("At least one PR argument expected"));
5160 fprintf (stderr, "Safe across calls: ");
5161 print_prmask (mask);
5162 fprintf (stderr, "\n");
5164 qp_safe_across_calls = mask;
5167 demand_empty_rest_of_line ();
5170 /* .entry label [, label [, ...]]
5171 Hint to DV code that the given labels are to be considered entry points.
5172 Otherwise, only global labels are considered entry points. */
5176 int dummy ATTRIBUTE_UNUSED;
5185 name = input_line_pointer;
5186 c = get_symbol_end ();
5187 symbolP = symbol_find_or_make (name);
5189 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5191 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5194 *input_line_pointer = c;
5196 c = *input_line_pointer;
5199 input_line_pointer++;
5201 if (*input_line_pointer == '\n')
5207 demand_empty_rest_of_line ();
5210 /* .mem.offset offset, base
5211 "base" is used to distinguish between offsets from a different base. */
5214 dot_mem_offset (dummy)
5215 int dummy ATTRIBUTE_UNUSED;
5217 md.mem_offset.hint = 1;
5218 md.mem_offset.offset = get_absolute_expression ();
5219 if (*input_line_pointer != ',')
5221 as_bad (_("Comma expected"));
5222 ignore_rest_of_line ();
5225 ++input_line_pointer;
5226 md.mem_offset.base = get_absolute_expression ();
5227 demand_empty_rest_of_line ();
5230 /* ia64-specific pseudo-ops: */
5231 const pseudo_typeS md_pseudo_table[] =
5233 { "radix", dot_radix, 0 },
5234 { "lcomm", s_lcomm_bytes, 1 },
5235 { "loc", dot_loc, 0 },
5236 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5237 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5238 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5239 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5240 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5241 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5242 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5243 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5244 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5245 { "proc", dot_proc, 0 },
5246 { "body", dot_body, 0 },
5247 { "prologue", dot_prologue, 0 },
5248 { "endp", dot_endp, 0 },
5250 { "fframe", dot_fframe, 0 },
5251 { "vframe", dot_vframe, 0 },
5252 { "vframesp", dot_vframesp, 0 },
5253 { "vframepsp", dot_vframepsp, 0 },
5254 { "save", dot_save, 0 },
5255 { "restore", dot_restore, 0 },
5256 { "restorereg", dot_restorereg, 0 },
5257 { "restorereg.p", dot_restorereg_p, 0 },
5258 { "handlerdata", dot_handlerdata, 0 },
5259 { "unwentry", dot_unwentry, 0 },
5260 { "altrp", dot_altrp, 0 },
5261 { "savesp", dot_savemem, 0 },
5262 { "savepsp", dot_savemem, 1 },
5263 { "save.g", dot_saveg, 0 },
5264 { "save.f", dot_savef, 0 },
5265 { "save.b", dot_saveb, 0 },
5266 { "save.gf", dot_savegf, 0 },
5267 { "spill", dot_spill, 0 },
5268 { "spillreg", dot_spillreg, 0 },
5269 { "spillsp", dot_spillmem, 0 },
5270 { "spillpsp", dot_spillmem, 1 },
5271 { "spillreg.p", dot_spillreg_p, 0 },
5272 { "spillsp.p", dot_spillmem_p, 0 },
5273 { "spillpsp.p", dot_spillmem_p, 1 },
5274 { "label_state", dot_label_state, 0 },
5275 { "copy_state", dot_copy_state, 0 },
5276 { "unwabi", dot_unwabi, 0 },
5277 { "personality", dot_personality, 0 },
5278 { "mii", dot_template, 0x0 },
5279 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5280 { "mlx", dot_template, 0x2 },
5281 { "mmi", dot_template, 0x4 },
5282 { "mfi", dot_template, 0x6 },
5283 { "mmf", dot_template, 0x7 },
5284 { "mib", dot_template, 0x8 },
5285 { "mbb", dot_template, 0x9 },
5286 { "bbb", dot_template, 0xb },
5287 { "mmb", dot_template, 0xc },
5288 { "mfb", dot_template, 0xe },
5289 { "align", dot_align, 0 },
5290 { "regstk", dot_regstk, 0 },
5291 { "rotr", dot_rot, DYNREG_GR },
5292 { "rotf", dot_rot, DYNREG_FR },
5293 { "rotp", dot_rot, DYNREG_PR },
5294 { "lsb", dot_byteorder, 0 },
5295 { "msb", dot_byteorder, 1 },
5296 { "psr", dot_psr, 0 },
5297 { "alias", dot_alias, 0 },
5298 { "secalias", dot_alias, 1 },
5299 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5301 { "xdata1", dot_xdata, 1 },
5302 { "xdata2", dot_xdata, 2 },
5303 { "xdata4", dot_xdata, 4 },
5304 { "xdata8", dot_xdata, 8 },
5305 { "xdata16", dot_xdata, 16 },
5306 { "xreal4", dot_xfloat_cons, 'f' },
5307 { "xreal8", dot_xfloat_cons, 'd' },
5308 { "xreal10", dot_xfloat_cons, 'x' },
5309 { "xreal16", dot_xfloat_cons, 'X' },
5310 { "xstring", dot_xstringer, 0 },
5311 { "xstringz", dot_xstringer, 1 },
5313 /* unaligned versions: */
5314 { "xdata2.ua", dot_xdata_ua, 2 },
5315 { "xdata4.ua", dot_xdata_ua, 4 },
5316 { "xdata8.ua", dot_xdata_ua, 8 },
5317 { "xdata16.ua", dot_xdata_ua, 16 },
5318 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5319 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5320 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5321 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5323 /* annotations/DV checking support */
5324 { "entry", dot_entry, 0 },
5325 { "mem.offset", dot_mem_offset, 0 },
5326 { "pred.rel", dot_pred_rel, 0 },
5327 { "pred.rel.clear", dot_pred_rel, 'c' },
5328 { "pred.rel.imply", dot_pred_rel, 'i' },
5329 { "pred.rel.mutex", dot_pred_rel, 'm' },
5330 { "pred.safe_across_calls", dot_pred_rel, 's' },
5331 { "reg.val", dot_reg_val, 0 },
5332 { "serialize.data", dot_serialize, 0 },
5333 { "serialize.instruction", dot_serialize, 1 },
5334 { "auto", dot_dv_mode, 'a' },
5335 { "explicit", dot_dv_mode, 'e' },
5336 { "default", dot_dv_mode, 'd' },
5338 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5339 IA-64 aligns data allocation pseudo-ops by default, so we have to
5340 tell it that these ones are supposed to be unaligned. Long term,
5341 should rewrite so that only IA-64 specific data allocation pseudo-ops
5342 are aligned by default. */
5343 {"2byte", stmt_cons_ua, 2},
5344 {"4byte", stmt_cons_ua, 4},
5345 {"8byte", stmt_cons_ua, 8},
5350 static const struct pseudo_opcode
5353 void (*handler) (int);
5358 /* these are more like pseudo-ops, but don't start with a dot */
5359 { "data1", cons, 1 },
5360 { "data2", cons, 2 },
5361 { "data4", cons, 4 },
5362 { "data8", cons, 8 },
5363 { "data16", cons, 16 },
5364 { "real4", stmt_float_cons, 'f' },
5365 { "real8", stmt_float_cons, 'd' },
5366 { "real10", stmt_float_cons, 'x' },
5367 { "real16", stmt_float_cons, 'X' },
5368 { "string", stringer, 0 },
5369 { "stringz", stringer, 1 },
5371 /* unaligned versions: */
5372 { "data2.ua", stmt_cons_ua, 2 },
5373 { "data4.ua", stmt_cons_ua, 4 },
5374 { "data8.ua", stmt_cons_ua, 8 },
5375 { "data16.ua", stmt_cons_ua, 16 },
5376 { "real4.ua", float_cons, 'f' },
5377 { "real8.ua", float_cons, 'd' },
5378 { "real10.ua", float_cons, 'x' },
5379 { "real16.ua", float_cons, 'X' },
5382 /* Declare a register by creating a symbol for it and entering it in
5383 the symbol table. */
5386 declare_register (name, regnum)
5393 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5395 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5397 as_fatal ("Inserting \"%s\" into register table failed: %s",
5404 declare_register_set (prefix, num_regs, base_regnum)
5412 for (i = 0; i < num_regs; ++i)
5414 sprintf (name, "%s%u", prefix, i);
5415 declare_register (name, base_regnum + i);
5420 operand_width (opnd)
5421 enum ia64_opnd opnd;
5423 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5424 unsigned int bits = 0;
5428 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5429 bits += odesc->field[i].bits;
5434 static enum operand_match_result
5435 operand_match (idesc, index, e)
5436 const struct ia64_opcode *idesc;
5440 enum ia64_opnd opnd = idesc->operands[index];
5441 int bits, relocatable = 0;
5442 struct insn_fix *fix;
5449 case IA64_OPND_AR_CCV:
5450 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5451 return OPERAND_MATCH;
5454 case IA64_OPND_AR_CSD:
5455 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5456 return OPERAND_MATCH;
5459 case IA64_OPND_AR_PFS:
5460 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5461 return OPERAND_MATCH;
5465 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5466 return OPERAND_MATCH;
5470 if (e->X_op == O_register && e->X_add_number == REG_IP)
5471 return OPERAND_MATCH;
5475 if (e->X_op == O_register && e->X_add_number == REG_PR)
5476 return OPERAND_MATCH;
5479 case IA64_OPND_PR_ROT:
5480 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5481 return OPERAND_MATCH;
5485 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5486 return OPERAND_MATCH;
5489 case IA64_OPND_PSR_L:
5490 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5491 return OPERAND_MATCH;
5494 case IA64_OPND_PSR_UM:
5495 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5496 return OPERAND_MATCH;
5500 if (e->X_op == O_constant)
5502 if (e->X_add_number == 1)
5503 return OPERAND_MATCH;
5505 return OPERAND_OUT_OF_RANGE;
5510 if (e->X_op == O_constant)
5512 if (e->X_add_number == 8)
5513 return OPERAND_MATCH;
5515 return OPERAND_OUT_OF_RANGE;
5520 if (e->X_op == O_constant)
5522 if (e->X_add_number == 16)
5523 return OPERAND_MATCH;
5525 return OPERAND_OUT_OF_RANGE;
5529 /* register operands: */
5532 if (e->X_op == O_register && e->X_add_number >= REG_AR
5533 && e->X_add_number < REG_AR + 128)
5534 return OPERAND_MATCH;
5539 if (e->X_op == O_register && e->X_add_number >= REG_BR
5540 && e->X_add_number < REG_BR + 8)
5541 return OPERAND_MATCH;
5545 if (e->X_op == O_register && e->X_add_number >= REG_CR
5546 && e->X_add_number < REG_CR + 128)
5547 return OPERAND_MATCH;
5554 if (e->X_op == O_register && e->X_add_number >= REG_FR
5555 && e->X_add_number < REG_FR + 128)
5556 return OPERAND_MATCH;
5561 if (e->X_op == O_register && e->X_add_number >= REG_P
5562 && e->X_add_number < REG_P + 64)
5563 return OPERAND_MATCH;
5569 if (e->X_op == O_register && e->X_add_number >= REG_GR
5570 && e->X_add_number < REG_GR + 128)
5571 return OPERAND_MATCH;
5574 case IA64_OPND_R3_2:
5575 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5577 if (e->X_add_number < REG_GR + 4)
5578 return OPERAND_MATCH;
5579 else if (e->X_add_number < REG_GR + 128)
5580 return OPERAND_OUT_OF_RANGE;
5584 /* indirect operands: */
5585 case IA64_OPND_CPUID_R3:
5586 case IA64_OPND_DBR_R3:
5587 case IA64_OPND_DTR_R3:
5588 case IA64_OPND_ITR_R3:
5589 case IA64_OPND_IBR_R3:
5590 case IA64_OPND_MSR_R3:
5591 case IA64_OPND_PKR_R3:
5592 case IA64_OPND_PMC_R3:
5593 case IA64_OPND_PMD_R3:
5594 case IA64_OPND_RR_R3:
5595 if (e->X_op == O_index && e->X_op_symbol
5596 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5597 == opnd - IA64_OPND_CPUID_R3))
5598 return OPERAND_MATCH;
5602 if (e->X_op == O_index && !e->X_op_symbol)
5603 return OPERAND_MATCH;
5606 /* immediate operands: */
5607 case IA64_OPND_CNT2a:
5608 case IA64_OPND_LEN4:
5609 case IA64_OPND_LEN6:
5610 bits = operand_width (idesc->operands[index]);
5611 if (e->X_op == O_constant)
5613 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5614 return OPERAND_MATCH;
5616 return OPERAND_OUT_OF_RANGE;
5620 case IA64_OPND_CNT2b:
5621 if (e->X_op == O_constant)
5623 if ((bfd_vma) (e->X_add_number - 1) < 3)
5624 return OPERAND_MATCH;
5626 return OPERAND_OUT_OF_RANGE;
5630 case IA64_OPND_CNT2c:
5631 val = e->X_add_number;
5632 if (e->X_op == O_constant)
5634 if ((val == 0 || val == 7 || val == 15 || val == 16))
5635 return OPERAND_MATCH;
5637 return OPERAND_OUT_OF_RANGE;
5642 /* SOR must be an integer multiple of 8 */
5643 if (e->X_op == O_constant && e->X_add_number & 0x7)
5644 return OPERAND_OUT_OF_RANGE;
5647 if (e->X_op == O_constant)
5649 if ((bfd_vma) e->X_add_number <= 96)
5650 return OPERAND_MATCH;
5652 return OPERAND_OUT_OF_RANGE;
5656 case IA64_OPND_IMMU62:
5657 if (e->X_op == O_constant)
5659 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5660 return OPERAND_MATCH;
5662 return OPERAND_OUT_OF_RANGE;
5666 /* FIXME -- need 62-bit relocation type */
5667 as_bad (_("62-bit relocation not yet implemented"));
5671 case IA64_OPND_IMMU64:
5672 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5673 || e->X_op == O_subtract)
5675 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5676 fix->code = BFD_RELOC_IA64_IMM64;
5677 if (e->X_op != O_subtract)
5679 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5680 if (e->X_op == O_pseudo_fixup)
5684 fix->opnd = idesc->operands[index];
5687 ++CURR_SLOT.num_fixups;
5688 return OPERAND_MATCH;
5690 else if (e->X_op == O_constant)
5691 return OPERAND_MATCH;
5694 case IA64_OPND_CCNT5:
5695 case IA64_OPND_CNT5:
5696 case IA64_OPND_CNT6:
5697 case IA64_OPND_CPOS6a:
5698 case IA64_OPND_CPOS6b:
5699 case IA64_OPND_CPOS6c:
5700 case IA64_OPND_IMMU2:
5701 case IA64_OPND_IMMU7a:
5702 case IA64_OPND_IMMU7b:
5703 case IA64_OPND_IMMU21:
5704 case IA64_OPND_IMMU24:
5705 case IA64_OPND_MBTYPE4:
5706 case IA64_OPND_MHTYPE8:
5707 case IA64_OPND_POS6:
5708 bits = operand_width (idesc->operands[index]);
5709 if (e->X_op == O_constant)
5711 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5712 return OPERAND_MATCH;
5714 return OPERAND_OUT_OF_RANGE;
5718 case IA64_OPND_IMMU9:
5719 bits = operand_width (idesc->operands[index]);
5720 if (e->X_op == O_constant)
5722 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5724 int lobits = e->X_add_number & 0x3;
5725 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5726 e->X_add_number |= (bfd_vma) 0x3;
5727 return OPERAND_MATCH;
5730 return OPERAND_OUT_OF_RANGE;
5734 case IA64_OPND_IMM44:
5735 /* least 16 bits must be zero */
5736 if ((e->X_add_number & 0xffff) != 0)
5737 /* XXX technically, this is wrong: we should not be issuing warning
5738 messages until we're sure this instruction pattern is going to
5740 as_warn (_("lower 16 bits of mask ignored"));
5742 if (e->X_op == O_constant)
5744 if (((e->X_add_number >= 0
5745 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5746 || (e->X_add_number < 0
5747 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5750 if (e->X_add_number >= 0
5751 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5753 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5755 return OPERAND_MATCH;
5758 return OPERAND_OUT_OF_RANGE;
5762 case IA64_OPND_IMM17:
5763 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5764 if (e->X_op == O_constant)
5766 if (((e->X_add_number >= 0
5767 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5768 || (e->X_add_number < 0
5769 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5772 if (e->X_add_number >= 0
5773 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5775 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5777 return OPERAND_MATCH;
5780 return OPERAND_OUT_OF_RANGE;
5784 case IA64_OPND_IMM14:
5785 case IA64_OPND_IMM22:
5787 case IA64_OPND_IMM1:
5788 case IA64_OPND_IMM8:
5789 case IA64_OPND_IMM8U4:
5790 case IA64_OPND_IMM8M1:
5791 case IA64_OPND_IMM8M1U4:
5792 case IA64_OPND_IMM8M1U8:
5793 case IA64_OPND_IMM9a:
5794 case IA64_OPND_IMM9b:
5795 bits = operand_width (idesc->operands[index]);
5796 if (relocatable && (e->X_op == O_symbol
5797 || e->X_op == O_subtract
5798 || e->X_op == O_pseudo_fixup))
5800 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5802 if (idesc->operands[index] == IA64_OPND_IMM14)
5803 fix->code = BFD_RELOC_IA64_IMM14;
5805 fix->code = BFD_RELOC_IA64_IMM22;
5807 if (e->X_op != O_subtract)
5809 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5810 if (e->X_op == O_pseudo_fixup)
5814 fix->opnd = idesc->operands[index];
5817 ++CURR_SLOT.num_fixups;
5818 return OPERAND_MATCH;
5820 else if (e->X_op != O_constant
5821 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5822 return OPERAND_MISMATCH;
5824 if (opnd == IA64_OPND_IMM8M1U4)
5826 /* Zero is not valid for unsigned compares that take an adjusted
5827 constant immediate range. */
5828 if (e->X_add_number == 0)
5829 return OPERAND_OUT_OF_RANGE;
5831 /* Sign-extend 32-bit unsigned numbers, so that the following range
5832 checks will work. */
5833 val = e->X_add_number;
5834 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5835 && ((val & ((bfd_vma) 1 << 31)) != 0))
5836 val = ((val << 32) >> 32);
5838 /* Check for 0x100000000. This is valid because
5839 0x100000000-1 is the same as ((uint32_t) -1). */
5840 if (val == ((bfd_signed_vma) 1 << 32))
5841 return OPERAND_MATCH;
5845 else if (opnd == IA64_OPND_IMM8M1U8)
5847 /* Zero is not valid for unsigned compares that take an adjusted
5848 constant immediate range. */
5849 if (e->X_add_number == 0)
5850 return OPERAND_OUT_OF_RANGE;
5852 /* Check for 0x10000000000000000. */
5853 if (e->X_op == O_big)
5855 if (generic_bignum[0] == 0
5856 && generic_bignum[1] == 0
5857 && generic_bignum[2] == 0
5858 && generic_bignum[3] == 0
5859 && generic_bignum[4] == 1)
5860 return OPERAND_MATCH;
5862 return OPERAND_OUT_OF_RANGE;
5865 val = e->X_add_number - 1;
5867 else if (opnd == IA64_OPND_IMM8M1)
5868 val = e->X_add_number - 1;
5869 else if (opnd == IA64_OPND_IMM8U4)
5871 /* Sign-extend 32-bit unsigned numbers, so that the following range
5872 checks will work. */
5873 val = e->X_add_number;
5874 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5875 && ((val & ((bfd_vma) 1 << 31)) != 0))
5876 val = ((val << 32) >> 32);
5879 val = e->X_add_number;
5881 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5882 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5883 return OPERAND_MATCH;
5885 return OPERAND_OUT_OF_RANGE;
5887 case IA64_OPND_INC3:
5888 /* +/- 1, 4, 8, 16 */
5889 val = e->X_add_number;
5892 if (e->X_op == O_constant)
5894 if ((val == 1 || val == 4 || val == 8 || val == 16))
5895 return OPERAND_MATCH;
5897 return OPERAND_OUT_OF_RANGE;
5901 case IA64_OPND_TGT25:
5902 case IA64_OPND_TGT25b:
5903 case IA64_OPND_TGT25c:
5904 case IA64_OPND_TGT64:
5905 if (e->X_op == O_symbol)
5907 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5908 if (opnd == IA64_OPND_TGT25)
5909 fix->code = BFD_RELOC_IA64_PCREL21F;
5910 else if (opnd == IA64_OPND_TGT25b)
5911 fix->code = BFD_RELOC_IA64_PCREL21M;
5912 else if (opnd == IA64_OPND_TGT25c)
5913 fix->code = BFD_RELOC_IA64_PCREL21B;
5914 else if (opnd == IA64_OPND_TGT64)
5915 fix->code = BFD_RELOC_IA64_PCREL60B;
5919 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5920 fix->opnd = idesc->operands[index];
5923 ++CURR_SLOT.num_fixups;
5924 return OPERAND_MATCH;
5926 case IA64_OPND_TAG13:
5927 case IA64_OPND_TAG13b:
5931 return OPERAND_MATCH;
5934 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5935 /* There are no external relocs for TAG13/TAG13b fields, so we
5936 create a dummy reloc. This will not live past md_apply_fix3. */
5937 fix->code = BFD_RELOC_UNUSED;
5938 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5939 fix->opnd = idesc->operands[index];
5942 ++CURR_SLOT.num_fixups;
5943 return OPERAND_MATCH;
5950 case IA64_OPND_LDXMOV:
5951 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5952 fix->code = BFD_RELOC_IA64_LDXMOV;
5953 fix->opnd = idesc->operands[index];
5956 ++CURR_SLOT.num_fixups;
5957 return OPERAND_MATCH;
5962 return OPERAND_MISMATCH;
5971 memset (e, 0, sizeof (*e));
5974 if (*input_line_pointer != '}')
5976 sep = *input_line_pointer++;
5980 if (!md.manual_bundling)
5981 as_warn ("Found '}' when manual bundling is off");
5983 CURR_SLOT.manual_bundling_off = 1;
5984 md.manual_bundling = 0;
5990 /* Returns the next entry in the opcode table that matches the one in
5991 IDESC, and frees the entry in IDESC. If no matching entry is
5992 found, NULL is returned instead. */
5994 static struct ia64_opcode *
5995 get_next_opcode (struct ia64_opcode *idesc)
5997 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5998 ia64_free_opcode (idesc);
6002 /* Parse the operands for the opcode and find the opcode variant that
6003 matches the specified operands, or NULL if no match is possible. */
6005 static struct ia64_opcode *
6006 parse_operands (idesc)
6007 struct ia64_opcode *idesc;
6009 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
6010 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
6011 enum ia64_opnd expected_operand = IA64_OPND_NIL;
6012 enum operand_match_result result;
6014 char *first_arg = 0, *end, *saved_input_pointer;
6017 assert (strlen (idesc->name) <= 128);
6019 strcpy (mnemonic, idesc->name);
6020 if (idesc->operands[2] == IA64_OPND_SOF
6021 || idesc->operands[1] == IA64_OPND_SOF)
6023 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6024 can't parse the first operand until we have parsed the
6025 remaining operands of the "alloc" instruction. */
6027 first_arg = input_line_pointer;
6028 end = strchr (input_line_pointer, '=');
6031 as_bad ("Expected separator `='");
6034 input_line_pointer = end + 1;
6041 if (i < NELEMS (CURR_SLOT.opnd))
6043 sep = parse_operand (CURR_SLOT.opnd + i);
6044 if (CURR_SLOT.opnd[i].X_op == O_absent)
6051 sep = parse_operand (&dummy);
6052 if (dummy.X_op == O_absent)
6058 if (sep != '=' && sep != ',')
6063 if (num_outputs > 0)
6064 as_bad ("Duplicate equal sign (=) in instruction");
6066 num_outputs = i + 1;
6071 as_bad ("Illegal operand separator `%c'", sep);
6075 if (idesc->operands[2] == IA64_OPND_SOF
6076 || idesc->operands[1] == IA64_OPND_SOF)
6078 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6079 know (strcmp (idesc->name, "alloc") == 0);
6080 i = (CURR_SLOT.opnd[1].X_op == O_register
6081 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6082 if (num_operands == i + 3 /* first_arg not included in this count! */
6083 && CURR_SLOT.opnd[i].X_op == O_constant
6084 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6085 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6086 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6088 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6089 CURR_SLOT.opnd[i + 1].X_add_number,
6090 CURR_SLOT.opnd[i + 2].X_add_number,
6091 CURR_SLOT.opnd[i + 3].X_add_number);
6093 /* now we can parse the first arg: */
6094 saved_input_pointer = input_line_pointer;
6095 input_line_pointer = first_arg;
6096 sep = parse_operand (CURR_SLOT.opnd + 0);
6098 --num_outputs; /* force error */
6099 input_line_pointer = saved_input_pointer;
6101 CURR_SLOT.opnd[i].X_add_number = sof;
6102 CURR_SLOT.opnd[i + 1].X_add_number
6103 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6104 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6108 highest_unmatched_operand = -4;
6109 curr_out_of_range_pos = -1;
6111 for (; idesc; idesc = get_next_opcode (idesc))
6113 if (num_outputs != idesc->num_outputs)
6114 continue; /* mismatch in # of outputs */
6115 if (highest_unmatched_operand < 0)
6116 highest_unmatched_operand |= 1;
6117 if (num_operands > NELEMS (idesc->operands)
6118 || (num_operands < NELEMS (idesc->operands)
6119 && idesc->operands[num_operands])
6120 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6121 continue; /* mismatch in number of arguments */
6122 if (highest_unmatched_operand < 0)
6123 highest_unmatched_operand |= 2;
6125 CURR_SLOT.num_fixups = 0;
6127 /* Try to match all operands. If we see an out-of-range operand,
6128 then continue trying to match the rest of the operands, since if
6129 the rest match, then this idesc will give the best error message. */
6131 out_of_range_pos = -1;
6132 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6134 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6135 if (result != OPERAND_MATCH)
6137 if (result != OPERAND_OUT_OF_RANGE)
6139 if (out_of_range_pos < 0)
6140 /* remember position of the first out-of-range operand: */
6141 out_of_range_pos = i;
6145 /* If we did not match all operands, or if at least one operand was
6146 out-of-range, then this idesc does not match. Keep track of which
6147 idesc matched the most operands before failing. If we have two
6148 idescs that failed at the same position, and one had an out-of-range
6149 operand, then prefer the out-of-range operand. Thus if we have
6150 "add r0=0x1000000,r1" we get an error saying the constant is out
6151 of range instead of an error saying that the constant should have been
6154 if (i != num_operands || out_of_range_pos >= 0)
6156 if (i > highest_unmatched_operand
6157 || (i == highest_unmatched_operand
6158 && out_of_range_pos > curr_out_of_range_pos))
6160 highest_unmatched_operand = i;
6161 if (out_of_range_pos >= 0)
6163 expected_operand = idesc->operands[out_of_range_pos];
6164 error_pos = out_of_range_pos;
6168 expected_operand = idesc->operands[i];
6171 curr_out_of_range_pos = out_of_range_pos;
6180 if (expected_operand)
6181 as_bad ("Operand %u of `%s' should be %s",
6182 error_pos + 1, mnemonic,
6183 elf64_ia64_operands[expected_operand].desc);
6184 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6185 as_bad ("Wrong number of output operands");
6186 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6187 as_bad ("Wrong number of input operands");
6189 as_bad ("Operand mismatch");
6196 build_insn (slot, insnp)
6200 const struct ia64_operand *odesc, *o2desc;
6201 struct ia64_opcode *idesc = slot->idesc;
6202 bfd_signed_vma insn, val;
6206 insn = idesc->opcode | slot->qp_regno;
6208 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6210 if (slot->opnd[i].X_op == O_register
6211 || slot->opnd[i].X_op == O_constant
6212 || slot->opnd[i].X_op == O_index)
6213 val = slot->opnd[i].X_add_number;
6214 else if (slot->opnd[i].X_op == O_big)
6216 /* This must be the value 0x10000000000000000. */
6217 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6223 switch (idesc->operands[i])
6225 case IA64_OPND_IMMU64:
6226 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6227 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6228 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6229 | (((val >> 63) & 0x1) << 36));
6232 case IA64_OPND_IMMU62:
6233 val &= 0x3fffffffffffffffULL;
6234 if (val != slot->opnd[i].X_add_number)
6235 as_warn (_("Value truncated to 62 bits"));
6236 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6237 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6240 case IA64_OPND_TGT64:
6242 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6243 insn |= ((((val >> 59) & 0x1) << 36)
6244 | (((val >> 0) & 0xfffff) << 13));
6275 case IA64_OPND_R3_2:
6276 case IA64_OPND_CPUID_R3:
6277 case IA64_OPND_DBR_R3:
6278 case IA64_OPND_DTR_R3:
6279 case IA64_OPND_ITR_R3:
6280 case IA64_OPND_IBR_R3:
6282 case IA64_OPND_MSR_R3:
6283 case IA64_OPND_PKR_R3:
6284 case IA64_OPND_PMC_R3:
6285 case IA64_OPND_PMD_R3:
6286 case IA64_OPND_RR_R3:
6294 odesc = elf64_ia64_operands + idesc->operands[i];
6295 err = (*odesc->insert) (odesc, val, &insn);
6297 as_bad_where (slot->src_file, slot->src_line,
6298 "Bad operand value: %s", err);
6299 if (idesc->flags & IA64_OPCODE_PSEUDO)
6301 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6302 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6304 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6305 (*o2desc->insert) (o2desc, val, &insn);
6307 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6308 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6309 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6311 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6312 (*o2desc->insert) (o2desc, 64 - val, &insn);
6322 int manual_bundling_off = 0, manual_bundling = 0;
6323 enum ia64_unit required_unit, insn_unit = 0;
6324 enum ia64_insn_type type[3], insn_type;
6325 unsigned int template, orig_template;
6326 bfd_vma insn[3] = { -1, -1, -1 };
6327 struct ia64_opcode *idesc;
6328 int end_of_insn_group = 0, user_template = -1;
6329 int n, i, j, first, curr;
6330 unw_rec_list *ptr, *last_ptr, *end_ptr;
6331 bfd_vma t0 = 0, t1 = 0;
6332 struct label_fix *lfix;
6333 struct insn_fix *ifix;
6339 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6340 know (first >= 0 & first < NUM_SLOTS);
6341 n = MIN (3, md.num_slots_in_use);
6343 /* Determine template: user user_template if specified, best match
6346 if (md.slot[first].user_template >= 0)
6347 user_template = template = md.slot[first].user_template;
6350 /* Auto select appropriate template. */
6351 memset (type, 0, sizeof (type));
6353 for (i = 0; i < n; ++i)
6355 if (md.slot[curr].label_fixups && i != 0)
6357 type[i] = md.slot[curr].idesc->type;
6358 curr = (curr + 1) % NUM_SLOTS;
6360 template = best_template[type[0]][type[1]][type[2]];
6363 /* initialize instructions with appropriate nops: */
6364 for (i = 0; i < 3; ++i)
6365 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6369 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6370 from the start of the frag. */
6371 addr_mod = frag_now_fix () & 15;
6372 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6373 as_bad (_("instruction address is not a multiple of 16"));
6374 frag_now->insn_addr = addr_mod;
6375 frag_now->has_code = 1;
6377 /* now fill in slots with as many insns as possible: */
6379 idesc = md.slot[curr].idesc;
6380 end_of_insn_group = 0;
6381 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6383 /* If we have unwind records, we may need to update some now. */
6384 ptr = md.slot[curr].unwind_record;
6387 /* Find the last prologue/body record in the list for the current
6388 insn, and set the slot number for all records up to that point.
6389 This needs to be done now, because prologue/body records refer to
6390 the current point, not the point after the instruction has been
6391 issued. This matters because there may have been nops emitted
6392 meanwhile. Any non-prologue non-body record followed by a
6393 prologue/body record must also refer to the current point. */
6395 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6396 for (; ptr != end_ptr; ptr = ptr->next)
6397 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6398 || ptr->r.type == body)
6402 /* Make last_ptr point one after the last prologue/body
6404 last_ptr = last_ptr->next;
6405 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6408 ptr->slot_number = (unsigned long) f + i;
6409 ptr->slot_frag = frag_now;
6411 /* Remove the initialized records, so that we won't accidentally
6412 update them again if we insert a nop and continue. */
6413 md.slot[curr].unwind_record = last_ptr;
6417 manual_bundling_off = md.slot[curr].manual_bundling_off;
6418 if (md.slot[curr].manual_bundling_on)
6421 manual_bundling = 1;
6423 break; /* Need to start a new bundle. */
6426 if (idesc->flags & IA64_OPCODE_SLOT2)
6428 if (manual_bundling && !manual_bundling_off)
6430 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6431 "`%s' must be last in bundle", idesc->name);
6433 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6437 if (idesc->flags & IA64_OPCODE_LAST)
6440 unsigned int required_template;
6442 /* If we need a stop bit after an M slot, our only choice is
6443 template 5 (M;;MI). If we need a stop bit after a B
6444 slot, our only choice is to place it at the end of the
6445 bundle, because the only available templates are MIB,
6446 MBB, BBB, MMB, and MFB. We don't handle anything other
6447 than M and B slots because these are the only kind of
6448 instructions that can have the IA64_OPCODE_LAST bit set. */
6449 required_template = template;
6450 switch (idesc->type)
6454 required_template = 5;
6462 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6463 "Internal error: don't know how to force %s to end"
6464 "of instruction group", idesc->name);
6469 && (i > required_slot
6470 || (required_slot == 2 && !manual_bundling_off)
6471 || (user_template >= 0
6472 /* Changing from MMI to M;MI is OK. */
6473 && (template ^ required_template) > 1)))
6475 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6476 "`%s' must be last in instruction group",
6478 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6479 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6481 if (required_slot < i)
6482 /* Can't fit this instruction. */
6486 if (required_template != template)
6488 /* If we switch the template, we need to reset the NOPs
6489 after slot i. The slot-types of the instructions ahead
6490 of i never change, so we don't need to worry about
6491 changing NOPs in front of this slot. */
6492 for (j = i; j < 3; ++j)
6493 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6495 template = required_template;
6497 if (curr != first && md.slot[curr].label_fixups)
6499 if (manual_bundling)
6501 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6502 "Label must be first in a bundle");
6503 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6505 /* This insn must go into the first slot of a bundle. */
6509 if (end_of_insn_group && md.num_slots_in_use >= 1)
6511 /* We need an instruction group boundary in the middle of a
6512 bundle. See if we can switch to an other template with
6513 an appropriate boundary. */
6515 orig_template = template;
6516 if (i == 1 && (user_template == 4
6517 || (user_template < 0
6518 && (ia64_templ_desc[template].exec_unit[0]
6522 end_of_insn_group = 0;
6524 else if (i == 2 && (user_template == 0
6525 || (user_template < 0
6526 && (ia64_templ_desc[template].exec_unit[1]
6528 /* This test makes sure we don't switch the template if
6529 the next instruction is one that needs to be first in
6530 an instruction group. Since all those instructions are
6531 in the M group, there is no way such an instruction can
6532 fit in this bundle even if we switch the template. The
6533 reason we have to check for this is that otherwise we
6534 may end up generating "MI;;I M.." which has the deadly
6535 effect that the second M instruction is no longer the
6536 first in the group! --davidm 99/12/16 */
6537 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6540 end_of_insn_group = 0;
6543 && user_template == 0
6544 && !(idesc->flags & IA64_OPCODE_FIRST))
6545 /* Use the next slot. */
6547 else if (curr != first)
6548 /* can't fit this insn */
6551 if (template != orig_template)
6552 /* if we switch the template, we need to reset the NOPs
6553 after slot i. The slot-types of the instructions ahead
6554 of i never change, so we don't need to worry about
6555 changing NOPs in front of this slot. */
6556 for (j = i; j < 3; ++j)
6557 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6559 required_unit = ia64_templ_desc[template].exec_unit[i];
6561 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6562 if (idesc->type == IA64_TYPE_DYN)
6564 enum ia64_opnd opnd1, opnd2;
6566 if ((strcmp (idesc->name, "nop") == 0)
6567 || (strcmp (idesc->name, "hint") == 0)
6568 || (strcmp (idesc->name, "break") == 0))
6569 insn_unit = required_unit;
6570 else if (strcmp (idesc->name, "chk.s") == 0
6571 || strcmp (idesc->name, "mov") == 0)
6573 insn_unit = IA64_UNIT_M;
6574 if (required_unit == IA64_UNIT_I
6575 || (required_unit == IA64_UNIT_F && template == 6))
6576 insn_unit = IA64_UNIT_I;
6579 as_fatal ("emit_one_bundle: unexpected dynamic op");
6581 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6582 opnd1 = idesc->operands[0];
6583 opnd2 = idesc->operands[1];
6584 ia64_free_opcode (idesc);
6585 idesc = ia64_find_opcode (mnemonic);
6586 /* moves to/from ARs have collisions */
6587 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6589 while (idesc != NULL
6590 && (idesc->operands[0] != opnd1
6591 || idesc->operands[1] != opnd2))
6592 idesc = get_next_opcode (idesc);
6594 md.slot[curr].idesc = idesc;
6598 insn_type = idesc->type;
6599 insn_unit = IA64_UNIT_NIL;
6603 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6604 insn_unit = required_unit;
6606 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6607 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6608 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6609 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6610 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6615 if (insn_unit != required_unit)
6617 if (required_unit == IA64_UNIT_L
6618 && insn_unit == IA64_UNIT_I
6619 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6621 /* we got ourselves an MLX template but the current
6622 instruction isn't an X-unit, or an I-unit instruction
6623 that can go into the X slot of an MLX template. Duh. */
6624 if (md.num_slots_in_use >= NUM_SLOTS)
6626 as_bad_where (md.slot[curr].src_file,
6627 md.slot[curr].src_line,
6628 "`%s' can't go in X slot of "
6629 "MLX template", idesc->name);
6630 /* drop this insn so we don't livelock: */
6631 --md.num_slots_in_use;
6635 continue; /* try next slot */
6638 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6640 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6642 md.slot[curr].loc_directive_seen = 0;
6643 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6646 build_insn (md.slot + curr, insn + i);
6648 ptr = md.slot[curr].unwind_record;
6651 /* Set slot numbers for all remaining unwind records belonging to the
6652 current insn. There can not be any prologue/body unwind records
6654 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6655 for (; ptr != end_ptr; ptr = ptr->next)
6657 ptr->slot_number = (unsigned long) f + i;
6658 ptr->slot_frag = frag_now;
6660 md.slot[curr].unwind_record = NULL;
6663 if (required_unit == IA64_UNIT_L)
6666 /* skip one slot for long/X-unit instructions */
6669 --md.num_slots_in_use;
6671 /* now is a good time to fix up the labels for this insn: */
6672 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6674 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6675 symbol_set_frag (lfix->sym, frag_now);
6677 /* and fix up the tags also. */
6678 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6680 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6681 symbol_set_frag (lfix->sym, frag_now);
6684 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6686 ifix = md.slot[curr].fixup + j;
6687 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6688 &ifix->expr, ifix->is_pcrel, ifix->code);
6689 fix->tc_fix_data.opnd = ifix->opnd;
6690 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6691 fix->fx_file = md.slot[curr].src_file;
6692 fix->fx_line = md.slot[curr].src_line;
6695 end_of_insn_group = md.slot[curr].end_of_insn_group;
6698 ia64_free_opcode (md.slot[curr].idesc);
6699 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6700 md.slot[curr].user_template = -1;
6702 if (manual_bundling_off)
6704 manual_bundling = 0;
6707 curr = (curr + 1) % NUM_SLOTS;
6708 idesc = md.slot[curr].idesc;
6710 if (manual_bundling > 0)
6712 if (md.num_slots_in_use > 0)
6714 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6715 "`%s' does not fit into %s template",
6716 idesc->name, ia64_templ_desc[template].name);
6717 --md.num_slots_in_use;
6720 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6721 "Missing '}' at end of file");
6723 know (md.num_slots_in_use < NUM_SLOTS);
6725 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6726 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6728 number_to_chars_littleendian (f + 0, t0, 8);
6729 number_to_chars_littleendian (f + 8, t1, 8);
6733 unwind.list->next_slot_number = (unsigned long) f + 16;
6734 unwind.list->next_slot_frag = frag_now;
6739 md_parse_option (c, arg)
6746 /* Switches from the Intel assembler. */
6748 if (strcmp (arg, "ilp64") == 0
6749 || strcmp (arg, "lp64") == 0
6750 || strcmp (arg, "p64") == 0)
6752 md.flags |= EF_IA_64_ABI64;
6754 else if (strcmp (arg, "ilp32") == 0)
6756 md.flags &= ~EF_IA_64_ABI64;
6758 else if (strcmp (arg, "le") == 0)
6760 md.flags &= ~EF_IA_64_BE;
6761 default_big_endian = 0;
6763 else if (strcmp (arg, "be") == 0)
6765 md.flags |= EF_IA_64_BE;
6766 default_big_endian = 1;
6768 else if (strncmp (arg, "unwind-check=", 13) == 0)
6771 if (strcmp (arg, "warning") == 0)
6772 md.unwind_check = unwind_check_warning;
6773 else if (strcmp (arg, "error") == 0)
6774 md.unwind_check = unwind_check_error;
6783 if (strcmp (arg, "so") == 0)
6785 /* Suppress signon message. */
6787 else if (strcmp (arg, "pi") == 0)
6789 /* Reject privileged instructions. FIXME */
6791 else if (strcmp (arg, "us") == 0)
6793 /* Allow union of signed and unsigned range. FIXME */
6795 else if (strcmp (arg, "close_fcalls") == 0)
6797 /* Do not resolve global function calls. */
6804 /* temp[="prefix"] Insert temporary labels into the object file
6805 symbol table prefixed by "prefix".
6806 Default prefix is ":temp:".
6811 /* indirect=<tgt> Assume unannotated indirect branches behavior
6812 according to <tgt> --
6813 exit: branch out from the current context (default)
6814 labels: all labels in context may be branch targets
6816 if (strncmp (arg, "indirect=", 9) != 0)
6821 /* -X conflicts with an ignored option, use -x instead */
6823 if (!arg || strcmp (arg, "explicit") == 0)
6825 /* set default mode to explicit */
6826 md.default_explicit_mode = 1;
6829 else if (strcmp (arg, "auto") == 0)
6831 md.default_explicit_mode = 0;
6833 else if (strcmp (arg, "debug") == 0)
6837 else if (strcmp (arg, "debugx") == 0)
6839 md.default_explicit_mode = 1;
6844 as_bad (_("Unrecognized option '-x%s'"), arg);
6849 /* nops Print nops statistics. */
6852 /* GNU specific switches for gcc. */
6853 case OPTION_MCONSTANT_GP:
6854 md.flags |= EF_IA_64_CONS_GP;
6857 case OPTION_MAUTO_PIC:
6858 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6869 md_show_usage (stream)
6874 --mconstant-gp mark output file as using the constant-GP model\n\
6875 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6876 --mauto-pic mark output file as using the constant-GP model\n\
6877 without function descriptors (sets ELF header flag\n\
6878 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6879 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6880 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6881 -munwind-check=[warning|error]\n\
6882 unwind directive check (default -munwind-check=warning)\n\
6883 -x | -xexplicit turn on dependency violation checking (default)\n\
6884 -xauto automagically remove dependency violations\n\
6885 -xdebug debug dependency violation checker\n"),
6890 ia64_after_parse_args ()
6892 if (debug_type == DEBUG_STABS)
6893 as_fatal (_("--gstabs is not supported for ia64"));
6896 /* Return true if TYPE fits in TEMPL at SLOT. */
6899 match (int templ, int type, int slot)
6901 enum ia64_unit unit;
6904 unit = ia64_templ_desc[templ].exec_unit[slot];
6907 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6909 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6911 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6912 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6913 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6914 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6915 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6916 default: result = 0; break;
6921 /* Add a bit of extra goodness if a nop of type F or B would fit
6922 in TEMPL at SLOT. */
6925 extra_goodness (int templ, int slot)
6927 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6929 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6934 /* This function is called once, at assembler startup time. It sets
6935 up all the tables, etc. that the MD part of the assembler will need
6936 that can be determined before arguments are parsed. */
6940 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6945 md.explicit_mode = md.default_explicit_mode;
6947 bfd_set_section_alignment (stdoutput, text_section, 4);
6949 /* Make sure function pointers get initialized. */
6950 target_big_endian = -1;
6951 dot_byteorder (default_big_endian);
6953 alias_hash = hash_new ();
6954 alias_name_hash = hash_new ();
6955 secalias_hash = hash_new ();
6956 secalias_name_hash = hash_new ();
6958 pseudo_func[FUNC_DTP_MODULE].u.sym =
6959 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6960 &zero_address_frag);
6962 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6963 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6964 &zero_address_frag);
6966 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6967 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6968 &zero_address_frag);
6970 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6971 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6972 &zero_address_frag);
6974 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6975 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6976 &zero_address_frag);
6978 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6979 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6980 &zero_address_frag);
6982 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6983 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6984 &zero_address_frag);
6986 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6987 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6988 &zero_address_frag);
6990 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6991 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6992 &zero_address_frag);
6994 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6995 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6996 &zero_address_frag);
6998 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6999 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7000 &zero_address_frag);
7002 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7003 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7004 &zero_address_frag);
7006 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7007 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7008 &zero_address_frag);
7010 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7011 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7012 &zero_address_frag);
7014 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7015 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7016 &zero_address_frag);
7018 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7019 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7020 &zero_address_frag);
7022 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7023 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7024 &zero_address_frag);
7026 /* Compute the table of best templates. We compute goodness as a
7027 base 4 value, in which each match counts for 3, each F counts
7028 for 2, each B counts for 1. This should maximize the number of
7029 F and B nops in the chosen bundles, which is good because these
7030 pipelines are least likely to be overcommitted. */
7031 for (i = 0; i < IA64_NUM_TYPES; ++i)
7032 for (j = 0; j < IA64_NUM_TYPES; ++j)
7033 for (k = 0; k < IA64_NUM_TYPES; ++k)
7036 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7039 if (match (t, i, 0))
7041 if (match (t, j, 1))
7043 if (match (t, k, 2))
7044 goodness = 3 + 3 + 3;
7046 goodness = 3 + 3 + extra_goodness (t, 2);
7048 else if (match (t, j, 2))
7049 goodness = 3 + 3 + extra_goodness (t, 1);
7053 goodness += extra_goodness (t, 1);
7054 goodness += extra_goodness (t, 2);
7057 else if (match (t, i, 1))
7059 if (match (t, j, 2))
7062 goodness = 3 + extra_goodness (t, 2);
7064 else if (match (t, i, 2))
7065 goodness = 3 + extra_goodness (t, 1);
7067 if (goodness > best)
7070 best_template[i][j][k] = t;
7075 for (i = 0; i < NUM_SLOTS; ++i)
7076 md.slot[i].user_template = -1;
7078 md.pseudo_hash = hash_new ();
7079 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7081 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7082 (void *) (pseudo_opcode + i));
7084 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7085 pseudo_opcode[i].name, err);
7088 md.reg_hash = hash_new ();
7089 md.dynreg_hash = hash_new ();
7090 md.const_hash = hash_new ();
7091 md.entry_hash = hash_new ();
7093 /* general registers: */
7096 for (i = 0; i < total; ++i)
7098 sprintf (name, "r%d", i - REG_GR);
7099 md.regsym[i] = declare_register (name, i);
7102 /* floating point registers: */
7104 for (; i < total; ++i)
7106 sprintf (name, "f%d", i - REG_FR);
7107 md.regsym[i] = declare_register (name, i);
7110 /* application registers: */
7113 for (; i < total; ++i)
7115 sprintf (name, "ar%d", i - REG_AR);
7116 md.regsym[i] = declare_register (name, i);
7119 /* control registers: */
7122 for (; i < total; ++i)
7124 sprintf (name, "cr%d", i - REG_CR);
7125 md.regsym[i] = declare_register (name, i);
7128 /* predicate registers: */
7130 for (; i < total; ++i)
7132 sprintf (name, "p%d", i - REG_P);
7133 md.regsym[i] = declare_register (name, i);
7136 /* branch registers: */
7138 for (; i < total; ++i)
7140 sprintf (name, "b%d", i - REG_BR);
7141 md.regsym[i] = declare_register (name, i);
7144 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7145 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7146 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7147 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7148 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7149 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7150 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7152 for (i = 0; i < NELEMS (indirect_reg); ++i)
7154 regnum = indirect_reg[i].regnum;
7155 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7158 /* define synonyms for application registers: */
7159 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7160 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7161 REG_AR + ar[i - REG_AR].regnum);
7163 /* define synonyms for control registers: */
7164 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7165 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7166 REG_CR + cr[i - REG_CR].regnum);
7168 declare_register ("gp", REG_GR + 1);
7169 declare_register ("sp", REG_GR + 12);
7170 declare_register ("rp", REG_BR + 0);
7172 /* pseudo-registers used to specify unwind info: */
7173 declare_register ("psp", REG_PSP);
7175 declare_register_set ("ret", 4, REG_GR + 8);
7176 declare_register_set ("farg", 8, REG_FR + 8);
7177 declare_register_set ("fret", 8, REG_FR + 8);
7179 for (i = 0; i < NELEMS (const_bits); ++i)
7181 err = hash_insert (md.const_hash, const_bits[i].name,
7182 (PTR) (const_bits + i));
7184 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7188 /* Set the architecture and machine depending on defaults and command line
7190 if (md.flags & EF_IA_64_ABI64)
7191 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7193 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7196 as_warn (_("Could not set architecture and machine"));
7198 /* Set the pointer size and pointer shift size depending on md.flags */
7200 if (md.flags & EF_IA_64_ABI64)
7202 md.pointer_size = 8; /* pointers are 8 bytes */
7203 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7207 md.pointer_size = 4; /* pointers are 4 bytes */
7208 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7211 md.mem_offset.hint = 0;
7214 md.entry_labels = NULL;
7217 /* Set the default options in md. Cannot do this in md_begin because
7218 that is called after md_parse_option which is where we set the
7219 options in md based on command line options. */
7222 ia64_init (argc, argv)
7223 int argc ATTRIBUTE_UNUSED;
7224 char **argv ATTRIBUTE_UNUSED;
7226 md.flags = MD_FLAGS_DEFAULT;
7227 /* FIXME: We should change it to unwind_check_error someday. */
7228 md.unwind_check = unwind_check_warning;
7231 /* Return a string for the target object file format. */
7234 ia64_target_format ()
7236 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7238 if (md.flags & EF_IA_64_BE)
7240 if (md.flags & EF_IA_64_ABI64)
7241 #if defined(TE_AIX50)
7242 return "elf64-ia64-aix-big";
7243 #elif defined(TE_HPUX)
7244 return "elf64-ia64-hpux-big";
7246 return "elf64-ia64-big";
7249 #if defined(TE_AIX50)
7250 return "elf32-ia64-aix-big";
7251 #elif defined(TE_HPUX)
7252 return "elf32-ia64-hpux-big";
7254 return "elf32-ia64-big";
7259 if (md.flags & EF_IA_64_ABI64)
7261 return "elf64-ia64-aix-little";
7263 return "elf64-ia64-little";
7267 return "elf32-ia64-aix-little";
7269 return "elf32-ia64-little";
7274 return "unknown-format";
7278 ia64_end_of_source ()
7280 /* terminate insn group upon reaching end of file: */
7281 insn_group_break (1, 0, 0);
7283 /* emits slots we haven't written yet: */
7284 ia64_flush_insns ();
7286 bfd_set_private_flags (stdoutput, md.flags);
7288 md.mem_offset.hint = 0;
7294 if (md.qp.X_op == O_register)
7295 as_bad ("qualifying predicate not followed by instruction");
7296 md.qp.X_op = O_absent;
7298 if (ignore_input ())
7301 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7303 if (md.detect_dv && !md.explicit_mode)
7304 as_warn (_("Explicit stops are ignored in auto mode"));
7306 insn_group_break (1, 0, 0);
7310 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7312 static int defining_tag = 0;
7315 ia64_unrecognized_line (ch)
7321 expression (&md.qp);
7322 if (*input_line_pointer++ != ')')
7324 as_bad ("Expected ')'");
7327 if (md.qp.X_op != O_register)
7329 as_bad ("Qualifying predicate expected");
7332 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7334 as_bad ("Predicate register expected");
7340 if (md.manual_bundling)
7341 as_warn ("Found '{' when manual bundling is already turned on");
7343 CURR_SLOT.manual_bundling_on = 1;
7344 md.manual_bundling = 1;
7346 /* Bundling is only acceptable in explicit mode
7347 or when in default automatic mode. */
7348 if (md.detect_dv && !md.explicit_mode)
7350 if (!md.mode_explicitly_set
7351 && !md.default_explicit_mode)
7354 as_warn (_("Found '{' after explicit switch to automatic mode"));
7359 if (!md.manual_bundling)
7360 as_warn ("Found '}' when manual bundling is off");
7362 PREV_SLOT.manual_bundling_off = 1;
7363 md.manual_bundling = 0;
7365 /* switch back to automatic mode, if applicable */
7368 && !md.mode_explicitly_set
7369 && !md.default_explicit_mode)
7372 /* Allow '{' to follow on the same line. We also allow ";;", but that
7373 happens automatically because ';' is an end of line marker. */
7375 if (input_line_pointer[0] == '{')
7377 input_line_pointer++;
7378 return ia64_unrecognized_line ('{');
7381 demand_empty_rest_of_line ();
7391 if (md.qp.X_op == O_register)
7393 as_bad ("Tag must come before qualifying predicate.");
7397 /* This implements just enough of read_a_source_file in read.c to
7398 recognize labels. */
7399 if (is_name_beginner (*input_line_pointer))
7401 s = input_line_pointer;
7402 c = get_symbol_end ();
7404 else if (LOCAL_LABELS_FB
7405 && ISDIGIT (*input_line_pointer))
7408 while (ISDIGIT (*input_line_pointer))
7409 temp = (temp * 10) + *input_line_pointer++ - '0';
7410 fb_label_instance_inc (temp);
7411 s = fb_label_name (temp, 0);
7412 c = *input_line_pointer;
7421 /* Put ':' back for error messages' sake. */
7422 *input_line_pointer++ = ':';
7423 as_bad ("Expected ':'");
7430 /* Put ':' back for error messages' sake. */
7431 *input_line_pointer++ = ':';
7432 if (*input_line_pointer++ != ']')
7434 as_bad ("Expected ']'");
7439 as_bad ("Tag name expected");
7449 /* Not a valid line. */
7454 ia64_frob_label (sym)
7457 struct label_fix *fix;
7459 /* Tags need special handling since they are not bundle breaks like
7463 fix = obstack_alloc (¬es, sizeof (*fix));
7465 fix->next = CURR_SLOT.tag_fixups;
7466 CURR_SLOT.tag_fixups = fix;
7471 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7473 md.last_text_seg = now_seg;
7474 fix = obstack_alloc (¬es, sizeof (*fix));
7476 fix->next = CURR_SLOT.label_fixups;
7477 CURR_SLOT.label_fixups = fix;
7479 /* Keep track of how many code entry points we've seen. */
7480 if (md.path == md.maxpaths)
7483 md.entry_labels = (const char **)
7484 xrealloc ((void *) md.entry_labels,
7485 md.maxpaths * sizeof (char *));
7487 md.entry_labels[md.path++] = S_GET_NAME (sym);
7492 /* The HP-UX linker will give unresolved symbol errors for symbols
7493 that are declared but unused. This routine removes declared,
7494 unused symbols from an object. */
7496 ia64_frob_symbol (sym)
7499 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7500 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7501 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7502 && ! S_IS_EXTERNAL (sym)))
7509 ia64_flush_pending_output ()
7511 if (!md.keep_pending_output
7512 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7514 /* ??? This causes many unnecessary stop bits to be emitted.
7515 Unfortunately, it isn't clear if it is safe to remove this. */
7516 insn_group_break (1, 0, 0);
7517 ia64_flush_insns ();
7521 /* Do ia64-specific expression optimization. All that's done here is
7522 to transform index expressions that are either due to the indexing
7523 of rotating registers or due to the indexing of indirect register
7526 ia64_optimize_expr (l, op, r)
7535 if (l->X_op == O_register && r->X_op == O_constant)
7537 num_regs = (l->X_add_number >> 16);
7538 if ((unsigned) r->X_add_number >= num_regs)
7541 as_bad ("No current frame");
7543 as_bad ("Index out of range 0..%u", num_regs - 1);
7544 r->X_add_number = 0;
7546 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7549 else if (l->X_op == O_register && r->X_op == O_register)
7551 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7552 || l->X_add_number == IND_MEM)
7554 as_bad ("Indirect register set name expected");
7555 l->X_add_number = IND_CPUID;
7558 l->X_op_symbol = md.regsym[l->X_add_number];
7559 l->X_add_number = r->X_add_number;
7567 ia64_parse_name (name, e, nextcharP)
7572 struct const_desc *cdesc;
7573 struct dynreg *dr = 0;
7574 unsigned int regnum;
7581 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7583 /* Find what relocation pseudo-function we're dealing with. */
7584 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7585 if (pseudo_func[idx].name
7586 && pseudo_func[idx].name[0] == name[1]
7587 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7589 pseudo_type = pseudo_func[idx].type;
7592 switch (pseudo_type)
7594 case PSEUDO_FUNC_RELOC:
7595 end = input_line_pointer;
7596 if (*nextcharP != '(')
7598 as_bad ("Expected '('");
7602 ++input_line_pointer;
7604 if (*input_line_pointer != ')')
7606 as_bad ("Missing ')'");
7610 ++input_line_pointer;
7611 if (e->X_op != O_symbol)
7613 if (e->X_op != O_pseudo_fixup)
7615 as_bad ("Not a symbolic expression");
7618 if (idx != FUNC_LT_RELATIVE)
7620 as_bad ("Illegal combination of relocation functions");
7623 switch (S_GET_VALUE (e->X_op_symbol))
7625 case FUNC_FPTR_RELATIVE:
7626 idx = FUNC_LT_FPTR_RELATIVE; break;
7627 case FUNC_DTP_MODULE:
7628 idx = FUNC_LT_DTP_MODULE; break;
7629 case FUNC_DTP_RELATIVE:
7630 idx = FUNC_LT_DTP_RELATIVE; break;
7631 case FUNC_TP_RELATIVE:
7632 idx = FUNC_LT_TP_RELATIVE; break;
7634 as_bad ("Illegal combination of relocation functions");
7638 /* Make sure gas doesn't get rid of local symbols that are used
7640 e->X_op = O_pseudo_fixup;
7641 e->X_op_symbol = pseudo_func[idx].u.sym;
7644 case PSEUDO_FUNC_CONST:
7645 e->X_op = O_constant;
7646 e->X_add_number = pseudo_func[idx].u.ival;
7649 case PSEUDO_FUNC_REG:
7650 e->X_op = O_register;
7651 e->X_add_number = pseudo_func[idx].u.ival;
7658 *nextcharP = *input_line_pointer;
7662 /* first see if NAME is a known register name: */
7663 sym = hash_find (md.reg_hash, name);
7666 e->X_op = O_register;
7667 e->X_add_number = S_GET_VALUE (sym);
7671 cdesc = hash_find (md.const_hash, name);
7674 e->X_op = O_constant;
7675 e->X_add_number = cdesc->value;
7679 /* check for inN, locN, or outN: */
7683 if (name[1] == 'n' && ISDIGIT (name[2]))
7691 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7699 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7712 /* The name is inN, locN, or outN; parse the register number. */
7713 regnum = strtoul (name, &end, 10);
7714 if (end > name && *end == '\0')
7716 if ((unsigned) regnum >= dr->num_regs)
7719 as_bad ("No current frame");
7721 as_bad ("Register number out of range 0..%u",
7725 e->X_op = O_register;
7726 e->X_add_number = dr->base + regnum;
7731 if ((dr = hash_find (md.dynreg_hash, name)))
7733 /* We've got ourselves the name of a rotating register set.
7734 Store the base register number in the low 16 bits of
7735 X_add_number and the size of the register set in the top 16
7737 e->X_op = O_register;
7738 e->X_add_number = dr->base | (dr->num_regs << 16);
7744 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7747 ia64_canonicalize_symbol_name (name)
7750 size_t len = strlen (name);
7751 if (len > 1 && name[len - 1] == '#')
7752 name[len - 1] = '\0';
7756 /* Return true if idesc is a conditional branch instruction. This excludes
7757 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7758 because they always read/write resources regardless of the value of the
7759 qualifying predicate. br.ia must always use p0, and hence is always
7760 taken. Thus this function returns true for branches which can fall
7761 through, and which use no resources if they do fall through. */
7764 is_conditional_branch (idesc)
7765 struct ia64_opcode *idesc;
7767 /* br is a conditional branch. Everything that starts with br. except
7768 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7769 Everything that starts with brl is a conditional branch. */
7770 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7771 && (idesc->name[2] == '\0'
7772 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7773 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7774 || idesc->name[2] == 'l'
7775 /* br.cond, br.call, br.clr */
7776 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7777 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7778 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7781 /* Return whether the given opcode is a taken branch. If there's any doubt,
7785 is_taken_branch (idesc)
7786 struct ia64_opcode *idesc;
7788 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7789 || strncmp (idesc->name, "br.ia", 5) == 0);
7792 /* Return whether the given opcode is an interruption or rfi. If there's any
7793 doubt, returns zero. */
7796 is_interruption_or_rfi (idesc)
7797 struct ia64_opcode *idesc;
7799 if (strcmp (idesc->name, "rfi") == 0)
7804 /* Returns the index of the given dependency in the opcode's list of chks, or
7805 -1 if there is no dependency. */
7808 depends_on (depind, idesc)
7810 struct ia64_opcode *idesc;
7813 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7814 for (i = 0; i < dep->nchks; i++)
7816 if (depind == DEP (dep->chks[i]))
7822 /* Determine a set of specific resources used for a particular resource
7823 class. Returns the number of specific resources identified For those
7824 cases which are not determinable statically, the resource returned is
7827 Meanings of value in 'NOTE':
7828 1) only read/write when the register number is explicitly encoded in the
7830 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7831 accesses CFM when qualifying predicate is in the rotating region.
7832 3) general register value is used to specify an indirect register; not
7833 determinable statically.
7834 4) only read the given resource when bits 7:0 of the indirect index
7835 register value does not match the register number of the resource; not
7836 determinable statically.
7837 5) all rules are implementation specific.
7838 6) only when both the index specified by the reader and the index specified
7839 by the writer have the same value in bits 63:61; not determinable
7841 7) only access the specified resource when the corresponding mask bit is
7843 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7844 only read when these insns reference FR2-31
7845 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7846 written when these insns write FR32-127
7847 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7849 11) The target predicates are written independently of PR[qp], but source
7850 registers are only read if PR[qp] is true. Since the state of PR[qp]
7851 cannot statically be determined, all source registers are marked used.
7852 12) This insn only reads the specified predicate register when that
7853 register is the PR[qp].
7854 13) This reference to ld-c only applies to teh GR whose value is loaded
7855 with data returned from memory, not the post-incremented address register.
7856 14) The RSE resource includes the implementation-specific RSE internal
7857 state resources. At least one (and possibly more) of these resources are
7858 read by each instruction listed in IC:rse-readers. At least one (and
7859 possibly more) of these resources are written by each insn listed in
7861 15+16) Represents reserved instructions, which the assembler does not
7864 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7865 this code; there are no dependency violations based on memory access.
7868 #define MAX_SPECS 256
7873 specify_resource (dep, idesc, type, specs, note, path)
7874 const struct ia64_dependency *dep;
7875 struct ia64_opcode *idesc;
7876 int type; /* is this a DV chk or a DV reg? */
7877 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7878 int note; /* resource note for this insn's usage */
7879 int path; /* which execution path to examine */
7886 if (dep->mode == IA64_DV_WAW
7887 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7888 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7891 /* template for any resources we identify */
7892 tmpl.dependency = dep;
7894 tmpl.insn_srlz = tmpl.data_srlz = 0;
7895 tmpl.qp_regno = CURR_SLOT.qp_regno;
7896 tmpl.link_to_qp_branch = 1;
7897 tmpl.mem_offset.hint = 0;
7900 tmpl.cmp_type = CMP_NONE;
7903 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7904 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7905 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7907 /* we don't need to track these */
7908 if (dep->semantics == IA64_DVS_NONE)
7911 switch (dep->specifier)
7916 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7918 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7919 if (regno >= 0 && regno <= 7)
7921 specs[count] = tmpl;
7922 specs[count++].index = regno;
7928 for (i = 0; i < 8; i++)
7930 specs[count] = tmpl;
7931 specs[count++].index = i;
7940 case IA64_RS_AR_UNAT:
7941 /* This is a mov =AR or mov AR= instruction. */
7942 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7944 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7945 if (regno == AR_UNAT)
7947 specs[count++] = tmpl;
7952 /* This is a spill/fill, or other instruction that modifies the
7955 /* Unless we can determine the specific bits used, mark the whole
7956 thing; bits 8:3 of the memory address indicate the bit used in
7957 UNAT. The .mem.offset hint may be used to eliminate a small
7958 subset of conflicts. */
7959 specs[count] = tmpl;
7960 if (md.mem_offset.hint)
7963 fprintf (stderr, " Using hint for spill/fill\n");
7964 /* The index isn't actually used, just set it to something
7965 approximating the bit index. */
7966 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7967 specs[count].mem_offset.hint = 1;
7968 specs[count].mem_offset.offset = md.mem_offset.offset;
7969 specs[count++].mem_offset.base = md.mem_offset.base;
7973 specs[count++].specific = 0;
7981 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7983 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7984 if ((regno >= 8 && regno <= 15)
7985 || (regno >= 20 && regno <= 23)
7986 || (regno >= 31 && regno <= 39)
7987 || (regno >= 41 && regno <= 47)
7988 || (regno >= 67 && regno <= 111))
7990 specs[count] = tmpl;
7991 specs[count++].index = regno;
8004 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8006 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8007 if ((regno >= 48 && regno <= 63)
8008 || (regno >= 112 && regno <= 127))
8010 specs[count] = tmpl;
8011 specs[count++].index = regno;
8017 for (i = 48; i < 64; i++)
8019 specs[count] = tmpl;
8020 specs[count++].index = i;
8022 for (i = 112; i < 128; i++)
8024 specs[count] = tmpl;
8025 specs[count++].index = i;
8043 for (i = 0; i < idesc->num_outputs; i++)
8044 if (idesc->operands[i] == IA64_OPND_B1
8045 || idesc->operands[i] == IA64_OPND_B2)
8047 specs[count] = tmpl;
8048 specs[count++].index =
8049 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8054 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8055 if (idesc->operands[i] == IA64_OPND_B1
8056 || idesc->operands[i] == IA64_OPND_B2)
8058 specs[count] = tmpl;
8059 specs[count++].index =
8060 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8066 case IA64_RS_CPUID: /* four or more registers */
8069 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8071 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8072 if (regno >= 0 && regno < NELEMS (gr_values)
8075 specs[count] = tmpl;
8076 specs[count++].index = gr_values[regno].value & 0xFF;
8080 specs[count] = tmpl;
8081 specs[count++].specific = 0;
8091 case IA64_RS_DBR: /* four or more registers */
8094 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8096 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8097 if (regno >= 0 && regno < NELEMS (gr_values)
8100 specs[count] = tmpl;
8101 specs[count++].index = gr_values[regno].value & 0xFF;
8105 specs[count] = tmpl;
8106 specs[count++].specific = 0;
8110 else if (note == 0 && !rsrc_write)
8112 specs[count] = tmpl;
8113 specs[count++].specific = 0;
8121 case IA64_RS_IBR: /* four or more registers */
8124 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8126 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8127 if (regno >= 0 && regno < NELEMS (gr_values)
8130 specs[count] = tmpl;
8131 specs[count++].index = gr_values[regno].value & 0xFF;
8135 specs[count] = tmpl;
8136 specs[count++].specific = 0;
8149 /* These are implementation specific. Force all references to
8150 conflict with all other references. */
8151 specs[count] = tmpl;
8152 specs[count++].specific = 0;
8160 case IA64_RS_PKR: /* 16 or more registers */
8161 if (note == 3 || note == 4)
8163 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8165 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8166 if (regno >= 0 && regno < NELEMS (gr_values)
8171 specs[count] = tmpl;
8172 specs[count++].index = gr_values[regno].value & 0xFF;
8175 for (i = 0; i < NELEMS (gr_values); i++)
8177 /* Uses all registers *except* the one in R3. */
8178 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8180 specs[count] = tmpl;
8181 specs[count++].index = i;
8187 specs[count] = tmpl;
8188 specs[count++].specific = 0;
8195 specs[count] = tmpl;
8196 specs[count++].specific = 0;
8200 case IA64_RS_PMC: /* four or more registers */
8203 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8204 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8207 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8209 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8210 if (regno >= 0 && regno < NELEMS (gr_values)
8213 specs[count] = tmpl;
8214 specs[count++].index = gr_values[regno].value & 0xFF;
8218 specs[count] = tmpl;
8219 specs[count++].specific = 0;
8229 case IA64_RS_PMD: /* four or more registers */
8232 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8234 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8235 if (regno >= 0 && regno < NELEMS (gr_values)
8238 specs[count] = tmpl;
8239 specs[count++].index = gr_values[regno].value & 0xFF;
8243 specs[count] = tmpl;
8244 specs[count++].specific = 0;
8254 case IA64_RS_RR: /* eight registers */
8257 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8259 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8260 if (regno >= 0 && regno < NELEMS (gr_values)
8263 specs[count] = tmpl;
8264 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8268 specs[count] = tmpl;
8269 specs[count++].specific = 0;
8273 else if (note == 0 && !rsrc_write)
8275 specs[count] = tmpl;
8276 specs[count++].specific = 0;
8284 case IA64_RS_CR_IRR:
8287 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8288 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8290 && idesc->operands[1] == IA64_OPND_CR3
8293 for (i = 0; i < 4; i++)
8295 specs[count] = tmpl;
8296 specs[count++].index = CR_IRR0 + i;
8302 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8303 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8305 && regno <= CR_IRR3)
8307 specs[count] = tmpl;
8308 specs[count++].index = regno;
8317 case IA64_RS_CR_LRR:
8324 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8325 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8326 && (regno == CR_LRR0 || regno == CR_LRR1))
8328 specs[count] = tmpl;
8329 specs[count++].index = regno;
8337 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8339 specs[count] = tmpl;
8340 specs[count++].index =
8341 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8356 else if (rsrc_write)
8358 if (dep->specifier == IA64_RS_FRb
8359 && idesc->operands[0] == IA64_OPND_F1)
8361 specs[count] = tmpl;
8362 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8367 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8369 if (idesc->operands[i] == IA64_OPND_F2
8370 || idesc->operands[i] == IA64_OPND_F3
8371 || idesc->operands[i] == IA64_OPND_F4)
8373 specs[count] = tmpl;
8374 specs[count++].index =
8375 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8384 /* This reference applies only to the GR whose value is loaded with
8385 data returned from memory. */
8386 specs[count] = tmpl;
8387 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8393 for (i = 0; i < idesc->num_outputs; i++)
8394 if (idesc->operands[i] == IA64_OPND_R1
8395 || idesc->operands[i] == IA64_OPND_R2
8396 || idesc->operands[i] == IA64_OPND_R3)
8398 specs[count] = tmpl;
8399 specs[count++].index =
8400 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8402 if (idesc->flags & IA64_OPCODE_POSTINC)
8403 for (i = 0; i < NELEMS (idesc->operands); i++)
8404 if (idesc->operands[i] == IA64_OPND_MR3)
8406 specs[count] = tmpl;
8407 specs[count++].index =
8408 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8413 /* Look for anything that reads a GR. */
8414 for (i = 0; i < NELEMS (idesc->operands); i++)
8416 if (idesc->operands[i] == IA64_OPND_MR3
8417 || idesc->operands[i] == IA64_OPND_CPUID_R3
8418 || idesc->operands[i] == IA64_OPND_DBR_R3
8419 || idesc->operands[i] == IA64_OPND_IBR_R3
8420 || idesc->operands[i] == IA64_OPND_MSR_R3
8421 || idesc->operands[i] == IA64_OPND_PKR_R3
8422 || idesc->operands[i] == IA64_OPND_PMC_R3
8423 || idesc->operands[i] == IA64_OPND_PMD_R3
8424 || idesc->operands[i] == IA64_OPND_RR_R3
8425 || ((i >= idesc->num_outputs)
8426 && (idesc->operands[i] == IA64_OPND_R1
8427 || idesc->operands[i] == IA64_OPND_R2
8428 || idesc->operands[i] == IA64_OPND_R3
8429 /* addl source register. */
8430 || idesc->operands[i] == IA64_OPND_R3_2)))
8432 specs[count] = tmpl;
8433 specs[count++].index =
8434 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8445 /* This is the same as IA64_RS_PRr, except that the register range is
8446 from 1 - 15, and there are no rotating register reads/writes here. */
8450 for (i = 1; i < 16; i++)
8452 specs[count] = tmpl;
8453 specs[count++].index = i;
8459 /* Mark only those registers indicated by the mask. */
8462 mask = CURR_SLOT.opnd[2].X_add_number;
8463 for (i = 1; i < 16; i++)
8464 if (mask & ((valueT) 1 << i))
8466 specs[count] = tmpl;
8467 specs[count++].index = i;
8475 else if (note == 11) /* note 11 implies note 1 as well */
8479 for (i = 0; i < idesc->num_outputs; i++)
8481 if (idesc->operands[i] == IA64_OPND_P1
8482 || idesc->operands[i] == IA64_OPND_P2)
8484 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8485 if (regno >= 1 && regno < 16)
8487 specs[count] = tmpl;
8488 specs[count++].index = regno;
8498 else if (note == 12)
8500 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8502 specs[count] = tmpl;
8503 specs[count++].index = CURR_SLOT.qp_regno;
8510 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8511 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8512 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8513 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8515 if ((idesc->operands[0] == IA64_OPND_P1
8516 || idesc->operands[0] == IA64_OPND_P2)
8517 && p1 >= 1 && p1 < 16)
8519 specs[count] = tmpl;
8520 specs[count].cmp_type =
8521 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8522 specs[count++].index = p1;
8524 if ((idesc->operands[1] == IA64_OPND_P1
8525 || idesc->operands[1] == IA64_OPND_P2)
8526 && p2 >= 1 && p2 < 16)
8528 specs[count] = tmpl;
8529 specs[count].cmp_type =
8530 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8531 specs[count++].index = p2;
8536 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8538 specs[count] = tmpl;
8539 specs[count++].index = CURR_SLOT.qp_regno;
8541 if (idesc->operands[1] == IA64_OPND_PR)
8543 for (i = 1; i < 16; i++)
8545 specs[count] = tmpl;
8546 specs[count++].index = i;
8557 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8558 simplified cases of this. */
8562 for (i = 16; i < 63; i++)
8564 specs[count] = tmpl;
8565 specs[count++].index = i;
8571 /* Mark only those registers indicated by the mask. */
8573 && idesc->operands[0] == IA64_OPND_PR)
8575 mask = CURR_SLOT.opnd[2].X_add_number;
8576 if (mask & ((valueT) 1 << 16))
8577 for (i = 16; i < 63; i++)
8579 specs[count] = tmpl;
8580 specs[count++].index = i;
8584 && idesc->operands[0] == IA64_OPND_PR_ROT)
8586 for (i = 16; i < 63; i++)
8588 specs[count] = tmpl;
8589 specs[count++].index = i;
8597 else if (note == 11) /* note 11 implies note 1 as well */
8601 for (i = 0; i < idesc->num_outputs; i++)
8603 if (idesc->operands[i] == IA64_OPND_P1
8604 || idesc->operands[i] == IA64_OPND_P2)
8606 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8607 if (regno >= 16 && regno < 63)
8609 specs[count] = tmpl;
8610 specs[count++].index = regno;
8620 else if (note == 12)
8622 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8624 specs[count] = tmpl;
8625 specs[count++].index = CURR_SLOT.qp_regno;
8632 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8633 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8634 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8635 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8637 if ((idesc->operands[0] == IA64_OPND_P1
8638 || idesc->operands[0] == IA64_OPND_P2)
8639 && p1 >= 16 && p1 < 63)
8641 specs[count] = tmpl;
8642 specs[count].cmp_type =
8643 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8644 specs[count++].index = p1;
8646 if ((idesc->operands[1] == IA64_OPND_P1
8647 || idesc->operands[1] == IA64_OPND_P2)
8648 && p2 >= 16 && p2 < 63)
8650 specs[count] = tmpl;
8651 specs[count].cmp_type =
8652 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8653 specs[count++].index = p2;
8658 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8660 specs[count] = tmpl;
8661 specs[count++].index = CURR_SLOT.qp_regno;
8663 if (idesc->operands[1] == IA64_OPND_PR)
8665 for (i = 16; i < 63; i++)
8667 specs[count] = tmpl;
8668 specs[count++].index = i;
8680 /* Verify that the instruction is using the PSR bit indicated in
8684 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8686 if (dep->regindex < 6)
8688 specs[count++] = tmpl;
8691 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8693 if (dep->regindex < 32
8694 || dep->regindex == 35
8695 || dep->regindex == 36
8696 || (!rsrc_write && dep->regindex == PSR_CPL))
8698 specs[count++] = tmpl;
8701 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8703 if (dep->regindex < 32
8704 || dep->regindex == 35
8705 || dep->regindex == 36
8706 || (rsrc_write && dep->regindex == PSR_CPL))
8708 specs[count++] = tmpl;
8713 /* Several PSR bits have very specific dependencies. */
8714 switch (dep->regindex)
8717 specs[count++] = tmpl;
8722 specs[count++] = tmpl;
8726 /* Only certain CR accesses use PSR.ic */
8727 if (idesc->operands[0] == IA64_OPND_CR3
8728 || idesc->operands[1] == IA64_OPND_CR3)
8731 ((idesc->operands[0] == IA64_OPND_CR3)
8734 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8749 specs[count++] = tmpl;
8758 specs[count++] = tmpl;
8762 /* Only some AR accesses use cpl */
8763 if (idesc->operands[0] == IA64_OPND_AR3
8764 || idesc->operands[1] == IA64_OPND_AR3)
8767 ((idesc->operands[0] == IA64_OPND_AR3)
8770 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8777 && regno <= AR_K7))))
8779 specs[count++] = tmpl;
8784 specs[count++] = tmpl;
8794 if (idesc->operands[0] == IA64_OPND_IMMU24)
8796 mask = CURR_SLOT.opnd[0].X_add_number;
8802 if (mask & ((valueT) 1 << dep->regindex))
8804 specs[count++] = tmpl;
8809 int min = dep->regindex == PSR_DFL ? 2 : 32;
8810 int max = dep->regindex == PSR_DFL ? 31 : 127;
8811 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8812 for (i = 0; i < NELEMS (idesc->operands); i++)
8814 if (idesc->operands[i] == IA64_OPND_F1
8815 || idesc->operands[i] == IA64_OPND_F2
8816 || idesc->operands[i] == IA64_OPND_F3
8817 || idesc->operands[i] == IA64_OPND_F4)
8819 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8820 if (reg >= min && reg <= max)
8822 specs[count++] = tmpl;
8829 int min = dep->regindex == PSR_MFL ? 2 : 32;
8830 int max = dep->regindex == PSR_MFL ? 31 : 127;
8831 /* mfh is read on writes to FR32-127; mfl is read on writes to
8833 for (i = 0; i < idesc->num_outputs; i++)
8835 if (idesc->operands[i] == IA64_OPND_F1)
8837 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8838 if (reg >= min && reg <= max)
8840 specs[count++] = tmpl;
8845 else if (note == 10)
8847 for (i = 0; i < NELEMS (idesc->operands); i++)
8849 if (idesc->operands[i] == IA64_OPND_R1
8850 || idesc->operands[i] == IA64_OPND_R2
8851 || idesc->operands[i] == IA64_OPND_R3)
8853 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8854 if (regno >= 16 && regno <= 31)
8856 specs[count++] = tmpl;
8867 case IA64_RS_AR_FPSR:
8868 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8870 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8871 if (regno == AR_FPSR)
8873 specs[count++] = tmpl;
8878 specs[count++] = tmpl;
8883 /* Handle all AR[REG] resources */
8884 if (note == 0 || note == 1)
8886 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8887 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8888 && regno == dep->regindex)
8890 specs[count++] = tmpl;
8892 /* other AR[REG] resources may be affected by AR accesses */
8893 else if (idesc->operands[0] == IA64_OPND_AR3)
8896 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8897 switch (dep->regindex)
8903 if (regno == AR_BSPSTORE)
8905 specs[count++] = tmpl;
8909 (regno == AR_BSPSTORE
8910 || regno == AR_RNAT))
8912 specs[count++] = tmpl;
8917 else if (idesc->operands[1] == IA64_OPND_AR3)
8920 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8921 switch (dep->regindex)
8926 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8928 specs[count++] = tmpl;
8935 specs[count++] = tmpl;
8945 /* Handle all CR[REG] resources */
8946 if (note == 0 || note == 1)
8948 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8950 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8951 if (regno == dep->regindex)
8953 specs[count++] = tmpl;
8955 else if (!rsrc_write)
8957 /* Reads from CR[IVR] affect other resources. */
8958 if (regno == CR_IVR)
8960 if ((dep->regindex >= CR_IRR0
8961 && dep->regindex <= CR_IRR3)
8962 || dep->regindex == CR_TPR)
8964 specs[count++] = tmpl;
8971 specs[count++] = tmpl;
8980 case IA64_RS_INSERVICE:
8981 /* look for write of EOI (67) or read of IVR (65) */
8982 if ((idesc->operands[0] == IA64_OPND_CR3
8983 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8984 || (idesc->operands[1] == IA64_OPND_CR3
8985 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8987 specs[count++] = tmpl;
8994 specs[count++] = tmpl;
9005 specs[count++] = tmpl;
9009 /* Check if any of the registers accessed are in the rotating region.
9010 mov to/from pr accesses CFM only when qp_regno is in the rotating
9012 for (i = 0; i < NELEMS (idesc->operands); i++)
9014 if (idesc->operands[i] == IA64_OPND_R1
9015 || idesc->operands[i] == IA64_OPND_R2
9016 || idesc->operands[i] == IA64_OPND_R3)
9018 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9019 /* Assumes that md.rot.num_regs is always valid */
9020 if (md.rot.num_regs > 0
9022 && num < 31 + md.rot.num_regs)
9024 specs[count] = tmpl;
9025 specs[count++].specific = 0;
9028 else if (idesc->operands[i] == IA64_OPND_F1
9029 || idesc->operands[i] == IA64_OPND_F2
9030 || idesc->operands[i] == IA64_OPND_F3
9031 || idesc->operands[i] == IA64_OPND_F4)
9033 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9036 specs[count] = tmpl;
9037 specs[count++].specific = 0;
9040 else if (idesc->operands[i] == IA64_OPND_P1
9041 || idesc->operands[i] == IA64_OPND_P2)
9043 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9046 specs[count] = tmpl;
9047 specs[count++].specific = 0;
9051 if (CURR_SLOT.qp_regno > 15)
9053 specs[count] = tmpl;
9054 specs[count++].specific = 0;
9059 /* This is the same as IA64_RS_PRr, except simplified to account for
9060 the fact that there is only one register. */
9064 specs[count++] = tmpl;
9069 if (idesc->operands[2] == IA64_OPND_IMM17)
9070 mask = CURR_SLOT.opnd[2].X_add_number;
9071 if (mask & ((valueT) 1 << 63))
9072 specs[count++] = tmpl;
9074 else if (note == 11)
9076 if ((idesc->operands[0] == IA64_OPND_P1
9077 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9078 || (idesc->operands[1] == IA64_OPND_P2
9079 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9081 specs[count++] = tmpl;
9084 else if (note == 12)
9086 if (CURR_SLOT.qp_regno == 63)
9088 specs[count++] = tmpl;
9095 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9096 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9097 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9098 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9101 && (idesc->operands[0] == IA64_OPND_P1
9102 || idesc->operands[0] == IA64_OPND_P2))
9104 specs[count] = tmpl;
9105 specs[count++].cmp_type =
9106 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9109 && (idesc->operands[1] == IA64_OPND_P1
9110 || idesc->operands[1] == IA64_OPND_P2))
9112 specs[count] = tmpl;
9113 specs[count++].cmp_type =
9114 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9119 if (CURR_SLOT.qp_regno == 63)
9121 specs[count++] = tmpl;
9132 /* FIXME we can identify some individual RSE written resources, but RSE
9133 read resources have not yet been completely identified, so for now
9134 treat RSE as a single resource */
9135 if (strncmp (idesc->name, "mov", 3) == 0)
9139 if (idesc->operands[0] == IA64_OPND_AR3
9140 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9142 specs[count] = tmpl;
9143 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9148 if (idesc->operands[0] == IA64_OPND_AR3)
9150 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9151 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9153 specs[count++] = tmpl;
9156 else if (idesc->operands[1] == IA64_OPND_AR3)
9158 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9159 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9160 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9162 specs[count++] = tmpl;
9169 specs[count++] = tmpl;
9174 /* FIXME -- do any of these need to be non-specific? */
9175 specs[count++] = tmpl;
9179 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9186 /* Clear branch flags on marked resources. This breaks the link between the
9187 QP of the marking instruction and a subsequent branch on the same QP. */
9190 clear_qp_branch_flag (mask)
9194 for (i = 0; i < regdepslen; i++)
9196 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9197 if ((bit & mask) != 0)
9199 regdeps[i].link_to_qp_branch = 0;
9204 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9205 any mutexes which contain one of the PRs and create new ones when
9209 update_qp_mutex (valueT mask)
9215 while (i < qp_mutexeslen)
9217 if ((qp_mutexes[i].prmask & mask) != 0)
9219 /* If it destroys and creates the same mutex, do nothing. */
9220 if (qp_mutexes[i].prmask == mask
9221 && qp_mutexes[i].path == md.path)
9232 fprintf (stderr, " Clearing mutex relation");
9233 print_prmask (qp_mutexes[i].prmask);
9234 fprintf (stderr, "\n");
9237 /* Deal with the old mutex with more than 3+ PRs only if
9238 the new mutex on the same execution path with it.
9240 FIXME: The 3+ mutex support is incomplete.
9241 dot_pred_rel () may be a better place to fix it. */
9242 if (qp_mutexes[i].path == md.path)
9244 /* If it is a proper subset of the mutex, create a
9247 && (qp_mutexes[i].prmask & mask) == mask)
9250 qp_mutexes[i].prmask &= ~mask;
9251 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9253 /* Modify the mutex if there are more than one
9261 /* Remove the mutex. */
9262 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9270 add_qp_mutex (mask);
9275 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9277 Any changes to a PR clears the mutex relations which include that PR. */
9280 clear_qp_mutex (mask)
9286 while (i < qp_mutexeslen)
9288 if ((qp_mutexes[i].prmask & mask) != 0)
9292 fprintf (stderr, " Clearing mutex relation");
9293 print_prmask (qp_mutexes[i].prmask);
9294 fprintf (stderr, "\n");
9296 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9303 /* Clear implies relations which contain PRs in the given masks.
9304 P1_MASK indicates the source of the implies relation, while P2_MASK
9305 indicates the implied PR. */
9308 clear_qp_implies (p1_mask, p2_mask)
9315 while (i < qp_implieslen)
9317 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9318 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9321 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9322 qp_implies[i].p1, qp_implies[i].p2);
9323 qp_implies[i] = qp_implies[--qp_implieslen];
9330 /* Add the PRs specified to the list of implied relations. */
9333 add_qp_imply (p1, p2)
9340 /* p0 is not meaningful here. */
9341 if (p1 == 0 || p2 == 0)
9347 /* If it exists already, ignore it. */
9348 for (i = 0; i < qp_implieslen; i++)
9350 if (qp_implies[i].p1 == p1
9351 && qp_implies[i].p2 == p2
9352 && qp_implies[i].path == md.path
9353 && !qp_implies[i].p2_branched)
9357 if (qp_implieslen == qp_impliestotlen)
9359 qp_impliestotlen += 20;
9360 qp_implies = (struct qp_imply *)
9361 xrealloc ((void *) qp_implies,
9362 qp_impliestotlen * sizeof (struct qp_imply));
9365 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9366 qp_implies[qp_implieslen].p1 = p1;
9367 qp_implies[qp_implieslen].p2 = p2;
9368 qp_implies[qp_implieslen].path = md.path;
9369 qp_implies[qp_implieslen++].p2_branched = 0;
9371 /* Add in the implied transitive relations; for everything that p2 implies,
9372 make p1 imply that, too; for everything that implies p1, make it imply p2
9374 for (i = 0; i < qp_implieslen; i++)
9376 if (qp_implies[i].p1 == p2)
9377 add_qp_imply (p1, qp_implies[i].p2);
9378 if (qp_implies[i].p2 == p1)
9379 add_qp_imply (qp_implies[i].p1, p2);
9381 /* Add in mutex relations implied by this implies relation; for each mutex
9382 relation containing p2, duplicate it and replace p2 with p1. */
9383 bit = (valueT) 1 << p1;
9384 mask = (valueT) 1 << p2;
9385 for (i = 0; i < qp_mutexeslen; i++)
9387 if (qp_mutexes[i].prmask & mask)
9388 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9392 /* Add the PRs specified in the mask to the mutex list; this means that only
9393 one of the PRs can be true at any time. PR0 should never be included in
9403 if (qp_mutexeslen == qp_mutexestotlen)
9405 qp_mutexestotlen += 20;
9406 qp_mutexes = (struct qpmutex *)
9407 xrealloc ((void *) qp_mutexes,
9408 qp_mutexestotlen * sizeof (struct qpmutex));
9412 fprintf (stderr, " Registering mutex on");
9413 print_prmask (mask);
9414 fprintf (stderr, "\n");
9416 qp_mutexes[qp_mutexeslen].path = md.path;
9417 qp_mutexes[qp_mutexeslen++].prmask = mask;
9421 has_suffix_p (name, suffix)
9425 size_t namelen = strlen (name);
9426 size_t sufflen = strlen (suffix);
9428 if (namelen <= sufflen)
9430 return strcmp (name + namelen - sufflen, suffix) == 0;
9434 clear_register_values ()
9438 fprintf (stderr, " Clearing register values\n");
9439 for (i = 1; i < NELEMS (gr_values); i++)
9440 gr_values[i].known = 0;
9443 /* Keep track of register values/changes which affect DV tracking.
9445 optimization note: should add a flag to classes of insns where otherwise we
9446 have to examine a group of strings to identify them. */
9449 note_register_values (idesc)
9450 struct ia64_opcode *idesc;
9452 valueT qp_changemask = 0;
9455 /* Invalidate values for registers being written to. */
9456 for (i = 0; i < idesc->num_outputs; i++)
9458 if (idesc->operands[i] == IA64_OPND_R1
9459 || idesc->operands[i] == IA64_OPND_R2
9460 || idesc->operands[i] == IA64_OPND_R3)
9462 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9463 if (regno > 0 && regno < NELEMS (gr_values))
9464 gr_values[regno].known = 0;
9466 else if (idesc->operands[i] == IA64_OPND_R3_2)
9468 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9469 if (regno > 0 && regno < 4)
9470 gr_values[regno].known = 0;
9472 else if (idesc->operands[i] == IA64_OPND_P1
9473 || idesc->operands[i] == IA64_OPND_P2)
9475 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9476 qp_changemask |= (valueT) 1 << regno;
9478 else if (idesc->operands[i] == IA64_OPND_PR)
9480 if (idesc->operands[2] & (valueT) 0x10000)
9481 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9483 qp_changemask = idesc->operands[2];
9486 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9488 if (idesc->operands[1] & ((valueT) 1 << 43))
9489 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9491 qp_changemask = idesc->operands[1];
9492 qp_changemask &= ~(valueT) 0xFFFF;
9497 /* Always clear qp branch flags on any PR change. */
9498 /* FIXME there may be exceptions for certain compares. */
9499 clear_qp_branch_flag (qp_changemask);
9501 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9502 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9504 qp_changemask |= ~(valueT) 0xFFFF;
9505 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9507 for (i = 32; i < 32 + md.rot.num_regs; i++)
9508 gr_values[i].known = 0;
9510 clear_qp_mutex (qp_changemask);
9511 clear_qp_implies (qp_changemask, qp_changemask);
9513 /* After a call, all register values are undefined, except those marked
9515 else if (strncmp (idesc->name, "br.call", 6) == 0
9516 || strncmp (idesc->name, "brl.call", 7) == 0)
9518 /* FIXME keep GR values which are marked as "safe_across_calls" */
9519 clear_register_values ();
9520 clear_qp_mutex (~qp_safe_across_calls);
9521 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9522 clear_qp_branch_flag (~qp_safe_across_calls);
9524 else if (is_interruption_or_rfi (idesc)
9525 || is_taken_branch (idesc))
9527 clear_register_values ();
9528 clear_qp_mutex (~(valueT) 0);
9529 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9531 /* Look for mutex and implies relations. */
9532 else if ((idesc->operands[0] == IA64_OPND_P1
9533 || idesc->operands[0] == IA64_OPND_P2)
9534 && (idesc->operands[1] == IA64_OPND_P1
9535 || idesc->operands[1] == IA64_OPND_P2))
9537 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9538 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9539 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9540 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9542 /* If both PRs are PR0, we can't really do anything. */
9543 if (p1 == 0 && p2 == 0)
9546 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9548 /* In general, clear mutexes and implies which include P1 or P2,
9549 with the following exceptions. */
9550 else if (has_suffix_p (idesc->name, ".or.andcm")
9551 || has_suffix_p (idesc->name, ".and.orcm"))
9553 clear_qp_implies (p2mask, p1mask);
9555 else if (has_suffix_p (idesc->name, ".andcm")
9556 || has_suffix_p (idesc->name, ".and"))
9558 clear_qp_implies (0, p1mask | p2mask);
9560 else if (has_suffix_p (idesc->name, ".orcm")
9561 || has_suffix_p (idesc->name, ".or"))
9563 clear_qp_mutex (p1mask | p2mask);
9564 clear_qp_implies (p1mask | p2mask, 0);
9570 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9572 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9573 if (p1 == 0 || p2 == 0)
9574 clear_qp_mutex (p1mask | p2mask);
9576 added = update_qp_mutex (p1mask | p2mask);
9578 if (CURR_SLOT.qp_regno == 0
9579 || has_suffix_p (idesc->name, ".unc"))
9581 if (added == 0 && p1 && p2)
9582 add_qp_mutex (p1mask | p2mask);
9583 if (CURR_SLOT.qp_regno != 0)
9586 add_qp_imply (p1, CURR_SLOT.qp_regno);
9588 add_qp_imply (p2, CURR_SLOT.qp_regno);
9593 /* Look for mov imm insns into GRs. */
9594 else if (idesc->operands[0] == IA64_OPND_R1
9595 && (idesc->operands[1] == IA64_OPND_IMM22
9596 || idesc->operands[1] == IA64_OPND_IMMU64)
9597 && (strcmp (idesc->name, "mov") == 0
9598 || strcmp (idesc->name, "movl") == 0))
9600 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9601 if (regno > 0 && regno < NELEMS (gr_values))
9603 gr_values[regno].known = 1;
9604 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9605 gr_values[regno].path = md.path;
9608 fprintf (stderr, " Know gr%d = ", regno);
9609 fprintf_vma (stderr, gr_values[regno].value);
9610 fputs ("\n", stderr);
9616 clear_qp_mutex (qp_changemask);
9617 clear_qp_implies (qp_changemask, qp_changemask);
9621 /* Return whether the given predicate registers are currently mutex. */
9624 qp_mutex (p1, p2, path)
9634 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9635 for (i = 0; i < qp_mutexeslen; i++)
9637 if (qp_mutexes[i].path >= path
9638 && (qp_mutexes[i].prmask & mask) == mask)
9645 /* Return whether the given resource is in the given insn's list of chks
9646 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9650 resources_match (rs, idesc, note, qp_regno, path)
9652 struct ia64_opcode *idesc;
9657 struct rsrc specs[MAX_SPECS];
9660 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9661 we don't need to check. One exception is note 11, which indicates that
9662 target predicates are written regardless of PR[qp]. */
9663 if (qp_mutex (rs->qp_regno, qp_regno, path)
9667 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9670 /* UNAT checking is a bit more specific than other resources */
9671 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9672 && specs[count].mem_offset.hint
9673 && rs->mem_offset.hint)
9675 if (rs->mem_offset.base == specs[count].mem_offset.base)
9677 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9678 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9685 /* Skip apparent PR write conflicts where both writes are an AND or both
9686 writes are an OR. */
9687 if (rs->dependency->specifier == IA64_RS_PR
9688 || rs->dependency->specifier == IA64_RS_PRr
9689 || rs->dependency->specifier == IA64_RS_PR63)
9691 if (specs[count].cmp_type != CMP_NONE
9692 && specs[count].cmp_type == rs->cmp_type)
9695 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9696 dv_mode[rs->dependency->mode],
9697 rs->dependency->specifier != IA64_RS_PR63 ?
9698 specs[count].index : 63);
9703 " %s on parallel compare conflict %s vs %s on PR%d\n",
9704 dv_mode[rs->dependency->mode],
9705 dv_cmp_type[rs->cmp_type],
9706 dv_cmp_type[specs[count].cmp_type],
9707 rs->dependency->specifier != IA64_RS_PR63 ?
9708 specs[count].index : 63);
9712 /* If either resource is not specific, conservatively assume a conflict
9714 if (!specs[count].specific || !rs->specific)
9716 else if (specs[count].index == rs->index)
9723 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9724 insert a stop to create the break. Update all resource dependencies
9725 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9726 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9727 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9731 insn_group_break (insert_stop, qp_regno, save_current)
9738 if (insert_stop && md.num_slots_in_use > 0)
9739 PREV_SLOT.end_of_insn_group = 1;
9743 fprintf (stderr, " Insn group break%s",
9744 (insert_stop ? " (w/stop)" : ""));
9746 fprintf (stderr, " effective for QP=%d", qp_regno);
9747 fprintf (stderr, "\n");
9751 while (i < regdepslen)
9753 const struct ia64_dependency *dep = regdeps[i].dependency;
9756 && regdeps[i].qp_regno != qp_regno)
9763 && CURR_SLOT.src_file == regdeps[i].file
9764 && CURR_SLOT.src_line == regdeps[i].line)
9770 /* clear dependencies which are automatically cleared by a stop, or
9771 those that have reached the appropriate state of insn serialization */
9772 if (dep->semantics == IA64_DVS_IMPLIED
9773 || dep->semantics == IA64_DVS_IMPLIEDF
9774 || regdeps[i].insn_srlz == STATE_SRLZ)
9776 print_dependency ("Removing", i);
9777 regdeps[i] = regdeps[--regdepslen];
9781 if (dep->semantics == IA64_DVS_DATA
9782 || dep->semantics == IA64_DVS_INSTR
9783 || dep->semantics == IA64_DVS_SPECIFIC)
9785 if (regdeps[i].insn_srlz == STATE_NONE)
9786 regdeps[i].insn_srlz = STATE_STOP;
9787 if (regdeps[i].data_srlz == STATE_NONE)
9788 regdeps[i].data_srlz = STATE_STOP;
9795 /* Add the given resource usage spec to the list of active dependencies. */
9798 mark_resource (idesc, dep, spec, depind, path)
9799 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9800 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9805 if (regdepslen == regdepstotlen)
9807 regdepstotlen += 20;
9808 regdeps = (struct rsrc *)
9809 xrealloc ((void *) regdeps,
9810 regdepstotlen * sizeof (struct rsrc));
9813 regdeps[regdepslen] = *spec;
9814 regdeps[regdepslen].depind = depind;
9815 regdeps[regdepslen].path = path;
9816 regdeps[regdepslen].file = CURR_SLOT.src_file;
9817 regdeps[regdepslen].line = CURR_SLOT.src_line;
9819 print_dependency ("Adding", regdepslen);
9825 print_dependency (action, depind)
9831 fprintf (stderr, " %s %s '%s'",
9832 action, dv_mode[(regdeps[depind].dependency)->mode],
9833 (regdeps[depind].dependency)->name);
9834 if (regdeps[depind].specific && regdeps[depind].index != 0)
9835 fprintf (stderr, " (%d)", regdeps[depind].index);
9836 if (regdeps[depind].mem_offset.hint)
9838 fputs (" ", stderr);
9839 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9840 fputs ("+", stderr);
9841 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9843 fprintf (stderr, "\n");
9848 instruction_serialization ()
9852 fprintf (stderr, " Instruction serialization\n");
9853 for (i = 0; i < regdepslen; i++)
9854 if (regdeps[i].insn_srlz == STATE_STOP)
9855 regdeps[i].insn_srlz = STATE_SRLZ;
9859 data_serialization ()
9863 fprintf (stderr, " Data serialization\n");
9864 while (i < regdepslen)
9866 if (regdeps[i].data_srlz == STATE_STOP
9867 /* Note: as of 991210, all "other" dependencies are cleared by a
9868 data serialization. This might change with new tables */
9869 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9871 print_dependency ("Removing", i);
9872 regdeps[i] = regdeps[--regdepslen];
9879 /* Insert stops and serializations as needed to avoid DVs. */
9882 remove_marked_resource (rs)
9885 switch (rs->dependency->semantics)
9887 case IA64_DVS_SPECIFIC:
9889 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9890 /* ...fall through... */
9891 case IA64_DVS_INSTR:
9893 fprintf (stderr, "Inserting instr serialization\n");
9894 if (rs->insn_srlz < STATE_STOP)
9895 insn_group_break (1, 0, 0);
9896 if (rs->insn_srlz < STATE_SRLZ)
9898 struct slot oldslot = CURR_SLOT;
9899 /* Manually jam a srlz.i insn into the stream */
9900 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9901 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9902 instruction_serialization ();
9903 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9904 if (++md.num_slots_in_use >= NUM_SLOTS)
9906 CURR_SLOT = oldslot;
9908 insn_group_break (1, 0, 0);
9910 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9911 "other" types of DV are eliminated
9912 by a data serialization */
9915 fprintf (stderr, "Inserting data serialization\n");
9916 if (rs->data_srlz < STATE_STOP)
9917 insn_group_break (1, 0, 0);
9919 struct slot oldslot = CURR_SLOT;
9920 /* Manually jam a srlz.d insn into the stream */
9921 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9922 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9923 data_serialization ();
9924 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9925 if (++md.num_slots_in_use >= NUM_SLOTS)
9927 CURR_SLOT = oldslot;
9930 case IA64_DVS_IMPLIED:
9931 case IA64_DVS_IMPLIEDF:
9933 fprintf (stderr, "Inserting stop\n");
9934 insn_group_break (1, 0, 0);
9941 /* Check the resources used by the given opcode against the current dependency
9944 The check is run once for each execution path encountered. In this case,
9945 a unique execution path is the sequence of instructions following a code
9946 entry point, e.g. the following has three execution paths, one starting
9947 at L0, one at L1, and one at L2.
9956 check_dependencies (idesc)
9957 struct ia64_opcode *idesc;
9959 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9963 /* Note that the number of marked resources may change within the
9964 loop if in auto mode. */
9966 while (i < regdepslen)
9968 struct rsrc *rs = ®deps[i];
9969 const struct ia64_dependency *dep = rs->dependency;
9974 if (dep->semantics == IA64_DVS_NONE
9975 || (chkind = depends_on (rs->depind, idesc)) == -1)
9981 note = NOTE (opdeps->chks[chkind]);
9983 /* Check this resource against each execution path seen thus far. */
9984 for (path = 0; path <= md.path; path++)
9988 /* If the dependency wasn't on the path being checked, ignore it. */
9989 if (rs->path < path)
9992 /* If the QP for this insn implies a QP which has branched, don't
9993 bother checking. Ed. NOTE: I don't think this check is terribly
9994 useful; what's the point of generating code which will only be
9995 reached if its QP is zero?
9996 This code was specifically inserted to handle the following code,
9997 based on notes from Intel's DV checking code, where p1 implies p2.
10003 if (CURR_SLOT.qp_regno != 0)
10007 for (implies = 0; implies < qp_implieslen; implies++)
10009 if (qp_implies[implies].path >= path
10010 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10011 && qp_implies[implies].p2_branched)
10021 if ((matchtype = resources_match (rs, idesc, note,
10022 CURR_SLOT.qp_regno, path)) != 0)
10025 char pathmsg[256] = "";
10026 char indexmsg[256] = "";
10027 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10030 sprintf (pathmsg, " when entry is at label '%s'",
10031 md.entry_labels[path - 1]);
10032 if (rs->specific && rs->index != 0)
10033 sprintf (indexmsg, ", specific resource number is %d",
10035 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10037 (certain ? "violates" : "may violate"),
10038 dv_mode[dep->mode], dep->name,
10039 dv_sem[dep->semantics],
10040 pathmsg, indexmsg);
10042 if (md.explicit_mode)
10044 as_warn ("%s", msg);
10045 if (path < md.path)
10046 as_warn (_("Only the first path encountering the conflict "
10048 as_warn_where (rs->file, rs->line,
10049 _("This is the location of the "
10050 "conflicting usage"));
10051 /* Don't bother checking other paths, to avoid duplicating
10052 the same warning */
10058 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10060 remove_marked_resource (rs);
10062 /* since the set of dependencies has changed, start over */
10063 /* FIXME -- since we're removing dvs as we go, we
10064 probably don't really need to start over... */
10077 /* Register new dependencies based on the given opcode. */
10080 mark_resources (idesc)
10081 struct ia64_opcode *idesc;
10084 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10085 int add_only_qp_reads = 0;
10087 /* A conditional branch only uses its resources if it is taken; if it is
10088 taken, we stop following that path. The other branch types effectively
10089 *always* write their resources. If it's not taken, register only QP
10091 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10093 add_only_qp_reads = 1;
10097 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10099 for (i = 0; i < opdeps->nregs; i++)
10101 const struct ia64_dependency *dep;
10102 struct rsrc specs[MAX_SPECS];
10107 dep = ia64_find_dependency (opdeps->regs[i]);
10108 note = NOTE (opdeps->regs[i]);
10110 if (add_only_qp_reads
10111 && !(dep->mode == IA64_DV_WAR
10112 && (dep->specifier == IA64_RS_PR
10113 || dep->specifier == IA64_RS_PRr
10114 || dep->specifier == IA64_RS_PR63)))
10117 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10119 while (count-- > 0)
10121 mark_resource (idesc, dep, &specs[count],
10122 DEP (opdeps->regs[i]), md.path);
10125 /* The execution path may affect register values, which may in turn
10126 affect which indirect-access resources are accessed. */
10127 switch (dep->specifier)
10131 case IA64_RS_CPUID:
10139 for (path = 0; path < md.path; path++)
10141 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10142 while (count-- > 0)
10143 mark_resource (idesc, dep, &specs[count],
10144 DEP (opdeps->regs[i]), path);
10151 /* Remove dependencies when they no longer apply. */
10154 update_dependencies (idesc)
10155 struct ia64_opcode *idesc;
10159 if (strcmp (idesc->name, "srlz.i") == 0)
10161 instruction_serialization ();
10163 else if (strcmp (idesc->name, "srlz.d") == 0)
10165 data_serialization ();
10167 else if (is_interruption_or_rfi (idesc)
10168 || is_taken_branch (idesc))
10170 /* Although technically the taken branch doesn't clear dependencies
10171 which require a srlz.[id], we don't follow the branch; the next
10172 instruction is assumed to start with a clean slate. */
10176 else if (is_conditional_branch (idesc)
10177 && CURR_SLOT.qp_regno != 0)
10179 int is_call = strstr (idesc->name, ".call") != NULL;
10181 for (i = 0; i < qp_implieslen; i++)
10183 /* If the conditional branch's predicate is implied by the predicate
10184 in an existing dependency, remove that dependency. */
10185 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10188 /* Note that this implied predicate takes a branch so that if
10189 a later insn generates a DV but its predicate implies this
10190 one, we can avoid the false DV warning. */
10191 qp_implies[i].p2_branched = 1;
10192 while (depind < regdepslen)
10194 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10196 print_dependency ("Removing", depind);
10197 regdeps[depind] = regdeps[--regdepslen];
10204 /* Any marked resources which have this same predicate should be
10205 cleared, provided that the QP hasn't been modified between the
10206 marking instruction and the branch. */
10209 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10214 while (i < regdepslen)
10216 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10217 && regdeps[i].link_to_qp_branch
10218 && (regdeps[i].file != CURR_SLOT.src_file
10219 || regdeps[i].line != CURR_SLOT.src_line))
10221 /* Treat like a taken branch */
10222 print_dependency ("Removing", i);
10223 regdeps[i] = regdeps[--regdepslen];
10232 /* Examine the current instruction for dependency violations. */
10236 struct ia64_opcode *idesc;
10240 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10241 idesc->name, CURR_SLOT.src_line,
10242 idesc->dependencies->nchks,
10243 idesc->dependencies->nregs);
10246 /* Look through the list of currently marked resources; if the current
10247 instruction has the dependency in its chks list which uses that resource,
10248 check against the specific resources used. */
10249 check_dependencies (idesc);
10251 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10252 then add them to the list of marked resources. */
10253 mark_resources (idesc);
10255 /* There are several types of dependency semantics, and each has its own
10256 requirements for being cleared
10258 Instruction serialization (insns separated by interruption, rfi, or
10259 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10261 Data serialization (instruction serialization, or writer + srlz.d +
10262 reader, where writer and srlz.d are in separate groups) clears
10263 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10264 always be the case).
10266 Instruction group break (groups separated by stop, taken branch,
10267 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10269 update_dependencies (idesc);
10271 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10272 warning. Keep track of as many as possible that are useful. */
10273 note_register_values (idesc);
10275 /* We don't need or want this anymore. */
10276 md.mem_offset.hint = 0;
10281 /* Translate one line of assembly. Pseudo ops and labels do not show
10287 char *saved_input_line_pointer, *mnemonic;
10288 const struct pseudo_opcode *pdesc;
10289 struct ia64_opcode *idesc;
10290 unsigned char qp_regno;
10291 unsigned int flags;
10294 saved_input_line_pointer = input_line_pointer;
10295 input_line_pointer = str;
10297 /* extract the opcode (mnemonic): */
10299 mnemonic = input_line_pointer;
10300 ch = get_symbol_end ();
10301 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10304 *input_line_pointer = ch;
10305 (*pdesc->handler) (pdesc->arg);
10309 /* Find the instruction descriptor matching the arguments. */
10311 idesc = ia64_find_opcode (mnemonic);
10312 *input_line_pointer = ch;
10315 as_bad ("Unknown opcode `%s'", mnemonic);
10319 idesc = parse_operands (idesc);
10323 /* Handle the dynamic ops we can handle now: */
10324 if (idesc->type == IA64_TYPE_DYN)
10326 if (strcmp (idesc->name, "add") == 0)
10328 if (CURR_SLOT.opnd[2].X_op == O_register
10329 && CURR_SLOT.opnd[2].X_add_number < 4)
10333 ia64_free_opcode (idesc);
10334 idesc = ia64_find_opcode (mnemonic);
10336 else if (strcmp (idesc->name, "mov") == 0)
10338 enum ia64_opnd opnd1, opnd2;
10341 opnd1 = idesc->operands[0];
10342 opnd2 = idesc->operands[1];
10343 if (opnd1 == IA64_OPND_AR3)
10345 else if (opnd2 == IA64_OPND_AR3)
10349 if (CURR_SLOT.opnd[rop].X_op == O_register)
10351 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10352 mnemonic = "mov.i";
10353 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10354 mnemonic = "mov.m";
10362 ia64_free_opcode (idesc);
10363 idesc = ia64_find_opcode (mnemonic);
10364 while (idesc != NULL
10365 && (idesc->operands[0] != opnd1
10366 || idesc->operands[1] != opnd2))
10367 idesc = get_next_opcode (idesc);
10371 else if (strcmp (idesc->name, "mov.i") == 0
10372 || strcmp (idesc->name, "mov.m") == 0)
10374 enum ia64_opnd opnd1, opnd2;
10377 opnd1 = idesc->operands[0];
10378 opnd2 = idesc->operands[1];
10379 if (opnd1 == IA64_OPND_AR3)
10381 else if (opnd2 == IA64_OPND_AR3)
10385 if (CURR_SLOT.opnd[rop].X_op == O_register)
10388 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10390 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10392 if (unit != 'a' && unit != idesc->name [4])
10393 as_bad ("AR %d cannot be accessed by %c-unit",
10394 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10400 if (md.qp.X_op == O_register)
10402 qp_regno = md.qp.X_add_number - REG_P;
10403 md.qp.X_op = O_absent;
10406 flags = idesc->flags;
10408 if ((flags & IA64_OPCODE_FIRST) != 0)
10410 /* The alignment frag has to end with a stop bit only if the
10411 next instruction after the alignment directive has to be
10412 the first instruction in an instruction group. */
10415 while (align_frag->fr_type != rs_align_code)
10417 align_frag = align_frag->fr_next;
10421 /* align_frag can be NULL if there are directives in
10423 if (align_frag && align_frag->fr_next == frag_now)
10424 align_frag->tc_frag_data = 1;
10427 insn_group_break (1, 0, 0);
10431 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10433 as_bad ("`%s' cannot be predicated", idesc->name);
10437 /* Build the instruction. */
10438 CURR_SLOT.qp_regno = qp_regno;
10439 CURR_SLOT.idesc = idesc;
10440 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10441 dwarf2_where (&CURR_SLOT.debug_line);
10443 /* Add unwind entry, if there is one. */
10444 if (unwind.current_entry)
10446 CURR_SLOT.unwind_record = unwind.current_entry;
10447 unwind.current_entry = NULL;
10449 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10452 /* Check for dependency violations. */
10456 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10457 if (++md.num_slots_in_use >= NUM_SLOTS)
10458 emit_one_bundle ();
10460 if ((flags & IA64_OPCODE_LAST) != 0)
10461 insn_group_break (1, 0, 0);
10463 md.last_text_seg = now_seg;
10466 input_line_pointer = saved_input_line_pointer;
10469 /* Called when symbol NAME cannot be found in the symbol table.
10470 Should be used for dynamic valued symbols only. */
10473 md_undefined_symbol (name)
10474 char *name ATTRIBUTE_UNUSED;
10479 /* Called for any expression that can not be recognized. When the
10480 function is called, `input_line_pointer' will point to the start of
10487 switch (*input_line_pointer)
10490 ++input_line_pointer;
10492 if (*input_line_pointer != ']')
10494 as_bad ("Closing bracket missing");
10499 if (e->X_op != O_register)
10500 as_bad ("Register expected as index");
10502 ++input_line_pointer;
10513 ignore_rest_of_line ();
10516 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10517 a section symbol plus some offset. For relocs involving @fptr(),
10518 directives we don't want such adjustments since we need to have the
10519 original symbol's name in the reloc. */
10521 ia64_fix_adjustable (fix)
10524 /* Prevent all adjustments to global symbols */
10525 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10528 switch (fix->fx_r_type)
10530 case BFD_RELOC_IA64_FPTR64I:
10531 case BFD_RELOC_IA64_FPTR32MSB:
10532 case BFD_RELOC_IA64_FPTR32LSB:
10533 case BFD_RELOC_IA64_FPTR64MSB:
10534 case BFD_RELOC_IA64_FPTR64LSB:
10535 case BFD_RELOC_IA64_LTOFF_FPTR22:
10536 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10546 ia64_force_relocation (fix)
10549 switch (fix->fx_r_type)
10551 case BFD_RELOC_IA64_FPTR64I:
10552 case BFD_RELOC_IA64_FPTR32MSB:
10553 case BFD_RELOC_IA64_FPTR32LSB:
10554 case BFD_RELOC_IA64_FPTR64MSB:
10555 case BFD_RELOC_IA64_FPTR64LSB:
10557 case BFD_RELOC_IA64_LTOFF22:
10558 case BFD_RELOC_IA64_LTOFF64I:
10559 case BFD_RELOC_IA64_LTOFF_FPTR22:
10560 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10561 case BFD_RELOC_IA64_PLTOFF22:
10562 case BFD_RELOC_IA64_PLTOFF64I:
10563 case BFD_RELOC_IA64_PLTOFF64MSB:
10564 case BFD_RELOC_IA64_PLTOFF64LSB:
10566 case BFD_RELOC_IA64_LTOFF22X:
10567 case BFD_RELOC_IA64_LDXMOV:
10574 return generic_force_reloc (fix);
10577 /* Decide from what point a pc-relative relocation is relative to,
10578 relative to the pc-relative fixup. Er, relatively speaking. */
10580 ia64_pcrel_from_section (fix, sec)
10584 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10586 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10593 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10595 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10599 expr.X_op = O_pseudo_fixup;
10600 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10601 expr.X_add_number = 0;
10602 expr.X_add_symbol = symbol;
10603 emit_expr (&expr, size);
10606 /* This is called whenever some data item (not an instruction) needs a
10607 fixup. We pick the right reloc code depending on the byteorder
10608 currently in effect. */
10610 ia64_cons_fix_new (f, where, nbytes, exp)
10616 bfd_reloc_code_real_type code;
10621 /* There are no reloc for 8 and 16 bit quantities, but we allow
10622 them here since they will work fine as long as the expression
10623 is fully defined at the end of the pass over the source file. */
10624 case 1: code = BFD_RELOC_8; break;
10625 case 2: code = BFD_RELOC_16; break;
10627 if (target_big_endian)
10628 code = BFD_RELOC_IA64_DIR32MSB;
10630 code = BFD_RELOC_IA64_DIR32LSB;
10634 /* In 32-bit mode, data8 could mean function descriptors too. */
10635 if (exp->X_op == O_pseudo_fixup
10636 && exp->X_op_symbol
10637 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10638 && !(md.flags & EF_IA_64_ABI64))
10640 if (target_big_endian)
10641 code = BFD_RELOC_IA64_IPLTMSB;
10643 code = BFD_RELOC_IA64_IPLTLSB;
10644 exp->X_op = O_symbol;
10649 if (target_big_endian)
10650 code = BFD_RELOC_IA64_DIR64MSB;
10652 code = BFD_RELOC_IA64_DIR64LSB;
10657 if (exp->X_op == O_pseudo_fixup
10658 && exp->X_op_symbol
10659 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10661 if (target_big_endian)
10662 code = BFD_RELOC_IA64_IPLTMSB;
10664 code = BFD_RELOC_IA64_IPLTLSB;
10665 exp->X_op = O_symbol;
10671 as_bad ("Unsupported fixup size %d", nbytes);
10672 ignore_rest_of_line ();
10676 if (exp->X_op == O_pseudo_fixup)
10678 exp->X_op = O_symbol;
10679 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10680 /* ??? If code unchanged, unsupported. */
10683 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10684 /* We need to store the byte order in effect in case we're going
10685 to fix an 8 or 16 bit relocation (for which there no real
10686 relocs available). See md_apply_fix3(). */
10687 fix->tc_fix_data.bigendian = target_big_endian;
10690 /* Return the actual relocation we wish to associate with the pseudo
10691 reloc described by SYM and R_TYPE. SYM should be one of the
10692 symbols in the pseudo_func array, or NULL. */
10694 static bfd_reloc_code_real_type
10695 ia64_gen_real_reloc_type (sym, r_type)
10696 struct symbol *sym;
10697 bfd_reloc_code_real_type r_type;
10699 bfd_reloc_code_real_type new = 0;
10706 switch (S_GET_VALUE (sym))
10708 case FUNC_FPTR_RELATIVE:
10711 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10712 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10713 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10714 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10715 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10720 case FUNC_GP_RELATIVE:
10723 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10724 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10725 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10726 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10727 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10728 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10733 case FUNC_LT_RELATIVE:
10736 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10737 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10742 case FUNC_LT_RELATIVE_X:
10745 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10750 case FUNC_PC_RELATIVE:
10753 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10754 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10755 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10756 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10757 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10758 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10763 case FUNC_PLT_RELATIVE:
10766 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10767 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10768 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10769 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10774 case FUNC_SEC_RELATIVE:
10777 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10778 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10779 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10780 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10785 case FUNC_SEG_RELATIVE:
10788 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10789 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10790 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10791 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10796 case FUNC_LTV_RELATIVE:
10799 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10800 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10801 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10802 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10807 case FUNC_LT_FPTR_RELATIVE:
10810 case BFD_RELOC_IA64_IMM22:
10811 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10812 case BFD_RELOC_IA64_IMM64:
10813 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10819 case FUNC_TP_RELATIVE:
10822 case BFD_RELOC_IA64_IMM14:
10823 new = BFD_RELOC_IA64_TPREL14; break;
10824 case BFD_RELOC_IA64_IMM22:
10825 new = BFD_RELOC_IA64_TPREL22; break;
10826 case BFD_RELOC_IA64_IMM64:
10827 new = BFD_RELOC_IA64_TPREL64I; break;
10833 case FUNC_LT_TP_RELATIVE:
10836 case BFD_RELOC_IA64_IMM22:
10837 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10843 case FUNC_LT_DTP_MODULE:
10846 case BFD_RELOC_IA64_IMM22:
10847 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10853 case FUNC_DTP_RELATIVE:
10856 case BFD_RELOC_IA64_DIR64MSB:
10857 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10858 case BFD_RELOC_IA64_DIR64LSB:
10859 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10860 case BFD_RELOC_IA64_IMM14:
10861 new = BFD_RELOC_IA64_DTPREL14; break;
10862 case BFD_RELOC_IA64_IMM22:
10863 new = BFD_RELOC_IA64_DTPREL22; break;
10864 case BFD_RELOC_IA64_IMM64:
10865 new = BFD_RELOC_IA64_DTPREL64I; break;
10871 case FUNC_LT_DTP_RELATIVE:
10874 case BFD_RELOC_IA64_IMM22:
10875 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10881 case FUNC_IPLT_RELOC:
10888 /* Hmmmm. Should this ever occur? */
10895 /* Here is where generate the appropriate reloc for pseudo relocation
10898 ia64_validate_fix (fix)
10901 switch (fix->fx_r_type)
10903 case BFD_RELOC_IA64_FPTR64I:
10904 case BFD_RELOC_IA64_FPTR32MSB:
10905 case BFD_RELOC_IA64_FPTR64LSB:
10906 case BFD_RELOC_IA64_LTOFF_FPTR22:
10907 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10908 if (fix->fx_offset != 0)
10909 as_bad_where (fix->fx_file, fix->fx_line,
10910 "No addend allowed in @fptr() relocation");
10918 fix_insn (fix, odesc, value)
10920 const struct ia64_operand *odesc;
10923 bfd_vma insn[3], t0, t1, control_bits;
10928 slot = fix->fx_where & 0x3;
10929 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10931 /* Bundles are always in little-endian byte order */
10932 t0 = bfd_getl64 (fixpos);
10933 t1 = bfd_getl64 (fixpos + 8);
10934 control_bits = t0 & 0x1f;
10935 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10936 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10937 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10940 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10942 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10943 insn[2] |= (((value & 0x7f) << 13)
10944 | (((value >> 7) & 0x1ff) << 27)
10945 | (((value >> 16) & 0x1f) << 22)
10946 | (((value >> 21) & 0x1) << 21)
10947 | (((value >> 63) & 0x1) << 36));
10949 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10951 if (value & ~0x3fffffffffffffffULL)
10952 err = "integer operand out of range";
10953 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10954 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10956 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10959 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10960 insn[2] |= ((((value >> 59) & 0x1) << 36)
10961 | (((value >> 0) & 0xfffff) << 13));
10964 err = (*odesc->insert) (odesc, value, insn + slot);
10967 as_bad_where (fix->fx_file, fix->fx_line, err);
10969 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10970 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10971 number_to_chars_littleendian (fixpos + 0, t0, 8);
10972 number_to_chars_littleendian (fixpos + 8, t1, 8);
10975 /* Attempt to simplify or even eliminate a fixup. The return value is
10976 ignored; perhaps it was once meaningful, but now it is historical.
10977 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10979 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10983 md_apply_fix3 (fix, valP, seg)
10986 segT seg ATTRIBUTE_UNUSED;
10989 valueT value = *valP;
10991 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10995 switch (fix->fx_r_type)
10997 case BFD_RELOC_IA64_DIR32MSB:
10998 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
11001 case BFD_RELOC_IA64_DIR32LSB:
11002 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
11005 case BFD_RELOC_IA64_DIR64MSB:
11006 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
11009 case BFD_RELOC_IA64_DIR64LSB:
11010 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
11019 switch (fix->fx_r_type)
11021 case BFD_RELOC_UNUSED:
11022 /* This must be a TAG13 or TAG13b operand. There are no external
11023 relocs defined for them, so we must give an error. */
11024 as_bad_where (fix->fx_file, fix->fx_line,
11025 "%s must have a constant value",
11026 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11030 case BFD_RELOC_IA64_TPREL14:
11031 case BFD_RELOC_IA64_TPREL22:
11032 case BFD_RELOC_IA64_TPREL64I:
11033 case BFD_RELOC_IA64_LTOFF_TPREL22:
11034 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11035 case BFD_RELOC_IA64_DTPREL14:
11036 case BFD_RELOC_IA64_DTPREL22:
11037 case BFD_RELOC_IA64_DTPREL64I:
11038 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11039 S_SET_THREAD_LOCAL (fix->fx_addsy);
11046 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11048 if (fix->tc_fix_data.bigendian)
11049 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11051 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11056 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11061 /* Generate the BFD reloc to be stuck in the object file from the
11062 fixup used internally in the assembler. */
11065 tc_gen_reloc (sec, fixp)
11066 asection *sec ATTRIBUTE_UNUSED;
11071 reloc = xmalloc (sizeof (*reloc));
11072 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11073 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11074 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11075 reloc->addend = fixp->fx_offset;
11076 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11080 as_bad_where (fixp->fx_file, fixp->fx_line,
11081 "Cannot represent %s relocation in object file",
11082 bfd_get_reloc_code_name (fixp->fx_r_type));
11087 /* Turn a string in input_line_pointer into a floating point constant
11088 of type TYPE, and store the appropriate bytes in *LIT. The number
11089 of LITTLENUMS emitted is stored in *SIZE. An error message is
11090 returned, or NULL on OK. */
11092 #define MAX_LITTLENUMS 5
11095 md_atof (type, lit, size)
11100 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11130 return "Bad call to MD_ATOF()";
11132 t = atof_ieee (input_line_pointer, type, words);
11134 input_line_pointer = t;
11136 (*ia64_float_to_chars) (lit, words, prec);
11140 /* It is 10 byte floating point with 6 byte padding. */
11141 memset (&lit [10], 0, 6);
11142 *size = 8 * sizeof (LITTLENUM_TYPE);
11145 *size = prec * sizeof (LITTLENUM_TYPE);
11150 /* Handle ia64 specific semantics of the align directive. */
11153 ia64_md_do_align (n, fill, len, max)
11154 int n ATTRIBUTE_UNUSED;
11155 const char *fill ATTRIBUTE_UNUSED;
11156 int len ATTRIBUTE_UNUSED;
11157 int max ATTRIBUTE_UNUSED;
11159 if (subseg_text_p (now_seg))
11160 ia64_flush_insns ();
11163 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11164 of an rs_align_code fragment. */
11167 ia64_handle_align (fragp)
11170 /* Use mfi bundle of nops with no stop bits. */
11171 static const unsigned char le_nop[]
11172 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11173 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11174 static const unsigned char le_nop_stop[]
11175 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11176 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11180 const unsigned char *nop;
11182 if (fragp->fr_type != rs_align_code)
11185 /* Check if this frag has to end with a stop bit. */
11186 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11188 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11189 p = fragp->fr_literal + fragp->fr_fix;
11191 /* If no paddings are needed, we check if we need a stop bit. */
11192 if (!bytes && fragp->tc_frag_data)
11194 if (fragp->fr_fix < 16)
11196 /* FIXME: It won't work with
11198 alloc r32=ar.pfs,1,2,4,0
11202 as_bad_where (fragp->fr_file, fragp->fr_line,
11203 _("Can't add stop bit to mark end of instruction group"));
11206 /* Bundles are always in little-endian byte order. Make sure
11207 the previous bundle has the stop bit. */
11211 /* Make sure we are on a 16-byte boundary, in case someone has been
11212 putting data into a text section. */
11215 int fix = bytes & 15;
11216 memset (p, 0, fix);
11219 fragp->fr_fix += fix;
11222 /* Instruction bundles are always little-endian. */
11223 memcpy (p, nop, 16);
11224 fragp->fr_var = 16;
11228 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11233 number_to_chars_bigendian (lit, (long) (*words++),
11234 sizeof (LITTLENUM_TYPE));
11235 lit += sizeof (LITTLENUM_TYPE);
11240 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11245 number_to_chars_littleendian (lit, (long) (words[prec]),
11246 sizeof (LITTLENUM_TYPE));
11247 lit += sizeof (LITTLENUM_TYPE);
11252 ia64_elf_section_change_hook (void)
11254 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11255 && elf_linked_to_section (now_seg) == NULL)
11256 elf_linked_to_section (now_seg) = text_section;
11257 dot_byteorder (-1);
11260 /* Check if a label should be made global. */
11262 ia64_check_label (symbolS *label)
11264 if (*input_line_pointer == ':')
11266 S_SET_EXTERNAL (label);
11267 input_line_pointer++;
11271 /* Used to remember where .alias and .secalias directives are seen. We
11272 will rename symbol and section names when we are about to output
11273 the relocatable file. */
11276 char *file; /* The file where the directive is seen. */
11277 unsigned int line; /* The line number the directive is at. */
11278 const char *name; /* The orignale name of the symbol. */
11281 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11282 .secalias. Otherwise, it is .alias. */
11284 dot_alias (int section)
11286 char *name, *alias;
11290 const char *error_string;
11293 struct hash_control *ahash, *nhash;
11296 name = input_line_pointer;
11297 delim = get_symbol_end ();
11298 end_name = input_line_pointer;
11301 if (name == end_name)
11303 as_bad (_("expected symbol name"));
11304 discard_rest_of_line ();
11308 SKIP_WHITESPACE ();
11310 if (*input_line_pointer != ',')
11313 as_bad (_("expected comma after \"%s\""), name);
11315 ignore_rest_of_line ();
11319 input_line_pointer++;
11322 /* We call demand_copy_C_string to check if alias string is valid.
11323 There should be a closing `"' and no `\0' in the string. */
11324 alias = demand_copy_C_string (&len);
11327 ignore_rest_of_line ();
11331 /* Make a copy of name string. */
11332 len = strlen (name) + 1;
11333 obstack_grow (¬es, name, len);
11334 name = obstack_finish (¬es);
11339 ahash = secalias_hash;
11340 nhash = secalias_name_hash;
11345 ahash = alias_hash;
11346 nhash = alias_name_hash;
11349 /* Check if alias has been used before. */
11350 h = (struct alias *) hash_find (ahash, alias);
11353 if (strcmp (h->name, name))
11354 as_bad (_("`%s' is already the alias of %s `%s'"),
11355 alias, kind, h->name);
11359 /* Check if name already has an alias. */
11360 a = (const char *) hash_find (nhash, name);
11363 if (strcmp (a, alias))
11364 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11368 h = (struct alias *) xmalloc (sizeof (struct alias));
11369 as_where (&h->file, &h->line);
11372 error_string = hash_jam (ahash, alias, (PTR) h);
11375 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11376 alias, kind, error_string);
11380 error_string = hash_jam (nhash, name, (PTR) alias);
11383 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11384 alias, kind, error_string);
11386 obstack_free (¬es, name);
11387 obstack_free (¬es, alias);
11390 demand_empty_rest_of_line ();
11393 /* It renames the original symbol name to its alias. */
11395 do_alias (const char *alias, PTR value)
11397 struct alias *h = (struct alias *) value;
11398 symbolS *sym = symbol_find (h->name);
11401 as_warn_where (h->file, h->line,
11402 _("symbol `%s' aliased to `%s' is not used"),
11405 S_SET_NAME (sym, (char *) alias);
11408 /* Called from write_object_file. */
11410 ia64_adjust_symtab (void)
11412 hash_traverse (alias_hash, do_alias);
11415 /* It renames the original section name to its alias. */
11417 do_secalias (const char *alias, PTR value)
11419 struct alias *h = (struct alias *) value;
11420 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11423 as_warn_where (h->file, h->line,
11424 _("section `%s' aliased to `%s' is not used"),
11430 /* Called from write_object_file. */
11432 ia64_frob_file (void)
11434 hash_traverse (secalias_hash, do_secalias);