1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS = 0,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
92 FUNC_LT_FPTR_RELATIVE,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix *next;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian;
160 /* This is the default endianness. */
161 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
163 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169 static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
172 static struct hash_control *alias_hash;
173 static struct hash_control *alias_name_hash;
174 static struct hash_control *secalias_hash;
175 static struct hash_control *secalias_name_hash;
177 /* Characters which always start a comment. */
178 const char comment_chars[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts = "m:N:x::";
199 struct option md_longopts[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
207 size_t md_longopts_size = sizeof (md_longopts);
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
217 symbolS *regsym[REG_NUM];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
232 keep_pending_output : 1;
234 /* What to do when something is wrong with unwind directives. */
237 unwind_check_warning,
241 /* Each bundle consists of up to three instructions. We keep
242 track of four most recent instructions so we can correctly set
243 the end_of_insn_group for the last instruction in a bundle. */
245 int num_slots_in_use;
249 end_of_insn_group : 1,
250 manual_bundling_on : 1,
251 manual_bundling_off : 1,
252 loc_directive_seen : 1;
253 signed char user_template; /* user-selected template, if any */
254 unsigned char qp_regno; /* qualifying predicate */
255 /* This duplicates a good fraction of "struct fix" but we
256 can't use a "struct fix" instead since we can't call
257 fix_new_exp() until we know the address of the instruction. */
261 bfd_reloc_code_real_type code;
262 enum ia64_opnd opnd; /* type of operand in need of fix */
263 unsigned int is_pcrel : 1; /* is operand pc-relative? */
264 expressionS expr; /* the value to be inserted */
266 fixup[2]; /* at most two fixups per insn */
267 struct ia64_opcode *idesc;
268 struct label_fix *label_fixups;
269 struct label_fix *tag_fixups;
270 struct unw_rec_list *unwind_record; /* Unwind directive. */
273 unsigned int src_line;
274 struct dwarf2_line_info debug_line;
282 struct dynreg *next; /* next dynamic register */
284 unsigned short base; /* the base register number */
285 unsigned short num_regs; /* # of registers in this set */
287 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
289 flagword flags; /* ELF-header flags */
292 unsigned hint:1; /* is this hint currently valid? */
293 bfd_vma offset; /* mem.offset offset */
294 bfd_vma base; /* mem.offset base */
297 int path; /* number of alt. entry points seen */
298 const char **entry_labels; /* labels of all alternate paths in
299 the current DV-checking block. */
300 int maxpaths; /* size currently allocated for
303 int pointer_size; /* size in bytes of a pointer */
304 int pointer_size_shift; /* shift size of a pointer for alignment */
308 /* application registers: */
314 #define AR_BSPSTORE 18
329 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
330 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
331 {"ar.rsc", 16}, {"ar.bsp", 17},
332 {"ar.bspstore", 18}, {"ar.rnat", 19},
333 {"ar.fcr", 21}, {"ar.eflag", 24},
334 {"ar.csd", 25}, {"ar.ssd", 26},
335 {"ar.cflg", 27}, {"ar.fsr", 28},
336 {"ar.fir", 29}, {"ar.fdr", 30},
337 {"ar.ccv", 32}, {"ar.unat", 36},
338 {"ar.fpsr", 40}, {"ar.itc", 44},
339 {"ar.pfs", 64}, {"ar.lc", 65},
360 /* control registers: */
402 static const struct const_desc
409 /* PSR constant masks: */
412 {"psr.be", ((valueT) 1) << 1},
413 {"psr.up", ((valueT) 1) << 2},
414 {"psr.ac", ((valueT) 1) << 3},
415 {"psr.mfl", ((valueT) 1) << 4},
416 {"psr.mfh", ((valueT) 1) << 5},
418 {"psr.ic", ((valueT) 1) << 13},
419 {"psr.i", ((valueT) 1) << 14},
420 {"psr.pk", ((valueT) 1) << 15},
422 {"psr.dt", ((valueT) 1) << 17},
423 {"psr.dfl", ((valueT) 1) << 18},
424 {"psr.dfh", ((valueT) 1) << 19},
425 {"psr.sp", ((valueT) 1) << 20},
426 {"psr.pp", ((valueT) 1) << 21},
427 {"psr.di", ((valueT) 1) << 22},
428 {"psr.si", ((valueT) 1) << 23},
429 {"psr.db", ((valueT) 1) << 24},
430 {"psr.lp", ((valueT) 1) << 25},
431 {"psr.tb", ((valueT) 1) << 26},
432 {"psr.rt", ((valueT) 1) << 27},
433 /* 28-31: reserved */
434 /* 32-33: cpl (current privilege level) */
435 {"psr.is", ((valueT) 1) << 34},
436 {"psr.mc", ((valueT) 1) << 35},
437 {"psr.it", ((valueT) 1) << 36},
438 {"psr.id", ((valueT) 1) << 37},
439 {"psr.da", ((valueT) 1) << 38},
440 {"psr.dd", ((valueT) 1) << 39},
441 {"psr.ss", ((valueT) 1) << 40},
442 /* 41-42: ri (restart instruction) */
443 {"psr.ed", ((valueT) 1) << 43},
444 {"psr.bn", ((valueT) 1) << 44},
447 /* indirect register-sets/memory: */
456 { "CPUID", IND_CPUID },
457 { "cpuid", IND_CPUID },
469 /* Pseudo functions used to indicate relocation types (these functions
470 start with an at sign (@). */
492 /* reloc pseudo functions (these must come first!): */
493 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
494 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
495 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
496 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
497 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
498 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
499 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
500 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
501 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
502 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
505 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
506 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
507 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
508 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
509 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
511 /* mbtype4 constants: */
512 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
513 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
514 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
515 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
516 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
518 /* fclass constants: */
519 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
520 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
521 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
522 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
523 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
524 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
525 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
526 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
527 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
529 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
531 /* hint constants: */
532 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
534 /* unwind-related constants: */
535 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
536 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
537 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
538 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
539 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
540 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
541 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
543 /* unwind-related registers: */
544 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
547 /* 41-bit nop opcodes (one per unit): */
548 static const bfd_vma nop[IA64_NUM_UNITS] =
550 0x0000000000LL, /* NIL => break 0 */
551 0x0008000000LL, /* I-unit nop */
552 0x0008000000LL, /* M-unit nop */
553 0x4000000000LL, /* B-unit nop */
554 0x0008000000LL, /* F-unit nop */
555 0x0008000000LL, /* L-"unit" nop */
556 0x0008000000LL, /* X-unit nop */
559 /* Can't be `const' as it's passed to input routines (which have the
560 habit of setting temporary sentinels. */
561 static char special_section_name[][20] =
563 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
564 {".IA_64.unwind"}, {".IA_64.unwind_info"},
565 {".init_array"}, {".fini_array"}
568 /* The best template for a particular sequence of up to three
570 #define N IA64_NUM_TYPES
571 static unsigned char best_template[N][N][N];
574 /* Resource dependencies currently in effect */
576 int depind; /* dependency index */
577 const struct ia64_dependency *dependency; /* actual dependency */
578 unsigned specific:1, /* is this a specific bit/regno? */
579 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
580 int index; /* specific regno/bit within dependency */
581 int note; /* optional qualifying note (0 if none) */
585 int insn_srlz; /* current insn serialization state */
586 int data_srlz; /* current data serialization state */
587 int qp_regno; /* qualifying predicate for this usage */
588 char *file; /* what file marked this dependency */
589 unsigned int line; /* what line marked this dependency */
590 struct mem_offset mem_offset; /* optional memory offset hint */
591 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
592 int path; /* corresponding code entry index */
594 static int regdepslen = 0;
595 static int regdepstotlen = 0;
596 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
597 static const char *dv_sem[] = { "none", "implied", "impliedf",
598 "data", "instr", "specific", "stop", "other" };
599 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
601 /* Current state of PR mutexation */
602 static struct qpmutex {
605 } *qp_mutexes = NULL; /* QP mutex bitmasks */
606 static int qp_mutexeslen = 0;
607 static int qp_mutexestotlen = 0;
608 static valueT qp_safe_across_calls = 0;
610 /* Current state of PR implications */
611 static struct qp_imply {
614 unsigned p2_branched:1;
616 } *qp_implies = NULL;
617 static int qp_implieslen = 0;
618 static int qp_impliestotlen = 0;
620 /* Keep track of static GR values so that indirect register usage can
621 sometimes be tracked. */
626 } gr_values[128] = {{ 1, 0, 0 }};
628 /* Remember the alignment frag. */
629 static fragS *align_frag;
631 /* These are the routines required to output the various types of
634 /* A slot_number is a frag address plus the slot index (0-2). We use the
635 frag address here so that if there is a section switch in the middle of
636 a function, then instructions emitted to a different section are not
637 counted. Since there may be more than one frag for a function, this
638 means we also need to keep track of which frag this address belongs to
639 so we can compute inter-frag distances. This also nicely solves the
640 problem with nops emitted for align directives, which can't easily be
641 counted, but can easily be derived from frag sizes. */
643 typedef struct unw_rec_list {
645 unsigned long slot_number;
647 unsigned long next_slot_number;
648 fragS *next_slot_frag;
649 struct unw_rec_list *next;
652 #define SLOT_NUM_NOT_SET (unsigned)-1
654 /* Linked list of saved prologue counts. A very poor
655 implementation of a map from label numbers to prologue counts. */
656 typedef struct label_prologue_count
658 struct label_prologue_count *next;
659 unsigned long label_number;
660 unsigned int prologue_count;
661 } label_prologue_count;
665 /* Maintain a list of unwind entries for the current function. */
669 /* Any unwind entires that should be attached to the current slot
670 that an insn is being constructed for. */
671 unw_rec_list *current_entry;
673 /* These are used to create the unwind table entry for this function. */
675 symbolS *info; /* pointer to unwind info */
676 symbolS *personality_routine;
678 subsegT saved_text_subseg;
679 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
681 /* TRUE if processing unwind directives in a prologue region. */
682 unsigned int prologue : 1;
683 unsigned int prologue_mask : 4;
684 unsigned int body : 1;
685 unsigned int insn : 1;
686 unsigned int prologue_count; /* number of .prologues seen so far */
687 /* Prologue counts at previous .label_state directives. */
688 struct label_prologue_count * saved_prologue_counts;
691 /* The input value is a negated offset from psp, and specifies an address
692 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
693 must add 16 and divide by 4 to get the encoded value. */
695 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
697 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
699 /* Forward declarations: */
700 static void set_section PARAMS ((char *name));
701 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
702 unsigned int, unsigned int));
703 static void dot_align (int);
704 static void dot_radix PARAMS ((int));
705 static void dot_special_section PARAMS ((int));
706 static void dot_proc PARAMS ((int));
707 static void dot_fframe PARAMS ((int));
708 static void dot_vframe PARAMS ((int));
709 static void dot_vframesp PARAMS ((int));
710 static void dot_vframepsp PARAMS ((int));
711 static void dot_save PARAMS ((int));
712 static void dot_restore PARAMS ((int));
713 static void dot_restorereg PARAMS ((int));
714 static void dot_restorereg_p PARAMS ((int));
715 static void dot_handlerdata PARAMS ((int));
716 static void dot_unwentry PARAMS ((int));
717 static void dot_altrp PARAMS ((int));
718 static void dot_savemem PARAMS ((int));
719 static void dot_saveg PARAMS ((int));
720 static void dot_savef PARAMS ((int));
721 static void dot_saveb PARAMS ((int));
722 static void dot_savegf PARAMS ((int));
723 static void dot_spill PARAMS ((int));
724 static void dot_spillreg PARAMS ((int));
725 static void dot_spillmem PARAMS ((int));
726 static void dot_spillreg_p PARAMS ((int));
727 static void dot_spillmem_p PARAMS ((int));
728 static void dot_label_state PARAMS ((int));
729 static void dot_copy_state PARAMS ((int));
730 static void dot_unwabi PARAMS ((int));
731 static void dot_personality PARAMS ((int));
732 static void dot_body PARAMS ((int));
733 static void dot_prologue PARAMS ((int));
734 static void dot_endp PARAMS ((int));
735 static void dot_template PARAMS ((int));
736 static void dot_regstk PARAMS ((int));
737 static void dot_rot PARAMS ((int));
738 static void dot_byteorder PARAMS ((int));
739 static void dot_psr PARAMS ((int));
740 static void dot_alias PARAMS ((int));
741 static void dot_ln PARAMS ((int));
742 static char *parse_section_name PARAMS ((void));
743 static void dot_xdata PARAMS ((int));
744 static void stmt_float_cons PARAMS ((int));
745 static void stmt_cons_ua PARAMS ((int));
746 static void dot_xfloat_cons PARAMS ((int));
747 static void dot_xstringer PARAMS ((int));
748 static void dot_xdata_ua PARAMS ((int));
749 static void dot_xfloat_cons_ua PARAMS ((int));
750 static void print_prmask PARAMS ((valueT mask));
751 static void dot_pred_rel PARAMS ((int));
752 static void dot_reg_val PARAMS ((int));
753 static void dot_serialize PARAMS ((int));
754 static void dot_dv_mode PARAMS ((int));
755 static void dot_entry PARAMS ((int));
756 static void dot_mem_offset PARAMS ((int));
757 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
758 static symbolS *declare_register PARAMS ((const char *name, int regnum));
759 static void declare_register_set PARAMS ((const char *, int, int));
760 static unsigned int operand_width PARAMS ((enum ia64_opnd));
761 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
764 static int parse_operand PARAMS ((expressionS *e));
765 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
766 static void build_insn PARAMS ((struct slot *, bfd_vma *));
767 static void emit_one_bundle PARAMS ((void));
768 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
769 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
770 bfd_reloc_code_real_type r_type));
771 static void insn_group_break PARAMS ((int, int, int));
772 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
773 struct rsrc *, int depind, int path));
774 static void add_qp_mutex PARAMS((valueT mask));
775 static void add_qp_imply PARAMS((int p1, int p2));
776 static void clear_qp_branch_flag PARAMS((valueT mask));
777 static void clear_qp_mutex PARAMS((valueT mask));
778 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
779 static int has_suffix_p PARAMS((const char *, const char *));
780 static void clear_register_values PARAMS ((void));
781 static void print_dependency PARAMS ((const char *action, int depind));
782 static void instruction_serialization PARAMS ((void));
783 static void data_serialization PARAMS ((void));
784 static void remove_marked_resource PARAMS ((struct rsrc *));
785 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
786 static int is_taken_branch PARAMS ((struct ia64_opcode *));
787 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
788 static int depends_on PARAMS ((int, struct ia64_opcode *));
789 static int specify_resource PARAMS ((const struct ia64_dependency *,
790 struct ia64_opcode *, int, struct rsrc [], int, int));
791 static int check_dv PARAMS((struct ia64_opcode *idesc));
792 static void check_dependencies PARAMS((struct ia64_opcode *));
793 static void mark_resources PARAMS((struct ia64_opcode *));
794 static void update_dependencies PARAMS((struct ia64_opcode *));
795 static void note_register_values PARAMS((struct ia64_opcode *));
796 static int qp_mutex PARAMS ((int, int, int));
797 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
798 static void output_vbyte_mem PARAMS ((int, char *, char *));
799 static void count_output PARAMS ((int, char *, char *));
800 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
801 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
802 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
803 static void output_P1_format PARAMS ((vbyte_func, int));
804 static void output_P2_format PARAMS ((vbyte_func, int, int));
805 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
806 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
807 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
808 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
809 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
810 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
811 static void output_P9_format PARAMS ((vbyte_func, int, int));
812 static void output_P10_format PARAMS ((vbyte_func, int, int));
813 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
814 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
815 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
817 static char format_ab_reg PARAMS ((int, int));
818 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
820 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
821 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
823 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
824 static unw_rec_list *output_endp PARAMS ((void));
825 static unw_rec_list *output_prologue PARAMS ((void));
826 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list *output_body PARAMS ((void));
828 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
829 static unw_rec_list *output_mem_stack_v PARAMS ((void));
830 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
831 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
832 static unw_rec_list *output_rp_when PARAMS ((void));
833 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
834 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_pfs_when PARAMS ((void));
838 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_preds_when PARAMS ((void));
842 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
846 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
849 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
852 static unw_rec_list *output_unat_when PARAMS ((void));
853 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_lc_when PARAMS ((void));
857 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_fpsr_when PARAMS ((void));
861 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
865 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
866 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_bsp_when PARAMS ((void));
870 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bspstore_when PARAMS ((void));
874 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_rnat_when PARAMS ((void));
878 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
883 static unw_rec_list *output_label_state PARAMS ((unsigned long));
884 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
885 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
896 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
897 static int calc_record_size PARAMS ((unw_rec_list *));
898 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
899 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
900 unsigned long, fragS *,
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
907 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
908 static void free_saved_prologue_counts PARAMS ((void));
910 /* Determine if application register REGNUM resides only in the integer
911 unit (as opposed to the memory unit). */
913 ar_is_only_in_integer_unit (int reg)
916 return reg >= 64 && reg <= 111;
919 /* Determine if application register REGNUM resides only in the memory
920 unit (as opposed to the integer unit). */
922 ar_is_only_in_memory_unit (int reg)
925 return reg >= 0 && reg <= 47;
928 /* Switch to section NAME and create section if necessary. It's
929 rather ugly that we have to manipulate input_line_pointer but I
930 don't see any other way to accomplish the same thing without
931 changing obj-elf.c (which may be the Right Thing, in the end). */
936 char *saved_input_line_pointer;
938 saved_input_line_pointer = input_line_pointer;
939 input_line_pointer = name;
941 input_line_pointer = saved_input_line_pointer;
944 /* Map 's' to SHF_IA_64_SHORT. */
947 ia64_elf_section_letter (letter, ptr_msg)
952 return SHF_IA_64_SHORT;
953 else if (letter == 'o')
954 return SHF_LINK_ORDER;
956 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
960 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
963 ia64_elf_section_flags (flags, attr, type)
965 int attr, type ATTRIBUTE_UNUSED;
967 if (attr & SHF_IA_64_SHORT)
968 flags |= SEC_SMALL_DATA;
973 ia64_elf_section_type (str, len)
977 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
979 if (STREQ (ELF_STRING_ia64_unwind_info))
982 if (STREQ (ELF_STRING_ia64_unwind_info_once))
985 if (STREQ (ELF_STRING_ia64_unwind))
986 return SHT_IA_64_UNWIND;
988 if (STREQ (ELF_STRING_ia64_unwind_once))
989 return SHT_IA_64_UNWIND;
991 if (STREQ ("unwind"))
992 return SHT_IA_64_UNWIND;
999 set_regstack (ins, locs, outs, rots)
1000 unsigned int ins, locs, outs, rots;
1002 /* Size of frame. */
1005 sof = ins + locs + outs;
1008 as_bad ("Size of frame exceeds maximum of 96 registers");
1013 as_warn ("Size of rotating registers exceeds frame size");
1016 md.in.base = REG_GR + 32;
1017 md.loc.base = md.in.base + ins;
1018 md.out.base = md.loc.base + locs;
1020 md.in.num_regs = ins;
1021 md.loc.num_regs = locs;
1022 md.out.num_regs = outs;
1023 md.rot.num_regs = rots;
1030 struct label_fix *lfix;
1032 subsegT saved_subseg;
1035 if (!md.last_text_seg)
1038 saved_seg = now_seg;
1039 saved_subseg = now_subseg;
1041 subseg_set (md.last_text_seg, 0);
1043 while (md.num_slots_in_use > 0)
1044 emit_one_bundle (); /* force out queued instructions */
1046 /* In case there are labels following the last instruction, resolve
1048 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1050 S_SET_VALUE (lfix->sym, frag_now_fix ());
1051 symbol_set_frag (lfix->sym, frag_now);
1053 CURR_SLOT.label_fixups = 0;
1054 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1056 S_SET_VALUE (lfix->sym, frag_now_fix ());
1057 symbol_set_frag (lfix->sym, frag_now);
1059 CURR_SLOT.tag_fixups = 0;
1061 /* In case there are unwind directives following the last instruction,
1062 resolve those now. We only handle prologue, body, and endp directives
1063 here. Give an error for others. */
1064 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1066 switch (ptr->r.type)
1072 ptr->slot_number = (unsigned long) frag_more (0);
1073 ptr->slot_frag = frag_now;
1076 /* Allow any record which doesn't have a "t" field (i.e.,
1077 doesn't relate to a particular instruction). */
1093 as_bad (_("Unwind directive not followed by an instruction."));
1097 unwind.current_entry = NULL;
1099 subseg_set (saved_seg, saved_subseg);
1101 if (md.qp.X_op == O_register)
1102 as_bad ("qualifying predicate not followed by instruction");
1106 ia64_do_align (int nbytes)
1108 char *saved_input_line_pointer = input_line_pointer;
1110 input_line_pointer = "";
1111 s_align_bytes (nbytes);
1112 input_line_pointer = saved_input_line_pointer;
1116 ia64_cons_align (nbytes)
1121 char *saved_input_line_pointer = input_line_pointer;
1122 input_line_pointer = "";
1123 s_align_bytes (nbytes);
1124 input_line_pointer = saved_input_line_pointer;
1128 /* Output COUNT bytes to a memory location. */
1129 static unsigned char *vbyte_mem_ptr = NULL;
1132 output_vbyte_mem (count, ptr, comment)
1135 char *comment ATTRIBUTE_UNUSED;
1138 if (vbyte_mem_ptr == NULL)
1143 for (x = 0; x < count; x++)
1144 *(vbyte_mem_ptr++) = ptr[x];
1147 /* Count the number of bytes required for records. */
1148 static int vbyte_count = 0;
1150 count_output (count, ptr, comment)
1152 char *ptr ATTRIBUTE_UNUSED;
1153 char *comment ATTRIBUTE_UNUSED;
1155 vbyte_count += count;
1159 output_R1_format (f, rtype, rlen)
1161 unw_record_type rtype;
1168 output_R3_format (f, rtype, rlen);
1174 else if (rtype != prologue)
1175 as_bad ("record type is not valid");
1177 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1178 (*f) (1, &byte, NULL);
1182 output_R2_format (f, mask, grsave, rlen)
1189 mask = (mask & 0x0f);
1190 grsave = (grsave & 0x7f);
1192 bytes[0] = (UNW_R2 | (mask >> 1));
1193 bytes[1] = (((mask & 0x01) << 7) | grsave);
1194 count += output_leb128 (bytes + 2, rlen, 0);
1195 (*f) (count, bytes, NULL);
1199 output_R3_format (f, rtype, rlen)
1201 unw_record_type rtype;
1208 output_R1_format (f, rtype, rlen);
1214 else if (rtype != prologue)
1215 as_bad ("record type is not valid");
1216 bytes[0] = (UNW_R3 | r);
1217 count = output_leb128 (bytes + 1, rlen, 0);
1218 (*f) (count + 1, bytes, NULL);
1222 output_P1_format (f, brmask)
1227 byte = UNW_P1 | (brmask & 0x1f);
1228 (*f) (1, &byte, NULL);
1232 output_P2_format (f, brmask, gr)
1238 brmask = (brmask & 0x1f);
1239 bytes[0] = UNW_P2 | (brmask >> 1);
1240 bytes[1] = (((brmask & 1) << 7) | gr);
1241 (*f) (2, bytes, NULL);
1245 output_P3_format (f, rtype, reg)
1247 unw_record_type rtype;
1292 as_bad ("Invalid record type for P3 format.");
1294 bytes[0] = (UNW_P3 | (r >> 1));
1295 bytes[1] = (((r & 1) << 7) | reg);
1296 (*f) (2, bytes, NULL);
1300 output_P4_format (f, imask, imask_size)
1302 unsigned char *imask;
1303 unsigned long imask_size;
1306 (*f) (imask_size, imask, NULL);
1310 output_P5_format (f, grmask, frmask)
1313 unsigned long frmask;
1316 grmask = (grmask & 0x0f);
1319 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1320 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1321 bytes[3] = (frmask & 0x000000ff);
1322 (*f) (4, bytes, NULL);
1326 output_P6_format (f, rtype, rmask)
1328 unw_record_type rtype;
1334 if (rtype == gr_mem)
1336 else if (rtype != fr_mem)
1337 as_bad ("Invalid record type for format P6");
1338 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1339 (*f) (1, &byte, NULL);
1343 output_P7_format (f, rtype, w1, w2)
1345 unw_record_type rtype;
1352 count += output_leb128 (bytes + 1, w1, 0);
1357 count += output_leb128 (bytes + count, w2 >> 4, 0);
1407 bytes[0] = (UNW_P7 | r);
1408 (*f) (count, bytes, NULL);
1412 output_P8_format (f, rtype, t)
1414 unw_record_type rtype;
1453 case bspstore_psprel:
1456 case bspstore_sprel:
1468 case priunat_when_gr:
1471 case priunat_psprel:
1477 case priunat_when_mem:
1484 count += output_leb128 (bytes + 2, t, 0);
1485 (*f) (count, bytes, NULL);
1489 output_P9_format (f, grmask, gr)
1496 bytes[1] = (grmask & 0x0f);
1497 bytes[2] = (gr & 0x7f);
1498 (*f) (3, bytes, NULL);
1502 output_P10_format (f, abi, context)
1509 bytes[1] = (abi & 0xff);
1510 bytes[2] = (context & 0xff);
1511 (*f) (3, bytes, NULL);
1515 output_B1_format (f, rtype, label)
1517 unw_record_type rtype;
1518 unsigned long label;
1524 output_B4_format (f, rtype, label);
1527 if (rtype == copy_state)
1529 else if (rtype != label_state)
1530 as_bad ("Invalid record type for format B1");
1532 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1533 (*f) (1, &byte, NULL);
1537 output_B2_format (f, ecount, t)
1539 unsigned long ecount;
1546 output_B3_format (f, ecount, t);
1549 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1550 count += output_leb128 (bytes + 1, t, 0);
1551 (*f) (count, bytes, NULL);
1555 output_B3_format (f, ecount, t)
1557 unsigned long ecount;
1564 output_B2_format (f, ecount, t);
1568 count += output_leb128 (bytes + 1, t, 0);
1569 count += output_leb128 (bytes + count, ecount, 0);
1570 (*f) (count, bytes, NULL);
1574 output_B4_format (f, rtype, label)
1576 unw_record_type rtype;
1577 unsigned long label;
1584 output_B1_format (f, rtype, label);
1588 if (rtype == copy_state)
1590 else if (rtype != label_state)
1591 as_bad ("Invalid record type for format B1");
1593 bytes[0] = (UNW_B4 | (r << 3));
1594 count += output_leb128 (bytes + 1, label, 0);
1595 (*f) (count, bytes, NULL);
1599 format_ab_reg (ab, reg)
1606 ret = (ab << 5) | reg;
1611 output_X1_format (f, rtype, ab, reg, t, w1)
1613 unw_record_type rtype;
1623 if (rtype == spill_sprel)
1625 else if (rtype != spill_psprel)
1626 as_bad ("Invalid record type for format X1");
1627 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1628 count += output_leb128 (bytes + 2, t, 0);
1629 count += output_leb128 (bytes + count, w1, 0);
1630 (*f) (count, bytes, NULL);
1634 output_X2_format (f, ab, reg, x, y, treg, t)
1643 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1644 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1645 count += output_leb128 (bytes + 3, t, 0);
1646 (*f) (count, bytes, NULL);
1650 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1652 unw_record_type rtype;
1663 if (rtype == spill_sprel_p)
1665 else if (rtype != spill_psprel_p)
1666 as_bad ("Invalid record type for format X3");
1667 bytes[1] = ((r << 7) | (qp & 0x3f));
1668 bytes[2] = format_ab_reg (ab, reg);
1669 count += output_leb128 (bytes + 3, t, 0);
1670 count += output_leb128 (bytes + count, w1, 0);
1671 (*f) (count, bytes, NULL);
1675 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1685 bytes[1] = (qp & 0x3f);
1686 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1687 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1688 count += output_leb128 (bytes + 4, t, 0);
1689 (*f) (count, bytes, NULL);
1692 /* This function allocates a record list structure, and initializes fields. */
1694 static unw_rec_list *
1695 alloc_record (unw_record_type t)
1698 ptr = xmalloc (sizeof (*ptr));
1700 ptr->slot_number = SLOT_NUM_NOT_SET;
1702 ptr->next_slot_number = 0;
1703 ptr->next_slot_frag = 0;
1707 /* Dummy unwind record used for calculating the length of the last prologue or
1710 static unw_rec_list *
1713 unw_rec_list *ptr = alloc_record (endp);
1717 static unw_rec_list *
1720 unw_rec_list *ptr = alloc_record (prologue);
1721 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1725 static unw_rec_list *
1726 output_prologue_gr (saved_mask, reg)
1727 unsigned int saved_mask;
1730 unw_rec_list *ptr = alloc_record (prologue_gr);
1731 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1732 ptr->r.record.r.grmask = saved_mask;
1733 ptr->r.record.r.grsave = reg;
1737 static unw_rec_list *
1740 unw_rec_list *ptr = alloc_record (body);
1744 static unw_rec_list *
1745 output_mem_stack_f (size)
1748 unw_rec_list *ptr = alloc_record (mem_stack_f);
1749 ptr->r.record.p.size = size;
1753 static unw_rec_list *
1754 output_mem_stack_v ()
1756 unw_rec_list *ptr = alloc_record (mem_stack_v);
1760 static unw_rec_list *
1764 unw_rec_list *ptr = alloc_record (psp_gr);
1765 ptr->r.record.p.gr = gr;
1769 static unw_rec_list *
1770 output_psp_sprel (offset)
1771 unsigned int offset;
1773 unw_rec_list *ptr = alloc_record (psp_sprel);
1774 ptr->r.record.p.spoff = offset / 4;
1778 static unw_rec_list *
1781 unw_rec_list *ptr = alloc_record (rp_when);
1785 static unw_rec_list *
1789 unw_rec_list *ptr = alloc_record (rp_gr);
1790 ptr->r.record.p.gr = gr;
1794 static unw_rec_list *
1798 unw_rec_list *ptr = alloc_record (rp_br);
1799 ptr->r.record.p.br = br;
1803 static unw_rec_list *
1804 output_rp_psprel (offset)
1805 unsigned int offset;
1807 unw_rec_list *ptr = alloc_record (rp_psprel);
1808 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1812 static unw_rec_list *
1813 output_rp_sprel (offset)
1814 unsigned int offset;
1816 unw_rec_list *ptr = alloc_record (rp_sprel);
1817 ptr->r.record.p.spoff = offset / 4;
1821 static unw_rec_list *
1824 unw_rec_list *ptr = alloc_record (pfs_when);
1828 static unw_rec_list *
1832 unw_rec_list *ptr = alloc_record (pfs_gr);
1833 ptr->r.record.p.gr = gr;
1837 static unw_rec_list *
1838 output_pfs_psprel (offset)
1839 unsigned int offset;
1841 unw_rec_list *ptr = alloc_record (pfs_psprel);
1842 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1846 static unw_rec_list *
1847 output_pfs_sprel (offset)
1848 unsigned int offset;
1850 unw_rec_list *ptr = alloc_record (pfs_sprel);
1851 ptr->r.record.p.spoff = offset / 4;
1855 static unw_rec_list *
1856 output_preds_when ()
1858 unw_rec_list *ptr = alloc_record (preds_when);
1862 static unw_rec_list *
1863 output_preds_gr (gr)
1866 unw_rec_list *ptr = alloc_record (preds_gr);
1867 ptr->r.record.p.gr = gr;
1871 static unw_rec_list *
1872 output_preds_psprel (offset)
1873 unsigned int offset;
1875 unw_rec_list *ptr = alloc_record (preds_psprel);
1876 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1880 static unw_rec_list *
1881 output_preds_sprel (offset)
1882 unsigned int offset;
1884 unw_rec_list *ptr = alloc_record (preds_sprel);
1885 ptr->r.record.p.spoff = offset / 4;
1889 static unw_rec_list *
1890 output_fr_mem (mask)
1893 unw_rec_list *ptr = alloc_record (fr_mem);
1894 ptr->r.record.p.rmask = mask;
1898 static unw_rec_list *
1899 output_frgr_mem (gr_mask, fr_mask)
1900 unsigned int gr_mask;
1901 unsigned int fr_mask;
1903 unw_rec_list *ptr = alloc_record (frgr_mem);
1904 ptr->r.record.p.grmask = gr_mask;
1905 ptr->r.record.p.frmask = fr_mask;
1909 static unw_rec_list *
1910 output_gr_gr (mask, reg)
1914 unw_rec_list *ptr = alloc_record (gr_gr);
1915 ptr->r.record.p.grmask = mask;
1916 ptr->r.record.p.gr = reg;
1920 static unw_rec_list *
1921 output_gr_mem (mask)
1924 unw_rec_list *ptr = alloc_record (gr_mem);
1925 ptr->r.record.p.rmask = mask;
1929 static unw_rec_list *
1930 output_br_mem (unsigned int mask)
1932 unw_rec_list *ptr = alloc_record (br_mem);
1933 ptr->r.record.p.brmask = mask;
1937 static unw_rec_list *
1938 output_br_gr (save_mask, reg)
1939 unsigned int save_mask;
1942 unw_rec_list *ptr = alloc_record (br_gr);
1943 ptr->r.record.p.brmask = save_mask;
1944 ptr->r.record.p.gr = reg;
1948 static unw_rec_list *
1949 output_spill_base (offset)
1950 unsigned int offset;
1952 unw_rec_list *ptr = alloc_record (spill_base);
1953 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1957 static unw_rec_list *
1960 unw_rec_list *ptr = alloc_record (unat_when);
1964 static unw_rec_list *
1968 unw_rec_list *ptr = alloc_record (unat_gr);
1969 ptr->r.record.p.gr = gr;
1973 static unw_rec_list *
1974 output_unat_psprel (offset)
1975 unsigned int offset;
1977 unw_rec_list *ptr = alloc_record (unat_psprel);
1978 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1982 static unw_rec_list *
1983 output_unat_sprel (offset)
1984 unsigned int offset;
1986 unw_rec_list *ptr = alloc_record (unat_sprel);
1987 ptr->r.record.p.spoff = offset / 4;
1991 static unw_rec_list *
1994 unw_rec_list *ptr = alloc_record (lc_when);
1998 static unw_rec_list *
2002 unw_rec_list *ptr = alloc_record (lc_gr);
2003 ptr->r.record.p.gr = gr;
2007 static unw_rec_list *
2008 output_lc_psprel (offset)
2009 unsigned int offset;
2011 unw_rec_list *ptr = alloc_record (lc_psprel);
2012 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2016 static unw_rec_list *
2017 output_lc_sprel (offset)
2018 unsigned int offset;
2020 unw_rec_list *ptr = alloc_record (lc_sprel);
2021 ptr->r.record.p.spoff = offset / 4;
2025 static unw_rec_list *
2028 unw_rec_list *ptr = alloc_record (fpsr_when);
2032 static unw_rec_list *
2036 unw_rec_list *ptr = alloc_record (fpsr_gr);
2037 ptr->r.record.p.gr = gr;
2041 static unw_rec_list *
2042 output_fpsr_psprel (offset)
2043 unsigned int offset;
2045 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2046 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2050 static unw_rec_list *
2051 output_fpsr_sprel (offset)
2052 unsigned int offset;
2054 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2055 ptr->r.record.p.spoff = offset / 4;
2059 static unw_rec_list *
2060 output_priunat_when_gr ()
2062 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2066 static unw_rec_list *
2067 output_priunat_when_mem ()
2069 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2073 static unw_rec_list *
2074 output_priunat_gr (gr)
2077 unw_rec_list *ptr = alloc_record (priunat_gr);
2078 ptr->r.record.p.gr = gr;
2082 static unw_rec_list *
2083 output_priunat_psprel (offset)
2084 unsigned int offset;
2086 unw_rec_list *ptr = alloc_record (priunat_psprel);
2087 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2091 static unw_rec_list *
2092 output_priunat_sprel (offset)
2093 unsigned int offset;
2095 unw_rec_list *ptr = alloc_record (priunat_sprel);
2096 ptr->r.record.p.spoff = offset / 4;
2100 static unw_rec_list *
2103 unw_rec_list *ptr = alloc_record (bsp_when);
2107 static unw_rec_list *
2111 unw_rec_list *ptr = alloc_record (bsp_gr);
2112 ptr->r.record.p.gr = gr;
2116 static unw_rec_list *
2117 output_bsp_psprel (offset)
2118 unsigned int offset;
2120 unw_rec_list *ptr = alloc_record (bsp_psprel);
2121 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2125 static unw_rec_list *
2126 output_bsp_sprel (offset)
2127 unsigned int offset;
2129 unw_rec_list *ptr = alloc_record (bsp_sprel);
2130 ptr->r.record.p.spoff = offset / 4;
2134 static unw_rec_list *
2135 output_bspstore_when ()
2137 unw_rec_list *ptr = alloc_record (bspstore_when);
2141 static unw_rec_list *
2142 output_bspstore_gr (gr)
2145 unw_rec_list *ptr = alloc_record (bspstore_gr);
2146 ptr->r.record.p.gr = gr;
2150 static unw_rec_list *
2151 output_bspstore_psprel (offset)
2152 unsigned int offset;
2154 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2155 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2159 static unw_rec_list *
2160 output_bspstore_sprel (offset)
2161 unsigned int offset;
2163 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2164 ptr->r.record.p.spoff = offset / 4;
2168 static unw_rec_list *
2171 unw_rec_list *ptr = alloc_record (rnat_when);
2175 static unw_rec_list *
2179 unw_rec_list *ptr = alloc_record (rnat_gr);
2180 ptr->r.record.p.gr = gr;
2184 static unw_rec_list *
2185 output_rnat_psprel (offset)
2186 unsigned int offset;
2188 unw_rec_list *ptr = alloc_record (rnat_psprel);
2189 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2193 static unw_rec_list *
2194 output_rnat_sprel (offset)
2195 unsigned int offset;
2197 unw_rec_list *ptr = alloc_record (rnat_sprel);
2198 ptr->r.record.p.spoff = offset / 4;
2202 static unw_rec_list *
2203 output_unwabi (abi, context)
2205 unsigned long context;
2207 unw_rec_list *ptr = alloc_record (unwabi);
2208 ptr->r.record.p.abi = abi;
2209 ptr->r.record.p.context = context;
2213 static unw_rec_list *
2214 output_epilogue (unsigned long ecount)
2216 unw_rec_list *ptr = alloc_record (epilogue);
2217 ptr->r.record.b.ecount = ecount;
2221 static unw_rec_list *
2222 output_label_state (unsigned long label)
2224 unw_rec_list *ptr = alloc_record (label_state);
2225 ptr->r.record.b.label = label;
2229 static unw_rec_list *
2230 output_copy_state (unsigned long label)
2232 unw_rec_list *ptr = alloc_record (copy_state);
2233 ptr->r.record.b.label = label;
2237 static unw_rec_list *
2238 output_spill_psprel (ab, reg, offset)
2241 unsigned int offset;
2243 unw_rec_list *ptr = alloc_record (spill_psprel);
2244 ptr->r.record.x.ab = ab;
2245 ptr->r.record.x.reg = reg;
2246 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2250 static unw_rec_list *
2251 output_spill_sprel (ab, reg, offset)
2254 unsigned int offset;
2256 unw_rec_list *ptr = alloc_record (spill_sprel);
2257 ptr->r.record.x.ab = ab;
2258 ptr->r.record.x.reg = reg;
2259 ptr->r.record.x.spoff = offset / 4;
2263 static unw_rec_list *
2264 output_spill_psprel_p (ab, reg, offset, predicate)
2267 unsigned int offset;
2268 unsigned int predicate;
2270 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2271 ptr->r.record.x.ab = ab;
2272 ptr->r.record.x.reg = reg;
2273 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2274 ptr->r.record.x.qp = predicate;
2278 static unw_rec_list *
2279 output_spill_sprel_p (ab, reg, offset, predicate)
2282 unsigned int offset;
2283 unsigned int predicate;
2285 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2286 ptr->r.record.x.ab = ab;
2287 ptr->r.record.x.reg = reg;
2288 ptr->r.record.x.spoff = offset / 4;
2289 ptr->r.record.x.qp = predicate;
2293 static unw_rec_list *
2294 output_spill_reg (ab, reg, targ_reg, xy)
2297 unsigned int targ_reg;
2300 unw_rec_list *ptr = alloc_record (spill_reg);
2301 ptr->r.record.x.ab = ab;
2302 ptr->r.record.x.reg = reg;
2303 ptr->r.record.x.treg = targ_reg;
2304 ptr->r.record.x.xy = xy;
2308 static unw_rec_list *
2309 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2312 unsigned int targ_reg;
2314 unsigned int predicate;
2316 unw_rec_list *ptr = alloc_record (spill_reg_p);
2317 ptr->r.record.x.ab = ab;
2318 ptr->r.record.x.reg = reg;
2319 ptr->r.record.x.treg = targ_reg;
2320 ptr->r.record.x.xy = xy;
2321 ptr->r.record.x.qp = predicate;
2325 /* Given a unw_rec_list process the correct format with the
2326 specified function. */
2329 process_one_record (ptr, f)
2333 unsigned long fr_mask, gr_mask;
2335 switch (ptr->r.type)
2337 /* This is a dummy record that takes up no space in the output. */
2345 /* These are taken care of by prologue/prologue_gr. */
2350 if (ptr->r.type == prologue_gr)
2351 output_R2_format (f, ptr->r.record.r.grmask,
2352 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2354 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2356 /* Output descriptor(s) for union of register spills (if any). */
2357 gr_mask = ptr->r.record.r.mask.gr_mem;
2358 fr_mask = ptr->r.record.r.mask.fr_mem;
2361 if ((fr_mask & ~0xfUL) == 0)
2362 output_P6_format (f, fr_mem, fr_mask);
2365 output_P5_format (f, gr_mask, fr_mask);
2370 output_P6_format (f, gr_mem, gr_mask);
2371 if (ptr->r.record.r.mask.br_mem)
2372 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2374 /* output imask descriptor if necessary: */
2375 if (ptr->r.record.r.mask.i)
2376 output_P4_format (f, ptr->r.record.r.mask.i,
2377 ptr->r.record.r.imask_size);
2381 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2385 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2386 ptr->r.record.p.size);
2399 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2402 output_P3_format (f, rp_br, ptr->r.record.p.br);
2405 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2413 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2422 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2432 case bspstore_sprel:
2434 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2437 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2440 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2443 as_bad ("spill_mask record unimplemented.");
2445 case priunat_when_gr:
2446 case priunat_when_mem:
2450 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2452 case priunat_psprel:
2454 case bspstore_psprel:
2456 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2459 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2462 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2466 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2469 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2470 ptr->r.record.x.reg, ptr->r.record.x.t,
2471 ptr->r.record.x.pspoff);
2474 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2475 ptr->r.record.x.reg, ptr->r.record.x.t,
2476 ptr->r.record.x.spoff);
2479 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2480 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2481 ptr->r.record.x.treg, ptr->r.record.x.t);
2483 case spill_psprel_p:
2484 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2485 ptr->r.record.x.ab, ptr->r.record.x.reg,
2486 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2489 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2490 ptr->r.record.x.ab, ptr->r.record.x.reg,
2491 ptr->r.record.x.t, ptr->r.record.x.spoff);
2494 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2495 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2496 ptr->r.record.x.xy, ptr->r.record.x.treg,
2500 as_bad ("record_type_not_valid");
2505 /* Given a unw_rec_list list, process all the records with
2506 the specified function. */
2508 process_unw_records (list, f)
2513 for (ptr = list; ptr; ptr = ptr->next)
2514 process_one_record (ptr, f);
2517 /* Determine the size of a record list in bytes. */
2519 calc_record_size (list)
2523 process_unw_records (list, count_output);
2527 /* Update IMASK bitmask to reflect the fact that one or more registers
2528 of type TYPE are saved starting at instruction with index T. If N
2529 bits are set in REGMASK, it is assumed that instructions T through
2530 T+N-1 save these registers.
2534 1: instruction saves next fp reg
2535 2: instruction saves next general reg
2536 3: instruction saves next branch reg */
2538 set_imask (region, regmask, t, type)
2539 unw_rec_list *region;
2540 unsigned long regmask;
2544 unsigned char *imask;
2545 unsigned long imask_size;
2549 imask = region->r.record.r.mask.i;
2550 imask_size = region->r.record.r.imask_size;
2553 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2554 imask = xmalloc (imask_size);
2555 memset (imask, 0, imask_size);
2557 region->r.record.r.imask_size = imask_size;
2558 region->r.record.r.mask.i = imask;
2562 pos = 2 * (3 - t % 4);
2565 if (i >= imask_size)
2567 as_bad ("Ignoring attempt to spill beyond end of region");
2571 imask[i] |= (type & 0x3) << pos;
2573 regmask &= (regmask - 1);
2583 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2584 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2585 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2589 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2590 unsigned long slot_addr;
2592 unsigned long first_addr;
2596 unsigned long index = 0;
2598 /* First time we are called, the initial address and frag are invalid. */
2599 if (first_addr == 0)
2602 /* If the two addresses are in different frags, then we need to add in
2603 the remaining size of this frag, and then the entire size of intermediate
2605 while (slot_frag != first_frag)
2607 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2611 /* We can get the final addresses only during and after
2613 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2614 index += 3 * ((first_frag->fr_next->fr_address
2615 - first_frag->fr_address
2616 - first_frag->fr_fix) >> 4);
2619 /* We don't know what the final addresses will be. We try our
2620 best to estimate. */
2621 switch (first_frag->fr_type)
2627 as_fatal ("only constant space allocation is supported");
2633 /* Take alignment into account. Assume the worst case
2634 before relaxation. */
2635 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2639 if (first_frag->fr_symbol)
2641 as_fatal ("only constant offsets are supported");
2645 index += 3 * (first_frag->fr_offset >> 4);
2649 /* Add in the full size of the frag converted to instruction slots. */
2650 index += 3 * (first_frag->fr_fix >> 4);
2651 /* Subtract away the initial part before first_addr. */
2652 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2653 + ((first_addr & 0x3) - (start_addr & 0x3)));
2655 /* Move to the beginning of the next frag. */
2656 first_frag = first_frag->fr_next;
2657 first_addr = (unsigned long) &first_frag->fr_literal;
2660 /* Add in the used part of the last frag. */
2661 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2662 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2666 /* Optimize unwind record directives. */
2668 static unw_rec_list *
2669 optimize_unw_records (list)
2675 /* If the only unwind record is ".prologue" or ".prologue" followed
2676 by ".body", then we can optimize the unwind directives away. */
2677 if (list->r.type == prologue
2678 && (list->next->r.type == endp
2679 || (list->next->r.type == body && list->next->next->r.type == endp)))
2685 /* Given a complete record list, process any records which have
2686 unresolved fields, (ie length counts for a prologue). After
2687 this has been run, all necessary information should be available
2688 within each record to generate an image. */
2691 fixup_unw_records (list, before_relax)
2695 unw_rec_list *ptr, *region = 0;
2696 unsigned long first_addr = 0, rlen = 0, t;
2697 fragS *first_frag = 0;
2699 for (ptr = list; ptr; ptr = ptr->next)
2701 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2702 as_bad (" Insn slot not set in unwind record.");
2703 t = slot_index (ptr->slot_number, ptr->slot_frag,
2704 first_addr, first_frag, before_relax);
2705 switch (ptr->r.type)
2713 unsigned long last_addr = 0;
2714 fragS *last_frag = NULL;
2716 first_addr = ptr->slot_number;
2717 first_frag = ptr->slot_frag;
2718 /* Find either the next body/prologue start, or the end of
2719 the function, and determine the size of the region. */
2720 for (last = ptr->next; last != NULL; last = last->next)
2721 if (last->r.type == prologue || last->r.type == prologue_gr
2722 || last->r.type == body || last->r.type == endp)
2724 last_addr = last->slot_number;
2725 last_frag = last->slot_frag;
2728 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2730 rlen = ptr->r.record.r.rlen = size;
2731 if (ptr->r.type == body)
2732 /* End of region. */
2740 ptr->r.record.b.t = rlen - 1 - t;
2742 /* This happens when a memory-stack-less procedure uses a
2743 ".restore sp" directive at the end of a region to pop
2745 ptr->r.record.b.t = 0;
2756 case priunat_when_gr:
2757 case priunat_when_mem:
2761 ptr->r.record.p.t = t;
2769 case spill_psprel_p:
2770 ptr->r.record.x.t = t;
2776 as_bad ("frgr_mem record before region record!");
2779 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2780 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2781 set_imask (region, ptr->r.record.p.frmask, t, 1);
2782 set_imask (region, ptr->r.record.p.grmask, t, 2);
2787 as_bad ("fr_mem record before region record!");
2790 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2791 set_imask (region, ptr->r.record.p.rmask, t, 1);
2796 as_bad ("gr_mem record before region record!");
2799 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2800 set_imask (region, ptr->r.record.p.rmask, t, 2);
2805 as_bad ("br_mem record before region record!");
2808 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2809 set_imask (region, ptr->r.record.p.brmask, t, 3);
2815 as_bad ("gr_gr record before region record!");
2818 set_imask (region, ptr->r.record.p.grmask, t, 2);
2823 as_bad ("br_gr record before region record!");
2826 set_imask (region, ptr->r.record.p.brmask, t, 3);
2835 /* Estimate the size of a frag before relaxing. We only have one type of frag
2836 to handle here, which is the unwind info frag. */
2839 ia64_estimate_size_before_relax (fragS *frag,
2840 asection *segtype ATTRIBUTE_UNUSED)
2845 /* ??? This code is identical to the first part of ia64_convert_frag. */
2846 list = (unw_rec_list *) frag->fr_opcode;
2847 fixup_unw_records (list, 0);
2849 len = calc_record_size (list);
2850 /* pad to pointer-size boundary. */
2851 pad = len % md.pointer_size;
2853 len += md.pointer_size - pad;
2854 /* Add 8 for the header. */
2856 /* Add a pointer for the personality offset. */
2857 if (frag->fr_offset)
2858 size += md.pointer_size;
2860 /* fr_var carries the max_chars that we created the fragment with.
2861 We must, of course, have allocated enough memory earlier. */
2862 assert (frag->fr_var >= size);
2864 return frag->fr_fix + size;
2867 /* This function converts a rs_machine_dependent variant frag into a
2868 normal fill frag with the unwind image from the the record list. */
2870 ia64_convert_frag (fragS *frag)
2876 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2877 list = (unw_rec_list *) frag->fr_opcode;
2878 fixup_unw_records (list, 0);
2880 len = calc_record_size (list);
2881 /* pad to pointer-size boundary. */
2882 pad = len % md.pointer_size;
2884 len += md.pointer_size - pad;
2885 /* Add 8 for the header. */
2887 /* Add a pointer for the personality offset. */
2888 if (frag->fr_offset)
2889 size += md.pointer_size;
2891 /* fr_var carries the max_chars that we created the fragment with.
2892 We must, of course, have allocated enough memory earlier. */
2893 assert (frag->fr_var >= size);
2895 /* Initialize the header area. fr_offset is initialized with
2896 unwind.personality_routine. */
2897 if (frag->fr_offset)
2899 if (md.flags & EF_IA_64_ABI64)
2900 flag_value = (bfd_vma) 3 << 32;
2902 /* 32-bit unwind info block. */
2903 flag_value = (bfd_vma) 0x1003 << 32;
2908 md_number_to_chars (frag->fr_literal,
2909 (((bfd_vma) 1 << 48) /* Version. */
2910 | flag_value /* U & E handler flags. */
2911 | (len / md.pointer_size)), /* Length. */
2914 /* Skip the header. */
2915 vbyte_mem_ptr = frag->fr_literal + 8;
2916 process_unw_records (list, output_vbyte_mem);
2918 /* Fill the padding bytes with zeros. */
2920 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2921 md.pointer_size - pad);
2923 frag->fr_fix += size;
2924 frag->fr_type = rs_fill;
2926 frag->fr_offset = 0;
2930 convert_expr_to_ab_reg (e, ab, regp)
2937 if (e->X_op != O_register)
2940 reg = e->X_add_number;
2941 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2944 *regp = reg - REG_GR;
2946 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2947 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2950 *regp = reg - REG_FR;
2952 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2955 *regp = reg - REG_BR;
2962 case REG_PR: *regp = 0; break;
2963 case REG_PSP: *regp = 1; break;
2964 case REG_PRIUNAT: *regp = 2; break;
2965 case REG_BR + 0: *regp = 3; break;
2966 case REG_AR + AR_BSP: *regp = 4; break;
2967 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2968 case REG_AR + AR_RNAT: *regp = 6; break;
2969 case REG_AR + AR_UNAT: *regp = 7; break;
2970 case REG_AR + AR_FPSR: *regp = 8; break;
2971 case REG_AR + AR_PFS: *regp = 9; break;
2972 case REG_AR + AR_LC: *regp = 10; break;
2982 convert_expr_to_xy_reg (e, xy, regp)
2989 if (e->X_op != O_register)
2992 reg = e->X_add_number;
2994 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2997 *regp = reg - REG_GR;
2999 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3002 *regp = reg - REG_FR;
3004 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3007 *regp = reg - REG_BR;
3017 /* The current frag is an alignment frag. */
3018 align_frag = frag_now;
3019 s_align_bytes (arg);
3024 int dummy ATTRIBUTE_UNUSED;
3029 radix = *input_line_pointer++;
3031 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3033 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3034 ignore_rest_of_line ();
3039 /* Helper function for .loc directives. If the assembler is not generating
3040 line number info, then we need to remember which instructions have a .loc
3041 directive, and only call dwarf2_gen_line_info for those instructions. */
3046 CURR_SLOT.loc_directive_seen = 1;
3047 dwarf2_directive_loc (x);
3050 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3052 dot_special_section (which)
3055 set_section ((char *) special_section_name[which]);
3059 unwind_diagnostic (const char * region, const char *directive)
3061 if (md.unwind_check == unwind_check_warning)
3062 as_warn (".%s outside of %s", directive, region);
3065 as_bad (".%s outside of %s", directive, region);
3066 ignore_rest_of_line ();
3071 in_procedure (const char *directive)
3073 if (unwind.proc_start
3074 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3076 unwind_diagnostic ("procedure", directive);
3081 in_prologue (const char *directive)
3083 if (in_procedure (directive))
3085 /* We are in a procedure. Check if we are in a prologue. */
3086 if (unwind.prologue)
3088 unwind_diagnostic ("prologue", directive);
3094 in_body (const char *directive)
3096 if (in_procedure (directive))
3098 /* We are in a procedure. Check if we are in a body. */
3101 unwind_diagnostic ("body region", directive);
3107 add_unwind_entry (ptr)
3111 unwind.tail->next = ptr;
3116 /* The current entry can in fact be a chain of unwind entries. */
3117 if (unwind.current_entry == NULL)
3118 unwind.current_entry = ptr;
3123 int dummy ATTRIBUTE_UNUSED;
3127 if (!in_prologue ("fframe"))
3132 if (e.X_op != O_constant)
3133 as_bad ("Operand to .fframe must be a constant");
3135 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3140 int dummy ATTRIBUTE_UNUSED;
3145 if (!in_prologue ("vframe"))
3149 reg = e.X_add_number - REG_GR;
3150 if (e.X_op == O_register && reg < 128)
3152 add_unwind_entry (output_mem_stack_v ());
3153 if (! (unwind.prologue_mask & 2))
3154 add_unwind_entry (output_psp_gr (reg));
3157 as_bad ("First operand to .vframe must be a general register");
3161 dot_vframesp (dummy)
3162 int dummy ATTRIBUTE_UNUSED;
3166 if (!in_prologue ("vframesp"))
3170 if (e.X_op == O_constant)
3172 add_unwind_entry (output_mem_stack_v ());
3173 add_unwind_entry (output_psp_sprel (e.X_add_number));
3176 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3180 dot_vframepsp (dummy)
3181 int dummy ATTRIBUTE_UNUSED;
3185 if (!in_prologue ("vframepsp"))
3189 if (e.X_op == O_constant)
3191 add_unwind_entry (output_mem_stack_v ());
3192 add_unwind_entry (output_psp_sprel (e.X_add_number));
3195 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3200 int dummy ATTRIBUTE_UNUSED;
3206 if (!in_prologue ("save"))
3209 sep = parse_operand (&e1);
3211 as_bad ("No second operand to .save");
3212 sep = parse_operand (&e2);
3214 reg1 = e1.X_add_number;
3215 reg2 = e2.X_add_number - REG_GR;
3217 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3218 if (e1.X_op == O_register)
3220 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3224 case REG_AR + AR_BSP:
3225 add_unwind_entry (output_bsp_when ());
3226 add_unwind_entry (output_bsp_gr (reg2));
3228 case REG_AR + AR_BSPSTORE:
3229 add_unwind_entry (output_bspstore_when ());
3230 add_unwind_entry (output_bspstore_gr (reg2));
3232 case REG_AR + AR_RNAT:
3233 add_unwind_entry (output_rnat_when ());
3234 add_unwind_entry (output_rnat_gr (reg2));
3236 case REG_AR + AR_UNAT:
3237 add_unwind_entry (output_unat_when ());
3238 add_unwind_entry (output_unat_gr (reg2));
3240 case REG_AR + AR_FPSR:
3241 add_unwind_entry (output_fpsr_when ());
3242 add_unwind_entry (output_fpsr_gr (reg2));
3244 case REG_AR + AR_PFS:
3245 add_unwind_entry (output_pfs_when ());
3246 if (! (unwind.prologue_mask & 4))
3247 add_unwind_entry (output_pfs_gr (reg2));
3249 case REG_AR + AR_LC:
3250 add_unwind_entry (output_lc_when ());
3251 add_unwind_entry (output_lc_gr (reg2));
3254 add_unwind_entry (output_rp_when ());
3255 if (! (unwind.prologue_mask & 8))
3256 add_unwind_entry (output_rp_gr (reg2));
3259 add_unwind_entry (output_preds_when ());
3260 if (! (unwind.prologue_mask & 1))
3261 add_unwind_entry (output_preds_gr (reg2));
3264 add_unwind_entry (output_priunat_when_gr ());
3265 add_unwind_entry (output_priunat_gr (reg2));
3268 as_bad ("First operand not a valid register");
3272 as_bad (" Second operand not a valid register");
3275 as_bad ("First operand not a register");
3280 int dummy ATTRIBUTE_UNUSED;
3283 unsigned long ecount; /* # of _additional_ regions to pop */
3286 if (!in_body ("restore"))
3289 sep = parse_operand (&e1);
3290 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3292 as_bad ("First operand to .restore must be stack pointer (sp)");
3298 parse_operand (&e2);
3299 if (e2.X_op != O_constant || e2.X_add_number < 0)
3301 as_bad ("Second operand to .restore must be a constant >= 0");
3304 ecount = e2.X_add_number;
3307 ecount = unwind.prologue_count - 1;
3309 if (ecount >= unwind.prologue_count)
3311 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3312 ecount + 1, unwind.prologue_count);
3316 add_unwind_entry (output_epilogue (ecount));
3318 if (ecount < unwind.prologue_count)
3319 unwind.prologue_count -= ecount + 1;
3321 unwind.prologue_count = 0;
3325 dot_restorereg (dummy)
3326 int dummy ATTRIBUTE_UNUSED;
3328 unsigned int ab, reg;
3331 if (!in_procedure ("restorereg"))
3336 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3338 as_bad ("First operand to .restorereg must be a preserved register");
3341 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3345 dot_restorereg_p (dummy)
3346 int dummy ATTRIBUTE_UNUSED;
3348 unsigned int qp, ab, reg;
3352 if (!in_procedure ("restorereg.p"))
3355 sep = parse_operand (&e1);
3358 as_bad ("No second operand to .restorereg.p");
3362 parse_operand (&e2);
3364 qp = e1.X_add_number - REG_P;
3365 if (e1.X_op != O_register || qp > 63)
3367 as_bad ("First operand to .restorereg.p must be a predicate");
3371 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3373 as_bad ("Second operand to .restorereg.p must be a preserved register");
3376 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3379 static char *special_linkonce_name[] =
3381 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3385 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3388 Use a slightly ugly scheme to derive the unwind section names from
3389 the text section name:
3391 text sect. unwind table sect.
3392 name: name: comments:
3393 ---------- ----------------- --------------------------------
3395 .text.foo .IA_64.unwind.text.foo
3396 .foo .IA_64.unwind.foo
3398 .gnu.linkonce.ia64unw.foo
3399 _info .IA_64.unwind_info gas issues error message (ditto)
3400 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3402 This mapping is done so that:
3404 (a) An object file with unwind info only in .text will use
3405 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3406 This follows the letter of the ABI and also ensures backwards
3407 compatibility with older toolchains.
3409 (b) An object file with unwind info in multiple text sections
3410 will use separate unwind sections for each text section.
3411 This allows us to properly set the "sh_info" and "sh_link"
3412 fields in SHT_IA_64_UNWIND as required by the ABI and also
3413 lets GNU ld support programs with multiple segments
3414 containing unwind info (as might be the case for certain
3415 embedded applications).
3417 (c) An error is issued if there would be a name clash.
3420 const char *text_name, *sec_text_name;
3422 const char *prefix = special_section_name [sec_index];
3424 size_t prefix_len, suffix_len, sec_name_len;
3426 sec_text_name = segment_name (text_seg);
3427 text_name = sec_text_name;
3428 if (strncmp (text_name, "_info", 5) == 0)
3430 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3432 ignore_rest_of_line ();
3435 if (strcmp (text_name, ".text") == 0)
3438 /* Build the unwind section name by appending the (possibly stripped)
3439 text section name to the unwind prefix. */
3441 if (strncmp (text_name, ".gnu.linkonce.t.",
3442 sizeof (".gnu.linkonce.t.") - 1) == 0)
3444 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3445 suffix += sizeof (".gnu.linkonce.t.") - 1;
3447 else if (linkonce_empty)
3450 prefix_len = strlen (prefix);
3451 suffix_len = strlen (suffix);
3452 sec_name_len = prefix_len + suffix_len;
3453 sec_name = alloca (sec_name_len + 1);
3454 memcpy (sec_name, prefix, prefix_len);
3455 memcpy (sec_name + prefix_len, suffix, suffix_len);
3456 sec_name [sec_name_len] = '\0';
3458 /* Handle COMDAT group. */
3459 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3462 size_t len, group_name_len;
3463 const char *group_name = elf_group_name (text_seg);
3465 if (group_name == NULL)
3467 as_bad ("Group section `%s' has no group signature",
3469 ignore_rest_of_line ();
3472 /* We have to construct a fake section directive. */
3473 group_name_len = strlen (group_name);
3475 + 16 /* ,"aG",@progbits, */
3476 + group_name_len /* ,group_name */
3479 section = alloca (len + 1);
3480 memcpy (section, sec_name, sec_name_len);
3481 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3482 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3483 memcpy (section + len - 7, ",comdat", 7);
3484 section [len] = '\0';
3485 set_section (section);
3489 set_section (sec_name);
3490 bfd_set_section_flags (stdoutput, now_seg,
3491 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3494 elf_linked_to_section (now_seg) = text_seg;
3498 generate_unwind_image (const segT text_seg)
3503 /* Mark the end of the unwind info, so that we can compute the size of the
3504 last unwind region. */
3505 add_unwind_entry (output_endp ());
3507 /* Force out pending instructions, to make sure all unwind records have
3508 a valid slot_number field. */
3509 ia64_flush_insns ();
3511 /* Generate the unwind record. */
3512 list = optimize_unw_records (unwind.list);
3513 fixup_unw_records (list, 1);
3514 size = calc_record_size (list);
3516 if (size > 0 || unwind.force_unwind_entry)
3518 unwind.force_unwind_entry = 0;
3519 /* pad to pointer-size boundary. */
3520 pad = size % md.pointer_size;
3522 size += md.pointer_size - pad;
3523 /* Add 8 for the header. */
3525 /* Add a pointer for the personality offset. */
3526 if (unwind.personality_routine)
3527 size += md.pointer_size;
3530 /* If there are unwind records, switch sections, and output the info. */
3534 bfd_reloc_code_real_type reloc;
3536 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3538 /* Make sure the section has 4 byte alignment for ILP32 and
3539 8 byte alignment for LP64. */
3540 frag_align (md.pointer_size_shift, 0, 0);
3541 record_alignment (now_seg, md.pointer_size_shift);
3543 /* Set expression which points to start of unwind descriptor area. */
3544 unwind.info = expr_build_dot ();
3546 frag_var (rs_machine_dependent, size, size, 0, 0,
3547 (offsetT) (long) unwind.personality_routine,
3550 /* Add the personality address to the image. */
3551 if (unwind.personality_routine != 0)
3553 exp.X_op = O_symbol;
3554 exp.X_add_symbol = unwind.personality_routine;
3555 exp.X_add_number = 0;
3557 if (md.flags & EF_IA_64_BE)
3559 if (md.flags & EF_IA_64_ABI64)
3560 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3562 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3566 if (md.flags & EF_IA_64_ABI64)
3567 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3569 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3572 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3573 md.pointer_size, &exp, 0, reloc);
3574 unwind.personality_routine = 0;
3578 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3580 free_saved_prologue_counts ();
3581 unwind.list = unwind.tail = unwind.current_entry = NULL;
3585 dot_handlerdata (dummy)
3586 int dummy ATTRIBUTE_UNUSED;
3588 if (!in_procedure ("handlerdata"))
3590 unwind.force_unwind_entry = 1;
3592 /* Remember which segment we're in so we can switch back after .endp */
3593 unwind.saved_text_seg = now_seg;
3594 unwind.saved_text_subseg = now_subseg;
3596 /* Generate unwind info into unwind-info section and then leave that
3597 section as the currently active one so dataXX directives go into
3598 the language specific data area of the unwind info block. */
3599 generate_unwind_image (now_seg);
3600 demand_empty_rest_of_line ();
3604 dot_unwentry (dummy)
3605 int dummy ATTRIBUTE_UNUSED;
3607 if (!in_procedure ("unwentry"))
3609 unwind.force_unwind_entry = 1;
3610 demand_empty_rest_of_line ();
3615 int dummy ATTRIBUTE_UNUSED;
3620 if (!in_prologue ("altrp"))
3624 reg = e.X_add_number - REG_BR;
3625 if (e.X_op == O_register && reg < 8)
3626 add_unwind_entry (output_rp_br (reg));
3628 as_bad ("First operand not a valid branch register");
3632 dot_savemem (psprel)
3639 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3642 sep = parse_operand (&e1);
3644 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3645 sep = parse_operand (&e2);
3647 reg1 = e1.X_add_number;
3648 val = e2.X_add_number;
3650 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3651 if (e1.X_op == O_register)
3653 if (e2.X_op == O_constant)
3657 case REG_AR + AR_BSP:
3658 add_unwind_entry (output_bsp_when ());
3659 add_unwind_entry ((psprel
3661 : output_bsp_sprel) (val));
3663 case REG_AR + AR_BSPSTORE:
3664 add_unwind_entry (output_bspstore_when ());
3665 add_unwind_entry ((psprel
3666 ? output_bspstore_psprel
3667 : output_bspstore_sprel) (val));
3669 case REG_AR + AR_RNAT:
3670 add_unwind_entry (output_rnat_when ());
3671 add_unwind_entry ((psprel
3672 ? output_rnat_psprel
3673 : output_rnat_sprel) (val));
3675 case REG_AR + AR_UNAT:
3676 add_unwind_entry (output_unat_when ());
3677 add_unwind_entry ((psprel
3678 ? output_unat_psprel
3679 : output_unat_sprel) (val));
3681 case REG_AR + AR_FPSR:
3682 add_unwind_entry (output_fpsr_when ());
3683 add_unwind_entry ((psprel
3684 ? output_fpsr_psprel
3685 : output_fpsr_sprel) (val));
3687 case REG_AR + AR_PFS:
3688 add_unwind_entry (output_pfs_when ());
3689 add_unwind_entry ((psprel
3691 : output_pfs_sprel) (val));
3693 case REG_AR + AR_LC:
3694 add_unwind_entry (output_lc_when ());
3695 add_unwind_entry ((psprel
3697 : output_lc_sprel) (val));
3700 add_unwind_entry (output_rp_when ());
3701 add_unwind_entry ((psprel
3703 : output_rp_sprel) (val));
3706 add_unwind_entry (output_preds_when ());
3707 add_unwind_entry ((psprel
3708 ? output_preds_psprel
3709 : output_preds_sprel) (val));
3712 add_unwind_entry (output_priunat_when_mem ());
3713 add_unwind_entry ((psprel
3714 ? output_priunat_psprel
3715 : output_priunat_sprel) (val));
3718 as_bad ("First operand not a valid register");
3722 as_bad (" Second operand not a valid constant");
3725 as_bad ("First operand not a register");
3730 int dummy ATTRIBUTE_UNUSED;
3735 if (!in_prologue ("save.g"))
3738 sep = parse_operand (&e1);
3740 parse_operand (&e2);
3742 if (e1.X_op != O_constant)
3743 as_bad ("First operand to .save.g must be a constant.");
3746 int grmask = e1.X_add_number;
3748 add_unwind_entry (output_gr_mem (grmask));
3751 int reg = e2.X_add_number - REG_GR;
3752 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3753 add_unwind_entry (output_gr_gr (grmask, reg));
3755 as_bad ("Second operand is an invalid register.");
3762 int dummy ATTRIBUTE_UNUSED;
3767 if (!in_prologue ("save.f"))
3770 sep = parse_operand (&e1);
3772 if (e1.X_op != O_constant)
3773 as_bad ("Operand to .save.f must be a constant.");
3775 add_unwind_entry (output_fr_mem (e1.X_add_number));
3780 int dummy ATTRIBUTE_UNUSED;
3787 if (!in_prologue ("save.b"))
3790 sep = parse_operand (&e1);
3791 if (e1.X_op != O_constant)
3793 as_bad ("First operand to .save.b must be a constant.");
3796 brmask = e1.X_add_number;
3800 sep = parse_operand (&e2);
3801 reg = e2.X_add_number - REG_GR;
3802 if (e2.X_op != O_register || reg > 127)
3804 as_bad ("Second operand to .save.b must be a general register.");
3807 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3810 add_unwind_entry (output_br_mem (brmask));
3812 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3813 demand_empty_rest_of_line ();
3818 int dummy ATTRIBUTE_UNUSED;
3823 if (!in_prologue ("save.gf"))
3826 sep = parse_operand (&e1);
3828 parse_operand (&e2);
3830 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3831 as_bad ("Both operands of .save.gf must be constants.");
3834 int grmask = e1.X_add_number;
3835 int frmask = e2.X_add_number;
3836 add_unwind_entry (output_frgr_mem (grmask, frmask));
3842 int dummy ATTRIBUTE_UNUSED;
3847 if (!in_prologue ("spill"))
3850 sep = parse_operand (&e);
3851 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3852 demand_empty_rest_of_line ();
3854 if (e.X_op != O_constant)
3855 as_bad ("Operand to .spill must be a constant");
3857 add_unwind_entry (output_spill_base (e.X_add_number));
3861 dot_spillreg (dummy)
3862 int dummy ATTRIBUTE_UNUSED;
3864 int sep, ab, xy, reg, treg;
3867 if (!in_procedure ("spillreg"))
3870 sep = parse_operand (&e1);
3873 as_bad ("No second operand to .spillreg");
3877 parse_operand (&e2);
3879 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3881 as_bad ("First operand to .spillreg must be a preserved register");
3885 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3887 as_bad ("Second operand to .spillreg must be a register");
3891 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3895 dot_spillmem (psprel)
3901 if (!in_procedure ("spillmem"))
3904 sep = parse_operand (&e1);
3907 as_bad ("Second operand missing");
3911 parse_operand (&e2);
3913 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3915 as_bad ("First operand to .spill%s must be a preserved register",
3916 psprel ? "psp" : "sp");
3920 if (e2.X_op != O_constant)
3922 as_bad ("Second operand to .spill%s must be a constant",
3923 psprel ? "psp" : "sp");
3928 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3930 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3934 dot_spillreg_p (dummy)
3935 int dummy ATTRIBUTE_UNUSED;
3937 int sep, ab, xy, reg, treg;
3938 expressionS e1, e2, e3;
3941 if (!in_procedure ("spillreg.p"))
3944 sep = parse_operand (&e1);
3947 as_bad ("No second and third operand to .spillreg.p");
3951 sep = parse_operand (&e2);
3954 as_bad ("No third operand to .spillreg.p");
3958 parse_operand (&e3);
3960 qp = e1.X_add_number - REG_P;
3962 if (e1.X_op != O_register || qp > 63)
3964 as_bad ("First operand to .spillreg.p must be a predicate");
3968 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3970 as_bad ("Second operand to .spillreg.p must be a preserved register");
3974 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3976 as_bad ("Third operand to .spillreg.p must be a register");
3980 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3984 dot_spillmem_p (psprel)
3987 expressionS e1, e2, e3;
3991 if (!in_procedure ("spillmem.p"))
3994 sep = parse_operand (&e1);
3997 as_bad ("Second operand missing");
4001 parse_operand (&e2);
4004 as_bad ("Second operand missing");
4008 parse_operand (&e3);
4010 qp = e1.X_add_number - REG_P;
4011 if (e1.X_op != O_register || qp > 63)
4013 as_bad ("First operand to .spill%s_p must be a predicate",
4014 psprel ? "psp" : "sp");
4018 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4020 as_bad ("Second operand to .spill%s_p must be a preserved register",
4021 psprel ? "psp" : "sp");
4025 if (e3.X_op != O_constant)
4027 as_bad ("Third operand to .spill%s_p must be a constant",
4028 psprel ? "psp" : "sp");
4033 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4035 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4039 get_saved_prologue_count (lbl)
4042 label_prologue_count *lpc = unwind.saved_prologue_counts;
4044 while (lpc != NULL && lpc->label_number != lbl)
4048 return lpc->prologue_count;
4050 as_bad ("Missing .label_state %ld", lbl);
4055 save_prologue_count (lbl, count)
4059 label_prologue_count *lpc = unwind.saved_prologue_counts;
4061 while (lpc != NULL && lpc->label_number != lbl)
4065 lpc->prologue_count = count;
4068 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4070 new_lpc->next = unwind.saved_prologue_counts;
4071 new_lpc->label_number = lbl;
4072 new_lpc->prologue_count = count;
4073 unwind.saved_prologue_counts = new_lpc;
4078 free_saved_prologue_counts ()
4080 label_prologue_count *lpc = unwind.saved_prologue_counts;
4081 label_prologue_count *next;
4090 unwind.saved_prologue_counts = NULL;
4094 dot_label_state (dummy)
4095 int dummy ATTRIBUTE_UNUSED;
4099 if (!in_body ("label_state"))
4103 if (e.X_op != O_constant)
4105 as_bad ("Operand to .label_state must be a constant");
4108 add_unwind_entry (output_label_state (e.X_add_number));
4109 save_prologue_count (e.X_add_number, unwind.prologue_count);
4113 dot_copy_state (dummy)
4114 int dummy ATTRIBUTE_UNUSED;
4118 if (!in_body ("copy_state"))
4122 if (e.X_op != O_constant)
4124 as_bad ("Operand to .copy_state must be a constant");
4127 add_unwind_entry (output_copy_state (e.X_add_number));
4128 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4133 int dummy ATTRIBUTE_UNUSED;
4138 if (!in_procedure ("unwabi"))
4141 sep = parse_operand (&e1);
4144 as_bad ("Second operand to .unwabi missing");
4147 sep = parse_operand (&e2);
4148 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4149 demand_empty_rest_of_line ();
4151 if (e1.X_op != O_constant)
4153 as_bad ("First operand to .unwabi must be a constant");
4157 if (e2.X_op != O_constant)
4159 as_bad ("Second operand to .unwabi must be a constant");
4163 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4167 dot_personality (dummy)
4168 int dummy ATTRIBUTE_UNUSED;
4171 if (!in_procedure ("personality"))
4174 name = input_line_pointer;
4175 c = get_symbol_end ();
4176 p = input_line_pointer;
4177 unwind.personality_routine = symbol_find_or_make (name);
4178 unwind.force_unwind_entry = 1;
4181 demand_empty_rest_of_line ();
4186 int dummy ATTRIBUTE_UNUSED;
4191 unwind.proc_start = 0;
4192 /* Parse names of main and alternate entry points and mark them as
4193 function symbols: */
4197 name = input_line_pointer;
4198 c = get_symbol_end ();
4199 p = input_line_pointer;
4201 as_bad ("Empty argument of .proc");
4204 sym = symbol_find_or_make (name);
4205 if (S_IS_DEFINED (sym))
4206 as_bad ("`%s' was already defined", name);
4207 else if (unwind.proc_start == 0)
4209 unwind.proc_start = sym;
4211 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4215 if (*input_line_pointer != ',')
4217 ++input_line_pointer;
4219 if (unwind.proc_start == 0)
4220 unwind.proc_start = expr_build_dot ();
4221 demand_empty_rest_of_line ();
4224 unwind.prologue = 0;
4225 unwind.prologue_count = 0;
4228 unwind.list = unwind.tail = unwind.current_entry = NULL;
4229 unwind.personality_routine = 0;
4234 int dummy ATTRIBUTE_UNUSED;
4236 if (!in_procedure ("body"))
4238 if (!unwind.prologue && !unwind.body && unwind.insn)
4239 as_warn ("Initial .body should precede any instructions");
4241 unwind.prologue = 0;
4242 unwind.prologue_mask = 0;
4245 add_unwind_entry (output_body ());
4246 demand_empty_rest_of_line ();
4250 dot_prologue (dummy)
4251 int dummy ATTRIBUTE_UNUSED;
4254 int mask = 0, grsave = 0;
4256 if (!in_procedure ("prologue"))
4258 if (unwind.prologue)
4260 as_bad (".prologue within prologue");
4261 ignore_rest_of_line ();
4264 if (!unwind.body && unwind.insn)
4265 as_warn ("Initial .prologue should precede any instructions");
4267 if (!is_it_end_of_statement ())
4270 sep = parse_operand (&e1);
4272 as_bad ("No second operand to .prologue");
4273 sep = parse_operand (&e2);
4274 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4275 demand_empty_rest_of_line ();
4277 if (e1.X_op == O_constant)
4279 mask = e1.X_add_number;
4281 if (e2.X_op == O_constant)
4282 grsave = e2.X_add_number;
4283 else if (e2.X_op == O_register
4284 && (grsave = e2.X_add_number - REG_GR) < 128)
4287 as_bad ("Second operand not a constant or general register");
4289 add_unwind_entry (output_prologue_gr (mask, grsave));
4292 as_bad ("First operand not a constant");
4295 add_unwind_entry (output_prologue ());
4297 unwind.prologue = 1;
4298 unwind.prologue_mask = mask;
4300 ++unwind.prologue_count;
4305 int dummy ATTRIBUTE_UNUSED;
4309 int bytes_per_address;
4312 subsegT saved_subseg;
4313 char *name, *default_name, *p, c;
4315 int unwind_check = md.unwind_check;
4317 md.unwind_check = unwind_check_error;
4318 if (!in_procedure ("endp"))
4320 md.unwind_check = unwind_check;
4322 if (unwind.saved_text_seg)
4324 saved_seg = unwind.saved_text_seg;
4325 saved_subseg = unwind.saved_text_subseg;
4326 unwind.saved_text_seg = NULL;
4330 saved_seg = now_seg;
4331 saved_subseg = now_subseg;
4334 insn_group_break (1, 0, 0);
4336 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4338 generate_unwind_image (saved_seg);
4340 if (unwind.info || unwind.force_unwind_entry)
4344 subseg_set (md.last_text_seg, 0);
4345 proc_end = expr_build_dot ();
4347 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4349 /* Make sure that section has 4 byte alignment for ILP32 and
4350 8 byte alignment for LP64. */
4351 record_alignment (now_seg, md.pointer_size_shift);
4353 /* Need space for 3 pointers for procedure start, procedure end,
4355 ptr = frag_more (3 * md.pointer_size);
4356 where = frag_now_fix () - (3 * md.pointer_size);
4357 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4359 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4360 e.X_op = O_pseudo_fixup;
4361 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4363 e.X_add_symbol = unwind.proc_start;
4364 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4366 e.X_op = O_pseudo_fixup;
4367 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4369 e.X_add_symbol = proc_end;
4370 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4371 bytes_per_address, &e);
4375 e.X_op = O_pseudo_fixup;
4376 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4378 e.X_add_symbol = unwind.info;
4379 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4380 bytes_per_address, &e);
4383 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4388 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4390 subseg_set (saved_seg, saved_subseg);
4392 if (unwind.proc_start)
4393 default_name = (char *) S_GET_NAME (unwind.proc_start);
4395 default_name = NULL;
4397 /* Parse names of main and alternate entry points and set symbol sizes. */
4401 name = input_line_pointer;
4402 c = get_symbol_end ();
4403 p = input_line_pointer;
4406 if (md.unwind_check == unwind_check_warning)
4410 as_warn ("Empty argument of .endp. Use the default name `%s'",
4412 name = default_name;
4415 as_warn ("Empty argument of .endp");
4418 as_bad ("Empty argument of .endp");
4422 sym = symbol_find (name);
4424 && md.unwind_check == unwind_check_warning
4426 && default_name != name)
4428 /* We have a bad name. Try the default one if needed. */
4429 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4430 name, default_name);
4431 name = default_name;
4432 sym = symbol_find (name);
4434 if (!sym || !S_IS_DEFINED (sym))
4435 as_bad ("`%s' was not defined within procedure", name);
4436 else if (unwind.proc_start
4437 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4438 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4440 fragS *fr = symbol_get_frag (unwind.proc_start);
4441 fragS *frag = symbol_get_frag (sym);
4443 /* Check whether the function label is at or beyond last
4445 while (fr && fr != frag)
4449 if (frag == frag_now && SEG_NORMAL (now_seg))
4450 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4453 symbol_get_obj (sym)->size =
4454 (expressionS *) xmalloc (sizeof (expressionS));
4455 symbol_get_obj (sym)->size->X_op = O_subtract;
4456 symbol_get_obj (sym)->size->X_add_symbol
4457 = symbol_new (FAKE_LABEL_NAME, now_seg,
4458 frag_now_fix (), frag_now);
4459 symbol_get_obj (sym)->size->X_op_symbol = sym;
4460 symbol_get_obj (sym)->size->X_add_number = 0;
4467 if (*input_line_pointer != ',')
4469 ++input_line_pointer;
4471 demand_empty_rest_of_line ();
4472 unwind.proc_start = unwind.info = 0;
4476 dot_template (template)
4479 CURR_SLOT.user_template = template;
4484 int dummy ATTRIBUTE_UNUSED;
4486 int ins, locs, outs, rots;
4488 if (is_it_end_of_statement ())
4489 ins = locs = outs = rots = 0;
4492 ins = get_absolute_expression ();
4493 if (*input_line_pointer++ != ',')
4495 locs = get_absolute_expression ();
4496 if (*input_line_pointer++ != ',')
4498 outs = get_absolute_expression ();
4499 if (*input_line_pointer++ != ',')
4501 rots = get_absolute_expression ();
4503 set_regstack (ins, locs, outs, rots);
4507 as_bad ("Comma expected");
4508 ignore_rest_of_line ();
4515 unsigned num_regs, num_alloced = 0;
4516 struct dynreg **drpp, *dr;
4517 int ch, base_reg = 0;
4523 case DYNREG_GR: base_reg = REG_GR + 32; break;
4524 case DYNREG_FR: base_reg = REG_FR + 32; break;
4525 case DYNREG_PR: base_reg = REG_P + 16; break;
4529 /* First, remove existing names from hash table. */
4530 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4532 hash_delete (md.dynreg_hash, dr->name);
4536 drpp = &md.dynreg[type];
4539 start = input_line_pointer;
4540 ch = get_symbol_end ();
4541 *input_line_pointer = ch;
4542 len = (input_line_pointer - start);
4545 if (*input_line_pointer != '[')
4547 as_bad ("Expected '['");
4550 ++input_line_pointer; /* skip '[' */
4552 num_regs = get_absolute_expression ();
4554 if (*input_line_pointer++ != ']')
4556 as_bad ("Expected ']'");
4561 num_alloced += num_regs;
4565 if (num_alloced > md.rot.num_regs)
4567 as_bad ("Used more than the declared %d rotating registers",
4573 if (num_alloced > 96)
4575 as_bad ("Used more than the available 96 rotating registers");
4580 if (num_alloced > 48)
4582 as_bad ("Used more than the available 48 rotating registers");
4591 name = obstack_alloc (¬es, len + 1);
4592 memcpy (name, start, len);
4597 *drpp = obstack_alloc (¬es, sizeof (*dr));
4598 memset (*drpp, 0, sizeof (*dr));
4603 dr->num_regs = num_regs;
4604 dr->base = base_reg;
4606 base_reg += num_regs;
4608 if (hash_insert (md.dynreg_hash, name, dr))
4610 as_bad ("Attempt to redefine register set `%s'", name);
4614 if (*input_line_pointer != ',')
4616 ++input_line_pointer; /* skip comma */
4619 demand_empty_rest_of_line ();
4623 ignore_rest_of_line ();
4627 dot_byteorder (byteorder)
4630 segment_info_type *seginfo = seg_info (now_seg);
4632 if (byteorder == -1)
4634 if (seginfo->tc_segment_info_data.endian == 0)
4635 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4636 byteorder = seginfo->tc_segment_info_data.endian == 1;
4639 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4641 if (target_big_endian != byteorder)
4643 target_big_endian = byteorder;
4644 if (target_big_endian)
4646 ia64_number_to_chars = number_to_chars_bigendian;
4647 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4651 ia64_number_to_chars = number_to_chars_littleendian;
4652 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4659 int dummy ATTRIBUTE_UNUSED;
4666 option = input_line_pointer;
4667 ch = get_symbol_end ();
4668 if (strcmp (option, "lsb") == 0)
4669 md.flags &= ~EF_IA_64_BE;
4670 else if (strcmp (option, "msb") == 0)
4671 md.flags |= EF_IA_64_BE;
4672 else if (strcmp (option, "abi32") == 0)
4673 md.flags &= ~EF_IA_64_ABI64;
4674 else if (strcmp (option, "abi64") == 0)
4675 md.flags |= EF_IA_64_ABI64;
4677 as_bad ("Unknown psr option `%s'", option);
4678 *input_line_pointer = ch;
4681 if (*input_line_pointer != ',')
4684 ++input_line_pointer;
4687 demand_empty_rest_of_line ();
4692 int dummy ATTRIBUTE_UNUSED;
4694 new_logical_line (0, get_absolute_expression ());
4695 demand_empty_rest_of_line ();
4699 parse_section_name ()
4705 if (*input_line_pointer == '"')
4706 name = demand_copy_C_string (&len);
4709 char *start = input_line_pointer;
4710 char c = get_symbol_end ();
4712 if (input_line_pointer == start)
4714 as_bad ("Missing section name");
4715 ignore_rest_of_line ();
4718 name = obstack_copy (¬es, start, input_line_pointer - start + 1);
4719 *input_line_pointer = c;
4723 ignore_rest_of_line ();
4727 if (*input_line_pointer != ',')
4729 as_bad ("Comma expected after section name");
4730 ignore_rest_of_line ();
4733 ++input_line_pointer; /* skip comma */
4741 char *name = parse_section_name ();
4745 md.keep_pending_output = 1;
4748 obj_elf_previous (0);
4749 md.keep_pending_output = 0;
4752 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4755 stmt_float_cons (kind)
4776 ia64_do_align (alignment);
4784 int saved_auto_align = md.auto_align;
4788 md.auto_align = saved_auto_align;
4792 dot_xfloat_cons (kind)
4795 char *name = parse_section_name ();
4799 md.keep_pending_output = 1;
4801 stmt_float_cons (kind);
4802 obj_elf_previous (0);
4803 md.keep_pending_output = 0;
4807 dot_xstringer (zero)
4810 char *name = parse_section_name ();
4814 md.keep_pending_output = 1;
4817 obj_elf_previous (0);
4818 md.keep_pending_output = 0;
4825 int saved_auto_align = md.auto_align;
4826 char *name = parse_section_name ();
4830 md.keep_pending_output = 1;
4834 md.auto_align = saved_auto_align;
4835 obj_elf_previous (0);
4836 md.keep_pending_output = 0;
4840 dot_xfloat_cons_ua (kind)
4843 int saved_auto_align = md.auto_align;
4844 char *name = parse_section_name ();
4848 md.keep_pending_output = 1;
4851 stmt_float_cons (kind);
4852 md.auto_align = saved_auto_align;
4853 obj_elf_previous (0);
4854 md.keep_pending_output = 0;
4857 /* .reg.val <regname>,value */
4861 int dummy ATTRIBUTE_UNUSED;
4866 if (reg.X_op != O_register)
4868 as_bad (_("Register name expected"));
4869 ignore_rest_of_line ();
4871 else if (*input_line_pointer++ != ',')
4873 as_bad (_("Comma expected"));
4874 ignore_rest_of_line ();
4878 valueT value = get_absolute_expression ();
4879 int regno = reg.X_add_number;
4880 if (regno < REG_GR || regno > REG_GR + 128)
4881 as_warn (_("Register value annotation ignored"));
4884 gr_values[regno - REG_GR].known = 1;
4885 gr_values[regno - REG_GR].value = value;
4886 gr_values[regno - REG_GR].path = md.path;
4889 demand_empty_rest_of_line ();
4894 .serialize.instruction
4897 dot_serialize (type)
4900 insn_group_break (0, 0, 0);
4902 instruction_serialization ();
4904 data_serialization ();
4905 insn_group_break (0, 0, 0);
4906 demand_empty_rest_of_line ();
4909 /* select dv checking mode
4914 A stop is inserted when changing modes
4921 if (md.manual_bundling)
4922 as_warn (_("Directive invalid within a bundle"));
4924 if (type == 'E' || type == 'A')
4925 md.mode_explicitly_set = 0;
4927 md.mode_explicitly_set = 1;
4934 if (md.explicit_mode)
4935 insn_group_break (1, 0, 0);
4936 md.explicit_mode = 0;
4940 if (!md.explicit_mode)
4941 insn_group_break (1, 0, 0);
4942 md.explicit_mode = 1;
4946 if (md.explicit_mode != md.default_explicit_mode)
4947 insn_group_break (1, 0, 0);
4948 md.explicit_mode = md.default_explicit_mode;
4949 md.mode_explicitly_set = 0;
4960 for (regno = 0; regno < 64; regno++)
4962 if (mask & ((valueT) 1 << regno))
4964 fprintf (stderr, "%s p%d", comma, regno);
4971 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
4972 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
4973 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
4974 .pred.safe_across_calls p1 [, p2 [,...]]
4983 int p1 = -1, p2 = -1;
4987 if (*input_line_pointer == '"')
4990 char *form = demand_copy_C_string (&len);
4992 if (strcmp (form, "mutex") == 0)
4994 else if (strcmp (form, "clear") == 0)
4996 else if (strcmp (form, "imply") == 0)
4998 obstack_free (¬es, form);
5000 else if (*input_line_pointer == '@')
5002 char *form = ++input_line_pointer;
5003 char c = get_symbol_end();
5005 if (strcmp (form, "mutex") == 0)
5007 else if (strcmp (form, "clear") == 0)
5009 else if (strcmp (form, "imply") == 0)
5011 *input_line_pointer = c;
5015 as_bad (_("Missing predicate relation type"));
5016 ignore_rest_of_line ();
5021 as_bad (_("Unrecognized predicate relation type"));
5022 ignore_rest_of_line ();
5025 if (*input_line_pointer == ',')
5026 ++input_line_pointer;
5036 if (TOUPPER (*input_line_pointer) != 'P'
5037 || (regno = atoi (++input_line_pointer)) < 0
5040 as_bad (_("Predicate register expected"));
5041 ignore_rest_of_line ();
5044 while (ISDIGIT (*input_line_pointer))
5045 ++input_line_pointer;
5052 as_warn (_("Duplicate predicate register ignored"));
5055 /* See if it's a range. */
5056 if (*input_line_pointer == '-')
5059 ++input_line_pointer;
5061 if (TOUPPER (*input_line_pointer) != 'P'
5062 || (regno = atoi (++input_line_pointer)) < 0
5065 as_bad (_("Predicate register expected"));
5066 ignore_rest_of_line ();
5069 while (ISDIGIT (*input_line_pointer))
5070 ++input_line_pointer;
5074 as_bad (_("Bad register range"));
5075 ignore_rest_of_line ();
5086 if (*input_line_pointer != ',')
5088 ++input_line_pointer;
5097 clear_qp_mutex (mask);
5098 clear_qp_implies (mask, (valueT) 0);
5101 if (count != 2 || p1 == -1 || p2 == -1)
5102 as_bad (_("Predicate source and target required"));
5103 else if (p1 == 0 || p2 == 0)
5104 as_bad (_("Use of p0 is not valid in this context"));
5106 add_qp_imply (p1, p2);
5111 as_bad (_("At least two PR arguments expected"));
5116 as_bad (_("Use of p0 is not valid in this context"));
5119 add_qp_mutex (mask);
5122 /* note that we don't override any existing relations */
5125 as_bad (_("At least one PR argument expected"));
5130 fprintf (stderr, "Safe across calls: ");
5131 print_prmask (mask);
5132 fprintf (stderr, "\n");
5134 qp_safe_across_calls = mask;
5137 demand_empty_rest_of_line ();
5140 /* .entry label [, label [, ...]]
5141 Hint to DV code that the given labels are to be considered entry points.
5142 Otherwise, only global labels are considered entry points. */
5146 int dummy ATTRIBUTE_UNUSED;
5155 name = input_line_pointer;
5156 c = get_symbol_end ();
5157 symbolP = symbol_find_or_make (name);
5159 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5161 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5164 *input_line_pointer = c;
5166 c = *input_line_pointer;
5169 input_line_pointer++;
5171 if (*input_line_pointer == '\n')
5177 demand_empty_rest_of_line ();
5180 /* .mem.offset offset, base
5181 "base" is used to distinguish between offsets from a different base. */
5184 dot_mem_offset (dummy)
5185 int dummy ATTRIBUTE_UNUSED;
5187 md.mem_offset.hint = 1;
5188 md.mem_offset.offset = get_absolute_expression ();
5189 if (*input_line_pointer != ',')
5191 as_bad (_("Comma expected"));
5192 ignore_rest_of_line ();
5195 ++input_line_pointer;
5196 md.mem_offset.base = get_absolute_expression ();
5197 demand_empty_rest_of_line ();
5200 /* ia64-specific pseudo-ops: */
5201 const pseudo_typeS md_pseudo_table[] =
5203 { "radix", dot_radix, 0 },
5204 { "lcomm", s_lcomm_bytes, 1 },
5205 { "loc", dot_loc, 0 },
5206 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5207 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5208 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5209 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5210 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5211 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5212 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5213 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5214 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5215 { "proc", dot_proc, 0 },
5216 { "body", dot_body, 0 },
5217 { "prologue", dot_prologue, 0 },
5218 { "endp", dot_endp, 0 },
5220 { "fframe", dot_fframe, 0 },
5221 { "vframe", dot_vframe, 0 },
5222 { "vframesp", dot_vframesp, 0 },
5223 { "vframepsp", dot_vframepsp, 0 },
5224 { "save", dot_save, 0 },
5225 { "restore", dot_restore, 0 },
5226 { "restorereg", dot_restorereg, 0 },
5227 { "restorereg.p", dot_restorereg_p, 0 },
5228 { "handlerdata", dot_handlerdata, 0 },
5229 { "unwentry", dot_unwentry, 0 },
5230 { "altrp", dot_altrp, 0 },
5231 { "savesp", dot_savemem, 0 },
5232 { "savepsp", dot_savemem, 1 },
5233 { "save.g", dot_saveg, 0 },
5234 { "save.f", dot_savef, 0 },
5235 { "save.b", dot_saveb, 0 },
5236 { "save.gf", dot_savegf, 0 },
5237 { "spill", dot_spill, 0 },
5238 { "spillreg", dot_spillreg, 0 },
5239 { "spillsp", dot_spillmem, 0 },
5240 { "spillpsp", dot_spillmem, 1 },
5241 { "spillreg.p", dot_spillreg_p, 0 },
5242 { "spillsp.p", dot_spillmem_p, 0 },
5243 { "spillpsp.p", dot_spillmem_p, 1 },
5244 { "label_state", dot_label_state, 0 },
5245 { "copy_state", dot_copy_state, 0 },
5246 { "unwabi", dot_unwabi, 0 },
5247 { "personality", dot_personality, 0 },
5248 { "mii", dot_template, 0x0 },
5249 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5250 { "mlx", dot_template, 0x2 },
5251 { "mmi", dot_template, 0x4 },
5252 { "mfi", dot_template, 0x6 },
5253 { "mmf", dot_template, 0x7 },
5254 { "mib", dot_template, 0x8 },
5255 { "mbb", dot_template, 0x9 },
5256 { "bbb", dot_template, 0xb },
5257 { "mmb", dot_template, 0xc },
5258 { "mfb", dot_template, 0xe },
5259 { "align", dot_align, 0 },
5260 { "regstk", dot_regstk, 0 },
5261 { "rotr", dot_rot, DYNREG_GR },
5262 { "rotf", dot_rot, DYNREG_FR },
5263 { "rotp", dot_rot, DYNREG_PR },
5264 { "lsb", dot_byteorder, 0 },
5265 { "msb", dot_byteorder, 1 },
5266 { "psr", dot_psr, 0 },
5267 { "alias", dot_alias, 0 },
5268 { "secalias", dot_alias, 1 },
5269 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5271 { "xdata1", dot_xdata, 1 },
5272 { "xdata2", dot_xdata, 2 },
5273 { "xdata4", dot_xdata, 4 },
5274 { "xdata8", dot_xdata, 8 },
5275 { "xdata16", dot_xdata, 16 },
5276 { "xreal4", dot_xfloat_cons, 'f' },
5277 { "xreal8", dot_xfloat_cons, 'd' },
5278 { "xreal10", dot_xfloat_cons, 'x' },
5279 { "xreal16", dot_xfloat_cons, 'X' },
5280 { "xstring", dot_xstringer, 0 },
5281 { "xstringz", dot_xstringer, 1 },
5283 /* unaligned versions: */
5284 { "xdata2.ua", dot_xdata_ua, 2 },
5285 { "xdata4.ua", dot_xdata_ua, 4 },
5286 { "xdata8.ua", dot_xdata_ua, 8 },
5287 { "xdata16.ua", dot_xdata_ua, 16 },
5288 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5289 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5290 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5291 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5293 /* annotations/DV checking support */
5294 { "entry", dot_entry, 0 },
5295 { "mem.offset", dot_mem_offset, 0 },
5296 { "pred.rel", dot_pred_rel, 0 },
5297 { "pred.rel.clear", dot_pred_rel, 'c' },
5298 { "pred.rel.imply", dot_pred_rel, 'i' },
5299 { "pred.rel.mutex", dot_pred_rel, 'm' },
5300 { "pred.safe_across_calls", dot_pred_rel, 's' },
5301 { "reg.val", dot_reg_val, 0 },
5302 { "serialize.data", dot_serialize, 0 },
5303 { "serialize.instruction", dot_serialize, 1 },
5304 { "auto", dot_dv_mode, 'a' },
5305 { "explicit", dot_dv_mode, 'e' },
5306 { "default", dot_dv_mode, 'd' },
5308 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5309 IA-64 aligns data allocation pseudo-ops by default, so we have to
5310 tell it that these ones are supposed to be unaligned. Long term,
5311 should rewrite so that only IA-64 specific data allocation pseudo-ops
5312 are aligned by default. */
5313 {"2byte", stmt_cons_ua, 2},
5314 {"4byte", stmt_cons_ua, 4},
5315 {"8byte", stmt_cons_ua, 8},
5320 static const struct pseudo_opcode
5323 void (*handler) (int);
5328 /* these are more like pseudo-ops, but don't start with a dot */
5329 { "data1", cons, 1 },
5330 { "data2", cons, 2 },
5331 { "data4", cons, 4 },
5332 { "data8", cons, 8 },
5333 { "data16", cons, 16 },
5334 { "real4", stmt_float_cons, 'f' },
5335 { "real8", stmt_float_cons, 'd' },
5336 { "real10", stmt_float_cons, 'x' },
5337 { "real16", stmt_float_cons, 'X' },
5338 { "string", stringer, 0 },
5339 { "stringz", stringer, 1 },
5341 /* unaligned versions: */
5342 { "data2.ua", stmt_cons_ua, 2 },
5343 { "data4.ua", stmt_cons_ua, 4 },
5344 { "data8.ua", stmt_cons_ua, 8 },
5345 { "data16.ua", stmt_cons_ua, 16 },
5346 { "real4.ua", float_cons, 'f' },
5347 { "real8.ua", float_cons, 'd' },
5348 { "real10.ua", float_cons, 'x' },
5349 { "real16.ua", float_cons, 'X' },
5352 /* Declare a register by creating a symbol for it and entering it in
5353 the symbol table. */
5356 declare_register (name, regnum)
5363 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5365 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5367 as_fatal ("Inserting \"%s\" into register table failed: %s",
5374 declare_register_set (prefix, num_regs, base_regnum)
5382 for (i = 0; i < num_regs; ++i)
5384 sprintf (name, "%s%u", prefix, i);
5385 declare_register (name, base_regnum + i);
5390 operand_width (opnd)
5391 enum ia64_opnd opnd;
5393 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5394 unsigned int bits = 0;
5398 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5399 bits += odesc->field[i].bits;
5404 static enum operand_match_result
5405 operand_match (idesc, index, e)
5406 const struct ia64_opcode *idesc;
5410 enum ia64_opnd opnd = idesc->operands[index];
5411 int bits, relocatable = 0;
5412 struct insn_fix *fix;
5419 case IA64_OPND_AR_CCV:
5420 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5421 return OPERAND_MATCH;
5424 case IA64_OPND_AR_CSD:
5425 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5426 return OPERAND_MATCH;
5429 case IA64_OPND_AR_PFS:
5430 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5431 return OPERAND_MATCH;
5435 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5436 return OPERAND_MATCH;
5440 if (e->X_op == O_register && e->X_add_number == REG_IP)
5441 return OPERAND_MATCH;
5445 if (e->X_op == O_register && e->X_add_number == REG_PR)
5446 return OPERAND_MATCH;
5449 case IA64_OPND_PR_ROT:
5450 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5451 return OPERAND_MATCH;
5455 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5456 return OPERAND_MATCH;
5459 case IA64_OPND_PSR_L:
5460 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5461 return OPERAND_MATCH;
5464 case IA64_OPND_PSR_UM:
5465 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5466 return OPERAND_MATCH;
5470 if (e->X_op == O_constant)
5472 if (e->X_add_number == 1)
5473 return OPERAND_MATCH;
5475 return OPERAND_OUT_OF_RANGE;
5480 if (e->X_op == O_constant)
5482 if (e->X_add_number == 8)
5483 return OPERAND_MATCH;
5485 return OPERAND_OUT_OF_RANGE;
5490 if (e->X_op == O_constant)
5492 if (e->X_add_number == 16)
5493 return OPERAND_MATCH;
5495 return OPERAND_OUT_OF_RANGE;
5499 /* register operands: */
5502 if (e->X_op == O_register && e->X_add_number >= REG_AR
5503 && e->X_add_number < REG_AR + 128)
5504 return OPERAND_MATCH;
5509 if (e->X_op == O_register && e->X_add_number >= REG_BR
5510 && e->X_add_number < REG_BR + 8)
5511 return OPERAND_MATCH;
5515 if (e->X_op == O_register && e->X_add_number >= REG_CR
5516 && e->X_add_number < REG_CR + 128)
5517 return OPERAND_MATCH;
5524 if (e->X_op == O_register && e->X_add_number >= REG_FR
5525 && e->X_add_number < REG_FR + 128)
5526 return OPERAND_MATCH;
5531 if (e->X_op == O_register && e->X_add_number >= REG_P
5532 && e->X_add_number < REG_P + 64)
5533 return OPERAND_MATCH;
5539 if (e->X_op == O_register && e->X_add_number >= REG_GR
5540 && e->X_add_number < REG_GR + 128)
5541 return OPERAND_MATCH;
5544 case IA64_OPND_R3_2:
5545 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5547 if (e->X_add_number < REG_GR + 4)
5548 return OPERAND_MATCH;
5549 else if (e->X_add_number < REG_GR + 128)
5550 return OPERAND_OUT_OF_RANGE;
5554 /* indirect operands: */
5555 case IA64_OPND_CPUID_R3:
5556 case IA64_OPND_DBR_R3:
5557 case IA64_OPND_DTR_R3:
5558 case IA64_OPND_ITR_R3:
5559 case IA64_OPND_IBR_R3:
5560 case IA64_OPND_MSR_R3:
5561 case IA64_OPND_PKR_R3:
5562 case IA64_OPND_PMC_R3:
5563 case IA64_OPND_PMD_R3:
5564 case IA64_OPND_RR_R3:
5565 if (e->X_op == O_index && e->X_op_symbol
5566 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5567 == opnd - IA64_OPND_CPUID_R3))
5568 return OPERAND_MATCH;
5572 if (e->X_op == O_index && !e->X_op_symbol)
5573 return OPERAND_MATCH;
5576 /* immediate operands: */
5577 case IA64_OPND_CNT2a:
5578 case IA64_OPND_LEN4:
5579 case IA64_OPND_LEN6:
5580 bits = operand_width (idesc->operands[index]);
5581 if (e->X_op == O_constant)
5583 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5584 return OPERAND_MATCH;
5586 return OPERAND_OUT_OF_RANGE;
5590 case IA64_OPND_CNT2b:
5591 if (e->X_op == O_constant)
5593 if ((bfd_vma) (e->X_add_number - 1) < 3)
5594 return OPERAND_MATCH;
5596 return OPERAND_OUT_OF_RANGE;
5600 case IA64_OPND_CNT2c:
5601 val = e->X_add_number;
5602 if (e->X_op == O_constant)
5604 if ((val == 0 || val == 7 || val == 15 || val == 16))
5605 return OPERAND_MATCH;
5607 return OPERAND_OUT_OF_RANGE;
5612 /* SOR must be an integer multiple of 8 */
5613 if (e->X_op == O_constant && e->X_add_number & 0x7)
5614 return OPERAND_OUT_OF_RANGE;
5617 if (e->X_op == O_constant)
5619 if ((bfd_vma) e->X_add_number <= 96)
5620 return OPERAND_MATCH;
5622 return OPERAND_OUT_OF_RANGE;
5626 case IA64_OPND_IMMU62:
5627 if (e->X_op == O_constant)
5629 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5630 return OPERAND_MATCH;
5632 return OPERAND_OUT_OF_RANGE;
5636 /* FIXME -- need 62-bit relocation type */
5637 as_bad (_("62-bit relocation not yet implemented"));
5641 case IA64_OPND_IMMU64:
5642 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5643 || e->X_op == O_subtract)
5645 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5646 fix->code = BFD_RELOC_IA64_IMM64;
5647 if (e->X_op != O_subtract)
5649 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5650 if (e->X_op == O_pseudo_fixup)
5654 fix->opnd = idesc->operands[index];
5657 ++CURR_SLOT.num_fixups;
5658 return OPERAND_MATCH;
5660 else if (e->X_op == O_constant)
5661 return OPERAND_MATCH;
5664 case IA64_OPND_CCNT5:
5665 case IA64_OPND_CNT5:
5666 case IA64_OPND_CNT6:
5667 case IA64_OPND_CPOS6a:
5668 case IA64_OPND_CPOS6b:
5669 case IA64_OPND_CPOS6c:
5670 case IA64_OPND_IMMU2:
5671 case IA64_OPND_IMMU7a:
5672 case IA64_OPND_IMMU7b:
5673 case IA64_OPND_IMMU21:
5674 case IA64_OPND_IMMU24:
5675 case IA64_OPND_MBTYPE4:
5676 case IA64_OPND_MHTYPE8:
5677 case IA64_OPND_POS6:
5678 bits = operand_width (idesc->operands[index]);
5679 if (e->X_op == O_constant)
5681 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5682 return OPERAND_MATCH;
5684 return OPERAND_OUT_OF_RANGE;
5688 case IA64_OPND_IMMU9:
5689 bits = operand_width (idesc->operands[index]);
5690 if (e->X_op == O_constant)
5692 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5694 int lobits = e->X_add_number & 0x3;
5695 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5696 e->X_add_number |= (bfd_vma) 0x3;
5697 return OPERAND_MATCH;
5700 return OPERAND_OUT_OF_RANGE;
5704 case IA64_OPND_IMM44:
5705 /* least 16 bits must be zero */
5706 if ((e->X_add_number & 0xffff) != 0)
5707 /* XXX technically, this is wrong: we should not be issuing warning
5708 messages until we're sure this instruction pattern is going to
5710 as_warn (_("lower 16 bits of mask ignored"));
5712 if (e->X_op == O_constant)
5714 if (((e->X_add_number >= 0
5715 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5716 || (e->X_add_number < 0
5717 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5720 if (e->X_add_number >= 0
5721 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5723 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5725 return OPERAND_MATCH;
5728 return OPERAND_OUT_OF_RANGE;
5732 case IA64_OPND_IMM17:
5733 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5734 if (e->X_op == O_constant)
5736 if (((e->X_add_number >= 0
5737 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5738 || (e->X_add_number < 0
5739 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5742 if (e->X_add_number >= 0
5743 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5745 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5747 return OPERAND_MATCH;
5750 return OPERAND_OUT_OF_RANGE;
5754 case IA64_OPND_IMM14:
5755 case IA64_OPND_IMM22:
5757 case IA64_OPND_IMM1:
5758 case IA64_OPND_IMM8:
5759 case IA64_OPND_IMM8U4:
5760 case IA64_OPND_IMM8M1:
5761 case IA64_OPND_IMM8M1U4:
5762 case IA64_OPND_IMM8M1U8:
5763 case IA64_OPND_IMM9a:
5764 case IA64_OPND_IMM9b:
5765 bits = operand_width (idesc->operands[index]);
5766 if (relocatable && (e->X_op == O_symbol
5767 || e->X_op == O_subtract
5768 || e->X_op == O_pseudo_fixup))
5770 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5772 if (idesc->operands[index] == IA64_OPND_IMM14)
5773 fix->code = BFD_RELOC_IA64_IMM14;
5775 fix->code = BFD_RELOC_IA64_IMM22;
5777 if (e->X_op != O_subtract)
5779 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5780 if (e->X_op == O_pseudo_fixup)
5784 fix->opnd = idesc->operands[index];
5787 ++CURR_SLOT.num_fixups;
5788 return OPERAND_MATCH;
5790 else if (e->X_op != O_constant
5791 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5792 return OPERAND_MISMATCH;
5794 if (opnd == IA64_OPND_IMM8M1U4)
5796 /* Zero is not valid for unsigned compares that take an adjusted
5797 constant immediate range. */
5798 if (e->X_add_number == 0)
5799 return OPERAND_OUT_OF_RANGE;
5801 /* Sign-extend 32-bit unsigned numbers, so that the following range
5802 checks will work. */
5803 val = e->X_add_number;
5804 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5805 && ((val & ((bfd_vma) 1 << 31)) != 0))
5806 val = ((val << 32) >> 32);
5808 /* Check for 0x100000000. This is valid because
5809 0x100000000-1 is the same as ((uint32_t) -1). */
5810 if (val == ((bfd_signed_vma) 1 << 32))
5811 return OPERAND_MATCH;
5815 else if (opnd == IA64_OPND_IMM8M1U8)
5817 /* Zero is not valid for unsigned compares that take an adjusted
5818 constant immediate range. */
5819 if (e->X_add_number == 0)
5820 return OPERAND_OUT_OF_RANGE;
5822 /* Check for 0x10000000000000000. */
5823 if (e->X_op == O_big)
5825 if (generic_bignum[0] == 0
5826 && generic_bignum[1] == 0
5827 && generic_bignum[2] == 0
5828 && generic_bignum[3] == 0
5829 && generic_bignum[4] == 1)
5830 return OPERAND_MATCH;
5832 return OPERAND_OUT_OF_RANGE;
5835 val = e->X_add_number - 1;
5837 else if (opnd == IA64_OPND_IMM8M1)
5838 val = e->X_add_number - 1;
5839 else if (opnd == IA64_OPND_IMM8U4)
5841 /* Sign-extend 32-bit unsigned numbers, so that the following range
5842 checks will work. */
5843 val = e->X_add_number;
5844 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5845 && ((val & ((bfd_vma) 1 << 31)) != 0))
5846 val = ((val << 32) >> 32);
5849 val = e->X_add_number;
5851 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5852 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5853 return OPERAND_MATCH;
5855 return OPERAND_OUT_OF_RANGE;
5857 case IA64_OPND_INC3:
5858 /* +/- 1, 4, 8, 16 */
5859 val = e->X_add_number;
5862 if (e->X_op == O_constant)
5864 if ((val == 1 || val == 4 || val == 8 || val == 16))
5865 return OPERAND_MATCH;
5867 return OPERAND_OUT_OF_RANGE;
5871 case IA64_OPND_TGT25:
5872 case IA64_OPND_TGT25b:
5873 case IA64_OPND_TGT25c:
5874 case IA64_OPND_TGT64:
5875 if (e->X_op == O_symbol)
5877 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5878 if (opnd == IA64_OPND_TGT25)
5879 fix->code = BFD_RELOC_IA64_PCREL21F;
5880 else if (opnd == IA64_OPND_TGT25b)
5881 fix->code = BFD_RELOC_IA64_PCREL21M;
5882 else if (opnd == IA64_OPND_TGT25c)
5883 fix->code = BFD_RELOC_IA64_PCREL21B;
5884 else if (opnd == IA64_OPND_TGT64)
5885 fix->code = BFD_RELOC_IA64_PCREL60B;
5889 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5890 fix->opnd = idesc->operands[index];
5893 ++CURR_SLOT.num_fixups;
5894 return OPERAND_MATCH;
5896 case IA64_OPND_TAG13:
5897 case IA64_OPND_TAG13b:
5901 return OPERAND_MATCH;
5904 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5905 /* There are no external relocs for TAG13/TAG13b fields, so we
5906 create a dummy reloc. This will not live past md_apply_fix3. */
5907 fix->code = BFD_RELOC_UNUSED;
5908 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5909 fix->opnd = idesc->operands[index];
5912 ++CURR_SLOT.num_fixups;
5913 return OPERAND_MATCH;
5920 case IA64_OPND_LDXMOV:
5921 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5922 fix->code = BFD_RELOC_IA64_LDXMOV;
5923 fix->opnd = idesc->operands[index];
5926 ++CURR_SLOT.num_fixups;
5927 return OPERAND_MATCH;
5932 return OPERAND_MISMATCH;
5941 memset (e, 0, sizeof (*e));
5944 if (*input_line_pointer != '}')
5946 sep = *input_line_pointer++;
5950 if (!md.manual_bundling)
5951 as_warn ("Found '}' when manual bundling is off");
5953 CURR_SLOT.manual_bundling_off = 1;
5954 md.manual_bundling = 0;
5960 /* Returns the next entry in the opcode table that matches the one in
5961 IDESC, and frees the entry in IDESC. If no matching entry is
5962 found, NULL is returned instead. */
5964 static struct ia64_opcode *
5965 get_next_opcode (struct ia64_opcode *idesc)
5967 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5968 ia64_free_opcode (idesc);
5972 /* Parse the operands for the opcode and find the opcode variant that
5973 matches the specified operands, or NULL if no match is possible. */
5975 static struct ia64_opcode *
5976 parse_operands (idesc)
5977 struct ia64_opcode *idesc;
5979 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5980 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5981 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5982 enum operand_match_result result;
5984 char *first_arg = 0, *end, *saved_input_pointer;
5987 assert (strlen (idesc->name) <= 128);
5989 strcpy (mnemonic, idesc->name);
5990 if (idesc->operands[2] == IA64_OPND_SOF
5991 || idesc->operands[1] == IA64_OPND_SOF)
5993 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5994 can't parse the first operand until we have parsed the
5995 remaining operands of the "alloc" instruction. */
5997 first_arg = input_line_pointer;
5998 end = strchr (input_line_pointer, '=');
6001 as_bad ("Expected separator `='");
6004 input_line_pointer = end + 1;
6011 if (i < NELEMS (CURR_SLOT.opnd))
6013 sep = parse_operand (CURR_SLOT.opnd + i);
6014 if (CURR_SLOT.opnd[i].X_op == O_absent)
6021 sep = parse_operand (&dummy);
6022 if (dummy.X_op == O_absent)
6028 if (sep != '=' && sep != ',')
6033 if (num_outputs > 0)
6034 as_bad ("Duplicate equal sign (=) in instruction");
6036 num_outputs = i + 1;
6041 as_bad ("Illegal operand separator `%c'", sep);
6045 if (idesc->operands[2] == IA64_OPND_SOF
6046 || idesc->operands[1] == IA64_OPND_SOF)
6048 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6049 know (strcmp (idesc->name, "alloc") == 0);
6050 i = (CURR_SLOT.opnd[1].X_op == O_register
6051 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6052 if (num_operands == i + 3 /* first_arg not included in this count! */
6053 && CURR_SLOT.opnd[i].X_op == O_constant
6054 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6055 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6056 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6058 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6059 CURR_SLOT.opnd[i + 1].X_add_number,
6060 CURR_SLOT.opnd[i + 2].X_add_number,
6061 CURR_SLOT.opnd[i + 3].X_add_number);
6063 /* now we can parse the first arg: */
6064 saved_input_pointer = input_line_pointer;
6065 input_line_pointer = first_arg;
6066 sep = parse_operand (CURR_SLOT.opnd + 0);
6068 --num_outputs; /* force error */
6069 input_line_pointer = saved_input_pointer;
6071 CURR_SLOT.opnd[i].X_add_number = sof;
6072 CURR_SLOT.opnd[i + 1].X_add_number
6073 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6074 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6078 highest_unmatched_operand = -4;
6079 curr_out_of_range_pos = -1;
6081 for (; idesc; idesc = get_next_opcode (idesc))
6083 if (num_outputs != idesc->num_outputs)
6084 continue; /* mismatch in # of outputs */
6085 if (highest_unmatched_operand < 0)
6086 highest_unmatched_operand |= 1;
6087 if (num_operands > NELEMS (idesc->operands)
6088 || (num_operands < NELEMS (idesc->operands)
6089 && idesc->operands[num_operands])
6090 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6091 continue; /* mismatch in number of arguments */
6092 if (highest_unmatched_operand < 0)
6093 highest_unmatched_operand |= 2;
6095 CURR_SLOT.num_fixups = 0;
6097 /* Try to match all operands. If we see an out-of-range operand,
6098 then continue trying to match the rest of the operands, since if
6099 the rest match, then this idesc will give the best error message. */
6101 out_of_range_pos = -1;
6102 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6104 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6105 if (result != OPERAND_MATCH)
6107 if (result != OPERAND_OUT_OF_RANGE)
6109 if (out_of_range_pos < 0)
6110 /* remember position of the first out-of-range operand: */
6111 out_of_range_pos = i;
6115 /* If we did not match all operands, or if at least one operand was
6116 out-of-range, then this idesc does not match. Keep track of which
6117 idesc matched the most operands before failing. If we have two
6118 idescs that failed at the same position, and one had an out-of-range
6119 operand, then prefer the out-of-range operand. Thus if we have
6120 "add r0=0x1000000,r1" we get an error saying the constant is out
6121 of range instead of an error saying that the constant should have been
6124 if (i != num_operands || out_of_range_pos >= 0)
6126 if (i > highest_unmatched_operand
6127 || (i == highest_unmatched_operand
6128 && out_of_range_pos > curr_out_of_range_pos))
6130 highest_unmatched_operand = i;
6131 if (out_of_range_pos >= 0)
6133 expected_operand = idesc->operands[out_of_range_pos];
6134 error_pos = out_of_range_pos;
6138 expected_operand = idesc->operands[i];
6141 curr_out_of_range_pos = out_of_range_pos;
6150 if (expected_operand)
6151 as_bad ("Operand %u of `%s' should be %s",
6152 error_pos + 1, mnemonic,
6153 elf64_ia64_operands[expected_operand].desc);
6154 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6155 as_bad ("Wrong number of output operands");
6156 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6157 as_bad ("Wrong number of input operands");
6159 as_bad ("Operand mismatch");
6166 build_insn (slot, insnp)
6170 const struct ia64_operand *odesc, *o2desc;
6171 struct ia64_opcode *idesc = slot->idesc;
6172 bfd_signed_vma insn, val;
6176 insn = idesc->opcode | slot->qp_regno;
6178 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6180 if (slot->opnd[i].X_op == O_register
6181 || slot->opnd[i].X_op == O_constant
6182 || slot->opnd[i].X_op == O_index)
6183 val = slot->opnd[i].X_add_number;
6184 else if (slot->opnd[i].X_op == O_big)
6186 /* This must be the value 0x10000000000000000. */
6187 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6193 switch (idesc->operands[i])
6195 case IA64_OPND_IMMU64:
6196 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6197 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6198 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6199 | (((val >> 63) & 0x1) << 36));
6202 case IA64_OPND_IMMU62:
6203 val &= 0x3fffffffffffffffULL;
6204 if (val != slot->opnd[i].X_add_number)
6205 as_warn (_("Value truncated to 62 bits"));
6206 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6207 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6210 case IA64_OPND_TGT64:
6212 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6213 insn |= ((((val >> 59) & 0x1) << 36)
6214 | (((val >> 0) & 0xfffff) << 13));
6245 case IA64_OPND_R3_2:
6246 case IA64_OPND_CPUID_R3:
6247 case IA64_OPND_DBR_R3:
6248 case IA64_OPND_DTR_R3:
6249 case IA64_OPND_ITR_R3:
6250 case IA64_OPND_IBR_R3:
6252 case IA64_OPND_MSR_R3:
6253 case IA64_OPND_PKR_R3:
6254 case IA64_OPND_PMC_R3:
6255 case IA64_OPND_PMD_R3:
6256 case IA64_OPND_RR_R3:
6264 odesc = elf64_ia64_operands + idesc->operands[i];
6265 err = (*odesc->insert) (odesc, val, &insn);
6267 as_bad_where (slot->src_file, slot->src_line,
6268 "Bad operand value: %s", err);
6269 if (idesc->flags & IA64_OPCODE_PSEUDO)
6271 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6272 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6274 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6275 (*o2desc->insert) (o2desc, val, &insn);
6277 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6278 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6279 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6281 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6282 (*o2desc->insert) (o2desc, 64 - val, &insn);
6292 int manual_bundling_off = 0, manual_bundling = 0;
6293 enum ia64_unit required_unit, insn_unit = 0;
6294 enum ia64_insn_type type[3], insn_type;
6295 unsigned int template, orig_template;
6296 bfd_vma insn[3] = { -1, -1, -1 };
6297 struct ia64_opcode *idesc;
6298 int end_of_insn_group = 0, user_template = -1;
6299 int n, i, j, first, curr;
6300 unw_rec_list *ptr, *last_ptr, *end_ptr;
6301 bfd_vma t0 = 0, t1 = 0;
6302 struct label_fix *lfix;
6303 struct insn_fix *ifix;
6309 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6310 know (first >= 0 & first < NUM_SLOTS);
6311 n = MIN (3, md.num_slots_in_use);
6313 /* Determine template: user user_template if specified, best match
6316 if (md.slot[first].user_template >= 0)
6317 user_template = template = md.slot[first].user_template;
6320 /* Auto select appropriate template. */
6321 memset (type, 0, sizeof (type));
6323 for (i = 0; i < n; ++i)
6325 if (md.slot[curr].label_fixups && i != 0)
6327 type[i] = md.slot[curr].idesc->type;
6328 curr = (curr + 1) % NUM_SLOTS;
6330 template = best_template[type[0]][type[1]][type[2]];
6333 /* initialize instructions with appropriate nops: */
6334 for (i = 0; i < 3; ++i)
6335 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6339 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6340 from the start of the frag. */
6341 addr_mod = frag_now_fix () & 15;
6342 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6343 as_bad (_("instruction address is not a multiple of 16"));
6344 frag_now->insn_addr = addr_mod;
6345 frag_now->has_code = 1;
6347 /* now fill in slots with as many insns as possible: */
6349 idesc = md.slot[curr].idesc;
6350 end_of_insn_group = 0;
6351 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6353 /* If we have unwind records, we may need to update some now. */
6354 ptr = md.slot[curr].unwind_record;
6357 /* Find the last prologue/body record in the list for the current
6358 insn, and set the slot number for all records up to that point.
6359 This needs to be done now, because prologue/body records refer to
6360 the current point, not the point after the instruction has been
6361 issued. This matters because there may have been nops emitted
6362 meanwhile. Any non-prologue non-body record followed by a
6363 prologue/body record must also refer to the current point. */
6365 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6366 for (; ptr != end_ptr; ptr = ptr->next)
6367 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6368 || ptr->r.type == body)
6372 /* Make last_ptr point one after the last prologue/body
6374 last_ptr = last_ptr->next;
6375 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6378 ptr->slot_number = (unsigned long) f + i;
6379 ptr->slot_frag = frag_now;
6381 /* Remove the initialized records, so that we won't accidentally
6382 update them again if we insert a nop and continue. */
6383 md.slot[curr].unwind_record = last_ptr;
6387 manual_bundling_off = md.slot[curr].manual_bundling_off;
6388 if (md.slot[curr].manual_bundling_on)
6391 manual_bundling = 1;
6393 break; /* Need to start a new bundle. */
6396 if (idesc->flags & IA64_OPCODE_SLOT2)
6398 if (manual_bundling && !manual_bundling_off)
6400 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6401 "`%s' must be last in bundle", idesc->name);
6403 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6407 if (idesc->flags & IA64_OPCODE_LAST)
6410 unsigned int required_template;
6412 /* If we need a stop bit after an M slot, our only choice is
6413 template 5 (M;;MI). If we need a stop bit after a B
6414 slot, our only choice is to place it at the end of the
6415 bundle, because the only available templates are MIB,
6416 MBB, BBB, MMB, and MFB. We don't handle anything other
6417 than M and B slots because these are the only kind of
6418 instructions that can have the IA64_OPCODE_LAST bit set. */
6419 required_template = template;
6420 switch (idesc->type)
6424 required_template = 5;
6432 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6433 "Internal error: don't know how to force %s to end"
6434 "of instruction group", idesc->name);
6439 && (i > required_slot
6440 || (required_slot == 2 && !manual_bundling_off)
6441 || (user_template >= 0
6442 /* Changing from MMI to M;MI is OK. */
6443 && (template ^ required_template) > 1)))
6445 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6446 "`%s' must be last in instruction group",
6448 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6449 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6451 if (required_slot < i)
6452 /* Can't fit this instruction. */
6456 if (required_template != template)
6458 /* If we switch the template, we need to reset the NOPs
6459 after slot i. The slot-types of the instructions ahead
6460 of i never change, so we don't need to worry about
6461 changing NOPs in front of this slot. */
6462 for (j = i; j < 3; ++j)
6463 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6465 template = required_template;
6467 if (curr != first && md.slot[curr].label_fixups)
6469 if (manual_bundling)
6471 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6472 "Label must be first in a bundle");
6473 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6475 /* This insn must go into the first slot of a bundle. */
6479 if (end_of_insn_group && md.num_slots_in_use >= 1)
6481 /* We need an instruction group boundary in the middle of a
6482 bundle. See if we can switch to an other template with
6483 an appropriate boundary. */
6485 orig_template = template;
6486 if (i == 1 && (user_template == 4
6487 || (user_template < 0
6488 && (ia64_templ_desc[template].exec_unit[0]
6492 end_of_insn_group = 0;
6494 else if (i == 2 && (user_template == 0
6495 || (user_template < 0
6496 && (ia64_templ_desc[template].exec_unit[1]
6498 /* This test makes sure we don't switch the template if
6499 the next instruction is one that needs to be first in
6500 an instruction group. Since all those instructions are
6501 in the M group, there is no way such an instruction can
6502 fit in this bundle even if we switch the template. The
6503 reason we have to check for this is that otherwise we
6504 may end up generating "MI;;I M.." which has the deadly
6505 effect that the second M instruction is no longer the
6506 first in the group! --davidm 99/12/16 */
6507 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6510 end_of_insn_group = 0;
6513 && user_template == 0
6514 && !(idesc->flags & IA64_OPCODE_FIRST))
6515 /* Use the next slot. */
6517 else if (curr != first)
6518 /* can't fit this insn */
6521 if (template != orig_template)
6522 /* if we switch the template, we need to reset the NOPs
6523 after slot i. The slot-types of the instructions ahead
6524 of i never change, so we don't need to worry about
6525 changing NOPs in front of this slot. */
6526 for (j = i; j < 3; ++j)
6527 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6529 required_unit = ia64_templ_desc[template].exec_unit[i];
6531 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6532 if (idesc->type == IA64_TYPE_DYN)
6534 enum ia64_opnd opnd1, opnd2;
6536 if ((strcmp (idesc->name, "nop") == 0)
6537 || (strcmp (idesc->name, "hint") == 0)
6538 || (strcmp (idesc->name, "break") == 0))
6539 insn_unit = required_unit;
6540 else if (strcmp (idesc->name, "chk.s") == 0
6541 || strcmp (idesc->name, "mov") == 0)
6543 insn_unit = IA64_UNIT_M;
6544 if (required_unit == IA64_UNIT_I
6545 || (required_unit == IA64_UNIT_F && template == 6))
6546 insn_unit = IA64_UNIT_I;
6549 as_fatal ("emit_one_bundle: unexpected dynamic op");
6551 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6552 opnd1 = idesc->operands[0];
6553 opnd2 = idesc->operands[1];
6554 ia64_free_opcode (idesc);
6555 idesc = ia64_find_opcode (mnemonic);
6556 /* moves to/from ARs have collisions */
6557 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6559 while (idesc != NULL
6560 && (idesc->operands[0] != opnd1
6561 || idesc->operands[1] != opnd2))
6562 idesc = get_next_opcode (idesc);
6564 md.slot[curr].idesc = idesc;
6568 insn_type = idesc->type;
6569 insn_unit = IA64_UNIT_NIL;
6573 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6574 insn_unit = required_unit;
6576 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6577 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6578 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6579 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6580 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6585 if (insn_unit != required_unit)
6587 if (required_unit == IA64_UNIT_L
6588 && insn_unit == IA64_UNIT_I
6589 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6591 /* we got ourselves an MLX template but the current
6592 instruction isn't an X-unit, or an I-unit instruction
6593 that can go into the X slot of an MLX template. Duh. */
6594 if (md.num_slots_in_use >= NUM_SLOTS)
6596 as_bad_where (md.slot[curr].src_file,
6597 md.slot[curr].src_line,
6598 "`%s' can't go in X slot of "
6599 "MLX template", idesc->name);
6600 /* drop this insn so we don't livelock: */
6601 --md.num_slots_in_use;
6605 continue; /* try next slot */
6608 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6610 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6612 md.slot[curr].loc_directive_seen = 0;
6613 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6616 build_insn (md.slot + curr, insn + i);
6618 ptr = md.slot[curr].unwind_record;
6621 /* Set slot numbers for all remaining unwind records belonging to the
6622 current insn. There can not be any prologue/body unwind records
6624 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6625 for (; ptr != end_ptr; ptr = ptr->next)
6627 ptr->slot_number = (unsigned long) f + i;
6628 ptr->slot_frag = frag_now;
6630 md.slot[curr].unwind_record = NULL;
6633 if (required_unit == IA64_UNIT_L)
6636 /* skip one slot for long/X-unit instructions */
6639 --md.num_slots_in_use;
6641 /* now is a good time to fix up the labels for this insn: */
6642 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6644 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6645 symbol_set_frag (lfix->sym, frag_now);
6647 /* and fix up the tags also. */
6648 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6650 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6651 symbol_set_frag (lfix->sym, frag_now);
6654 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6656 ifix = md.slot[curr].fixup + j;
6657 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6658 &ifix->expr, ifix->is_pcrel, ifix->code);
6659 fix->tc_fix_data.opnd = ifix->opnd;
6660 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6661 fix->fx_file = md.slot[curr].src_file;
6662 fix->fx_line = md.slot[curr].src_line;
6665 end_of_insn_group = md.slot[curr].end_of_insn_group;
6668 ia64_free_opcode (md.slot[curr].idesc);
6669 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6670 md.slot[curr].user_template = -1;
6672 if (manual_bundling_off)
6674 manual_bundling = 0;
6677 curr = (curr + 1) % NUM_SLOTS;
6678 idesc = md.slot[curr].idesc;
6680 if (manual_bundling > 0)
6682 if (md.num_slots_in_use > 0)
6684 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6685 "`%s' does not fit into %s template",
6686 idesc->name, ia64_templ_desc[template].name);
6687 --md.num_slots_in_use;
6690 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6691 "Missing '}' at end of file");
6693 know (md.num_slots_in_use < NUM_SLOTS);
6695 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6696 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6698 number_to_chars_littleendian (f + 0, t0, 8);
6699 number_to_chars_littleendian (f + 8, t1, 8);
6703 unwind.list->next_slot_number = (unsigned long) f + 16;
6704 unwind.list->next_slot_frag = frag_now;
6709 md_parse_option (c, arg)
6716 /* Switches from the Intel assembler. */
6718 if (strcmp (arg, "ilp64") == 0
6719 || strcmp (arg, "lp64") == 0
6720 || strcmp (arg, "p64") == 0)
6722 md.flags |= EF_IA_64_ABI64;
6724 else if (strcmp (arg, "ilp32") == 0)
6726 md.flags &= ~EF_IA_64_ABI64;
6728 else if (strcmp (arg, "le") == 0)
6730 md.flags &= ~EF_IA_64_BE;
6731 default_big_endian = 0;
6733 else if (strcmp (arg, "be") == 0)
6735 md.flags |= EF_IA_64_BE;
6736 default_big_endian = 1;
6738 else if (strncmp (arg, "unwind-check=", 13) == 0)
6741 if (strcmp (arg, "warning") == 0)
6742 md.unwind_check = unwind_check_warning;
6743 else if (strcmp (arg, "error") == 0)
6744 md.unwind_check = unwind_check_error;
6753 if (strcmp (arg, "so") == 0)
6755 /* Suppress signon message. */
6757 else if (strcmp (arg, "pi") == 0)
6759 /* Reject privileged instructions. FIXME */
6761 else if (strcmp (arg, "us") == 0)
6763 /* Allow union of signed and unsigned range. FIXME */
6765 else if (strcmp (arg, "close_fcalls") == 0)
6767 /* Do not resolve global function calls. */
6774 /* temp[="prefix"] Insert temporary labels into the object file
6775 symbol table prefixed by "prefix".
6776 Default prefix is ":temp:".
6781 /* indirect=<tgt> Assume unannotated indirect branches behavior
6782 according to <tgt> --
6783 exit: branch out from the current context (default)
6784 labels: all labels in context may be branch targets
6786 if (strncmp (arg, "indirect=", 9) != 0)
6791 /* -X conflicts with an ignored option, use -x instead */
6793 if (!arg || strcmp (arg, "explicit") == 0)
6795 /* set default mode to explicit */
6796 md.default_explicit_mode = 1;
6799 else if (strcmp (arg, "auto") == 0)
6801 md.default_explicit_mode = 0;
6803 else if (strcmp (arg, "debug") == 0)
6807 else if (strcmp (arg, "debugx") == 0)
6809 md.default_explicit_mode = 1;
6814 as_bad (_("Unrecognized option '-x%s'"), arg);
6819 /* nops Print nops statistics. */
6822 /* GNU specific switches for gcc. */
6823 case OPTION_MCONSTANT_GP:
6824 md.flags |= EF_IA_64_CONS_GP;
6827 case OPTION_MAUTO_PIC:
6828 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6839 md_show_usage (stream)
6844 --mconstant-gp mark output file as using the constant-GP model\n\
6845 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6846 --mauto-pic mark output file as using the constant-GP model\n\
6847 without function descriptors (sets ELF header flag\n\
6848 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6849 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6850 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6851 -munwind-check=[warning|error]\n\
6852 unwind directive check (default -munwind-check=warning)\n\
6853 -x | -xexplicit turn on dependency violation checking (default)\n\
6854 -xauto automagically remove dependency violations\n\
6855 -xdebug debug dependency violation checker\n"),
6860 ia64_after_parse_args ()
6862 if (debug_type == DEBUG_STABS)
6863 as_fatal (_("--gstabs is not supported for ia64"));
6866 /* Return true if TYPE fits in TEMPL at SLOT. */
6869 match (int templ, int type, int slot)
6871 enum ia64_unit unit;
6874 unit = ia64_templ_desc[templ].exec_unit[slot];
6877 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6879 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6881 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6882 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6883 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6884 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6885 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6886 default: result = 0; break;
6891 /* Add a bit of extra goodness if a nop of type F or B would fit
6892 in TEMPL at SLOT. */
6895 extra_goodness (int templ, int slot)
6897 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6899 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6904 /* This function is called once, at assembler startup time. It sets
6905 up all the tables, etc. that the MD part of the assembler will need
6906 that can be determined before arguments are parsed. */
6910 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6915 md.explicit_mode = md.default_explicit_mode;
6917 bfd_set_section_alignment (stdoutput, text_section, 4);
6919 /* Make sure function pointers get initialized. */
6920 target_big_endian = -1;
6921 dot_byteorder (default_big_endian);
6923 alias_hash = hash_new ();
6924 alias_name_hash = hash_new ();
6925 secalias_hash = hash_new ();
6926 secalias_name_hash = hash_new ();
6928 pseudo_func[FUNC_DTP_MODULE].u.sym =
6929 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6930 &zero_address_frag);
6932 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6933 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6934 &zero_address_frag);
6936 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6937 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6938 &zero_address_frag);
6940 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6941 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6942 &zero_address_frag);
6944 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6945 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6946 &zero_address_frag);
6948 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6949 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6950 &zero_address_frag);
6952 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6953 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6954 &zero_address_frag);
6956 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6957 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6958 &zero_address_frag);
6960 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6961 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6962 &zero_address_frag);
6964 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6965 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6966 &zero_address_frag);
6968 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6969 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6970 &zero_address_frag);
6972 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6973 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6974 &zero_address_frag);
6976 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6977 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6978 &zero_address_frag);
6980 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6981 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6982 &zero_address_frag);
6984 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6985 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6986 &zero_address_frag);
6988 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6989 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6990 &zero_address_frag);
6992 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6993 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6994 &zero_address_frag);
6996 /* Compute the table of best templates. We compute goodness as a
6997 base 4 value, in which each match counts for 3, each F counts
6998 for 2, each B counts for 1. This should maximize the number of
6999 F and B nops in the chosen bundles, which is good because these
7000 pipelines are least likely to be overcommitted. */
7001 for (i = 0; i < IA64_NUM_TYPES; ++i)
7002 for (j = 0; j < IA64_NUM_TYPES; ++j)
7003 for (k = 0; k < IA64_NUM_TYPES; ++k)
7006 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7009 if (match (t, i, 0))
7011 if (match (t, j, 1))
7013 if (match (t, k, 2))
7014 goodness = 3 + 3 + 3;
7016 goodness = 3 + 3 + extra_goodness (t, 2);
7018 else if (match (t, j, 2))
7019 goodness = 3 + 3 + extra_goodness (t, 1);
7023 goodness += extra_goodness (t, 1);
7024 goodness += extra_goodness (t, 2);
7027 else if (match (t, i, 1))
7029 if (match (t, j, 2))
7032 goodness = 3 + extra_goodness (t, 2);
7034 else if (match (t, i, 2))
7035 goodness = 3 + extra_goodness (t, 1);
7037 if (goodness > best)
7040 best_template[i][j][k] = t;
7045 for (i = 0; i < NUM_SLOTS; ++i)
7046 md.slot[i].user_template = -1;
7048 md.pseudo_hash = hash_new ();
7049 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7051 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7052 (void *) (pseudo_opcode + i));
7054 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7055 pseudo_opcode[i].name, err);
7058 md.reg_hash = hash_new ();
7059 md.dynreg_hash = hash_new ();
7060 md.const_hash = hash_new ();
7061 md.entry_hash = hash_new ();
7063 /* general registers: */
7066 for (i = 0; i < total; ++i)
7068 sprintf (name, "r%d", i - REG_GR);
7069 md.regsym[i] = declare_register (name, i);
7072 /* floating point registers: */
7074 for (; i < total; ++i)
7076 sprintf (name, "f%d", i - REG_FR);
7077 md.regsym[i] = declare_register (name, i);
7080 /* application registers: */
7083 for (; i < total; ++i)
7085 sprintf (name, "ar%d", i - REG_AR);
7086 md.regsym[i] = declare_register (name, i);
7089 /* control registers: */
7092 for (; i < total; ++i)
7094 sprintf (name, "cr%d", i - REG_CR);
7095 md.regsym[i] = declare_register (name, i);
7098 /* predicate registers: */
7100 for (; i < total; ++i)
7102 sprintf (name, "p%d", i - REG_P);
7103 md.regsym[i] = declare_register (name, i);
7106 /* branch registers: */
7108 for (; i < total; ++i)
7110 sprintf (name, "b%d", i - REG_BR);
7111 md.regsym[i] = declare_register (name, i);
7114 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7115 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7116 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7117 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7118 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7119 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7120 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7122 for (i = 0; i < NELEMS (indirect_reg); ++i)
7124 regnum = indirect_reg[i].regnum;
7125 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7128 /* define synonyms for application registers: */
7129 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7130 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7131 REG_AR + ar[i - REG_AR].regnum);
7133 /* define synonyms for control registers: */
7134 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7135 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7136 REG_CR + cr[i - REG_CR].regnum);
7138 declare_register ("gp", REG_GR + 1);
7139 declare_register ("sp", REG_GR + 12);
7140 declare_register ("rp", REG_BR + 0);
7142 /* pseudo-registers used to specify unwind info: */
7143 declare_register ("psp", REG_PSP);
7145 declare_register_set ("ret", 4, REG_GR + 8);
7146 declare_register_set ("farg", 8, REG_FR + 8);
7147 declare_register_set ("fret", 8, REG_FR + 8);
7149 for (i = 0; i < NELEMS (const_bits); ++i)
7151 err = hash_insert (md.const_hash, const_bits[i].name,
7152 (PTR) (const_bits + i));
7154 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7158 /* Set the architecture and machine depending on defaults and command line
7160 if (md.flags & EF_IA_64_ABI64)
7161 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7163 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7166 as_warn (_("Could not set architecture and machine"));
7168 /* Set the pointer size and pointer shift size depending on md.flags */
7170 if (md.flags & EF_IA_64_ABI64)
7172 md.pointer_size = 8; /* pointers are 8 bytes */
7173 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7177 md.pointer_size = 4; /* pointers are 4 bytes */
7178 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7181 md.mem_offset.hint = 0;
7184 md.entry_labels = NULL;
7187 /* Set the default options in md. Cannot do this in md_begin because
7188 that is called after md_parse_option which is where we set the
7189 options in md based on command line options. */
7192 ia64_init (argc, argv)
7193 int argc ATTRIBUTE_UNUSED;
7194 char **argv ATTRIBUTE_UNUSED;
7196 md.flags = MD_FLAGS_DEFAULT;
7197 /* FIXME: We should change it to unwind_check_error someday. */
7198 md.unwind_check = unwind_check_warning;
7201 /* Return a string for the target object file format. */
7204 ia64_target_format ()
7206 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7208 if (md.flags & EF_IA_64_BE)
7210 if (md.flags & EF_IA_64_ABI64)
7211 #if defined(TE_AIX50)
7212 return "elf64-ia64-aix-big";
7213 #elif defined(TE_HPUX)
7214 return "elf64-ia64-hpux-big";
7216 return "elf64-ia64-big";
7219 #if defined(TE_AIX50)
7220 return "elf32-ia64-aix-big";
7221 #elif defined(TE_HPUX)
7222 return "elf32-ia64-hpux-big";
7224 return "elf32-ia64-big";
7229 if (md.flags & EF_IA_64_ABI64)
7231 return "elf64-ia64-aix-little";
7233 return "elf64-ia64-little";
7237 return "elf32-ia64-aix-little";
7239 return "elf32-ia64-little";
7244 return "unknown-format";
7248 ia64_end_of_source ()
7250 /* terminate insn group upon reaching end of file: */
7251 insn_group_break (1, 0, 0);
7253 /* emits slots we haven't written yet: */
7254 ia64_flush_insns ();
7256 bfd_set_private_flags (stdoutput, md.flags);
7258 md.mem_offset.hint = 0;
7264 if (md.qp.X_op == O_register)
7265 as_bad ("qualifying predicate not followed by instruction");
7266 md.qp.X_op = O_absent;
7268 if (ignore_input ())
7271 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7273 if (md.detect_dv && !md.explicit_mode)
7274 as_warn (_("Explicit stops are ignored in auto mode"));
7276 insn_group_break (1, 0, 0);
7280 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7282 static int defining_tag = 0;
7285 ia64_unrecognized_line (ch)
7291 expression (&md.qp);
7292 if (*input_line_pointer++ != ')')
7294 as_bad ("Expected ')'");
7297 if (md.qp.X_op != O_register)
7299 as_bad ("Qualifying predicate expected");
7302 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7304 as_bad ("Predicate register expected");
7310 if (md.manual_bundling)
7311 as_warn ("Found '{' when manual bundling is already turned on");
7313 CURR_SLOT.manual_bundling_on = 1;
7314 md.manual_bundling = 1;
7316 /* Bundling is only acceptable in explicit mode
7317 or when in default automatic mode. */
7318 if (md.detect_dv && !md.explicit_mode)
7320 if (!md.mode_explicitly_set
7321 && !md.default_explicit_mode)
7324 as_warn (_("Found '{' after explicit switch to automatic mode"));
7329 if (!md.manual_bundling)
7330 as_warn ("Found '}' when manual bundling is off");
7332 PREV_SLOT.manual_bundling_off = 1;
7333 md.manual_bundling = 0;
7335 /* switch back to automatic mode, if applicable */
7338 && !md.mode_explicitly_set
7339 && !md.default_explicit_mode)
7342 /* Allow '{' to follow on the same line. We also allow ";;", but that
7343 happens automatically because ';' is an end of line marker. */
7345 if (input_line_pointer[0] == '{')
7347 input_line_pointer++;
7348 return ia64_unrecognized_line ('{');
7351 demand_empty_rest_of_line ();
7361 if (md.qp.X_op == O_register)
7363 as_bad ("Tag must come before qualifying predicate.");
7367 /* This implements just enough of read_a_source_file in read.c to
7368 recognize labels. */
7369 if (is_name_beginner (*input_line_pointer))
7371 s = input_line_pointer;
7372 c = get_symbol_end ();
7374 else if (LOCAL_LABELS_FB
7375 && ISDIGIT (*input_line_pointer))
7378 while (ISDIGIT (*input_line_pointer))
7379 temp = (temp * 10) + *input_line_pointer++ - '0';
7380 fb_label_instance_inc (temp);
7381 s = fb_label_name (temp, 0);
7382 c = *input_line_pointer;
7391 /* Put ':' back for error messages' sake. */
7392 *input_line_pointer++ = ':';
7393 as_bad ("Expected ':'");
7400 /* Put ':' back for error messages' sake. */
7401 *input_line_pointer++ = ':';
7402 if (*input_line_pointer++ != ']')
7404 as_bad ("Expected ']'");
7409 as_bad ("Tag name expected");
7419 /* Not a valid line. */
7424 ia64_frob_label (sym)
7427 struct label_fix *fix;
7429 /* Tags need special handling since they are not bundle breaks like
7433 fix = obstack_alloc (¬es, sizeof (*fix));
7435 fix->next = CURR_SLOT.tag_fixups;
7436 CURR_SLOT.tag_fixups = fix;
7441 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7443 md.last_text_seg = now_seg;
7444 fix = obstack_alloc (¬es, sizeof (*fix));
7446 fix->next = CURR_SLOT.label_fixups;
7447 CURR_SLOT.label_fixups = fix;
7449 /* Keep track of how many code entry points we've seen. */
7450 if (md.path == md.maxpaths)
7453 md.entry_labels = (const char **)
7454 xrealloc ((void *) md.entry_labels,
7455 md.maxpaths * sizeof (char *));
7457 md.entry_labels[md.path++] = S_GET_NAME (sym);
7462 /* The HP-UX linker will give unresolved symbol errors for symbols
7463 that are declared but unused. This routine removes declared,
7464 unused symbols from an object. */
7466 ia64_frob_symbol (sym)
7469 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7470 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7471 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7472 && ! S_IS_EXTERNAL (sym)))
7479 ia64_flush_pending_output ()
7481 if (!md.keep_pending_output
7482 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7484 /* ??? This causes many unnecessary stop bits to be emitted.
7485 Unfortunately, it isn't clear if it is safe to remove this. */
7486 insn_group_break (1, 0, 0);
7487 ia64_flush_insns ();
7491 /* Do ia64-specific expression optimization. All that's done here is
7492 to transform index expressions that are either due to the indexing
7493 of rotating registers or due to the indexing of indirect register
7496 ia64_optimize_expr (l, op, r)
7505 if (l->X_op == O_register && r->X_op == O_constant)
7507 num_regs = (l->X_add_number >> 16);
7508 if ((unsigned) r->X_add_number >= num_regs)
7511 as_bad ("No current frame");
7513 as_bad ("Index out of range 0..%u", num_regs - 1);
7514 r->X_add_number = 0;
7516 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7519 else if (l->X_op == O_register && r->X_op == O_register)
7521 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7522 || l->X_add_number == IND_MEM)
7524 as_bad ("Indirect register set name expected");
7525 l->X_add_number = IND_CPUID;
7528 l->X_op_symbol = md.regsym[l->X_add_number];
7529 l->X_add_number = r->X_add_number;
7537 ia64_parse_name (name, e, nextcharP)
7542 struct const_desc *cdesc;
7543 struct dynreg *dr = 0;
7544 unsigned int regnum;
7551 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7553 /* Find what relocation pseudo-function we're dealing with. */
7554 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7555 if (pseudo_func[idx].name
7556 && pseudo_func[idx].name[0] == name[1]
7557 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7559 pseudo_type = pseudo_func[idx].type;
7562 switch (pseudo_type)
7564 case PSEUDO_FUNC_RELOC:
7565 end = input_line_pointer;
7566 if (*nextcharP != '(')
7568 as_bad ("Expected '('");
7572 ++input_line_pointer;
7574 if (*input_line_pointer != ')')
7576 as_bad ("Missing ')'");
7580 ++input_line_pointer;
7581 if (e->X_op != O_symbol)
7583 if (e->X_op != O_pseudo_fixup)
7585 as_bad ("Not a symbolic expression");
7588 if (idx != FUNC_LT_RELATIVE)
7590 as_bad ("Illegal combination of relocation functions");
7593 switch (S_GET_VALUE (e->X_op_symbol))
7595 case FUNC_FPTR_RELATIVE:
7596 idx = FUNC_LT_FPTR_RELATIVE; break;
7597 case FUNC_DTP_MODULE:
7598 idx = FUNC_LT_DTP_MODULE; break;
7599 case FUNC_DTP_RELATIVE:
7600 idx = FUNC_LT_DTP_RELATIVE; break;
7601 case FUNC_TP_RELATIVE:
7602 idx = FUNC_LT_TP_RELATIVE; break;
7604 as_bad ("Illegal combination of relocation functions");
7608 /* Make sure gas doesn't get rid of local symbols that are used
7610 e->X_op = O_pseudo_fixup;
7611 e->X_op_symbol = pseudo_func[idx].u.sym;
7614 case PSEUDO_FUNC_CONST:
7615 e->X_op = O_constant;
7616 e->X_add_number = pseudo_func[idx].u.ival;
7619 case PSEUDO_FUNC_REG:
7620 e->X_op = O_register;
7621 e->X_add_number = pseudo_func[idx].u.ival;
7628 *nextcharP = *input_line_pointer;
7632 /* first see if NAME is a known register name: */
7633 sym = hash_find (md.reg_hash, name);
7636 e->X_op = O_register;
7637 e->X_add_number = S_GET_VALUE (sym);
7641 cdesc = hash_find (md.const_hash, name);
7644 e->X_op = O_constant;
7645 e->X_add_number = cdesc->value;
7649 /* check for inN, locN, or outN: */
7653 if (name[1] == 'n' && ISDIGIT (name[2]))
7661 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7669 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7682 /* The name is inN, locN, or outN; parse the register number. */
7683 regnum = strtoul (name, &end, 10);
7684 if (end > name && *end == '\0')
7686 if ((unsigned) regnum >= dr->num_regs)
7689 as_bad ("No current frame");
7691 as_bad ("Register number out of range 0..%u",
7695 e->X_op = O_register;
7696 e->X_add_number = dr->base + regnum;
7701 if ((dr = hash_find (md.dynreg_hash, name)))
7703 /* We've got ourselves the name of a rotating register set.
7704 Store the base register number in the low 16 bits of
7705 X_add_number and the size of the register set in the top 16
7707 e->X_op = O_register;
7708 e->X_add_number = dr->base | (dr->num_regs << 16);
7714 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7717 ia64_canonicalize_symbol_name (name)
7720 size_t len = strlen (name);
7721 if (len > 1 && name[len - 1] == '#')
7722 name[len - 1] = '\0';
7726 /* Return true if idesc is a conditional branch instruction. This excludes
7727 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7728 because they always read/write resources regardless of the value of the
7729 qualifying predicate. br.ia must always use p0, and hence is always
7730 taken. Thus this function returns true for branches which can fall
7731 through, and which use no resources if they do fall through. */
7734 is_conditional_branch (idesc)
7735 struct ia64_opcode *idesc;
7737 /* br is a conditional branch. Everything that starts with br. except
7738 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7739 Everything that starts with brl is a conditional branch. */
7740 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7741 && (idesc->name[2] == '\0'
7742 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7743 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7744 || idesc->name[2] == 'l'
7745 /* br.cond, br.call, br.clr */
7746 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7747 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7748 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7751 /* Return whether the given opcode is a taken branch. If there's any doubt,
7755 is_taken_branch (idesc)
7756 struct ia64_opcode *idesc;
7758 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7759 || strncmp (idesc->name, "br.ia", 5) == 0);
7762 /* Return whether the given opcode is an interruption or rfi. If there's any
7763 doubt, returns zero. */
7766 is_interruption_or_rfi (idesc)
7767 struct ia64_opcode *idesc;
7769 if (strcmp (idesc->name, "rfi") == 0)
7774 /* Returns the index of the given dependency in the opcode's list of chks, or
7775 -1 if there is no dependency. */
7778 depends_on (depind, idesc)
7780 struct ia64_opcode *idesc;
7783 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7784 for (i = 0; i < dep->nchks; i++)
7786 if (depind == DEP (dep->chks[i]))
7792 /* Determine a set of specific resources used for a particular resource
7793 class. Returns the number of specific resources identified For those
7794 cases which are not determinable statically, the resource returned is
7797 Meanings of value in 'NOTE':
7798 1) only read/write when the register number is explicitly encoded in the
7800 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7801 accesses CFM when qualifying predicate is in the rotating region.
7802 3) general register value is used to specify an indirect register; not
7803 determinable statically.
7804 4) only read the given resource when bits 7:0 of the indirect index
7805 register value does not match the register number of the resource; not
7806 determinable statically.
7807 5) all rules are implementation specific.
7808 6) only when both the index specified by the reader and the index specified
7809 by the writer have the same value in bits 63:61; not determinable
7811 7) only access the specified resource when the corresponding mask bit is
7813 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7814 only read when these insns reference FR2-31
7815 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7816 written when these insns write FR32-127
7817 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7819 11) The target predicates are written independently of PR[qp], but source
7820 registers are only read if PR[qp] is true. Since the state of PR[qp]
7821 cannot statically be determined, all source registers are marked used.
7822 12) This insn only reads the specified predicate register when that
7823 register is the PR[qp].
7824 13) This reference to ld-c only applies to teh GR whose value is loaded
7825 with data returned from memory, not the post-incremented address register.
7826 14) The RSE resource includes the implementation-specific RSE internal
7827 state resources. At least one (and possibly more) of these resources are
7828 read by each instruction listed in IC:rse-readers. At least one (and
7829 possibly more) of these resources are written by each insn listed in
7831 15+16) Represents reserved instructions, which the assembler does not
7834 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7835 this code; there are no dependency violations based on memory access.
7838 #define MAX_SPECS 256
7843 specify_resource (dep, idesc, type, specs, note, path)
7844 const struct ia64_dependency *dep;
7845 struct ia64_opcode *idesc;
7846 int type; /* is this a DV chk or a DV reg? */
7847 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7848 int note; /* resource note for this insn's usage */
7849 int path; /* which execution path to examine */
7856 if (dep->mode == IA64_DV_WAW
7857 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7858 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7861 /* template for any resources we identify */
7862 tmpl.dependency = dep;
7864 tmpl.insn_srlz = tmpl.data_srlz = 0;
7865 tmpl.qp_regno = CURR_SLOT.qp_regno;
7866 tmpl.link_to_qp_branch = 1;
7867 tmpl.mem_offset.hint = 0;
7870 tmpl.cmp_type = CMP_NONE;
7873 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7874 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7875 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7877 /* we don't need to track these */
7878 if (dep->semantics == IA64_DVS_NONE)
7881 switch (dep->specifier)
7886 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7888 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7889 if (regno >= 0 && regno <= 7)
7891 specs[count] = tmpl;
7892 specs[count++].index = regno;
7898 for (i = 0; i < 8; i++)
7900 specs[count] = tmpl;
7901 specs[count++].index = i;
7910 case IA64_RS_AR_UNAT:
7911 /* This is a mov =AR or mov AR= instruction. */
7912 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7914 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7915 if (regno == AR_UNAT)
7917 specs[count++] = tmpl;
7922 /* This is a spill/fill, or other instruction that modifies the
7925 /* Unless we can determine the specific bits used, mark the whole
7926 thing; bits 8:3 of the memory address indicate the bit used in
7927 UNAT. The .mem.offset hint may be used to eliminate a small
7928 subset of conflicts. */
7929 specs[count] = tmpl;
7930 if (md.mem_offset.hint)
7933 fprintf (stderr, " Using hint for spill/fill\n");
7934 /* The index isn't actually used, just set it to something
7935 approximating the bit index. */
7936 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7937 specs[count].mem_offset.hint = 1;
7938 specs[count].mem_offset.offset = md.mem_offset.offset;
7939 specs[count++].mem_offset.base = md.mem_offset.base;
7943 specs[count++].specific = 0;
7951 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7953 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7954 if ((regno >= 8 && regno <= 15)
7955 || (regno >= 20 && regno <= 23)
7956 || (regno >= 31 && regno <= 39)
7957 || (regno >= 41 && regno <= 47)
7958 || (regno >= 67 && regno <= 111))
7960 specs[count] = tmpl;
7961 specs[count++].index = regno;
7974 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7976 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7977 if ((regno >= 48 && regno <= 63)
7978 || (regno >= 112 && regno <= 127))
7980 specs[count] = tmpl;
7981 specs[count++].index = regno;
7987 for (i = 48; i < 64; i++)
7989 specs[count] = tmpl;
7990 specs[count++].index = i;
7992 for (i = 112; i < 128; i++)
7994 specs[count] = tmpl;
7995 specs[count++].index = i;
8013 for (i = 0; i < idesc->num_outputs; i++)
8014 if (idesc->operands[i] == IA64_OPND_B1
8015 || idesc->operands[i] == IA64_OPND_B2)
8017 specs[count] = tmpl;
8018 specs[count++].index =
8019 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8024 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8025 if (idesc->operands[i] == IA64_OPND_B1
8026 || idesc->operands[i] == IA64_OPND_B2)
8028 specs[count] = tmpl;
8029 specs[count++].index =
8030 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8036 case IA64_RS_CPUID: /* four or more registers */
8039 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8041 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8042 if (regno >= 0 && regno < NELEMS (gr_values)
8045 specs[count] = tmpl;
8046 specs[count++].index = gr_values[regno].value & 0xFF;
8050 specs[count] = tmpl;
8051 specs[count++].specific = 0;
8061 case IA64_RS_DBR: /* four or more registers */
8064 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8066 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8067 if (regno >= 0 && regno < NELEMS (gr_values)
8070 specs[count] = tmpl;
8071 specs[count++].index = gr_values[regno].value & 0xFF;
8075 specs[count] = tmpl;
8076 specs[count++].specific = 0;
8080 else if (note == 0 && !rsrc_write)
8082 specs[count] = tmpl;
8083 specs[count++].specific = 0;
8091 case IA64_RS_IBR: /* four or more registers */
8094 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8096 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8097 if (regno >= 0 && regno < NELEMS (gr_values)
8100 specs[count] = tmpl;
8101 specs[count++].index = gr_values[regno].value & 0xFF;
8105 specs[count] = tmpl;
8106 specs[count++].specific = 0;
8119 /* These are implementation specific. Force all references to
8120 conflict with all other references. */
8121 specs[count] = tmpl;
8122 specs[count++].specific = 0;
8130 case IA64_RS_PKR: /* 16 or more registers */
8131 if (note == 3 || note == 4)
8133 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8135 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8136 if (regno >= 0 && regno < NELEMS (gr_values)
8141 specs[count] = tmpl;
8142 specs[count++].index = gr_values[regno].value & 0xFF;
8145 for (i = 0; i < NELEMS (gr_values); i++)
8147 /* Uses all registers *except* the one in R3. */
8148 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8150 specs[count] = tmpl;
8151 specs[count++].index = i;
8157 specs[count] = tmpl;
8158 specs[count++].specific = 0;
8165 specs[count] = tmpl;
8166 specs[count++].specific = 0;
8170 case IA64_RS_PMC: /* four or more registers */
8173 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8174 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8177 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8179 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8180 if (regno >= 0 && regno < NELEMS (gr_values)
8183 specs[count] = tmpl;
8184 specs[count++].index = gr_values[regno].value & 0xFF;
8188 specs[count] = tmpl;
8189 specs[count++].specific = 0;
8199 case IA64_RS_PMD: /* four or more registers */
8202 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8204 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8205 if (regno >= 0 && regno < NELEMS (gr_values)
8208 specs[count] = tmpl;
8209 specs[count++].index = gr_values[regno].value & 0xFF;
8213 specs[count] = tmpl;
8214 specs[count++].specific = 0;
8224 case IA64_RS_RR: /* eight registers */
8227 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8229 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8230 if (regno >= 0 && regno < NELEMS (gr_values)
8233 specs[count] = tmpl;
8234 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8238 specs[count] = tmpl;
8239 specs[count++].specific = 0;
8243 else if (note == 0 && !rsrc_write)
8245 specs[count] = tmpl;
8246 specs[count++].specific = 0;
8254 case IA64_RS_CR_IRR:
8257 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8258 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8260 && idesc->operands[1] == IA64_OPND_CR3
8263 for (i = 0; i < 4; i++)
8265 specs[count] = tmpl;
8266 specs[count++].index = CR_IRR0 + i;
8272 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8273 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8275 && regno <= CR_IRR3)
8277 specs[count] = tmpl;
8278 specs[count++].index = regno;
8287 case IA64_RS_CR_LRR:
8294 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8295 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8296 && (regno == CR_LRR0 || regno == CR_LRR1))
8298 specs[count] = tmpl;
8299 specs[count++].index = regno;
8307 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8309 specs[count] = tmpl;
8310 specs[count++].index =
8311 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8326 else if (rsrc_write)
8328 if (dep->specifier == IA64_RS_FRb
8329 && idesc->operands[0] == IA64_OPND_F1)
8331 specs[count] = tmpl;
8332 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8337 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8339 if (idesc->operands[i] == IA64_OPND_F2
8340 || idesc->operands[i] == IA64_OPND_F3
8341 || idesc->operands[i] == IA64_OPND_F4)
8343 specs[count] = tmpl;
8344 specs[count++].index =
8345 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8354 /* This reference applies only to the GR whose value is loaded with
8355 data returned from memory. */
8356 specs[count] = tmpl;
8357 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8363 for (i = 0; i < idesc->num_outputs; i++)
8364 if (idesc->operands[i] == IA64_OPND_R1
8365 || idesc->operands[i] == IA64_OPND_R2
8366 || idesc->operands[i] == IA64_OPND_R3)
8368 specs[count] = tmpl;
8369 specs[count++].index =
8370 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8372 if (idesc->flags & IA64_OPCODE_POSTINC)
8373 for (i = 0; i < NELEMS (idesc->operands); i++)
8374 if (idesc->operands[i] == IA64_OPND_MR3)
8376 specs[count] = tmpl;
8377 specs[count++].index =
8378 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8383 /* Look for anything that reads a GR. */
8384 for (i = 0; i < NELEMS (idesc->operands); i++)
8386 if (idesc->operands[i] == IA64_OPND_MR3
8387 || idesc->operands[i] == IA64_OPND_CPUID_R3
8388 || idesc->operands[i] == IA64_OPND_DBR_R3
8389 || idesc->operands[i] == IA64_OPND_IBR_R3
8390 || idesc->operands[i] == IA64_OPND_MSR_R3
8391 || idesc->operands[i] == IA64_OPND_PKR_R3
8392 || idesc->operands[i] == IA64_OPND_PMC_R3
8393 || idesc->operands[i] == IA64_OPND_PMD_R3
8394 || idesc->operands[i] == IA64_OPND_RR_R3
8395 || ((i >= idesc->num_outputs)
8396 && (idesc->operands[i] == IA64_OPND_R1
8397 || idesc->operands[i] == IA64_OPND_R2
8398 || idesc->operands[i] == IA64_OPND_R3
8399 /* addl source register. */
8400 || idesc->operands[i] == IA64_OPND_R3_2)))
8402 specs[count] = tmpl;
8403 specs[count++].index =
8404 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8415 /* This is the same as IA64_RS_PRr, except that the register range is
8416 from 1 - 15, and there are no rotating register reads/writes here. */
8420 for (i = 1; i < 16; i++)
8422 specs[count] = tmpl;
8423 specs[count++].index = i;
8429 /* Mark only those registers indicated by the mask. */
8432 mask = CURR_SLOT.opnd[2].X_add_number;
8433 for (i = 1; i < 16; i++)
8434 if (mask & ((valueT) 1 << i))
8436 specs[count] = tmpl;
8437 specs[count++].index = i;
8445 else if (note == 11) /* note 11 implies note 1 as well */
8449 for (i = 0; i < idesc->num_outputs; i++)
8451 if (idesc->operands[i] == IA64_OPND_P1
8452 || idesc->operands[i] == IA64_OPND_P2)
8454 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8455 if (regno >= 1 && regno < 16)
8457 specs[count] = tmpl;
8458 specs[count++].index = regno;
8468 else if (note == 12)
8470 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8472 specs[count] = tmpl;
8473 specs[count++].index = CURR_SLOT.qp_regno;
8480 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8481 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8482 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8483 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8485 if ((idesc->operands[0] == IA64_OPND_P1
8486 || idesc->operands[0] == IA64_OPND_P2)
8487 && p1 >= 1 && p1 < 16)
8489 specs[count] = tmpl;
8490 specs[count].cmp_type =
8491 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8492 specs[count++].index = p1;
8494 if ((idesc->operands[1] == IA64_OPND_P1
8495 || idesc->operands[1] == IA64_OPND_P2)
8496 && p2 >= 1 && p2 < 16)
8498 specs[count] = tmpl;
8499 specs[count].cmp_type =
8500 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8501 specs[count++].index = p2;
8506 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8508 specs[count] = tmpl;
8509 specs[count++].index = CURR_SLOT.qp_regno;
8511 if (idesc->operands[1] == IA64_OPND_PR)
8513 for (i = 1; i < 16; i++)
8515 specs[count] = tmpl;
8516 specs[count++].index = i;
8527 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8528 simplified cases of this. */
8532 for (i = 16; i < 63; i++)
8534 specs[count] = tmpl;
8535 specs[count++].index = i;
8541 /* Mark only those registers indicated by the mask. */
8543 && idesc->operands[0] == IA64_OPND_PR)
8545 mask = CURR_SLOT.opnd[2].X_add_number;
8546 if (mask & ((valueT) 1 << 16))
8547 for (i = 16; i < 63; i++)
8549 specs[count] = tmpl;
8550 specs[count++].index = i;
8554 && idesc->operands[0] == IA64_OPND_PR_ROT)
8556 for (i = 16; i < 63; i++)
8558 specs[count] = tmpl;
8559 specs[count++].index = i;
8567 else if (note == 11) /* note 11 implies note 1 as well */
8571 for (i = 0; i < idesc->num_outputs; i++)
8573 if (idesc->operands[i] == IA64_OPND_P1
8574 || idesc->operands[i] == IA64_OPND_P2)
8576 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8577 if (regno >= 16 && regno < 63)
8579 specs[count] = tmpl;
8580 specs[count++].index = regno;
8590 else if (note == 12)
8592 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8594 specs[count] = tmpl;
8595 specs[count++].index = CURR_SLOT.qp_regno;
8602 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8603 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8604 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8605 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8607 if ((idesc->operands[0] == IA64_OPND_P1
8608 || idesc->operands[0] == IA64_OPND_P2)
8609 && p1 >= 16 && p1 < 63)
8611 specs[count] = tmpl;
8612 specs[count].cmp_type =
8613 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8614 specs[count++].index = p1;
8616 if ((idesc->operands[1] == IA64_OPND_P1
8617 || idesc->operands[1] == IA64_OPND_P2)
8618 && p2 >= 16 && p2 < 63)
8620 specs[count] = tmpl;
8621 specs[count].cmp_type =
8622 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8623 specs[count++].index = p2;
8628 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8630 specs[count] = tmpl;
8631 specs[count++].index = CURR_SLOT.qp_regno;
8633 if (idesc->operands[1] == IA64_OPND_PR)
8635 for (i = 16; i < 63; i++)
8637 specs[count] = tmpl;
8638 specs[count++].index = i;
8650 /* Verify that the instruction is using the PSR bit indicated in
8654 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8656 if (dep->regindex < 6)
8658 specs[count++] = tmpl;
8661 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8663 if (dep->regindex < 32
8664 || dep->regindex == 35
8665 || dep->regindex == 36
8666 || (!rsrc_write && dep->regindex == PSR_CPL))
8668 specs[count++] = tmpl;
8671 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8673 if (dep->regindex < 32
8674 || dep->regindex == 35
8675 || dep->regindex == 36
8676 || (rsrc_write && dep->regindex == PSR_CPL))
8678 specs[count++] = tmpl;
8683 /* Several PSR bits have very specific dependencies. */
8684 switch (dep->regindex)
8687 specs[count++] = tmpl;
8692 specs[count++] = tmpl;
8696 /* Only certain CR accesses use PSR.ic */
8697 if (idesc->operands[0] == IA64_OPND_CR3
8698 || idesc->operands[1] == IA64_OPND_CR3)
8701 ((idesc->operands[0] == IA64_OPND_CR3)
8704 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8719 specs[count++] = tmpl;
8728 specs[count++] = tmpl;
8732 /* Only some AR accesses use cpl */
8733 if (idesc->operands[0] == IA64_OPND_AR3
8734 || idesc->operands[1] == IA64_OPND_AR3)
8737 ((idesc->operands[0] == IA64_OPND_AR3)
8740 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8747 && regno <= AR_K7))))
8749 specs[count++] = tmpl;
8754 specs[count++] = tmpl;
8764 if (idesc->operands[0] == IA64_OPND_IMMU24)
8766 mask = CURR_SLOT.opnd[0].X_add_number;
8772 if (mask & ((valueT) 1 << dep->regindex))
8774 specs[count++] = tmpl;
8779 int min = dep->regindex == PSR_DFL ? 2 : 32;
8780 int max = dep->regindex == PSR_DFL ? 31 : 127;
8781 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8782 for (i = 0; i < NELEMS (idesc->operands); i++)
8784 if (idesc->operands[i] == IA64_OPND_F1
8785 || idesc->operands[i] == IA64_OPND_F2
8786 || idesc->operands[i] == IA64_OPND_F3
8787 || idesc->operands[i] == IA64_OPND_F4)
8789 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8790 if (reg >= min && reg <= max)
8792 specs[count++] = tmpl;
8799 int min = dep->regindex == PSR_MFL ? 2 : 32;
8800 int max = dep->regindex == PSR_MFL ? 31 : 127;
8801 /* mfh is read on writes to FR32-127; mfl is read on writes to
8803 for (i = 0; i < idesc->num_outputs; i++)
8805 if (idesc->operands[i] == IA64_OPND_F1)
8807 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8808 if (reg >= min && reg <= max)
8810 specs[count++] = tmpl;
8815 else if (note == 10)
8817 for (i = 0; i < NELEMS (idesc->operands); i++)
8819 if (idesc->operands[i] == IA64_OPND_R1
8820 || idesc->operands[i] == IA64_OPND_R2
8821 || idesc->operands[i] == IA64_OPND_R3)
8823 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8824 if (regno >= 16 && regno <= 31)
8826 specs[count++] = tmpl;
8837 case IA64_RS_AR_FPSR:
8838 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8840 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8841 if (regno == AR_FPSR)
8843 specs[count++] = tmpl;
8848 specs[count++] = tmpl;
8853 /* Handle all AR[REG] resources */
8854 if (note == 0 || note == 1)
8856 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8857 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8858 && regno == dep->regindex)
8860 specs[count++] = tmpl;
8862 /* other AR[REG] resources may be affected by AR accesses */
8863 else if (idesc->operands[0] == IA64_OPND_AR3)
8866 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8867 switch (dep->regindex)
8873 if (regno == AR_BSPSTORE)
8875 specs[count++] = tmpl;
8879 (regno == AR_BSPSTORE
8880 || regno == AR_RNAT))
8882 specs[count++] = tmpl;
8887 else if (idesc->operands[1] == IA64_OPND_AR3)
8890 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8891 switch (dep->regindex)
8896 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8898 specs[count++] = tmpl;
8905 specs[count++] = tmpl;
8915 /* Handle all CR[REG] resources */
8916 if (note == 0 || note == 1)
8918 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8920 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8921 if (regno == dep->regindex)
8923 specs[count++] = tmpl;
8925 else if (!rsrc_write)
8927 /* Reads from CR[IVR] affect other resources. */
8928 if (regno == CR_IVR)
8930 if ((dep->regindex >= CR_IRR0
8931 && dep->regindex <= CR_IRR3)
8932 || dep->regindex == CR_TPR)
8934 specs[count++] = tmpl;
8941 specs[count++] = tmpl;
8950 case IA64_RS_INSERVICE:
8951 /* look for write of EOI (67) or read of IVR (65) */
8952 if ((idesc->operands[0] == IA64_OPND_CR3
8953 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8954 || (idesc->operands[1] == IA64_OPND_CR3
8955 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8957 specs[count++] = tmpl;
8964 specs[count++] = tmpl;
8975 specs[count++] = tmpl;
8979 /* Check if any of the registers accessed are in the rotating region.
8980 mov to/from pr accesses CFM only when qp_regno is in the rotating
8982 for (i = 0; i < NELEMS (idesc->operands); i++)
8984 if (idesc->operands[i] == IA64_OPND_R1
8985 || idesc->operands[i] == IA64_OPND_R2
8986 || idesc->operands[i] == IA64_OPND_R3)
8988 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8989 /* Assumes that md.rot.num_regs is always valid */
8990 if (md.rot.num_regs > 0
8992 && num < 31 + md.rot.num_regs)
8994 specs[count] = tmpl;
8995 specs[count++].specific = 0;
8998 else if (idesc->operands[i] == IA64_OPND_F1
8999 || idesc->operands[i] == IA64_OPND_F2
9000 || idesc->operands[i] == IA64_OPND_F3
9001 || idesc->operands[i] == IA64_OPND_F4)
9003 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9006 specs[count] = tmpl;
9007 specs[count++].specific = 0;
9010 else if (idesc->operands[i] == IA64_OPND_P1
9011 || idesc->operands[i] == IA64_OPND_P2)
9013 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9016 specs[count] = tmpl;
9017 specs[count++].specific = 0;
9021 if (CURR_SLOT.qp_regno > 15)
9023 specs[count] = tmpl;
9024 specs[count++].specific = 0;
9029 /* This is the same as IA64_RS_PRr, except simplified to account for
9030 the fact that there is only one register. */
9034 specs[count++] = tmpl;
9039 if (idesc->operands[2] == IA64_OPND_IMM17)
9040 mask = CURR_SLOT.opnd[2].X_add_number;
9041 if (mask & ((valueT) 1 << 63))
9042 specs[count++] = tmpl;
9044 else if (note == 11)
9046 if ((idesc->operands[0] == IA64_OPND_P1
9047 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9048 || (idesc->operands[1] == IA64_OPND_P2
9049 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9051 specs[count++] = tmpl;
9054 else if (note == 12)
9056 if (CURR_SLOT.qp_regno == 63)
9058 specs[count++] = tmpl;
9065 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9066 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9067 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9068 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9071 && (idesc->operands[0] == IA64_OPND_P1
9072 || idesc->operands[0] == IA64_OPND_P2))
9074 specs[count] = tmpl;
9075 specs[count++].cmp_type =
9076 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9079 && (idesc->operands[1] == IA64_OPND_P1
9080 || idesc->operands[1] == IA64_OPND_P2))
9082 specs[count] = tmpl;
9083 specs[count++].cmp_type =
9084 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9089 if (CURR_SLOT.qp_regno == 63)
9091 specs[count++] = tmpl;
9102 /* FIXME we can identify some individual RSE written resources, but RSE
9103 read resources have not yet been completely identified, so for now
9104 treat RSE as a single resource */
9105 if (strncmp (idesc->name, "mov", 3) == 0)
9109 if (idesc->operands[0] == IA64_OPND_AR3
9110 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9112 specs[count] = tmpl;
9113 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
9118 if (idesc->operands[0] == IA64_OPND_AR3)
9120 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9121 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9123 specs[count++] = tmpl;
9126 else if (idesc->operands[1] == IA64_OPND_AR3)
9128 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9129 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9130 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9132 specs[count++] = tmpl;
9139 specs[count++] = tmpl;
9144 /* FIXME -- do any of these need to be non-specific? */
9145 specs[count++] = tmpl;
9149 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9156 /* Clear branch flags on marked resources. This breaks the link between the
9157 QP of the marking instruction and a subsequent branch on the same QP. */
9160 clear_qp_branch_flag (mask)
9164 for (i = 0; i < regdepslen; i++)
9166 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9167 if ((bit & mask) != 0)
9169 regdeps[i].link_to_qp_branch = 0;
9174 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9175 any mutexes which contain one of the PRs and create new ones when
9179 update_qp_mutex (valueT mask)
9185 while (i < qp_mutexeslen)
9187 if ((qp_mutexes[i].prmask & mask) != 0)
9189 /* If it destroys and creates the same mutex, do nothing. */
9190 if (qp_mutexes[i].prmask == mask
9191 && qp_mutexes[i].path == md.path)
9202 fprintf (stderr, " Clearing mutex relation");
9203 print_prmask (qp_mutexes[i].prmask);
9204 fprintf (stderr, "\n");
9207 /* Deal with the old mutex with more than 3+ PRs only if
9208 the new mutex on the same execution path with it.
9210 FIXME: The 3+ mutex support is incomplete.
9211 dot_pred_rel () may be a better place to fix it. */
9212 if (qp_mutexes[i].path == md.path)
9214 /* If it is a proper subset of the mutex, create a
9217 && (qp_mutexes[i].prmask & mask) == mask)
9220 qp_mutexes[i].prmask &= ~mask;
9221 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9223 /* Modify the mutex if there are more than one
9231 /* Remove the mutex. */
9232 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9240 add_qp_mutex (mask);
9245 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9247 Any changes to a PR clears the mutex relations which include that PR. */
9250 clear_qp_mutex (mask)
9256 while (i < qp_mutexeslen)
9258 if ((qp_mutexes[i].prmask & mask) != 0)
9262 fprintf (stderr, " Clearing mutex relation");
9263 print_prmask (qp_mutexes[i].prmask);
9264 fprintf (stderr, "\n");
9266 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9273 /* Clear implies relations which contain PRs in the given masks.
9274 P1_MASK indicates the source of the implies relation, while P2_MASK
9275 indicates the implied PR. */
9278 clear_qp_implies (p1_mask, p2_mask)
9285 while (i < qp_implieslen)
9287 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9288 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9291 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9292 qp_implies[i].p1, qp_implies[i].p2);
9293 qp_implies[i] = qp_implies[--qp_implieslen];
9300 /* Add the PRs specified to the list of implied relations. */
9303 add_qp_imply (p1, p2)
9310 /* p0 is not meaningful here. */
9311 if (p1 == 0 || p2 == 0)
9317 /* If it exists already, ignore it. */
9318 for (i = 0; i < qp_implieslen; i++)
9320 if (qp_implies[i].p1 == p1
9321 && qp_implies[i].p2 == p2
9322 && qp_implies[i].path == md.path
9323 && !qp_implies[i].p2_branched)
9327 if (qp_implieslen == qp_impliestotlen)
9329 qp_impliestotlen += 20;
9330 qp_implies = (struct qp_imply *)
9331 xrealloc ((void *) qp_implies,
9332 qp_impliestotlen * sizeof (struct qp_imply));
9335 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9336 qp_implies[qp_implieslen].p1 = p1;
9337 qp_implies[qp_implieslen].p2 = p2;
9338 qp_implies[qp_implieslen].path = md.path;
9339 qp_implies[qp_implieslen++].p2_branched = 0;
9341 /* Add in the implied transitive relations; for everything that p2 implies,
9342 make p1 imply that, too; for everything that implies p1, make it imply p2
9344 for (i = 0; i < qp_implieslen; i++)
9346 if (qp_implies[i].p1 == p2)
9347 add_qp_imply (p1, qp_implies[i].p2);
9348 if (qp_implies[i].p2 == p1)
9349 add_qp_imply (qp_implies[i].p1, p2);
9351 /* Add in mutex relations implied by this implies relation; for each mutex
9352 relation containing p2, duplicate it and replace p2 with p1. */
9353 bit = (valueT) 1 << p1;
9354 mask = (valueT) 1 << p2;
9355 for (i = 0; i < qp_mutexeslen; i++)
9357 if (qp_mutexes[i].prmask & mask)
9358 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9362 /* Add the PRs specified in the mask to the mutex list; this means that only
9363 one of the PRs can be true at any time. PR0 should never be included in
9373 if (qp_mutexeslen == qp_mutexestotlen)
9375 qp_mutexestotlen += 20;
9376 qp_mutexes = (struct qpmutex *)
9377 xrealloc ((void *) qp_mutexes,
9378 qp_mutexestotlen * sizeof (struct qpmutex));
9382 fprintf (stderr, " Registering mutex on");
9383 print_prmask (mask);
9384 fprintf (stderr, "\n");
9386 qp_mutexes[qp_mutexeslen].path = md.path;
9387 qp_mutexes[qp_mutexeslen++].prmask = mask;
9391 has_suffix_p (name, suffix)
9395 size_t namelen = strlen (name);
9396 size_t sufflen = strlen (suffix);
9398 if (namelen <= sufflen)
9400 return strcmp (name + namelen - sufflen, suffix) == 0;
9404 clear_register_values ()
9408 fprintf (stderr, " Clearing register values\n");
9409 for (i = 1; i < NELEMS (gr_values); i++)
9410 gr_values[i].known = 0;
9413 /* Keep track of register values/changes which affect DV tracking.
9415 optimization note: should add a flag to classes of insns where otherwise we
9416 have to examine a group of strings to identify them. */
9419 note_register_values (idesc)
9420 struct ia64_opcode *idesc;
9422 valueT qp_changemask = 0;
9425 /* Invalidate values for registers being written to. */
9426 for (i = 0; i < idesc->num_outputs; i++)
9428 if (idesc->operands[i] == IA64_OPND_R1
9429 || idesc->operands[i] == IA64_OPND_R2
9430 || idesc->operands[i] == IA64_OPND_R3)
9432 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9433 if (regno > 0 && regno < NELEMS (gr_values))
9434 gr_values[regno].known = 0;
9436 else if (idesc->operands[i] == IA64_OPND_R3_2)
9438 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9439 if (regno > 0 && regno < 4)
9440 gr_values[regno].known = 0;
9442 else if (idesc->operands[i] == IA64_OPND_P1
9443 || idesc->operands[i] == IA64_OPND_P2)
9445 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9446 qp_changemask |= (valueT) 1 << regno;
9448 else if (idesc->operands[i] == IA64_OPND_PR)
9450 if (idesc->operands[2] & (valueT) 0x10000)
9451 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9453 qp_changemask = idesc->operands[2];
9456 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9458 if (idesc->operands[1] & ((valueT) 1 << 43))
9459 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9461 qp_changemask = idesc->operands[1];
9462 qp_changemask &= ~(valueT) 0xFFFF;
9467 /* Always clear qp branch flags on any PR change. */
9468 /* FIXME there may be exceptions for certain compares. */
9469 clear_qp_branch_flag (qp_changemask);
9471 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9472 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9474 qp_changemask |= ~(valueT) 0xFFFF;
9475 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9477 for (i = 32; i < 32 + md.rot.num_regs; i++)
9478 gr_values[i].known = 0;
9480 clear_qp_mutex (qp_changemask);
9481 clear_qp_implies (qp_changemask, qp_changemask);
9483 /* After a call, all register values are undefined, except those marked
9485 else if (strncmp (idesc->name, "br.call", 6) == 0
9486 || strncmp (idesc->name, "brl.call", 7) == 0)
9488 /* FIXME keep GR values which are marked as "safe_across_calls" */
9489 clear_register_values ();
9490 clear_qp_mutex (~qp_safe_across_calls);
9491 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9492 clear_qp_branch_flag (~qp_safe_across_calls);
9494 else if (is_interruption_or_rfi (idesc)
9495 || is_taken_branch (idesc))
9497 clear_register_values ();
9498 clear_qp_mutex (~(valueT) 0);
9499 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9501 /* Look for mutex and implies relations. */
9502 else if ((idesc->operands[0] == IA64_OPND_P1
9503 || idesc->operands[0] == IA64_OPND_P2)
9504 && (idesc->operands[1] == IA64_OPND_P1
9505 || idesc->operands[1] == IA64_OPND_P2))
9507 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9508 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9509 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9510 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9512 /* If both PRs are PR0, we can't really do anything. */
9513 if (p1 == 0 && p2 == 0)
9516 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9518 /* In general, clear mutexes and implies which include P1 or P2,
9519 with the following exceptions. */
9520 else if (has_suffix_p (idesc->name, ".or.andcm")
9521 || has_suffix_p (idesc->name, ".and.orcm"))
9523 clear_qp_implies (p2mask, p1mask);
9525 else if (has_suffix_p (idesc->name, ".andcm")
9526 || has_suffix_p (idesc->name, ".and"))
9528 clear_qp_implies (0, p1mask | p2mask);
9530 else if (has_suffix_p (idesc->name, ".orcm")
9531 || has_suffix_p (idesc->name, ".or"))
9533 clear_qp_mutex (p1mask | p2mask);
9534 clear_qp_implies (p1mask | p2mask, 0);
9540 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9542 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9543 if (p1 == 0 || p2 == 0)
9544 clear_qp_mutex (p1mask | p2mask);
9546 added = update_qp_mutex (p1mask | p2mask);
9548 if (CURR_SLOT.qp_regno == 0
9549 || has_suffix_p (idesc->name, ".unc"))
9551 if (added == 0 && p1 && p2)
9552 add_qp_mutex (p1mask | p2mask);
9553 if (CURR_SLOT.qp_regno != 0)
9556 add_qp_imply (p1, CURR_SLOT.qp_regno);
9558 add_qp_imply (p2, CURR_SLOT.qp_regno);
9563 /* Look for mov imm insns into GRs. */
9564 else if (idesc->operands[0] == IA64_OPND_R1
9565 && (idesc->operands[1] == IA64_OPND_IMM22
9566 || idesc->operands[1] == IA64_OPND_IMMU64)
9567 && (strcmp (idesc->name, "mov") == 0
9568 || strcmp (idesc->name, "movl") == 0))
9570 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9571 if (regno > 0 && regno < NELEMS (gr_values))
9573 gr_values[regno].known = 1;
9574 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9575 gr_values[regno].path = md.path;
9578 fprintf (stderr, " Know gr%d = ", regno);
9579 fprintf_vma (stderr, gr_values[regno].value);
9580 fputs ("\n", stderr);
9586 clear_qp_mutex (qp_changemask);
9587 clear_qp_implies (qp_changemask, qp_changemask);
9591 /* Return whether the given predicate registers are currently mutex. */
9594 qp_mutex (p1, p2, path)
9604 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9605 for (i = 0; i < qp_mutexeslen; i++)
9607 if (qp_mutexes[i].path >= path
9608 && (qp_mutexes[i].prmask & mask) == mask)
9615 /* Return whether the given resource is in the given insn's list of chks
9616 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9620 resources_match (rs, idesc, note, qp_regno, path)
9622 struct ia64_opcode *idesc;
9627 struct rsrc specs[MAX_SPECS];
9630 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9631 we don't need to check. One exception is note 11, which indicates that
9632 target predicates are written regardless of PR[qp]. */
9633 if (qp_mutex (rs->qp_regno, qp_regno, path)
9637 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9640 /* UNAT checking is a bit more specific than other resources */
9641 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9642 && specs[count].mem_offset.hint
9643 && rs->mem_offset.hint)
9645 if (rs->mem_offset.base == specs[count].mem_offset.base)
9647 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9648 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9655 /* Skip apparent PR write conflicts where both writes are an AND or both
9656 writes are an OR. */
9657 if (rs->dependency->specifier == IA64_RS_PR
9658 || rs->dependency->specifier == IA64_RS_PRr
9659 || rs->dependency->specifier == IA64_RS_PR63)
9661 if (specs[count].cmp_type != CMP_NONE
9662 && specs[count].cmp_type == rs->cmp_type)
9665 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9666 dv_mode[rs->dependency->mode],
9667 rs->dependency->specifier != IA64_RS_PR63 ?
9668 specs[count].index : 63);
9673 " %s on parallel compare conflict %s vs %s on PR%d\n",
9674 dv_mode[rs->dependency->mode],
9675 dv_cmp_type[rs->cmp_type],
9676 dv_cmp_type[specs[count].cmp_type],
9677 rs->dependency->specifier != IA64_RS_PR63 ?
9678 specs[count].index : 63);
9682 /* If either resource is not specific, conservatively assume a conflict
9684 if (!specs[count].specific || !rs->specific)
9686 else if (specs[count].index == rs->index)
9693 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9694 insert a stop to create the break. Update all resource dependencies
9695 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9696 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9697 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9701 insn_group_break (insert_stop, qp_regno, save_current)
9708 if (insert_stop && md.num_slots_in_use > 0)
9709 PREV_SLOT.end_of_insn_group = 1;
9713 fprintf (stderr, " Insn group break%s",
9714 (insert_stop ? " (w/stop)" : ""));
9716 fprintf (stderr, " effective for QP=%d", qp_regno);
9717 fprintf (stderr, "\n");
9721 while (i < regdepslen)
9723 const struct ia64_dependency *dep = regdeps[i].dependency;
9726 && regdeps[i].qp_regno != qp_regno)
9733 && CURR_SLOT.src_file == regdeps[i].file
9734 && CURR_SLOT.src_line == regdeps[i].line)
9740 /* clear dependencies which are automatically cleared by a stop, or
9741 those that have reached the appropriate state of insn serialization */
9742 if (dep->semantics == IA64_DVS_IMPLIED
9743 || dep->semantics == IA64_DVS_IMPLIEDF
9744 || regdeps[i].insn_srlz == STATE_SRLZ)
9746 print_dependency ("Removing", i);
9747 regdeps[i] = regdeps[--regdepslen];
9751 if (dep->semantics == IA64_DVS_DATA
9752 || dep->semantics == IA64_DVS_INSTR
9753 || dep->semantics == IA64_DVS_SPECIFIC)
9755 if (regdeps[i].insn_srlz == STATE_NONE)
9756 regdeps[i].insn_srlz = STATE_STOP;
9757 if (regdeps[i].data_srlz == STATE_NONE)
9758 regdeps[i].data_srlz = STATE_STOP;
9765 /* Add the given resource usage spec to the list of active dependencies. */
9768 mark_resource (idesc, dep, spec, depind, path)
9769 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9770 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9775 if (regdepslen == regdepstotlen)
9777 regdepstotlen += 20;
9778 regdeps = (struct rsrc *)
9779 xrealloc ((void *) regdeps,
9780 regdepstotlen * sizeof (struct rsrc));
9783 regdeps[regdepslen] = *spec;
9784 regdeps[regdepslen].depind = depind;
9785 regdeps[regdepslen].path = path;
9786 regdeps[regdepslen].file = CURR_SLOT.src_file;
9787 regdeps[regdepslen].line = CURR_SLOT.src_line;
9789 print_dependency ("Adding", regdepslen);
9795 print_dependency (action, depind)
9801 fprintf (stderr, " %s %s '%s'",
9802 action, dv_mode[(regdeps[depind].dependency)->mode],
9803 (regdeps[depind].dependency)->name);
9804 if (regdeps[depind].specific && regdeps[depind].index != 0)
9805 fprintf (stderr, " (%d)", regdeps[depind].index);
9806 if (regdeps[depind].mem_offset.hint)
9808 fputs (" ", stderr);
9809 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9810 fputs ("+", stderr);
9811 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9813 fprintf (stderr, "\n");
9818 instruction_serialization ()
9822 fprintf (stderr, " Instruction serialization\n");
9823 for (i = 0; i < regdepslen; i++)
9824 if (regdeps[i].insn_srlz == STATE_STOP)
9825 regdeps[i].insn_srlz = STATE_SRLZ;
9829 data_serialization ()
9833 fprintf (stderr, " Data serialization\n");
9834 while (i < regdepslen)
9836 if (regdeps[i].data_srlz == STATE_STOP
9837 /* Note: as of 991210, all "other" dependencies are cleared by a
9838 data serialization. This might change with new tables */
9839 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9841 print_dependency ("Removing", i);
9842 regdeps[i] = regdeps[--regdepslen];
9849 /* Insert stops and serializations as needed to avoid DVs. */
9852 remove_marked_resource (rs)
9855 switch (rs->dependency->semantics)
9857 case IA64_DVS_SPECIFIC:
9859 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9860 /* ...fall through... */
9861 case IA64_DVS_INSTR:
9863 fprintf (stderr, "Inserting instr serialization\n");
9864 if (rs->insn_srlz < STATE_STOP)
9865 insn_group_break (1, 0, 0);
9866 if (rs->insn_srlz < STATE_SRLZ)
9868 struct slot oldslot = CURR_SLOT;
9869 /* Manually jam a srlz.i insn into the stream */
9870 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9871 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9872 instruction_serialization ();
9873 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9874 if (++md.num_slots_in_use >= NUM_SLOTS)
9876 CURR_SLOT = oldslot;
9878 insn_group_break (1, 0, 0);
9880 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9881 "other" types of DV are eliminated
9882 by a data serialization */
9885 fprintf (stderr, "Inserting data serialization\n");
9886 if (rs->data_srlz < STATE_STOP)
9887 insn_group_break (1, 0, 0);
9889 struct slot oldslot = CURR_SLOT;
9890 /* Manually jam a srlz.d insn into the stream */
9891 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9892 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9893 data_serialization ();
9894 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9895 if (++md.num_slots_in_use >= NUM_SLOTS)
9897 CURR_SLOT = oldslot;
9900 case IA64_DVS_IMPLIED:
9901 case IA64_DVS_IMPLIEDF:
9903 fprintf (stderr, "Inserting stop\n");
9904 insn_group_break (1, 0, 0);
9911 /* Check the resources used by the given opcode against the current dependency
9914 The check is run once for each execution path encountered. In this case,
9915 a unique execution path is the sequence of instructions following a code
9916 entry point, e.g. the following has three execution paths, one starting
9917 at L0, one at L1, and one at L2.
9926 check_dependencies (idesc)
9927 struct ia64_opcode *idesc;
9929 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9933 /* Note that the number of marked resources may change within the
9934 loop if in auto mode. */
9936 while (i < regdepslen)
9938 struct rsrc *rs = ®deps[i];
9939 const struct ia64_dependency *dep = rs->dependency;
9944 if (dep->semantics == IA64_DVS_NONE
9945 || (chkind = depends_on (rs->depind, idesc)) == -1)
9951 note = NOTE (opdeps->chks[chkind]);
9953 /* Check this resource against each execution path seen thus far. */
9954 for (path = 0; path <= md.path; path++)
9958 /* If the dependency wasn't on the path being checked, ignore it. */
9959 if (rs->path < path)
9962 /* If the QP for this insn implies a QP which has branched, don't
9963 bother checking. Ed. NOTE: I don't think this check is terribly
9964 useful; what's the point of generating code which will only be
9965 reached if its QP is zero?
9966 This code was specifically inserted to handle the following code,
9967 based on notes from Intel's DV checking code, where p1 implies p2.
9973 if (CURR_SLOT.qp_regno != 0)
9977 for (implies = 0; implies < qp_implieslen; implies++)
9979 if (qp_implies[implies].path >= path
9980 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9981 && qp_implies[implies].p2_branched)
9991 if ((matchtype = resources_match (rs, idesc, note,
9992 CURR_SLOT.qp_regno, path)) != 0)
9995 char pathmsg[256] = "";
9996 char indexmsg[256] = "";
9997 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10000 sprintf (pathmsg, " when entry is at label '%s'",
10001 md.entry_labels[path - 1]);
10002 if (rs->specific && rs->index != 0)
10003 sprintf (indexmsg, ", specific resource number is %d",
10005 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10007 (certain ? "violates" : "may violate"),
10008 dv_mode[dep->mode], dep->name,
10009 dv_sem[dep->semantics],
10010 pathmsg, indexmsg);
10012 if (md.explicit_mode)
10014 as_warn ("%s", msg);
10015 if (path < md.path)
10016 as_warn (_("Only the first path encountering the conflict "
10018 as_warn_where (rs->file, rs->line,
10019 _("This is the location of the "
10020 "conflicting usage"));
10021 /* Don't bother checking other paths, to avoid duplicating
10022 the same warning */
10028 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10030 remove_marked_resource (rs);
10032 /* since the set of dependencies has changed, start over */
10033 /* FIXME -- since we're removing dvs as we go, we
10034 probably don't really need to start over... */
10047 /* Register new dependencies based on the given opcode. */
10050 mark_resources (idesc)
10051 struct ia64_opcode *idesc;
10054 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10055 int add_only_qp_reads = 0;
10057 /* A conditional branch only uses its resources if it is taken; if it is
10058 taken, we stop following that path. The other branch types effectively
10059 *always* write their resources. If it's not taken, register only QP
10061 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10063 add_only_qp_reads = 1;
10067 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10069 for (i = 0; i < opdeps->nregs; i++)
10071 const struct ia64_dependency *dep;
10072 struct rsrc specs[MAX_SPECS];
10077 dep = ia64_find_dependency (opdeps->regs[i]);
10078 note = NOTE (opdeps->regs[i]);
10080 if (add_only_qp_reads
10081 && !(dep->mode == IA64_DV_WAR
10082 && (dep->specifier == IA64_RS_PR
10083 || dep->specifier == IA64_RS_PRr
10084 || dep->specifier == IA64_RS_PR63)))
10087 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10089 while (count-- > 0)
10091 mark_resource (idesc, dep, &specs[count],
10092 DEP (opdeps->regs[i]), md.path);
10095 /* The execution path may affect register values, which may in turn
10096 affect which indirect-access resources are accessed. */
10097 switch (dep->specifier)
10101 case IA64_RS_CPUID:
10109 for (path = 0; path < md.path; path++)
10111 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10112 while (count-- > 0)
10113 mark_resource (idesc, dep, &specs[count],
10114 DEP (opdeps->regs[i]), path);
10121 /* Remove dependencies when they no longer apply. */
10124 update_dependencies (idesc)
10125 struct ia64_opcode *idesc;
10129 if (strcmp (idesc->name, "srlz.i") == 0)
10131 instruction_serialization ();
10133 else if (strcmp (idesc->name, "srlz.d") == 0)
10135 data_serialization ();
10137 else if (is_interruption_or_rfi (idesc)
10138 || is_taken_branch (idesc))
10140 /* Although technically the taken branch doesn't clear dependencies
10141 which require a srlz.[id], we don't follow the branch; the next
10142 instruction is assumed to start with a clean slate. */
10146 else if (is_conditional_branch (idesc)
10147 && CURR_SLOT.qp_regno != 0)
10149 int is_call = strstr (idesc->name, ".call") != NULL;
10151 for (i = 0; i < qp_implieslen; i++)
10153 /* If the conditional branch's predicate is implied by the predicate
10154 in an existing dependency, remove that dependency. */
10155 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10158 /* Note that this implied predicate takes a branch so that if
10159 a later insn generates a DV but its predicate implies this
10160 one, we can avoid the false DV warning. */
10161 qp_implies[i].p2_branched = 1;
10162 while (depind < regdepslen)
10164 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10166 print_dependency ("Removing", depind);
10167 regdeps[depind] = regdeps[--regdepslen];
10174 /* Any marked resources which have this same predicate should be
10175 cleared, provided that the QP hasn't been modified between the
10176 marking instruction and the branch. */
10179 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10184 while (i < regdepslen)
10186 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10187 && regdeps[i].link_to_qp_branch
10188 && (regdeps[i].file != CURR_SLOT.src_file
10189 || regdeps[i].line != CURR_SLOT.src_line))
10191 /* Treat like a taken branch */
10192 print_dependency ("Removing", i);
10193 regdeps[i] = regdeps[--regdepslen];
10202 /* Examine the current instruction for dependency violations. */
10206 struct ia64_opcode *idesc;
10210 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10211 idesc->name, CURR_SLOT.src_line,
10212 idesc->dependencies->nchks,
10213 idesc->dependencies->nregs);
10216 /* Look through the list of currently marked resources; if the current
10217 instruction has the dependency in its chks list which uses that resource,
10218 check against the specific resources used. */
10219 check_dependencies (idesc);
10221 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10222 then add them to the list of marked resources. */
10223 mark_resources (idesc);
10225 /* There are several types of dependency semantics, and each has its own
10226 requirements for being cleared
10228 Instruction serialization (insns separated by interruption, rfi, or
10229 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10231 Data serialization (instruction serialization, or writer + srlz.d +
10232 reader, where writer and srlz.d are in separate groups) clears
10233 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10234 always be the case).
10236 Instruction group break (groups separated by stop, taken branch,
10237 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10239 update_dependencies (idesc);
10241 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10242 warning. Keep track of as many as possible that are useful. */
10243 note_register_values (idesc);
10245 /* We don't need or want this anymore. */
10246 md.mem_offset.hint = 0;
10251 /* Translate one line of assembly. Pseudo ops and labels do not show
10257 char *saved_input_line_pointer, *mnemonic;
10258 const struct pseudo_opcode *pdesc;
10259 struct ia64_opcode *idesc;
10260 unsigned char qp_regno;
10261 unsigned int flags;
10264 saved_input_line_pointer = input_line_pointer;
10265 input_line_pointer = str;
10267 /* extract the opcode (mnemonic): */
10269 mnemonic = input_line_pointer;
10270 ch = get_symbol_end ();
10271 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10274 *input_line_pointer = ch;
10275 (*pdesc->handler) (pdesc->arg);
10279 /* Find the instruction descriptor matching the arguments. */
10281 idesc = ia64_find_opcode (mnemonic);
10282 *input_line_pointer = ch;
10285 as_bad ("Unknown opcode `%s'", mnemonic);
10289 idesc = parse_operands (idesc);
10293 /* Handle the dynamic ops we can handle now: */
10294 if (idesc->type == IA64_TYPE_DYN)
10296 if (strcmp (idesc->name, "add") == 0)
10298 if (CURR_SLOT.opnd[2].X_op == O_register
10299 && CURR_SLOT.opnd[2].X_add_number < 4)
10303 ia64_free_opcode (idesc);
10304 idesc = ia64_find_opcode (mnemonic);
10306 else if (strcmp (idesc->name, "mov") == 0)
10308 enum ia64_opnd opnd1, opnd2;
10311 opnd1 = idesc->operands[0];
10312 opnd2 = idesc->operands[1];
10313 if (opnd1 == IA64_OPND_AR3)
10315 else if (opnd2 == IA64_OPND_AR3)
10319 if (CURR_SLOT.opnd[rop].X_op == O_register)
10321 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10322 mnemonic = "mov.i";
10323 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10324 mnemonic = "mov.m";
10332 ia64_free_opcode (idesc);
10333 idesc = ia64_find_opcode (mnemonic);
10334 while (idesc != NULL
10335 && (idesc->operands[0] != opnd1
10336 || idesc->operands[1] != opnd2))
10337 idesc = get_next_opcode (idesc);
10341 else if (strcmp (idesc->name, "mov.i") == 0
10342 || strcmp (idesc->name, "mov.m") == 0)
10344 enum ia64_opnd opnd1, opnd2;
10347 opnd1 = idesc->operands[0];
10348 opnd2 = idesc->operands[1];
10349 if (opnd1 == IA64_OPND_AR3)
10351 else if (opnd2 == IA64_OPND_AR3)
10355 if (CURR_SLOT.opnd[rop].X_op == O_register)
10358 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10360 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10362 if (unit != 'a' && unit != idesc->name [4])
10363 as_bad ("AR %d cannot be accessed by %c-unit",
10364 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10370 if (md.qp.X_op == O_register)
10372 qp_regno = md.qp.X_add_number - REG_P;
10373 md.qp.X_op = O_absent;
10376 flags = idesc->flags;
10378 if ((flags & IA64_OPCODE_FIRST) != 0)
10380 /* The alignment frag has to end with a stop bit only if the
10381 next instruction after the alignment directive has to be
10382 the first instruction in an instruction group. */
10385 while (align_frag->fr_type != rs_align_code)
10387 align_frag = align_frag->fr_next;
10391 /* align_frag can be NULL if there are directives in
10393 if (align_frag && align_frag->fr_next == frag_now)
10394 align_frag->tc_frag_data = 1;
10397 insn_group_break (1, 0, 0);
10401 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10403 as_bad ("`%s' cannot be predicated", idesc->name);
10407 /* Build the instruction. */
10408 CURR_SLOT.qp_regno = qp_regno;
10409 CURR_SLOT.idesc = idesc;
10410 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10411 dwarf2_where (&CURR_SLOT.debug_line);
10413 /* Add unwind entry, if there is one. */
10414 if (unwind.current_entry)
10416 CURR_SLOT.unwind_record = unwind.current_entry;
10417 unwind.current_entry = NULL;
10419 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10422 /* Check for dependency violations. */
10426 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10427 if (++md.num_slots_in_use >= NUM_SLOTS)
10428 emit_one_bundle ();
10430 if ((flags & IA64_OPCODE_LAST) != 0)
10431 insn_group_break (1, 0, 0);
10433 md.last_text_seg = now_seg;
10436 input_line_pointer = saved_input_line_pointer;
10439 /* Called when symbol NAME cannot be found in the symbol table.
10440 Should be used for dynamic valued symbols only. */
10443 md_undefined_symbol (name)
10444 char *name ATTRIBUTE_UNUSED;
10449 /* Called for any expression that can not be recognized. When the
10450 function is called, `input_line_pointer' will point to the start of
10457 switch (*input_line_pointer)
10460 ++input_line_pointer;
10462 if (*input_line_pointer != ']')
10464 as_bad ("Closing bracket missing");
10469 if (e->X_op != O_register)
10470 as_bad ("Register expected as index");
10472 ++input_line_pointer;
10483 ignore_rest_of_line ();
10486 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10487 a section symbol plus some offset. For relocs involving @fptr(),
10488 directives we don't want such adjustments since we need to have the
10489 original symbol's name in the reloc. */
10491 ia64_fix_adjustable (fix)
10494 /* Prevent all adjustments to global symbols */
10495 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10498 switch (fix->fx_r_type)
10500 case BFD_RELOC_IA64_FPTR64I:
10501 case BFD_RELOC_IA64_FPTR32MSB:
10502 case BFD_RELOC_IA64_FPTR32LSB:
10503 case BFD_RELOC_IA64_FPTR64MSB:
10504 case BFD_RELOC_IA64_FPTR64LSB:
10505 case BFD_RELOC_IA64_LTOFF_FPTR22:
10506 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10516 ia64_force_relocation (fix)
10519 switch (fix->fx_r_type)
10521 case BFD_RELOC_IA64_FPTR64I:
10522 case BFD_RELOC_IA64_FPTR32MSB:
10523 case BFD_RELOC_IA64_FPTR32LSB:
10524 case BFD_RELOC_IA64_FPTR64MSB:
10525 case BFD_RELOC_IA64_FPTR64LSB:
10527 case BFD_RELOC_IA64_LTOFF22:
10528 case BFD_RELOC_IA64_LTOFF64I:
10529 case BFD_RELOC_IA64_LTOFF_FPTR22:
10530 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10531 case BFD_RELOC_IA64_PLTOFF22:
10532 case BFD_RELOC_IA64_PLTOFF64I:
10533 case BFD_RELOC_IA64_PLTOFF64MSB:
10534 case BFD_RELOC_IA64_PLTOFF64LSB:
10536 case BFD_RELOC_IA64_LTOFF22X:
10537 case BFD_RELOC_IA64_LDXMOV:
10544 return generic_force_reloc (fix);
10547 /* Decide from what point a pc-relative relocation is relative to,
10548 relative to the pc-relative fixup. Er, relatively speaking. */
10550 ia64_pcrel_from_section (fix, sec)
10554 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10556 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10563 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10565 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10569 expr.X_op = O_pseudo_fixup;
10570 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10571 expr.X_add_number = 0;
10572 expr.X_add_symbol = symbol;
10573 emit_expr (&expr, size);
10576 /* This is called whenever some data item (not an instruction) needs a
10577 fixup. We pick the right reloc code depending on the byteorder
10578 currently in effect. */
10580 ia64_cons_fix_new (f, where, nbytes, exp)
10586 bfd_reloc_code_real_type code;
10591 /* There are no reloc for 8 and 16 bit quantities, but we allow
10592 them here since they will work fine as long as the expression
10593 is fully defined at the end of the pass over the source file. */
10594 case 1: code = BFD_RELOC_8; break;
10595 case 2: code = BFD_RELOC_16; break;
10597 if (target_big_endian)
10598 code = BFD_RELOC_IA64_DIR32MSB;
10600 code = BFD_RELOC_IA64_DIR32LSB;
10604 /* In 32-bit mode, data8 could mean function descriptors too. */
10605 if (exp->X_op == O_pseudo_fixup
10606 && exp->X_op_symbol
10607 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10608 && !(md.flags & EF_IA_64_ABI64))
10610 if (target_big_endian)
10611 code = BFD_RELOC_IA64_IPLTMSB;
10613 code = BFD_RELOC_IA64_IPLTLSB;
10614 exp->X_op = O_symbol;
10619 if (target_big_endian)
10620 code = BFD_RELOC_IA64_DIR64MSB;
10622 code = BFD_RELOC_IA64_DIR64LSB;
10627 if (exp->X_op == O_pseudo_fixup
10628 && exp->X_op_symbol
10629 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10631 if (target_big_endian)
10632 code = BFD_RELOC_IA64_IPLTMSB;
10634 code = BFD_RELOC_IA64_IPLTLSB;
10635 exp->X_op = O_symbol;
10641 as_bad ("Unsupported fixup size %d", nbytes);
10642 ignore_rest_of_line ();
10646 if (exp->X_op == O_pseudo_fixup)
10648 exp->X_op = O_symbol;
10649 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10650 /* ??? If code unchanged, unsupported. */
10653 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10654 /* We need to store the byte order in effect in case we're going
10655 to fix an 8 or 16 bit relocation (for which there no real
10656 relocs available). See md_apply_fix3(). */
10657 fix->tc_fix_data.bigendian = target_big_endian;
10660 /* Return the actual relocation we wish to associate with the pseudo
10661 reloc described by SYM and R_TYPE. SYM should be one of the
10662 symbols in the pseudo_func array, or NULL. */
10664 static bfd_reloc_code_real_type
10665 ia64_gen_real_reloc_type (sym, r_type)
10666 struct symbol *sym;
10667 bfd_reloc_code_real_type r_type;
10669 bfd_reloc_code_real_type new = 0;
10676 switch (S_GET_VALUE (sym))
10678 case FUNC_FPTR_RELATIVE:
10681 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10682 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10683 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10684 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10685 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10690 case FUNC_GP_RELATIVE:
10693 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10694 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10695 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10696 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10697 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10698 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10703 case FUNC_LT_RELATIVE:
10706 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10707 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10712 case FUNC_LT_RELATIVE_X:
10715 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10720 case FUNC_PC_RELATIVE:
10723 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10724 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10725 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10726 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10727 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10728 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10733 case FUNC_PLT_RELATIVE:
10736 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10737 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10738 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10739 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10744 case FUNC_SEC_RELATIVE:
10747 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10748 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10749 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10750 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10755 case FUNC_SEG_RELATIVE:
10758 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10759 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10760 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10761 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10766 case FUNC_LTV_RELATIVE:
10769 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10770 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10771 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10772 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10777 case FUNC_LT_FPTR_RELATIVE:
10780 case BFD_RELOC_IA64_IMM22:
10781 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10782 case BFD_RELOC_IA64_IMM64:
10783 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10789 case FUNC_TP_RELATIVE:
10792 case BFD_RELOC_IA64_IMM14:
10793 new = BFD_RELOC_IA64_TPREL14; break;
10794 case BFD_RELOC_IA64_IMM22:
10795 new = BFD_RELOC_IA64_TPREL22; break;
10796 case BFD_RELOC_IA64_IMM64:
10797 new = BFD_RELOC_IA64_TPREL64I; break;
10803 case FUNC_LT_TP_RELATIVE:
10806 case BFD_RELOC_IA64_IMM22:
10807 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10813 case FUNC_LT_DTP_MODULE:
10816 case BFD_RELOC_IA64_IMM22:
10817 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10823 case FUNC_DTP_RELATIVE:
10826 case BFD_RELOC_IA64_DIR64MSB:
10827 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10828 case BFD_RELOC_IA64_DIR64LSB:
10829 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10830 case BFD_RELOC_IA64_IMM14:
10831 new = BFD_RELOC_IA64_DTPREL14; break;
10832 case BFD_RELOC_IA64_IMM22:
10833 new = BFD_RELOC_IA64_DTPREL22; break;
10834 case BFD_RELOC_IA64_IMM64:
10835 new = BFD_RELOC_IA64_DTPREL64I; break;
10841 case FUNC_LT_DTP_RELATIVE:
10844 case BFD_RELOC_IA64_IMM22:
10845 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10851 case FUNC_IPLT_RELOC:
10858 /* Hmmmm. Should this ever occur? */
10865 /* Here is where generate the appropriate reloc for pseudo relocation
10868 ia64_validate_fix (fix)
10871 switch (fix->fx_r_type)
10873 case BFD_RELOC_IA64_FPTR64I:
10874 case BFD_RELOC_IA64_FPTR32MSB:
10875 case BFD_RELOC_IA64_FPTR64LSB:
10876 case BFD_RELOC_IA64_LTOFF_FPTR22:
10877 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10878 if (fix->fx_offset != 0)
10879 as_bad_where (fix->fx_file, fix->fx_line,
10880 "No addend allowed in @fptr() relocation");
10888 fix_insn (fix, odesc, value)
10890 const struct ia64_operand *odesc;
10893 bfd_vma insn[3], t0, t1, control_bits;
10898 slot = fix->fx_where & 0x3;
10899 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10901 /* Bundles are always in little-endian byte order */
10902 t0 = bfd_getl64 (fixpos);
10903 t1 = bfd_getl64 (fixpos + 8);
10904 control_bits = t0 & 0x1f;
10905 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10906 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10907 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10910 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10912 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10913 insn[2] |= (((value & 0x7f) << 13)
10914 | (((value >> 7) & 0x1ff) << 27)
10915 | (((value >> 16) & 0x1f) << 22)
10916 | (((value >> 21) & 0x1) << 21)
10917 | (((value >> 63) & 0x1) << 36));
10919 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10921 if (value & ~0x3fffffffffffffffULL)
10922 err = "integer operand out of range";
10923 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10924 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10926 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10929 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10930 insn[2] |= ((((value >> 59) & 0x1) << 36)
10931 | (((value >> 0) & 0xfffff) << 13));
10934 err = (*odesc->insert) (odesc, value, insn + slot);
10937 as_bad_where (fix->fx_file, fix->fx_line, err);
10939 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10940 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10941 number_to_chars_littleendian (fixpos + 0, t0, 8);
10942 number_to_chars_littleendian (fixpos + 8, t1, 8);
10945 /* Attempt to simplify or even eliminate a fixup. The return value is
10946 ignored; perhaps it was once meaningful, but now it is historical.
10947 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10949 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10953 md_apply_fix3 (fix, valP, seg)
10956 segT seg ATTRIBUTE_UNUSED;
10959 valueT value = *valP;
10961 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10965 switch (fix->fx_r_type)
10967 case BFD_RELOC_IA64_DIR32MSB:
10968 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10971 case BFD_RELOC_IA64_DIR32LSB:
10972 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10975 case BFD_RELOC_IA64_DIR64MSB:
10976 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10979 case BFD_RELOC_IA64_DIR64LSB:
10980 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10989 switch (fix->fx_r_type)
10991 case BFD_RELOC_UNUSED:
10992 /* This must be a TAG13 or TAG13b operand. There are no external
10993 relocs defined for them, so we must give an error. */
10994 as_bad_where (fix->fx_file, fix->fx_line,
10995 "%s must have a constant value",
10996 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11000 case BFD_RELOC_IA64_TPREL14:
11001 case BFD_RELOC_IA64_TPREL22:
11002 case BFD_RELOC_IA64_TPREL64I:
11003 case BFD_RELOC_IA64_LTOFF_TPREL22:
11004 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11005 case BFD_RELOC_IA64_DTPREL14:
11006 case BFD_RELOC_IA64_DTPREL22:
11007 case BFD_RELOC_IA64_DTPREL64I:
11008 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11009 S_SET_THREAD_LOCAL (fix->fx_addsy);
11016 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11018 if (fix->tc_fix_data.bigendian)
11019 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11021 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11026 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11031 /* Generate the BFD reloc to be stuck in the object file from the
11032 fixup used internally in the assembler. */
11035 tc_gen_reloc (sec, fixp)
11036 asection *sec ATTRIBUTE_UNUSED;
11041 reloc = xmalloc (sizeof (*reloc));
11042 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11043 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11044 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11045 reloc->addend = fixp->fx_offset;
11046 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11050 as_bad_where (fixp->fx_file, fixp->fx_line,
11051 "Cannot represent %s relocation in object file",
11052 bfd_get_reloc_code_name (fixp->fx_r_type));
11057 /* Turn a string in input_line_pointer into a floating point constant
11058 of type TYPE, and store the appropriate bytes in *LIT. The number
11059 of LITTLENUMS emitted is stored in *SIZE. An error message is
11060 returned, or NULL on OK. */
11062 #define MAX_LITTLENUMS 5
11065 md_atof (type, lit, size)
11070 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11100 return "Bad call to MD_ATOF()";
11102 t = atof_ieee (input_line_pointer, type, words);
11104 input_line_pointer = t;
11106 (*ia64_float_to_chars) (lit, words, prec);
11110 /* It is 10 byte floating point with 6 byte padding. */
11111 memset (&lit [10], 0, 6);
11112 *size = 8 * sizeof (LITTLENUM_TYPE);
11115 *size = prec * sizeof (LITTLENUM_TYPE);
11120 /* Handle ia64 specific semantics of the align directive. */
11123 ia64_md_do_align (n, fill, len, max)
11124 int n ATTRIBUTE_UNUSED;
11125 const char *fill ATTRIBUTE_UNUSED;
11126 int len ATTRIBUTE_UNUSED;
11127 int max ATTRIBUTE_UNUSED;
11129 if (subseg_text_p (now_seg))
11130 ia64_flush_insns ();
11133 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11134 of an rs_align_code fragment. */
11137 ia64_handle_align (fragp)
11140 /* Use mfi bundle of nops with no stop bits. */
11141 static const unsigned char le_nop[]
11142 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11143 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11144 static const unsigned char le_nop_stop[]
11145 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11146 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11150 const unsigned char *nop;
11152 if (fragp->fr_type != rs_align_code)
11155 /* Check if this frag has to end with a stop bit. */
11156 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11158 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11159 p = fragp->fr_literal + fragp->fr_fix;
11161 /* If no paddings are needed, we check if we need a stop bit. */
11162 if (!bytes && fragp->tc_frag_data)
11164 if (fragp->fr_fix < 16)
11166 /* FIXME: It won't work with
11168 alloc r32=ar.pfs,1,2,4,0
11172 as_bad_where (fragp->fr_file, fragp->fr_line,
11173 _("Can't add stop bit to mark end of instruction group"));
11176 /* Bundles are always in little-endian byte order. Make sure
11177 the previous bundle has the stop bit. */
11181 /* Make sure we are on a 16-byte boundary, in case someone has been
11182 putting data into a text section. */
11185 int fix = bytes & 15;
11186 memset (p, 0, fix);
11189 fragp->fr_fix += fix;
11192 /* Instruction bundles are always little-endian. */
11193 memcpy (p, nop, 16);
11194 fragp->fr_var = 16;
11198 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11203 number_to_chars_bigendian (lit, (long) (*words++),
11204 sizeof (LITTLENUM_TYPE));
11205 lit += sizeof (LITTLENUM_TYPE);
11210 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11215 number_to_chars_littleendian (lit, (long) (words[prec]),
11216 sizeof (LITTLENUM_TYPE));
11217 lit += sizeof (LITTLENUM_TYPE);
11222 ia64_elf_section_change_hook (void)
11224 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11225 && elf_linked_to_section (now_seg) == NULL)
11226 elf_linked_to_section (now_seg) = text_section;
11227 dot_byteorder (-1);
11230 /* Check if a label should be made global. */
11232 ia64_check_label (symbolS *label)
11234 if (*input_line_pointer == ':')
11236 S_SET_EXTERNAL (label);
11237 input_line_pointer++;
11241 /* Used to remember where .alias and .secalias directives are seen. We
11242 will rename symbol and section names when we are about to output
11243 the relocatable file. */
11246 char *file; /* The file where the directive is seen. */
11247 unsigned int line; /* The line number the directive is at. */
11248 const char *name; /* The orignale name of the symbol. */
11251 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11252 .secalias. Otherwise, it is .alias. */
11254 dot_alias (int section)
11256 char *name, *alias;
11260 const char *error_string;
11263 struct hash_control *ahash, *nhash;
11266 name = input_line_pointer;
11267 delim = get_symbol_end ();
11268 end_name = input_line_pointer;
11271 if (name == end_name)
11273 as_bad (_("expected symbol name"));
11274 discard_rest_of_line ();
11278 SKIP_WHITESPACE ();
11280 if (*input_line_pointer != ',')
11283 as_bad (_("expected comma after \"%s\""), name);
11285 ignore_rest_of_line ();
11289 input_line_pointer++;
11292 /* We call demand_copy_C_string to check if alias string is valid.
11293 There should be a closing `"' and no `\0' in the string. */
11294 alias = demand_copy_C_string (&len);
11297 ignore_rest_of_line ();
11301 /* Make a copy of name string. */
11302 len = strlen (name) + 1;
11303 obstack_grow (¬es, name, len);
11304 name = obstack_finish (¬es);
11309 ahash = secalias_hash;
11310 nhash = secalias_name_hash;
11315 ahash = alias_hash;
11316 nhash = alias_name_hash;
11319 /* Check if alias has been used before. */
11320 h = (struct alias *) hash_find (ahash, alias);
11323 if (strcmp (h->name, name))
11324 as_bad (_("`%s' is already the alias of %s `%s'"),
11325 alias, kind, h->name);
11329 /* Check if name already has an alias. */
11330 a = (const char *) hash_find (nhash, name);
11333 if (strcmp (a, alias))
11334 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11338 h = (struct alias *) xmalloc (sizeof (struct alias));
11339 as_where (&h->file, &h->line);
11342 error_string = hash_jam (ahash, alias, (PTR) h);
11345 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11346 alias, kind, error_string);
11350 error_string = hash_jam (nhash, name, (PTR) alias);
11353 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11354 alias, kind, error_string);
11356 obstack_free (¬es, name);
11357 obstack_free (¬es, alias);
11360 demand_empty_rest_of_line ();
11363 /* It renames the original symbol name to its alias. */
11365 do_alias (const char *alias, PTR value)
11367 struct alias *h = (struct alias *) value;
11368 symbolS *sym = symbol_find (h->name);
11371 as_warn_where (h->file, h->line,
11372 _("symbol `%s' aliased to `%s' is not used"),
11375 S_SET_NAME (sym, (char *) alias);
11378 /* Called from write_object_file. */
11380 ia64_adjust_symtab (void)
11382 hash_traverse (alias_hash, do_alias);
11385 /* It renames the original section name to its alias. */
11387 do_secalias (const char *alias, PTR value)
11389 struct alias *h = (struct alias *) value;
11390 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11393 as_warn_where (h->file, h->line,
11394 _("section `%s' aliased to `%s' is not used"),
11400 /* Called from write_object_file. */
11402 ia64_frob_file (void)
11404 hash_traverse (secalias_hash, do_secalias);