1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
54 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
55 #define MIN(a,b) ((a) < (b) ? (a) : (b))
58 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
59 #define CURR_SLOT md.slot[md.curr_slot]
61 #define O_pseudo_fixup (O_max + 1)
65 /* IA-64 ABI section pseudo-ops. */
66 SPECIAL_SECTION_BSS = 0,
68 SPECIAL_SECTION_SDATA,
69 SPECIAL_SECTION_RODATA,
70 SPECIAL_SECTION_COMMENT,
71 SPECIAL_SECTION_UNWIND,
72 SPECIAL_SECTION_UNWIND_INFO,
73 /* HPUX specific section pseudo-ops. */
74 SPECIAL_SECTION_INIT_ARRAY,
75 SPECIAL_SECTION_FINI_ARRAY,
92 FUNC_LT_FPTR_RELATIVE,
102 REG_FR = (REG_GR + 128),
103 REG_AR = (REG_FR + 128),
104 REG_CR = (REG_AR + 128),
105 REG_P = (REG_CR + 128),
106 REG_BR = (REG_P + 64),
107 REG_IP = (REG_BR + 8),
114 /* The following are pseudo-registers for use by gas only. */
126 /* The following pseudo-registers are used for unwind directives only: */
134 DYNREG_GR = 0, /* dynamic general purpose register */
135 DYNREG_FR, /* dynamic floating point register */
136 DYNREG_PR, /* dynamic predicate register */
140 enum operand_match_result
143 OPERAND_OUT_OF_RANGE,
147 /* On the ia64, we can't know the address of a text label until the
148 instructions are packed into a bundle. To handle this, we keep
149 track of the list of labels that appear in front of each
153 struct label_fix *next;
157 /* This is the endianness of the current section. */
158 extern int target_big_endian;
160 /* This is the default endianness. */
161 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
163 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
165 static void ia64_float_to_chars_bigendian
166 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static void ia64_float_to_chars_littleendian
168 PARAMS ((char *, LITTLENUM_TYPE *, int));
169 static void (*ia64_float_to_chars)
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
172 static struct hash_control *alias_hash;
173 static struct hash_control *alias_name_hash;
174 static struct hash_control *secalias_hash;
175 static struct hash_control *secalias_name_hash;
177 /* Characters which always start a comment. */
178 const char comment_chars[] = "";
180 /* Characters which start a comment at the beginning of a line. */
181 const char line_comment_chars[] = "#";
183 /* Characters which may be used to separate multiple commands on a
185 const char line_separator_chars[] = ";";
187 /* Characters which are used to indicate an exponent in a floating
189 const char EXP_CHARS[] = "eE";
191 /* Characters which mean that a number is a floating point constant,
193 const char FLT_CHARS[] = "rRsSfFdDxXpP";
195 /* ia64-specific option processing: */
197 const char *md_shortopts = "m:N:x::";
199 struct option md_longopts[] =
201 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
202 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
203 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
204 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
207 size_t md_longopts_size = sizeof (md_longopts);
211 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
212 struct hash_control *reg_hash; /* register name hash table */
213 struct hash_control *dynreg_hash; /* dynamic register hash table */
214 struct hash_control *const_hash; /* constant hash table */
215 struct hash_control *entry_hash; /* code entry hint hash table */
217 symbolS *regsym[REG_NUM];
219 /* If X_op is != O_absent, the registername for the instruction's
220 qualifying predicate. If NULL, p0 is assumed for instructions
221 that are predicatable. */
228 explicit_mode : 1, /* which mode we're in */
229 default_explicit_mode : 1, /* which mode is the default */
230 mode_explicitly_set : 1, /* was the current mode explicitly set? */
232 keep_pending_output : 1;
234 /* Each bundle consists of up to three instructions. We keep
235 track of four most recent instructions so we can correctly set
236 the end_of_insn_group for the last instruction in a bundle. */
238 int num_slots_in_use;
242 end_of_insn_group : 1,
243 manual_bundling_on : 1,
244 manual_bundling_off : 1;
245 signed char user_template; /* user-selected template, if any */
246 unsigned char qp_regno; /* qualifying predicate */
247 /* This duplicates a good fraction of "struct fix" but we
248 can't use a "struct fix" instead since we can't call
249 fix_new_exp() until we know the address of the instruction. */
253 bfd_reloc_code_real_type code;
254 enum ia64_opnd opnd; /* type of operand in need of fix */
255 unsigned int is_pcrel : 1; /* is operand pc-relative? */
256 expressionS expr; /* the value to be inserted */
258 fixup[2]; /* at most two fixups per insn */
259 struct ia64_opcode *idesc;
260 struct label_fix *label_fixups;
261 struct label_fix *tag_fixups;
262 struct unw_rec_list *unwind_record; /* Unwind directive. */
265 unsigned int src_line;
266 struct dwarf2_line_info debug_line;
274 struct dynreg *next; /* next dynamic register */
276 unsigned short base; /* the base register number */
277 unsigned short num_regs; /* # of registers in this set */
279 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
281 flagword flags; /* ELF-header flags */
284 unsigned hint:1; /* is this hint currently valid? */
285 bfd_vma offset; /* mem.offset offset */
286 bfd_vma base; /* mem.offset base */
289 int path; /* number of alt. entry points seen */
290 const char **entry_labels; /* labels of all alternate paths in
291 the current DV-checking block. */
292 int maxpaths; /* size currently allocated for
294 /* Support for hardware errata workarounds. */
296 /* Record data about the last three insn groups. */
299 /* B-step workaround.
300 For each predicate register, this is set if the corresponding insn
301 group conditionally sets this register with one of the affected
304 /* B-step workaround.
305 For each general register, this is set if the corresponding insn
306 a) is conditional one one of the predicate registers for which
307 P_REG_SET is 1 in the corresponding entry of the previous group,
308 b) sets this general register with one of the affected
310 int g_reg_set_conditionally[128];
314 int pointer_size; /* size in bytes of a pointer */
315 int pointer_size_shift; /* shift size of a pointer for alignment */
319 /* application registers: */
325 #define AR_BSPSTORE 18
340 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
341 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
342 {"ar.rsc", 16}, {"ar.bsp", 17},
343 {"ar.bspstore", 18}, {"ar.rnat", 19},
344 {"ar.fcr", 21}, {"ar.eflag", 24},
345 {"ar.csd", 25}, {"ar.ssd", 26},
346 {"ar.cflg", 27}, {"ar.fsr", 28},
347 {"ar.fir", 29}, {"ar.fdr", 30},
348 {"ar.ccv", 32}, {"ar.unat", 36},
349 {"ar.fpsr", 40}, {"ar.itc", 44},
350 {"ar.pfs", 64}, {"ar.lc", 65},
371 /* control registers: */
413 static const struct const_desc
420 /* PSR constant masks: */
423 {"psr.be", ((valueT) 1) << 1},
424 {"psr.up", ((valueT) 1) << 2},
425 {"psr.ac", ((valueT) 1) << 3},
426 {"psr.mfl", ((valueT) 1) << 4},
427 {"psr.mfh", ((valueT) 1) << 5},
429 {"psr.ic", ((valueT) 1) << 13},
430 {"psr.i", ((valueT) 1) << 14},
431 {"psr.pk", ((valueT) 1) << 15},
433 {"psr.dt", ((valueT) 1) << 17},
434 {"psr.dfl", ((valueT) 1) << 18},
435 {"psr.dfh", ((valueT) 1) << 19},
436 {"psr.sp", ((valueT) 1) << 20},
437 {"psr.pp", ((valueT) 1) << 21},
438 {"psr.di", ((valueT) 1) << 22},
439 {"psr.si", ((valueT) 1) << 23},
440 {"psr.db", ((valueT) 1) << 24},
441 {"psr.lp", ((valueT) 1) << 25},
442 {"psr.tb", ((valueT) 1) << 26},
443 {"psr.rt", ((valueT) 1) << 27},
444 /* 28-31: reserved */
445 /* 32-33: cpl (current privilege level) */
446 {"psr.is", ((valueT) 1) << 34},
447 {"psr.mc", ((valueT) 1) << 35},
448 {"psr.it", ((valueT) 1) << 36},
449 {"psr.id", ((valueT) 1) << 37},
450 {"psr.da", ((valueT) 1) << 38},
451 {"psr.dd", ((valueT) 1) << 39},
452 {"psr.ss", ((valueT) 1) << 40},
453 /* 41-42: ri (restart instruction) */
454 {"psr.ed", ((valueT) 1) << 43},
455 {"psr.bn", ((valueT) 1) << 44},
458 /* indirect register-sets/memory: */
467 { "CPUID", IND_CPUID },
468 { "cpuid", IND_CPUID },
480 /* Pseudo functions used to indicate relocation types (these functions
481 start with an at sign (@). */
503 /* reloc pseudo functions (these must come first!): */
504 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
505 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
507 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
509 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
510 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
511 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
512 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
513 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
514 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
515 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
516 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
517 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
518 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
519 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
520 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
522 /* mbtype4 constants: */
523 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
524 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
525 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
526 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
527 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
529 /* fclass constants: */
530 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
531 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
532 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
533 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
534 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
535 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
536 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
537 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
538 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
540 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
542 /* hint constants: */
543 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
545 /* unwind-related constants: */
546 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
547 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
548 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
549 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
550 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
551 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
552 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
554 /* unwind-related registers: */
555 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
558 /* 41-bit nop opcodes (one per unit): */
559 static const bfd_vma nop[IA64_NUM_UNITS] =
561 0x0000000000LL, /* NIL => break 0 */
562 0x0008000000LL, /* I-unit nop */
563 0x0008000000LL, /* M-unit nop */
564 0x4000000000LL, /* B-unit nop */
565 0x0008000000LL, /* F-unit nop */
566 0x0008000000LL, /* L-"unit" nop */
567 0x0008000000LL, /* X-unit nop */
570 /* Can't be `const' as it's passed to input routines (which have the
571 habit of setting temporary sentinels. */
572 static char special_section_name[][20] =
574 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
575 {".IA_64.unwind"}, {".IA_64.unwind_info"},
576 {".init_array"}, {".fini_array"}
579 /* The best template for a particular sequence of up to three
581 #define N IA64_NUM_TYPES
582 static unsigned char best_template[N][N][N];
585 /* Resource dependencies currently in effect */
587 int depind; /* dependency index */
588 const struct ia64_dependency *dependency; /* actual dependency */
589 unsigned specific:1, /* is this a specific bit/regno? */
590 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
591 int index; /* specific regno/bit within dependency */
592 int note; /* optional qualifying note (0 if none) */
596 int insn_srlz; /* current insn serialization state */
597 int data_srlz; /* current data serialization state */
598 int qp_regno; /* qualifying predicate for this usage */
599 char *file; /* what file marked this dependency */
600 unsigned int line; /* what line marked this dependency */
601 struct mem_offset mem_offset; /* optional memory offset hint */
602 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
603 int path; /* corresponding code entry index */
605 static int regdepslen = 0;
606 static int regdepstotlen = 0;
607 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
608 static const char *dv_sem[] = { "none", "implied", "impliedf",
609 "data", "instr", "specific", "stop", "other" };
610 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
612 /* Current state of PR mutexation */
613 static struct qpmutex {
616 } *qp_mutexes = NULL; /* QP mutex bitmasks */
617 static int qp_mutexeslen = 0;
618 static int qp_mutexestotlen = 0;
619 static valueT qp_safe_across_calls = 0;
621 /* Current state of PR implications */
622 static struct qp_imply {
625 unsigned p2_branched:1;
627 } *qp_implies = NULL;
628 static int qp_implieslen = 0;
629 static int qp_impliestotlen = 0;
631 /* Keep track of static GR values so that indirect register usage can
632 sometimes be tracked. */
637 } gr_values[128] = {{ 1, 0, 0 }};
639 /* Remember the alignment frag. */
640 static fragS *align_frag;
642 /* These are the routines required to output the various types of
645 /* A slot_number is a frag address plus the slot index (0-2). We use the
646 frag address here so that if there is a section switch in the middle of
647 a function, then instructions emitted to a different section are not
648 counted. Since there may be more than one frag for a function, this
649 means we also need to keep track of which frag this address belongs to
650 so we can compute inter-frag distances. This also nicely solves the
651 problem with nops emitted for align directives, which can't easily be
652 counted, but can easily be derived from frag sizes. */
654 typedef struct unw_rec_list {
656 unsigned long slot_number;
658 unsigned long next_slot_number;
659 fragS *next_slot_frag;
660 struct unw_rec_list *next;
663 #define SLOT_NUM_NOT_SET (unsigned)-1
665 /* Linked list of saved prologue counts. A very poor
666 implementation of a map from label numbers to prologue counts. */
667 typedef struct label_prologue_count
669 struct label_prologue_count *next;
670 unsigned long label_number;
671 unsigned int prologue_count;
672 } label_prologue_count;
676 /* Maintain a list of unwind entries for the current function. */
680 /* Any unwind entires that should be attached to the current slot
681 that an insn is being constructed for. */
682 unw_rec_list *current_entry;
684 /* These are used to create the unwind table entry for this function. */
687 symbolS *info; /* pointer to unwind info */
688 symbolS *personality_routine;
690 subsegT saved_text_subseg;
691 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
693 /* TRUE if processing unwind directives in a prologue region. */
696 unsigned int prologue_count; /* number of .prologues seen so far */
697 /* Prologue counts at previous .label_state directives. */
698 struct label_prologue_count * saved_prologue_counts;
701 /* The input value is a negated offset from psp, and specifies an address
702 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
703 must add 16 and divide by 4 to get the encoded value. */
705 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
707 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
709 /* Forward declarations: */
710 static void set_section PARAMS ((char *name));
711 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
712 unsigned int, unsigned int));
713 static void dot_align (int);
714 static void dot_radix PARAMS ((int));
715 static void dot_special_section PARAMS ((int));
716 static void dot_proc PARAMS ((int));
717 static void dot_fframe PARAMS ((int));
718 static void dot_vframe PARAMS ((int));
719 static void dot_vframesp PARAMS ((int));
720 static void dot_vframepsp PARAMS ((int));
721 static void dot_save PARAMS ((int));
722 static void dot_restore PARAMS ((int));
723 static void dot_restorereg PARAMS ((int));
724 static void dot_restorereg_p PARAMS ((int));
725 static void dot_handlerdata PARAMS ((int));
726 static void dot_unwentry PARAMS ((int));
727 static void dot_altrp PARAMS ((int));
728 static void dot_savemem PARAMS ((int));
729 static void dot_saveg PARAMS ((int));
730 static void dot_savef PARAMS ((int));
731 static void dot_saveb PARAMS ((int));
732 static void dot_savegf PARAMS ((int));
733 static void dot_spill PARAMS ((int));
734 static void dot_spillreg PARAMS ((int));
735 static void dot_spillmem PARAMS ((int));
736 static void dot_spillreg_p PARAMS ((int));
737 static void dot_spillmem_p PARAMS ((int));
738 static void dot_label_state PARAMS ((int));
739 static void dot_copy_state PARAMS ((int));
740 static void dot_unwabi PARAMS ((int));
741 static void dot_personality PARAMS ((int));
742 static void dot_body PARAMS ((int));
743 static void dot_prologue PARAMS ((int));
744 static void dot_endp PARAMS ((int));
745 static void dot_template PARAMS ((int));
746 static void dot_regstk PARAMS ((int));
747 static void dot_rot PARAMS ((int));
748 static void dot_byteorder PARAMS ((int));
749 static void dot_psr PARAMS ((int));
750 static void dot_alias PARAMS ((int));
751 static void dot_ln PARAMS ((int));
752 static char *parse_section_name PARAMS ((void));
753 static void dot_xdata PARAMS ((int));
754 static void stmt_float_cons PARAMS ((int));
755 static void stmt_cons_ua PARAMS ((int));
756 static void dot_xfloat_cons PARAMS ((int));
757 static void dot_xstringer PARAMS ((int));
758 static void dot_xdata_ua PARAMS ((int));
759 static void dot_xfloat_cons_ua PARAMS ((int));
760 static void print_prmask PARAMS ((valueT mask));
761 static void dot_pred_rel PARAMS ((int));
762 static void dot_reg_val PARAMS ((int));
763 static void dot_serialize PARAMS ((int));
764 static void dot_dv_mode PARAMS ((int));
765 static void dot_entry PARAMS ((int));
766 static void dot_mem_offset PARAMS ((int));
767 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
768 static symbolS *declare_register PARAMS ((const char *name, int regnum));
769 static void declare_register_set PARAMS ((const char *, int, int));
770 static unsigned int operand_width PARAMS ((enum ia64_opnd));
771 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
774 static int parse_operand PARAMS ((expressionS *e));
775 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
776 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
777 static void build_insn PARAMS ((struct slot *, bfd_vma *));
778 static void emit_one_bundle PARAMS ((void));
779 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
780 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
781 bfd_reloc_code_real_type r_type));
782 static void insn_group_break PARAMS ((int, int, int));
783 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
784 struct rsrc *, int depind, int path));
785 static void add_qp_mutex PARAMS((valueT mask));
786 static void add_qp_imply PARAMS((int p1, int p2));
787 static void clear_qp_branch_flag PARAMS((valueT mask));
788 static void clear_qp_mutex PARAMS((valueT mask));
789 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
790 static int has_suffix_p PARAMS((const char *, const char *));
791 static void clear_register_values PARAMS ((void));
792 static void print_dependency PARAMS ((const char *action, int depind));
793 static void instruction_serialization PARAMS ((void));
794 static void data_serialization PARAMS ((void));
795 static void remove_marked_resource PARAMS ((struct rsrc *));
796 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
797 static int is_taken_branch PARAMS ((struct ia64_opcode *));
798 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
799 static int depends_on PARAMS ((int, struct ia64_opcode *));
800 static int specify_resource PARAMS ((const struct ia64_dependency *,
801 struct ia64_opcode *, int, struct rsrc [], int, int));
802 static int check_dv PARAMS((struct ia64_opcode *idesc));
803 static void check_dependencies PARAMS((struct ia64_opcode *));
804 static void mark_resources PARAMS((struct ia64_opcode *));
805 static void update_dependencies PARAMS((struct ia64_opcode *));
806 static void note_register_values PARAMS((struct ia64_opcode *));
807 static int qp_mutex PARAMS ((int, int, int));
808 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
809 static void output_vbyte_mem PARAMS ((int, char *, char *));
810 static void count_output PARAMS ((int, char *, char *));
811 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
812 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
813 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
814 static void output_P1_format PARAMS ((vbyte_func, int));
815 static void output_P2_format PARAMS ((vbyte_func, int, int));
816 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
817 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
818 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
819 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
820 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
821 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
822 static void output_P9_format PARAMS ((vbyte_func, int, int));
823 static void output_P10_format PARAMS ((vbyte_func, int, int));
824 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
825 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
826 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
827 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
828 static char format_ab_reg PARAMS ((int, int));
829 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
831 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
832 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
834 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
835 static unw_rec_list *output_endp PARAMS ((void));
836 static unw_rec_list *output_prologue PARAMS ((void));
837 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
838 static unw_rec_list *output_body PARAMS ((void));
839 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
840 static unw_rec_list *output_mem_stack_v PARAMS ((void));
841 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
842 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
843 static unw_rec_list *output_rp_when PARAMS ((void));
844 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
845 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
846 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
847 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
848 static unw_rec_list *output_pfs_when PARAMS ((void));
849 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
850 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
851 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
852 static unw_rec_list *output_preds_when PARAMS ((void));
853 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
857 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
858 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
859 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
860 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
861 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
862 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
863 static unw_rec_list *output_unat_when PARAMS ((void));
864 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
865 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
866 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
867 static unw_rec_list *output_lc_when PARAMS ((void));
868 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
869 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
870 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
871 static unw_rec_list *output_fpsr_when PARAMS ((void));
872 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
873 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
874 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
875 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
876 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
877 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
878 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
879 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
880 static unw_rec_list *output_bsp_when PARAMS ((void));
881 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
882 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
883 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
884 static unw_rec_list *output_bspstore_when PARAMS ((void));
885 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
886 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
887 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
888 static unw_rec_list *output_rnat_when PARAMS ((void));
889 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
890 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
891 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
892 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
893 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
894 static unw_rec_list *output_label_state PARAMS ((unsigned long));
895 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
896 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
897 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
898 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
900 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
902 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
904 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
905 unsigned int, unsigned int));
906 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
907 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
908 static int calc_record_size PARAMS ((unw_rec_list *));
909 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
910 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
911 unsigned long, fragS *,
913 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
914 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
915 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
916 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
917 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
918 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
919 static void free_saved_prologue_counts PARAMS ((void));
921 /* Determine if application register REGNUM resides only in the integer
922 unit (as opposed to the memory unit). */
924 ar_is_only_in_integer_unit (int reg)
927 return reg >= 64 && reg <= 111;
930 /* Determine if application register REGNUM resides only in the memory
931 unit (as opposed to the integer unit). */
933 ar_is_only_in_memory_unit (int reg)
936 return reg >= 0 && reg <= 47;
939 /* Switch to section NAME and create section if necessary. It's
940 rather ugly that we have to manipulate input_line_pointer but I
941 don't see any other way to accomplish the same thing without
942 changing obj-elf.c (which may be the Right Thing, in the end). */
947 char *saved_input_line_pointer;
949 saved_input_line_pointer = input_line_pointer;
950 input_line_pointer = name;
952 input_line_pointer = saved_input_line_pointer;
955 /* Map 's' to SHF_IA_64_SHORT. */
958 ia64_elf_section_letter (letter, ptr_msg)
963 return SHF_IA_64_SHORT;
964 else if (letter == 'o')
965 return SHF_LINK_ORDER;
967 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
971 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
974 ia64_elf_section_flags (flags, attr, type)
976 int attr, type ATTRIBUTE_UNUSED;
978 if (attr & SHF_IA_64_SHORT)
979 flags |= SEC_SMALL_DATA;
984 ia64_elf_section_type (str, len)
988 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
990 if (STREQ (ELF_STRING_ia64_unwind_info))
993 if (STREQ (ELF_STRING_ia64_unwind_info_once))
996 if (STREQ (ELF_STRING_ia64_unwind))
997 return SHT_IA_64_UNWIND;
999 if (STREQ (ELF_STRING_ia64_unwind_once))
1000 return SHT_IA_64_UNWIND;
1002 if (STREQ ("unwind"))
1003 return SHT_IA_64_UNWIND;
1010 set_regstack (ins, locs, outs, rots)
1011 unsigned int ins, locs, outs, rots;
1013 /* Size of frame. */
1016 sof = ins + locs + outs;
1019 as_bad ("Size of frame exceeds maximum of 96 registers");
1024 as_warn ("Size of rotating registers exceeds frame size");
1027 md.in.base = REG_GR + 32;
1028 md.loc.base = md.in.base + ins;
1029 md.out.base = md.loc.base + locs;
1031 md.in.num_regs = ins;
1032 md.loc.num_regs = locs;
1033 md.out.num_regs = outs;
1034 md.rot.num_regs = rots;
1041 struct label_fix *lfix;
1043 subsegT saved_subseg;
1046 if (!md.last_text_seg)
1049 saved_seg = now_seg;
1050 saved_subseg = now_subseg;
1052 subseg_set (md.last_text_seg, 0);
1054 while (md.num_slots_in_use > 0)
1055 emit_one_bundle (); /* force out queued instructions */
1057 /* In case there are labels following the last instruction, resolve
1059 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1061 S_SET_VALUE (lfix->sym, frag_now_fix ());
1062 symbol_set_frag (lfix->sym, frag_now);
1064 CURR_SLOT.label_fixups = 0;
1065 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1067 S_SET_VALUE (lfix->sym, frag_now_fix ());
1068 symbol_set_frag (lfix->sym, frag_now);
1070 CURR_SLOT.tag_fixups = 0;
1072 /* In case there are unwind directives following the last instruction,
1073 resolve those now. We only handle prologue, body, and endp directives
1074 here. Give an error for others. */
1075 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1077 switch (ptr->r.type)
1083 ptr->slot_number = (unsigned long) frag_more (0);
1084 ptr->slot_frag = frag_now;
1087 /* Allow any record which doesn't have a "t" field (i.e.,
1088 doesn't relate to a particular instruction). */
1104 as_bad (_("Unwind directive not followed by an instruction."));
1108 unwind.current_entry = NULL;
1110 subseg_set (saved_seg, saved_subseg);
1112 if (md.qp.X_op == O_register)
1113 as_bad ("qualifying predicate not followed by instruction");
1117 ia64_do_align (int nbytes)
1119 char *saved_input_line_pointer = input_line_pointer;
1121 input_line_pointer = "";
1122 s_align_bytes (nbytes);
1123 input_line_pointer = saved_input_line_pointer;
1127 ia64_cons_align (nbytes)
1132 char *saved_input_line_pointer = input_line_pointer;
1133 input_line_pointer = "";
1134 s_align_bytes (nbytes);
1135 input_line_pointer = saved_input_line_pointer;
1139 /* Output COUNT bytes to a memory location. */
1140 static unsigned char *vbyte_mem_ptr = NULL;
1143 output_vbyte_mem (count, ptr, comment)
1146 char *comment ATTRIBUTE_UNUSED;
1149 if (vbyte_mem_ptr == NULL)
1154 for (x = 0; x < count; x++)
1155 *(vbyte_mem_ptr++) = ptr[x];
1158 /* Count the number of bytes required for records. */
1159 static int vbyte_count = 0;
1161 count_output (count, ptr, comment)
1163 char *ptr ATTRIBUTE_UNUSED;
1164 char *comment ATTRIBUTE_UNUSED;
1166 vbyte_count += count;
1170 output_R1_format (f, rtype, rlen)
1172 unw_record_type rtype;
1179 output_R3_format (f, rtype, rlen);
1185 else if (rtype != prologue)
1186 as_bad ("record type is not valid");
1188 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1189 (*f) (1, &byte, NULL);
1193 output_R2_format (f, mask, grsave, rlen)
1200 mask = (mask & 0x0f);
1201 grsave = (grsave & 0x7f);
1203 bytes[0] = (UNW_R2 | (mask >> 1));
1204 bytes[1] = (((mask & 0x01) << 7) | grsave);
1205 count += output_leb128 (bytes + 2, rlen, 0);
1206 (*f) (count, bytes, NULL);
1210 output_R3_format (f, rtype, rlen)
1212 unw_record_type rtype;
1219 output_R1_format (f, rtype, rlen);
1225 else if (rtype != prologue)
1226 as_bad ("record type is not valid");
1227 bytes[0] = (UNW_R3 | r);
1228 count = output_leb128 (bytes + 1, rlen, 0);
1229 (*f) (count + 1, bytes, NULL);
1233 output_P1_format (f, brmask)
1238 byte = UNW_P1 | (brmask & 0x1f);
1239 (*f) (1, &byte, NULL);
1243 output_P2_format (f, brmask, gr)
1249 brmask = (brmask & 0x1f);
1250 bytes[0] = UNW_P2 | (brmask >> 1);
1251 bytes[1] = (((brmask & 1) << 7) | gr);
1252 (*f) (2, bytes, NULL);
1256 output_P3_format (f, rtype, reg)
1258 unw_record_type rtype;
1303 as_bad ("Invalid record type for P3 format.");
1305 bytes[0] = (UNW_P3 | (r >> 1));
1306 bytes[1] = (((r & 1) << 7) | reg);
1307 (*f) (2, bytes, NULL);
1311 output_P4_format (f, imask, imask_size)
1313 unsigned char *imask;
1314 unsigned long imask_size;
1317 (*f) (imask_size, imask, NULL);
1321 output_P5_format (f, grmask, frmask)
1324 unsigned long frmask;
1327 grmask = (grmask & 0x0f);
1330 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1331 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1332 bytes[3] = (frmask & 0x000000ff);
1333 (*f) (4, bytes, NULL);
1337 output_P6_format (f, rtype, rmask)
1339 unw_record_type rtype;
1345 if (rtype == gr_mem)
1347 else if (rtype != fr_mem)
1348 as_bad ("Invalid record type for format P6");
1349 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1350 (*f) (1, &byte, NULL);
1354 output_P7_format (f, rtype, w1, w2)
1356 unw_record_type rtype;
1363 count += output_leb128 (bytes + 1, w1, 0);
1368 count += output_leb128 (bytes + count, w2 >> 4, 0);
1418 bytes[0] = (UNW_P7 | r);
1419 (*f) (count, bytes, NULL);
1423 output_P8_format (f, rtype, t)
1425 unw_record_type rtype;
1464 case bspstore_psprel:
1467 case bspstore_sprel:
1479 case priunat_when_gr:
1482 case priunat_psprel:
1488 case priunat_when_mem:
1495 count += output_leb128 (bytes + 2, t, 0);
1496 (*f) (count, bytes, NULL);
1500 output_P9_format (f, grmask, gr)
1507 bytes[1] = (grmask & 0x0f);
1508 bytes[2] = (gr & 0x7f);
1509 (*f) (3, bytes, NULL);
1513 output_P10_format (f, abi, context)
1520 bytes[1] = (abi & 0xff);
1521 bytes[2] = (context & 0xff);
1522 (*f) (3, bytes, NULL);
1526 output_B1_format (f, rtype, label)
1528 unw_record_type rtype;
1529 unsigned long label;
1535 output_B4_format (f, rtype, label);
1538 if (rtype == copy_state)
1540 else if (rtype != label_state)
1541 as_bad ("Invalid record type for format B1");
1543 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1544 (*f) (1, &byte, NULL);
1548 output_B2_format (f, ecount, t)
1550 unsigned long ecount;
1557 output_B3_format (f, ecount, t);
1560 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1561 count += output_leb128 (bytes + 1, t, 0);
1562 (*f) (count, bytes, NULL);
1566 output_B3_format (f, ecount, t)
1568 unsigned long ecount;
1575 output_B2_format (f, ecount, t);
1579 count += output_leb128 (bytes + 1, t, 0);
1580 count += output_leb128 (bytes + count, ecount, 0);
1581 (*f) (count, bytes, NULL);
1585 output_B4_format (f, rtype, label)
1587 unw_record_type rtype;
1588 unsigned long label;
1595 output_B1_format (f, rtype, label);
1599 if (rtype == copy_state)
1601 else if (rtype != label_state)
1602 as_bad ("Invalid record type for format B1");
1604 bytes[0] = (UNW_B4 | (r << 3));
1605 count += output_leb128 (bytes + 1, label, 0);
1606 (*f) (count, bytes, NULL);
1610 format_ab_reg (ab, reg)
1617 ret = (ab << 5) | reg;
1622 output_X1_format (f, rtype, ab, reg, t, w1)
1624 unw_record_type rtype;
1634 if (rtype == spill_sprel)
1636 else if (rtype != spill_psprel)
1637 as_bad ("Invalid record type for format X1");
1638 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1639 count += output_leb128 (bytes + 2, t, 0);
1640 count += output_leb128 (bytes + count, w1, 0);
1641 (*f) (count, bytes, NULL);
1645 output_X2_format (f, ab, reg, x, y, treg, t)
1654 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1655 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1656 count += output_leb128 (bytes + 3, t, 0);
1657 (*f) (count, bytes, NULL);
1661 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1663 unw_record_type rtype;
1674 if (rtype == spill_sprel_p)
1676 else if (rtype != spill_psprel_p)
1677 as_bad ("Invalid record type for format X3");
1678 bytes[1] = ((r << 7) | (qp & 0x3f));
1679 bytes[2] = format_ab_reg (ab, reg);
1680 count += output_leb128 (bytes + 3, t, 0);
1681 count += output_leb128 (bytes + count, w1, 0);
1682 (*f) (count, bytes, NULL);
1686 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1696 bytes[1] = (qp & 0x3f);
1697 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1698 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1699 count += output_leb128 (bytes + 4, t, 0);
1700 (*f) (count, bytes, NULL);
1703 /* This function allocates a record list structure, and initializes fields. */
1705 static unw_rec_list *
1706 alloc_record (unw_record_type t)
1709 ptr = xmalloc (sizeof (*ptr));
1711 ptr->slot_number = SLOT_NUM_NOT_SET;
1713 ptr->next_slot_number = 0;
1714 ptr->next_slot_frag = 0;
1718 /* Dummy unwind record used for calculating the length of the last prologue or
1721 static unw_rec_list *
1724 unw_rec_list *ptr = alloc_record (endp);
1728 static unw_rec_list *
1731 unw_rec_list *ptr = alloc_record (prologue);
1732 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1736 static unw_rec_list *
1737 output_prologue_gr (saved_mask, reg)
1738 unsigned int saved_mask;
1741 unw_rec_list *ptr = alloc_record (prologue_gr);
1742 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1743 ptr->r.record.r.grmask = saved_mask;
1744 ptr->r.record.r.grsave = reg;
1748 static unw_rec_list *
1751 unw_rec_list *ptr = alloc_record (body);
1755 static unw_rec_list *
1756 output_mem_stack_f (size)
1759 unw_rec_list *ptr = alloc_record (mem_stack_f);
1760 ptr->r.record.p.size = size;
1764 static unw_rec_list *
1765 output_mem_stack_v ()
1767 unw_rec_list *ptr = alloc_record (mem_stack_v);
1771 static unw_rec_list *
1775 unw_rec_list *ptr = alloc_record (psp_gr);
1776 ptr->r.record.p.gr = gr;
1780 static unw_rec_list *
1781 output_psp_sprel (offset)
1782 unsigned int offset;
1784 unw_rec_list *ptr = alloc_record (psp_sprel);
1785 ptr->r.record.p.spoff = offset / 4;
1789 static unw_rec_list *
1792 unw_rec_list *ptr = alloc_record (rp_when);
1796 static unw_rec_list *
1800 unw_rec_list *ptr = alloc_record (rp_gr);
1801 ptr->r.record.p.gr = gr;
1805 static unw_rec_list *
1809 unw_rec_list *ptr = alloc_record (rp_br);
1810 ptr->r.record.p.br = br;
1814 static unw_rec_list *
1815 output_rp_psprel (offset)
1816 unsigned int offset;
1818 unw_rec_list *ptr = alloc_record (rp_psprel);
1819 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1823 static unw_rec_list *
1824 output_rp_sprel (offset)
1825 unsigned int offset;
1827 unw_rec_list *ptr = alloc_record (rp_sprel);
1828 ptr->r.record.p.spoff = offset / 4;
1832 static unw_rec_list *
1835 unw_rec_list *ptr = alloc_record (pfs_when);
1839 static unw_rec_list *
1843 unw_rec_list *ptr = alloc_record (pfs_gr);
1844 ptr->r.record.p.gr = gr;
1848 static unw_rec_list *
1849 output_pfs_psprel (offset)
1850 unsigned int offset;
1852 unw_rec_list *ptr = alloc_record (pfs_psprel);
1853 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1857 static unw_rec_list *
1858 output_pfs_sprel (offset)
1859 unsigned int offset;
1861 unw_rec_list *ptr = alloc_record (pfs_sprel);
1862 ptr->r.record.p.spoff = offset / 4;
1866 static unw_rec_list *
1867 output_preds_when ()
1869 unw_rec_list *ptr = alloc_record (preds_when);
1873 static unw_rec_list *
1874 output_preds_gr (gr)
1877 unw_rec_list *ptr = alloc_record (preds_gr);
1878 ptr->r.record.p.gr = gr;
1882 static unw_rec_list *
1883 output_preds_psprel (offset)
1884 unsigned int offset;
1886 unw_rec_list *ptr = alloc_record (preds_psprel);
1887 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1891 static unw_rec_list *
1892 output_preds_sprel (offset)
1893 unsigned int offset;
1895 unw_rec_list *ptr = alloc_record (preds_sprel);
1896 ptr->r.record.p.spoff = offset / 4;
1900 static unw_rec_list *
1901 output_fr_mem (mask)
1904 unw_rec_list *ptr = alloc_record (fr_mem);
1905 ptr->r.record.p.rmask = mask;
1909 static unw_rec_list *
1910 output_frgr_mem (gr_mask, fr_mask)
1911 unsigned int gr_mask;
1912 unsigned int fr_mask;
1914 unw_rec_list *ptr = alloc_record (frgr_mem);
1915 ptr->r.record.p.grmask = gr_mask;
1916 ptr->r.record.p.frmask = fr_mask;
1920 static unw_rec_list *
1921 output_gr_gr (mask, reg)
1925 unw_rec_list *ptr = alloc_record (gr_gr);
1926 ptr->r.record.p.grmask = mask;
1927 ptr->r.record.p.gr = reg;
1931 static unw_rec_list *
1932 output_gr_mem (mask)
1935 unw_rec_list *ptr = alloc_record (gr_mem);
1936 ptr->r.record.p.rmask = mask;
1940 static unw_rec_list *
1941 output_br_mem (unsigned int mask)
1943 unw_rec_list *ptr = alloc_record (br_mem);
1944 ptr->r.record.p.brmask = mask;
1948 static unw_rec_list *
1949 output_br_gr (save_mask, reg)
1950 unsigned int save_mask;
1953 unw_rec_list *ptr = alloc_record (br_gr);
1954 ptr->r.record.p.brmask = save_mask;
1955 ptr->r.record.p.gr = reg;
1959 static unw_rec_list *
1960 output_spill_base (offset)
1961 unsigned int offset;
1963 unw_rec_list *ptr = alloc_record (spill_base);
1964 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1968 static unw_rec_list *
1971 unw_rec_list *ptr = alloc_record (unat_when);
1975 static unw_rec_list *
1979 unw_rec_list *ptr = alloc_record (unat_gr);
1980 ptr->r.record.p.gr = gr;
1984 static unw_rec_list *
1985 output_unat_psprel (offset)
1986 unsigned int offset;
1988 unw_rec_list *ptr = alloc_record (unat_psprel);
1989 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1993 static unw_rec_list *
1994 output_unat_sprel (offset)
1995 unsigned int offset;
1997 unw_rec_list *ptr = alloc_record (unat_sprel);
1998 ptr->r.record.p.spoff = offset / 4;
2002 static unw_rec_list *
2005 unw_rec_list *ptr = alloc_record (lc_when);
2009 static unw_rec_list *
2013 unw_rec_list *ptr = alloc_record (lc_gr);
2014 ptr->r.record.p.gr = gr;
2018 static unw_rec_list *
2019 output_lc_psprel (offset)
2020 unsigned int offset;
2022 unw_rec_list *ptr = alloc_record (lc_psprel);
2023 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2027 static unw_rec_list *
2028 output_lc_sprel (offset)
2029 unsigned int offset;
2031 unw_rec_list *ptr = alloc_record (lc_sprel);
2032 ptr->r.record.p.spoff = offset / 4;
2036 static unw_rec_list *
2039 unw_rec_list *ptr = alloc_record (fpsr_when);
2043 static unw_rec_list *
2047 unw_rec_list *ptr = alloc_record (fpsr_gr);
2048 ptr->r.record.p.gr = gr;
2052 static unw_rec_list *
2053 output_fpsr_psprel (offset)
2054 unsigned int offset;
2056 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2057 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2061 static unw_rec_list *
2062 output_fpsr_sprel (offset)
2063 unsigned int offset;
2065 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2066 ptr->r.record.p.spoff = offset / 4;
2070 static unw_rec_list *
2071 output_priunat_when_gr ()
2073 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2077 static unw_rec_list *
2078 output_priunat_when_mem ()
2080 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2084 static unw_rec_list *
2085 output_priunat_gr (gr)
2088 unw_rec_list *ptr = alloc_record (priunat_gr);
2089 ptr->r.record.p.gr = gr;
2093 static unw_rec_list *
2094 output_priunat_psprel (offset)
2095 unsigned int offset;
2097 unw_rec_list *ptr = alloc_record (priunat_psprel);
2098 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2102 static unw_rec_list *
2103 output_priunat_sprel (offset)
2104 unsigned int offset;
2106 unw_rec_list *ptr = alloc_record (priunat_sprel);
2107 ptr->r.record.p.spoff = offset / 4;
2111 static unw_rec_list *
2114 unw_rec_list *ptr = alloc_record (bsp_when);
2118 static unw_rec_list *
2122 unw_rec_list *ptr = alloc_record (bsp_gr);
2123 ptr->r.record.p.gr = gr;
2127 static unw_rec_list *
2128 output_bsp_psprel (offset)
2129 unsigned int offset;
2131 unw_rec_list *ptr = alloc_record (bsp_psprel);
2132 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2136 static unw_rec_list *
2137 output_bsp_sprel (offset)
2138 unsigned int offset;
2140 unw_rec_list *ptr = alloc_record (bsp_sprel);
2141 ptr->r.record.p.spoff = offset / 4;
2145 static unw_rec_list *
2146 output_bspstore_when ()
2148 unw_rec_list *ptr = alloc_record (bspstore_when);
2152 static unw_rec_list *
2153 output_bspstore_gr (gr)
2156 unw_rec_list *ptr = alloc_record (bspstore_gr);
2157 ptr->r.record.p.gr = gr;
2161 static unw_rec_list *
2162 output_bspstore_psprel (offset)
2163 unsigned int offset;
2165 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2166 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2170 static unw_rec_list *
2171 output_bspstore_sprel (offset)
2172 unsigned int offset;
2174 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2175 ptr->r.record.p.spoff = offset / 4;
2179 static unw_rec_list *
2182 unw_rec_list *ptr = alloc_record (rnat_when);
2186 static unw_rec_list *
2190 unw_rec_list *ptr = alloc_record (rnat_gr);
2191 ptr->r.record.p.gr = gr;
2195 static unw_rec_list *
2196 output_rnat_psprel (offset)
2197 unsigned int offset;
2199 unw_rec_list *ptr = alloc_record (rnat_psprel);
2200 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2204 static unw_rec_list *
2205 output_rnat_sprel (offset)
2206 unsigned int offset;
2208 unw_rec_list *ptr = alloc_record (rnat_sprel);
2209 ptr->r.record.p.spoff = offset / 4;
2213 static unw_rec_list *
2214 output_unwabi (abi, context)
2216 unsigned long context;
2218 unw_rec_list *ptr = alloc_record (unwabi);
2219 ptr->r.record.p.abi = abi;
2220 ptr->r.record.p.context = context;
2224 static unw_rec_list *
2225 output_epilogue (unsigned long ecount)
2227 unw_rec_list *ptr = alloc_record (epilogue);
2228 ptr->r.record.b.ecount = ecount;
2232 static unw_rec_list *
2233 output_label_state (unsigned long label)
2235 unw_rec_list *ptr = alloc_record (label_state);
2236 ptr->r.record.b.label = label;
2240 static unw_rec_list *
2241 output_copy_state (unsigned long label)
2243 unw_rec_list *ptr = alloc_record (copy_state);
2244 ptr->r.record.b.label = label;
2248 static unw_rec_list *
2249 output_spill_psprel (ab, reg, offset)
2252 unsigned int offset;
2254 unw_rec_list *ptr = alloc_record (spill_psprel);
2255 ptr->r.record.x.ab = ab;
2256 ptr->r.record.x.reg = reg;
2257 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2261 static unw_rec_list *
2262 output_spill_sprel (ab, reg, offset)
2265 unsigned int offset;
2267 unw_rec_list *ptr = alloc_record (spill_sprel);
2268 ptr->r.record.x.ab = ab;
2269 ptr->r.record.x.reg = reg;
2270 ptr->r.record.x.spoff = offset / 4;
2274 static unw_rec_list *
2275 output_spill_psprel_p (ab, reg, offset, predicate)
2278 unsigned int offset;
2279 unsigned int predicate;
2281 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2282 ptr->r.record.x.ab = ab;
2283 ptr->r.record.x.reg = reg;
2284 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2285 ptr->r.record.x.qp = predicate;
2289 static unw_rec_list *
2290 output_spill_sprel_p (ab, reg, offset, predicate)
2293 unsigned int offset;
2294 unsigned int predicate;
2296 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2297 ptr->r.record.x.ab = ab;
2298 ptr->r.record.x.reg = reg;
2299 ptr->r.record.x.spoff = offset / 4;
2300 ptr->r.record.x.qp = predicate;
2304 static unw_rec_list *
2305 output_spill_reg (ab, reg, targ_reg, xy)
2308 unsigned int targ_reg;
2311 unw_rec_list *ptr = alloc_record (spill_reg);
2312 ptr->r.record.x.ab = ab;
2313 ptr->r.record.x.reg = reg;
2314 ptr->r.record.x.treg = targ_reg;
2315 ptr->r.record.x.xy = xy;
2319 static unw_rec_list *
2320 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2323 unsigned int targ_reg;
2325 unsigned int predicate;
2327 unw_rec_list *ptr = alloc_record (spill_reg_p);
2328 ptr->r.record.x.ab = ab;
2329 ptr->r.record.x.reg = reg;
2330 ptr->r.record.x.treg = targ_reg;
2331 ptr->r.record.x.xy = xy;
2332 ptr->r.record.x.qp = predicate;
2336 /* Given a unw_rec_list process the correct format with the
2337 specified function. */
2340 process_one_record (ptr, f)
2344 unsigned long fr_mask, gr_mask;
2346 switch (ptr->r.type)
2348 /* This is a dummy record that takes up no space in the output. */
2356 /* These are taken care of by prologue/prologue_gr. */
2361 if (ptr->r.type == prologue_gr)
2362 output_R2_format (f, ptr->r.record.r.grmask,
2363 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2365 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2367 /* Output descriptor(s) for union of register spills (if any). */
2368 gr_mask = ptr->r.record.r.mask.gr_mem;
2369 fr_mask = ptr->r.record.r.mask.fr_mem;
2372 if ((fr_mask & ~0xfUL) == 0)
2373 output_P6_format (f, fr_mem, fr_mask);
2376 output_P5_format (f, gr_mask, fr_mask);
2381 output_P6_format (f, gr_mem, gr_mask);
2382 if (ptr->r.record.r.mask.br_mem)
2383 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2385 /* output imask descriptor if necessary: */
2386 if (ptr->r.record.r.mask.i)
2387 output_P4_format (f, ptr->r.record.r.mask.i,
2388 ptr->r.record.r.imask_size);
2392 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2396 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2397 ptr->r.record.p.size);
2410 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2413 output_P3_format (f, rp_br, ptr->r.record.p.br);
2416 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2424 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2433 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2443 case bspstore_sprel:
2445 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2448 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2451 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2454 as_bad ("spill_mask record unimplemented.");
2456 case priunat_when_gr:
2457 case priunat_when_mem:
2461 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2463 case priunat_psprel:
2465 case bspstore_psprel:
2467 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2470 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2473 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2477 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2480 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2481 ptr->r.record.x.reg, ptr->r.record.x.t,
2482 ptr->r.record.x.pspoff);
2485 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2486 ptr->r.record.x.reg, ptr->r.record.x.t,
2487 ptr->r.record.x.spoff);
2490 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2491 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2492 ptr->r.record.x.treg, ptr->r.record.x.t);
2494 case spill_psprel_p:
2495 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2496 ptr->r.record.x.ab, ptr->r.record.x.reg,
2497 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2500 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2501 ptr->r.record.x.ab, ptr->r.record.x.reg,
2502 ptr->r.record.x.t, ptr->r.record.x.spoff);
2505 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2506 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2507 ptr->r.record.x.xy, ptr->r.record.x.treg,
2511 as_bad ("record_type_not_valid");
2516 /* Given a unw_rec_list list, process all the records with
2517 the specified function. */
2519 process_unw_records (list, f)
2524 for (ptr = list; ptr; ptr = ptr->next)
2525 process_one_record (ptr, f);
2528 /* Determine the size of a record list in bytes. */
2530 calc_record_size (list)
2534 process_unw_records (list, count_output);
2538 /* Update IMASK bitmask to reflect the fact that one or more registers
2539 of type TYPE are saved starting at instruction with index T. If N
2540 bits are set in REGMASK, it is assumed that instructions T through
2541 T+N-1 save these registers.
2545 1: instruction saves next fp reg
2546 2: instruction saves next general reg
2547 3: instruction saves next branch reg */
2549 set_imask (region, regmask, t, type)
2550 unw_rec_list *region;
2551 unsigned long regmask;
2555 unsigned char *imask;
2556 unsigned long imask_size;
2560 imask = region->r.record.r.mask.i;
2561 imask_size = region->r.record.r.imask_size;
2564 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2565 imask = xmalloc (imask_size);
2566 memset (imask, 0, imask_size);
2568 region->r.record.r.imask_size = imask_size;
2569 region->r.record.r.mask.i = imask;
2573 pos = 2 * (3 - t % 4);
2576 if (i >= imask_size)
2578 as_bad ("Ignoring attempt to spill beyond end of region");
2582 imask[i] |= (type & 0x3) << pos;
2584 regmask &= (regmask - 1);
2594 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2595 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2596 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2600 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2601 unsigned long slot_addr;
2603 unsigned long first_addr;
2607 unsigned long index = 0;
2609 /* First time we are called, the initial address and frag are invalid. */
2610 if (first_addr == 0)
2613 /* If the two addresses are in different frags, then we need to add in
2614 the remaining size of this frag, and then the entire size of intermediate
2616 while (slot_frag != first_frag)
2618 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2622 /* We can get the final addresses only during and after
2624 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2625 index += 3 * ((first_frag->fr_next->fr_address
2626 - first_frag->fr_address
2627 - first_frag->fr_fix) >> 4);
2630 /* We don't know what the final addresses will be. We try our
2631 best to estimate. */
2632 switch (first_frag->fr_type)
2638 as_fatal ("only constant space allocation is supported");
2644 /* Take alignment into account. Assume the worst case
2645 before relaxation. */
2646 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2650 if (first_frag->fr_symbol)
2652 as_fatal ("only constant offsets are supported");
2656 index += 3 * (first_frag->fr_offset >> 4);
2660 /* Add in the full size of the frag converted to instruction slots. */
2661 index += 3 * (first_frag->fr_fix >> 4);
2662 /* Subtract away the initial part before first_addr. */
2663 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2664 + ((first_addr & 0x3) - (start_addr & 0x3)));
2666 /* Move to the beginning of the next frag. */
2667 first_frag = first_frag->fr_next;
2668 first_addr = (unsigned long) &first_frag->fr_literal;
2671 /* Add in the used part of the last frag. */
2672 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2673 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2677 /* Optimize unwind record directives. */
2679 static unw_rec_list *
2680 optimize_unw_records (list)
2686 /* If the only unwind record is ".prologue" or ".prologue" followed
2687 by ".body", then we can optimize the unwind directives away. */
2688 if (list->r.type == prologue
2689 && (list->next->r.type == endp
2690 || (list->next->r.type == body && list->next->next->r.type == endp)))
2696 /* Given a complete record list, process any records which have
2697 unresolved fields, (ie length counts for a prologue). After
2698 this has been run, all necessary information should be available
2699 within each record to generate an image. */
2702 fixup_unw_records (list, before_relax)
2706 unw_rec_list *ptr, *region = 0;
2707 unsigned long first_addr = 0, rlen = 0, t;
2708 fragS *first_frag = 0;
2710 for (ptr = list; ptr; ptr = ptr->next)
2712 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2713 as_bad (" Insn slot not set in unwind record.");
2714 t = slot_index (ptr->slot_number, ptr->slot_frag,
2715 first_addr, first_frag, before_relax);
2716 switch (ptr->r.type)
2724 unsigned long last_addr = 0;
2725 fragS *last_frag = NULL;
2727 first_addr = ptr->slot_number;
2728 first_frag = ptr->slot_frag;
2729 /* Find either the next body/prologue start, or the end of
2730 the function, and determine the size of the region. */
2731 for (last = ptr->next; last != NULL; last = last->next)
2732 if (last->r.type == prologue || last->r.type == prologue_gr
2733 || last->r.type == body || last->r.type == endp)
2735 last_addr = last->slot_number;
2736 last_frag = last->slot_frag;
2739 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2741 rlen = ptr->r.record.r.rlen = size;
2742 if (ptr->r.type == body)
2743 /* End of region. */
2750 ptr->r.record.b.t = rlen - 1 - t;
2761 case priunat_when_gr:
2762 case priunat_when_mem:
2766 ptr->r.record.p.t = t;
2774 case spill_psprel_p:
2775 ptr->r.record.x.t = t;
2781 as_bad ("frgr_mem record before region record!\n");
2784 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2785 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2786 set_imask (region, ptr->r.record.p.frmask, t, 1);
2787 set_imask (region, ptr->r.record.p.grmask, t, 2);
2792 as_bad ("fr_mem record before region record!\n");
2795 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2796 set_imask (region, ptr->r.record.p.rmask, t, 1);
2801 as_bad ("gr_mem record before region record!\n");
2804 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2805 set_imask (region, ptr->r.record.p.rmask, t, 2);
2810 as_bad ("br_mem record before region record!\n");
2813 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2814 set_imask (region, ptr->r.record.p.brmask, t, 3);
2820 as_bad ("gr_gr record before region record!\n");
2823 set_imask (region, ptr->r.record.p.grmask, t, 2);
2828 as_bad ("br_gr record before region record!\n");
2831 set_imask (region, ptr->r.record.p.brmask, t, 3);
2840 /* Estimate the size of a frag before relaxing. We only have one type of frag
2841 to handle here, which is the unwind info frag. */
2844 ia64_estimate_size_before_relax (fragS *frag,
2845 asection *segtype ATTRIBUTE_UNUSED)
2850 /* ??? This code is identical to the first part of ia64_convert_frag. */
2851 list = (unw_rec_list *) frag->fr_opcode;
2852 fixup_unw_records (list, 0);
2854 len = calc_record_size (list);
2855 /* pad to pointer-size boundary. */
2856 pad = len % md.pointer_size;
2858 len += md.pointer_size - pad;
2859 /* Add 8 for the header + a pointer for the personality offset. */
2860 size = len + 8 + md.pointer_size;
2862 /* fr_var carries the max_chars that we created the fragment with.
2863 We must, of course, have allocated enough memory earlier. */
2864 assert (frag->fr_var >= size);
2866 return frag->fr_fix + size;
2869 /* This function converts a rs_machine_dependent variant frag into a
2870 normal fill frag with the unwind image from the the record list. */
2872 ia64_convert_frag (fragS *frag)
2878 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2879 list = (unw_rec_list *) frag->fr_opcode;
2880 fixup_unw_records (list, 0);
2882 len = calc_record_size (list);
2883 /* pad to pointer-size boundary. */
2884 pad = len % md.pointer_size;
2886 len += md.pointer_size - pad;
2887 /* Add 8 for the header + a pointer for the personality offset. */
2888 size = len + 8 + md.pointer_size;
2890 /* fr_var carries the max_chars that we created the fragment with.
2891 We must, of course, have allocated enough memory earlier. */
2892 assert (frag->fr_var >= size);
2894 /* Initialize the header area. fr_offset is initialized with
2895 unwind.personality_routine. */
2896 if (frag->fr_offset)
2898 if (md.flags & EF_IA_64_ABI64)
2899 flag_value = (bfd_vma) 3 << 32;
2901 /* 32-bit unwind info block. */
2902 flag_value = (bfd_vma) 0x1003 << 32;
2907 md_number_to_chars (frag->fr_literal,
2908 (((bfd_vma) 1 << 48) /* Version. */
2909 | flag_value /* U & E handler flags. */
2910 | (len / md.pointer_size)), /* Length. */
2913 /* Skip the header. */
2914 vbyte_mem_ptr = frag->fr_literal + 8;
2915 process_unw_records (list, output_vbyte_mem);
2917 /* Fill the padding bytes with zeros. */
2919 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2920 md.pointer_size - pad);
2922 frag->fr_fix += size;
2923 frag->fr_type = rs_fill;
2925 frag->fr_offset = 0;
2929 convert_expr_to_ab_reg (e, ab, regp)
2936 if (e->X_op != O_register)
2939 reg = e->X_add_number;
2940 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2943 *regp = reg - REG_GR;
2945 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2946 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2949 *regp = reg - REG_FR;
2951 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2954 *regp = reg - REG_BR;
2961 case REG_PR: *regp = 0; break;
2962 case REG_PSP: *regp = 1; break;
2963 case REG_PRIUNAT: *regp = 2; break;
2964 case REG_BR + 0: *regp = 3; break;
2965 case REG_AR + AR_BSP: *regp = 4; break;
2966 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2967 case REG_AR + AR_RNAT: *regp = 6; break;
2968 case REG_AR + AR_UNAT: *regp = 7; break;
2969 case REG_AR + AR_FPSR: *regp = 8; break;
2970 case REG_AR + AR_PFS: *regp = 9; break;
2971 case REG_AR + AR_LC: *regp = 10; break;
2981 convert_expr_to_xy_reg (e, xy, regp)
2988 if (e->X_op != O_register)
2991 reg = e->X_add_number;
2993 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2996 *regp = reg - REG_GR;
2998 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3001 *regp = reg - REG_FR;
3003 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3006 *regp = reg - REG_BR;
3016 /* The current frag is an alignment frag. */
3017 align_frag = frag_now;
3018 s_align_bytes (arg);
3023 int dummy ATTRIBUTE_UNUSED;
3028 radix = *input_line_pointer++;
3030 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3032 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3033 ignore_rest_of_line ();
3038 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3040 dot_special_section (which)
3043 set_section ((char *) special_section_name[which]);
3047 add_unwind_entry (ptr)
3051 unwind.tail->next = ptr;
3056 /* The current entry can in fact be a chain of unwind entries. */
3057 if (unwind.current_entry == NULL)
3058 unwind.current_entry = ptr;
3063 int dummy ATTRIBUTE_UNUSED;
3069 if (e.X_op != O_constant)
3070 as_bad ("Operand to .fframe must be a constant");
3072 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3077 int dummy ATTRIBUTE_UNUSED;
3083 reg = e.X_add_number - REG_GR;
3084 if (e.X_op == O_register && reg < 128)
3086 add_unwind_entry (output_mem_stack_v ());
3087 if (! (unwind.prologue_mask & 2))
3088 add_unwind_entry (output_psp_gr (reg));
3091 as_bad ("First operand to .vframe must be a general register");
3095 dot_vframesp (dummy)
3096 int dummy ATTRIBUTE_UNUSED;
3101 if (e.X_op == O_constant)
3103 add_unwind_entry (output_mem_stack_v ());
3104 add_unwind_entry (output_psp_sprel (e.X_add_number));
3107 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3111 dot_vframepsp (dummy)
3112 int dummy ATTRIBUTE_UNUSED;
3117 if (e.X_op == O_constant)
3119 add_unwind_entry (output_mem_stack_v ());
3120 add_unwind_entry (output_psp_sprel (e.X_add_number));
3123 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3128 int dummy ATTRIBUTE_UNUSED;
3134 sep = parse_operand (&e1);
3136 as_bad ("No second operand to .save");
3137 sep = parse_operand (&e2);
3139 reg1 = e1.X_add_number;
3140 reg2 = e2.X_add_number - REG_GR;
3142 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3143 if (e1.X_op == O_register)
3145 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3149 case REG_AR + AR_BSP:
3150 add_unwind_entry (output_bsp_when ());
3151 add_unwind_entry (output_bsp_gr (reg2));
3153 case REG_AR + AR_BSPSTORE:
3154 add_unwind_entry (output_bspstore_when ());
3155 add_unwind_entry (output_bspstore_gr (reg2));
3157 case REG_AR + AR_RNAT:
3158 add_unwind_entry (output_rnat_when ());
3159 add_unwind_entry (output_rnat_gr (reg2));
3161 case REG_AR + AR_UNAT:
3162 add_unwind_entry (output_unat_when ());
3163 add_unwind_entry (output_unat_gr (reg2));
3165 case REG_AR + AR_FPSR:
3166 add_unwind_entry (output_fpsr_when ());
3167 add_unwind_entry (output_fpsr_gr (reg2));
3169 case REG_AR + AR_PFS:
3170 add_unwind_entry (output_pfs_when ());
3171 if (! (unwind.prologue_mask & 4))
3172 add_unwind_entry (output_pfs_gr (reg2));
3174 case REG_AR + AR_LC:
3175 add_unwind_entry (output_lc_when ());
3176 add_unwind_entry (output_lc_gr (reg2));
3179 add_unwind_entry (output_rp_when ());
3180 if (! (unwind.prologue_mask & 8))
3181 add_unwind_entry (output_rp_gr (reg2));
3184 add_unwind_entry (output_preds_when ());
3185 if (! (unwind.prologue_mask & 1))
3186 add_unwind_entry (output_preds_gr (reg2));
3189 add_unwind_entry (output_priunat_when_gr ());
3190 add_unwind_entry (output_priunat_gr (reg2));
3193 as_bad ("First operand not a valid register");
3197 as_bad (" Second operand not a valid register");
3200 as_bad ("First operand not a register");
3205 int dummy ATTRIBUTE_UNUSED;
3208 unsigned long ecount; /* # of _additional_ regions to pop */
3211 sep = parse_operand (&e1);
3212 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3214 as_bad ("First operand to .restore must be stack pointer (sp)");
3220 parse_operand (&e2);
3221 if (e2.X_op != O_constant || e2.X_add_number < 0)
3223 as_bad ("Second operand to .restore must be a constant >= 0");
3226 ecount = e2.X_add_number;
3229 ecount = unwind.prologue_count - 1;
3231 if (ecount >= unwind.prologue_count)
3233 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3234 ecount + 1, unwind.prologue_count);
3238 add_unwind_entry (output_epilogue (ecount));
3240 if (ecount < unwind.prologue_count)
3241 unwind.prologue_count -= ecount + 1;
3243 unwind.prologue_count = 0;
3247 dot_restorereg (dummy)
3248 int dummy ATTRIBUTE_UNUSED;
3250 unsigned int ab, reg;
3255 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3257 as_bad ("First operand to .restorereg must be a preserved register");
3260 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3264 dot_restorereg_p (dummy)
3265 int dummy ATTRIBUTE_UNUSED;
3267 unsigned int qp, ab, reg;
3271 sep = parse_operand (&e1);
3274 as_bad ("No second operand to .restorereg.p");
3278 parse_operand (&e2);
3280 qp = e1.X_add_number - REG_P;
3281 if (e1.X_op != O_register || qp > 63)
3283 as_bad ("First operand to .restorereg.p must be a predicate");
3287 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3289 as_bad ("Second operand to .restorereg.p must be a preserved register");
3292 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3295 static char *special_linkonce_name[] =
3297 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3301 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3304 Use a slightly ugly scheme to derive the unwind section names from
3305 the text section name:
3307 text sect. unwind table sect.
3308 name: name: comments:
3309 ---------- ----------------- --------------------------------
3311 .text.foo .IA_64.unwind.text.foo
3312 .foo .IA_64.unwind.foo
3314 .gnu.linkonce.ia64unw.foo
3315 _info .IA_64.unwind_info gas issues error message (ditto)
3316 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3318 This mapping is done so that:
3320 (a) An object file with unwind info only in .text will use
3321 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3322 This follows the letter of the ABI and also ensures backwards
3323 compatibility with older toolchains.
3325 (b) An object file with unwind info in multiple text sections
3326 will use separate unwind sections for each text section.
3327 This allows us to properly set the "sh_info" and "sh_link"
3328 fields in SHT_IA_64_UNWIND as required by the ABI and also
3329 lets GNU ld support programs with multiple segments
3330 containing unwind info (as might be the case for certain
3331 embedded applications).
3333 (c) An error is issued if there would be a name clash.
3336 const char *text_name, *sec_text_name;
3338 const char *prefix = special_section_name [sec_index];
3340 size_t prefix_len, suffix_len, sec_name_len;
3342 sec_text_name = segment_name (text_seg);
3343 text_name = sec_text_name;
3344 if (strncmp (text_name, "_info", 5) == 0)
3346 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3348 ignore_rest_of_line ();
3351 if (strcmp (text_name, ".text") == 0)
3354 /* Build the unwind section name by appending the (possibly stripped)
3355 text section name to the unwind prefix. */
3357 if (strncmp (text_name, ".gnu.linkonce.t.",
3358 sizeof (".gnu.linkonce.t.") - 1) == 0)
3360 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3361 suffix += sizeof (".gnu.linkonce.t.") - 1;
3363 else if (linkonce_empty)
3366 prefix_len = strlen (prefix);
3367 suffix_len = strlen (suffix);
3368 sec_name_len = prefix_len + suffix_len;
3369 sec_name = alloca (sec_name_len + 1);
3370 memcpy (sec_name, prefix, prefix_len);
3371 memcpy (sec_name + prefix_len, suffix, suffix_len);
3372 sec_name [sec_name_len] = '\0';
3374 /* Handle COMDAT group. */
3375 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3378 size_t len, group_name_len;
3379 const char *group_name = elf_group_name (text_seg);
3381 if (group_name == NULL)
3383 as_bad ("Group section `%s' has no group signature",
3385 ignore_rest_of_line ();
3388 /* We have to construct a fake section directive. */
3389 group_name_len = strlen (group_name);
3391 + 16 /* ,"aG",@progbits, */
3392 + group_name_len /* ,group_name */
3395 section = alloca (len + 1);
3396 memcpy (section, sec_name, sec_name_len);
3397 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3398 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3399 memcpy (section + len - 7, ",comdat", 7);
3400 section [len] = '\0';
3401 set_section (section);
3405 set_section (sec_name);
3406 bfd_set_section_flags (stdoutput, now_seg,
3407 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3410 elf_linked_to_section (now_seg) = text_seg;
3414 generate_unwind_image (const segT text_seg)
3419 /* Mark the end of the unwind info, so that we can compute the size of the
3420 last unwind region. */
3421 add_unwind_entry (output_endp ());
3423 /* Force out pending instructions, to make sure all unwind records have
3424 a valid slot_number field. */
3425 ia64_flush_insns ();
3427 /* Generate the unwind record. */
3428 list = optimize_unw_records (unwind.list);
3429 fixup_unw_records (list, 1);
3430 size = calc_record_size (list);
3432 if (size > 0 || unwind.force_unwind_entry)
3434 unwind.force_unwind_entry = 0;
3435 /* pad to pointer-size boundary. */
3436 pad = size % md.pointer_size;
3438 size += md.pointer_size - pad;
3439 /* Add 8 for the header + a pointer for the personality
3441 size += 8 + md.pointer_size;
3444 /* If there are unwind records, switch sections, and output the info. */
3448 bfd_reloc_code_real_type reloc;
3450 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3452 /* Make sure the section has 4 byte alignment for ILP32 and
3453 8 byte alignment for LP64. */
3454 frag_align (md.pointer_size_shift, 0, 0);
3455 record_alignment (now_seg, md.pointer_size_shift);
3457 /* Set expression which points to start of unwind descriptor area. */
3458 unwind.info = expr_build_dot ();
3460 frag_var (rs_machine_dependent, size, size, 0, 0,
3461 (offsetT) (long) unwind.personality_routine,
3464 /* Add the personality address to the image. */
3465 if (unwind.personality_routine != 0)
3467 exp.X_op = O_symbol;
3468 exp.X_add_symbol = unwind.personality_routine;
3469 exp.X_add_number = 0;
3471 if (md.flags & EF_IA_64_BE)
3473 if (md.flags & EF_IA_64_ABI64)
3474 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3476 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3480 if (md.flags & EF_IA_64_ABI64)
3481 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3483 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3486 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3487 md.pointer_size, &exp, 0, reloc);
3488 unwind.personality_routine = 0;
3492 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3494 free_saved_prologue_counts ();
3495 unwind.list = unwind.tail = unwind.current_entry = NULL;
3499 dot_handlerdata (dummy)
3500 int dummy ATTRIBUTE_UNUSED;
3502 unwind.force_unwind_entry = 1;
3504 /* Remember which segment we're in so we can switch back after .endp */
3505 unwind.saved_text_seg = now_seg;
3506 unwind.saved_text_subseg = now_subseg;
3508 /* Generate unwind info into unwind-info section and then leave that
3509 section as the currently active one so dataXX directives go into
3510 the language specific data area of the unwind info block. */
3511 generate_unwind_image (now_seg);
3512 demand_empty_rest_of_line ();
3516 dot_unwentry (dummy)
3517 int dummy ATTRIBUTE_UNUSED;
3519 unwind.force_unwind_entry = 1;
3520 demand_empty_rest_of_line ();
3525 int dummy ATTRIBUTE_UNUSED;
3531 reg = e.X_add_number - REG_BR;
3532 if (e.X_op == O_register && reg < 8)
3533 add_unwind_entry (output_rp_br (reg));
3535 as_bad ("First operand not a valid branch register");
3539 dot_savemem (psprel)
3546 sep = parse_operand (&e1);
3548 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3549 sep = parse_operand (&e2);
3551 reg1 = e1.X_add_number;
3552 val = e2.X_add_number;
3554 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3555 if (e1.X_op == O_register)
3557 if (e2.X_op == O_constant)
3561 case REG_AR + AR_BSP:
3562 add_unwind_entry (output_bsp_when ());
3563 add_unwind_entry ((psprel
3565 : output_bsp_sprel) (val));
3567 case REG_AR + AR_BSPSTORE:
3568 add_unwind_entry (output_bspstore_when ());
3569 add_unwind_entry ((psprel
3570 ? output_bspstore_psprel
3571 : output_bspstore_sprel) (val));
3573 case REG_AR + AR_RNAT:
3574 add_unwind_entry (output_rnat_when ());
3575 add_unwind_entry ((psprel
3576 ? output_rnat_psprel
3577 : output_rnat_sprel) (val));
3579 case REG_AR + AR_UNAT:
3580 add_unwind_entry (output_unat_when ());
3581 add_unwind_entry ((psprel
3582 ? output_unat_psprel
3583 : output_unat_sprel) (val));
3585 case REG_AR + AR_FPSR:
3586 add_unwind_entry (output_fpsr_when ());
3587 add_unwind_entry ((psprel
3588 ? output_fpsr_psprel
3589 : output_fpsr_sprel) (val));
3591 case REG_AR + AR_PFS:
3592 add_unwind_entry (output_pfs_when ());
3593 add_unwind_entry ((psprel
3595 : output_pfs_sprel) (val));
3597 case REG_AR + AR_LC:
3598 add_unwind_entry (output_lc_when ());
3599 add_unwind_entry ((psprel
3601 : output_lc_sprel) (val));
3604 add_unwind_entry (output_rp_when ());
3605 add_unwind_entry ((psprel
3607 : output_rp_sprel) (val));
3610 add_unwind_entry (output_preds_when ());
3611 add_unwind_entry ((psprel
3612 ? output_preds_psprel
3613 : output_preds_sprel) (val));
3616 add_unwind_entry (output_priunat_when_mem ());
3617 add_unwind_entry ((psprel
3618 ? output_priunat_psprel
3619 : output_priunat_sprel) (val));
3622 as_bad ("First operand not a valid register");
3626 as_bad (" Second operand not a valid constant");
3629 as_bad ("First operand not a register");
3634 int dummy ATTRIBUTE_UNUSED;
3638 sep = parse_operand (&e1);
3640 parse_operand (&e2);
3642 if (e1.X_op != O_constant)
3643 as_bad ("First operand to .save.g must be a constant.");
3646 int grmask = e1.X_add_number;
3648 add_unwind_entry (output_gr_mem (grmask));
3651 int reg = e2.X_add_number - REG_GR;
3652 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3653 add_unwind_entry (output_gr_gr (grmask, reg));
3655 as_bad ("Second operand is an invalid register.");
3662 int dummy ATTRIBUTE_UNUSED;
3666 sep = parse_operand (&e1);
3668 if (e1.X_op != O_constant)
3669 as_bad ("Operand to .save.f must be a constant.");
3671 add_unwind_entry (output_fr_mem (e1.X_add_number));
3676 int dummy ATTRIBUTE_UNUSED;
3683 sep = parse_operand (&e1);
3684 if (e1.X_op != O_constant)
3686 as_bad ("First operand to .save.b must be a constant.");
3689 brmask = e1.X_add_number;
3693 sep = parse_operand (&e2);
3694 reg = e2.X_add_number - REG_GR;
3695 if (e2.X_op != O_register || reg > 127)
3697 as_bad ("Second operand to .save.b must be a general register.");
3700 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3703 add_unwind_entry (output_br_mem (brmask));
3705 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3706 demand_empty_rest_of_line ();
3711 int dummy ATTRIBUTE_UNUSED;
3715 sep = parse_operand (&e1);
3717 parse_operand (&e2);
3719 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3720 as_bad ("Both operands of .save.gf must be constants.");
3723 int grmask = e1.X_add_number;
3724 int frmask = e2.X_add_number;
3725 add_unwind_entry (output_frgr_mem (grmask, frmask));
3731 int dummy ATTRIBUTE_UNUSED;
3736 sep = parse_operand (&e);
3737 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3738 demand_empty_rest_of_line ();
3740 if (e.X_op != O_constant)
3741 as_bad ("Operand to .spill must be a constant");
3743 add_unwind_entry (output_spill_base (e.X_add_number));
3747 dot_spillreg (dummy)
3748 int dummy ATTRIBUTE_UNUSED;
3750 int sep, ab, xy, reg, treg;
3753 sep = parse_operand (&e1);
3756 as_bad ("No second operand to .spillreg");
3760 parse_operand (&e2);
3762 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3764 as_bad ("First operand to .spillreg must be a preserved register");
3768 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3770 as_bad ("Second operand to .spillreg must be a register");
3774 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3778 dot_spillmem (psprel)
3784 sep = parse_operand (&e1);
3787 as_bad ("Second operand missing");
3791 parse_operand (&e2);
3793 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3795 as_bad ("First operand to .spill%s must be a preserved register",
3796 psprel ? "psp" : "sp");
3800 if (e2.X_op != O_constant)
3802 as_bad ("Second operand to .spill%s must be a constant",
3803 psprel ? "psp" : "sp");
3808 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3810 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3814 dot_spillreg_p (dummy)
3815 int dummy ATTRIBUTE_UNUSED;
3817 int sep, ab, xy, reg, treg;
3818 expressionS e1, e2, e3;
3821 sep = parse_operand (&e1);
3824 as_bad ("No second and third operand to .spillreg.p");
3828 sep = parse_operand (&e2);
3831 as_bad ("No third operand to .spillreg.p");
3835 parse_operand (&e3);
3837 qp = e1.X_add_number - REG_P;
3839 if (e1.X_op != O_register || qp > 63)
3841 as_bad ("First operand to .spillreg.p must be a predicate");
3845 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3847 as_bad ("Second operand to .spillreg.p must be a preserved register");
3851 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3853 as_bad ("Third operand to .spillreg.p must be a register");
3857 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3861 dot_spillmem_p (psprel)
3864 expressionS e1, e2, e3;
3868 sep = parse_operand (&e1);
3871 as_bad ("Second operand missing");
3875 parse_operand (&e2);
3878 as_bad ("Second operand missing");
3882 parse_operand (&e3);
3884 qp = e1.X_add_number - REG_P;
3885 if (e1.X_op != O_register || qp > 63)
3887 as_bad ("First operand to .spill%s_p must be a predicate",
3888 psprel ? "psp" : "sp");
3892 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3894 as_bad ("Second operand to .spill%s_p must be a preserved register",
3895 psprel ? "psp" : "sp");
3899 if (e3.X_op != O_constant)
3901 as_bad ("Third operand to .spill%s_p must be a constant",
3902 psprel ? "psp" : "sp");
3907 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3909 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3913 get_saved_prologue_count (lbl)
3916 label_prologue_count *lpc = unwind.saved_prologue_counts;
3918 while (lpc != NULL && lpc->label_number != lbl)
3922 return lpc->prologue_count;
3924 as_bad ("Missing .label_state %ld", lbl);
3929 save_prologue_count (lbl, count)
3933 label_prologue_count *lpc = unwind.saved_prologue_counts;
3935 while (lpc != NULL && lpc->label_number != lbl)
3939 lpc->prologue_count = count;
3942 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3944 new_lpc->next = unwind.saved_prologue_counts;
3945 new_lpc->label_number = lbl;
3946 new_lpc->prologue_count = count;
3947 unwind.saved_prologue_counts = new_lpc;
3952 free_saved_prologue_counts ()
3954 label_prologue_count *lpc = unwind.saved_prologue_counts;
3955 label_prologue_count *next;
3964 unwind.saved_prologue_counts = NULL;
3968 dot_label_state (dummy)
3969 int dummy ATTRIBUTE_UNUSED;
3974 if (e.X_op != O_constant)
3976 as_bad ("Operand to .label_state must be a constant");
3979 add_unwind_entry (output_label_state (e.X_add_number));
3980 save_prologue_count (e.X_add_number, unwind.prologue_count);
3984 dot_copy_state (dummy)
3985 int dummy ATTRIBUTE_UNUSED;
3990 if (e.X_op != O_constant)
3992 as_bad ("Operand to .copy_state must be a constant");
3995 add_unwind_entry (output_copy_state (e.X_add_number));
3996 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4001 int dummy ATTRIBUTE_UNUSED;
4006 sep = parse_operand (&e1);
4009 as_bad ("Second operand to .unwabi missing");
4012 sep = parse_operand (&e2);
4013 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4014 demand_empty_rest_of_line ();
4016 if (e1.X_op != O_constant)
4018 as_bad ("First operand to .unwabi must be a constant");
4022 if (e2.X_op != O_constant)
4024 as_bad ("Second operand to .unwabi must be a constant");
4028 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4032 dot_personality (dummy)
4033 int dummy ATTRIBUTE_UNUSED;
4037 name = input_line_pointer;
4038 c = get_symbol_end ();
4039 p = input_line_pointer;
4040 unwind.personality_routine = symbol_find_or_make (name);
4041 unwind.force_unwind_entry = 1;
4044 demand_empty_rest_of_line ();
4049 int dummy ATTRIBUTE_UNUSED;
4054 unwind.proc_start = expr_build_dot ();
4055 /* Parse names of main and alternate entry points and mark them as
4056 function symbols: */
4060 name = input_line_pointer;
4061 c = get_symbol_end ();
4062 p = input_line_pointer;
4063 sym = symbol_find_or_make (name);
4064 if (unwind.proc_start == 0)
4066 unwind.proc_start = sym;
4068 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4071 if (*input_line_pointer != ',')
4073 ++input_line_pointer;
4075 demand_empty_rest_of_line ();
4078 unwind.prologue_count = 0;
4079 unwind.list = unwind.tail = unwind.current_entry = NULL;
4080 unwind.personality_routine = 0;
4085 int dummy ATTRIBUTE_UNUSED;
4087 unwind.prologue = 0;
4088 unwind.prologue_mask = 0;
4090 add_unwind_entry (output_body ());
4091 demand_empty_rest_of_line ();
4095 dot_prologue (dummy)
4096 int dummy ATTRIBUTE_UNUSED;
4099 int mask = 0, grsave = 0;
4101 if (!is_it_end_of_statement ())
4104 sep = parse_operand (&e1);
4106 as_bad ("No second operand to .prologue");
4107 sep = parse_operand (&e2);
4108 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4109 demand_empty_rest_of_line ();
4111 if (e1.X_op == O_constant)
4113 mask = e1.X_add_number;
4115 if (e2.X_op == O_constant)
4116 grsave = e2.X_add_number;
4117 else if (e2.X_op == O_register
4118 && (grsave = e2.X_add_number - REG_GR) < 128)
4121 as_bad ("Second operand not a constant or general register");
4123 add_unwind_entry (output_prologue_gr (mask, grsave));
4126 as_bad ("First operand not a constant");
4129 add_unwind_entry (output_prologue ());
4131 unwind.prologue = 1;
4132 unwind.prologue_mask = mask;
4133 ++unwind.prologue_count;
4138 int dummy ATTRIBUTE_UNUSED;
4142 int bytes_per_address;
4145 subsegT saved_subseg;
4149 if (unwind.saved_text_seg)
4151 saved_seg = unwind.saved_text_seg;
4152 saved_subseg = unwind.saved_text_subseg;
4153 unwind.saved_text_seg = NULL;
4157 saved_seg = now_seg;
4158 saved_subseg = now_subseg;
4161 insn_group_break (1, 0, 0);
4163 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4165 generate_unwind_image (saved_seg);
4167 if (unwind.info || unwind.force_unwind_entry)
4169 subseg_set (md.last_text_seg, 0);
4170 unwind.proc_end = expr_build_dot ();
4172 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4174 /* Make sure that section has 4 byte alignment for ILP32 and
4175 8 byte alignment for LP64. */
4176 record_alignment (now_seg, md.pointer_size_shift);
4178 /* Need space for 3 pointers for procedure start, procedure end,
4180 ptr = frag_more (3 * md.pointer_size);
4181 where = frag_now_fix () - (3 * md.pointer_size);
4182 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4184 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4185 e.X_op = O_pseudo_fixup;
4186 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4188 e.X_add_symbol = unwind.proc_start;
4189 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4191 e.X_op = O_pseudo_fixup;
4192 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4194 e.X_add_symbol = unwind.proc_end;
4195 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4196 bytes_per_address, &e);
4200 e.X_op = O_pseudo_fixup;
4201 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4203 e.X_add_symbol = unwind.info;
4204 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4205 bytes_per_address, &e);
4208 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4213 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4215 subseg_set (saved_seg, saved_subseg);
4217 /* Parse names of main and alternate entry points and set symbol sizes. */
4221 name = input_line_pointer;
4222 c = get_symbol_end ();
4223 p = input_line_pointer;
4224 sym = symbol_find (name);
4225 if (sym && unwind.proc_start
4226 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4227 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4229 fragS *fr = symbol_get_frag (unwind.proc_start);
4230 fragS *frag = symbol_get_frag (sym);
4232 /* Check whether the function label is at or beyond last
4234 while (fr && fr != frag)
4238 if (frag == frag_now && SEG_NORMAL (now_seg))
4239 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4242 symbol_get_obj (sym)->size =
4243 (expressionS *) xmalloc (sizeof (expressionS));
4244 symbol_get_obj (sym)->size->X_op = O_subtract;
4245 symbol_get_obj (sym)->size->X_add_symbol
4246 = symbol_new (FAKE_LABEL_NAME, now_seg,
4247 frag_now_fix (), frag_now);
4248 symbol_get_obj (sym)->size->X_op_symbol = sym;
4249 symbol_get_obj (sym)->size->X_add_number = 0;
4255 if (*input_line_pointer != ',')
4257 ++input_line_pointer;
4259 demand_empty_rest_of_line ();
4260 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4264 dot_template (template)
4267 CURR_SLOT.user_template = template;
4272 int dummy ATTRIBUTE_UNUSED;
4274 int ins, locs, outs, rots;
4276 if (is_it_end_of_statement ())
4277 ins = locs = outs = rots = 0;
4280 ins = get_absolute_expression ();
4281 if (*input_line_pointer++ != ',')
4283 locs = get_absolute_expression ();
4284 if (*input_line_pointer++ != ',')
4286 outs = get_absolute_expression ();
4287 if (*input_line_pointer++ != ',')
4289 rots = get_absolute_expression ();
4291 set_regstack (ins, locs, outs, rots);
4295 as_bad ("Comma expected");
4296 ignore_rest_of_line ();
4303 unsigned num_regs, num_alloced = 0;
4304 struct dynreg **drpp, *dr;
4305 int ch, base_reg = 0;
4311 case DYNREG_GR: base_reg = REG_GR + 32; break;
4312 case DYNREG_FR: base_reg = REG_FR + 32; break;
4313 case DYNREG_PR: base_reg = REG_P + 16; break;
4317 /* First, remove existing names from hash table. */
4318 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4320 hash_delete (md.dynreg_hash, dr->name);
4324 drpp = &md.dynreg[type];
4327 start = input_line_pointer;
4328 ch = get_symbol_end ();
4329 *input_line_pointer = ch;
4330 len = (input_line_pointer - start);
4333 if (*input_line_pointer != '[')
4335 as_bad ("Expected '['");
4338 ++input_line_pointer; /* skip '[' */
4340 num_regs = get_absolute_expression ();
4342 if (*input_line_pointer++ != ']')
4344 as_bad ("Expected ']'");
4349 num_alloced += num_regs;
4353 if (num_alloced > md.rot.num_regs)
4355 as_bad ("Used more than the declared %d rotating registers",
4361 if (num_alloced > 96)
4363 as_bad ("Used more than the available 96 rotating registers");
4368 if (num_alloced > 48)
4370 as_bad ("Used more than the available 48 rotating registers");
4379 name = obstack_alloc (¬es, len + 1);
4380 memcpy (name, start, len);
4385 *drpp = obstack_alloc (¬es, sizeof (*dr));
4386 memset (*drpp, 0, sizeof (*dr));
4391 dr->num_regs = num_regs;
4392 dr->base = base_reg;
4394 base_reg += num_regs;
4396 if (hash_insert (md.dynreg_hash, name, dr))
4398 as_bad ("Attempt to redefine register set `%s'", name);
4402 if (*input_line_pointer != ',')
4404 ++input_line_pointer; /* skip comma */
4407 demand_empty_rest_of_line ();
4411 ignore_rest_of_line ();
4415 dot_byteorder (byteorder)
4418 segment_info_type *seginfo = seg_info (now_seg);
4420 if (byteorder == -1)
4422 if (seginfo->tc_segment_info_data.endian == 0)
4423 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4424 byteorder = seginfo->tc_segment_info_data.endian == 1;
4427 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4429 if (target_big_endian != byteorder)
4431 target_big_endian = byteorder;
4432 if (target_big_endian)
4434 ia64_number_to_chars = number_to_chars_bigendian;
4435 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4439 ia64_number_to_chars = number_to_chars_littleendian;
4440 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4447 int dummy ATTRIBUTE_UNUSED;
4454 option = input_line_pointer;
4455 ch = get_symbol_end ();
4456 if (strcmp (option, "lsb") == 0)
4457 md.flags &= ~EF_IA_64_BE;
4458 else if (strcmp (option, "msb") == 0)
4459 md.flags |= EF_IA_64_BE;
4460 else if (strcmp (option, "abi32") == 0)
4461 md.flags &= ~EF_IA_64_ABI64;
4462 else if (strcmp (option, "abi64") == 0)
4463 md.flags |= EF_IA_64_ABI64;
4465 as_bad ("Unknown psr option `%s'", option);
4466 *input_line_pointer = ch;
4469 if (*input_line_pointer != ',')
4472 ++input_line_pointer;
4475 demand_empty_rest_of_line ();
4480 int dummy ATTRIBUTE_UNUSED;
4482 new_logical_line (0, get_absolute_expression ());
4483 demand_empty_rest_of_line ();
4487 parse_section_name ()
4493 if (*input_line_pointer != '"')
4495 as_bad ("Missing section name");
4496 ignore_rest_of_line ();
4499 name = demand_copy_C_string (&len);
4502 ignore_rest_of_line ();
4506 if (*input_line_pointer != ',')
4508 as_bad ("Comma expected after section name");
4509 ignore_rest_of_line ();
4512 ++input_line_pointer; /* skip comma */
4520 char *name = parse_section_name ();
4524 md.keep_pending_output = 1;
4527 obj_elf_previous (0);
4528 md.keep_pending_output = 0;
4531 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4534 stmt_float_cons (kind)
4555 ia64_do_align (alignment);
4563 int saved_auto_align = md.auto_align;
4567 md.auto_align = saved_auto_align;
4571 dot_xfloat_cons (kind)
4574 char *name = parse_section_name ();
4578 md.keep_pending_output = 1;
4580 stmt_float_cons (kind);
4581 obj_elf_previous (0);
4582 md.keep_pending_output = 0;
4586 dot_xstringer (zero)
4589 char *name = parse_section_name ();
4593 md.keep_pending_output = 1;
4596 obj_elf_previous (0);
4597 md.keep_pending_output = 0;
4604 int saved_auto_align = md.auto_align;
4605 char *name = parse_section_name ();
4609 md.keep_pending_output = 1;
4613 md.auto_align = saved_auto_align;
4614 obj_elf_previous (0);
4615 md.keep_pending_output = 0;
4619 dot_xfloat_cons_ua (kind)
4622 int saved_auto_align = md.auto_align;
4623 char *name = parse_section_name ();
4627 md.keep_pending_output = 1;
4630 stmt_float_cons (kind);
4631 md.auto_align = saved_auto_align;
4632 obj_elf_previous (0);
4633 md.keep_pending_output = 0;
4636 /* .reg.val <regname>,value */
4640 int dummy ATTRIBUTE_UNUSED;
4645 if (reg.X_op != O_register)
4647 as_bad (_("Register name expected"));
4648 ignore_rest_of_line ();
4650 else if (*input_line_pointer++ != ',')
4652 as_bad (_("Comma expected"));
4653 ignore_rest_of_line ();
4657 valueT value = get_absolute_expression ();
4658 int regno = reg.X_add_number;
4659 if (regno < REG_GR || regno > REG_GR + 128)
4660 as_warn (_("Register value annotation ignored"));
4663 gr_values[regno - REG_GR].known = 1;
4664 gr_values[regno - REG_GR].value = value;
4665 gr_values[regno - REG_GR].path = md.path;
4668 demand_empty_rest_of_line ();
4673 .serialize.instruction
4676 dot_serialize (type)
4679 insn_group_break (0, 0, 0);
4681 instruction_serialization ();
4683 data_serialization ();
4684 insn_group_break (0, 0, 0);
4685 demand_empty_rest_of_line ();
4688 /* select dv checking mode
4693 A stop is inserted when changing modes
4700 if (md.manual_bundling)
4701 as_warn (_("Directive invalid within a bundle"));
4703 if (type == 'E' || type == 'A')
4704 md.mode_explicitly_set = 0;
4706 md.mode_explicitly_set = 1;
4713 if (md.explicit_mode)
4714 insn_group_break (1, 0, 0);
4715 md.explicit_mode = 0;
4719 if (!md.explicit_mode)
4720 insn_group_break (1, 0, 0);
4721 md.explicit_mode = 1;
4725 if (md.explicit_mode != md.default_explicit_mode)
4726 insn_group_break (1, 0, 0);
4727 md.explicit_mode = md.default_explicit_mode;
4728 md.mode_explicitly_set = 0;
4739 for (regno = 0; regno < 64; regno++)
4741 if (mask & ((valueT) 1 << regno))
4743 fprintf (stderr, "%s p%d", comma, regno);
4750 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4751 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4752 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4753 .pred.safe_across_calls p1 [, p2 [,...]]
4762 int p1 = -1, p2 = -1;
4766 if (*input_line_pointer != '"')
4768 as_bad (_("Missing predicate relation type"));
4769 ignore_rest_of_line ();
4775 char *form = demand_copy_C_string (&len);
4776 if (strcmp (form, "mutex") == 0)
4778 else if (strcmp (form, "clear") == 0)
4780 else if (strcmp (form, "imply") == 0)
4784 as_bad (_("Unrecognized predicate relation type"));
4785 ignore_rest_of_line ();
4789 if (*input_line_pointer == ',')
4790 ++input_line_pointer;
4800 if (TOUPPER (*input_line_pointer) != 'P'
4801 || (regno = atoi (++input_line_pointer)) < 0
4804 as_bad (_("Predicate register expected"));
4805 ignore_rest_of_line ();
4808 while (ISDIGIT (*input_line_pointer))
4809 ++input_line_pointer;
4816 as_warn (_("Duplicate predicate register ignored"));
4819 /* See if it's a range. */
4820 if (*input_line_pointer == '-')
4823 ++input_line_pointer;
4825 if (TOUPPER (*input_line_pointer) != 'P'
4826 || (regno = atoi (++input_line_pointer)) < 0
4829 as_bad (_("Predicate register expected"));
4830 ignore_rest_of_line ();
4833 while (ISDIGIT (*input_line_pointer))
4834 ++input_line_pointer;
4838 as_bad (_("Bad register range"));
4839 ignore_rest_of_line ();
4850 if (*input_line_pointer != ',')
4852 ++input_line_pointer;
4861 clear_qp_mutex (mask);
4862 clear_qp_implies (mask, (valueT) 0);
4865 if (count != 2 || p1 == -1 || p2 == -1)
4866 as_bad (_("Predicate source and target required"));
4867 else if (p1 == 0 || p2 == 0)
4868 as_bad (_("Use of p0 is not valid in this context"));
4870 add_qp_imply (p1, p2);
4875 as_bad (_("At least two PR arguments expected"));
4880 as_bad (_("Use of p0 is not valid in this context"));
4883 add_qp_mutex (mask);
4886 /* note that we don't override any existing relations */
4889 as_bad (_("At least one PR argument expected"));
4894 fprintf (stderr, "Safe across calls: ");
4895 print_prmask (mask);
4896 fprintf (stderr, "\n");
4898 qp_safe_across_calls = mask;
4901 demand_empty_rest_of_line ();
4904 /* .entry label [, label [, ...]]
4905 Hint to DV code that the given labels are to be considered entry points.
4906 Otherwise, only global labels are considered entry points. */
4910 int dummy ATTRIBUTE_UNUSED;
4919 name = input_line_pointer;
4920 c = get_symbol_end ();
4921 symbolP = symbol_find_or_make (name);
4923 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4925 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4928 *input_line_pointer = c;
4930 c = *input_line_pointer;
4933 input_line_pointer++;
4935 if (*input_line_pointer == '\n')
4941 demand_empty_rest_of_line ();
4944 /* .mem.offset offset, base
4945 "base" is used to distinguish between offsets from a different base. */
4948 dot_mem_offset (dummy)
4949 int dummy ATTRIBUTE_UNUSED;
4951 md.mem_offset.hint = 1;
4952 md.mem_offset.offset = get_absolute_expression ();
4953 if (*input_line_pointer != ',')
4955 as_bad (_("Comma expected"));
4956 ignore_rest_of_line ();
4959 ++input_line_pointer;
4960 md.mem_offset.base = get_absolute_expression ();
4961 demand_empty_rest_of_line ();
4964 /* ia64-specific pseudo-ops: */
4965 const pseudo_typeS md_pseudo_table[] =
4967 { "radix", dot_radix, 0 },
4968 { "lcomm", s_lcomm_bytes, 1 },
4969 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4970 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4971 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4972 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4973 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4974 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4975 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4976 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4977 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4978 { "proc", dot_proc, 0 },
4979 { "body", dot_body, 0 },
4980 { "prologue", dot_prologue, 0 },
4981 { "endp", dot_endp, 0 },
4983 { "fframe", dot_fframe, 0 },
4984 { "vframe", dot_vframe, 0 },
4985 { "vframesp", dot_vframesp, 0 },
4986 { "vframepsp", dot_vframepsp, 0 },
4987 { "save", dot_save, 0 },
4988 { "restore", dot_restore, 0 },
4989 { "restorereg", dot_restorereg, 0 },
4990 { "restorereg.p", dot_restorereg_p, 0 },
4991 { "handlerdata", dot_handlerdata, 0 },
4992 { "unwentry", dot_unwentry, 0 },
4993 { "altrp", dot_altrp, 0 },
4994 { "savesp", dot_savemem, 0 },
4995 { "savepsp", dot_savemem, 1 },
4996 { "save.g", dot_saveg, 0 },
4997 { "save.f", dot_savef, 0 },
4998 { "save.b", dot_saveb, 0 },
4999 { "save.gf", dot_savegf, 0 },
5000 { "spill", dot_spill, 0 },
5001 { "spillreg", dot_spillreg, 0 },
5002 { "spillsp", dot_spillmem, 0 },
5003 { "spillpsp", dot_spillmem, 1 },
5004 { "spillreg.p", dot_spillreg_p, 0 },
5005 { "spillsp.p", dot_spillmem_p, 0 },
5006 { "spillpsp.p", dot_spillmem_p, 1 },
5007 { "label_state", dot_label_state, 0 },
5008 { "copy_state", dot_copy_state, 0 },
5009 { "unwabi", dot_unwabi, 0 },
5010 { "personality", dot_personality, 0 },
5012 { "estate", dot_estate, 0 },
5014 { "mii", dot_template, 0x0 },
5015 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5016 { "mlx", dot_template, 0x2 },
5017 { "mmi", dot_template, 0x4 },
5018 { "mfi", dot_template, 0x6 },
5019 { "mmf", dot_template, 0x7 },
5020 { "mib", dot_template, 0x8 },
5021 { "mbb", dot_template, 0x9 },
5022 { "bbb", dot_template, 0xb },
5023 { "mmb", dot_template, 0xc },
5024 { "mfb", dot_template, 0xe },
5026 { "lb", dot_scope, 0 },
5027 { "le", dot_scope, 1 },
5029 { "align", dot_align, 0 },
5030 { "regstk", dot_regstk, 0 },
5031 { "rotr", dot_rot, DYNREG_GR },
5032 { "rotf", dot_rot, DYNREG_FR },
5033 { "rotp", dot_rot, DYNREG_PR },
5034 { "lsb", dot_byteorder, 0 },
5035 { "msb", dot_byteorder, 1 },
5036 { "psr", dot_psr, 0 },
5037 { "alias", dot_alias, 0 },
5038 { "secalias", dot_alias, 1 },
5039 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5041 { "xdata1", dot_xdata, 1 },
5042 { "xdata2", dot_xdata, 2 },
5043 { "xdata4", dot_xdata, 4 },
5044 { "xdata8", dot_xdata, 8 },
5045 { "xreal4", dot_xfloat_cons, 'f' },
5046 { "xreal8", dot_xfloat_cons, 'd' },
5047 { "xreal10", dot_xfloat_cons, 'x' },
5048 { "xreal16", dot_xfloat_cons, 'X' },
5049 { "xstring", dot_xstringer, 0 },
5050 { "xstringz", dot_xstringer, 1 },
5052 /* unaligned versions: */
5053 { "xdata2.ua", dot_xdata_ua, 2 },
5054 { "xdata4.ua", dot_xdata_ua, 4 },
5055 { "xdata8.ua", dot_xdata_ua, 8 },
5056 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5057 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5058 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5059 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5061 /* annotations/DV checking support */
5062 { "entry", dot_entry, 0 },
5063 { "mem.offset", dot_mem_offset, 0 },
5064 { "pred.rel", dot_pred_rel, 0 },
5065 { "pred.rel.clear", dot_pred_rel, 'c' },
5066 { "pred.rel.imply", dot_pred_rel, 'i' },
5067 { "pred.rel.mutex", dot_pred_rel, 'm' },
5068 { "pred.safe_across_calls", dot_pred_rel, 's' },
5069 { "reg.val", dot_reg_val, 0 },
5070 { "serialize.data", dot_serialize, 0 },
5071 { "serialize.instruction", dot_serialize, 1 },
5072 { "auto", dot_dv_mode, 'a' },
5073 { "explicit", dot_dv_mode, 'e' },
5074 { "default", dot_dv_mode, 'd' },
5076 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5077 IA-64 aligns data allocation pseudo-ops by default, so we have to
5078 tell it that these ones are supposed to be unaligned. Long term,
5079 should rewrite so that only IA-64 specific data allocation pseudo-ops
5080 are aligned by default. */
5081 {"2byte", stmt_cons_ua, 2},
5082 {"4byte", stmt_cons_ua, 4},
5083 {"8byte", stmt_cons_ua, 8},
5088 static const struct pseudo_opcode
5091 void (*handler) (int);
5096 /* these are more like pseudo-ops, but don't start with a dot */
5097 { "data1", cons, 1 },
5098 { "data2", cons, 2 },
5099 { "data4", cons, 4 },
5100 { "data8", cons, 8 },
5101 { "data16", cons, 16 },
5102 { "real4", stmt_float_cons, 'f' },
5103 { "real8", stmt_float_cons, 'd' },
5104 { "real10", stmt_float_cons, 'x' },
5105 { "real16", stmt_float_cons, 'X' },
5106 { "string", stringer, 0 },
5107 { "stringz", stringer, 1 },
5109 /* unaligned versions: */
5110 { "data2.ua", stmt_cons_ua, 2 },
5111 { "data4.ua", stmt_cons_ua, 4 },
5112 { "data8.ua", stmt_cons_ua, 8 },
5113 { "data16.ua", stmt_cons_ua, 16 },
5114 { "real4.ua", float_cons, 'f' },
5115 { "real8.ua", float_cons, 'd' },
5116 { "real10.ua", float_cons, 'x' },
5117 { "real16.ua", float_cons, 'X' },
5120 /* Declare a register by creating a symbol for it and entering it in
5121 the symbol table. */
5124 declare_register (name, regnum)
5131 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5133 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5135 as_fatal ("Inserting \"%s\" into register table failed: %s",
5142 declare_register_set (prefix, num_regs, base_regnum)
5150 for (i = 0; i < num_regs; ++i)
5152 sprintf (name, "%s%u", prefix, i);
5153 declare_register (name, base_regnum + i);
5158 operand_width (opnd)
5159 enum ia64_opnd opnd;
5161 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5162 unsigned int bits = 0;
5166 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5167 bits += odesc->field[i].bits;
5172 static enum operand_match_result
5173 operand_match (idesc, index, e)
5174 const struct ia64_opcode *idesc;
5178 enum ia64_opnd opnd = idesc->operands[index];
5179 int bits, relocatable = 0;
5180 struct insn_fix *fix;
5187 case IA64_OPND_AR_CCV:
5188 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5189 return OPERAND_MATCH;
5192 case IA64_OPND_AR_CSD:
5193 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5194 return OPERAND_MATCH;
5197 case IA64_OPND_AR_PFS:
5198 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5199 return OPERAND_MATCH;
5203 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5204 return OPERAND_MATCH;
5208 if (e->X_op == O_register && e->X_add_number == REG_IP)
5209 return OPERAND_MATCH;
5213 if (e->X_op == O_register && e->X_add_number == REG_PR)
5214 return OPERAND_MATCH;
5217 case IA64_OPND_PR_ROT:
5218 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5219 return OPERAND_MATCH;
5223 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5224 return OPERAND_MATCH;
5227 case IA64_OPND_PSR_L:
5228 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5229 return OPERAND_MATCH;
5232 case IA64_OPND_PSR_UM:
5233 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5234 return OPERAND_MATCH;
5238 if (e->X_op == O_constant)
5240 if (e->X_add_number == 1)
5241 return OPERAND_MATCH;
5243 return OPERAND_OUT_OF_RANGE;
5248 if (e->X_op == O_constant)
5250 if (e->X_add_number == 8)
5251 return OPERAND_MATCH;
5253 return OPERAND_OUT_OF_RANGE;
5258 if (e->X_op == O_constant)
5260 if (e->X_add_number == 16)
5261 return OPERAND_MATCH;
5263 return OPERAND_OUT_OF_RANGE;
5267 /* register operands: */
5270 if (e->X_op == O_register && e->X_add_number >= REG_AR
5271 && e->X_add_number < REG_AR + 128)
5272 return OPERAND_MATCH;
5277 if (e->X_op == O_register && e->X_add_number >= REG_BR
5278 && e->X_add_number < REG_BR + 8)
5279 return OPERAND_MATCH;
5283 if (e->X_op == O_register && e->X_add_number >= REG_CR
5284 && e->X_add_number < REG_CR + 128)
5285 return OPERAND_MATCH;
5292 if (e->X_op == O_register && e->X_add_number >= REG_FR
5293 && e->X_add_number < REG_FR + 128)
5294 return OPERAND_MATCH;
5299 if (e->X_op == O_register && e->X_add_number >= REG_P
5300 && e->X_add_number < REG_P + 64)
5301 return OPERAND_MATCH;
5307 if (e->X_op == O_register && e->X_add_number >= REG_GR
5308 && e->X_add_number < REG_GR + 128)
5309 return OPERAND_MATCH;
5312 case IA64_OPND_R3_2:
5313 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5315 if (e->X_add_number < REG_GR + 4)
5316 return OPERAND_MATCH;
5317 else if (e->X_add_number < REG_GR + 128)
5318 return OPERAND_OUT_OF_RANGE;
5322 /* indirect operands: */
5323 case IA64_OPND_CPUID_R3:
5324 case IA64_OPND_DBR_R3:
5325 case IA64_OPND_DTR_R3:
5326 case IA64_OPND_ITR_R3:
5327 case IA64_OPND_IBR_R3:
5328 case IA64_OPND_MSR_R3:
5329 case IA64_OPND_PKR_R3:
5330 case IA64_OPND_PMC_R3:
5331 case IA64_OPND_PMD_R3:
5332 case IA64_OPND_RR_R3:
5333 if (e->X_op == O_index && e->X_op_symbol
5334 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5335 == opnd - IA64_OPND_CPUID_R3))
5336 return OPERAND_MATCH;
5340 if (e->X_op == O_index && !e->X_op_symbol)
5341 return OPERAND_MATCH;
5344 /* immediate operands: */
5345 case IA64_OPND_CNT2a:
5346 case IA64_OPND_LEN4:
5347 case IA64_OPND_LEN6:
5348 bits = operand_width (idesc->operands[index]);
5349 if (e->X_op == O_constant)
5351 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5352 return OPERAND_MATCH;
5354 return OPERAND_OUT_OF_RANGE;
5358 case IA64_OPND_CNT2b:
5359 if (e->X_op == O_constant)
5361 if ((bfd_vma) (e->X_add_number - 1) < 3)
5362 return OPERAND_MATCH;
5364 return OPERAND_OUT_OF_RANGE;
5368 case IA64_OPND_CNT2c:
5369 val = e->X_add_number;
5370 if (e->X_op == O_constant)
5372 if ((val == 0 || val == 7 || val == 15 || val == 16))
5373 return OPERAND_MATCH;
5375 return OPERAND_OUT_OF_RANGE;
5380 /* SOR must be an integer multiple of 8 */
5381 if (e->X_op == O_constant && e->X_add_number & 0x7)
5382 return OPERAND_OUT_OF_RANGE;
5385 if (e->X_op == O_constant)
5387 if ((bfd_vma) e->X_add_number <= 96)
5388 return OPERAND_MATCH;
5390 return OPERAND_OUT_OF_RANGE;
5394 case IA64_OPND_IMMU62:
5395 if (e->X_op == O_constant)
5397 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5398 return OPERAND_MATCH;
5400 return OPERAND_OUT_OF_RANGE;
5404 /* FIXME -- need 62-bit relocation type */
5405 as_bad (_("62-bit relocation not yet implemented"));
5409 case IA64_OPND_IMMU64:
5410 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5411 || e->X_op == O_subtract)
5413 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5414 fix->code = BFD_RELOC_IA64_IMM64;
5415 if (e->X_op != O_subtract)
5417 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5418 if (e->X_op == O_pseudo_fixup)
5422 fix->opnd = idesc->operands[index];
5425 ++CURR_SLOT.num_fixups;
5426 return OPERAND_MATCH;
5428 else if (e->X_op == O_constant)
5429 return OPERAND_MATCH;
5432 case IA64_OPND_CCNT5:
5433 case IA64_OPND_CNT5:
5434 case IA64_OPND_CNT6:
5435 case IA64_OPND_CPOS6a:
5436 case IA64_OPND_CPOS6b:
5437 case IA64_OPND_CPOS6c:
5438 case IA64_OPND_IMMU2:
5439 case IA64_OPND_IMMU7a:
5440 case IA64_OPND_IMMU7b:
5441 case IA64_OPND_IMMU21:
5442 case IA64_OPND_IMMU24:
5443 case IA64_OPND_MBTYPE4:
5444 case IA64_OPND_MHTYPE8:
5445 case IA64_OPND_POS6:
5446 bits = operand_width (idesc->operands[index]);
5447 if (e->X_op == O_constant)
5449 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5450 return OPERAND_MATCH;
5452 return OPERAND_OUT_OF_RANGE;
5456 case IA64_OPND_IMMU9:
5457 bits = operand_width (idesc->operands[index]);
5458 if (e->X_op == O_constant)
5460 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5462 int lobits = e->X_add_number & 0x3;
5463 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5464 e->X_add_number |= (bfd_vma) 0x3;
5465 return OPERAND_MATCH;
5468 return OPERAND_OUT_OF_RANGE;
5472 case IA64_OPND_IMM44:
5473 /* least 16 bits must be zero */
5474 if ((e->X_add_number & 0xffff) != 0)
5475 /* XXX technically, this is wrong: we should not be issuing warning
5476 messages until we're sure this instruction pattern is going to
5478 as_warn (_("lower 16 bits of mask ignored"));
5480 if (e->X_op == O_constant)
5482 if (((e->X_add_number >= 0
5483 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5484 || (e->X_add_number < 0
5485 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5488 if (e->X_add_number >= 0
5489 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5491 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5493 return OPERAND_MATCH;
5496 return OPERAND_OUT_OF_RANGE;
5500 case IA64_OPND_IMM17:
5501 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5502 if (e->X_op == O_constant)
5504 if (((e->X_add_number >= 0
5505 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5506 || (e->X_add_number < 0
5507 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5510 if (e->X_add_number >= 0
5511 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5513 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5515 return OPERAND_MATCH;
5518 return OPERAND_OUT_OF_RANGE;
5522 case IA64_OPND_IMM14:
5523 case IA64_OPND_IMM22:
5525 case IA64_OPND_IMM1:
5526 case IA64_OPND_IMM8:
5527 case IA64_OPND_IMM8U4:
5528 case IA64_OPND_IMM8M1:
5529 case IA64_OPND_IMM8M1U4:
5530 case IA64_OPND_IMM8M1U8:
5531 case IA64_OPND_IMM9a:
5532 case IA64_OPND_IMM9b:
5533 bits = operand_width (idesc->operands[index]);
5534 if (relocatable && (e->X_op == O_symbol
5535 || e->X_op == O_subtract
5536 || e->X_op == O_pseudo_fixup))
5538 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5540 if (idesc->operands[index] == IA64_OPND_IMM14)
5541 fix->code = BFD_RELOC_IA64_IMM14;
5543 fix->code = BFD_RELOC_IA64_IMM22;
5545 if (e->X_op != O_subtract)
5547 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5548 if (e->X_op == O_pseudo_fixup)
5552 fix->opnd = idesc->operands[index];
5555 ++CURR_SLOT.num_fixups;
5556 return OPERAND_MATCH;
5558 else if (e->X_op != O_constant
5559 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5560 return OPERAND_MISMATCH;
5562 if (opnd == IA64_OPND_IMM8M1U4)
5564 /* Zero is not valid for unsigned compares that take an adjusted
5565 constant immediate range. */
5566 if (e->X_add_number == 0)
5567 return OPERAND_OUT_OF_RANGE;
5569 /* Sign-extend 32-bit unsigned numbers, so that the following range
5570 checks will work. */
5571 val = e->X_add_number;
5572 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5573 && ((val & ((bfd_vma) 1 << 31)) != 0))
5574 val = ((val << 32) >> 32);
5576 /* Check for 0x100000000. This is valid because
5577 0x100000000-1 is the same as ((uint32_t) -1). */
5578 if (val == ((bfd_signed_vma) 1 << 32))
5579 return OPERAND_MATCH;
5583 else if (opnd == IA64_OPND_IMM8M1U8)
5585 /* Zero is not valid for unsigned compares that take an adjusted
5586 constant immediate range. */
5587 if (e->X_add_number == 0)
5588 return OPERAND_OUT_OF_RANGE;
5590 /* Check for 0x10000000000000000. */
5591 if (e->X_op == O_big)
5593 if (generic_bignum[0] == 0
5594 && generic_bignum[1] == 0
5595 && generic_bignum[2] == 0
5596 && generic_bignum[3] == 0
5597 && generic_bignum[4] == 1)
5598 return OPERAND_MATCH;
5600 return OPERAND_OUT_OF_RANGE;
5603 val = e->X_add_number - 1;
5605 else if (opnd == IA64_OPND_IMM8M1)
5606 val = e->X_add_number - 1;
5607 else if (opnd == IA64_OPND_IMM8U4)
5609 /* Sign-extend 32-bit unsigned numbers, so that the following range
5610 checks will work. */
5611 val = e->X_add_number;
5612 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5613 && ((val & ((bfd_vma) 1 << 31)) != 0))
5614 val = ((val << 32) >> 32);
5617 val = e->X_add_number;
5619 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5620 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5621 return OPERAND_MATCH;
5623 return OPERAND_OUT_OF_RANGE;
5625 case IA64_OPND_INC3:
5626 /* +/- 1, 4, 8, 16 */
5627 val = e->X_add_number;
5630 if (e->X_op == O_constant)
5632 if ((val == 1 || val == 4 || val == 8 || val == 16))
5633 return OPERAND_MATCH;
5635 return OPERAND_OUT_OF_RANGE;
5639 case IA64_OPND_TGT25:
5640 case IA64_OPND_TGT25b:
5641 case IA64_OPND_TGT25c:
5642 case IA64_OPND_TGT64:
5643 if (e->X_op == O_symbol)
5645 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5646 if (opnd == IA64_OPND_TGT25)
5647 fix->code = BFD_RELOC_IA64_PCREL21F;
5648 else if (opnd == IA64_OPND_TGT25b)
5649 fix->code = BFD_RELOC_IA64_PCREL21M;
5650 else if (opnd == IA64_OPND_TGT25c)
5651 fix->code = BFD_RELOC_IA64_PCREL21B;
5652 else if (opnd == IA64_OPND_TGT64)
5653 fix->code = BFD_RELOC_IA64_PCREL60B;
5657 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5658 fix->opnd = idesc->operands[index];
5661 ++CURR_SLOT.num_fixups;
5662 return OPERAND_MATCH;
5664 case IA64_OPND_TAG13:
5665 case IA64_OPND_TAG13b:
5669 return OPERAND_MATCH;
5672 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5673 /* There are no external relocs for TAG13/TAG13b fields, so we
5674 create a dummy reloc. This will not live past md_apply_fix3. */
5675 fix->code = BFD_RELOC_UNUSED;
5676 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5677 fix->opnd = idesc->operands[index];
5680 ++CURR_SLOT.num_fixups;
5681 return OPERAND_MATCH;
5688 case IA64_OPND_LDXMOV:
5689 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5690 fix->code = BFD_RELOC_IA64_LDXMOV;
5691 fix->opnd = idesc->operands[index];
5694 ++CURR_SLOT.num_fixups;
5695 return OPERAND_MATCH;
5700 return OPERAND_MISMATCH;
5709 memset (e, 0, sizeof (*e));
5712 if (*input_line_pointer != '}')
5714 sep = *input_line_pointer++;
5718 if (!md.manual_bundling)
5719 as_warn ("Found '}' when manual bundling is off");
5721 CURR_SLOT.manual_bundling_off = 1;
5722 md.manual_bundling = 0;
5728 /* Returns the next entry in the opcode table that matches the one in
5729 IDESC, and frees the entry in IDESC. If no matching entry is
5730 found, NULL is returned instead. */
5732 static struct ia64_opcode *
5733 get_next_opcode (struct ia64_opcode *idesc)
5735 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5736 ia64_free_opcode (idesc);
5740 /* Parse the operands for the opcode and find the opcode variant that
5741 matches the specified operands, or NULL if no match is possible. */
5743 static struct ia64_opcode *
5744 parse_operands (idesc)
5745 struct ia64_opcode *idesc;
5747 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5748 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5749 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5750 enum operand_match_result result;
5752 char *first_arg = 0, *end, *saved_input_pointer;
5755 assert (strlen (idesc->name) <= 128);
5757 strcpy (mnemonic, idesc->name);
5758 if (idesc->operands[2] == IA64_OPND_SOF)
5760 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5761 can't parse the first operand until we have parsed the
5762 remaining operands of the "alloc" instruction. */
5764 first_arg = input_line_pointer;
5765 end = strchr (input_line_pointer, '=');
5768 as_bad ("Expected separator `='");
5771 input_line_pointer = end + 1;
5776 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5778 sep = parse_operand (CURR_SLOT.opnd + i);
5779 if (CURR_SLOT.opnd[i].X_op == O_absent)
5784 if (sep != '=' && sep != ',')
5789 if (num_outputs > 0)
5790 as_bad ("Duplicate equal sign (=) in instruction");
5792 num_outputs = i + 1;
5797 as_bad ("Illegal operand separator `%c'", sep);
5801 if (idesc->operands[2] == IA64_OPND_SOF)
5803 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5804 know (strcmp (idesc->name, "alloc") == 0);
5805 if (num_operands == 5 /* first_arg not included in this count! */
5806 && CURR_SLOT.opnd[2].X_op == O_constant
5807 && CURR_SLOT.opnd[3].X_op == O_constant
5808 && CURR_SLOT.opnd[4].X_op == O_constant
5809 && CURR_SLOT.opnd[5].X_op == O_constant)
5811 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5812 CURR_SLOT.opnd[3].X_add_number,
5813 CURR_SLOT.opnd[4].X_add_number,
5814 CURR_SLOT.opnd[5].X_add_number);
5816 /* now we can parse the first arg: */
5817 saved_input_pointer = input_line_pointer;
5818 input_line_pointer = first_arg;
5819 sep = parse_operand (CURR_SLOT.opnd + 0);
5821 --num_outputs; /* force error */
5822 input_line_pointer = saved_input_pointer;
5824 CURR_SLOT.opnd[2].X_add_number = sof;
5825 CURR_SLOT.opnd[3].X_add_number
5826 = sof - CURR_SLOT.opnd[4].X_add_number;
5827 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5831 highest_unmatched_operand = 0;
5832 curr_out_of_range_pos = -1;
5834 expected_operand = idesc->operands[0];
5835 for (; idesc; idesc = get_next_opcode (idesc))
5837 if (num_outputs != idesc->num_outputs)
5838 continue; /* mismatch in # of outputs */
5840 CURR_SLOT.num_fixups = 0;
5842 /* Try to match all operands. If we see an out-of-range operand,
5843 then continue trying to match the rest of the operands, since if
5844 the rest match, then this idesc will give the best error message. */
5846 out_of_range_pos = -1;
5847 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5849 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5850 if (result != OPERAND_MATCH)
5852 if (result != OPERAND_OUT_OF_RANGE)
5854 if (out_of_range_pos < 0)
5855 /* remember position of the first out-of-range operand: */
5856 out_of_range_pos = i;
5860 /* If we did not match all operands, or if at least one operand was
5861 out-of-range, then this idesc does not match. Keep track of which
5862 idesc matched the most operands before failing. If we have two
5863 idescs that failed at the same position, and one had an out-of-range
5864 operand, then prefer the out-of-range operand. Thus if we have
5865 "add r0=0x1000000,r1" we get an error saying the constant is out
5866 of range instead of an error saying that the constant should have been
5869 if (i != num_operands || out_of_range_pos >= 0)
5871 if (i > highest_unmatched_operand
5872 || (i == highest_unmatched_operand
5873 && out_of_range_pos > curr_out_of_range_pos))
5875 highest_unmatched_operand = i;
5876 if (out_of_range_pos >= 0)
5878 expected_operand = idesc->operands[out_of_range_pos];
5879 error_pos = out_of_range_pos;
5883 expected_operand = idesc->operands[i];
5886 curr_out_of_range_pos = out_of_range_pos;
5891 if (num_operands < NELEMS (idesc->operands)
5892 && idesc->operands[num_operands])
5893 continue; /* mismatch in number of arguments */
5899 if (expected_operand)
5900 as_bad ("Operand %u of `%s' should be %s",
5901 error_pos + 1, mnemonic,
5902 elf64_ia64_operands[expected_operand].desc);
5904 as_bad ("Operand mismatch");
5910 /* Keep track of state necessary to determine whether a NOP is necessary
5911 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5912 detect a case where additional NOPs may be necessary. */
5914 errata_nop_necessary_p (slot, insn_unit)
5916 enum ia64_unit insn_unit;
5919 struct group *this_group = md.last_groups + md.group_idx;
5920 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5921 struct ia64_opcode *idesc = slot->idesc;
5923 /* Test whether this could be the first insn in a problematic sequence. */
5924 if (insn_unit == IA64_UNIT_F)
5926 for (i = 0; i < idesc->num_outputs; i++)
5927 if (idesc->operands[i] == IA64_OPND_P1
5928 || idesc->operands[i] == IA64_OPND_P2)
5930 int regno = slot->opnd[i].X_add_number - REG_P;
5931 /* Ignore invalid operands; they generate errors elsewhere. */
5934 this_group->p_reg_set[regno] = 1;
5938 /* Test whether this could be the second insn in a problematic sequence. */
5939 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5940 && prev_group->p_reg_set[slot->qp_regno])
5942 for (i = 0; i < idesc->num_outputs; i++)
5943 if (idesc->operands[i] == IA64_OPND_R1
5944 || idesc->operands[i] == IA64_OPND_R2
5945 || idesc->operands[i] == IA64_OPND_R3)
5947 int regno = slot->opnd[i].X_add_number - REG_GR;
5948 /* Ignore invalid operands; they generate errors elsewhere. */
5951 if (strncmp (idesc->name, "add", 3) != 0
5952 && strncmp (idesc->name, "sub", 3) != 0
5953 && strncmp (idesc->name, "shladd", 6) != 0
5954 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5955 this_group->g_reg_set_conditionally[regno] = 1;
5959 /* Test whether this could be the third insn in a problematic sequence. */
5960 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5962 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5963 idesc->operands[i] == IA64_OPND_R3
5964 /* For mov indirect. */
5965 || idesc->operands[i] == IA64_OPND_RR_R3
5966 || idesc->operands[i] == IA64_OPND_DBR_R3
5967 || idesc->operands[i] == IA64_OPND_IBR_R3
5968 || idesc->operands[i] == IA64_OPND_PKR_R3
5969 || idesc->operands[i] == IA64_OPND_PMC_R3
5970 || idesc->operands[i] == IA64_OPND_PMD_R3
5971 || idesc->operands[i] == IA64_OPND_MSR_R3
5972 || idesc->operands[i] == IA64_OPND_CPUID_R3
5974 || idesc->operands[i] == IA64_OPND_ITR_R3
5975 || idesc->operands[i] == IA64_OPND_DTR_R3
5976 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5977 || idesc->operands[i] == IA64_OPND_MR3)
5979 int regno = slot->opnd[i].X_add_number - REG_GR;
5980 /* Ignore invalid operands; they generate errors elsewhere. */
5983 if (idesc->operands[i] == IA64_OPND_R3)
5985 if (strcmp (idesc->name, "fc") != 0
5986 && strcmp (idesc->name, "tak") != 0
5987 && strcmp (idesc->name, "thash") != 0
5988 && strcmp (idesc->name, "tpa") != 0
5989 && strcmp (idesc->name, "ttag") != 0
5990 && strncmp (idesc->name, "ptr", 3) != 0
5991 && strncmp (idesc->name, "ptc", 3) != 0
5992 && strncmp (idesc->name, "probe", 5) != 0)
5995 if (prev_group->g_reg_set_conditionally[regno])
6003 build_insn (slot, insnp)
6007 const struct ia64_operand *odesc, *o2desc;
6008 struct ia64_opcode *idesc = slot->idesc;
6009 bfd_signed_vma insn, val;
6013 insn = idesc->opcode | slot->qp_regno;
6015 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6017 if (slot->opnd[i].X_op == O_register
6018 || slot->opnd[i].X_op == O_constant
6019 || slot->opnd[i].X_op == O_index)
6020 val = slot->opnd[i].X_add_number;
6021 else if (slot->opnd[i].X_op == O_big)
6023 /* This must be the value 0x10000000000000000. */
6024 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6030 switch (idesc->operands[i])
6032 case IA64_OPND_IMMU64:
6033 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6034 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6035 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6036 | (((val >> 63) & 0x1) << 36));
6039 case IA64_OPND_IMMU62:
6040 val &= 0x3fffffffffffffffULL;
6041 if (val != slot->opnd[i].X_add_number)
6042 as_warn (_("Value truncated to 62 bits"));
6043 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6044 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6047 case IA64_OPND_TGT64:
6049 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6050 insn |= ((((val >> 59) & 0x1) << 36)
6051 | (((val >> 0) & 0xfffff) << 13));
6082 case IA64_OPND_R3_2:
6083 case IA64_OPND_CPUID_R3:
6084 case IA64_OPND_DBR_R3:
6085 case IA64_OPND_DTR_R3:
6086 case IA64_OPND_ITR_R3:
6087 case IA64_OPND_IBR_R3:
6089 case IA64_OPND_MSR_R3:
6090 case IA64_OPND_PKR_R3:
6091 case IA64_OPND_PMC_R3:
6092 case IA64_OPND_PMD_R3:
6093 case IA64_OPND_RR_R3:
6101 odesc = elf64_ia64_operands + idesc->operands[i];
6102 err = (*odesc->insert) (odesc, val, &insn);
6104 as_bad_where (slot->src_file, slot->src_line,
6105 "Bad operand value: %s", err);
6106 if (idesc->flags & IA64_OPCODE_PSEUDO)
6108 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6109 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6111 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6112 (*o2desc->insert) (o2desc, val, &insn);
6114 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6115 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6116 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6118 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6119 (*o2desc->insert) (o2desc, 64 - val, &insn);
6129 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6130 unsigned int manual_bundling = 0;
6131 enum ia64_unit required_unit, insn_unit = 0;
6132 enum ia64_insn_type type[3], insn_type;
6133 unsigned int template, orig_template;
6134 bfd_vma insn[3] = { -1, -1, -1 };
6135 struct ia64_opcode *idesc;
6136 int end_of_insn_group = 0, user_template = -1;
6137 int n, i, j, first, curr;
6138 unw_rec_list *ptr, *last_ptr, *end_ptr;
6139 bfd_vma t0 = 0, t1 = 0;
6140 struct label_fix *lfix;
6141 struct insn_fix *ifix;
6147 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6148 know (first >= 0 & first < NUM_SLOTS);
6149 n = MIN (3, md.num_slots_in_use);
6151 /* Determine template: user user_template if specified, best match
6154 if (md.slot[first].user_template >= 0)
6155 user_template = template = md.slot[first].user_template;
6158 /* Auto select appropriate template. */
6159 memset (type, 0, sizeof (type));
6161 for (i = 0; i < n; ++i)
6163 if (md.slot[curr].label_fixups && i != 0)
6165 type[i] = md.slot[curr].idesc->type;
6166 curr = (curr + 1) % NUM_SLOTS;
6168 template = best_template[type[0]][type[1]][type[2]];
6171 /* initialize instructions with appropriate nops: */
6172 for (i = 0; i < 3; ++i)
6173 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6177 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6178 from the start of the frag. */
6179 addr_mod = frag_now_fix () & 15;
6180 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6181 as_bad (_("instruction address is not a multiple of 16"));
6182 frag_now->insn_addr = addr_mod;
6183 frag_now->has_code = 1;
6185 /* now fill in slots with as many insns as possible: */
6187 idesc = md.slot[curr].idesc;
6188 end_of_insn_group = 0;
6189 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6191 /* If we have unwind records, we may need to update some now. */
6192 ptr = md.slot[curr].unwind_record;
6195 /* Find the last prologue/body record in the list for the current
6196 insn, and set the slot number for all records up to that point.
6197 This needs to be done now, because prologue/body records refer to
6198 the current point, not the point after the instruction has been
6199 issued. This matters because there may have been nops emitted
6200 meanwhile. Any non-prologue non-body record followed by a
6201 prologue/body record must also refer to the current point. */
6203 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6204 for (; ptr != end_ptr; ptr = ptr->next)
6205 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6206 || ptr->r.type == body)
6210 /* Make last_ptr point one after the last prologue/body
6212 last_ptr = last_ptr->next;
6213 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6216 ptr->slot_number = (unsigned long) f + i;
6217 ptr->slot_frag = frag_now;
6219 /* Remove the initialized records, so that we won't accidentally
6220 update them again if we insert a nop and continue. */
6221 md.slot[curr].unwind_record = last_ptr;
6225 if (idesc->flags & IA64_OPCODE_SLOT2)
6227 if (manual_bundling && i != 2)
6228 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6229 "`%s' must be last in bundle", idesc->name);
6233 if (idesc->flags & IA64_OPCODE_LAST)
6236 unsigned int required_template;
6238 /* If we need a stop bit after an M slot, our only choice is
6239 template 5 (M;;MI). If we need a stop bit after a B
6240 slot, our only choice is to place it at the end of the
6241 bundle, because the only available templates are MIB,
6242 MBB, BBB, MMB, and MFB. We don't handle anything other
6243 than M and B slots because these are the only kind of
6244 instructions that can have the IA64_OPCODE_LAST bit set. */
6245 required_template = template;
6246 switch (idesc->type)
6250 required_template = 5;
6258 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6259 "Internal error: don't know how to force %s to end"
6260 "of instruction group", idesc->name);
6264 if (manual_bundling && i != required_slot)
6265 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6266 "`%s' must be last in instruction group",
6268 if (required_slot < i)
6269 /* Can't fit this instruction. */
6273 if (required_template != template)
6275 /* If we switch the template, we need to reset the NOPs
6276 after slot i. The slot-types of the instructions ahead
6277 of i never change, so we don't need to worry about
6278 changing NOPs in front of this slot. */
6279 for (j = i; j < 3; ++j)
6280 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6282 template = required_template;
6284 if (curr != first && md.slot[curr].label_fixups)
6286 if (manual_bundling_on)
6287 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6288 "Label must be first in a bundle");
6289 /* This insn must go into the first slot of a bundle. */
6293 manual_bundling_on = md.slot[curr].manual_bundling_on;
6294 manual_bundling_off = md.slot[curr].manual_bundling_off;
6296 if (manual_bundling_on)
6299 manual_bundling = 1;
6301 break; /* need to start a new bundle */
6304 if (end_of_insn_group && md.num_slots_in_use >= 1)
6306 /* We need an instruction group boundary in the middle of a
6307 bundle. See if we can switch to an other template with
6308 an appropriate boundary. */
6310 orig_template = template;
6311 if (i == 1 && (user_template == 4
6312 || (user_template < 0
6313 && (ia64_templ_desc[template].exec_unit[0]
6317 end_of_insn_group = 0;
6319 else if (i == 2 && (user_template == 0
6320 || (user_template < 0
6321 && (ia64_templ_desc[template].exec_unit[1]
6323 /* This test makes sure we don't switch the template if
6324 the next instruction is one that needs to be first in
6325 an instruction group. Since all those instructions are
6326 in the M group, there is no way such an instruction can
6327 fit in this bundle even if we switch the template. The
6328 reason we have to check for this is that otherwise we
6329 may end up generating "MI;;I M.." which has the deadly
6330 effect that the second M instruction is no longer the
6331 first in the bundle! --davidm 99/12/16 */
6332 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6335 end_of_insn_group = 0;
6337 else if (curr != first)
6338 /* can't fit this insn */
6341 if (template != orig_template)
6342 /* if we switch the template, we need to reset the NOPs
6343 after slot i. The slot-types of the instructions ahead
6344 of i never change, so we don't need to worry about
6345 changing NOPs in front of this slot. */
6346 for (j = i; j < 3; ++j)
6347 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6349 required_unit = ia64_templ_desc[template].exec_unit[i];
6351 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6352 if (idesc->type == IA64_TYPE_DYN)
6354 if ((strcmp (idesc->name, "nop") == 0)
6355 || (strcmp (idesc->name, "hint") == 0)
6356 || (strcmp (idesc->name, "break") == 0))
6357 insn_unit = required_unit;
6358 else if (strcmp (idesc->name, "chk.s") == 0)
6360 insn_unit = IA64_UNIT_M;
6361 if (required_unit == IA64_UNIT_I)
6362 insn_unit = IA64_UNIT_I;
6365 as_fatal ("emit_one_bundle: unexpected dynamic op");
6367 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6368 ia64_free_opcode (idesc);
6369 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6371 know (!idesc->next); /* no resolved dynamic ops have collisions */
6376 insn_type = idesc->type;
6377 insn_unit = IA64_UNIT_NIL;
6381 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6382 insn_unit = required_unit;
6384 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6385 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6386 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6387 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6388 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6393 if (insn_unit != required_unit)
6395 if (required_unit == IA64_UNIT_L
6396 && insn_unit == IA64_UNIT_I
6397 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6399 /* we got ourselves an MLX template but the current
6400 instruction isn't an X-unit, or an I-unit instruction
6401 that can go into the X slot of an MLX template. Duh. */
6402 if (md.num_slots_in_use >= NUM_SLOTS)
6404 as_bad_where (md.slot[curr].src_file,
6405 md.slot[curr].src_line,
6406 "`%s' can't go in X slot of "
6407 "MLX template", idesc->name);
6408 /* drop this insn so we don't livelock: */
6409 --md.num_slots_in_use;
6413 continue; /* try next slot */
6419 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6420 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6423 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6424 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6426 build_insn (md.slot + curr, insn + i);
6428 ptr = md.slot[curr].unwind_record;
6431 /* Set slot numbers for all remaining unwind records belonging to the
6432 current insn. There can not be any prologue/body unwind records
6434 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6435 for (; ptr != end_ptr; ptr = ptr->next)
6437 ptr->slot_number = (unsigned long) f + i;
6438 ptr->slot_frag = frag_now;
6440 md.slot[curr].unwind_record = NULL;
6443 if (required_unit == IA64_UNIT_L)
6446 /* skip one slot for long/X-unit instructions */
6449 --md.num_slots_in_use;
6451 /* now is a good time to fix up the labels for this insn: */
6452 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6454 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6455 symbol_set_frag (lfix->sym, frag_now);
6457 /* and fix up the tags also. */
6458 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6460 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6461 symbol_set_frag (lfix->sym, frag_now);
6464 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6466 ifix = md.slot[curr].fixup + j;
6467 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6468 &ifix->expr, ifix->is_pcrel, ifix->code);
6469 fix->tc_fix_data.opnd = ifix->opnd;
6470 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6471 fix->fx_file = md.slot[curr].src_file;
6472 fix->fx_line = md.slot[curr].src_line;
6475 end_of_insn_group = md.slot[curr].end_of_insn_group;
6477 if (end_of_insn_group)
6479 md.group_idx = (md.group_idx + 1) % 3;
6480 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6484 ia64_free_opcode (md.slot[curr].idesc);
6485 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6486 md.slot[curr].user_template = -1;
6488 if (manual_bundling_off)
6490 manual_bundling = 0;
6493 curr = (curr + 1) % NUM_SLOTS;
6494 idesc = md.slot[curr].idesc;
6496 if (manual_bundling)
6498 if (md.num_slots_in_use > 0)
6499 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6500 "`%s' does not fit into %s template",
6501 idesc->name, ia64_templ_desc[template].name);
6503 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6504 "Missing '}' at end of file");
6506 know (md.num_slots_in_use < NUM_SLOTS);
6508 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6509 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6511 number_to_chars_littleendian (f + 0, t0, 8);
6512 number_to_chars_littleendian (f + 8, t1, 8);
6516 unwind.list->next_slot_number = (unsigned long) f + 16;
6517 unwind.list->next_slot_frag = frag_now;
6522 md_parse_option (c, arg)
6529 /* Switches from the Intel assembler. */
6531 if (strcmp (arg, "ilp64") == 0
6532 || strcmp (arg, "lp64") == 0
6533 || strcmp (arg, "p64") == 0)
6535 md.flags |= EF_IA_64_ABI64;
6537 else if (strcmp (arg, "ilp32") == 0)
6539 md.flags &= ~EF_IA_64_ABI64;
6541 else if (strcmp (arg, "le") == 0)
6543 md.flags &= ~EF_IA_64_BE;
6544 default_big_endian = 0;
6546 else if (strcmp (arg, "be") == 0)
6548 md.flags |= EF_IA_64_BE;
6549 default_big_endian = 1;
6556 if (strcmp (arg, "so") == 0)
6558 /* Suppress signon message. */
6560 else if (strcmp (arg, "pi") == 0)
6562 /* Reject privileged instructions. FIXME */
6564 else if (strcmp (arg, "us") == 0)
6566 /* Allow union of signed and unsigned range. FIXME */
6568 else if (strcmp (arg, "close_fcalls") == 0)
6570 /* Do not resolve global function calls. */
6577 /* temp[="prefix"] Insert temporary labels into the object file
6578 symbol table prefixed by "prefix".
6579 Default prefix is ":temp:".
6584 /* indirect=<tgt> Assume unannotated indirect branches behavior
6585 according to <tgt> --
6586 exit: branch out from the current context (default)
6587 labels: all labels in context may be branch targets
6589 if (strncmp (arg, "indirect=", 9) != 0)
6594 /* -X conflicts with an ignored option, use -x instead */
6596 if (!arg || strcmp (arg, "explicit") == 0)
6598 /* set default mode to explicit */
6599 md.default_explicit_mode = 1;
6602 else if (strcmp (arg, "auto") == 0)
6604 md.default_explicit_mode = 0;
6606 else if (strcmp (arg, "debug") == 0)
6610 else if (strcmp (arg, "debugx") == 0)
6612 md.default_explicit_mode = 1;
6617 as_bad (_("Unrecognized option '-x%s'"), arg);
6622 /* nops Print nops statistics. */
6625 /* GNU specific switches for gcc. */
6626 case OPTION_MCONSTANT_GP:
6627 md.flags |= EF_IA_64_CONS_GP;
6630 case OPTION_MAUTO_PIC:
6631 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6642 md_show_usage (stream)
6647 --mconstant-gp mark output file as using the constant-GP model\n\
6648 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6649 --mauto-pic mark output file as using the constant-GP model\n\
6650 without function descriptors (sets ELF header flag\n\
6651 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6652 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6653 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6654 -x | -xexplicit turn on dependency violation checking (default)\n\
6655 -xauto automagically remove dependency violations\n\
6656 -xdebug debug dependency violation checker\n"),
6661 ia64_after_parse_args ()
6663 if (debug_type == DEBUG_STABS)
6664 as_fatal (_("--gstabs is not supported for ia64"));
6667 /* Return true if TYPE fits in TEMPL at SLOT. */
6670 match (int templ, int type, int slot)
6672 enum ia64_unit unit;
6675 unit = ia64_templ_desc[templ].exec_unit[slot];
6678 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6680 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6682 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6683 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6684 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6685 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6686 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6687 default: result = 0; break;
6692 /* Add a bit of extra goodness if a nop of type F or B would fit
6693 in TEMPL at SLOT. */
6696 extra_goodness (int templ, int slot)
6698 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6700 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6705 /* This function is called once, at assembler startup time. It sets
6706 up all the tables, etc. that the MD part of the assembler will need
6707 that can be determined before arguments are parsed. */
6711 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6716 md.explicit_mode = md.default_explicit_mode;
6718 bfd_set_section_alignment (stdoutput, text_section, 4);
6720 /* Make sure function pointers get initialized. */
6721 target_big_endian = -1;
6722 dot_byteorder (default_big_endian);
6724 alias_hash = hash_new ();
6725 alias_name_hash = hash_new ();
6726 secalias_hash = hash_new ();
6727 secalias_name_hash = hash_new ();
6729 pseudo_func[FUNC_DTP_MODULE].u.sym =
6730 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6731 &zero_address_frag);
6733 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6734 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6735 &zero_address_frag);
6737 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6738 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6739 &zero_address_frag);
6741 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6742 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6743 &zero_address_frag);
6745 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6746 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6747 &zero_address_frag);
6749 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6750 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6751 &zero_address_frag);
6753 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6754 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6755 &zero_address_frag);
6757 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6758 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6759 &zero_address_frag);
6761 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6762 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6763 &zero_address_frag);
6765 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6766 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6767 &zero_address_frag);
6769 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6770 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6771 &zero_address_frag);
6773 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6774 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6775 &zero_address_frag);
6777 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6778 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6779 &zero_address_frag);
6781 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6782 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6783 &zero_address_frag);
6785 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6786 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6787 &zero_address_frag);
6789 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6790 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6791 &zero_address_frag);
6793 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6794 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6795 &zero_address_frag);
6797 /* Compute the table of best templates. We compute goodness as a
6798 base 4 value, in which each match counts for 3, each F counts
6799 for 2, each B counts for 1. This should maximize the number of
6800 F and B nops in the chosen bundles, which is good because these
6801 pipelines are least likely to be overcommitted. */
6802 for (i = 0; i < IA64_NUM_TYPES; ++i)
6803 for (j = 0; j < IA64_NUM_TYPES; ++j)
6804 for (k = 0; k < IA64_NUM_TYPES; ++k)
6807 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6810 if (match (t, i, 0))
6812 if (match (t, j, 1))
6814 if (match (t, k, 2))
6815 goodness = 3 + 3 + 3;
6817 goodness = 3 + 3 + extra_goodness (t, 2);
6819 else if (match (t, j, 2))
6820 goodness = 3 + 3 + extra_goodness (t, 1);
6824 goodness += extra_goodness (t, 1);
6825 goodness += extra_goodness (t, 2);
6828 else if (match (t, i, 1))
6830 if (match (t, j, 2))
6833 goodness = 3 + extra_goodness (t, 2);
6835 else if (match (t, i, 2))
6836 goodness = 3 + extra_goodness (t, 1);
6838 if (goodness > best)
6841 best_template[i][j][k] = t;
6846 for (i = 0; i < NUM_SLOTS; ++i)
6847 md.slot[i].user_template = -1;
6849 md.pseudo_hash = hash_new ();
6850 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6852 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6853 (void *) (pseudo_opcode + i));
6855 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6856 pseudo_opcode[i].name, err);
6859 md.reg_hash = hash_new ();
6860 md.dynreg_hash = hash_new ();
6861 md.const_hash = hash_new ();
6862 md.entry_hash = hash_new ();
6864 /* general registers: */
6867 for (i = 0; i < total; ++i)
6869 sprintf (name, "r%d", i - REG_GR);
6870 md.regsym[i] = declare_register (name, i);
6873 /* floating point registers: */
6875 for (; i < total; ++i)
6877 sprintf (name, "f%d", i - REG_FR);
6878 md.regsym[i] = declare_register (name, i);
6881 /* application registers: */
6884 for (; i < total; ++i)
6886 sprintf (name, "ar%d", i - REG_AR);
6887 md.regsym[i] = declare_register (name, i);
6890 /* control registers: */
6893 for (; i < total; ++i)
6895 sprintf (name, "cr%d", i - REG_CR);
6896 md.regsym[i] = declare_register (name, i);
6899 /* predicate registers: */
6901 for (; i < total; ++i)
6903 sprintf (name, "p%d", i - REG_P);
6904 md.regsym[i] = declare_register (name, i);
6907 /* branch registers: */
6909 for (; i < total; ++i)
6911 sprintf (name, "b%d", i - REG_BR);
6912 md.regsym[i] = declare_register (name, i);
6915 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6916 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6917 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6918 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6919 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6920 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6921 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6923 for (i = 0; i < NELEMS (indirect_reg); ++i)
6925 regnum = indirect_reg[i].regnum;
6926 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6929 /* define synonyms for application registers: */
6930 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6931 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6932 REG_AR + ar[i - REG_AR].regnum);
6934 /* define synonyms for control registers: */
6935 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6936 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6937 REG_CR + cr[i - REG_CR].regnum);
6939 declare_register ("gp", REG_GR + 1);
6940 declare_register ("sp", REG_GR + 12);
6941 declare_register ("rp", REG_BR + 0);
6943 /* pseudo-registers used to specify unwind info: */
6944 declare_register ("psp", REG_PSP);
6946 declare_register_set ("ret", 4, REG_GR + 8);
6947 declare_register_set ("farg", 8, REG_FR + 8);
6948 declare_register_set ("fret", 8, REG_FR + 8);
6950 for (i = 0; i < NELEMS (const_bits); ++i)
6952 err = hash_insert (md.const_hash, const_bits[i].name,
6953 (PTR) (const_bits + i));
6955 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6959 /* Set the architecture and machine depending on defaults and command line
6961 if (md.flags & EF_IA_64_ABI64)
6962 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6964 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6967 as_warn (_("Could not set architecture and machine"));
6969 /* Set the pointer size and pointer shift size depending on md.flags */
6971 if (md.flags & EF_IA_64_ABI64)
6973 md.pointer_size = 8; /* pointers are 8 bytes */
6974 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6978 md.pointer_size = 4; /* pointers are 4 bytes */
6979 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6982 md.mem_offset.hint = 0;
6985 md.entry_labels = NULL;
6988 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6989 because that is called after md_parse_option which is where we do the
6990 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6991 default endianness. */
6994 ia64_init (argc, argv)
6995 int argc ATTRIBUTE_UNUSED;
6996 char **argv ATTRIBUTE_UNUSED;
6998 md.flags = MD_FLAGS_DEFAULT;
7001 /* Return a string for the target object file format. */
7004 ia64_target_format ()
7006 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7008 if (md.flags & EF_IA_64_BE)
7010 if (md.flags & EF_IA_64_ABI64)
7011 #if defined(TE_AIX50)
7012 return "elf64-ia64-aix-big";
7013 #elif defined(TE_HPUX)
7014 return "elf64-ia64-hpux-big";
7016 return "elf64-ia64-big";
7019 #if defined(TE_AIX50)
7020 return "elf32-ia64-aix-big";
7021 #elif defined(TE_HPUX)
7022 return "elf32-ia64-hpux-big";
7024 return "elf32-ia64-big";
7029 if (md.flags & EF_IA_64_ABI64)
7031 return "elf64-ia64-aix-little";
7033 return "elf64-ia64-little";
7037 return "elf32-ia64-aix-little";
7039 return "elf32-ia64-little";
7044 return "unknown-format";
7048 ia64_end_of_source ()
7050 /* terminate insn group upon reaching end of file: */
7051 insn_group_break (1, 0, 0);
7053 /* emits slots we haven't written yet: */
7054 ia64_flush_insns ();
7056 bfd_set_private_flags (stdoutput, md.flags);
7058 md.mem_offset.hint = 0;
7064 if (md.qp.X_op == O_register)
7065 as_bad ("qualifying predicate not followed by instruction");
7066 md.qp.X_op = O_absent;
7068 if (ignore_input ())
7071 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7073 if (md.detect_dv && !md.explicit_mode)
7074 as_warn (_("Explicit stops are ignored in auto mode"));
7076 insn_group_break (1, 0, 0);
7080 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7082 static int defining_tag = 0;
7085 ia64_unrecognized_line (ch)
7091 expression (&md.qp);
7092 if (*input_line_pointer++ != ')')
7094 as_bad ("Expected ')'");
7097 if (md.qp.X_op != O_register)
7099 as_bad ("Qualifying predicate expected");
7102 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7104 as_bad ("Predicate register expected");
7110 if (md.manual_bundling)
7111 as_warn ("Found '{' when manual bundling is already turned on");
7113 CURR_SLOT.manual_bundling_on = 1;
7114 md.manual_bundling = 1;
7116 /* Bundling is only acceptable in explicit mode
7117 or when in default automatic mode. */
7118 if (md.detect_dv && !md.explicit_mode)
7120 if (!md.mode_explicitly_set
7121 && !md.default_explicit_mode)
7124 as_warn (_("Found '{' after explicit switch to automatic mode"));
7129 if (!md.manual_bundling)
7130 as_warn ("Found '}' when manual bundling is off");
7132 PREV_SLOT.manual_bundling_off = 1;
7133 md.manual_bundling = 0;
7135 /* switch back to automatic mode, if applicable */
7138 && !md.mode_explicitly_set
7139 && !md.default_explicit_mode)
7142 /* Allow '{' to follow on the same line. We also allow ";;", but that
7143 happens automatically because ';' is an end of line marker. */
7145 if (input_line_pointer[0] == '{')
7147 input_line_pointer++;
7148 return ia64_unrecognized_line ('{');
7151 demand_empty_rest_of_line ();
7161 if (md.qp.X_op == O_register)
7163 as_bad ("Tag must come before qualifying predicate.");
7167 /* This implements just enough of read_a_source_file in read.c to
7168 recognize labels. */
7169 if (is_name_beginner (*input_line_pointer))
7171 s = input_line_pointer;
7172 c = get_symbol_end ();
7174 else if (LOCAL_LABELS_FB
7175 && ISDIGIT (*input_line_pointer))
7178 while (ISDIGIT (*input_line_pointer))
7179 temp = (temp * 10) + *input_line_pointer++ - '0';
7180 fb_label_instance_inc (temp);
7181 s = fb_label_name (temp, 0);
7182 c = *input_line_pointer;
7191 /* Put ':' back for error messages' sake. */
7192 *input_line_pointer++ = ':';
7193 as_bad ("Expected ':'");
7200 /* Put ':' back for error messages' sake. */
7201 *input_line_pointer++ = ':';
7202 if (*input_line_pointer++ != ']')
7204 as_bad ("Expected ']'");
7209 as_bad ("Tag name expected");
7219 /* Not a valid line. */
7224 ia64_frob_label (sym)
7227 struct label_fix *fix;
7229 /* Tags need special handling since they are not bundle breaks like
7233 fix = obstack_alloc (¬es, sizeof (*fix));
7235 fix->next = CURR_SLOT.tag_fixups;
7236 CURR_SLOT.tag_fixups = fix;
7241 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7243 md.last_text_seg = now_seg;
7244 fix = obstack_alloc (¬es, sizeof (*fix));
7246 fix->next = CURR_SLOT.label_fixups;
7247 CURR_SLOT.label_fixups = fix;
7249 /* Keep track of how many code entry points we've seen. */
7250 if (md.path == md.maxpaths)
7253 md.entry_labels = (const char **)
7254 xrealloc ((void *) md.entry_labels,
7255 md.maxpaths * sizeof (char *));
7257 md.entry_labels[md.path++] = S_GET_NAME (sym);
7262 /* The HP-UX linker will give unresolved symbol errors for symbols
7263 that are declared but unused. This routine removes declared,
7264 unused symbols from an object. */
7266 ia64_frob_symbol (sym)
7269 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7270 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7271 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7272 && ! S_IS_EXTERNAL (sym)))
7279 ia64_flush_pending_output ()
7281 if (!md.keep_pending_output
7282 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7284 /* ??? This causes many unnecessary stop bits to be emitted.
7285 Unfortunately, it isn't clear if it is safe to remove this. */
7286 insn_group_break (1, 0, 0);
7287 ia64_flush_insns ();
7291 /* Do ia64-specific expression optimization. All that's done here is
7292 to transform index expressions that are either due to the indexing
7293 of rotating registers or due to the indexing of indirect register
7296 ia64_optimize_expr (l, op, r)
7305 if (l->X_op == O_register && r->X_op == O_constant)
7307 num_regs = (l->X_add_number >> 16);
7308 if ((unsigned) r->X_add_number >= num_regs)
7311 as_bad ("No current frame");
7313 as_bad ("Index out of range 0..%u", num_regs - 1);
7314 r->X_add_number = 0;
7316 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7319 else if (l->X_op == O_register && r->X_op == O_register)
7321 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7322 || l->X_add_number == IND_MEM)
7324 as_bad ("Indirect register set name expected");
7325 l->X_add_number = IND_CPUID;
7328 l->X_op_symbol = md.regsym[l->X_add_number];
7329 l->X_add_number = r->X_add_number;
7337 ia64_parse_name (name, e)
7341 struct const_desc *cdesc;
7342 struct dynreg *dr = 0;
7343 unsigned int regnum;
7347 /* first see if NAME is a known register name: */
7348 sym = hash_find (md.reg_hash, name);
7351 e->X_op = O_register;
7352 e->X_add_number = S_GET_VALUE (sym);
7356 cdesc = hash_find (md.const_hash, name);
7359 e->X_op = O_constant;
7360 e->X_add_number = cdesc->value;
7364 /* check for inN, locN, or outN: */
7368 if (name[1] == 'n' && ISDIGIT (name[2]))
7376 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7384 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7397 /* The name is inN, locN, or outN; parse the register number. */
7398 regnum = strtoul (name, &end, 10);
7399 if (end > name && *end == '\0')
7401 if ((unsigned) regnum >= dr->num_regs)
7404 as_bad ("No current frame");
7406 as_bad ("Register number out of range 0..%u",
7410 e->X_op = O_register;
7411 e->X_add_number = dr->base + regnum;
7416 if ((dr = hash_find (md.dynreg_hash, name)))
7418 /* We've got ourselves the name of a rotating register set.
7419 Store the base register number in the low 16 bits of
7420 X_add_number and the size of the register set in the top 16
7422 e->X_op = O_register;
7423 e->X_add_number = dr->base | (dr->num_regs << 16);
7429 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7432 ia64_canonicalize_symbol_name (name)
7435 size_t len = strlen (name);
7436 if (len > 1 && name[len - 1] == '#')
7437 name[len - 1] = '\0';
7441 /* Return true if idesc is a conditional branch instruction. This excludes
7442 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7443 because they always read/write resources regardless of the value of the
7444 qualifying predicate. br.ia must always use p0, and hence is always
7445 taken. Thus this function returns true for branches which can fall
7446 through, and which use no resources if they do fall through. */
7449 is_conditional_branch (idesc)
7450 struct ia64_opcode *idesc;
7452 /* br is a conditional branch. Everything that starts with br. except
7453 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7454 Everything that starts with brl is a conditional branch. */
7455 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7456 && (idesc->name[2] == '\0'
7457 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7458 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7459 || idesc->name[2] == 'l'
7460 /* br.cond, br.call, br.clr */
7461 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7462 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7463 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7466 /* Return whether the given opcode is a taken branch. If there's any doubt,
7470 is_taken_branch (idesc)
7471 struct ia64_opcode *idesc;
7473 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7474 || strncmp (idesc->name, "br.ia", 5) == 0);
7477 /* Return whether the given opcode is an interruption or rfi. If there's any
7478 doubt, returns zero. */
7481 is_interruption_or_rfi (idesc)
7482 struct ia64_opcode *idesc;
7484 if (strcmp (idesc->name, "rfi") == 0)
7489 /* Returns the index of the given dependency in the opcode's list of chks, or
7490 -1 if there is no dependency. */
7493 depends_on (depind, idesc)
7495 struct ia64_opcode *idesc;
7498 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7499 for (i = 0; i < dep->nchks; i++)
7501 if (depind == DEP (dep->chks[i]))
7507 /* Determine a set of specific resources used for a particular resource
7508 class. Returns the number of specific resources identified For those
7509 cases which are not determinable statically, the resource returned is
7512 Meanings of value in 'NOTE':
7513 1) only read/write when the register number is explicitly encoded in the
7515 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7516 accesses CFM when qualifying predicate is in the rotating region.
7517 3) general register value is used to specify an indirect register; not
7518 determinable statically.
7519 4) only read the given resource when bits 7:0 of the indirect index
7520 register value does not match the register number of the resource; not
7521 determinable statically.
7522 5) all rules are implementation specific.
7523 6) only when both the index specified by the reader and the index specified
7524 by the writer have the same value in bits 63:61; not determinable
7526 7) only access the specified resource when the corresponding mask bit is
7528 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7529 only read when these insns reference FR2-31
7530 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7531 written when these insns write FR32-127
7532 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7534 11) The target predicates are written independently of PR[qp], but source
7535 registers are only read if PR[qp] is true. Since the state of PR[qp]
7536 cannot statically be determined, all source registers are marked used.
7537 12) This insn only reads the specified predicate register when that
7538 register is the PR[qp].
7539 13) This reference to ld-c only applies to teh GR whose value is loaded
7540 with data returned from memory, not the post-incremented address register.
7541 14) The RSE resource includes the implementation-specific RSE internal
7542 state resources. At least one (and possibly more) of these resources are
7543 read by each instruction listed in IC:rse-readers. At least one (and
7544 possibly more) of these resources are written by each insn listed in
7546 15+16) Represents reserved instructions, which the assembler does not
7549 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7550 this code; there are no dependency violations based on memory access.
7553 #define MAX_SPECS 256
7558 specify_resource (dep, idesc, type, specs, note, path)
7559 const struct ia64_dependency *dep;
7560 struct ia64_opcode *idesc;
7561 int type; /* is this a DV chk or a DV reg? */
7562 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7563 int note; /* resource note for this insn's usage */
7564 int path; /* which execution path to examine */
7571 if (dep->mode == IA64_DV_WAW
7572 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7573 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7576 /* template for any resources we identify */
7577 tmpl.dependency = dep;
7579 tmpl.insn_srlz = tmpl.data_srlz = 0;
7580 tmpl.qp_regno = CURR_SLOT.qp_regno;
7581 tmpl.link_to_qp_branch = 1;
7582 tmpl.mem_offset.hint = 0;
7585 tmpl.cmp_type = CMP_NONE;
7588 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7589 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7590 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7592 /* we don't need to track these */
7593 if (dep->semantics == IA64_DVS_NONE)
7596 switch (dep->specifier)
7601 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7603 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7604 if (regno >= 0 && regno <= 7)
7606 specs[count] = tmpl;
7607 specs[count++].index = regno;
7613 for (i = 0; i < 8; i++)
7615 specs[count] = tmpl;
7616 specs[count++].index = i;
7625 case IA64_RS_AR_UNAT:
7626 /* This is a mov =AR or mov AR= instruction. */
7627 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7629 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7630 if (regno == AR_UNAT)
7632 specs[count++] = tmpl;
7637 /* This is a spill/fill, or other instruction that modifies the
7640 /* Unless we can determine the specific bits used, mark the whole
7641 thing; bits 8:3 of the memory address indicate the bit used in
7642 UNAT. The .mem.offset hint may be used to eliminate a small
7643 subset of conflicts. */
7644 specs[count] = tmpl;
7645 if (md.mem_offset.hint)
7648 fprintf (stderr, " Using hint for spill/fill\n");
7649 /* The index isn't actually used, just set it to something
7650 approximating the bit index. */
7651 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7652 specs[count].mem_offset.hint = 1;
7653 specs[count].mem_offset.offset = md.mem_offset.offset;
7654 specs[count++].mem_offset.base = md.mem_offset.base;
7658 specs[count++].specific = 0;
7666 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7668 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7669 if ((regno >= 8 && regno <= 15)
7670 || (regno >= 20 && regno <= 23)
7671 || (regno >= 31 && regno <= 39)
7672 || (regno >= 41 && regno <= 47)
7673 || (regno >= 67 && regno <= 111))
7675 specs[count] = tmpl;
7676 specs[count++].index = regno;
7689 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7691 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7692 if ((regno >= 48 && regno <= 63)
7693 || (regno >= 112 && regno <= 127))
7695 specs[count] = tmpl;
7696 specs[count++].index = regno;
7702 for (i = 48; i < 64; i++)
7704 specs[count] = tmpl;
7705 specs[count++].index = i;
7707 for (i = 112; i < 128; i++)
7709 specs[count] = tmpl;
7710 specs[count++].index = i;
7728 for (i = 0; i < idesc->num_outputs; i++)
7729 if (idesc->operands[i] == IA64_OPND_B1
7730 || idesc->operands[i] == IA64_OPND_B2)
7732 specs[count] = tmpl;
7733 specs[count++].index =
7734 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7739 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7740 if (idesc->operands[i] == IA64_OPND_B1
7741 || idesc->operands[i] == IA64_OPND_B2)
7743 specs[count] = tmpl;
7744 specs[count++].index =
7745 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7751 case IA64_RS_CPUID: /* four or more registers */
7754 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7756 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7757 if (regno >= 0 && regno < NELEMS (gr_values)
7760 specs[count] = tmpl;
7761 specs[count++].index = gr_values[regno].value & 0xFF;
7765 specs[count] = tmpl;
7766 specs[count++].specific = 0;
7776 case IA64_RS_DBR: /* four or more registers */
7779 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7781 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7782 if (regno >= 0 && regno < NELEMS (gr_values)
7785 specs[count] = tmpl;
7786 specs[count++].index = gr_values[regno].value & 0xFF;
7790 specs[count] = tmpl;
7791 specs[count++].specific = 0;
7795 else if (note == 0 && !rsrc_write)
7797 specs[count] = tmpl;
7798 specs[count++].specific = 0;
7806 case IA64_RS_IBR: /* four or more registers */
7809 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7811 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7812 if (regno >= 0 && regno < NELEMS (gr_values)
7815 specs[count] = tmpl;
7816 specs[count++].index = gr_values[regno].value & 0xFF;
7820 specs[count] = tmpl;
7821 specs[count++].specific = 0;
7834 /* These are implementation specific. Force all references to
7835 conflict with all other references. */
7836 specs[count] = tmpl;
7837 specs[count++].specific = 0;
7845 case IA64_RS_PKR: /* 16 or more registers */
7846 if (note == 3 || note == 4)
7848 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7850 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7851 if (regno >= 0 && regno < NELEMS (gr_values)
7856 specs[count] = tmpl;
7857 specs[count++].index = gr_values[regno].value & 0xFF;
7860 for (i = 0; i < NELEMS (gr_values); i++)
7862 /* Uses all registers *except* the one in R3. */
7863 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7865 specs[count] = tmpl;
7866 specs[count++].index = i;
7872 specs[count] = tmpl;
7873 specs[count++].specific = 0;
7880 specs[count] = tmpl;
7881 specs[count++].specific = 0;
7885 case IA64_RS_PMC: /* four or more registers */
7888 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7889 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7892 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7894 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7895 if (regno >= 0 && regno < NELEMS (gr_values)
7898 specs[count] = tmpl;
7899 specs[count++].index = gr_values[regno].value & 0xFF;
7903 specs[count] = tmpl;
7904 specs[count++].specific = 0;
7914 case IA64_RS_PMD: /* four or more registers */
7917 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7919 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7920 if (regno >= 0 && regno < NELEMS (gr_values)
7923 specs[count] = tmpl;
7924 specs[count++].index = gr_values[regno].value & 0xFF;
7928 specs[count] = tmpl;
7929 specs[count++].specific = 0;
7939 case IA64_RS_RR: /* eight registers */
7942 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7944 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7945 if (regno >= 0 && regno < NELEMS (gr_values)
7948 specs[count] = tmpl;
7949 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7953 specs[count] = tmpl;
7954 specs[count++].specific = 0;
7958 else if (note == 0 && !rsrc_write)
7960 specs[count] = tmpl;
7961 specs[count++].specific = 0;
7969 case IA64_RS_CR_IRR:
7972 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7973 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7975 && idesc->operands[1] == IA64_OPND_CR3
7978 for (i = 0; i < 4; i++)
7980 specs[count] = tmpl;
7981 specs[count++].index = CR_IRR0 + i;
7987 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7988 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7990 && regno <= CR_IRR3)
7992 specs[count] = tmpl;
7993 specs[count++].index = regno;
8002 case IA64_RS_CR_LRR:
8009 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8010 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8011 && (regno == CR_LRR0 || regno == CR_LRR1))
8013 specs[count] = tmpl;
8014 specs[count++].index = regno;
8022 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8024 specs[count] = tmpl;
8025 specs[count++].index =
8026 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8041 else if (rsrc_write)
8043 if (dep->specifier == IA64_RS_FRb
8044 && idesc->operands[0] == IA64_OPND_F1)
8046 specs[count] = tmpl;
8047 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8052 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8054 if (idesc->operands[i] == IA64_OPND_F2
8055 || idesc->operands[i] == IA64_OPND_F3
8056 || idesc->operands[i] == IA64_OPND_F4)
8058 specs[count] = tmpl;
8059 specs[count++].index =
8060 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8069 /* This reference applies only to the GR whose value is loaded with
8070 data returned from memory. */
8071 specs[count] = tmpl;
8072 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8078 for (i = 0; i < idesc->num_outputs; i++)
8079 if (idesc->operands[i] == IA64_OPND_R1
8080 || idesc->operands[i] == IA64_OPND_R2
8081 || idesc->operands[i] == IA64_OPND_R3)
8083 specs[count] = tmpl;
8084 specs[count++].index =
8085 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8087 if (idesc->flags & IA64_OPCODE_POSTINC)
8088 for (i = 0; i < NELEMS (idesc->operands); i++)
8089 if (idesc->operands[i] == IA64_OPND_MR3)
8091 specs[count] = tmpl;
8092 specs[count++].index =
8093 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8098 /* Look for anything that reads a GR. */
8099 for (i = 0; i < NELEMS (idesc->operands); i++)
8101 if (idesc->operands[i] == IA64_OPND_MR3
8102 || idesc->operands[i] == IA64_OPND_CPUID_R3
8103 || idesc->operands[i] == IA64_OPND_DBR_R3
8104 || idesc->operands[i] == IA64_OPND_IBR_R3
8105 || idesc->operands[i] == IA64_OPND_MSR_R3
8106 || idesc->operands[i] == IA64_OPND_PKR_R3
8107 || idesc->operands[i] == IA64_OPND_PMC_R3
8108 || idesc->operands[i] == IA64_OPND_PMD_R3
8109 || idesc->operands[i] == IA64_OPND_RR_R3
8110 || ((i >= idesc->num_outputs)
8111 && (idesc->operands[i] == IA64_OPND_R1
8112 || idesc->operands[i] == IA64_OPND_R2
8113 || idesc->operands[i] == IA64_OPND_R3
8114 /* addl source register. */
8115 || idesc->operands[i] == IA64_OPND_R3_2)))
8117 specs[count] = tmpl;
8118 specs[count++].index =
8119 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8130 /* This is the same as IA64_RS_PRr, except that the register range is
8131 from 1 - 15, and there are no rotating register reads/writes here. */
8135 for (i = 1; i < 16; i++)
8137 specs[count] = tmpl;
8138 specs[count++].index = i;
8144 /* Mark only those registers indicated by the mask. */
8147 mask = CURR_SLOT.opnd[2].X_add_number;
8148 for (i = 1; i < 16; i++)
8149 if (mask & ((valueT) 1 << i))
8151 specs[count] = tmpl;
8152 specs[count++].index = i;
8160 else if (note == 11) /* note 11 implies note 1 as well */
8164 for (i = 0; i < idesc->num_outputs; i++)
8166 if (idesc->operands[i] == IA64_OPND_P1
8167 || idesc->operands[i] == IA64_OPND_P2)
8169 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8170 if (regno >= 1 && regno < 16)
8172 specs[count] = tmpl;
8173 specs[count++].index = regno;
8183 else if (note == 12)
8185 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8187 specs[count] = tmpl;
8188 specs[count++].index = CURR_SLOT.qp_regno;
8195 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8196 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8197 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8198 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8200 if ((idesc->operands[0] == IA64_OPND_P1
8201 || idesc->operands[0] == IA64_OPND_P2)
8202 && p1 >= 1 && p1 < 16)
8204 specs[count] = tmpl;
8205 specs[count].cmp_type =
8206 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8207 specs[count++].index = p1;
8209 if ((idesc->operands[1] == IA64_OPND_P1
8210 || idesc->operands[1] == IA64_OPND_P2)
8211 && p2 >= 1 && p2 < 16)
8213 specs[count] = tmpl;
8214 specs[count].cmp_type =
8215 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8216 specs[count++].index = p2;
8221 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8223 specs[count] = tmpl;
8224 specs[count++].index = CURR_SLOT.qp_regno;
8226 if (idesc->operands[1] == IA64_OPND_PR)
8228 for (i = 1; i < 16; i++)
8230 specs[count] = tmpl;
8231 specs[count++].index = i;
8242 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8243 simplified cases of this. */
8247 for (i = 16; i < 63; i++)
8249 specs[count] = tmpl;
8250 specs[count++].index = i;
8256 /* Mark only those registers indicated by the mask. */
8258 && idesc->operands[0] == IA64_OPND_PR)
8260 mask = CURR_SLOT.opnd[2].X_add_number;
8261 if (mask & ((valueT) 1 << 16))
8262 for (i = 16; i < 63; i++)
8264 specs[count] = tmpl;
8265 specs[count++].index = i;
8269 && idesc->operands[0] == IA64_OPND_PR_ROT)
8271 for (i = 16; i < 63; i++)
8273 specs[count] = tmpl;
8274 specs[count++].index = i;
8282 else if (note == 11) /* note 11 implies note 1 as well */
8286 for (i = 0; i < idesc->num_outputs; i++)
8288 if (idesc->operands[i] == IA64_OPND_P1
8289 || idesc->operands[i] == IA64_OPND_P2)
8291 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8292 if (regno >= 16 && regno < 63)
8294 specs[count] = tmpl;
8295 specs[count++].index = regno;
8305 else if (note == 12)
8307 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8309 specs[count] = tmpl;
8310 specs[count++].index = CURR_SLOT.qp_regno;
8317 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8318 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8319 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8320 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8322 if ((idesc->operands[0] == IA64_OPND_P1
8323 || idesc->operands[0] == IA64_OPND_P2)
8324 && p1 >= 16 && p1 < 63)
8326 specs[count] = tmpl;
8327 specs[count].cmp_type =
8328 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8329 specs[count++].index = p1;
8331 if ((idesc->operands[1] == IA64_OPND_P1
8332 || idesc->operands[1] == IA64_OPND_P2)
8333 && p2 >= 16 && p2 < 63)
8335 specs[count] = tmpl;
8336 specs[count].cmp_type =
8337 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8338 specs[count++].index = p2;
8343 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8345 specs[count] = tmpl;
8346 specs[count++].index = CURR_SLOT.qp_regno;
8348 if (idesc->operands[1] == IA64_OPND_PR)
8350 for (i = 16; i < 63; i++)
8352 specs[count] = tmpl;
8353 specs[count++].index = i;
8365 /* Verify that the instruction is using the PSR bit indicated in
8369 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8371 if (dep->regindex < 6)
8373 specs[count++] = tmpl;
8376 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8378 if (dep->regindex < 32
8379 || dep->regindex == 35
8380 || dep->regindex == 36
8381 || (!rsrc_write && dep->regindex == PSR_CPL))
8383 specs[count++] = tmpl;
8386 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8388 if (dep->regindex < 32
8389 || dep->regindex == 35
8390 || dep->regindex == 36
8391 || (rsrc_write && dep->regindex == PSR_CPL))
8393 specs[count++] = tmpl;
8398 /* Several PSR bits have very specific dependencies. */
8399 switch (dep->regindex)
8402 specs[count++] = tmpl;
8407 specs[count++] = tmpl;
8411 /* Only certain CR accesses use PSR.ic */
8412 if (idesc->operands[0] == IA64_OPND_CR3
8413 || idesc->operands[1] == IA64_OPND_CR3)
8416 ((idesc->operands[0] == IA64_OPND_CR3)
8419 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8434 specs[count++] = tmpl;
8443 specs[count++] = tmpl;
8447 /* Only some AR accesses use cpl */
8448 if (idesc->operands[0] == IA64_OPND_AR3
8449 || idesc->operands[1] == IA64_OPND_AR3)
8452 ((idesc->operands[0] == IA64_OPND_AR3)
8455 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8462 && regno <= AR_K7))))
8464 specs[count++] = tmpl;
8469 specs[count++] = tmpl;
8479 if (idesc->operands[0] == IA64_OPND_IMMU24)
8481 mask = CURR_SLOT.opnd[0].X_add_number;
8487 if (mask & ((valueT) 1 << dep->regindex))
8489 specs[count++] = tmpl;
8494 int min = dep->regindex == PSR_DFL ? 2 : 32;
8495 int max = dep->regindex == PSR_DFL ? 31 : 127;
8496 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8497 for (i = 0; i < NELEMS (idesc->operands); i++)
8499 if (idesc->operands[i] == IA64_OPND_F1
8500 || idesc->operands[i] == IA64_OPND_F2
8501 || idesc->operands[i] == IA64_OPND_F3
8502 || idesc->operands[i] == IA64_OPND_F4)
8504 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8505 if (reg >= min && reg <= max)
8507 specs[count++] = tmpl;
8514 int min = dep->regindex == PSR_MFL ? 2 : 32;
8515 int max = dep->regindex == PSR_MFL ? 31 : 127;
8516 /* mfh is read on writes to FR32-127; mfl is read on writes to
8518 for (i = 0; i < idesc->num_outputs; i++)
8520 if (idesc->operands[i] == IA64_OPND_F1)
8522 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8523 if (reg >= min && reg <= max)
8525 specs[count++] = tmpl;
8530 else if (note == 10)
8532 for (i = 0; i < NELEMS (idesc->operands); i++)
8534 if (idesc->operands[i] == IA64_OPND_R1
8535 || idesc->operands[i] == IA64_OPND_R2
8536 || idesc->operands[i] == IA64_OPND_R3)
8538 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8539 if (regno >= 16 && regno <= 31)
8541 specs[count++] = tmpl;
8552 case IA64_RS_AR_FPSR:
8553 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8555 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8556 if (regno == AR_FPSR)
8558 specs[count++] = tmpl;
8563 specs[count++] = tmpl;
8568 /* Handle all AR[REG] resources */
8569 if (note == 0 || note == 1)
8571 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8572 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8573 && regno == dep->regindex)
8575 specs[count++] = tmpl;
8577 /* other AR[REG] resources may be affected by AR accesses */
8578 else if (idesc->operands[0] == IA64_OPND_AR3)
8581 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8582 switch (dep->regindex)
8588 if (regno == AR_BSPSTORE)
8590 specs[count++] = tmpl;
8594 (regno == AR_BSPSTORE
8595 || regno == AR_RNAT))
8597 specs[count++] = tmpl;
8602 else if (idesc->operands[1] == IA64_OPND_AR3)
8605 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8606 switch (dep->regindex)
8611 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8613 specs[count++] = tmpl;
8620 specs[count++] = tmpl;
8630 /* Handle all CR[REG] resources */
8631 if (note == 0 || note == 1)
8633 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8635 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8636 if (regno == dep->regindex)
8638 specs[count++] = tmpl;
8640 else if (!rsrc_write)
8642 /* Reads from CR[IVR] affect other resources. */
8643 if (regno == CR_IVR)
8645 if ((dep->regindex >= CR_IRR0
8646 && dep->regindex <= CR_IRR3)
8647 || dep->regindex == CR_TPR)
8649 specs[count++] = tmpl;
8656 specs[count++] = tmpl;
8665 case IA64_RS_INSERVICE:
8666 /* look for write of EOI (67) or read of IVR (65) */
8667 if ((idesc->operands[0] == IA64_OPND_CR3
8668 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8669 || (idesc->operands[1] == IA64_OPND_CR3
8670 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8672 specs[count++] = tmpl;
8679 specs[count++] = tmpl;
8690 specs[count++] = tmpl;
8694 /* Check if any of the registers accessed are in the rotating region.
8695 mov to/from pr accesses CFM only when qp_regno is in the rotating
8697 for (i = 0; i < NELEMS (idesc->operands); i++)
8699 if (idesc->operands[i] == IA64_OPND_R1
8700 || idesc->operands[i] == IA64_OPND_R2
8701 || idesc->operands[i] == IA64_OPND_R3)
8703 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8704 /* Assumes that md.rot.num_regs is always valid */
8705 if (md.rot.num_regs > 0
8707 && num < 31 + md.rot.num_regs)
8709 specs[count] = tmpl;
8710 specs[count++].specific = 0;
8713 else if (idesc->operands[i] == IA64_OPND_F1
8714 || idesc->operands[i] == IA64_OPND_F2
8715 || idesc->operands[i] == IA64_OPND_F3
8716 || idesc->operands[i] == IA64_OPND_F4)
8718 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8721 specs[count] = tmpl;
8722 specs[count++].specific = 0;
8725 else if (idesc->operands[i] == IA64_OPND_P1
8726 || idesc->operands[i] == IA64_OPND_P2)
8728 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8731 specs[count] = tmpl;
8732 specs[count++].specific = 0;
8736 if (CURR_SLOT.qp_regno > 15)
8738 specs[count] = tmpl;
8739 specs[count++].specific = 0;
8744 /* This is the same as IA64_RS_PRr, except simplified to account for
8745 the fact that there is only one register. */
8749 specs[count++] = tmpl;
8754 if (idesc->operands[2] == IA64_OPND_IMM17)
8755 mask = CURR_SLOT.opnd[2].X_add_number;
8756 if (mask & ((valueT) 1 << 63))
8757 specs[count++] = tmpl;
8759 else if (note == 11)
8761 if ((idesc->operands[0] == IA64_OPND_P1
8762 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8763 || (idesc->operands[1] == IA64_OPND_P2
8764 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8766 specs[count++] = tmpl;
8769 else if (note == 12)
8771 if (CURR_SLOT.qp_regno == 63)
8773 specs[count++] = tmpl;
8780 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8781 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8782 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8783 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8786 && (idesc->operands[0] == IA64_OPND_P1
8787 || idesc->operands[0] == IA64_OPND_P2))
8789 specs[count] = tmpl;
8790 specs[count++].cmp_type =
8791 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8794 && (idesc->operands[1] == IA64_OPND_P1
8795 || idesc->operands[1] == IA64_OPND_P2))
8797 specs[count] = tmpl;
8798 specs[count++].cmp_type =
8799 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8804 if (CURR_SLOT.qp_regno == 63)
8806 specs[count++] = tmpl;
8817 /* FIXME we can identify some individual RSE written resources, but RSE
8818 read resources have not yet been completely identified, so for now
8819 treat RSE as a single resource */
8820 if (strncmp (idesc->name, "mov", 3) == 0)
8824 if (idesc->operands[0] == IA64_OPND_AR3
8825 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8827 specs[count] = tmpl;
8828 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8833 if (idesc->operands[0] == IA64_OPND_AR3)
8835 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8836 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8838 specs[count++] = tmpl;
8841 else if (idesc->operands[1] == IA64_OPND_AR3)
8843 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8844 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8845 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8847 specs[count++] = tmpl;
8854 specs[count++] = tmpl;
8859 /* FIXME -- do any of these need to be non-specific? */
8860 specs[count++] = tmpl;
8864 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8871 /* Clear branch flags on marked resources. This breaks the link between the
8872 QP of the marking instruction and a subsequent branch on the same QP. */
8875 clear_qp_branch_flag (mask)
8879 for (i = 0; i < regdepslen; i++)
8881 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8882 if ((bit & mask) != 0)
8884 regdeps[i].link_to_qp_branch = 0;
8889 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8890 any mutexes which contain one of the PRs and create new ones when
8894 update_qp_mutex (valueT mask)
8900 while (i < qp_mutexeslen)
8902 if ((qp_mutexes[i].prmask & mask) != 0)
8904 /* If it destroys and creates the same mutex, do nothing. */
8905 if (qp_mutexes[i].prmask == mask
8906 && qp_mutexes[i].path == md.path)
8917 fprintf (stderr, " Clearing mutex relation");
8918 print_prmask (qp_mutexes[i].prmask);
8919 fprintf (stderr, "\n");
8922 /* Deal with the old mutex with more than 3+ PRs only if
8923 the new mutex on the same execution path with it.
8925 FIXME: The 3+ mutex support is incomplete.
8926 dot_pred_rel () may be a better place to fix it. */
8927 if (qp_mutexes[i].path == md.path)
8929 /* If it is a proper subset of the mutex, create a
8932 && (qp_mutexes[i].prmask & mask) == mask)
8935 qp_mutexes[i].prmask &= ~mask;
8936 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8938 /* Modify the mutex if there are more than one
8946 /* Remove the mutex. */
8947 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8955 add_qp_mutex (mask);
8960 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8962 Any changes to a PR clears the mutex relations which include that PR. */
8965 clear_qp_mutex (mask)
8971 while (i < qp_mutexeslen)
8973 if ((qp_mutexes[i].prmask & mask) != 0)
8977 fprintf (stderr, " Clearing mutex relation");
8978 print_prmask (qp_mutexes[i].prmask);
8979 fprintf (stderr, "\n");
8981 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8988 /* Clear implies relations which contain PRs in the given masks.
8989 P1_MASK indicates the source of the implies relation, while P2_MASK
8990 indicates the implied PR. */
8993 clear_qp_implies (p1_mask, p2_mask)
9000 while (i < qp_implieslen)
9002 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9003 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9006 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9007 qp_implies[i].p1, qp_implies[i].p2);
9008 qp_implies[i] = qp_implies[--qp_implieslen];
9015 /* Add the PRs specified to the list of implied relations. */
9018 add_qp_imply (p1, p2)
9025 /* p0 is not meaningful here. */
9026 if (p1 == 0 || p2 == 0)
9032 /* If it exists already, ignore it. */
9033 for (i = 0; i < qp_implieslen; i++)
9035 if (qp_implies[i].p1 == p1
9036 && qp_implies[i].p2 == p2
9037 && qp_implies[i].path == md.path
9038 && !qp_implies[i].p2_branched)
9042 if (qp_implieslen == qp_impliestotlen)
9044 qp_impliestotlen += 20;
9045 qp_implies = (struct qp_imply *)
9046 xrealloc ((void *) qp_implies,
9047 qp_impliestotlen * sizeof (struct qp_imply));
9050 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9051 qp_implies[qp_implieslen].p1 = p1;
9052 qp_implies[qp_implieslen].p2 = p2;
9053 qp_implies[qp_implieslen].path = md.path;
9054 qp_implies[qp_implieslen++].p2_branched = 0;
9056 /* Add in the implied transitive relations; for everything that p2 implies,
9057 make p1 imply that, too; for everything that implies p1, make it imply p2
9059 for (i = 0; i < qp_implieslen; i++)
9061 if (qp_implies[i].p1 == p2)
9062 add_qp_imply (p1, qp_implies[i].p2);
9063 if (qp_implies[i].p2 == p1)
9064 add_qp_imply (qp_implies[i].p1, p2);
9066 /* Add in mutex relations implied by this implies relation; for each mutex
9067 relation containing p2, duplicate it and replace p2 with p1. */
9068 bit = (valueT) 1 << p1;
9069 mask = (valueT) 1 << p2;
9070 for (i = 0; i < qp_mutexeslen; i++)
9072 if (qp_mutexes[i].prmask & mask)
9073 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9077 /* Add the PRs specified in the mask to the mutex list; this means that only
9078 one of the PRs can be true at any time. PR0 should never be included in
9088 if (qp_mutexeslen == qp_mutexestotlen)
9090 qp_mutexestotlen += 20;
9091 qp_mutexes = (struct qpmutex *)
9092 xrealloc ((void *) qp_mutexes,
9093 qp_mutexestotlen * sizeof (struct qpmutex));
9097 fprintf (stderr, " Registering mutex on");
9098 print_prmask (mask);
9099 fprintf (stderr, "\n");
9101 qp_mutexes[qp_mutexeslen].path = md.path;
9102 qp_mutexes[qp_mutexeslen++].prmask = mask;
9106 has_suffix_p (name, suffix)
9110 size_t namelen = strlen (name);
9111 size_t sufflen = strlen (suffix);
9113 if (namelen <= sufflen)
9115 return strcmp (name + namelen - sufflen, suffix) == 0;
9119 clear_register_values ()
9123 fprintf (stderr, " Clearing register values\n");
9124 for (i = 1; i < NELEMS (gr_values); i++)
9125 gr_values[i].known = 0;
9128 /* Keep track of register values/changes which affect DV tracking.
9130 optimization note: should add a flag to classes of insns where otherwise we
9131 have to examine a group of strings to identify them. */
9134 note_register_values (idesc)
9135 struct ia64_opcode *idesc;
9137 valueT qp_changemask = 0;
9140 /* Invalidate values for registers being written to. */
9141 for (i = 0; i < idesc->num_outputs; i++)
9143 if (idesc->operands[i] == IA64_OPND_R1
9144 || idesc->operands[i] == IA64_OPND_R2
9145 || idesc->operands[i] == IA64_OPND_R3)
9147 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9148 if (regno > 0 && regno < NELEMS (gr_values))
9149 gr_values[regno].known = 0;
9151 else if (idesc->operands[i] == IA64_OPND_R3_2)
9153 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9154 if (regno > 0 && regno < 4)
9155 gr_values[regno].known = 0;
9157 else if (idesc->operands[i] == IA64_OPND_P1
9158 || idesc->operands[i] == IA64_OPND_P2)
9160 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9161 qp_changemask |= (valueT) 1 << regno;
9163 else if (idesc->operands[i] == IA64_OPND_PR)
9165 if (idesc->operands[2] & (valueT) 0x10000)
9166 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9168 qp_changemask = idesc->operands[2];
9171 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9173 if (idesc->operands[1] & ((valueT) 1 << 43))
9174 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9176 qp_changemask = idesc->operands[1];
9177 qp_changemask &= ~(valueT) 0xFFFF;
9182 /* Always clear qp branch flags on any PR change. */
9183 /* FIXME there may be exceptions for certain compares. */
9184 clear_qp_branch_flag (qp_changemask);
9186 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9187 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9189 qp_changemask |= ~(valueT) 0xFFFF;
9190 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9192 for (i = 32; i < 32 + md.rot.num_regs; i++)
9193 gr_values[i].known = 0;
9195 clear_qp_mutex (qp_changemask);
9196 clear_qp_implies (qp_changemask, qp_changemask);
9198 /* After a call, all register values are undefined, except those marked
9200 else if (strncmp (idesc->name, "br.call", 6) == 0
9201 || strncmp (idesc->name, "brl.call", 7) == 0)
9203 /* FIXME keep GR values which are marked as "safe_across_calls" */
9204 clear_register_values ();
9205 clear_qp_mutex (~qp_safe_across_calls);
9206 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9207 clear_qp_branch_flag (~qp_safe_across_calls);
9209 else if (is_interruption_or_rfi (idesc)
9210 || is_taken_branch (idesc))
9212 clear_register_values ();
9213 clear_qp_mutex (~(valueT) 0);
9214 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9216 /* Look for mutex and implies relations. */
9217 else if ((idesc->operands[0] == IA64_OPND_P1
9218 || idesc->operands[0] == IA64_OPND_P2)
9219 && (idesc->operands[1] == IA64_OPND_P1
9220 || idesc->operands[1] == IA64_OPND_P2))
9222 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9223 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9224 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9225 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9227 /* If both PRs are PR0, we can't really do anything. */
9228 if (p1 == 0 && p2 == 0)
9231 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9233 /* In general, clear mutexes and implies which include P1 or P2,
9234 with the following exceptions. */
9235 else if (has_suffix_p (idesc->name, ".or.andcm")
9236 || has_suffix_p (idesc->name, ".and.orcm"))
9238 clear_qp_implies (p2mask, p1mask);
9240 else if (has_suffix_p (idesc->name, ".andcm")
9241 || has_suffix_p (idesc->name, ".and"))
9243 clear_qp_implies (0, p1mask | p2mask);
9245 else if (has_suffix_p (idesc->name, ".orcm")
9246 || has_suffix_p (idesc->name, ".or"))
9248 clear_qp_mutex (p1mask | p2mask);
9249 clear_qp_implies (p1mask | p2mask, 0);
9255 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9257 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9258 if (p1 == 0 || p2 == 0)
9259 clear_qp_mutex (p1mask | p2mask);
9261 added = update_qp_mutex (p1mask | p2mask);
9263 if (CURR_SLOT.qp_regno == 0
9264 || has_suffix_p (idesc->name, ".unc"))
9266 if (added == 0 && p1 && p2)
9267 add_qp_mutex (p1mask | p2mask);
9268 if (CURR_SLOT.qp_regno != 0)
9271 add_qp_imply (p1, CURR_SLOT.qp_regno);
9273 add_qp_imply (p2, CURR_SLOT.qp_regno);
9278 /* Look for mov imm insns into GRs. */
9279 else if (idesc->operands[0] == IA64_OPND_R1
9280 && (idesc->operands[1] == IA64_OPND_IMM22
9281 || idesc->operands[1] == IA64_OPND_IMMU64)
9282 && (strcmp (idesc->name, "mov") == 0
9283 || strcmp (idesc->name, "movl") == 0))
9285 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9286 if (regno > 0 && regno < NELEMS (gr_values))
9288 gr_values[regno].known = 1;
9289 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9290 gr_values[regno].path = md.path;
9293 fprintf (stderr, " Know gr%d = ", regno);
9294 fprintf_vma (stderr, gr_values[regno].value);
9295 fputs ("\n", stderr);
9301 clear_qp_mutex (qp_changemask);
9302 clear_qp_implies (qp_changemask, qp_changemask);
9306 /* Return whether the given predicate registers are currently mutex. */
9309 qp_mutex (p1, p2, path)
9319 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9320 for (i = 0; i < qp_mutexeslen; i++)
9322 if (qp_mutexes[i].path >= path
9323 && (qp_mutexes[i].prmask & mask) == mask)
9330 /* Return whether the given resource is in the given insn's list of chks
9331 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9335 resources_match (rs, idesc, note, qp_regno, path)
9337 struct ia64_opcode *idesc;
9342 struct rsrc specs[MAX_SPECS];
9345 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9346 we don't need to check. One exception is note 11, which indicates that
9347 target predicates are written regardless of PR[qp]. */
9348 if (qp_mutex (rs->qp_regno, qp_regno, path)
9352 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9355 /* UNAT checking is a bit more specific than other resources */
9356 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9357 && specs[count].mem_offset.hint
9358 && rs->mem_offset.hint)
9360 if (rs->mem_offset.base == specs[count].mem_offset.base)
9362 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9363 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9370 /* Skip apparent PR write conflicts where both writes are an AND or both
9371 writes are an OR. */
9372 if (rs->dependency->specifier == IA64_RS_PR
9373 || rs->dependency->specifier == IA64_RS_PRr
9374 || rs->dependency->specifier == IA64_RS_PR63)
9376 if (specs[count].cmp_type != CMP_NONE
9377 && specs[count].cmp_type == rs->cmp_type)
9380 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9381 dv_mode[rs->dependency->mode],
9382 rs->dependency->specifier != IA64_RS_PR63 ?
9383 specs[count].index : 63);
9388 " %s on parallel compare conflict %s vs %s on PR%d\n",
9389 dv_mode[rs->dependency->mode],
9390 dv_cmp_type[rs->cmp_type],
9391 dv_cmp_type[specs[count].cmp_type],
9392 rs->dependency->specifier != IA64_RS_PR63 ?
9393 specs[count].index : 63);
9397 /* If either resource is not specific, conservatively assume a conflict
9399 if (!specs[count].specific || !rs->specific)
9401 else if (specs[count].index == rs->index)
9406 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9412 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9413 insert a stop to create the break. Update all resource dependencies
9414 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9415 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9416 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9420 insn_group_break (insert_stop, qp_regno, save_current)
9427 if (insert_stop && md.num_slots_in_use > 0)
9428 PREV_SLOT.end_of_insn_group = 1;
9432 fprintf (stderr, " Insn group break%s",
9433 (insert_stop ? " (w/stop)" : ""));
9435 fprintf (stderr, " effective for QP=%d", qp_regno);
9436 fprintf (stderr, "\n");
9440 while (i < regdepslen)
9442 const struct ia64_dependency *dep = regdeps[i].dependency;
9445 && regdeps[i].qp_regno != qp_regno)
9452 && CURR_SLOT.src_file == regdeps[i].file
9453 && CURR_SLOT.src_line == regdeps[i].line)
9459 /* clear dependencies which are automatically cleared by a stop, or
9460 those that have reached the appropriate state of insn serialization */
9461 if (dep->semantics == IA64_DVS_IMPLIED
9462 || dep->semantics == IA64_DVS_IMPLIEDF
9463 || regdeps[i].insn_srlz == STATE_SRLZ)
9465 print_dependency ("Removing", i);
9466 regdeps[i] = regdeps[--regdepslen];
9470 if (dep->semantics == IA64_DVS_DATA
9471 || dep->semantics == IA64_DVS_INSTR
9472 || dep->semantics == IA64_DVS_SPECIFIC)
9474 if (regdeps[i].insn_srlz == STATE_NONE)
9475 regdeps[i].insn_srlz = STATE_STOP;
9476 if (regdeps[i].data_srlz == STATE_NONE)
9477 regdeps[i].data_srlz = STATE_STOP;
9484 /* Add the given resource usage spec to the list of active dependencies. */
9487 mark_resource (idesc, dep, spec, depind, path)
9488 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9489 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9494 if (regdepslen == regdepstotlen)
9496 regdepstotlen += 20;
9497 regdeps = (struct rsrc *)
9498 xrealloc ((void *) regdeps,
9499 regdepstotlen * sizeof (struct rsrc));
9502 regdeps[regdepslen] = *spec;
9503 regdeps[regdepslen].depind = depind;
9504 regdeps[regdepslen].path = path;
9505 regdeps[regdepslen].file = CURR_SLOT.src_file;
9506 regdeps[regdepslen].line = CURR_SLOT.src_line;
9508 print_dependency ("Adding", regdepslen);
9514 print_dependency (action, depind)
9520 fprintf (stderr, " %s %s '%s'",
9521 action, dv_mode[(regdeps[depind].dependency)->mode],
9522 (regdeps[depind].dependency)->name);
9523 if (regdeps[depind].specific && regdeps[depind].index != 0)
9524 fprintf (stderr, " (%d)", regdeps[depind].index);
9525 if (regdeps[depind].mem_offset.hint)
9527 fputs (" ", stderr);
9528 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9529 fputs ("+", stderr);
9530 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9532 fprintf (stderr, "\n");
9537 instruction_serialization ()
9541 fprintf (stderr, " Instruction serialization\n");
9542 for (i = 0; i < regdepslen; i++)
9543 if (regdeps[i].insn_srlz == STATE_STOP)
9544 regdeps[i].insn_srlz = STATE_SRLZ;
9548 data_serialization ()
9552 fprintf (stderr, " Data serialization\n");
9553 while (i < regdepslen)
9555 if (regdeps[i].data_srlz == STATE_STOP
9556 /* Note: as of 991210, all "other" dependencies are cleared by a
9557 data serialization. This might change with new tables */
9558 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9560 print_dependency ("Removing", i);
9561 regdeps[i] = regdeps[--regdepslen];
9568 /* Insert stops and serializations as needed to avoid DVs. */
9571 remove_marked_resource (rs)
9574 switch (rs->dependency->semantics)
9576 case IA64_DVS_SPECIFIC:
9578 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9579 /* ...fall through... */
9580 case IA64_DVS_INSTR:
9582 fprintf (stderr, "Inserting instr serialization\n");
9583 if (rs->insn_srlz < STATE_STOP)
9584 insn_group_break (1, 0, 0);
9585 if (rs->insn_srlz < STATE_SRLZ)
9587 struct slot oldslot = CURR_SLOT;
9588 /* Manually jam a srlz.i insn into the stream */
9589 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9590 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9591 instruction_serialization ();
9592 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9593 if (++md.num_slots_in_use >= NUM_SLOTS)
9595 CURR_SLOT = oldslot;
9597 insn_group_break (1, 0, 0);
9599 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9600 "other" types of DV are eliminated
9601 by a data serialization */
9604 fprintf (stderr, "Inserting data serialization\n");
9605 if (rs->data_srlz < STATE_STOP)
9606 insn_group_break (1, 0, 0);
9608 struct slot oldslot = CURR_SLOT;
9609 /* Manually jam a srlz.d insn into the stream */
9610 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
9611 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9612 data_serialization ();
9613 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9614 if (++md.num_slots_in_use >= NUM_SLOTS)
9616 CURR_SLOT = oldslot;
9619 case IA64_DVS_IMPLIED:
9620 case IA64_DVS_IMPLIEDF:
9622 fprintf (stderr, "Inserting stop\n");
9623 insn_group_break (1, 0, 0);
9630 /* Check the resources used by the given opcode against the current dependency
9633 The check is run once for each execution path encountered. In this case,
9634 a unique execution path is the sequence of instructions following a code
9635 entry point, e.g. the following has three execution paths, one starting
9636 at L0, one at L1, and one at L2.
9645 check_dependencies (idesc)
9646 struct ia64_opcode *idesc;
9648 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9652 /* Note that the number of marked resources may change within the
9653 loop if in auto mode. */
9655 while (i < regdepslen)
9657 struct rsrc *rs = ®deps[i];
9658 const struct ia64_dependency *dep = rs->dependency;
9663 if (dep->semantics == IA64_DVS_NONE
9664 || (chkind = depends_on (rs->depind, idesc)) == -1)
9670 note = NOTE (opdeps->chks[chkind]);
9672 /* Check this resource against each execution path seen thus far. */
9673 for (path = 0; path <= md.path; path++)
9677 /* If the dependency wasn't on the path being checked, ignore it. */
9678 if (rs->path < path)
9681 /* If the QP for this insn implies a QP which has branched, don't
9682 bother checking. Ed. NOTE: I don't think this check is terribly
9683 useful; what's the point of generating code which will only be
9684 reached if its QP is zero?
9685 This code was specifically inserted to handle the following code,
9686 based on notes from Intel's DV checking code, where p1 implies p2.
9692 if (CURR_SLOT.qp_regno != 0)
9696 for (implies = 0; implies < qp_implieslen; implies++)
9698 if (qp_implies[implies].path >= path
9699 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9700 && qp_implies[implies].p2_branched)
9710 if ((matchtype = resources_match (rs, idesc, note,
9711 CURR_SLOT.qp_regno, path)) != 0)
9714 char pathmsg[256] = "";
9715 char indexmsg[256] = "";
9716 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9719 sprintf (pathmsg, " when entry is at label '%s'",
9720 md.entry_labels[path - 1]);
9721 if (rs->specific && rs->index != 0)
9722 sprintf (indexmsg, ", specific resource number is %d",
9724 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9726 (certain ? "violates" : "may violate"),
9727 dv_mode[dep->mode], dep->name,
9728 dv_sem[dep->semantics],
9731 if (md.explicit_mode)
9733 as_warn ("%s", msg);
9735 as_warn (_("Only the first path encountering the conflict "
9737 as_warn_where (rs->file, rs->line,
9738 _("This is the location of the "
9739 "conflicting usage"));
9740 /* Don't bother checking other paths, to avoid duplicating
9747 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9749 remove_marked_resource (rs);
9751 /* since the set of dependencies has changed, start over */
9752 /* FIXME -- since we're removing dvs as we go, we
9753 probably don't really need to start over... */
9766 /* Register new dependencies based on the given opcode. */
9769 mark_resources (idesc)
9770 struct ia64_opcode *idesc;
9773 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9774 int add_only_qp_reads = 0;
9776 /* A conditional branch only uses its resources if it is taken; if it is
9777 taken, we stop following that path. The other branch types effectively
9778 *always* write their resources. If it's not taken, register only QP
9780 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9782 add_only_qp_reads = 1;
9786 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9788 for (i = 0; i < opdeps->nregs; i++)
9790 const struct ia64_dependency *dep;
9791 struct rsrc specs[MAX_SPECS];
9796 dep = ia64_find_dependency (opdeps->regs[i]);
9797 note = NOTE (opdeps->regs[i]);
9799 if (add_only_qp_reads
9800 && !(dep->mode == IA64_DV_WAR
9801 && (dep->specifier == IA64_RS_PR
9802 || dep->specifier == IA64_RS_PRr
9803 || dep->specifier == IA64_RS_PR63)))
9806 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9809 if (md.debug_dv && !count)
9810 fprintf (stderr, " No %s %s usage found (path %d)\n",
9811 dv_mode[dep->mode], dep->name, md.path);
9816 mark_resource (idesc, dep, &specs[count],
9817 DEP (opdeps->regs[i]), md.path);
9820 /* The execution path may affect register values, which may in turn
9821 affect which indirect-access resources are accessed. */
9822 switch (dep->specifier)
9834 for (path = 0; path < md.path; path++)
9836 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9838 mark_resource (idesc, dep, &specs[count],
9839 DEP (opdeps->regs[i]), path);
9846 /* Remove dependencies when they no longer apply. */
9849 update_dependencies (idesc)
9850 struct ia64_opcode *idesc;
9854 if (strcmp (idesc->name, "srlz.i") == 0)
9856 instruction_serialization ();
9858 else if (strcmp (idesc->name, "srlz.d") == 0)
9860 data_serialization ();
9862 else if (is_interruption_or_rfi (idesc)
9863 || is_taken_branch (idesc))
9865 /* Although technically the taken branch doesn't clear dependencies
9866 which require a srlz.[id], we don't follow the branch; the next
9867 instruction is assumed to start with a clean slate. */
9871 else if (is_conditional_branch (idesc)
9872 && CURR_SLOT.qp_regno != 0)
9874 int is_call = strstr (idesc->name, ".call") != NULL;
9876 for (i = 0; i < qp_implieslen; i++)
9878 /* If the conditional branch's predicate is implied by the predicate
9879 in an existing dependency, remove that dependency. */
9880 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9883 /* Note that this implied predicate takes a branch so that if
9884 a later insn generates a DV but its predicate implies this
9885 one, we can avoid the false DV warning. */
9886 qp_implies[i].p2_branched = 1;
9887 while (depind < regdepslen)
9889 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9891 print_dependency ("Removing", depind);
9892 regdeps[depind] = regdeps[--regdepslen];
9899 /* Any marked resources which have this same predicate should be
9900 cleared, provided that the QP hasn't been modified between the
9901 marking instruction and the branch. */
9904 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9909 while (i < regdepslen)
9911 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9912 && regdeps[i].link_to_qp_branch
9913 && (regdeps[i].file != CURR_SLOT.src_file
9914 || regdeps[i].line != CURR_SLOT.src_line))
9916 /* Treat like a taken branch */
9917 print_dependency ("Removing", i);
9918 regdeps[i] = regdeps[--regdepslen];
9927 /* Examine the current instruction for dependency violations. */
9931 struct ia64_opcode *idesc;
9935 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9936 idesc->name, CURR_SLOT.src_line,
9937 idesc->dependencies->nchks,
9938 idesc->dependencies->nregs);
9941 /* Look through the list of currently marked resources; if the current
9942 instruction has the dependency in its chks list which uses that resource,
9943 check against the specific resources used. */
9944 check_dependencies (idesc);
9946 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9947 then add them to the list of marked resources. */
9948 mark_resources (idesc);
9950 /* There are several types of dependency semantics, and each has its own
9951 requirements for being cleared
9953 Instruction serialization (insns separated by interruption, rfi, or
9954 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9956 Data serialization (instruction serialization, or writer + srlz.d +
9957 reader, where writer and srlz.d are in separate groups) clears
9958 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9959 always be the case).
9961 Instruction group break (groups separated by stop, taken branch,
9962 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9964 update_dependencies (idesc);
9966 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9967 warning. Keep track of as many as possible that are useful. */
9968 note_register_values (idesc);
9970 /* We don't need or want this anymore. */
9971 md.mem_offset.hint = 0;
9976 /* Translate one line of assembly. Pseudo ops and labels do not show
9982 char *saved_input_line_pointer, *mnemonic;
9983 const struct pseudo_opcode *pdesc;
9984 struct ia64_opcode *idesc;
9985 unsigned char qp_regno;
9989 saved_input_line_pointer = input_line_pointer;
9990 input_line_pointer = str;
9992 /* extract the opcode (mnemonic): */
9994 mnemonic = input_line_pointer;
9995 ch = get_symbol_end ();
9996 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9999 *input_line_pointer = ch;
10000 (*pdesc->handler) (pdesc->arg);
10004 /* Find the instruction descriptor matching the arguments. */
10006 idesc = ia64_find_opcode (mnemonic);
10007 *input_line_pointer = ch;
10010 as_bad ("Unknown opcode `%s'", mnemonic);
10014 idesc = parse_operands (idesc);
10018 /* Handle the dynamic ops we can handle now: */
10019 if (idesc->type == IA64_TYPE_DYN)
10021 if (strcmp (idesc->name, "add") == 0)
10023 if (CURR_SLOT.opnd[2].X_op == O_register
10024 && CURR_SLOT.opnd[2].X_add_number < 4)
10028 ia64_free_opcode (idesc);
10029 idesc = ia64_find_opcode (mnemonic);
10031 know (!idesc->next);
10034 else if (strcmp (idesc->name, "mov") == 0)
10036 enum ia64_opnd opnd1, opnd2;
10039 opnd1 = idesc->operands[0];
10040 opnd2 = idesc->operands[1];
10041 if (opnd1 == IA64_OPND_AR3)
10043 else if (opnd2 == IA64_OPND_AR3)
10047 if (CURR_SLOT.opnd[rop].X_op == O_register)
10049 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10050 mnemonic = "mov.i";
10052 mnemonic = "mov.m";
10056 ia64_free_opcode (idesc);
10057 idesc = ia64_find_opcode (mnemonic);
10058 while (idesc != NULL
10059 && (idesc->operands[0] != opnd1
10060 || idesc->operands[1] != opnd2))
10061 idesc = get_next_opcode (idesc);
10064 else if (strcmp (idesc->name, "mov.i") == 0
10065 || strcmp (idesc->name, "mov.m") == 0)
10067 enum ia64_opnd opnd1, opnd2;
10070 opnd1 = idesc->operands[0];
10071 opnd2 = idesc->operands[1];
10072 if (opnd1 == IA64_OPND_AR3)
10074 else if (opnd2 == IA64_OPND_AR3)
10078 if (CURR_SLOT.opnd[rop].X_op == O_register)
10081 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10083 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10085 if (unit != 'a' && unit != idesc->name [4])
10086 as_bad ("AR %d cannot be accessed by %c-unit",
10087 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10093 if (md.qp.X_op == O_register)
10095 qp_regno = md.qp.X_add_number - REG_P;
10096 md.qp.X_op = O_absent;
10099 flags = idesc->flags;
10101 if ((flags & IA64_OPCODE_FIRST) != 0)
10103 /* The alignment frag has to end with a stop bit only if the
10104 next instruction after the alignment directive has to be
10105 the first instruction in an instruction group. */
10108 while (align_frag->fr_type != rs_align_code)
10110 align_frag = align_frag->fr_next;
10114 /* align_frag can be NULL if there are directives in
10116 if (align_frag && align_frag->fr_next == frag_now)
10117 align_frag->tc_frag_data = 1;
10120 insn_group_break (1, 0, 0);
10124 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10126 as_bad ("`%s' cannot be predicated", idesc->name);
10130 /* Build the instruction. */
10131 CURR_SLOT.qp_regno = qp_regno;
10132 CURR_SLOT.idesc = idesc;
10133 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10134 dwarf2_where (&CURR_SLOT.debug_line);
10136 /* Add unwind entry, if there is one. */
10137 if (unwind.current_entry)
10139 CURR_SLOT.unwind_record = unwind.current_entry;
10140 unwind.current_entry = NULL;
10143 /* Check for dependency violations. */
10147 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10148 if (++md.num_slots_in_use >= NUM_SLOTS)
10149 emit_one_bundle ();
10151 if ((flags & IA64_OPCODE_LAST) != 0)
10152 insn_group_break (1, 0, 0);
10154 md.last_text_seg = now_seg;
10157 input_line_pointer = saved_input_line_pointer;
10160 /* Called when symbol NAME cannot be found in the symbol table.
10161 Should be used for dynamic valued symbols only. */
10164 md_undefined_symbol (name)
10165 char *name ATTRIBUTE_UNUSED;
10170 /* Called for any expression that can not be recognized. When the
10171 function is called, `input_line_pointer' will point to the start of
10178 enum pseudo_type pseudo_type;
10183 switch (*input_line_pointer)
10186 /* Find what relocation pseudo-function we're dealing with. */
10188 ch = *++input_line_pointer;
10189 for (i = 0; i < NELEMS (pseudo_func); ++i)
10190 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10192 len = strlen (pseudo_func[i].name);
10193 if (strncmp (pseudo_func[i].name + 1,
10194 input_line_pointer + 1, len - 1) == 0
10195 && !is_part_of_name (input_line_pointer[len]))
10197 input_line_pointer += len;
10198 pseudo_type = pseudo_func[i].type;
10202 switch (pseudo_type)
10204 case PSEUDO_FUNC_RELOC:
10205 SKIP_WHITESPACE ();
10206 if (*input_line_pointer != '(')
10208 as_bad ("Expected '('");
10212 ++input_line_pointer;
10214 if (*input_line_pointer++ != ')')
10216 as_bad ("Missing ')'");
10219 if (e->X_op != O_symbol)
10221 if (e->X_op != O_pseudo_fixup)
10223 as_bad ("Not a symbolic expression");
10226 if (i != FUNC_LT_RELATIVE)
10228 as_bad ("Illegal combination of relocation functions");
10231 switch (S_GET_VALUE (e->X_op_symbol))
10233 case FUNC_FPTR_RELATIVE:
10234 i = FUNC_LT_FPTR_RELATIVE; break;
10235 case FUNC_DTP_MODULE:
10236 i = FUNC_LT_DTP_MODULE; break;
10237 case FUNC_DTP_RELATIVE:
10238 i = FUNC_LT_DTP_RELATIVE; break;
10239 case FUNC_TP_RELATIVE:
10240 i = FUNC_LT_TP_RELATIVE; break;
10242 as_bad ("Illegal combination of relocation functions");
10246 /* Make sure gas doesn't get rid of local symbols that are used
10248 e->X_op = O_pseudo_fixup;
10249 e->X_op_symbol = pseudo_func[i].u.sym;
10252 case PSEUDO_FUNC_CONST:
10253 e->X_op = O_constant;
10254 e->X_add_number = pseudo_func[i].u.ival;
10257 case PSEUDO_FUNC_REG:
10258 e->X_op = O_register;
10259 e->X_add_number = pseudo_func[i].u.ival;
10263 name = input_line_pointer - 1;
10265 as_bad ("Unknown pseudo function `%s'", name);
10271 ++input_line_pointer;
10273 if (*input_line_pointer != ']')
10275 as_bad ("Closing bracket misssing");
10280 if (e->X_op != O_register)
10281 as_bad ("Register expected as index");
10283 ++input_line_pointer;
10294 ignore_rest_of_line ();
10297 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10298 a section symbol plus some offset. For relocs involving @fptr(),
10299 directives we don't want such adjustments since we need to have the
10300 original symbol's name in the reloc. */
10302 ia64_fix_adjustable (fix)
10305 /* Prevent all adjustments to global symbols */
10306 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10309 switch (fix->fx_r_type)
10311 case BFD_RELOC_IA64_FPTR64I:
10312 case BFD_RELOC_IA64_FPTR32MSB:
10313 case BFD_RELOC_IA64_FPTR32LSB:
10314 case BFD_RELOC_IA64_FPTR64MSB:
10315 case BFD_RELOC_IA64_FPTR64LSB:
10316 case BFD_RELOC_IA64_LTOFF_FPTR22:
10317 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10327 ia64_force_relocation (fix)
10330 switch (fix->fx_r_type)
10332 case BFD_RELOC_IA64_FPTR64I:
10333 case BFD_RELOC_IA64_FPTR32MSB:
10334 case BFD_RELOC_IA64_FPTR32LSB:
10335 case BFD_RELOC_IA64_FPTR64MSB:
10336 case BFD_RELOC_IA64_FPTR64LSB:
10338 case BFD_RELOC_IA64_LTOFF22:
10339 case BFD_RELOC_IA64_LTOFF64I:
10340 case BFD_RELOC_IA64_LTOFF_FPTR22:
10341 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10342 case BFD_RELOC_IA64_PLTOFF22:
10343 case BFD_RELOC_IA64_PLTOFF64I:
10344 case BFD_RELOC_IA64_PLTOFF64MSB:
10345 case BFD_RELOC_IA64_PLTOFF64LSB:
10347 case BFD_RELOC_IA64_LTOFF22X:
10348 case BFD_RELOC_IA64_LDXMOV:
10355 return generic_force_reloc (fix);
10358 /* Decide from what point a pc-relative relocation is relative to,
10359 relative to the pc-relative fixup. Er, relatively speaking. */
10361 ia64_pcrel_from_section (fix, sec)
10365 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10367 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10374 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10376 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10380 expr.X_op = O_pseudo_fixup;
10381 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10382 expr.X_add_number = 0;
10383 expr.X_add_symbol = symbol;
10384 emit_expr (&expr, size);
10387 /* This is called whenever some data item (not an instruction) needs a
10388 fixup. We pick the right reloc code depending on the byteorder
10389 currently in effect. */
10391 ia64_cons_fix_new (f, where, nbytes, exp)
10397 bfd_reloc_code_real_type code;
10402 /* There are no reloc for 8 and 16 bit quantities, but we allow
10403 them here since they will work fine as long as the expression
10404 is fully defined at the end of the pass over the source file. */
10405 case 1: code = BFD_RELOC_8; break;
10406 case 2: code = BFD_RELOC_16; break;
10408 if (target_big_endian)
10409 code = BFD_RELOC_IA64_DIR32MSB;
10411 code = BFD_RELOC_IA64_DIR32LSB;
10415 /* In 32-bit mode, data8 could mean function descriptors too. */
10416 if (exp->X_op == O_pseudo_fixup
10417 && exp->X_op_symbol
10418 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10419 && !(md.flags & EF_IA_64_ABI64))
10421 if (target_big_endian)
10422 code = BFD_RELOC_IA64_IPLTMSB;
10424 code = BFD_RELOC_IA64_IPLTLSB;
10425 exp->X_op = O_symbol;
10430 if (target_big_endian)
10431 code = BFD_RELOC_IA64_DIR64MSB;
10433 code = BFD_RELOC_IA64_DIR64LSB;
10438 if (exp->X_op == O_pseudo_fixup
10439 && exp->X_op_symbol
10440 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10442 if (target_big_endian)
10443 code = BFD_RELOC_IA64_IPLTMSB;
10445 code = BFD_RELOC_IA64_IPLTLSB;
10446 exp->X_op = O_symbol;
10452 as_bad ("Unsupported fixup size %d", nbytes);
10453 ignore_rest_of_line ();
10457 if (exp->X_op == O_pseudo_fixup)
10459 exp->X_op = O_symbol;
10460 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10461 /* ??? If code unchanged, unsupported. */
10464 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10465 /* We need to store the byte order in effect in case we're going
10466 to fix an 8 or 16 bit relocation (for which there no real
10467 relocs available). See md_apply_fix3(). */
10468 fix->tc_fix_data.bigendian = target_big_endian;
10471 /* Return the actual relocation we wish to associate with the pseudo
10472 reloc described by SYM and R_TYPE. SYM should be one of the
10473 symbols in the pseudo_func array, or NULL. */
10475 static bfd_reloc_code_real_type
10476 ia64_gen_real_reloc_type (sym, r_type)
10477 struct symbol *sym;
10478 bfd_reloc_code_real_type r_type;
10480 bfd_reloc_code_real_type new = 0;
10487 switch (S_GET_VALUE (sym))
10489 case FUNC_FPTR_RELATIVE:
10492 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10493 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10494 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10495 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10496 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10501 case FUNC_GP_RELATIVE:
10504 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10505 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10506 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10507 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10508 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10509 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10514 case FUNC_LT_RELATIVE:
10517 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10518 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10523 case FUNC_LT_RELATIVE_X:
10526 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10531 case FUNC_PC_RELATIVE:
10534 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10535 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10536 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10537 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10538 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10539 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10544 case FUNC_PLT_RELATIVE:
10547 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10548 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10549 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10550 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10555 case FUNC_SEC_RELATIVE:
10558 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10559 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10560 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10561 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10566 case FUNC_SEG_RELATIVE:
10569 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10570 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10571 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10572 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10577 case FUNC_LTV_RELATIVE:
10580 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10581 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10582 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10583 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10588 case FUNC_LT_FPTR_RELATIVE:
10591 case BFD_RELOC_IA64_IMM22:
10592 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10593 case BFD_RELOC_IA64_IMM64:
10594 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10600 case FUNC_TP_RELATIVE:
10603 case BFD_RELOC_IA64_IMM14:
10604 new = BFD_RELOC_IA64_TPREL14; break;
10605 case BFD_RELOC_IA64_IMM22:
10606 new = BFD_RELOC_IA64_TPREL22; break;
10607 case BFD_RELOC_IA64_IMM64:
10608 new = BFD_RELOC_IA64_TPREL64I; break;
10614 case FUNC_LT_TP_RELATIVE:
10617 case BFD_RELOC_IA64_IMM22:
10618 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10624 case FUNC_LT_DTP_MODULE:
10627 case BFD_RELOC_IA64_IMM22:
10628 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10634 case FUNC_DTP_RELATIVE:
10637 case BFD_RELOC_IA64_DIR64MSB:
10638 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10639 case BFD_RELOC_IA64_DIR64LSB:
10640 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10641 case BFD_RELOC_IA64_IMM14:
10642 new = BFD_RELOC_IA64_DTPREL14; break;
10643 case BFD_RELOC_IA64_IMM22:
10644 new = BFD_RELOC_IA64_DTPREL22; break;
10645 case BFD_RELOC_IA64_IMM64:
10646 new = BFD_RELOC_IA64_DTPREL64I; break;
10652 case FUNC_LT_DTP_RELATIVE:
10655 case BFD_RELOC_IA64_IMM22:
10656 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10662 case FUNC_IPLT_RELOC:
10669 /* Hmmmm. Should this ever occur? */
10676 /* Here is where generate the appropriate reloc for pseudo relocation
10679 ia64_validate_fix (fix)
10682 switch (fix->fx_r_type)
10684 case BFD_RELOC_IA64_FPTR64I:
10685 case BFD_RELOC_IA64_FPTR32MSB:
10686 case BFD_RELOC_IA64_FPTR64LSB:
10687 case BFD_RELOC_IA64_LTOFF_FPTR22:
10688 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10689 if (fix->fx_offset != 0)
10690 as_bad_where (fix->fx_file, fix->fx_line,
10691 "No addend allowed in @fptr() relocation");
10699 fix_insn (fix, odesc, value)
10701 const struct ia64_operand *odesc;
10704 bfd_vma insn[3], t0, t1, control_bits;
10709 slot = fix->fx_where & 0x3;
10710 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10712 /* Bundles are always in little-endian byte order */
10713 t0 = bfd_getl64 (fixpos);
10714 t1 = bfd_getl64 (fixpos + 8);
10715 control_bits = t0 & 0x1f;
10716 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10717 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10718 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10721 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10723 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10724 insn[2] |= (((value & 0x7f) << 13)
10725 | (((value >> 7) & 0x1ff) << 27)
10726 | (((value >> 16) & 0x1f) << 22)
10727 | (((value >> 21) & 0x1) << 21)
10728 | (((value >> 63) & 0x1) << 36));
10730 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10732 if (value & ~0x3fffffffffffffffULL)
10733 err = "integer operand out of range";
10734 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10735 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10737 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10740 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10741 insn[2] |= ((((value >> 59) & 0x1) << 36)
10742 | (((value >> 0) & 0xfffff) << 13));
10745 err = (*odesc->insert) (odesc, value, insn + slot);
10748 as_bad_where (fix->fx_file, fix->fx_line, err);
10750 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10751 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10752 number_to_chars_littleendian (fixpos + 0, t0, 8);
10753 number_to_chars_littleendian (fixpos + 8, t1, 8);
10756 /* Attempt to simplify or even eliminate a fixup. The return value is
10757 ignored; perhaps it was once meaningful, but now it is historical.
10758 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10760 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10764 md_apply_fix3 (fix, valP, seg)
10767 segT seg ATTRIBUTE_UNUSED;
10770 valueT value = *valP;
10772 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10776 switch (fix->fx_r_type)
10778 case BFD_RELOC_IA64_DIR32MSB:
10779 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10782 case BFD_RELOC_IA64_DIR32LSB:
10783 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10786 case BFD_RELOC_IA64_DIR64MSB:
10787 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10790 case BFD_RELOC_IA64_DIR64LSB:
10791 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10800 switch (fix->fx_r_type)
10802 case BFD_RELOC_UNUSED:
10803 /* This must be a TAG13 or TAG13b operand. There are no external
10804 relocs defined for them, so we must give an error. */
10805 as_bad_where (fix->fx_file, fix->fx_line,
10806 "%s must have a constant value",
10807 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10811 case BFD_RELOC_IA64_TPREL14:
10812 case BFD_RELOC_IA64_TPREL22:
10813 case BFD_RELOC_IA64_TPREL64I:
10814 case BFD_RELOC_IA64_LTOFF_TPREL22:
10815 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10816 case BFD_RELOC_IA64_DTPREL14:
10817 case BFD_RELOC_IA64_DTPREL22:
10818 case BFD_RELOC_IA64_DTPREL64I:
10819 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10820 S_SET_THREAD_LOCAL (fix->fx_addsy);
10827 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10829 if (fix->tc_fix_data.bigendian)
10830 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10832 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10837 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10842 /* Generate the BFD reloc to be stuck in the object file from the
10843 fixup used internally in the assembler. */
10846 tc_gen_reloc (sec, fixp)
10847 asection *sec ATTRIBUTE_UNUSED;
10852 reloc = xmalloc (sizeof (*reloc));
10853 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10854 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10855 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10856 reloc->addend = fixp->fx_offset;
10857 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10861 as_bad_where (fixp->fx_file, fixp->fx_line,
10862 "Cannot represent %s relocation in object file",
10863 bfd_get_reloc_code_name (fixp->fx_r_type));
10868 /* Turn a string in input_line_pointer into a floating point constant
10869 of type TYPE, and store the appropriate bytes in *LIT. The number
10870 of LITTLENUMS emitted is stored in *SIZE. An error message is
10871 returned, or NULL on OK. */
10873 #define MAX_LITTLENUMS 5
10876 md_atof (type, lit, size)
10881 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10911 return "Bad call to MD_ATOF()";
10913 t = atof_ieee (input_line_pointer, type, words);
10915 input_line_pointer = t;
10917 (*ia64_float_to_chars) (lit, words, prec);
10921 /* It is 10 byte floating point with 6 byte padding. */
10922 memset (&lit [10], 0, 6);
10923 *size = 8 * sizeof (LITTLENUM_TYPE);
10926 *size = prec * sizeof (LITTLENUM_TYPE);
10931 /* Handle ia64 specific semantics of the align directive. */
10934 ia64_md_do_align (n, fill, len, max)
10935 int n ATTRIBUTE_UNUSED;
10936 const char *fill ATTRIBUTE_UNUSED;
10937 int len ATTRIBUTE_UNUSED;
10938 int max ATTRIBUTE_UNUSED;
10940 if (subseg_text_p (now_seg))
10941 ia64_flush_insns ();
10944 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10945 of an rs_align_code fragment. */
10948 ia64_handle_align (fragp)
10951 /* Use mfi bundle of nops with no stop bits. */
10952 static const unsigned char le_nop[]
10953 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10954 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10955 static const unsigned char le_nop_stop[]
10956 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10957 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10961 const unsigned char *nop;
10963 if (fragp->fr_type != rs_align_code)
10966 /* Check if this frag has to end with a stop bit. */
10967 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10969 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10970 p = fragp->fr_literal + fragp->fr_fix;
10972 /* If no paddings are needed, we check if we need a stop bit. */
10973 if (!bytes && fragp->tc_frag_data)
10975 if (fragp->fr_fix < 16)
10977 /* FIXME: It won't work with
10979 alloc r32=ar.pfs,1,2,4,0
10983 as_bad_where (fragp->fr_file, fragp->fr_line,
10984 _("Can't add stop bit to mark end of instruction group"));
10987 /* Bundles are always in little-endian byte order. Make sure
10988 the previous bundle has the stop bit. */
10992 /* Make sure we are on a 16-byte boundary, in case someone has been
10993 putting data into a text section. */
10996 int fix = bytes & 15;
10997 memset (p, 0, fix);
11000 fragp->fr_fix += fix;
11003 /* Instruction bundles are always little-endian. */
11004 memcpy (p, nop, 16);
11005 fragp->fr_var = 16;
11009 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11014 number_to_chars_bigendian (lit, (long) (*words++),
11015 sizeof (LITTLENUM_TYPE));
11016 lit += sizeof (LITTLENUM_TYPE);
11021 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11026 number_to_chars_littleendian (lit, (long) (words[prec]),
11027 sizeof (LITTLENUM_TYPE));
11028 lit += sizeof (LITTLENUM_TYPE);
11033 ia64_elf_section_change_hook (void)
11035 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11036 && elf_linked_to_section (now_seg) == NULL)
11037 elf_linked_to_section (now_seg) = text_section;
11038 dot_byteorder (-1);
11041 /* Check if a label should be made global. */
11043 ia64_check_label (symbolS *label)
11045 if (*input_line_pointer == ':')
11047 S_SET_EXTERNAL (label);
11048 input_line_pointer++;
11052 /* Used to remember where .alias and .secalias directives are seen. We
11053 will rename symbol and section names when we are about to output
11054 the relocatable file. */
11057 char *file; /* The file where the directive is seen. */
11058 unsigned int line; /* The line number the directive is at. */
11059 const char *name; /* The orignale name of the symbol. */
11062 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11063 .secalias. Otherwise, it is .alias. */
11065 dot_alias (int section)
11067 char *name, *alias;
11071 const char *error_string;
11074 struct hash_control *ahash, *nhash;
11077 name = input_line_pointer;
11078 delim = get_symbol_end ();
11079 end_name = input_line_pointer;
11082 if (name == end_name)
11084 as_bad (_("expected symbol name"));
11085 discard_rest_of_line ();
11089 SKIP_WHITESPACE ();
11091 if (*input_line_pointer != ',')
11094 as_bad (_("expected comma after \"%s\""), name);
11096 ignore_rest_of_line ();
11100 input_line_pointer++;
11103 /* We call demand_copy_C_string to check if alias string is valid.
11104 There should be a closing `"' and no `\0' in the string. */
11105 alias = demand_copy_C_string (&len);
11108 ignore_rest_of_line ();
11112 /* Make a copy of name string. */
11113 len = strlen (name) + 1;
11114 obstack_grow (¬es, name, len);
11115 name = obstack_finish (¬es);
11120 ahash = secalias_hash;
11121 nhash = secalias_name_hash;
11126 ahash = alias_hash;
11127 nhash = alias_name_hash;
11130 /* Check if alias has been used before. */
11131 h = (struct alias *) hash_find (ahash, alias);
11134 if (strcmp (h->name, name))
11135 as_bad (_("`%s' is already the alias of %s `%s'"),
11136 alias, kind, h->name);
11140 /* Check if name already has an alias. */
11141 a = (const char *) hash_find (nhash, name);
11144 if (strcmp (a, alias))
11145 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11149 h = (struct alias *) xmalloc (sizeof (struct alias));
11150 as_where (&h->file, &h->line);
11153 error_string = hash_jam (ahash, alias, (PTR) h);
11156 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11157 alias, kind, error_string);
11161 error_string = hash_jam (nhash, name, (PTR) alias);
11164 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11165 alias, kind, error_string);
11167 obstack_free (¬es, name);
11168 obstack_free (¬es, alias);
11171 demand_empty_rest_of_line ();
11174 /* It renames the original symbol name to its alias. */
11176 do_alias (const char *alias, PTR value)
11178 struct alias *h = (struct alias *) value;
11179 symbolS *sym = symbol_find (h->name);
11182 as_warn_where (h->file, h->line,
11183 _("symbol `%s' aliased to `%s' is not used"),
11186 S_SET_NAME (sym, (char *) alias);
11189 /* Called from write_object_file. */
11191 ia64_adjust_symtab (void)
11193 hash_traverse (alias_hash, do_alias);
11196 /* It renames the original section name to its alias. */
11198 do_secalias (const char *alias, PTR value)
11200 struct alias *h = (struct alias *) value;
11201 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11204 as_warn_where (h->file, h->line,
11205 _("section `%s' aliased to `%s' is not used"),
11211 /* Called from write_object_file. */
11213 ia64_frob_file (void)
11215 hash_traverse (secalias_hash, do_secalias);