1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
59 #define MIN(a,b) ((a) < (b) ? (a) : (b))
62 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
63 #define CURR_SLOT md.slot[md.curr_slot]
65 #define O_pseudo_fixup (O_max + 1)
69 /* IA-64 ABI section pseudo-ops. */
70 SPECIAL_SECTION_BSS = 0,
72 SPECIAL_SECTION_SDATA,
73 SPECIAL_SECTION_RODATA,
74 SPECIAL_SECTION_COMMENT,
75 SPECIAL_SECTION_UNWIND,
76 SPECIAL_SECTION_UNWIND_INFO,
77 /* HPUX specific section pseudo-ops. */
78 SPECIAL_SECTION_INIT_ARRAY,
79 SPECIAL_SECTION_FINI_ARRAY,
96 FUNC_LT_FPTR_RELATIVE,
106 REG_FR = (REG_GR + 128),
107 REG_AR = (REG_FR + 128),
108 REG_CR = (REG_AR + 128),
109 REG_P = (REG_CR + 128),
110 REG_BR = (REG_P + 64),
111 REG_IP = (REG_BR + 8),
118 /* The following are pseudo-registers for use by gas only. */
130 /* The following pseudo-registers are used for unwind directives only: */
138 DYNREG_GR = 0, /* dynamic general purpose register */
139 DYNREG_FR, /* dynamic floating point register */
140 DYNREG_PR, /* dynamic predicate register */
144 enum operand_match_result
147 OPERAND_OUT_OF_RANGE,
151 /* On the ia64, we can't know the address of a text label until the
152 instructions are packed into a bundle. To handle this, we keep
153 track of the list of labels that appear in front of each
157 struct label_fix *next;
161 /* This is the endianness of the current section. */
162 extern int target_big_endian;
164 /* This is the default endianness. */
165 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
167 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
169 static void ia64_float_to_chars_bigendian
170 PARAMS ((char *, LITTLENUM_TYPE *, int));
171 static void ia64_float_to_chars_littleendian
172 PARAMS ((char *, LITTLENUM_TYPE *, int));
173 static void (*ia64_float_to_chars)
174 PARAMS ((char *, LITTLENUM_TYPE *, int));
176 static struct hash_control *alias_hash;
177 static struct hash_control *alias_name_hash;
178 static struct hash_control *secalias_hash;
179 static struct hash_control *secalias_name_hash;
181 /* List of chars besides those in app.c:symbol_chars that can start an
182 operand. Used to prevent the scrubber eating vital white-space. */
183 const char ia64_symbol_chars[] = "@?";
185 /* Characters which always start a comment. */
186 const char comment_chars[] = "";
188 /* Characters which start a comment at the beginning of a line. */
189 const char line_comment_chars[] = "#";
191 /* Characters which may be used to separate multiple commands on a
193 const char line_separator_chars[] = ";";
195 /* Characters which are used to indicate an exponent in a floating
197 const char EXP_CHARS[] = "eE";
199 /* Characters which mean that a number is a floating point constant,
201 const char FLT_CHARS[] = "rRsSfFdDxXpP";
203 /* ia64-specific option processing: */
205 const char *md_shortopts = "m:N:x::";
207 struct option md_longopts[] =
209 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
210 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
211 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
212 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
215 size_t md_longopts_size = sizeof (md_longopts);
219 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
220 struct hash_control *reg_hash; /* register name hash table */
221 struct hash_control *dynreg_hash; /* dynamic register hash table */
222 struct hash_control *const_hash; /* constant hash table */
223 struct hash_control *entry_hash; /* code entry hint hash table */
225 symbolS *regsym[REG_NUM];
227 /* If X_op is != O_absent, the registername for the instruction's
228 qualifying predicate. If NULL, p0 is assumed for instructions
229 that are predicatable. */
236 explicit_mode : 1, /* which mode we're in */
237 default_explicit_mode : 1, /* which mode is the default */
238 mode_explicitly_set : 1, /* was the current mode explicitly set? */
240 keep_pending_output : 1;
242 /* What to do when something is wrong with unwind directives. */
245 unwind_check_warning,
249 /* Each bundle consists of up to three instructions. We keep
250 track of four most recent instructions so we can correctly set
251 the end_of_insn_group for the last instruction in a bundle. */
253 int num_slots_in_use;
257 end_of_insn_group : 1,
258 manual_bundling_on : 1,
259 manual_bundling_off : 1,
260 loc_directive_seen : 1;
261 signed char user_template; /* user-selected template, if any */
262 unsigned char qp_regno; /* qualifying predicate */
263 /* This duplicates a good fraction of "struct fix" but we
264 can't use a "struct fix" instead since we can't call
265 fix_new_exp() until we know the address of the instruction. */
269 bfd_reloc_code_real_type code;
270 enum ia64_opnd opnd; /* type of operand in need of fix */
271 unsigned int is_pcrel : 1; /* is operand pc-relative? */
272 expressionS expr; /* the value to be inserted */
274 fixup[2]; /* at most two fixups per insn */
275 struct ia64_opcode *idesc;
276 struct label_fix *label_fixups;
277 struct label_fix *tag_fixups;
278 struct unw_rec_list *unwind_record; /* Unwind directive. */
281 unsigned int src_line;
282 struct dwarf2_line_info debug_line;
290 struct dynreg *next; /* next dynamic register */
292 unsigned short base; /* the base register number */
293 unsigned short num_regs; /* # of registers in this set */
295 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
297 flagword flags; /* ELF-header flags */
300 unsigned hint:1; /* is this hint currently valid? */
301 bfd_vma offset; /* mem.offset offset */
302 bfd_vma base; /* mem.offset base */
305 int path; /* number of alt. entry points seen */
306 const char **entry_labels; /* labels of all alternate paths in
307 the current DV-checking block. */
308 int maxpaths; /* size currently allocated for
311 int pointer_size; /* size in bytes of a pointer */
312 int pointer_size_shift; /* shift size of a pointer for alignment */
316 /* application registers: */
322 #define AR_BSPSTORE 18
337 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
338 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
339 {"ar.rsc", 16}, {"ar.bsp", 17},
340 {"ar.bspstore", 18}, {"ar.rnat", 19},
341 {"ar.fcr", 21}, {"ar.eflag", 24},
342 {"ar.csd", 25}, {"ar.ssd", 26},
343 {"ar.cflg", 27}, {"ar.fsr", 28},
344 {"ar.fir", 29}, {"ar.fdr", 30},
345 {"ar.ccv", 32}, {"ar.unat", 36},
346 {"ar.fpsr", 40}, {"ar.itc", 44},
347 {"ar.pfs", 64}, {"ar.lc", 65},
368 /* control registers: */
410 static const struct const_desc
417 /* PSR constant masks: */
420 {"psr.be", ((valueT) 1) << 1},
421 {"psr.up", ((valueT) 1) << 2},
422 {"psr.ac", ((valueT) 1) << 3},
423 {"psr.mfl", ((valueT) 1) << 4},
424 {"psr.mfh", ((valueT) 1) << 5},
426 {"psr.ic", ((valueT) 1) << 13},
427 {"psr.i", ((valueT) 1) << 14},
428 {"psr.pk", ((valueT) 1) << 15},
430 {"psr.dt", ((valueT) 1) << 17},
431 {"psr.dfl", ((valueT) 1) << 18},
432 {"psr.dfh", ((valueT) 1) << 19},
433 {"psr.sp", ((valueT) 1) << 20},
434 {"psr.pp", ((valueT) 1) << 21},
435 {"psr.di", ((valueT) 1) << 22},
436 {"psr.si", ((valueT) 1) << 23},
437 {"psr.db", ((valueT) 1) << 24},
438 {"psr.lp", ((valueT) 1) << 25},
439 {"psr.tb", ((valueT) 1) << 26},
440 {"psr.rt", ((valueT) 1) << 27},
441 /* 28-31: reserved */
442 /* 32-33: cpl (current privilege level) */
443 {"psr.is", ((valueT) 1) << 34},
444 {"psr.mc", ((valueT) 1) << 35},
445 {"psr.it", ((valueT) 1) << 36},
446 {"psr.id", ((valueT) 1) << 37},
447 {"psr.da", ((valueT) 1) << 38},
448 {"psr.dd", ((valueT) 1) << 39},
449 {"psr.ss", ((valueT) 1) << 40},
450 /* 41-42: ri (restart instruction) */
451 {"psr.ed", ((valueT) 1) << 43},
452 {"psr.bn", ((valueT) 1) << 44},
455 /* indirect register-sets/memory: */
464 { "CPUID", IND_CPUID },
465 { "cpuid", IND_CPUID },
477 /* Pseudo functions used to indicate relocation types (these functions
478 start with an at sign (@). */
500 /* reloc pseudo functions (these must come first!): */
501 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
502 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
504 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
505 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
506 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
507 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
509 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
511 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
512 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
513 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
514 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
515 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
516 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
517 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
519 /* mbtype4 constants: */
520 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
521 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
522 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
523 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
524 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
526 /* fclass constants: */
527 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
528 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
529 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
530 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
531 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
532 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
533 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
534 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
535 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
537 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
539 /* hint constants: */
540 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
542 /* unwind-related constants: */
543 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
544 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
545 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
546 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
547 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
548 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
549 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
551 /* unwind-related registers: */
552 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
555 /* 41-bit nop opcodes (one per unit): */
556 static const bfd_vma nop[IA64_NUM_UNITS] =
558 0x0000000000LL, /* NIL => break 0 */
559 0x0008000000LL, /* I-unit nop */
560 0x0008000000LL, /* M-unit nop */
561 0x4000000000LL, /* B-unit nop */
562 0x0008000000LL, /* F-unit nop */
563 0x0008000000LL, /* L-"unit" nop */
564 0x0008000000LL, /* X-unit nop */
567 /* Can't be `const' as it's passed to input routines (which have the
568 habit of setting temporary sentinels. */
569 static char special_section_name[][20] =
571 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
572 {".IA_64.unwind"}, {".IA_64.unwind_info"},
573 {".init_array"}, {".fini_array"}
576 /* The best template for a particular sequence of up to three
578 #define N IA64_NUM_TYPES
579 static unsigned char best_template[N][N][N];
582 /* Resource dependencies currently in effect */
584 int depind; /* dependency index */
585 const struct ia64_dependency *dependency; /* actual dependency */
586 unsigned specific:1, /* is this a specific bit/regno? */
587 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
588 int index; /* specific regno/bit within dependency */
589 int note; /* optional qualifying note (0 if none) */
593 int insn_srlz; /* current insn serialization state */
594 int data_srlz; /* current data serialization state */
595 int qp_regno; /* qualifying predicate for this usage */
596 char *file; /* what file marked this dependency */
597 unsigned int line; /* what line marked this dependency */
598 struct mem_offset mem_offset; /* optional memory offset hint */
599 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
600 int path; /* corresponding code entry index */
602 static int regdepslen = 0;
603 static int regdepstotlen = 0;
604 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
605 static const char *dv_sem[] = { "none", "implied", "impliedf",
606 "data", "instr", "specific", "stop", "other" };
607 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
609 /* Current state of PR mutexation */
610 static struct qpmutex {
613 } *qp_mutexes = NULL; /* QP mutex bitmasks */
614 static int qp_mutexeslen = 0;
615 static int qp_mutexestotlen = 0;
616 static valueT qp_safe_across_calls = 0;
618 /* Current state of PR implications */
619 static struct qp_imply {
622 unsigned p2_branched:1;
624 } *qp_implies = NULL;
625 static int qp_implieslen = 0;
626 static int qp_impliestotlen = 0;
628 /* Keep track of static GR values so that indirect register usage can
629 sometimes be tracked. */
640 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
646 /* Remember the alignment frag. */
647 static fragS *align_frag;
649 /* These are the routines required to output the various types of
652 /* A slot_number is a frag address plus the slot index (0-2). We use the
653 frag address here so that if there is a section switch in the middle of
654 a function, then instructions emitted to a different section are not
655 counted. Since there may be more than one frag for a function, this
656 means we also need to keep track of which frag this address belongs to
657 so we can compute inter-frag distances. This also nicely solves the
658 problem with nops emitted for align directives, which can't easily be
659 counted, but can easily be derived from frag sizes. */
661 typedef struct unw_rec_list {
663 unsigned long slot_number;
665 unsigned long next_slot_number;
666 fragS *next_slot_frag;
667 struct unw_rec_list *next;
670 #define SLOT_NUM_NOT_SET (unsigned)-1
672 /* Linked list of saved prologue counts. A very poor
673 implementation of a map from label numbers to prologue counts. */
674 typedef struct label_prologue_count
676 struct label_prologue_count *next;
677 unsigned long label_number;
678 unsigned int prologue_count;
679 } label_prologue_count;
683 /* Maintain a list of unwind entries for the current function. */
687 /* Any unwind entires that should be attached to the current slot
688 that an insn is being constructed for. */
689 unw_rec_list *current_entry;
691 /* These are used to create the unwind table entry for this function. */
693 symbolS *info; /* pointer to unwind info */
694 symbolS *personality_routine;
696 subsegT saved_text_subseg;
697 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
699 /* TRUE if processing unwind directives in a prologue region. */
700 unsigned int prologue : 1;
701 unsigned int prologue_mask : 4;
702 unsigned int body : 1;
703 unsigned int insn : 1;
704 unsigned int prologue_count; /* number of .prologues seen so far */
705 /* Prologue counts at previous .label_state directives. */
706 struct label_prologue_count * saved_prologue_counts;
709 /* The input value is a negated offset from psp, and specifies an address
710 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
711 must add 16 and divide by 4 to get the encoded value. */
713 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
715 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
717 /* Forward declarations: */
718 static void set_section PARAMS ((char *name));
719 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
720 unsigned int, unsigned int));
721 static void dot_align (int);
722 static void dot_radix PARAMS ((int));
723 static void dot_special_section PARAMS ((int));
724 static void dot_proc PARAMS ((int));
725 static void dot_fframe PARAMS ((int));
726 static void dot_vframe PARAMS ((int));
727 static void dot_vframesp PARAMS ((int));
728 static void dot_vframepsp PARAMS ((int));
729 static void dot_save PARAMS ((int));
730 static void dot_restore PARAMS ((int));
731 static void dot_restorereg PARAMS ((int));
732 static void dot_restorereg_p PARAMS ((int));
733 static void dot_handlerdata PARAMS ((int));
734 static void dot_unwentry PARAMS ((int));
735 static void dot_altrp PARAMS ((int));
736 static void dot_savemem PARAMS ((int));
737 static void dot_saveg PARAMS ((int));
738 static void dot_savef PARAMS ((int));
739 static void dot_saveb PARAMS ((int));
740 static void dot_savegf PARAMS ((int));
741 static void dot_spill PARAMS ((int));
742 static void dot_spillreg PARAMS ((int));
743 static void dot_spillmem PARAMS ((int));
744 static void dot_spillreg_p PARAMS ((int));
745 static void dot_spillmem_p PARAMS ((int));
746 static void dot_label_state PARAMS ((int));
747 static void dot_copy_state PARAMS ((int));
748 static void dot_unwabi PARAMS ((int));
749 static void dot_personality PARAMS ((int));
750 static void dot_body PARAMS ((int));
751 static void dot_prologue PARAMS ((int));
752 static void dot_endp PARAMS ((int));
753 static void dot_template PARAMS ((int));
754 static void dot_regstk PARAMS ((int));
755 static void dot_rot PARAMS ((int));
756 static void dot_byteorder PARAMS ((int));
757 static void dot_psr PARAMS ((int));
758 static void dot_alias PARAMS ((int));
759 static void dot_ln PARAMS ((int));
760 static char *parse_section_name PARAMS ((void));
761 static void dot_xdata PARAMS ((int));
762 static void stmt_float_cons PARAMS ((int));
763 static void stmt_cons_ua PARAMS ((int));
764 static void dot_xfloat_cons PARAMS ((int));
765 static void dot_xstringer PARAMS ((int));
766 static void dot_xdata_ua PARAMS ((int));
767 static void dot_xfloat_cons_ua PARAMS ((int));
768 static void print_prmask PARAMS ((valueT mask));
769 static void dot_pred_rel PARAMS ((int));
770 static void dot_reg_val PARAMS ((int));
771 static void dot_serialize PARAMS ((int));
772 static void dot_dv_mode PARAMS ((int));
773 static void dot_entry PARAMS ((int));
774 static void dot_mem_offset PARAMS ((int));
775 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
776 static symbolS *declare_register PARAMS ((const char *name, int regnum));
777 static void declare_register_set PARAMS ((const char *, int, int));
778 static unsigned int operand_width PARAMS ((enum ia64_opnd));
779 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
782 static int parse_operand PARAMS ((expressionS *e));
783 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
784 static void build_insn PARAMS ((struct slot *, bfd_vma *));
785 static void emit_one_bundle PARAMS ((void));
786 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
787 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
788 bfd_reloc_code_real_type r_type));
789 static void insn_group_break PARAMS ((int, int, int));
790 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
791 struct rsrc *, int depind, int path));
792 static void add_qp_mutex PARAMS((valueT mask));
793 static void add_qp_imply PARAMS((int p1, int p2));
794 static void clear_qp_branch_flag PARAMS((valueT mask));
795 static void clear_qp_mutex PARAMS((valueT mask));
796 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
797 static int has_suffix_p PARAMS((const char *, const char *));
798 static void clear_register_values PARAMS ((void));
799 static void print_dependency PARAMS ((const char *action, int depind));
800 static void instruction_serialization PARAMS ((void));
801 static void data_serialization PARAMS ((void));
802 static void remove_marked_resource PARAMS ((struct rsrc *));
803 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
804 static int is_taken_branch PARAMS ((struct ia64_opcode *));
805 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
806 static int depends_on PARAMS ((int, struct ia64_opcode *));
807 static int specify_resource PARAMS ((const struct ia64_dependency *,
808 struct ia64_opcode *, int, struct rsrc [], int, int));
809 static int check_dv PARAMS((struct ia64_opcode *idesc));
810 static void check_dependencies PARAMS((struct ia64_opcode *));
811 static void mark_resources PARAMS((struct ia64_opcode *));
812 static void update_dependencies PARAMS((struct ia64_opcode *));
813 static void note_register_values PARAMS((struct ia64_opcode *));
814 static int qp_mutex PARAMS ((int, int, int));
815 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
816 static void output_vbyte_mem PARAMS ((int, char *, char *));
817 static void count_output PARAMS ((int, char *, char *));
818 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
819 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
820 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
821 static void output_P1_format PARAMS ((vbyte_func, int));
822 static void output_P2_format PARAMS ((vbyte_func, int, int));
823 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
824 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
825 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
826 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
827 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
828 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
829 static void output_P9_format PARAMS ((vbyte_func, int, int));
830 static void output_P10_format PARAMS ((vbyte_func, int, int));
831 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
832 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
833 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
834 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
835 static char format_ab_reg PARAMS ((int, int));
836 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
838 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
839 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
841 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
842 static unw_rec_list *output_endp PARAMS ((void));
843 static unw_rec_list *output_prologue PARAMS ((void));
844 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
845 static unw_rec_list *output_body PARAMS ((void));
846 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
847 static unw_rec_list *output_mem_stack_v PARAMS ((void));
848 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
849 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
850 static unw_rec_list *output_rp_when PARAMS ((void));
851 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
852 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
853 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
854 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
855 static unw_rec_list *output_pfs_when PARAMS ((void));
856 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
857 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
858 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
859 static unw_rec_list *output_preds_when PARAMS ((void));
860 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
861 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
862 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
864 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
865 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
866 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
867 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
868 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
869 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
870 static unw_rec_list *output_unat_when PARAMS ((void));
871 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
872 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
873 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
874 static unw_rec_list *output_lc_when PARAMS ((void));
875 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
876 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
877 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
878 static unw_rec_list *output_fpsr_when PARAMS ((void));
879 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
880 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
881 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
882 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
883 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
884 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
885 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
886 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
887 static unw_rec_list *output_bsp_when PARAMS ((void));
888 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
889 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
890 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
891 static unw_rec_list *output_bspstore_when PARAMS ((void));
892 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
893 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
894 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
895 static unw_rec_list *output_rnat_when PARAMS ((void));
896 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
897 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
898 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
899 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
900 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
901 static unw_rec_list *output_label_state PARAMS ((unsigned long));
902 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
903 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
904 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
905 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
907 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
909 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
911 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
912 unsigned int, unsigned int));
913 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
914 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
915 static int calc_record_size PARAMS ((unw_rec_list *));
916 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
917 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
918 unsigned long, fragS *,
920 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
921 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
922 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
923 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
924 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
925 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
926 static void free_saved_prologue_counts PARAMS ((void));
928 /* Determine if application register REGNUM resides only in the integer
929 unit (as opposed to the memory unit). */
931 ar_is_only_in_integer_unit (int reg)
934 return reg >= 64 && reg <= 111;
937 /* Determine if application register REGNUM resides only in the memory
938 unit (as opposed to the integer unit). */
940 ar_is_only_in_memory_unit (int reg)
943 return reg >= 0 && reg <= 47;
946 /* Switch to section NAME and create section if necessary. It's
947 rather ugly that we have to manipulate input_line_pointer but I
948 don't see any other way to accomplish the same thing without
949 changing obj-elf.c (which may be the Right Thing, in the end). */
954 char *saved_input_line_pointer;
956 saved_input_line_pointer = input_line_pointer;
957 input_line_pointer = name;
959 input_line_pointer = saved_input_line_pointer;
962 /* Map 's' to SHF_IA_64_SHORT. */
965 ia64_elf_section_letter (letter, ptr_msg)
970 return SHF_IA_64_SHORT;
971 else if (letter == 'o')
972 return SHF_LINK_ORDER;
974 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
978 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
981 ia64_elf_section_flags (flags, attr, type)
983 int attr, type ATTRIBUTE_UNUSED;
985 if (attr & SHF_IA_64_SHORT)
986 flags |= SEC_SMALL_DATA;
991 ia64_elf_section_type (str, len)
995 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
997 if (STREQ (ELF_STRING_ia64_unwind_info))
1000 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1001 return SHT_PROGBITS;
1003 if (STREQ (ELF_STRING_ia64_unwind))
1004 return SHT_IA_64_UNWIND;
1006 if (STREQ (ELF_STRING_ia64_unwind_once))
1007 return SHT_IA_64_UNWIND;
1009 if (STREQ ("unwind"))
1010 return SHT_IA_64_UNWIND;
1017 set_regstack (ins, locs, outs, rots)
1018 unsigned int ins, locs, outs, rots;
1020 /* Size of frame. */
1023 sof = ins + locs + outs;
1026 as_bad ("Size of frame exceeds maximum of 96 registers");
1031 as_warn ("Size of rotating registers exceeds frame size");
1034 md.in.base = REG_GR + 32;
1035 md.loc.base = md.in.base + ins;
1036 md.out.base = md.loc.base + locs;
1038 md.in.num_regs = ins;
1039 md.loc.num_regs = locs;
1040 md.out.num_regs = outs;
1041 md.rot.num_regs = rots;
1048 struct label_fix *lfix;
1050 subsegT saved_subseg;
1053 if (!md.last_text_seg)
1056 saved_seg = now_seg;
1057 saved_subseg = now_subseg;
1059 subseg_set (md.last_text_seg, 0);
1061 while (md.num_slots_in_use > 0)
1062 emit_one_bundle (); /* force out queued instructions */
1064 /* In case there are labels following the last instruction, resolve
1066 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1068 S_SET_VALUE (lfix->sym, frag_now_fix ());
1069 symbol_set_frag (lfix->sym, frag_now);
1071 CURR_SLOT.label_fixups = 0;
1072 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1074 S_SET_VALUE (lfix->sym, frag_now_fix ());
1075 symbol_set_frag (lfix->sym, frag_now);
1077 CURR_SLOT.tag_fixups = 0;
1079 /* In case there are unwind directives following the last instruction,
1080 resolve those now. We only handle prologue, body, and endp directives
1081 here. Give an error for others. */
1082 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1084 switch (ptr->r.type)
1090 ptr->slot_number = (unsigned long) frag_more (0);
1091 ptr->slot_frag = frag_now;
1094 /* Allow any record which doesn't have a "t" field (i.e.,
1095 doesn't relate to a particular instruction). */
1111 as_bad (_("Unwind directive not followed by an instruction."));
1115 unwind.current_entry = NULL;
1117 subseg_set (saved_seg, saved_subseg);
1119 if (md.qp.X_op == O_register)
1120 as_bad ("qualifying predicate not followed by instruction");
1124 ia64_do_align (int nbytes)
1126 char *saved_input_line_pointer = input_line_pointer;
1128 input_line_pointer = "";
1129 s_align_bytes (nbytes);
1130 input_line_pointer = saved_input_line_pointer;
1134 ia64_cons_align (nbytes)
1139 char *saved_input_line_pointer = input_line_pointer;
1140 input_line_pointer = "";
1141 s_align_bytes (nbytes);
1142 input_line_pointer = saved_input_line_pointer;
1146 /* Output COUNT bytes to a memory location. */
1147 static unsigned char *vbyte_mem_ptr = NULL;
1150 output_vbyte_mem (count, ptr, comment)
1153 char *comment ATTRIBUTE_UNUSED;
1156 if (vbyte_mem_ptr == NULL)
1161 for (x = 0; x < count; x++)
1162 *(vbyte_mem_ptr++) = ptr[x];
1165 /* Count the number of bytes required for records. */
1166 static int vbyte_count = 0;
1168 count_output (count, ptr, comment)
1170 char *ptr ATTRIBUTE_UNUSED;
1171 char *comment ATTRIBUTE_UNUSED;
1173 vbyte_count += count;
1177 output_R1_format (f, rtype, rlen)
1179 unw_record_type rtype;
1186 output_R3_format (f, rtype, rlen);
1192 else if (rtype != prologue)
1193 as_bad ("record type is not valid");
1195 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1196 (*f) (1, &byte, NULL);
1200 output_R2_format (f, mask, grsave, rlen)
1207 mask = (mask & 0x0f);
1208 grsave = (grsave & 0x7f);
1210 bytes[0] = (UNW_R2 | (mask >> 1));
1211 bytes[1] = (((mask & 0x01) << 7) | grsave);
1212 count += output_leb128 (bytes + 2, rlen, 0);
1213 (*f) (count, bytes, NULL);
1217 output_R3_format (f, rtype, rlen)
1219 unw_record_type rtype;
1226 output_R1_format (f, rtype, rlen);
1232 else if (rtype != prologue)
1233 as_bad ("record type is not valid");
1234 bytes[0] = (UNW_R3 | r);
1235 count = output_leb128 (bytes + 1, rlen, 0);
1236 (*f) (count + 1, bytes, NULL);
1240 output_P1_format (f, brmask)
1245 byte = UNW_P1 | (brmask & 0x1f);
1246 (*f) (1, &byte, NULL);
1250 output_P2_format (f, brmask, gr)
1256 brmask = (brmask & 0x1f);
1257 bytes[0] = UNW_P2 | (brmask >> 1);
1258 bytes[1] = (((brmask & 1) << 7) | gr);
1259 (*f) (2, bytes, NULL);
1263 output_P3_format (f, rtype, reg)
1265 unw_record_type rtype;
1310 as_bad ("Invalid record type for P3 format.");
1312 bytes[0] = (UNW_P3 | (r >> 1));
1313 bytes[1] = (((r & 1) << 7) | reg);
1314 (*f) (2, bytes, NULL);
1318 output_P4_format (f, imask, imask_size)
1320 unsigned char *imask;
1321 unsigned long imask_size;
1324 (*f) (imask_size, imask, NULL);
1328 output_P5_format (f, grmask, frmask)
1331 unsigned long frmask;
1334 grmask = (grmask & 0x0f);
1337 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1338 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1339 bytes[3] = (frmask & 0x000000ff);
1340 (*f) (4, bytes, NULL);
1344 output_P6_format (f, rtype, rmask)
1346 unw_record_type rtype;
1352 if (rtype == gr_mem)
1354 else if (rtype != fr_mem)
1355 as_bad ("Invalid record type for format P6");
1356 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1357 (*f) (1, &byte, NULL);
1361 output_P7_format (f, rtype, w1, w2)
1363 unw_record_type rtype;
1370 count += output_leb128 (bytes + 1, w1, 0);
1375 count += output_leb128 (bytes + count, w2 >> 4, 0);
1425 bytes[0] = (UNW_P7 | r);
1426 (*f) (count, bytes, NULL);
1430 output_P8_format (f, rtype, t)
1432 unw_record_type rtype;
1471 case bspstore_psprel:
1474 case bspstore_sprel:
1486 case priunat_when_gr:
1489 case priunat_psprel:
1495 case priunat_when_mem:
1502 count += output_leb128 (bytes + 2, t, 0);
1503 (*f) (count, bytes, NULL);
1507 output_P9_format (f, grmask, gr)
1514 bytes[1] = (grmask & 0x0f);
1515 bytes[2] = (gr & 0x7f);
1516 (*f) (3, bytes, NULL);
1520 output_P10_format (f, abi, context)
1527 bytes[1] = (abi & 0xff);
1528 bytes[2] = (context & 0xff);
1529 (*f) (3, bytes, NULL);
1533 output_B1_format (f, rtype, label)
1535 unw_record_type rtype;
1536 unsigned long label;
1542 output_B4_format (f, rtype, label);
1545 if (rtype == copy_state)
1547 else if (rtype != label_state)
1548 as_bad ("Invalid record type for format B1");
1550 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1551 (*f) (1, &byte, NULL);
1555 output_B2_format (f, ecount, t)
1557 unsigned long ecount;
1564 output_B3_format (f, ecount, t);
1567 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1568 count += output_leb128 (bytes + 1, t, 0);
1569 (*f) (count, bytes, NULL);
1573 output_B3_format (f, ecount, t)
1575 unsigned long ecount;
1582 output_B2_format (f, ecount, t);
1586 count += output_leb128 (bytes + 1, t, 0);
1587 count += output_leb128 (bytes + count, ecount, 0);
1588 (*f) (count, bytes, NULL);
1592 output_B4_format (f, rtype, label)
1594 unw_record_type rtype;
1595 unsigned long label;
1602 output_B1_format (f, rtype, label);
1606 if (rtype == copy_state)
1608 else if (rtype != label_state)
1609 as_bad ("Invalid record type for format B1");
1611 bytes[0] = (UNW_B4 | (r << 3));
1612 count += output_leb128 (bytes + 1, label, 0);
1613 (*f) (count, bytes, NULL);
1617 format_ab_reg (ab, reg)
1624 ret = (ab << 5) | reg;
1629 output_X1_format (f, rtype, ab, reg, t, w1)
1631 unw_record_type rtype;
1641 if (rtype == spill_sprel)
1643 else if (rtype != spill_psprel)
1644 as_bad ("Invalid record type for format X1");
1645 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1646 count += output_leb128 (bytes + 2, t, 0);
1647 count += output_leb128 (bytes + count, w1, 0);
1648 (*f) (count, bytes, NULL);
1652 output_X2_format (f, ab, reg, x, y, treg, t)
1661 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1662 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1663 count += output_leb128 (bytes + 3, t, 0);
1664 (*f) (count, bytes, NULL);
1668 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1670 unw_record_type rtype;
1681 if (rtype == spill_sprel_p)
1683 else if (rtype != spill_psprel_p)
1684 as_bad ("Invalid record type for format X3");
1685 bytes[1] = ((r << 7) | (qp & 0x3f));
1686 bytes[2] = format_ab_reg (ab, reg);
1687 count += output_leb128 (bytes + 3, t, 0);
1688 count += output_leb128 (bytes + count, w1, 0);
1689 (*f) (count, bytes, NULL);
1693 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1703 bytes[1] = (qp & 0x3f);
1704 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1705 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1706 count += output_leb128 (bytes + 4, t, 0);
1707 (*f) (count, bytes, NULL);
1710 /* This function allocates a record list structure, and initializes fields. */
1712 static unw_rec_list *
1713 alloc_record (unw_record_type t)
1716 ptr = xmalloc (sizeof (*ptr));
1718 ptr->slot_number = SLOT_NUM_NOT_SET;
1720 ptr->next_slot_number = 0;
1721 ptr->next_slot_frag = 0;
1725 /* Dummy unwind record used for calculating the length of the last prologue or
1728 static unw_rec_list *
1731 unw_rec_list *ptr = alloc_record (endp);
1735 static unw_rec_list *
1738 unw_rec_list *ptr = alloc_record (prologue);
1739 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1743 static unw_rec_list *
1744 output_prologue_gr (saved_mask, reg)
1745 unsigned int saved_mask;
1748 unw_rec_list *ptr = alloc_record (prologue_gr);
1749 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1750 ptr->r.record.r.grmask = saved_mask;
1751 ptr->r.record.r.grsave = reg;
1755 static unw_rec_list *
1758 unw_rec_list *ptr = alloc_record (body);
1762 static unw_rec_list *
1763 output_mem_stack_f (size)
1766 unw_rec_list *ptr = alloc_record (mem_stack_f);
1767 ptr->r.record.p.size = size;
1771 static unw_rec_list *
1772 output_mem_stack_v ()
1774 unw_rec_list *ptr = alloc_record (mem_stack_v);
1778 static unw_rec_list *
1782 unw_rec_list *ptr = alloc_record (psp_gr);
1783 ptr->r.record.p.gr = gr;
1787 static unw_rec_list *
1788 output_psp_sprel (offset)
1789 unsigned int offset;
1791 unw_rec_list *ptr = alloc_record (psp_sprel);
1792 ptr->r.record.p.spoff = offset / 4;
1796 static unw_rec_list *
1799 unw_rec_list *ptr = alloc_record (rp_when);
1803 static unw_rec_list *
1807 unw_rec_list *ptr = alloc_record (rp_gr);
1808 ptr->r.record.p.gr = gr;
1812 static unw_rec_list *
1816 unw_rec_list *ptr = alloc_record (rp_br);
1817 ptr->r.record.p.br = br;
1821 static unw_rec_list *
1822 output_rp_psprel (offset)
1823 unsigned int offset;
1825 unw_rec_list *ptr = alloc_record (rp_psprel);
1826 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1830 static unw_rec_list *
1831 output_rp_sprel (offset)
1832 unsigned int offset;
1834 unw_rec_list *ptr = alloc_record (rp_sprel);
1835 ptr->r.record.p.spoff = offset / 4;
1839 static unw_rec_list *
1842 unw_rec_list *ptr = alloc_record (pfs_when);
1846 static unw_rec_list *
1850 unw_rec_list *ptr = alloc_record (pfs_gr);
1851 ptr->r.record.p.gr = gr;
1855 static unw_rec_list *
1856 output_pfs_psprel (offset)
1857 unsigned int offset;
1859 unw_rec_list *ptr = alloc_record (pfs_psprel);
1860 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1864 static unw_rec_list *
1865 output_pfs_sprel (offset)
1866 unsigned int offset;
1868 unw_rec_list *ptr = alloc_record (pfs_sprel);
1869 ptr->r.record.p.spoff = offset / 4;
1873 static unw_rec_list *
1874 output_preds_when ()
1876 unw_rec_list *ptr = alloc_record (preds_when);
1880 static unw_rec_list *
1881 output_preds_gr (gr)
1884 unw_rec_list *ptr = alloc_record (preds_gr);
1885 ptr->r.record.p.gr = gr;
1889 static unw_rec_list *
1890 output_preds_psprel (offset)
1891 unsigned int offset;
1893 unw_rec_list *ptr = alloc_record (preds_psprel);
1894 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1898 static unw_rec_list *
1899 output_preds_sprel (offset)
1900 unsigned int offset;
1902 unw_rec_list *ptr = alloc_record (preds_sprel);
1903 ptr->r.record.p.spoff = offset / 4;
1907 static unw_rec_list *
1908 output_fr_mem (mask)
1911 unw_rec_list *ptr = alloc_record (fr_mem);
1912 ptr->r.record.p.rmask = mask;
1916 static unw_rec_list *
1917 output_frgr_mem (gr_mask, fr_mask)
1918 unsigned int gr_mask;
1919 unsigned int fr_mask;
1921 unw_rec_list *ptr = alloc_record (frgr_mem);
1922 ptr->r.record.p.grmask = gr_mask;
1923 ptr->r.record.p.frmask = fr_mask;
1927 static unw_rec_list *
1928 output_gr_gr (mask, reg)
1932 unw_rec_list *ptr = alloc_record (gr_gr);
1933 ptr->r.record.p.grmask = mask;
1934 ptr->r.record.p.gr = reg;
1938 static unw_rec_list *
1939 output_gr_mem (mask)
1942 unw_rec_list *ptr = alloc_record (gr_mem);
1943 ptr->r.record.p.rmask = mask;
1947 static unw_rec_list *
1948 output_br_mem (unsigned int mask)
1950 unw_rec_list *ptr = alloc_record (br_mem);
1951 ptr->r.record.p.brmask = mask;
1955 static unw_rec_list *
1956 output_br_gr (save_mask, reg)
1957 unsigned int save_mask;
1960 unw_rec_list *ptr = alloc_record (br_gr);
1961 ptr->r.record.p.brmask = save_mask;
1962 ptr->r.record.p.gr = reg;
1966 static unw_rec_list *
1967 output_spill_base (offset)
1968 unsigned int offset;
1970 unw_rec_list *ptr = alloc_record (spill_base);
1971 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1975 static unw_rec_list *
1978 unw_rec_list *ptr = alloc_record (unat_when);
1982 static unw_rec_list *
1986 unw_rec_list *ptr = alloc_record (unat_gr);
1987 ptr->r.record.p.gr = gr;
1991 static unw_rec_list *
1992 output_unat_psprel (offset)
1993 unsigned int offset;
1995 unw_rec_list *ptr = alloc_record (unat_psprel);
1996 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2000 static unw_rec_list *
2001 output_unat_sprel (offset)
2002 unsigned int offset;
2004 unw_rec_list *ptr = alloc_record (unat_sprel);
2005 ptr->r.record.p.spoff = offset / 4;
2009 static unw_rec_list *
2012 unw_rec_list *ptr = alloc_record (lc_when);
2016 static unw_rec_list *
2020 unw_rec_list *ptr = alloc_record (lc_gr);
2021 ptr->r.record.p.gr = gr;
2025 static unw_rec_list *
2026 output_lc_psprel (offset)
2027 unsigned int offset;
2029 unw_rec_list *ptr = alloc_record (lc_psprel);
2030 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2034 static unw_rec_list *
2035 output_lc_sprel (offset)
2036 unsigned int offset;
2038 unw_rec_list *ptr = alloc_record (lc_sprel);
2039 ptr->r.record.p.spoff = offset / 4;
2043 static unw_rec_list *
2046 unw_rec_list *ptr = alloc_record (fpsr_when);
2050 static unw_rec_list *
2054 unw_rec_list *ptr = alloc_record (fpsr_gr);
2055 ptr->r.record.p.gr = gr;
2059 static unw_rec_list *
2060 output_fpsr_psprel (offset)
2061 unsigned int offset;
2063 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2064 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2068 static unw_rec_list *
2069 output_fpsr_sprel (offset)
2070 unsigned int offset;
2072 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2073 ptr->r.record.p.spoff = offset / 4;
2077 static unw_rec_list *
2078 output_priunat_when_gr ()
2080 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2084 static unw_rec_list *
2085 output_priunat_when_mem ()
2087 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2091 static unw_rec_list *
2092 output_priunat_gr (gr)
2095 unw_rec_list *ptr = alloc_record (priunat_gr);
2096 ptr->r.record.p.gr = gr;
2100 static unw_rec_list *
2101 output_priunat_psprel (offset)
2102 unsigned int offset;
2104 unw_rec_list *ptr = alloc_record (priunat_psprel);
2105 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2109 static unw_rec_list *
2110 output_priunat_sprel (offset)
2111 unsigned int offset;
2113 unw_rec_list *ptr = alloc_record (priunat_sprel);
2114 ptr->r.record.p.spoff = offset / 4;
2118 static unw_rec_list *
2121 unw_rec_list *ptr = alloc_record (bsp_when);
2125 static unw_rec_list *
2129 unw_rec_list *ptr = alloc_record (bsp_gr);
2130 ptr->r.record.p.gr = gr;
2134 static unw_rec_list *
2135 output_bsp_psprel (offset)
2136 unsigned int offset;
2138 unw_rec_list *ptr = alloc_record (bsp_psprel);
2139 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2143 static unw_rec_list *
2144 output_bsp_sprel (offset)
2145 unsigned int offset;
2147 unw_rec_list *ptr = alloc_record (bsp_sprel);
2148 ptr->r.record.p.spoff = offset / 4;
2152 static unw_rec_list *
2153 output_bspstore_when ()
2155 unw_rec_list *ptr = alloc_record (bspstore_when);
2159 static unw_rec_list *
2160 output_bspstore_gr (gr)
2163 unw_rec_list *ptr = alloc_record (bspstore_gr);
2164 ptr->r.record.p.gr = gr;
2168 static unw_rec_list *
2169 output_bspstore_psprel (offset)
2170 unsigned int offset;
2172 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2173 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2177 static unw_rec_list *
2178 output_bspstore_sprel (offset)
2179 unsigned int offset;
2181 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2182 ptr->r.record.p.spoff = offset / 4;
2186 static unw_rec_list *
2189 unw_rec_list *ptr = alloc_record (rnat_when);
2193 static unw_rec_list *
2197 unw_rec_list *ptr = alloc_record (rnat_gr);
2198 ptr->r.record.p.gr = gr;
2202 static unw_rec_list *
2203 output_rnat_psprel (offset)
2204 unsigned int offset;
2206 unw_rec_list *ptr = alloc_record (rnat_psprel);
2207 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2211 static unw_rec_list *
2212 output_rnat_sprel (offset)
2213 unsigned int offset;
2215 unw_rec_list *ptr = alloc_record (rnat_sprel);
2216 ptr->r.record.p.spoff = offset / 4;
2220 static unw_rec_list *
2221 output_unwabi (abi, context)
2223 unsigned long context;
2225 unw_rec_list *ptr = alloc_record (unwabi);
2226 ptr->r.record.p.abi = abi;
2227 ptr->r.record.p.context = context;
2231 static unw_rec_list *
2232 output_epilogue (unsigned long ecount)
2234 unw_rec_list *ptr = alloc_record (epilogue);
2235 ptr->r.record.b.ecount = ecount;
2239 static unw_rec_list *
2240 output_label_state (unsigned long label)
2242 unw_rec_list *ptr = alloc_record (label_state);
2243 ptr->r.record.b.label = label;
2247 static unw_rec_list *
2248 output_copy_state (unsigned long label)
2250 unw_rec_list *ptr = alloc_record (copy_state);
2251 ptr->r.record.b.label = label;
2255 static unw_rec_list *
2256 output_spill_psprel (ab, reg, offset)
2259 unsigned int offset;
2261 unw_rec_list *ptr = alloc_record (spill_psprel);
2262 ptr->r.record.x.ab = ab;
2263 ptr->r.record.x.reg = reg;
2264 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2268 static unw_rec_list *
2269 output_spill_sprel (ab, reg, offset)
2272 unsigned int offset;
2274 unw_rec_list *ptr = alloc_record (spill_sprel);
2275 ptr->r.record.x.ab = ab;
2276 ptr->r.record.x.reg = reg;
2277 ptr->r.record.x.spoff = offset / 4;
2281 static unw_rec_list *
2282 output_spill_psprel_p (ab, reg, offset, predicate)
2285 unsigned int offset;
2286 unsigned int predicate;
2288 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2289 ptr->r.record.x.ab = ab;
2290 ptr->r.record.x.reg = reg;
2291 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2292 ptr->r.record.x.qp = predicate;
2296 static unw_rec_list *
2297 output_spill_sprel_p (ab, reg, offset, predicate)
2300 unsigned int offset;
2301 unsigned int predicate;
2303 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2304 ptr->r.record.x.ab = ab;
2305 ptr->r.record.x.reg = reg;
2306 ptr->r.record.x.spoff = offset / 4;
2307 ptr->r.record.x.qp = predicate;
2311 static unw_rec_list *
2312 output_spill_reg (ab, reg, targ_reg, xy)
2315 unsigned int targ_reg;
2318 unw_rec_list *ptr = alloc_record (spill_reg);
2319 ptr->r.record.x.ab = ab;
2320 ptr->r.record.x.reg = reg;
2321 ptr->r.record.x.treg = targ_reg;
2322 ptr->r.record.x.xy = xy;
2326 static unw_rec_list *
2327 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2330 unsigned int targ_reg;
2332 unsigned int predicate;
2334 unw_rec_list *ptr = alloc_record (spill_reg_p);
2335 ptr->r.record.x.ab = ab;
2336 ptr->r.record.x.reg = reg;
2337 ptr->r.record.x.treg = targ_reg;
2338 ptr->r.record.x.xy = xy;
2339 ptr->r.record.x.qp = predicate;
2343 /* Given a unw_rec_list process the correct format with the
2344 specified function. */
2347 process_one_record (ptr, f)
2351 unsigned long fr_mask, gr_mask;
2353 switch (ptr->r.type)
2355 /* This is a dummy record that takes up no space in the output. */
2363 /* These are taken care of by prologue/prologue_gr. */
2368 if (ptr->r.type == prologue_gr)
2369 output_R2_format (f, ptr->r.record.r.grmask,
2370 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2372 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2374 /* Output descriptor(s) for union of register spills (if any). */
2375 gr_mask = ptr->r.record.r.mask.gr_mem;
2376 fr_mask = ptr->r.record.r.mask.fr_mem;
2379 if ((fr_mask & ~0xfUL) == 0)
2380 output_P6_format (f, fr_mem, fr_mask);
2383 output_P5_format (f, gr_mask, fr_mask);
2388 output_P6_format (f, gr_mem, gr_mask);
2389 if (ptr->r.record.r.mask.br_mem)
2390 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2392 /* output imask descriptor if necessary: */
2393 if (ptr->r.record.r.mask.i)
2394 output_P4_format (f, ptr->r.record.r.mask.i,
2395 ptr->r.record.r.imask_size);
2399 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2403 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2404 ptr->r.record.p.size);
2417 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2420 output_P3_format (f, rp_br, ptr->r.record.p.br);
2423 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2431 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2440 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2450 case bspstore_sprel:
2452 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2455 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2458 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2461 as_bad ("spill_mask record unimplemented.");
2463 case priunat_when_gr:
2464 case priunat_when_mem:
2468 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2470 case priunat_psprel:
2472 case bspstore_psprel:
2474 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2477 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2480 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2484 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2487 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2488 ptr->r.record.x.reg, ptr->r.record.x.t,
2489 ptr->r.record.x.pspoff);
2492 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2493 ptr->r.record.x.reg, ptr->r.record.x.t,
2494 ptr->r.record.x.spoff);
2497 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2498 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2499 ptr->r.record.x.treg, ptr->r.record.x.t);
2501 case spill_psprel_p:
2502 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2503 ptr->r.record.x.ab, ptr->r.record.x.reg,
2504 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2507 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2508 ptr->r.record.x.ab, ptr->r.record.x.reg,
2509 ptr->r.record.x.t, ptr->r.record.x.spoff);
2512 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2513 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2514 ptr->r.record.x.xy, ptr->r.record.x.treg,
2518 as_bad ("record_type_not_valid");
2523 /* Given a unw_rec_list list, process all the records with
2524 the specified function. */
2526 process_unw_records (list, f)
2531 for (ptr = list; ptr; ptr = ptr->next)
2532 process_one_record (ptr, f);
2535 /* Determine the size of a record list in bytes. */
2537 calc_record_size (list)
2541 process_unw_records (list, count_output);
2545 /* Update IMASK bitmask to reflect the fact that one or more registers
2546 of type TYPE are saved starting at instruction with index T. If N
2547 bits are set in REGMASK, it is assumed that instructions T through
2548 T+N-1 save these registers.
2552 1: instruction saves next fp reg
2553 2: instruction saves next general reg
2554 3: instruction saves next branch reg */
2556 set_imask (region, regmask, t, type)
2557 unw_rec_list *region;
2558 unsigned long regmask;
2562 unsigned char *imask;
2563 unsigned long imask_size;
2567 imask = region->r.record.r.mask.i;
2568 imask_size = region->r.record.r.imask_size;
2571 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2572 imask = xmalloc (imask_size);
2573 memset (imask, 0, imask_size);
2575 region->r.record.r.imask_size = imask_size;
2576 region->r.record.r.mask.i = imask;
2580 pos = 2 * (3 - t % 4);
2583 if (i >= imask_size)
2585 as_bad ("Ignoring attempt to spill beyond end of region");
2589 imask[i] |= (type & 0x3) << pos;
2591 regmask &= (regmask - 1);
2601 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2602 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2603 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2607 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2608 unsigned long slot_addr;
2610 unsigned long first_addr;
2614 unsigned long index = 0;
2616 /* First time we are called, the initial address and frag are invalid. */
2617 if (first_addr == 0)
2620 /* If the two addresses are in different frags, then we need to add in
2621 the remaining size of this frag, and then the entire size of intermediate
2623 while (slot_frag != first_frag)
2625 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2629 /* We can get the final addresses only during and after
2631 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2632 index += 3 * ((first_frag->fr_next->fr_address
2633 - first_frag->fr_address
2634 - first_frag->fr_fix) >> 4);
2637 /* We don't know what the final addresses will be. We try our
2638 best to estimate. */
2639 switch (first_frag->fr_type)
2645 as_fatal ("only constant space allocation is supported");
2651 /* Take alignment into account. Assume the worst case
2652 before relaxation. */
2653 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2657 if (first_frag->fr_symbol)
2659 as_fatal ("only constant offsets are supported");
2663 index += 3 * (first_frag->fr_offset >> 4);
2667 /* Add in the full size of the frag converted to instruction slots. */
2668 index += 3 * (first_frag->fr_fix >> 4);
2669 /* Subtract away the initial part before first_addr. */
2670 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2671 + ((first_addr & 0x3) - (start_addr & 0x3)));
2673 /* Move to the beginning of the next frag. */
2674 first_frag = first_frag->fr_next;
2675 first_addr = (unsigned long) &first_frag->fr_literal;
2678 /* Add in the used part of the last frag. */
2679 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2680 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2684 /* Optimize unwind record directives. */
2686 static unw_rec_list *
2687 optimize_unw_records (list)
2693 /* If the only unwind record is ".prologue" or ".prologue" followed
2694 by ".body", then we can optimize the unwind directives away. */
2695 if (list->r.type == prologue
2696 && (list->next->r.type == endp
2697 || (list->next->r.type == body && list->next->next->r.type == endp)))
2703 /* Given a complete record list, process any records which have
2704 unresolved fields, (ie length counts for a prologue). After
2705 this has been run, all necessary information should be available
2706 within each record to generate an image. */
2709 fixup_unw_records (list, before_relax)
2713 unw_rec_list *ptr, *region = 0;
2714 unsigned long first_addr = 0, rlen = 0, t;
2715 fragS *first_frag = 0;
2717 for (ptr = list; ptr; ptr = ptr->next)
2719 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2720 as_bad (" Insn slot not set in unwind record.");
2721 t = slot_index (ptr->slot_number, ptr->slot_frag,
2722 first_addr, first_frag, before_relax);
2723 switch (ptr->r.type)
2731 unsigned long last_addr = 0;
2732 fragS *last_frag = NULL;
2734 first_addr = ptr->slot_number;
2735 first_frag = ptr->slot_frag;
2736 /* Find either the next body/prologue start, or the end of
2737 the function, and determine the size of the region. */
2738 for (last = ptr->next; last != NULL; last = last->next)
2739 if (last->r.type == prologue || last->r.type == prologue_gr
2740 || last->r.type == body || last->r.type == endp)
2742 last_addr = last->slot_number;
2743 last_frag = last->slot_frag;
2746 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2748 rlen = ptr->r.record.r.rlen = size;
2749 if (ptr->r.type == body)
2750 /* End of region. */
2758 ptr->r.record.b.t = rlen - 1 - t;
2760 /* This happens when a memory-stack-less procedure uses a
2761 ".restore sp" directive at the end of a region to pop
2763 ptr->r.record.b.t = 0;
2774 case priunat_when_gr:
2775 case priunat_when_mem:
2779 ptr->r.record.p.t = t;
2787 case spill_psprel_p:
2788 ptr->r.record.x.t = t;
2794 as_bad ("frgr_mem record before region record!");
2797 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2798 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2799 set_imask (region, ptr->r.record.p.frmask, t, 1);
2800 set_imask (region, ptr->r.record.p.grmask, t, 2);
2805 as_bad ("fr_mem record before region record!");
2808 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2809 set_imask (region, ptr->r.record.p.rmask, t, 1);
2814 as_bad ("gr_mem record before region record!");
2817 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2818 set_imask (region, ptr->r.record.p.rmask, t, 2);
2823 as_bad ("br_mem record before region record!");
2826 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2827 set_imask (region, ptr->r.record.p.brmask, t, 3);
2833 as_bad ("gr_gr record before region record!");
2836 set_imask (region, ptr->r.record.p.grmask, t, 2);
2841 as_bad ("br_gr record before region record!");
2844 set_imask (region, ptr->r.record.p.brmask, t, 3);
2853 /* Estimate the size of a frag before relaxing. We only have one type of frag
2854 to handle here, which is the unwind info frag. */
2857 ia64_estimate_size_before_relax (fragS *frag,
2858 asection *segtype ATTRIBUTE_UNUSED)
2863 /* ??? This code is identical to the first part of ia64_convert_frag. */
2864 list = (unw_rec_list *) frag->fr_opcode;
2865 fixup_unw_records (list, 0);
2867 len = calc_record_size (list);
2868 /* pad to pointer-size boundary. */
2869 pad = len % md.pointer_size;
2871 len += md.pointer_size - pad;
2872 /* Add 8 for the header. */
2874 /* Add a pointer for the personality offset. */
2875 if (frag->fr_offset)
2876 size += md.pointer_size;
2878 /* fr_var carries the max_chars that we created the fragment with.
2879 We must, of course, have allocated enough memory earlier. */
2880 assert (frag->fr_var >= size);
2882 return frag->fr_fix + size;
2885 /* This function converts a rs_machine_dependent variant frag into a
2886 normal fill frag with the unwind image from the the record list. */
2888 ia64_convert_frag (fragS *frag)
2894 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2895 list = (unw_rec_list *) frag->fr_opcode;
2896 fixup_unw_records (list, 0);
2898 len = calc_record_size (list);
2899 /* pad to pointer-size boundary. */
2900 pad = len % md.pointer_size;
2902 len += md.pointer_size - pad;
2903 /* Add 8 for the header. */
2905 /* Add a pointer for the personality offset. */
2906 if (frag->fr_offset)
2907 size += md.pointer_size;
2909 /* fr_var carries the max_chars that we created the fragment with.
2910 We must, of course, have allocated enough memory earlier. */
2911 assert (frag->fr_var >= size);
2913 /* Initialize the header area. fr_offset is initialized with
2914 unwind.personality_routine. */
2915 if (frag->fr_offset)
2917 if (md.flags & EF_IA_64_ABI64)
2918 flag_value = (bfd_vma) 3 << 32;
2920 /* 32-bit unwind info block. */
2921 flag_value = (bfd_vma) 0x1003 << 32;
2926 md_number_to_chars (frag->fr_literal,
2927 (((bfd_vma) 1 << 48) /* Version. */
2928 | flag_value /* U & E handler flags. */
2929 | (len / md.pointer_size)), /* Length. */
2932 /* Skip the header. */
2933 vbyte_mem_ptr = frag->fr_literal + 8;
2934 process_unw_records (list, output_vbyte_mem);
2936 /* Fill the padding bytes with zeros. */
2938 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2939 md.pointer_size - pad);
2941 frag->fr_fix += size;
2942 frag->fr_type = rs_fill;
2944 frag->fr_offset = 0;
2948 convert_expr_to_ab_reg (e, ab, regp)
2955 if (e->X_op != O_register)
2958 reg = e->X_add_number;
2959 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2962 *regp = reg - REG_GR;
2964 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2965 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2968 *regp = reg - REG_FR;
2970 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2973 *regp = reg - REG_BR;
2980 case REG_PR: *regp = 0; break;
2981 case REG_PSP: *regp = 1; break;
2982 case REG_PRIUNAT: *regp = 2; break;
2983 case REG_BR + 0: *regp = 3; break;
2984 case REG_AR + AR_BSP: *regp = 4; break;
2985 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2986 case REG_AR + AR_RNAT: *regp = 6; break;
2987 case REG_AR + AR_UNAT: *regp = 7; break;
2988 case REG_AR + AR_FPSR: *regp = 8; break;
2989 case REG_AR + AR_PFS: *regp = 9; break;
2990 case REG_AR + AR_LC: *regp = 10; break;
3000 convert_expr_to_xy_reg (e, xy, regp)
3007 if (e->X_op != O_register)
3010 reg = e->X_add_number;
3012 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3015 *regp = reg - REG_GR;
3017 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3020 *regp = reg - REG_FR;
3022 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3025 *regp = reg - REG_BR;
3035 /* The current frag is an alignment frag. */
3036 align_frag = frag_now;
3037 s_align_bytes (arg);
3042 int dummy ATTRIBUTE_UNUSED;
3047 radix = *input_line_pointer++;
3049 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3051 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3052 ignore_rest_of_line ();
3057 /* Helper function for .loc directives. If the assembler is not generating
3058 line number info, then we need to remember which instructions have a .loc
3059 directive, and only call dwarf2_gen_line_info for those instructions. */
3064 CURR_SLOT.loc_directive_seen = 1;
3065 dwarf2_directive_loc (x);
3068 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3070 dot_special_section (which)
3073 set_section ((char *) special_section_name[which]);
3076 /* Return -1 for warning and 0 for error. */
3079 unwind_diagnostic (const char * region, const char *directive)
3081 if (md.unwind_check == unwind_check_warning)
3083 as_warn (".%s outside of %s", directive, region);
3088 as_bad (".%s outside of %s", directive, region);
3089 ignore_rest_of_line ();
3094 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3095 a procedure but the unwind directive check is set to warning, 0 if
3096 a directive isn't in a procedure and the unwind directive check is set
3100 in_procedure (const char *directive)
3102 if (unwind.proc_start
3103 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3105 return unwind_diagnostic ("procedure", directive);
3108 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3109 a prologue but the unwind directive check is set to warning, 0 if
3110 a directive isn't in a prologue and the unwind directive check is set
3114 in_prologue (const char *directive)
3116 int in = in_procedure (directive);
3119 /* We are in a procedure. Check if we are in a prologue. */
3120 if (unwind.prologue)
3122 /* We only want to issue one message. */
3124 return unwind_diagnostic ("prologue", directive);
3131 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3132 a body but the unwind directive check is set to warning, 0 if
3133 a directive isn't in a body and the unwind directive check is set
3137 in_body (const char *directive)
3139 int in = in_procedure (directive);
3142 /* We are in a procedure. Check if we are in a body. */
3145 /* We only want to issue one message. */
3147 return unwind_diagnostic ("body region", directive);
3155 add_unwind_entry (ptr)
3159 unwind.tail->next = ptr;
3164 /* The current entry can in fact be a chain of unwind entries. */
3165 if (unwind.current_entry == NULL)
3166 unwind.current_entry = ptr;
3171 int dummy ATTRIBUTE_UNUSED;
3175 if (!in_prologue ("fframe"))
3180 if (e.X_op != O_constant)
3181 as_bad ("Operand to .fframe must be a constant");
3183 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3188 int dummy ATTRIBUTE_UNUSED;
3193 if (!in_prologue ("vframe"))
3197 reg = e.X_add_number - REG_GR;
3198 if (e.X_op == O_register && reg < 128)
3200 add_unwind_entry (output_mem_stack_v ());
3201 if (! (unwind.prologue_mask & 2))
3202 add_unwind_entry (output_psp_gr (reg));
3205 as_bad ("First operand to .vframe must be a general register");
3209 dot_vframesp (dummy)
3210 int dummy ATTRIBUTE_UNUSED;
3214 if (!in_prologue ("vframesp"))
3218 if (e.X_op == O_constant)
3220 add_unwind_entry (output_mem_stack_v ());
3221 add_unwind_entry (output_psp_sprel (e.X_add_number));
3224 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3228 dot_vframepsp (dummy)
3229 int dummy ATTRIBUTE_UNUSED;
3233 if (!in_prologue ("vframepsp"))
3237 if (e.X_op == O_constant)
3239 add_unwind_entry (output_mem_stack_v ());
3240 add_unwind_entry (output_psp_sprel (e.X_add_number));
3243 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3248 int dummy ATTRIBUTE_UNUSED;
3254 if (!in_prologue ("save"))
3257 sep = parse_operand (&e1);
3259 as_bad ("No second operand to .save");
3260 sep = parse_operand (&e2);
3262 reg1 = e1.X_add_number;
3263 reg2 = e2.X_add_number - REG_GR;
3265 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3266 if (e1.X_op == O_register)
3268 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3272 case REG_AR + AR_BSP:
3273 add_unwind_entry (output_bsp_when ());
3274 add_unwind_entry (output_bsp_gr (reg2));
3276 case REG_AR + AR_BSPSTORE:
3277 add_unwind_entry (output_bspstore_when ());
3278 add_unwind_entry (output_bspstore_gr (reg2));
3280 case REG_AR + AR_RNAT:
3281 add_unwind_entry (output_rnat_when ());
3282 add_unwind_entry (output_rnat_gr (reg2));
3284 case REG_AR + AR_UNAT:
3285 add_unwind_entry (output_unat_when ());
3286 add_unwind_entry (output_unat_gr (reg2));
3288 case REG_AR + AR_FPSR:
3289 add_unwind_entry (output_fpsr_when ());
3290 add_unwind_entry (output_fpsr_gr (reg2));
3292 case REG_AR + AR_PFS:
3293 add_unwind_entry (output_pfs_when ());
3294 if (! (unwind.prologue_mask & 4))
3295 add_unwind_entry (output_pfs_gr (reg2));
3297 case REG_AR + AR_LC:
3298 add_unwind_entry (output_lc_when ());
3299 add_unwind_entry (output_lc_gr (reg2));
3302 add_unwind_entry (output_rp_when ());
3303 if (! (unwind.prologue_mask & 8))
3304 add_unwind_entry (output_rp_gr (reg2));
3307 add_unwind_entry (output_preds_when ());
3308 if (! (unwind.prologue_mask & 1))
3309 add_unwind_entry (output_preds_gr (reg2));
3312 add_unwind_entry (output_priunat_when_gr ());
3313 add_unwind_entry (output_priunat_gr (reg2));
3316 as_bad ("First operand not a valid register");
3320 as_bad (" Second operand not a valid register");
3323 as_bad ("First operand not a register");
3328 int dummy ATTRIBUTE_UNUSED;
3331 unsigned long ecount; /* # of _additional_ regions to pop */
3334 if (!in_body ("restore"))
3337 sep = parse_operand (&e1);
3338 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3340 as_bad ("First operand to .restore must be stack pointer (sp)");
3346 parse_operand (&e2);
3347 if (e2.X_op != O_constant || e2.X_add_number < 0)
3349 as_bad ("Second operand to .restore must be a constant >= 0");
3352 ecount = e2.X_add_number;
3355 ecount = unwind.prologue_count - 1;
3357 if (ecount >= unwind.prologue_count)
3359 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3360 ecount + 1, unwind.prologue_count);
3364 add_unwind_entry (output_epilogue (ecount));
3366 if (ecount < unwind.prologue_count)
3367 unwind.prologue_count -= ecount + 1;
3369 unwind.prologue_count = 0;
3373 dot_restorereg (dummy)
3374 int dummy ATTRIBUTE_UNUSED;
3376 unsigned int ab, reg;
3379 if (!in_procedure ("restorereg"))
3384 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3386 as_bad ("First operand to .restorereg must be a preserved register");
3389 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3393 dot_restorereg_p (dummy)
3394 int dummy ATTRIBUTE_UNUSED;
3396 unsigned int qp, ab, reg;
3400 if (!in_procedure ("restorereg.p"))
3403 sep = parse_operand (&e1);
3406 as_bad ("No second operand to .restorereg.p");
3410 parse_operand (&e2);
3412 qp = e1.X_add_number - REG_P;
3413 if (e1.X_op != O_register || qp > 63)
3415 as_bad ("First operand to .restorereg.p must be a predicate");
3419 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3421 as_bad ("Second operand to .restorereg.p must be a preserved register");
3424 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3427 static char *special_linkonce_name[] =
3429 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3433 start_unwind_section (const segT text_seg, int sec_index, int linkonce_empty)
3436 Use a slightly ugly scheme to derive the unwind section names from
3437 the text section name:
3439 text sect. unwind table sect.
3440 name: name: comments:
3441 ---------- ----------------- --------------------------------
3443 .text.foo .IA_64.unwind.text.foo
3444 .foo .IA_64.unwind.foo
3446 .gnu.linkonce.ia64unw.foo
3447 _info .IA_64.unwind_info gas issues error message (ditto)
3448 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3450 This mapping is done so that:
3452 (a) An object file with unwind info only in .text will use
3453 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3454 This follows the letter of the ABI and also ensures backwards
3455 compatibility with older toolchains.
3457 (b) An object file with unwind info in multiple text sections
3458 will use separate unwind sections for each text section.
3459 This allows us to properly set the "sh_info" and "sh_link"
3460 fields in SHT_IA_64_UNWIND as required by the ABI and also
3461 lets GNU ld support programs with multiple segments
3462 containing unwind info (as might be the case for certain
3463 embedded applications).
3465 (c) An error is issued if there would be a name clash.
3468 const char *text_name, *sec_text_name;
3470 const char *prefix = special_section_name [sec_index];
3472 size_t prefix_len, suffix_len, sec_name_len;
3474 sec_text_name = segment_name (text_seg);
3475 text_name = sec_text_name;
3476 if (strncmp (text_name, "_info", 5) == 0)
3478 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3480 ignore_rest_of_line ();
3483 if (strcmp (text_name, ".text") == 0)
3486 /* Build the unwind section name by appending the (possibly stripped)
3487 text section name to the unwind prefix. */
3489 if (strncmp (text_name, ".gnu.linkonce.t.",
3490 sizeof (".gnu.linkonce.t.") - 1) == 0)
3492 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3493 suffix += sizeof (".gnu.linkonce.t.") - 1;
3495 else if (linkonce_empty)
3498 prefix_len = strlen (prefix);
3499 suffix_len = strlen (suffix);
3500 sec_name_len = prefix_len + suffix_len;
3501 sec_name = alloca (sec_name_len + 1);
3502 memcpy (sec_name, prefix, prefix_len);
3503 memcpy (sec_name + prefix_len, suffix, suffix_len);
3504 sec_name [sec_name_len] = '\0';
3506 /* Handle COMDAT group. */
3507 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3510 size_t len, group_name_len;
3511 const char *group_name = elf_group_name (text_seg);
3513 if (group_name == NULL)
3515 as_bad ("Group section `%s' has no group signature",
3517 ignore_rest_of_line ();
3520 /* We have to construct a fake section directive. */
3521 group_name_len = strlen (group_name);
3523 + 16 /* ,"aG",@progbits, */
3524 + group_name_len /* ,group_name */
3527 section = alloca (len + 1);
3528 memcpy (section, sec_name, sec_name_len);
3529 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3530 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3531 memcpy (section + len - 7, ",comdat", 7);
3532 section [len] = '\0';
3533 set_section (section);
3537 set_section (sec_name);
3538 bfd_set_section_flags (stdoutput, now_seg,
3539 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3542 elf_linked_to_section (now_seg) = text_seg;
3546 generate_unwind_image (const segT text_seg)
3551 /* Mark the end of the unwind info, so that we can compute the size of the
3552 last unwind region. */
3553 add_unwind_entry (output_endp ());
3555 /* Force out pending instructions, to make sure all unwind records have
3556 a valid slot_number field. */
3557 ia64_flush_insns ();
3559 /* Generate the unwind record. */
3560 list = optimize_unw_records (unwind.list);
3561 fixup_unw_records (list, 1);
3562 size = calc_record_size (list);
3564 if (size > 0 || unwind.force_unwind_entry)
3566 unwind.force_unwind_entry = 0;
3567 /* pad to pointer-size boundary. */
3568 pad = size % md.pointer_size;
3570 size += md.pointer_size - pad;
3571 /* Add 8 for the header. */
3573 /* Add a pointer for the personality offset. */
3574 if (unwind.personality_routine)
3575 size += md.pointer_size;
3578 /* If there are unwind records, switch sections, and output the info. */
3582 bfd_reloc_code_real_type reloc;
3584 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 0);
3586 /* Make sure the section has 4 byte alignment for ILP32 and
3587 8 byte alignment for LP64. */
3588 frag_align (md.pointer_size_shift, 0, 0);
3589 record_alignment (now_seg, md.pointer_size_shift);
3591 /* Set expression which points to start of unwind descriptor area. */
3592 unwind.info = expr_build_dot ();
3594 frag_var (rs_machine_dependent, size, size, 0, 0,
3595 (offsetT) (long) unwind.personality_routine,
3598 /* Add the personality address to the image. */
3599 if (unwind.personality_routine != 0)
3601 exp.X_op = O_symbol;
3602 exp.X_add_symbol = unwind.personality_routine;
3603 exp.X_add_number = 0;
3605 if (md.flags & EF_IA_64_BE)
3607 if (md.flags & EF_IA_64_ABI64)
3608 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3610 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3614 if (md.flags & EF_IA_64_ABI64)
3615 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3617 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3620 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3621 md.pointer_size, &exp, 0, reloc);
3622 unwind.personality_routine = 0;
3626 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO, 1);
3628 free_saved_prologue_counts ();
3629 unwind.list = unwind.tail = unwind.current_entry = NULL;
3633 dot_handlerdata (dummy)
3634 int dummy ATTRIBUTE_UNUSED;
3636 if (!in_procedure ("handlerdata"))
3638 unwind.force_unwind_entry = 1;
3640 /* Remember which segment we're in so we can switch back after .endp */
3641 unwind.saved_text_seg = now_seg;
3642 unwind.saved_text_subseg = now_subseg;
3644 /* Generate unwind info into unwind-info section and then leave that
3645 section as the currently active one so dataXX directives go into
3646 the language specific data area of the unwind info block. */
3647 generate_unwind_image (now_seg);
3648 demand_empty_rest_of_line ();
3652 dot_unwentry (dummy)
3653 int dummy ATTRIBUTE_UNUSED;
3655 if (!in_procedure ("unwentry"))
3657 unwind.force_unwind_entry = 1;
3658 demand_empty_rest_of_line ();
3663 int dummy ATTRIBUTE_UNUSED;
3668 if (!in_prologue ("altrp"))
3672 reg = e.X_add_number - REG_BR;
3673 if (e.X_op == O_register && reg < 8)
3674 add_unwind_entry (output_rp_br (reg));
3676 as_bad ("First operand not a valid branch register");
3680 dot_savemem (psprel)
3687 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3690 sep = parse_operand (&e1);
3692 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3693 sep = parse_operand (&e2);
3695 reg1 = e1.X_add_number;
3696 val = e2.X_add_number;
3698 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3699 if (e1.X_op == O_register)
3701 if (e2.X_op == O_constant)
3705 case REG_AR + AR_BSP:
3706 add_unwind_entry (output_bsp_when ());
3707 add_unwind_entry ((psprel
3709 : output_bsp_sprel) (val));
3711 case REG_AR + AR_BSPSTORE:
3712 add_unwind_entry (output_bspstore_when ());
3713 add_unwind_entry ((psprel
3714 ? output_bspstore_psprel
3715 : output_bspstore_sprel) (val));
3717 case REG_AR + AR_RNAT:
3718 add_unwind_entry (output_rnat_when ());
3719 add_unwind_entry ((psprel
3720 ? output_rnat_psprel
3721 : output_rnat_sprel) (val));
3723 case REG_AR + AR_UNAT:
3724 add_unwind_entry (output_unat_when ());
3725 add_unwind_entry ((psprel
3726 ? output_unat_psprel
3727 : output_unat_sprel) (val));
3729 case REG_AR + AR_FPSR:
3730 add_unwind_entry (output_fpsr_when ());
3731 add_unwind_entry ((psprel
3732 ? output_fpsr_psprel
3733 : output_fpsr_sprel) (val));
3735 case REG_AR + AR_PFS:
3736 add_unwind_entry (output_pfs_when ());
3737 add_unwind_entry ((psprel
3739 : output_pfs_sprel) (val));
3741 case REG_AR + AR_LC:
3742 add_unwind_entry (output_lc_when ());
3743 add_unwind_entry ((psprel
3745 : output_lc_sprel) (val));
3748 add_unwind_entry (output_rp_when ());
3749 add_unwind_entry ((psprel
3751 : output_rp_sprel) (val));
3754 add_unwind_entry (output_preds_when ());
3755 add_unwind_entry ((psprel
3756 ? output_preds_psprel
3757 : output_preds_sprel) (val));
3760 add_unwind_entry (output_priunat_when_mem ());
3761 add_unwind_entry ((psprel
3762 ? output_priunat_psprel
3763 : output_priunat_sprel) (val));
3766 as_bad ("First operand not a valid register");
3770 as_bad (" Second operand not a valid constant");
3773 as_bad ("First operand not a register");
3778 int dummy ATTRIBUTE_UNUSED;
3783 if (!in_prologue ("save.g"))
3786 sep = parse_operand (&e1);
3788 parse_operand (&e2);
3790 if (e1.X_op != O_constant)
3791 as_bad ("First operand to .save.g must be a constant.");
3794 int grmask = e1.X_add_number;
3796 add_unwind_entry (output_gr_mem (grmask));
3799 int reg = e2.X_add_number - REG_GR;
3800 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3801 add_unwind_entry (output_gr_gr (grmask, reg));
3803 as_bad ("Second operand is an invalid register.");
3810 int dummy ATTRIBUTE_UNUSED;
3815 if (!in_prologue ("save.f"))
3818 sep = parse_operand (&e1);
3820 if (e1.X_op != O_constant)
3821 as_bad ("Operand to .save.f must be a constant.");
3823 add_unwind_entry (output_fr_mem (e1.X_add_number));
3828 int dummy ATTRIBUTE_UNUSED;
3835 if (!in_prologue ("save.b"))
3838 sep = parse_operand (&e1);
3839 if (e1.X_op != O_constant)
3841 as_bad ("First operand to .save.b must be a constant.");
3844 brmask = e1.X_add_number;
3848 sep = parse_operand (&e2);
3849 reg = e2.X_add_number - REG_GR;
3850 if (e2.X_op != O_register || reg > 127)
3852 as_bad ("Second operand to .save.b must be a general register.");
3855 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3858 add_unwind_entry (output_br_mem (brmask));
3860 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3861 demand_empty_rest_of_line ();
3866 int dummy ATTRIBUTE_UNUSED;
3871 if (!in_prologue ("save.gf"))
3874 sep = parse_operand (&e1);
3876 parse_operand (&e2);
3878 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3879 as_bad ("Both operands of .save.gf must be constants.");
3882 int grmask = e1.X_add_number;
3883 int frmask = e2.X_add_number;
3884 add_unwind_entry (output_frgr_mem (grmask, frmask));
3890 int dummy ATTRIBUTE_UNUSED;
3895 if (!in_prologue ("spill"))
3898 sep = parse_operand (&e);
3899 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3900 demand_empty_rest_of_line ();
3902 if (e.X_op != O_constant)
3903 as_bad ("Operand to .spill must be a constant");
3905 add_unwind_entry (output_spill_base (e.X_add_number));
3909 dot_spillreg (dummy)
3910 int dummy ATTRIBUTE_UNUSED;
3912 int sep, ab, xy, reg, treg;
3915 if (!in_procedure ("spillreg"))
3918 sep = parse_operand (&e1);
3921 as_bad ("No second operand to .spillreg");
3925 parse_operand (&e2);
3927 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3929 as_bad ("First operand to .spillreg must be a preserved register");
3933 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3935 as_bad ("Second operand to .spillreg must be a register");
3939 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3943 dot_spillmem (psprel)
3949 if (!in_procedure ("spillmem"))
3952 sep = parse_operand (&e1);
3955 as_bad ("Second operand missing");
3959 parse_operand (&e2);
3961 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3963 as_bad ("First operand to .spill%s must be a preserved register",
3964 psprel ? "psp" : "sp");
3968 if (e2.X_op != O_constant)
3970 as_bad ("Second operand to .spill%s must be a constant",
3971 psprel ? "psp" : "sp");
3976 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3978 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3982 dot_spillreg_p (dummy)
3983 int dummy ATTRIBUTE_UNUSED;
3985 int sep, ab, xy, reg, treg;
3986 expressionS e1, e2, e3;
3989 if (!in_procedure ("spillreg.p"))
3992 sep = parse_operand (&e1);
3995 as_bad ("No second and third operand to .spillreg.p");
3999 sep = parse_operand (&e2);
4002 as_bad ("No third operand to .spillreg.p");
4006 parse_operand (&e3);
4008 qp = e1.X_add_number - REG_P;
4010 if (e1.X_op != O_register || qp > 63)
4012 as_bad ("First operand to .spillreg.p must be a predicate");
4016 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4018 as_bad ("Second operand to .spillreg.p must be a preserved register");
4022 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4024 as_bad ("Third operand to .spillreg.p must be a register");
4028 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4032 dot_spillmem_p (psprel)
4035 expressionS e1, e2, e3;
4039 if (!in_procedure ("spillmem.p"))
4042 sep = parse_operand (&e1);
4045 as_bad ("Second operand missing");
4049 parse_operand (&e2);
4052 as_bad ("Second operand missing");
4056 parse_operand (&e3);
4058 qp = e1.X_add_number - REG_P;
4059 if (e1.X_op != O_register || qp > 63)
4061 as_bad ("First operand to .spill%s_p must be a predicate",
4062 psprel ? "psp" : "sp");
4066 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4068 as_bad ("Second operand to .spill%s_p must be a preserved register",
4069 psprel ? "psp" : "sp");
4073 if (e3.X_op != O_constant)
4075 as_bad ("Third operand to .spill%s_p must be a constant",
4076 psprel ? "psp" : "sp");
4081 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4083 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4087 get_saved_prologue_count (lbl)
4090 label_prologue_count *lpc = unwind.saved_prologue_counts;
4092 while (lpc != NULL && lpc->label_number != lbl)
4096 return lpc->prologue_count;
4098 as_bad ("Missing .label_state %ld", lbl);
4103 save_prologue_count (lbl, count)
4107 label_prologue_count *lpc = unwind.saved_prologue_counts;
4109 while (lpc != NULL && lpc->label_number != lbl)
4113 lpc->prologue_count = count;
4116 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4118 new_lpc->next = unwind.saved_prologue_counts;
4119 new_lpc->label_number = lbl;
4120 new_lpc->prologue_count = count;
4121 unwind.saved_prologue_counts = new_lpc;
4126 free_saved_prologue_counts ()
4128 label_prologue_count *lpc = unwind.saved_prologue_counts;
4129 label_prologue_count *next;
4138 unwind.saved_prologue_counts = NULL;
4142 dot_label_state (dummy)
4143 int dummy ATTRIBUTE_UNUSED;
4147 if (!in_body ("label_state"))
4151 if (e.X_op != O_constant)
4153 as_bad ("Operand to .label_state must be a constant");
4156 add_unwind_entry (output_label_state (e.X_add_number));
4157 save_prologue_count (e.X_add_number, unwind.prologue_count);
4161 dot_copy_state (dummy)
4162 int dummy ATTRIBUTE_UNUSED;
4166 if (!in_body ("copy_state"))
4170 if (e.X_op != O_constant)
4172 as_bad ("Operand to .copy_state must be a constant");
4175 add_unwind_entry (output_copy_state (e.X_add_number));
4176 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4181 int dummy ATTRIBUTE_UNUSED;
4186 if (!in_procedure ("unwabi"))
4189 sep = parse_operand (&e1);
4192 as_bad ("Second operand to .unwabi missing");
4195 sep = parse_operand (&e2);
4196 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4197 demand_empty_rest_of_line ();
4199 if (e1.X_op != O_constant)
4201 as_bad ("First operand to .unwabi must be a constant");
4205 if (e2.X_op != O_constant)
4207 as_bad ("Second operand to .unwabi must be a constant");
4211 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4215 dot_personality (dummy)
4216 int dummy ATTRIBUTE_UNUSED;
4219 if (!in_procedure ("personality"))
4222 name = input_line_pointer;
4223 c = get_symbol_end ();
4224 p = input_line_pointer;
4225 unwind.personality_routine = symbol_find_or_make (name);
4226 unwind.force_unwind_entry = 1;
4229 demand_empty_rest_of_line ();
4234 int dummy ATTRIBUTE_UNUSED;
4239 unwind.proc_start = 0;
4240 /* Parse names of main and alternate entry points and mark them as
4241 function symbols: */
4245 name = input_line_pointer;
4246 c = get_symbol_end ();
4247 p = input_line_pointer;
4249 as_bad ("Empty argument of .proc");
4252 sym = symbol_find_or_make (name);
4253 if (S_IS_DEFINED (sym))
4254 as_bad ("`%s' was already defined", name);
4255 else if (unwind.proc_start == 0)
4257 unwind.proc_start = sym;
4259 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4263 if (*input_line_pointer != ',')
4265 ++input_line_pointer;
4267 if (unwind.proc_start == 0)
4268 unwind.proc_start = expr_build_dot ();
4269 demand_empty_rest_of_line ();
4272 unwind.prologue = 0;
4273 unwind.prologue_count = 0;
4276 unwind.list = unwind.tail = unwind.current_entry = NULL;
4277 unwind.personality_routine = 0;
4282 int dummy ATTRIBUTE_UNUSED;
4284 if (!in_procedure ("body"))
4286 if (!unwind.prologue && !unwind.body && unwind.insn)
4287 as_warn ("Initial .body should precede any instructions");
4289 unwind.prologue = 0;
4290 unwind.prologue_mask = 0;
4293 add_unwind_entry (output_body ());
4294 demand_empty_rest_of_line ();
4298 dot_prologue (dummy)
4299 int dummy ATTRIBUTE_UNUSED;
4302 int mask = 0, grsave = 0;
4304 if (!in_procedure ("prologue"))
4306 if (unwind.prologue)
4308 as_bad (".prologue within prologue");
4309 ignore_rest_of_line ();
4312 if (!unwind.body && unwind.insn)
4313 as_warn ("Initial .prologue should precede any instructions");
4315 if (!is_it_end_of_statement ())
4318 sep = parse_operand (&e1);
4320 as_bad ("No second operand to .prologue");
4321 sep = parse_operand (&e2);
4322 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4323 demand_empty_rest_of_line ();
4325 if (e1.X_op == O_constant)
4327 mask = e1.X_add_number;
4329 if (e2.X_op == O_constant)
4330 grsave = e2.X_add_number;
4331 else if (e2.X_op == O_register
4332 && (grsave = e2.X_add_number - REG_GR) < 128)
4335 as_bad ("Second operand not a constant or general register");
4337 add_unwind_entry (output_prologue_gr (mask, grsave));
4340 as_bad ("First operand not a constant");
4343 add_unwind_entry (output_prologue ());
4345 unwind.prologue = 1;
4346 unwind.prologue_mask = mask;
4348 ++unwind.prologue_count;
4353 int dummy ATTRIBUTE_UNUSED;
4357 int bytes_per_address;
4360 subsegT saved_subseg;
4361 char *name, *default_name, *p, c;
4363 int unwind_check = md.unwind_check;
4365 md.unwind_check = unwind_check_error;
4366 if (!in_procedure ("endp"))
4368 md.unwind_check = unwind_check;
4370 if (unwind.saved_text_seg)
4372 saved_seg = unwind.saved_text_seg;
4373 saved_subseg = unwind.saved_text_subseg;
4374 unwind.saved_text_seg = NULL;
4378 saved_seg = now_seg;
4379 saved_subseg = now_subseg;
4382 insn_group_break (1, 0, 0);
4384 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4386 generate_unwind_image (saved_seg);
4388 if (unwind.info || unwind.force_unwind_entry)
4392 subseg_set (md.last_text_seg, 0);
4393 proc_end = expr_build_dot ();
4395 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 0);
4397 /* Make sure that section has 4 byte alignment for ILP32 and
4398 8 byte alignment for LP64. */
4399 record_alignment (now_seg, md.pointer_size_shift);
4401 /* Need space for 3 pointers for procedure start, procedure end,
4403 ptr = frag_more (3 * md.pointer_size);
4404 where = frag_now_fix () - (3 * md.pointer_size);
4405 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4407 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4408 e.X_op = O_pseudo_fixup;
4409 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4411 e.X_add_symbol = unwind.proc_start;
4412 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4414 e.X_op = O_pseudo_fixup;
4415 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4417 e.X_add_symbol = proc_end;
4418 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4419 bytes_per_address, &e);
4423 e.X_op = O_pseudo_fixup;
4424 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4426 e.X_add_symbol = unwind.info;
4427 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4428 bytes_per_address, &e);
4431 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4436 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND, 1);
4438 subseg_set (saved_seg, saved_subseg);
4440 if (unwind.proc_start)
4441 default_name = (char *) S_GET_NAME (unwind.proc_start);
4443 default_name = NULL;
4445 /* Parse names of main and alternate entry points and set symbol sizes. */
4449 name = input_line_pointer;
4450 c = get_symbol_end ();
4451 p = input_line_pointer;
4454 if (md.unwind_check == unwind_check_warning)
4458 as_warn ("Empty argument of .endp. Use the default name `%s'",
4460 name = default_name;
4463 as_warn ("Empty argument of .endp");
4466 as_bad ("Empty argument of .endp");
4470 sym = symbol_find (name);
4472 && md.unwind_check == unwind_check_warning
4474 && default_name != name)
4476 /* We have a bad name. Try the default one if needed. */
4477 as_warn ("`%s' was not defined within procedure. Use the default name `%s'",
4478 name, default_name);
4479 name = default_name;
4480 sym = symbol_find (name);
4482 if (!sym || !S_IS_DEFINED (sym))
4483 as_bad ("`%s' was not defined within procedure", name);
4484 else if (unwind.proc_start
4485 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4486 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4488 fragS *fr = symbol_get_frag (unwind.proc_start);
4489 fragS *frag = symbol_get_frag (sym);
4491 /* Check whether the function label is at or beyond last
4493 while (fr && fr != frag)
4497 if (frag == frag_now && SEG_NORMAL (now_seg))
4498 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4501 symbol_get_obj (sym)->size =
4502 (expressionS *) xmalloc (sizeof (expressionS));
4503 symbol_get_obj (sym)->size->X_op = O_subtract;
4504 symbol_get_obj (sym)->size->X_add_symbol
4505 = symbol_new (FAKE_LABEL_NAME, now_seg,
4506 frag_now_fix (), frag_now);
4507 symbol_get_obj (sym)->size->X_op_symbol = sym;
4508 symbol_get_obj (sym)->size->X_add_number = 0;
4515 if (*input_line_pointer != ',')
4517 ++input_line_pointer;
4519 demand_empty_rest_of_line ();
4520 unwind.proc_start = unwind.info = 0;
4524 dot_template (template)
4527 CURR_SLOT.user_template = template;
4532 int dummy ATTRIBUTE_UNUSED;
4534 int ins, locs, outs, rots;
4536 if (is_it_end_of_statement ())
4537 ins = locs = outs = rots = 0;
4540 ins = get_absolute_expression ();
4541 if (*input_line_pointer++ != ',')
4543 locs = get_absolute_expression ();
4544 if (*input_line_pointer++ != ',')
4546 outs = get_absolute_expression ();
4547 if (*input_line_pointer++ != ',')
4549 rots = get_absolute_expression ();
4551 set_regstack (ins, locs, outs, rots);
4555 as_bad ("Comma expected");
4556 ignore_rest_of_line ();
4563 unsigned num_regs, num_alloced = 0;
4564 struct dynreg **drpp, *dr;
4565 int ch, base_reg = 0;
4571 case DYNREG_GR: base_reg = REG_GR + 32; break;
4572 case DYNREG_FR: base_reg = REG_FR + 32; break;
4573 case DYNREG_PR: base_reg = REG_P + 16; break;
4577 /* First, remove existing names from hash table. */
4578 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4580 hash_delete (md.dynreg_hash, dr->name);
4581 /* FIXME: Free dr->name. */
4585 drpp = &md.dynreg[type];
4588 start = input_line_pointer;
4589 ch = get_symbol_end ();
4590 len = strlen (ia64_canonicalize_symbol_name (start));
4591 *input_line_pointer = ch;
4594 if (*input_line_pointer != '[')
4596 as_bad ("Expected '['");
4599 ++input_line_pointer; /* skip '[' */
4601 num_regs = get_absolute_expression ();
4603 if (*input_line_pointer++ != ']')
4605 as_bad ("Expected ']'");
4610 num_alloced += num_regs;
4614 if (num_alloced > md.rot.num_regs)
4616 as_bad ("Used more than the declared %d rotating registers",
4622 if (num_alloced > 96)
4624 as_bad ("Used more than the available 96 rotating registers");
4629 if (num_alloced > 48)
4631 as_bad ("Used more than the available 48 rotating registers");
4642 *drpp = obstack_alloc (¬es, sizeof (*dr));
4643 memset (*drpp, 0, sizeof (*dr));
4646 name = obstack_alloc (¬es, len + 1);
4647 memcpy (name, start, len);
4652 dr->num_regs = num_regs;
4653 dr->base = base_reg;
4655 base_reg += num_regs;
4657 if (hash_insert (md.dynreg_hash, name, dr))
4659 as_bad ("Attempt to redefine register set `%s'", name);
4660 obstack_free (¬es, name);
4664 if (*input_line_pointer != ',')
4666 ++input_line_pointer; /* skip comma */
4669 demand_empty_rest_of_line ();
4673 ignore_rest_of_line ();
4677 dot_byteorder (byteorder)
4680 segment_info_type *seginfo = seg_info (now_seg);
4682 if (byteorder == -1)
4684 if (seginfo->tc_segment_info_data.endian == 0)
4685 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4686 byteorder = seginfo->tc_segment_info_data.endian == 1;
4689 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4691 if (target_big_endian != byteorder)
4693 target_big_endian = byteorder;
4694 if (target_big_endian)
4696 ia64_number_to_chars = number_to_chars_bigendian;
4697 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4701 ia64_number_to_chars = number_to_chars_littleendian;
4702 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4709 int dummy ATTRIBUTE_UNUSED;
4716 option = input_line_pointer;
4717 ch = get_symbol_end ();
4718 if (strcmp (option, "lsb") == 0)
4719 md.flags &= ~EF_IA_64_BE;
4720 else if (strcmp (option, "msb") == 0)
4721 md.flags |= EF_IA_64_BE;
4722 else if (strcmp (option, "abi32") == 0)
4723 md.flags &= ~EF_IA_64_ABI64;
4724 else if (strcmp (option, "abi64") == 0)
4725 md.flags |= EF_IA_64_ABI64;
4727 as_bad ("Unknown psr option `%s'", option);
4728 *input_line_pointer = ch;
4731 if (*input_line_pointer != ',')
4734 ++input_line_pointer;
4737 demand_empty_rest_of_line ();
4742 int dummy ATTRIBUTE_UNUSED;
4744 new_logical_line (0, get_absolute_expression ());
4745 demand_empty_rest_of_line ();
4749 parse_section_name ()
4755 if (*input_line_pointer == '"')
4756 name = demand_copy_C_string (&len);
4759 char *start = input_line_pointer;
4760 char c = get_symbol_end ();
4762 if (input_line_pointer == start)
4764 as_bad ("Missing section name");
4765 ignore_rest_of_line ();
4768 name = obstack_copy (¬es, start, input_line_pointer - start + 1);
4769 *input_line_pointer = c;
4773 ignore_rest_of_line ();
4777 if (*input_line_pointer != ',')
4779 as_bad ("Comma expected after section name");
4780 ignore_rest_of_line ();
4783 ++input_line_pointer; /* skip comma */
4791 char *name = parse_section_name ();
4795 md.keep_pending_output = 1;
4798 obj_elf_previous (0);
4799 md.keep_pending_output = 0;
4802 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4805 stmt_float_cons (kind)
4826 ia64_do_align (alignment);
4834 int saved_auto_align = md.auto_align;
4838 md.auto_align = saved_auto_align;
4842 dot_xfloat_cons (kind)
4845 char *name = parse_section_name ();
4849 md.keep_pending_output = 1;
4851 stmt_float_cons (kind);
4852 obj_elf_previous (0);
4853 md.keep_pending_output = 0;
4857 dot_xstringer (zero)
4860 char *name = parse_section_name ();
4864 md.keep_pending_output = 1;
4867 obj_elf_previous (0);
4868 md.keep_pending_output = 0;
4875 int saved_auto_align = md.auto_align;
4876 char *name = parse_section_name ();
4880 md.keep_pending_output = 1;
4884 md.auto_align = saved_auto_align;
4885 obj_elf_previous (0);
4886 md.keep_pending_output = 0;
4890 dot_xfloat_cons_ua (kind)
4893 int saved_auto_align = md.auto_align;
4894 char *name = parse_section_name ();
4898 md.keep_pending_output = 1;
4901 stmt_float_cons (kind);
4902 md.auto_align = saved_auto_align;
4903 obj_elf_previous (0);
4904 md.keep_pending_output = 0;
4907 /* .reg.val <regname>,value */
4911 int dummy ATTRIBUTE_UNUSED;
4916 if (reg.X_op != O_register)
4918 as_bad (_("Register name expected"));
4919 ignore_rest_of_line ();
4921 else if (*input_line_pointer++ != ',')
4923 as_bad (_("Comma expected"));
4924 ignore_rest_of_line ();
4928 valueT value = get_absolute_expression ();
4929 int regno = reg.X_add_number;
4930 if (regno <= REG_GR || regno > REG_GR + 127)
4931 as_warn (_("Register value annotation ignored"));
4934 gr_values[regno - REG_GR].known = 1;
4935 gr_values[regno - REG_GR].value = value;
4936 gr_values[regno - REG_GR].path = md.path;
4939 demand_empty_rest_of_line ();
4944 .serialize.instruction
4947 dot_serialize (type)
4950 insn_group_break (0, 0, 0);
4952 instruction_serialization ();
4954 data_serialization ();
4955 insn_group_break (0, 0, 0);
4956 demand_empty_rest_of_line ();
4959 /* select dv checking mode
4964 A stop is inserted when changing modes
4971 if (md.manual_bundling)
4972 as_warn (_("Directive invalid within a bundle"));
4974 if (type == 'E' || type == 'A')
4975 md.mode_explicitly_set = 0;
4977 md.mode_explicitly_set = 1;
4984 if (md.explicit_mode)
4985 insn_group_break (1, 0, 0);
4986 md.explicit_mode = 0;
4990 if (!md.explicit_mode)
4991 insn_group_break (1, 0, 0);
4992 md.explicit_mode = 1;
4996 if (md.explicit_mode != md.default_explicit_mode)
4997 insn_group_break (1, 0, 0);
4998 md.explicit_mode = md.default_explicit_mode;
4999 md.mode_explicitly_set = 0;
5010 for (regno = 0; regno < 64; regno++)
5012 if (mask & ((valueT) 1 << regno))
5014 fprintf (stderr, "%s p%d", comma, regno);
5021 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5022 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5023 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5024 .pred.safe_across_calls p1 [, p2 [,...]]
5033 int p1 = -1, p2 = -1;
5037 if (*input_line_pointer == '"')
5040 char *form = demand_copy_C_string (&len);
5042 if (strcmp (form, "mutex") == 0)
5044 else if (strcmp (form, "clear") == 0)
5046 else if (strcmp (form, "imply") == 0)
5048 obstack_free (¬es, form);
5050 else if (*input_line_pointer == '@')
5052 char *form = ++input_line_pointer;
5053 char c = get_symbol_end();
5055 if (strcmp (form, "mutex") == 0)
5057 else if (strcmp (form, "clear") == 0)
5059 else if (strcmp (form, "imply") == 0)
5061 *input_line_pointer = c;
5065 as_bad (_("Missing predicate relation type"));
5066 ignore_rest_of_line ();
5071 as_bad (_("Unrecognized predicate relation type"));
5072 ignore_rest_of_line ();
5075 if (*input_line_pointer == ',')
5076 ++input_line_pointer;
5085 expressionS pr, *pr1, *pr2;
5088 if (pr.X_op == O_register
5089 && pr.X_add_number >= REG_P
5090 && pr.X_add_number <= REG_P + 63)
5092 regno = pr.X_add_number - REG_P;
5100 else if (type != 'i'
5101 && pr.X_op == O_subtract
5102 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5103 && pr1->X_op == O_register
5104 && pr1->X_add_number >= REG_P
5105 && pr1->X_add_number <= REG_P + 63
5106 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5107 && pr2->X_op == O_register
5108 && pr2->X_add_number >= REG_P
5109 && pr2->X_add_number <= REG_P + 63)
5114 regno = pr1->X_add_number - REG_P;
5115 stop = pr2->X_add_number - REG_P;
5118 as_bad (_("Bad register range"));
5119 ignore_rest_of_line ();
5122 bits = ((bits << stop) << 1) - (bits << regno);
5123 count += stop - regno + 1;
5127 as_bad (_("Predicate register expected"));
5128 ignore_rest_of_line ();
5132 as_warn (_("Duplicate predicate register ignored"));
5134 if (*input_line_pointer != ',')
5136 ++input_line_pointer;
5145 clear_qp_mutex (mask);
5146 clear_qp_implies (mask, (valueT) 0);
5149 if (count != 2 || p1 == -1 || p2 == -1)
5150 as_bad (_("Predicate source and target required"));
5151 else if (p1 == 0 || p2 == 0)
5152 as_bad (_("Use of p0 is not valid in this context"));
5154 add_qp_imply (p1, p2);
5159 as_bad (_("At least two PR arguments expected"));
5164 as_bad (_("Use of p0 is not valid in this context"));
5167 add_qp_mutex (mask);
5170 /* note that we don't override any existing relations */
5173 as_bad (_("At least one PR argument expected"));
5178 fprintf (stderr, "Safe across calls: ");
5179 print_prmask (mask);
5180 fprintf (stderr, "\n");
5182 qp_safe_across_calls = mask;
5185 demand_empty_rest_of_line ();
5188 /* .entry label [, label [, ...]]
5189 Hint to DV code that the given labels are to be considered entry points.
5190 Otherwise, only global labels are considered entry points. */
5194 int dummy ATTRIBUTE_UNUSED;
5203 name = input_line_pointer;
5204 c = get_symbol_end ();
5205 symbolP = symbol_find_or_make (name);
5207 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5209 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5212 *input_line_pointer = c;
5214 c = *input_line_pointer;
5217 input_line_pointer++;
5219 if (*input_line_pointer == '\n')
5225 demand_empty_rest_of_line ();
5228 /* .mem.offset offset, base
5229 "base" is used to distinguish between offsets from a different base. */
5232 dot_mem_offset (dummy)
5233 int dummy ATTRIBUTE_UNUSED;
5235 md.mem_offset.hint = 1;
5236 md.mem_offset.offset = get_absolute_expression ();
5237 if (*input_line_pointer != ',')
5239 as_bad (_("Comma expected"));
5240 ignore_rest_of_line ();
5243 ++input_line_pointer;
5244 md.mem_offset.base = get_absolute_expression ();
5245 demand_empty_rest_of_line ();
5248 /* ia64-specific pseudo-ops: */
5249 const pseudo_typeS md_pseudo_table[] =
5251 { "radix", dot_radix, 0 },
5252 { "lcomm", s_lcomm_bytes, 1 },
5253 { "loc", dot_loc, 0 },
5254 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5255 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5256 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5257 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5258 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5259 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5260 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5261 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5262 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5263 { "proc", dot_proc, 0 },
5264 { "body", dot_body, 0 },
5265 { "prologue", dot_prologue, 0 },
5266 { "endp", dot_endp, 0 },
5268 { "fframe", dot_fframe, 0 },
5269 { "vframe", dot_vframe, 0 },
5270 { "vframesp", dot_vframesp, 0 },
5271 { "vframepsp", dot_vframepsp, 0 },
5272 { "save", dot_save, 0 },
5273 { "restore", dot_restore, 0 },
5274 { "restorereg", dot_restorereg, 0 },
5275 { "restorereg.p", dot_restorereg_p, 0 },
5276 { "handlerdata", dot_handlerdata, 0 },
5277 { "unwentry", dot_unwentry, 0 },
5278 { "altrp", dot_altrp, 0 },
5279 { "savesp", dot_savemem, 0 },
5280 { "savepsp", dot_savemem, 1 },
5281 { "save.g", dot_saveg, 0 },
5282 { "save.f", dot_savef, 0 },
5283 { "save.b", dot_saveb, 0 },
5284 { "save.gf", dot_savegf, 0 },
5285 { "spill", dot_spill, 0 },
5286 { "spillreg", dot_spillreg, 0 },
5287 { "spillsp", dot_spillmem, 0 },
5288 { "spillpsp", dot_spillmem, 1 },
5289 { "spillreg.p", dot_spillreg_p, 0 },
5290 { "spillsp.p", dot_spillmem_p, 0 },
5291 { "spillpsp.p", dot_spillmem_p, 1 },
5292 { "label_state", dot_label_state, 0 },
5293 { "copy_state", dot_copy_state, 0 },
5294 { "unwabi", dot_unwabi, 0 },
5295 { "personality", dot_personality, 0 },
5296 { "mii", dot_template, 0x0 },
5297 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5298 { "mlx", dot_template, 0x2 },
5299 { "mmi", dot_template, 0x4 },
5300 { "mfi", dot_template, 0x6 },
5301 { "mmf", dot_template, 0x7 },
5302 { "mib", dot_template, 0x8 },
5303 { "mbb", dot_template, 0x9 },
5304 { "bbb", dot_template, 0xb },
5305 { "mmb", dot_template, 0xc },
5306 { "mfb", dot_template, 0xe },
5307 { "align", dot_align, 0 },
5308 { "regstk", dot_regstk, 0 },
5309 { "rotr", dot_rot, DYNREG_GR },
5310 { "rotf", dot_rot, DYNREG_FR },
5311 { "rotp", dot_rot, DYNREG_PR },
5312 { "lsb", dot_byteorder, 0 },
5313 { "msb", dot_byteorder, 1 },
5314 { "psr", dot_psr, 0 },
5315 { "alias", dot_alias, 0 },
5316 { "secalias", dot_alias, 1 },
5317 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5319 { "xdata1", dot_xdata, 1 },
5320 { "xdata2", dot_xdata, 2 },
5321 { "xdata4", dot_xdata, 4 },
5322 { "xdata8", dot_xdata, 8 },
5323 { "xdata16", dot_xdata, 16 },
5324 { "xreal4", dot_xfloat_cons, 'f' },
5325 { "xreal8", dot_xfloat_cons, 'd' },
5326 { "xreal10", dot_xfloat_cons, 'x' },
5327 { "xreal16", dot_xfloat_cons, 'X' },
5328 { "xstring", dot_xstringer, 0 },
5329 { "xstringz", dot_xstringer, 1 },
5331 /* unaligned versions: */
5332 { "xdata2.ua", dot_xdata_ua, 2 },
5333 { "xdata4.ua", dot_xdata_ua, 4 },
5334 { "xdata8.ua", dot_xdata_ua, 8 },
5335 { "xdata16.ua", dot_xdata_ua, 16 },
5336 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5337 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5338 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5339 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5341 /* annotations/DV checking support */
5342 { "entry", dot_entry, 0 },
5343 { "mem.offset", dot_mem_offset, 0 },
5344 { "pred.rel", dot_pred_rel, 0 },
5345 { "pred.rel.clear", dot_pred_rel, 'c' },
5346 { "pred.rel.imply", dot_pred_rel, 'i' },
5347 { "pred.rel.mutex", dot_pred_rel, 'm' },
5348 { "pred.safe_across_calls", dot_pred_rel, 's' },
5349 { "reg.val", dot_reg_val, 0 },
5350 { "serialize.data", dot_serialize, 0 },
5351 { "serialize.instruction", dot_serialize, 1 },
5352 { "auto", dot_dv_mode, 'a' },
5353 { "explicit", dot_dv_mode, 'e' },
5354 { "default", dot_dv_mode, 'd' },
5356 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5357 IA-64 aligns data allocation pseudo-ops by default, so we have to
5358 tell it that these ones are supposed to be unaligned. Long term,
5359 should rewrite so that only IA-64 specific data allocation pseudo-ops
5360 are aligned by default. */
5361 {"2byte", stmt_cons_ua, 2},
5362 {"4byte", stmt_cons_ua, 4},
5363 {"8byte", stmt_cons_ua, 8},
5368 static const struct pseudo_opcode
5371 void (*handler) (int);
5376 /* these are more like pseudo-ops, but don't start with a dot */
5377 { "data1", cons, 1 },
5378 { "data2", cons, 2 },
5379 { "data4", cons, 4 },
5380 { "data8", cons, 8 },
5381 { "data16", cons, 16 },
5382 { "real4", stmt_float_cons, 'f' },
5383 { "real8", stmt_float_cons, 'd' },
5384 { "real10", stmt_float_cons, 'x' },
5385 { "real16", stmt_float_cons, 'X' },
5386 { "string", stringer, 0 },
5387 { "stringz", stringer, 1 },
5389 /* unaligned versions: */
5390 { "data2.ua", stmt_cons_ua, 2 },
5391 { "data4.ua", stmt_cons_ua, 4 },
5392 { "data8.ua", stmt_cons_ua, 8 },
5393 { "data16.ua", stmt_cons_ua, 16 },
5394 { "real4.ua", float_cons, 'f' },
5395 { "real8.ua", float_cons, 'd' },
5396 { "real10.ua", float_cons, 'x' },
5397 { "real16.ua", float_cons, 'X' },
5400 /* Declare a register by creating a symbol for it and entering it in
5401 the symbol table. */
5404 declare_register (name, regnum)
5411 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5413 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5415 as_fatal ("Inserting \"%s\" into register table failed: %s",
5422 declare_register_set (prefix, num_regs, base_regnum)
5430 for (i = 0; i < num_regs; ++i)
5432 sprintf (name, "%s%u", prefix, i);
5433 declare_register (name, base_regnum + i);
5438 operand_width (opnd)
5439 enum ia64_opnd opnd;
5441 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5442 unsigned int bits = 0;
5446 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5447 bits += odesc->field[i].bits;
5452 static enum operand_match_result
5453 operand_match (idesc, index, e)
5454 const struct ia64_opcode *idesc;
5458 enum ia64_opnd opnd = idesc->operands[index];
5459 int bits, relocatable = 0;
5460 struct insn_fix *fix;
5467 case IA64_OPND_AR_CCV:
5468 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5469 return OPERAND_MATCH;
5472 case IA64_OPND_AR_CSD:
5473 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5474 return OPERAND_MATCH;
5477 case IA64_OPND_AR_PFS:
5478 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5479 return OPERAND_MATCH;
5483 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5484 return OPERAND_MATCH;
5488 if (e->X_op == O_register && e->X_add_number == REG_IP)
5489 return OPERAND_MATCH;
5493 if (e->X_op == O_register && e->X_add_number == REG_PR)
5494 return OPERAND_MATCH;
5497 case IA64_OPND_PR_ROT:
5498 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5499 return OPERAND_MATCH;
5503 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5504 return OPERAND_MATCH;
5507 case IA64_OPND_PSR_L:
5508 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5509 return OPERAND_MATCH;
5512 case IA64_OPND_PSR_UM:
5513 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5514 return OPERAND_MATCH;
5518 if (e->X_op == O_constant)
5520 if (e->X_add_number == 1)
5521 return OPERAND_MATCH;
5523 return OPERAND_OUT_OF_RANGE;
5528 if (e->X_op == O_constant)
5530 if (e->X_add_number == 8)
5531 return OPERAND_MATCH;
5533 return OPERAND_OUT_OF_RANGE;
5538 if (e->X_op == O_constant)
5540 if (e->X_add_number == 16)
5541 return OPERAND_MATCH;
5543 return OPERAND_OUT_OF_RANGE;
5547 /* register operands: */
5550 if (e->X_op == O_register && e->X_add_number >= REG_AR
5551 && e->X_add_number < REG_AR + 128)
5552 return OPERAND_MATCH;
5557 if (e->X_op == O_register && e->X_add_number >= REG_BR
5558 && e->X_add_number < REG_BR + 8)
5559 return OPERAND_MATCH;
5563 if (e->X_op == O_register && e->X_add_number >= REG_CR
5564 && e->X_add_number < REG_CR + 128)
5565 return OPERAND_MATCH;
5572 if (e->X_op == O_register && e->X_add_number >= REG_FR
5573 && e->X_add_number < REG_FR + 128)
5574 return OPERAND_MATCH;
5579 if (e->X_op == O_register && e->X_add_number >= REG_P
5580 && e->X_add_number < REG_P + 64)
5581 return OPERAND_MATCH;
5587 if (e->X_op == O_register && e->X_add_number >= REG_GR
5588 && e->X_add_number < REG_GR + 128)
5589 return OPERAND_MATCH;
5592 case IA64_OPND_R3_2:
5593 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5595 if (e->X_add_number < REG_GR + 4)
5596 return OPERAND_MATCH;
5597 else if (e->X_add_number < REG_GR + 128)
5598 return OPERAND_OUT_OF_RANGE;
5602 /* indirect operands: */
5603 case IA64_OPND_CPUID_R3:
5604 case IA64_OPND_DBR_R3:
5605 case IA64_OPND_DTR_R3:
5606 case IA64_OPND_ITR_R3:
5607 case IA64_OPND_IBR_R3:
5608 case IA64_OPND_MSR_R3:
5609 case IA64_OPND_PKR_R3:
5610 case IA64_OPND_PMC_R3:
5611 case IA64_OPND_PMD_R3:
5612 case IA64_OPND_RR_R3:
5613 if (e->X_op == O_index && e->X_op_symbol
5614 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5615 == opnd - IA64_OPND_CPUID_R3))
5616 return OPERAND_MATCH;
5620 if (e->X_op == O_index && !e->X_op_symbol)
5621 return OPERAND_MATCH;
5624 /* immediate operands: */
5625 case IA64_OPND_CNT2a:
5626 case IA64_OPND_LEN4:
5627 case IA64_OPND_LEN6:
5628 bits = operand_width (idesc->operands[index]);
5629 if (e->X_op == O_constant)
5631 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5632 return OPERAND_MATCH;
5634 return OPERAND_OUT_OF_RANGE;
5638 case IA64_OPND_CNT2b:
5639 if (e->X_op == O_constant)
5641 if ((bfd_vma) (e->X_add_number - 1) < 3)
5642 return OPERAND_MATCH;
5644 return OPERAND_OUT_OF_RANGE;
5648 case IA64_OPND_CNT2c:
5649 val = e->X_add_number;
5650 if (e->X_op == O_constant)
5652 if ((val == 0 || val == 7 || val == 15 || val == 16))
5653 return OPERAND_MATCH;
5655 return OPERAND_OUT_OF_RANGE;
5660 /* SOR must be an integer multiple of 8 */
5661 if (e->X_op == O_constant && e->X_add_number & 0x7)
5662 return OPERAND_OUT_OF_RANGE;
5665 if (e->X_op == O_constant)
5667 if ((bfd_vma) e->X_add_number <= 96)
5668 return OPERAND_MATCH;
5670 return OPERAND_OUT_OF_RANGE;
5674 case IA64_OPND_IMMU62:
5675 if (e->X_op == O_constant)
5677 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5678 return OPERAND_MATCH;
5680 return OPERAND_OUT_OF_RANGE;
5684 /* FIXME -- need 62-bit relocation type */
5685 as_bad (_("62-bit relocation not yet implemented"));
5689 case IA64_OPND_IMMU64:
5690 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5691 || e->X_op == O_subtract)
5693 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5694 fix->code = BFD_RELOC_IA64_IMM64;
5695 if (e->X_op != O_subtract)
5697 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5698 if (e->X_op == O_pseudo_fixup)
5702 fix->opnd = idesc->operands[index];
5705 ++CURR_SLOT.num_fixups;
5706 return OPERAND_MATCH;
5708 else if (e->X_op == O_constant)
5709 return OPERAND_MATCH;
5712 case IA64_OPND_CCNT5:
5713 case IA64_OPND_CNT5:
5714 case IA64_OPND_CNT6:
5715 case IA64_OPND_CPOS6a:
5716 case IA64_OPND_CPOS6b:
5717 case IA64_OPND_CPOS6c:
5718 case IA64_OPND_IMMU2:
5719 case IA64_OPND_IMMU7a:
5720 case IA64_OPND_IMMU7b:
5721 case IA64_OPND_IMMU21:
5722 case IA64_OPND_IMMU24:
5723 case IA64_OPND_MBTYPE4:
5724 case IA64_OPND_MHTYPE8:
5725 case IA64_OPND_POS6:
5726 bits = operand_width (idesc->operands[index]);
5727 if (e->X_op == O_constant)
5729 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5730 return OPERAND_MATCH;
5732 return OPERAND_OUT_OF_RANGE;
5736 case IA64_OPND_IMMU9:
5737 bits = operand_width (idesc->operands[index]);
5738 if (e->X_op == O_constant)
5740 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5742 int lobits = e->X_add_number & 0x3;
5743 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5744 e->X_add_number |= (bfd_vma) 0x3;
5745 return OPERAND_MATCH;
5748 return OPERAND_OUT_OF_RANGE;
5752 case IA64_OPND_IMM44:
5753 /* least 16 bits must be zero */
5754 if ((e->X_add_number & 0xffff) != 0)
5755 /* XXX technically, this is wrong: we should not be issuing warning
5756 messages until we're sure this instruction pattern is going to
5758 as_warn (_("lower 16 bits of mask ignored"));
5760 if (e->X_op == O_constant)
5762 if (((e->X_add_number >= 0
5763 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5764 || (e->X_add_number < 0
5765 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5768 if (e->X_add_number >= 0
5769 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5771 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5773 return OPERAND_MATCH;
5776 return OPERAND_OUT_OF_RANGE;
5780 case IA64_OPND_IMM17:
5781 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5782 if (e->X_op == O_constant)
5784 if (((e->X_add_number >= 0
5785 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5786 || (e->X_add_number < 0
5787 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5790 if (e->X_add_number >= 0
5791 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5793 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5795 return OPERAND_MATCH;
5798 return OPERAND_OUT_OF_RANGE;
5802 case IA64_OPND_IMM14:
5803 case IA64_OPND_IMM22:
5805 case IA64_OPND_IMM1:
5806 case IA64_OPND_IMM8:
5807 case IA64_OPND_IMM8U4:
5808 case IA64_OPND_IMM8M1:
5809 case IA64_OPND_IMM8M1U4:
5810 case IA64_OPND_IMM8M1U8:
5811 case IA64_OPND_IMM9a:
5812 case IA64_OPND_IMM9b:
5813 bits = operand_width (idesc->operands[index]);
5814 if (relocatable && (e->X_op == O_symbol
5815 || e->X_op == O_subtract
5816 || e->X_op == O_pseudo_fixup))
5818 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5820 if (idesc->operands[index] == IA64_OPND_IMM14)
5821 fix->code = BFD_RELOC_IA64_IMM14;
5823 fix->code = BFD_RELOC_IA64_IMM22;
5825 if (e->X_op != O_subtract)
5827 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5828 if (e->X_op == O_pseudo_fixup)
5832 fix->opnd = idesc->operands[index];
5835 ++CURR_SLOT.num_fixups;
5836 return OPERAND_MATCH;
5838 else if (e->X_op != O_constant
5839 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5840 return OPERAND_MISMATCH;
5842 if (opnd == IA64_OPND_IMM8M1U4)
5844 /* Zero is not valid for unsigned compares that take an adjusted
5845 constant immediate range. */
5846 if (e->X_add_number == 0)
5847 return OPERAND_OUT_OF_RANGE;
5849 /* Sign-extend 32-bit unsigned numbers, so that the following range
5850 checks will work. */
5851 val = e->X_add_number;
5852 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5853 && ((val & ((bfd_vma) 1 << 31)) != 0))
5854 val = ((val << 32) >> 32);
5856 /* Check for 0x100000000. This is valid because
5857 0x100000000-1 is the same as ((uint32_t) -1). */
5858 if (val == ((bfd_signed_vma) 1 << 32))
5859 return OPERAND_MATCH;
5863 else if (opnd == IA64_OPND_IMM8M1U8)
5865 /* Zero is not valid for unsigned compares that take an adjusted
5866 constant immediate range. */
5867 if (e->X_add_number == 0)
5868 return OPERAND_OUT_OF_RANGE;
5870 /* Check for 0x10000000000000000. */
5871 if (e->X_op == O_big)
5873 if (generic_bignum[0] == 0
5874 && generic_bignum[1] == 0
5875 && generic_bignum[2] == 0
5876 && generic_bignum[3] == 0
5877 && generic_bignum[4] == 1)
5878 return OPERAND_MATCH;
5880 return OPERAND_OUT_OF_RANGE;
5883 val = e->X_add_number - 1;
5885 else if (opnd == IA64_OPND_IMM8M1)
5886 val = e->X_add_number - 1;
5887 else if (opnd == IA64_OPND_IMM8U4)
5889 /* Sign-extend 32-bit unsigned numbers, so that the following range
5890 checks will work. */
5891 val = e->X_add_number;
5892 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5893 && ((val & ((bfd_vma) 1 << 31)) != 0))
5894 val = ((val << 32) >> 32);
5897 val = e->X_add_number;
5899 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5900 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5901 return OPERAND_MATCH;
5903 return OPERAND_OUT_OF_RANGE;
5905 case IA64_OPND_INC3:
5906 /* +/- 1, 4, 8, 16 */
5907 val = e->X_add_number;
5910 if (e->X_op == O_constant)
5912 if ((val == 1 || val == 4 || val == 8 || val == 16))
5913 return OPERAND_MATCH;
5915 return OPERAND_OUT_OF_RANGE;
5919 case IA64_OPND_TGT25:
5920 case IA64_OPND_TGT25b:
5921 case IA64_OPND_TGT25c:
5922 case IA64_OPND_TGT64:
5923 if (e->X_op == O_symbol)
5925 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5926 if (opnd == IA64_OPND_TGT25)
5927 fix->code = BFD_RELOC_IA64_PCREL21F;
5928 else if (opnd == IA64_OPND_TGT25b)
5929 fix->code = BFD_RELOC_IA64_PCREL21M;
5930 else if (opnd == IA64_OPND_TGT25c)
5931 fix->code = BFD_RELOC_IA64_PCREL21B;
5932 else if (opnd == IA64_OPND_TGT64)
5933 fix->code = BFD_RELOC_IA64_PCREL60B;
5937 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5938 fix->opnd = idesc->operands[index];
5941 ++CURR_SLOT.num_fixups;
5942 return OPERAND_MATCH;
5944 case IA64_OPND_TAG13:
5945 case IA64_OPND_TAG13b:
5949 return OPERAND_MATCH;
5952 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5953 /* There are no external relocs for TAG13/TAG13b fields, so we
5954 create a dummy reloc. This will not live past md_apply_fix3. */
5955 fix->code = BFD_RELOC_UNUSED;
5956 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5957 fix->opnd = idesc->operands[index];
5960 ++CURR_SLOT.num_fixups;
5961 return OPERAND_MATCH;
5968 case IA64_OPND_LDXMOV:
5969 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5970 fix->code = BFD_RELOC_IA64_LDXMOV;
5971 fix->opnd = idesc->operands[index];
5974 ++CURR_SLOT.num_fixups;
5975 return OPERAND_MATCH;
5980 return OPERAND_MISMATCH;
5989 memset (e, 0, sizeof (*e));
5992 if (*input_line_pointer != '}')
5994 sep = *input_line_pointer++;
5998 if (!md.manual_bundling)
5999 as_warn ("Found '}' when manual bundling is off");
6001 CURR_SLOT.manual_bundling_off = 1;
6002 md.manual_bundling = 0;
6008 /* Returns the next entry in the opcode table that matches the one in
6009 IDESC, and frees the entry in IDESC. If no matching entry is
6010 found, NULL is returned instead. */
6012 static struct ia64_opcode *
6013 get_next_opcode (struct ia64_opcode *idesc)
6015 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6016 ia64_free_opcode (idesc);
6020 /* Parse the operands for the opcode and find the opcode variant that
6021 matches the specified operands, or NULL if no match is possible. */
6023 static struct ia64_opcode *
6024 parse_operands (idesc)
6025 struct ia64_opcode *idesc;
6027 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
6028 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
6031 enum ia64_opnd expected_operand = IA64_OPND_NIL;
6032 enum operand_match_result result;
6034 char *first_arg = 0, *end, *saved_input_pointer;
6037 assert (strlen (idesc->name) <= 128);
6039 strcpy (mnemonic, idesc->name);
6040 if (idesc->operands[2] == IA64_OPND_SOF
6041 || idesc->operands[1] == IA64_OPND_SOF)
6043 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6044 can't parse the first operand until we have parsed the
6045 remaining operands of the "alloc" instruction. */
6047 first_arg = input_line_pointer;
6048 end = strchr (input_line_pointer, '=');
6051 as_bad ("Expected separator `='");
6054 input_line_pointer = end + 1;
6061 if (i < NELEMS (CURR_SLOT.opnd))
6063 sep = parse_operand (CURR_SLOT.opnd + i);
6064 if (CURR_SLOT.opnd[i].X_op == O_absent)
6071 sep = parse_operand (&dummy);
6072 if (dummy.X_op == O_absent)
6078 if (sep != '=' && sep != ',')
6083 if (num_outputs > 0)
6084 as_bad ("Duplicate equal sign (=) in instruction");
6086 num_outputs = i + 1;
6091 as_bad ("Illegal operand separator `%c'", sep);
6095 if (idesc->operands[2] == IA64_OPND_SOF
6096 || idesc->operands[1] == IA64_OPND_SOF)
6098 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6099 know (strcmp (idesc->name, "alloc") == 0);
6100 i = (CURR_SLOT.opnd[1].X_op == O_register
6101 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6102 if (num_operands == i + 3 /* first_arg not included in this count! */
6103 && CURR_SLOT.opnd[i].X_op == O_constant
6104 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6105 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6106 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6108 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6109 CURR_SLOT.opnd[i + 1].X_add_number,
6110 CURR_SLOT.opnd[i + 2].X_add_number,
6111 CURR_SLOT.opnd[i + 3].X_add_number);
6113 /* now we can parse the first arg: */
6114 saved_input_pointer = input_line_pointer;
6115 input_line_pointer = first_arg;
6116 sep = parse_operand (CURR_SLOT.opnd + 0);
6118 --num_outputs; /* force error */
6119 input_line_pointer = saved_input_pointer;
6121 CURR_SLOT.opnd[i].X_add_number = sof;
6122 CURR_SLOT.opnd[i + 1].X_add_number
6123 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6124 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6128 highest_unmatched_operand = -4;
6129 curr_out_of_range_pos = -1;
6131 for (; idesc; idesc = get_next_opcode (idesc))
6133 if (num_outputs != idesc->num_outputs)
6134 continue; /* mismatch in # of outputs */
6135 if (highest_unmatched_operand < 0)
6136 highest_unmatched_operand |= 1;
6137 if (num_operands > NELEMS (idesc->operands)
6138 || (num_operands < NELEMS (idesc->operands)
6139 && idesc->operands[num_operands])
6140 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6141 continue; /* mismatch in number of arguments */
6142 if (highest_unmatched_operand < 0)
6143 highest_unmatched_operand |= 2;
6145 CURR_SLOT.num_fixups = 0;
6147 /* Try to match all operands. If we see an out-of-range operand,
6148 then continue trying to match the rest of the operands, since if
6149 the rest match, then this idesc will give the best error message. */
6151 out_of_range_pos = -1;
6152 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6154 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6155 if (result != OPERAND_MATCH)
6157 if (result != OPERAND_OUT_OF_RANGE)
6159 if (out_of_range_pos < 0)
6160 /* remember position of the first out-of-range operand: */
6161 out_of_range_pos = i;
6165 /* If we did not match all operands, or if at least one operand was
6166 out-of-range, then this idesc does not match. Keep track of which
6167 idesc matched the most operands before failing. If we have two
6168 idescs that failed at the same position, and one had an out-of-range
6169 operand, then prefer the out-of-range operand. Thus if we have
6170 "add r0=0x1000000,r1" we get an error saying the constant is out
6171 of range instead of an error saying that the constant should have been
6174 if (i != num_operands || out_of_range_pos >= 0)
6176 if (i > highest_unmatched_operand
6177 || (i == highest_unmatched_operand
6178 && out_of_range_pos > curr_out_of_range_pos))
6180 highest_unmatched_operand = i;
6181 if (out_of_range_pos >= 0)
6183 expected_operand = idesc->operands[out_of_range_pos];
6184 error_pos = out_of_range_pos;
6188 expected_operand = idesc->operands[i];
6191 curr_out_of_range_pos = out_of_range_pos;
6200 if (expected_operand)
6201 as_bad ("Operand %u of `%s' should be %s",
6202 error_pos + 1, mnemonic,
6203 elf64_ia64_operands[expected_operand].desc);
6204 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6205 as_bad ("Wrong number of output operands");
6206 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6207 as_bad ("Wrong number of input operands");
6209 as_bad ("Operand mismatch");
6213 /* Check that the instruction doesn't use
6214 - r0, f0, or f1 as output operands
6215 - the same predicate twice as output operands
6216 - r0 as address of a base update load or store
6217 - the same GR as output and address of a base update load
6218 - two even- or two odd-numbered FRs as output operands of a floating
6219 point parallel load.
6220 At most two (conflicting) output (or output-like) operands can exist,
6221 (floating point parallel loads have three outputs, but the base register,
6222 if updated, cannot conflict with the actual outputs). */
6224 for (i = 0; i < num_operands; ++i)
6229 switch (idesc->operands[i])
6234 if (i < num_outputs)
6236 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6239 reg1 = CURR_SLOT.opnd[i].X_add_number;
6241 reg2 = CURR_SLOT.opnd[i].X_add_number;
6246 if (i < num_outputs)
6249 reg1 = CURR_SLOT.opnd[i].X_add_number;
6251 reg2 = CURR_SLOT.opnd[i].X_add_number;
6258 if (i < num_outputs)
6260 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6261 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6264 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6267 reg1 = CURR_SLOT.opnd[i].X_add_number;
6269 reg2 = CURR_SLOT.opnd[i].X_add_number;
6273 if (idesc->flags & IA64_OPCODE_POSTINC)
6275 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6278 reg1 = CURR_SLOT.opnd[i].X_add_number;
6280 reg2 = CURR_SLOT.opnd[i].X_add_number;
6291 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6294 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6300 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6305 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6310 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6318 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6320 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6321 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6322 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6323 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6324 && ! ((reg1 ^ reg2) & 1))
6325 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6326 reg1 - REG_FR, reg2 - REG_FR);
6327 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6328 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6329 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6330 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6331 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6332 reg1 - REG_FR, reg2 - REG_FR);
6337 build_insn (slot, insnp)
6341 const struct ia64_operand *odesc, *o2desc;
6342 struct ia64_opcode *idesc = slot->idesc;
6343 bfd_signed_vma insn, val;
6347 insn = idesc->opcode | slot->qp_regno;
6349 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6351 if (slot->opnd[i].X_op == O_register
6352 || slot->opnd[i].X_op == O_constant
6353 || slot->opnd[i].X_op == O_index)
6354 val = slot->opnd[i].X_add_number;
6355 else if (slot->opnd[i].X_op == O_big)
6357 /* This must be the value 0x10000000000000000. */
6358 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6364 switch (idesc->operands[i])
6366 case IA64_OPND_IMMU64:
6367 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6368 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6369 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6370 | (((val >> 63) & 0x1) << 36));
6373 case IA64_OPND_IMMU62:
6374 val &= 0x3fffffffffffffffULL;
6375 if (val != slot->opnd[i].X_add_number)
6376 as_warn (_("Value truncated to 62 bits"));
6377 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6378 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6381 case IA64_OPND_TGT64:
6383 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6384 insn |= ((((val >> 59) & 0x1) << 36)
6385 | (((val >> 0) & 0xfffff) << 13));
6416 case IA64_OPND_R3_2:
6417 case IA64_OPND_CPUID_R3:
6418 case IA64_OPND_DBR_R3:
6419 case IA64_OPND_DTR_R3:
6420 case IA64_OPND_ITR_R3:
6421 case IA64_OPND_IBR_R3:
6423 case IA64_OPND_MSR_R3:
6424 case IA64_OPND_PKR_R3:
6425 case IA64_OPND_PMC_R3:
6426 case IA64_OPND_PMD_R3:
6427 case IA64_OPND_RR_R3:
6435 odesc = elf64_ia64_operands + idesc->operands[i];
6436 err = (*odesc->insert) (odesc, val, &insn);
6438 as_bad_where (slot->src_file, slot->src_line,
6439 "Bad operand value: %s", err);
6440 if (idesc->flags & IA64_OPCODE_PSEUDO)
6442 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6443 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6445 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6446 (*o2desc->insert) (o2desc, val, &insn);
6448 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6449 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6450 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6452 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6453 (*o2desc->insert) (o2desc, 64 - val, &insn);
6463 int manual_bundling_off = 0, manual_bundling = 0;
6464 enum ia64_unit required_unit, insn_unit = 0;
6465 enum ia64_insn_type type[3], insn_type;
6466 unsigned int template, orig_template;
6467 bfd_vma insn[3] = { -1, -1, -1 };
6468 struct ia64_opcode *idesc;
6469 int end_of_insn_group = 0, user_template = -1;
6470 int n, i, j, first, curr;
6471 unw_rec_list *ptr, *last_ptr, *end_ptr;
6472 bfd_vma t0 = 0, t1 = 0;
6473 struct label_fix *lfix;
6474 struct insn_fix *ifix;
6480 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6481 know (first >= 0 & first < NUM_SLOTS);
6482 n = MIN (3, md.num_slots_in_use);
6484 /* Determine template: user user_template if specified, best match
6487 if (md.slot[first].user_template >= 0)
6488 user_template = template = md.slot[first].user_template;
6491 /* Auto select appropriate template. */
6492 memset (type, 0, sizeof (type));
6494 for (i = 0; i < n; ++i)
6496 if (md.slot[curr].label_fixups && i != 0)
6498 type[i] = md.slot[curr].idesc->type;
6499 curr = (curr + 1) % NUM_SLOTS;
6501 template = best_template[type[0]][type[1]][type[2]];
6504 /* initialize instructions with appropriate nops: */
6505 for (i = 0; i < 3; ++i)
6506 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6510 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6511 from the start of the frag. */
6512 addr_mod = frag_now_fix () & 15;
6513 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6514 as_bad (_("instruction address is not a multiple of 16"));
6515 frag_now->insn_addr = addr_mod;
6516 frag_now->has_code = 1;
6518 /* now fill in slots with as many insns as possible: */
6520 idesc = md.slot[curr].idesc;
6521 end_of_insn_group = 0;
6522 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6524 /* If we have unwind records, we may need to update some now. */
6525 ptr = md.slot[curr].unwind_record;
6528 /* Find the last prologue/body record in the list for the current
6529 insn, and set the slot number for all records up to that point.
6530 This needs to be done now, because prologue/body records refer to
6531 the current point, not the point after the instruction has been
6532 issued. This matters because there may have been nops emitted
6533 meanwhile. Any non-prologue non-body record followed by a
6534 prologue/body record must also refer to the current point. */
6536 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6537 for (; ptr != end_ptr; ptr = ptr->next)
6538 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6539 || ptr->r.type == body)
6543 /* Make last_ptr point one after the last prologue/body
6545 last_ptr = last_ptr->next;
6546 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6549 ptr->slot_number = (unsigned long) f + i;
6550 ptr->slot_frag = frag_now;
6552 /* Remove the initialized records, so that we won't accidentally
6553 update them again if we insert a nop and continue. */
6554 md.slot[curr].unwind_record = last_ptr;
6558 manual_bundling_off = md.slot[curr].manual_bundling_off;
6559 if (md.slot[curr].manual_bundling_on)
6562 manual_bundling = 1;
6564 break; /* Need to start a new bundle. */
6567 if (idesc->flags & IA64_OPCODE_SLOT2)
6569 if (manual_bundling && !manual_bundling_off)
6571 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6572 "`%s' must be last in bundle", idesc->name);
6574 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6578 if (idesc->flags & IA64_OPCODE_LAST)
6581 unsigned int required_template;
6583 /* If we need a stop bit after an M slot, our only choice is
6584 template 5 (M;;MI). If we need a stop bit after a B
6585 slot, our only choice is to place it at the end of the
6586 bundle, because the only available templates are MIB,
6587 MBB, BBB, MMB, and MFB. We don't handle anything other
6588 than M and B slots because these are the only kind of
6589 instructions that can have the IA64_OPCODE_LAST bit set. */
6590 required_template = template;
6591 switch (idesc->type)
6595 required_template = 5;
6603 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6604 "Internal error: don't know how to force %s to end"
6605 "of instruction group", idesc->name);
6610 && (i > required_slot
6611 || (required_slot == 2 && !manual_bundling_off)
6612 || (user_template >= 0
6613 /* Changing from MMI to M;MI is OK. */
6614 && (template ^ required_template) > 1)))
6616 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6617 "`%s' must be last in instruction group",
6619 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6620 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6622 if (required_slot < i)
6623 /* Can't fit this instruction. */
6627 if (required_template != template)
6629 /* If we switch the template, we need to reset the NOPs
6630 after slot i. The slot-types of the instructions ahead
6631 of i never change, so we don't need to worry about
6632 changing NOPs in front of this slot. */
6633 for (j = i; j < 3; ++j)
6634 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6636 template = required_template;
6638 if (curr != first && md.slot[curr].label_fixups)
6640 if (manual_bundling)
6642 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6643 "Label must be first in a bundle");
6644 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6646 /* This insn must go into the first slot of a bundle. */
6650 if (end_of_insn_group && md.num_slots_in_use >= 1)
6652 /* We need an instruction group boundary in the middle of a
6653 bundle. See if we can switch to an other template with
6654 an appropriate boundary. */
6656 orig_template = template;
6657 if (i == 1 && (user_template == 4
6658 || (user_template < 0
6659 && (ia64_templ_desc[template].exec_unit[0]
6663 end_of_insn_group = 0;
6665 else if (i == 2 && (user_template == 0
6666 || (user_template < 0
6667 && (ia64_templ_desc[template].exec_unit[1]
6669 /* This test makes sure we don't switch the template if
6670 the next instruction is one that needs to be first in
6671 an instruction group. Since all those instructions are
6672 in the M group, there is no way such an instruction can
6673 fit in this bundle even if we switch the template. The
6674 reason we have to check for this is that otherwise we
6675 may end up generating "MI;;I M.." which has the deadly
6676 effect that the second M instruction is no longer the
6677 first in the group! --davidm 99/12/16 */
6678 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6681 end_of_insn_group = 0;
6684 && user_template == 0
6685 && !(idesc->flags & IA64_OPCODE_FIRST))
6686 /* Use the next slot. */
6688 else if (curr != first)
6689 /* can't fit this insn */
6692 if (template != orig_template)
6693 /* if we switch the template, we need to reset the NOPs
6694 after slot i. The slot-types of the instructions ahead
6695 of i never change, so we don't need to worry about
6696 changing NOPs in front of this slot. */
6697 for (j = i; j < 3; ++j)
6698 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6700 required_unit = ia64_templ_desc[template].exec_unit[i];
6702 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6703 if (idesc->type == IA64_TYPE_DYN)
6705 enum ia64_opnd opnd1, opnd2;
6707 if ((strcmp (idesc->name, "nop") == 0)
6708 || (strcmp (idesc->name, "hint") == 0)
6709 || (strcmp (idesc->name, "break") == 0))
6710 insn_unit = required_unit;
6711 else if (strcmp (idesc->name, "chk.s") == 0
6712 || strcmp (idesc->name, "mov") == 0)
6714 insn_unit = IA64_UNIT_M;
6715 if (required_unit == IA64_UNIT_I
6716 || (required_unit == IA64_UNIT_F && template == 6))
6717 insn_unit = IA64_UNIT_I;
6720 as_fatal ("emit_one_bundle: unexpected dynamic op");
6722 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6723 opnd1 = idesc->operands[0];
6724 opnd2 = idesc->operands[1];
6725 ia64_free_opcode (idesc);
6726 idesc = ia64_find_opcode (mnemonic);
6727 /* moves to/from ARs have collisions */
6728 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6730 while (idesc != NULL
6731 && (idesc->operands[0] != opnd1
6732 || idesc->operands[1] != opnd2))
6733 idesc = get_next_opcode (idesc);
6735 md.slot[curr].idesc = idesc;
6739 insn_type = idesc->type;
6740 insn_unit = IA64_UNIT_NIL;
6744 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6745 insn_unit = required_unit;
6747 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6748 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6749 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6750 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6751 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6756 if (insn_unit != required_unit)
6758 if (required_unit == IA64_UNIT_L
6759 && insn_unit == IA64_UNIT_I
6760 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6762 /* we got ourselves an MLX template but the current
6763 instruction isn't an X-unit, or an I-unit instruction
6764 that can go into the X slot of an MLX template. Duh. */
6765 if (md.num_slots_in_use >= NUM_SLOTS)
6767 as_bad_where (md.slot[curr].src_file,
6768 md.slot[curr].src_line,
6769 "`%s' can't go in X slot of "
6770 "MLX template", idesc->name);
6771 /* drop this insn so we don't livelock: */
6772 --md.num_slots_in_use;
6776 continue; /* try next slot */
6779 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6781 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6783 md.slot[curr].loc_directive_seen = 0;
6784 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6787 build_insn (md.slot + curr, insn + i);
6789 ptr = md.slot[curr].unwind_record;
6792 /* Set slot numbers for all remaining unwind records belonging to the
6793 current insn. There can not be any prologue/body unwind records
6795 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6796 for (; ptr != end_ptr; ptr = ptr->next)
6798 ptr->slot_number = (unsigned long) f + i;
6799 ptr->slot_frag = frag_now;
6801 md.slot[curr].unwind_record = NULL;
6804 if (required_unit == IA64_UNIT_L)
6807 /* skip one slot for long/X-unit instructions */
6810 --md.num_slots_in_use;
6812 /* now is a good time to fix up the labels for this insn: */
6813 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6815 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6816 symbol_set_frag (lfix->sym, frag_now);
6818 /* and fix up the tags also. */
6819 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6821 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6822 symbol_set_frag (lfix->sym, frag_now);
6825 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6827 ifix = md.slot[curr].fixup + j;
6828 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6829 &ifix->expr, ifix->is_pcrel, ifix->code);
6830 fix->tc_fix_data.opnd = ifix->opnd;
6831 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6832 fix->fx_file = md.slot[curr].src_file;
6833 fix->fx_line = md.slot[curr].src_line;
6836 end_of_insn_group = md.slot[curr].end_of_insn_group;
6839 ia64_free_opcode (md.slot[curr].idesc);
6840 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6841 md.slot[curr].user_template = -1;
6843 if (manual_bundling_off)
6845 manual_bundling = 0;
6848 curr = (curr + 1) % NUM_SLOTS;
6849 idesc = md.slot[curr].idesc;
6851 if (manual_bundling > 0)
6853 if (md.num_slots_in_use > 0)
6855 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6856 "`%s' does not fit into %s template",
6857 idesc->name, ia64_templ_desc[template].name);
6858 --md.num_slots_in_use;
6861 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6862 "Missing '}' at end of file");
6864 know (md.num_slots_in_use < NUM_SLOTS);
6866 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6867 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6869 number_to_chars_littleendian (f + 0, t0, 8);
6870 number_to_chars_littleendian (f + 8, t1, 8);
6874 unwind.list->next_slot_number = (unsigned long) f + 16;
6875 unwind.list->next_slot_frag = frag_now;
6880 md_parse_option (c, arg)
6887 /* Switches from the Intel assembler. */
6889 if (strcmp (arg, "ilp64") == 0
6890 || strcmp (arg, "lp64") == 0
6891 || strcmp (arg, "p64") == 0)
6893 md.flags |= EF_IA_64_ABI64;
6895 else if (strcmp (arg, "ilp32") == 0)
6897 md.flags &= ~EF_IA_64_ABI64;
6899 else if (strcmp (arg, "le") == 0)
6901 md.flags &= ~EF_IA_64_BE;
6902 default_big_endian = 0;
6904 else if (strcmp (arg, "be") == 0)
6906 md.flags |= EF_IA_64_BE;
6907 default_big_endian = 1;
6909 else if (strncmp (arg, "unwind-check=", 13) == 0)
6912 if (strcmp (arg, "warning") == 0)
6913 md.unwind_check = unwind_check_warning;
6914 else if (strcmp (arg, "error") == 0)
6915 md.unwind_check = unwind_check_error;
6924 if (strcmp (arg, "so") == 0)
6926 /* Suppress signon message. */
6928 else if (strcmp (arg, "pi") == 0)
6930 /* Reject privileged instructions. FIXME */
6932 else if (strcmp (arg, "us") == 0)
6934 /* Allow union of signed and unsigned range. FIXME */
6936 else if (strcmp (arg, "close_fcalls") == 0)
6938 /* Do not resolve global function calls. */
6945 /* temp[="prefix"] Insert temporary labels into the object file
6946 symbol table prefixed by "prefix".
6947 Default prefix is ":temp:".
6952 /* indirect=<tgt> Assume unannotated indirect branches behavior
6953 according to <tgt> --
6954 exit: branch out from the current context (default)
6955 labels: all labels in context may be branch targets
6957 if (strncmp (arg, "indirect=", 9) != 0)
6962 /* -X conflicts with an ignored option, use -x instead */
6964 if (!arg || strcmp (arg, "explicit") == 0)
6966 /* set default mode to explicit */
6967 md.default_explicit_mode = 1;
6970 else if (strcmp (arg, "auto") == 0)
6972 md.default_explicit_mode = 0;
6974 else if (strcmp (arg, "none") == 0)
6978 else if (strcmp (arg, "debug") == 0)
6982 else if (strcmp (arg, "debugx") == 0)
6984 md.default_explicit_mode = 1;
6987 else if (strcmp (arg, "debugn") == 0)
6994 as_bad (_("Unrecognized option '-x%s'"), arg);
6999 /* nops Print nops statistics. */
7002 /* GNU specific switches for gcc. */
7003 case OPTION_MCONSTANT_GP:
7004 md.flags |= EF_IA_64_CONS_GP;
7007 case OPTION_MAUTO_PIC:
7008 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7019 md_show_usage (stream)
7024 --mconstant-gp mark output file as using the constant-GP model\n\
7025 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7026 --mauto-pic mark output file as using the constant-GP model\n\
7027 without function descriptors (sets ELF header flag\n\
7028 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7029 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7030 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7031 -munwind-check=[warning|error]\n\
7032 unwind directive check (default -munwind-check=warning)\n\
7033 -x | -xexplicit turn on dependency violation checking\n\
7034 -xauto automagically remove dependency violations (default)\n\
7035 -xnone turn off dependency violation checking\n\
7036 -xdebug debug dependency violation checker\n\
7037 -xdebugn debug dependency violation checker but turn off\n\
7038 dependency violation checking\n\
7039 -xdebugx debug dependency violation checker and turn on\n\
7040 dependency violation checking\n"),
7045 ia64_after_parse_args ()
7047 if (debug_type == DEBUG_STABS)
7048 as_fatal (_("--gstabs is not supported for ia64"));
7051 /* Return true if TYPE fits in TEMPL at SLOT. */
7054 match (int templ, int type, int slot)
7056 enum ia64_unit unit;
7059 unit = ia64_templ_desc[templ].exec_unit[slot];
7062 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7064 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7066 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7067 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7068 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7069 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7070 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7071 default: result = 0; break;
7076 /* Add a bit of extra goodness if a nop of type F or B would fit
7077 in TEMPL at SLOT. */
7080 extra_goodness (int templ, int slot)
7082 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7084 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7089 /* This function is called once, at assembler startup time. It sets
7090 up all the tables, etc. that the MD part of the assembler will need
7091 that can be determined before arguments are parsed. */
7095 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
7100 md.explicit_mode = md.default_explicit_mode;
7102 bfd_set_section_alignment (stdoutput, text_section, 4);
7104 /* Make sure function pointers get initialized. */
7105 target_big_endian = -1;
7106 dot_byteorder (default_big_endian);
7108 alias_hash = hash_new ();
7109 alias_name_hash = hash_new ();
7110 secalias_hash = hash_new ();
7111 secalias_name_hash = hash_new ();
7113 pseudo_func[FUNC_DTP_MODULE].u.sym =
7114 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7115 &zero_address_frag);
7117 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7118 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7119 &zero_address_frag);
7121 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
7122 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7123 &zero_address_frag);
7125 pseudo_func[FUNC_GP_RELATIVE].u.sym =
7126 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7127 &zero_address_frag);
7129 pseudo_func[FUNC_LT_RELATIVE].u.sym =
7130 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7131 &zero_address_frag);
7133 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7134 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7135 &zero_address_frag);
7137 pseudo_func[FUNC_PC_RELATIVE].u.sym =
7138 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7139 &zero_address_frag);
7141 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
7142 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7143 &zero_address_frag);
7145 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
7146 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7147 &zero_address_frag);
7149 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
7150 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7151 &zero_address_frag);
7153 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7154 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7155 &zero_address_frag);
7157 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7158 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7159 &zero_address_frag);
7161 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7162 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7163 &zero_address_frag);
7165 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7166 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7167 &zero_address_frag);
7169 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7170 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7171 &zero_address_frag);
7173 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7174 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7175 &zero_address_frag);
7177 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7178 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7179 &zero_address_frag);
7181 /* Compute the table of best templates. We compute goodness as a
7182 base 4 value, in which each match counts for 3, each F counts
7183 for 2, each B counts for 1. This should maximize the number of
7184 F and B nops in the chosen bundles, which is good because these
7185 pipelines are least likely to be overcommitted. */
7186 for (i = 0; i < IA64_NUM_TYPES; ++i)
7187 for (j = 0; j < IA64_NUM_TYPES; ++j)
7188 for (k = 0; k < IA64_NUM_TYPES; ++k)
7191 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7194 if (match (t, i, 0))
7196 if (match (t, j, 1))
7198 if (match (t, k, 2))
7199 goodness = 3 + 3 + 3;
7201 goodness = 3 + 3 + extra_goodness (t, 2);
7203 else if (match (t, j, 2))
7204 goodness = 3 + 3 + extra_goodness (t, 1);
7208 goodness += extra_goodness (t, 1);
7209 goodness += extra_goodness (t, 2);
7212 else if (match (t, i, 1))
7214 if (match (t, j, 2))
7217 goodness = 3 + extra_goodness (t, 2);
7219 else if (match (t, i, 2))
7220 goodness = 3 + extra_goodness (t, 1);
7222 if (goodness > best)
7225 best_template[i][j][k] = t;
7230 for (i = 0; i < NUM_SLOTS; ++i)
7231 md.slot[i].user_template = -1;
7233 md.pseudo_hash = hash_new ();
7234 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7236 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7237 (void *) (pseudo_opcode + i));
7239 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7240 pseudo_opcode[i].name, err);
7243 md.reg_hash = hash_new ();
7244 md.dynreg_hash = hash_new ();
7245 md.const_hash = hash_new ();
7246 md.entry_hash = hash_new ();
7248 /* general registers: */
7251 for (i = 0; i < total; ++i)
7253 sprintf (name, "r%d", i - REG_GR);
7254 md.regsym[i] = declare_register (name, i);
7257 /* floating point registers: */
7259 for (; i < total; ++i)
7261 sprintf (name, "f%d", i - REG_FR);
7262 md.regsym[i] = declare_register (name, i);
7265 /* application registers: */
7268 for (; i < total; ++i)
7270 sprintf (name, "ar%d", i - REG_AR);
7271 md.regsym[i] = declare_register (name, i);
7274 /* control registers: */
7277 for (; i < total; ++i)
7279 sprintf (name, "cr%d", i - REG_CR);
7280 md.regsym[i] = declare_register (name, i);
7283 /* predicate registers: */
7285 for (; i < total; ++i)
7287 sprintf (name, "p%d", i - REG_P);
7288 md.regsym[i] = declare_register (name, i);
7291 /* branch registers: */
7293 for (; i < total; ++i)
7295 sprintf (name, "b%d", i - REG_BR);
7296 md.regsym[i] = declare_register (name, i);
7299 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7300 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7301 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7302 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7303 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7304 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7305 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7307 for (i = 0; i < NELEMS (indirect_reg); ++i)
7309 regnum = indirect_reg[i].regnum;
7310 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7313 /* define synonyms for application registers: */
7314 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7315 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7316 REG_AR + ar[i - REG_AR].regnum);
7318 /* define synonyms for control registers: */
7319 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7320 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7321 REG_CR + cr[i - REG_CR].regnum);
7323 declare_register ("gp", REG_GR + 1);
7324 declare_register ("sp", REG_GR + 12);
7325 declare_register ("rp", REG_BR + 0);
7327 /* pseudo-registers used to specify unwind info: */
7328 declare_register ("psp", REG_PSP);
7330 declare_register_set ("ret", 4, REG_GR + 8);
7331 declare_register_set ("farg", 8, REG_FR + 8);
7332 declare_register_set ("fret", 8, REG_FR + 8);
7334 for (i = 0; i < NELEMS (const_bits); ++i)
7336 err = hash_insert (md.const_hash, const_bits[i].name,
7337 (PTR) (const_bits + i));
7339 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7343 /* Set the architecture and machine depending on defaults and command line
7345 if (md.flags & EF_IA_64_ABI64)
7346 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7348 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7351 as_warn (_("Could not set architecture and machine"));
7353 /* Set the pointer size and pointer shift size depending on md.flags */
7355 if (md.flags & EF_IA_64_ABI64)
7357 md.pointer_size = 8; /* pointers are 8 bytes */
7358 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7362 md.pointer_size = 4; /* pointers are 4 bytes */
7363 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7366 md.mem_offset.hint = 0;
7369 md.entry_labels = NULL;
7372 /* Set the default options in md. Cannot do this in md_begin because
7373 that is called after md_parse_option which is where we set the
7374 options in md based on command line options. */
7377 ia64_init (argc, argv)
7378 int argc ATTRIBUTE_UNUSED;
7379 char **argv ATTRIBUTE_UNUSED;
7381 md.flags = MD_FLAGS_DEFAULT;
7383 /* FIXME: We should change it to unwind_check_error someday. */
7384 md.unwind_check = unwind_check_warning;
7387 /* Return a string for the target object file format. */
7390 ia64_target_format ()
7392 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7394 if (md.flags & EF_IA_64_BE)
7396 if (md.flags & EF_IA_64_ABI64)
7397 #if defined(TE_AIX50)
7398 return "elf64-ia64-aix-big";
7399 #elif defined(TE_HPUX)
7400 return "elf64-ia64-hpux-big";
7402 return "elf64-ia64-big";
7405 #if defined(TE_AIX50)
7406 return "elf32-ia64-aix-big";
7407 #elif defined(TE_HPUX)
7408 return "elf32-ia64-hpux-big";
7410 return "elf32-ia64-big";
7415 if (md.flags & EF_IA_64_ABI64)
7417 return "elf64-ia64-aix-little";
7419 return "elf64-ia64-little";
7423 return "elf32-ia64-aix-little";
7425 return "elf32-ia64-little";
7430 return "unknown-format";
7434 ia64_end_of_source ()
7436 /* terminate insn group upon reaching end of file: */
7437 insn_group_break (1, 0, 0);
7439 /* emits slots we haven't written yet: */
7440 ia64_flush_insns ();
7442 bfd_set_private_flags (stdoutput, md.flags);
7444 md.mem_offset.hint = 0;
7450 if (md.qp.X_op == O_register)
7451 as_bad ("qualifying predicate not followed by instruction");
7452 md.qp.X_op = O_absent;
7454 if (ignore_input ())
7457 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7459 if (md.detect_dv && !md.explicit_mode)
7466 as_warn (_("Explicit stops are ignored in auto mode"));
7470 insn_group_break (1, 0, 0);
7474 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7476 static int defining_tag = 0;
7479 ia64_unrecognized_line (ch)
7485 expression (&md.qp);
7486 if (*input_line_pointer++ != ')')
7488 as_bad ("Expected ')'");
7491 if (md.qp.X_op != O_register)
7493 as_bad ("Qualifying predicate expected");
7496 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7498 as_bad ("Predicate register expected");
7504 if (md.manual_bundling)
7505 as_warn ("Found '{' when manual bundling is already turned on");
7507 CURR_SLOT.manual_bundling_on = 1;
7508 md.manual_bundling = 1;
7510 /* Bundling is only acceptable in explicit mode
7511 or when in default automatic mode. */
7512 if (md.detect_dv && !md.explicit_mode)
7514 if (!md.mode_explicitly_set
7515 && !md.default_explicit_mode)
7518 as_warn (_("Found '{' after explicit switch to automatic mode"));
7523 if (!md.manual_bundling)
7524 as_warn ("Found '}' when manual bundling is off");
7526 PREV_SLOT.manual_bundling_off = 1;
7527 md.manual_bundling = 0;
7529 /* switch back to automatic mode, if applicable */
7532 && !md.mode_explicitly_set
7533 && !md.default_explicit_mode)
7536 /* Allow '{' to follow on the same line. We also allow ";;", but that
7537 happens automatically because ';' is an end of line marker. */
7539 if (input_line_pointer[0] == '{')
7541 input_line_pointer++;
7542 return ia64_unrecognized_line ('{');
7545 demand_empty_rest_of_line ();
7555 if (md.qp.X_op == O_register)
7557 as_bad ("Tag must come before qualifying predicate.");
7561 /* This implements just enough of read_a_source_file in read.c to
7562 recognize labels. */
7563 if (is_name_beginner (*input_line_pointer))
7565 s = input_line_pointer;
7566 c = get_symbol_end ();
7568 else if (LOCAL_LABELS_FB
7569 && ISDIGIT (*input_line_pointer))
7572 while (ISDIGIT (*input_line_pointer))
7573 temp = (temp * 10) + *input_line_pointer++ - '0';
7574 fb_label_instance_inc (temp);
7575 s = fb_label_name (temp, 0);
7576 c = *input_line_pointer;
7585 /* Put ':' back for error messages' sake. */
7586 *input_line_pointer++ = ':';
7587 as_bad ("Expected ':'");
7594 /* Put ':' back for error messages' sake. */
7595 *input_line_pointer++ = ':';
7596 if (*input_line_pointer++ != ']')
7598 as_bad ("Expected ']'");
7603 as_bad ("Tag name expected");
7613 /* Not a valid line. */
7618 ia64_frob_label (sym)
7621 struct label_fix *fix;
7623 /* Tags need special handling since they are not bundle breaks like
7627 fix = obstack_alloc (¬es, sizeof (*fix));
7629 fix->next = CURR_SLOT.tag_fixups;
7630 CURR_SLOT.tag_fixups = fix;
7635 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7637 md.last_text_seg = now_seg;
7638 fix = obstack_alloc (¬es, sizeof (*fix));
7640 fix->next = CURR_SLOT.label_fixups;
7641 CURR_SLOT.label_fixups = fix;
7643 /* Keep track of how many code entry points we've seen. */
7644 if (md.path == md.maxpaths)
7647 md.entry_labels = (const char **)
7648 xrealloc ((void *) md.entry_labels,
7649 md.maxpaths * sizeof (char *));
7651 md.entry_labels[md.path++] = S_GET_NAME (sym);
7656 /* The HP-UX linker will give unresolved symbol errors for symbols
7657 that are declared but unused. This routine removes declared,
7658 unused symbols from an object. */
7660 ia64_frob_symbol (sym)
7663 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7664 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7665 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7666 && ! S_IS_EXTERNAL (sym)))
7673 ia64_flush_pending_output ()
7675 if (!md.keep_pending_output
7676 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7678 /* ??? This causes many unnecessary stop bits to be emitted.
7679 Unfortunately, it isn't clear if it is safe to remove this. */
7680 insn_group_break (1, 0, 0);
7681 ia64_flush_insns ();
7685 /* Do ia64-specific expression optimization. All that's done here is
7686 to transform index expressions that are either due to the indexing
7687 of rotating registers or due to the indexing of indirect register
7690 ia64_optimize_expr (l, op, r)
7699 if (l->X_op == O_register && r->X_op == O_constant)
7701 num_regs = (l->X_add_number >> 16);
7702 if ((unsigned) r->X_add_number >= num_regs)
7705 as_bad ("No current frame");
7707 as_bad ("Index out of range 0..%u", num_regs - 1);
7708 r->X_add_number = 0;
7710 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7713 else if (l->X_op == O_register && r->X_op == O_register)
7715 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7716 || l->X_add_number == IND_MEM)
7718 as_bad ("Indirect register set name expected");
7719 l->X_add_number = IND_CPUID;
7722 l->X_op_symbol = md.regsym[l->X_add_number];
7723 l->X_add_number = r->X_add_number;
7731 ia64_parse_name (name, e, nextcharP)
7736 struct const_desc *cdesc;
7737 struct dynreg *dr = 0;
7744 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7746 /* Find what relocation pseudo-function we're dealing with. */
7747 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7748 if (pseudo_func[idx].name
7749 && pseudo_func[idx].name[0] == name[1]
7750 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7752 pseudo_type = pseudo_func[idx].type;
7755 switch (pseudo_type)
7757 case PSEUDO_FUNC_RELOC:
7758 end = input_line_pointer;
7759 if (*nextcharP != '(')
7761 as_bad ("Expected '('");
7765 ++input_line_pointer;
7767 if (*input_line_pointer != ')')
7769 as_bad ("Missing ')'");
7773 ++input_line_pointer;
7774 if (e->X_op != O_symbol)
7776 if (e->X_op != O_pseudo_fixup)
7778 as_bad ("Not a symbolic expression");
7781 if (idx != FUNC_LT_RELATIVE)
7783 as_bad ("Illegal combination of relocation functions");
7786 switch (S_GET_VALUE (e->X_op_symbol))
7788 case FUNC_FPTR_RELATIVE:
7789 idx = FUNC_LT_FPTR_RELATIVE; break;
7790 case FUNC_DTP_MODULE:
7791 idx = FUNC_LT_DTP_MODULE; break;
7792 case FUNC_DTP_RELATIVE:
7793 idx = FUNC_LT_DTP_RELATIVE; break;
7794 case FUNC_TP_RELATIVE:
7795 idx = FUNC_LT_TP_RELATIVE; break;
7797 as_bad ("Illegal combination of relocation functions");
7801 /* Make sure gas doesn't get rid of local symbols that are used
7803 e->X_op = O_pseudo_fixup;
7804 e->X_op_symbol = pseudo_func[idx].u.sym;
7806 *nextcharP = *input_line_pointer;
7809 case PSEUDO_FUNC_CONST:
7810 e->X_op = O_constant;
7811 e->X_add_number = pseudo_func[idx].u.ival;
7814 case PSEUDO_FUNC_REG:
7815 e->X_op = O_register;
7816 e->X_add_number = pseudo_func[idx].u.ival;
7825 /* first see if NAME is a known register name: */
7826 sym = hash_find (md.reg_hash, name);
7829 e->X_op = O_register;
7830 e->X_add_number = S_GET_VALUE (sym);
7834 cdesc = hash_find (md.const_hash, name);
7837 e->X_op = O_constant;
7838 e->X_add_number = cdesc->value;
7842 /* check for inN, locN, or outN: */
7847 if (name[1] == 'n' && ISDIGIT (name[2]))
7855 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7863 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7874 /* Ignore register numbers with leading zeroes, except zero itself. */
7875 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
7877 unsigned long regnum;
7879 /* The name is inN, locN, or outN; parse the register number. */
7880 regnum = strtoul (name + idx, &end, 10);
7881 if (end > name + idx && *end == '\0' && regnum < 96)
7883 if (regnum >= dr->num_regs)
7886 as_bad ("No current frame");
7888 as_bad ("Register number out of range 0..%u",
7892 e->X_op = O_register;
7893 e->X_add_number = dr->base + regnum;
7898 end = alloca (strlen (name) + 1);
7900 name = ia64_canonicalize_symbol_name (end);
7901 if ((dr = hash_find (md.dynreg_hash, name)))
7903 /* We've got ourselves the name of a rotating register set.
7904 Store the base register number in the low 16 bits of
7905 X_add_number and the size of the register set in the top 16
7907 e->X_op = O_register;
7908 e->X_add_number = dr->base | (dr->num_regs << 16);
7914 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7917 ia64_canonicalize_symbol_name (name)
7920 size_t len = strlen (name), full = len;
7922 while (len > 0 && name[len - 1] == '#')
7927 as_bad ("Standalone `#' is illegal");
7929 as_bad ("Zero-length symbol is illegal");
7931 else if (len < full - 1)
7932 as_warn ("Redundant `#' suffix operators");
7937 /* Return true if idesc is a conditional branch instruction. This excludes
7938 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7939 because they always read/write resources regardless of the value of the
7940 qualifying predicate. br.ia must always use p0, and hence is always
7941 taken. Thus this function returns true for branches which can fall
7942 through, and which use no resources if they do fall through. */
7945 is_conditional_branch (idesc)
7946 struct ia64_opcode *idesc;
7948 /* br is a conditional branch. Everything that starts with br. except
7949 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7950 Everything that starts with brl is a conditional branch. */
7951 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7952 && (idesc->name[2] == '\0'
7953 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7954 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7955 || idesc->name[2] == 'l'
7956 /* br.cond, br.call, br.clr */
7957 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7958 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7959 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7962 /* Return whether the given opcode is a taken branch. If there's any doubt,
7966 is_taken_branch (idesc)
7967 struct ia64_opcode *idesc;
7969 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7970 || strncmp (idesc->name, "br.ia", 5) == 0);
7973 /* Return whether the given opcode is an interruption or rfi. If there's any
7974 doubt, returns zero. */
7977 is_interruption_or_rfi (idesc)
7978 struct ia64_opcode *idesc;
7980 if (strcmp (idesc->name, "rfi") == 0)
7985 /* Returns the index of the given dependency in the opcode's list of chks, or
7986 -1 if there is no dependency. */
7989 depends_on (depind, idesc)
7991 struct ia64_opcode *idesc;
7994 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7995 for (i = 0; i < dep->nchks; i++)
7997 if (depind == DEP (dep->chks[i]))
8003 /* Determine a set of specific resources used for a particular resource
8004 class. Returns the number of specific resources identified For those
8005 cases which are not determinable statically, the resource returned is
8008 Meanings of value in 'NOTE':
8009 1) only read/write when the register number is explicitly encoded in the
8011 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8012 accesses CFM when qualifying predicate is in the rotating region.
8013 3) general register value is used to specify an indirect register; not
8014 determinable statically.
8015 4) only read the given resource when bits 7:0 of the indirect index
8016 register value does not match the register number of the resource; not
8017 determinable statically.
8018 5) all rules are implementation specific.
8019 6) only when both the index specified by the reader and the index specified
8020 by the writer have the same value in bits 63:61; not determinable
8022 7) only access the specified resource when the corresponding mask bit is
8024 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8025 only read when these insns reference FR2-31
8026 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8027 written when these insns write FR32-127
8028 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8030 11) The target predicates are written independently of PR[qp], but source
8031 registers are only read if PR[qp] is true. Since the state of PR[qp]
8032 cannot statically be determined, all source registers are marked used.
8033 12) This insn only reads the specified predicate register when that
8034 register is the PR[qp].
8035 13) This reference to ld-c only applies to teh GR whose value is loaded
8036 with data returned from memory, not the post-incremented address register.
8037 14) The RSE resource includes the implementation-specific RSE internal
8038 state resources. At least one (and possibly more) of these resources are
8039 read by each instruction listed in IC:rse-readers. At least one (and
8040 possibly more) of these resources are written by each insn listed in
8042 15+16) Represents reserved instructions, which the assembler does not
8045 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8046 this code; there are no dependency violations based on memory access.
8049 #define MAX_SPECS 256
8054 specify_resource (dep, idesc, type, specs, note, path)
8055 const struct ia64_dependency *dep;
8056 struct ia64_opcode *idesc;
8057 int type; /* is this a DV chk or a DV reg? */
8058 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8059 int note; /* resource note for this insn's usage */
8060 int path; /* which execution path to examine */
8067 if (dep->mode == IA64_DV_WAW
8068 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8069 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8072 /* template for any resources we identify */
8073 tmpl.dependency = dep;
8075 tmpl.insn_srlz = tmpl.data_srlz = 0;
8076 tmpl.qp_regno = CURR_SLOT.qp_regno;
8077 tmpl.link_to_qp_branch = 1;
8078 tmpl.mem_offset.hint = 0;
8081 tmpl.cmp_type = CMP_NONE;
8084 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8085 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8086 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8088 /* we don't need to track these */
8089 if (dep->semantics == IA64_DVS_NONE)
8092 switch (dep->specifier)
8097 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8099 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8100 if (regno >= 0 && regno <= 7)
8102 specs[count] = tmpl;
8103 specs[count++].index = regno;
8109 for (i = 0; i < 8; i++)
8111 specs[count] = tmpl;
8112 specs[count++].index = i;
8121 case IA64_RS_AR_UNAT:
8122 /* This is a mov =AR or mov AR= instruction. */
8123 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8125 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8126 if (regno == AR_UNAT)
8128 specs[count++] = tmpl;
8133 /* This is a spill/fill, or other instruction that modifies the
8136 /* Unless we can determine the specific bits used, mark the whole
8137 thing; bits 8:3 of the memory address indicate the bit used in
8138 UNAT. The .mem.offset hint may be used to eliminate a small
8139 subset of conflicts. */
8140 specs[count] = tmpl;
8141 if (md.mem_offset.hint)
8144 fprintf (stderr, " Using hint for spill/fill\n");
8145 /* The index isn't actually used, just set it to something
8146 approximating the bit index. */
8147 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8148 specs[count].mem_offset.hint = 1;
8149 specs[count].mem_offset.offset = md.mem_offset.offset;
8150 specs[count++].mem_offset.base = md.mem_offset.base;
8154 specs[count++].specific = 0;
8162 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8164 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8165 if ((regno >= 8 && regno <= 15)
8166 || (regno >= 20 && regno <= 23)
8167 || (regno >= 31 && regno <= 39)
8168 || (regno >= 41 && regno <= 47)
8169 || (regno >= 67 && regno <= 111))
8171 specs[count] = tmpl;
8172 specs[count++].index = regno;
8185 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8187 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8188 if ((regno >= 48 && regno <= 63)
8189 || (regno >= 112 && regno <= 127))
8191 specs[count] = tmpl;
8192 specs[count++].index = regno;
8198 for (i = 48; i < 64; i++)
8200 specs[count] = tmpl;
8201 specs[count++].index = i;
8203 for (i = 112; i < 128; i++)
8205 specs[count] = tmpl;
8206 specs[count++].index = i;
8224 for (i = 0; i < idesc->num_outputs; i++)
8225 if (idesc->operands[i] == IA64_OPND_B1
8226 || idesc->operands[i] == IA64_OPND_B2)
8228 specs[count] = tmpl;
8229 specs[count++].index =
8230 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8235 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8236 if (idesc->operands[i] == IA64_OPND_B1
8237 || idesc->operands[i] == IA64_OPND_B2)
8239 specs[count] = tmpl;
8240 specs[count++].index =
8241 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8247 case IA64_RS_CPUID: /* four or more registers */
8250 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8252 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8253 if (regno >= 0 && regno < NELEMS (gr_values)
8256 specs[count] = tmpl;
8257 specs[count++].index = gr_values[regno].value & 0xFF;
8261 specs[count] = tmpl;
8262 specs[count++].specific = 0;
8272 case IA64_RS_DBR: /* four or more registers */
8275 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8277 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8278 if (regno >= 0 && regno < NELEMS (gr_values)
8281 specs[count] = tmpl;
8282 specs[count++].index = gr_values[regno].value & 0xFF;
8286 specs[count] = tmpl;
8287 specs[count++].specific = 0;
8291 else if (note == 0 && !rsrc_write)
8293 specs[count] = tmpl;
8294 specs[count++].specific = 0;
8302 case IA64_RS_IBR: /* four or more registers */
8305 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8307 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8308 if (regno >= 0 && regno < NELEMS (gr_values)
8311 specs[count] = tmpl;
8312 specs[count++].index = gr_values[regno].value & 0xFF;
8316 specs[count] = tmpl;
8317 specs[count++].specific = 0;
8330 /* These are implementation specific. Force all references to
8331 conflict with all other references. */
8332 specs[count] = tmpl;
8333 specs[count++].specific = 0;
8341 case IA64_RS_PKR: /* 16 or more registers */
8342 if (note == 3 || note == 4)
8344 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8346 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8347 if (regno >= 0 && regno < NELEMS (gr_values)
8352 specs[count] = tmpl;
8353 specs[count++].index = gr_values[regno].value & 0xFF;
8356 for (i = 0; i < NELEMS (gr_values); i++)
8358 /* Uses all registers *except* the one in R3. */
8359 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8361 specs[count] = tmpl;
8362 specs[count++].index = i;
8368 specs[count] = tmpl;
8369 specs[count++].specific = 0;
8376 specs[count] = tmpl;
8377 specs[count++].specific = 0;
8381 case IA64_RS_PMC: /* four or more registers */
8384 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8385 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8388 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8390 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8391 if (regno >= 0 && regno < NELEMS (gr_values)
8394 specs[count] = tmpl;
8395 specs[count++].index = gr_values[regno].value & 0xFF;
8399 specs[count] = tmpl;
8400 specs[count++].specific = 0;
8410 case IA64_RS_PMD: /* four or more registers */
8413 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8415 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8416 if (regno >= 0 && regno < NELEMS (gr_values)
8419 specs[count] = tmpl;
8420 specs[count++].index = gr_values[regno].value & 0xFF;
8424 specs[count] = tmpl;
8425 specs[count++].specific = 0;
8435 case IA64_RS_RR: /* eight registers */
8438 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8440 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8441 if (regno >= 0 && regno < NELEMS (gr_values)
8444 specs[count] = tmpl;
8445 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8449 specs[count] = tmpl;
8450 specs[count++].specific = 0;
8454 else if (note == 0 && !rsrc_write)
8456 specs[count] = tmpl;
8457 specs[count++].specific = 0;
8465 case IA64_RS_CR_IRR:
8468 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8469 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8471 && idesc->operands[1] == IA64_OPND_CR3
8474 for (i = 0; i < 4; i++)
8476 specs[count] = tmpl;
8477 specs[count++].index = CR_IRR0 + i;
8483 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8484 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8486 && regno <= CR_IRR3)
8488 specs[count] = tmpl;
8489 specs[count++].index = regno;
8498 case IA64_RS_CR_LRR:
8505 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8506 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8507 && (regno == CR_LRR0 || regno == CR_LRR1))
8509 specs[count] = tmpl;
8510 specs[count++].index = regno;
8518 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8520 specs[count] = tmpl;
8521 specs[count++].index =
8522 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8537 else if (rsrc_write)
8539 if (dep->specifier == IA64_RS_FRb
8540 && idesc->operands[0] == IA64_OPND_F1)
8542 specs[count] = tmpl;
8543 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8548 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8550 if (idesc->operands[i] == IA64_OPND_F2
8551 || idesc->operands[i] == IA64_OPND_F3
8552 || idesc->operands[i] == IA64_OPND_F4)
8554 specs[count] = tmpl;
8555 specs[count++].index =
8556 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8565 /* This reference applies only to the GR whose value is loaded with
8566 data returned from memory. */
8567 specs[count] = tmpl;
8568 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8574 for (i = 0; i < idesc->num_outputs; i++)
8575 if (idesc->operands[i] == IA64_OPND_R1
8576 || idesc->operands[i] == IA64_OPND_R2
8577 || idesc->operands[i] == IA64_OPND_R3)
8579 specs[count] = tmpl;
8580 specs[count++].index =
8581 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8583 if (idesc->flags & IA64_OPCODE_POSTINC)
8584 for (i = 0; i < NELEMS (idesc->operands); i++)
8585 if (idesc->operands[i] == IA64_OPND_MR3)
8587 specs[count] = tmpl;
8588 specs[count++].index =
8589 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8594 /* Look for anything that reads a GR. */
8595 for (i = 0; i < NELEMS (idesc->operands); i++)
8597 if (idesc->operands[i] == IA64_OPND_MR3
8598 || idesc->operands[i] == IA64_OPND_CPUID_R3
8599 || idesc->operands[i] == IA64_OPND_DBR_R3
8600 || idesc->operands[i] == IA64_OPND_IBR_R3
8601 || idesc->operands[i] == IA64_OPND_MSR_R3
8602 || idesc->operands[i] == IA64_OPND_PKR_R3
8603 || idesc->operands[i] == IA64_OPND_PMC_R3
8604 || idesc->operands[i] == IA64_OPND_PMD_R3
8605 || idesc->operands[i] == IA64_OPND_RR_R3
8606 || ((i >= idesc->num_outputs)
8607 && (idesc->operands[i] == IA64_OPND_R1
8608 || idesc->operands[i] == IA64_OPND_R2
8609 || idesc->operands[i] == IA64_OPND_R3
8610 /* addl source register. */
8611 || idesc->operands[i] == IA64_OPND_R3_2)))
8613 specs[count] = tmpl;
8614 specs[count++].index =
8615 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8626 /* This is the same as IA64_RS_PRr, except that the register range is
8627 from 1 - 15, and there are no rotating register reads/writes here. */
8631 for (i = 1; i < 16; i++)
8633 specs[count] = tmpl;
8634 specs[count++].index = i;
8640 /* Mark only those registers indicated by the mask. */
8643 mask = CURR_SLOT.opnd[2].X_add_number;
8644 for (i = 1; i < 16; i++)
8645 if (mask & ((valueT) 1 << i))
8647 specs[count] = tmpl;
8648 specs[count++].index = i;
8656 else if (note == 11) /* note 11 implies note 1 as well */
8660 for (i = 0; i < idesc->num_outputs; i++)
8662 if (idesc->operands[i] == IA64_OPND_P1
8663 || idesc->operands[i] == IA64_OPND_P2)
8665 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8666 if (regno >= 1 && regno < 16)
8668 specs[count] = tmpl;
8669 specs[count++].index = regno;
8679 else if (note == 12)
8681 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8683 specs[count] = tmpl;
8684 specs[count++].index = CURR_SLOT.qp_regno;
8691 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8692 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8693 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8694 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8696 if ((idesc->operands[0] == IA64_OPND_P1
8697 || idesc->operands[0] == IA64_OPND_P2)
8698 && p1 >= 1 && p1 < 16)
8700 specs[count] = tmpl;
8701 specs[count].cmp_type =
8702 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8703 specs[count++].index = p1;
8705 if ((idesc->operands[1] == IA64_OPND_P1
8706 || idesc->operands[1] == IA64_OPND_P2)
8707 && p2 >= 1 && p2 < 16)
8709 specs[count] = tmpl;
8710 specs[count].cmp_type =
8711 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8712 specs[count++].index = p2;
8717 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8719 specs[count] = tmpl;
8720 specs[count++].index = CURR_SLOT.qp_regno;
8722 if (idesc->operands[1] == IA64_OPND_PR)
8724 for (i = 1; i < 16; i++)
8726 specs[count] = tmpl;
8727 specs[count++].index = i;
8738 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8739 simplified cases of this. */
8743 for (i = 16; i < 63; i++)
8745 specs[count] = tmpl;
8746 specs[count++].index = i;
8752 /* Mark only those registers indicated by the mask. */
8754 && idesc->operands[0] == IA64_OPND_PR)
8756 mask = CURR_SLOT.opnd[2].X_add_number;
8757 if (mask & ((valueT) 1 << 16))
8758 for (i = 16; i < 63; i++)
8760 specs[count] = tmpl;
8761 specs[count++].index = i;
8765 && idesc->operands[0] == IA64_OPND_PR_ROT)
8767 for (i = 16; i < 63; i++)
8769 specs[count] = tmpl;
8770 specs[count++].index = i;
8778 else if (note == 11) /* note 11 implies note 1 as well */
8782 for (i = 0; i < idesc->num_outputs; i++)
8784 if (idesc->operands[i] == IA64_OPND_P1
8785 || idesc->operands[i] == IA64_OPND_P2)
8787 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8788 if (regno >= 16 && regno < 63)
8790 specs[count] = tmpl;
8791 specs[count++].index = regno;
8801 else if (note == 12)
8803 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8805 specs[count] = tmpl;
8806 specs[count++].index = CURR_SLOT.qp_regno;
8813 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8814 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8815 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8816 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8818 if ((idesc->operands[0] == IA64_OPND_P1
8819 || idesc->operands[0] == IA64_OPND_P2)
8820 && p1 >= 16 && p1 < 63)
8822 specs[count] = tmpl;
8823 specs[count].cmp_type =
8824 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8825 specs[count++].index = p1;
8827 if ((idesc->operands[1] == IA64_OPND_P1
8828 || idesc->operands[1] == IA64_OPND_P2)
8829 && p2 >= 16 && p2 < 63)
8831 specs[count] = tmpl;
8832 specs[count].cmp_type =
8833 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8834 specs[count++].index = p2;
8839 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8841 specs[count] = tmpl;
8842 specs[count++].index = CURR_SLOT.qp_regno;
8844 if (idesc->operands[1] == IA64_OPND_PR)
8846 for (i = 16; i < 63; i++)
8848 specs[count] = tmpl;
8849 specs[count++].index = i;
8861 /* Verify that the instruction is using the PSR bit indicated in
8865 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8867 if (dep->regindex < 6)
8869 specs[count++] = tmpl;
8872 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8874 if (dep->regindex < 32
8875 || dep->regindex == 35
8876 || dep->regindex == 36
8877 || (!rsrc_write && dep->regindex == PSR_CPL))
8879 specs[count++] = tmpl;
8882 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8884 if (dep->regindex < 32
8885 || dep->regindex == 35
8886 || dep->regindex == 36
8887 || (rsrc_write && dep->regindex == PSR_CPL))
8889 specs[count++] = tmpl;
8894 /* Several PSR bits have very specific dependencies. */
8895 switch (dep->regindex)
8898 specs[count++] = tmpl;
8903 specs[count++] = tmpl;
8907 /* Only certain CR accesses use PSR.ic */
8908 if (idesc->operands[0] == IA64_OPND_CR3
8909 || idesc->operands[1] == IA64_OPND_CR3)
8912 ((idesc->operands[0] == IA64_OPND_CR3)
8915 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8930 specs[count++] = tmpl;
8939 specs[count++] = tmpl;
8943 /* Only some AR accesses use cpl */
8944 if (idesc->operands[0] == IA64_OPND_AR3
8945 || idesc->operands[1] == IA64_OPND_AR3)
8948 ((idesc->operands[0] == IA64_OPND_AR3)
8951 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8958 && regno <= AR_K7))))
8960 specs[count++] = tmpl;
8965 specs[count++] = tmpl;
8975 if (idesc->operands[0] == IA64_OPND_IMMU24)
8977 mask = CURR_SLOT.opnd[0].X_add_number;
8983 if (mask & ((valueT) 1 << dep->regindex))
8985 specs[count++] = tmpl;
8990 int min = dep->regindex == PSR_DFL ? 2 : 32;
8991 int max = dep->regindex == PSR_DFL ? 31 : 127;
8992 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8993 for (i = 0; i < NELEMS (idesc->operands); i++)
8995 if (idesc->operands[i] == IA64_OPND_F1
8996 || idesc->operands[i] == IA64_OPND_F2
8997 || idesc->operands[i] == IA64_OPND_F3
8998 || idesc->operands[i] == IA64_OPND_F4)
9000 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9001 if (reg >= min && reg <= max)
9003 specs[count++] = tmpl;
9010 int min = dep->regindex == PSR_MFL ? 2 : 32;
9011 int max = dep->regindex == PSR_MFL ? 31 : 127;
9012 /* mfh is read on writes to FR32-127; mfl is read on writes to
9014 for (i = 0; i < idesc->num_outputs; i++)
9016 if (idesc->operands[i] == IA64_OPND_F1)
9018 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9019 if (reg >= min && reg <= max)
9021 specs[count++] = tmpl;
9026 else if (note == 10)
9028 for (i = 0; i < NELEMS (idesc->operands); i++)
9030 if (idesc->operands[i] == IA64_OPND_R1
9031 || idesc->operands[i] == IA64_OPND_R2
9032 || idesc->operands[i] == IA64_OPND_R3)
9034 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9035 if (regno >= 16 && regno <= 31)
9037 specs[count++] = tmpl;
9048 case IA64_RS_AR_FPSR:
9049 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
9051 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9052 if (regno == AR_FPSR)
9054 specs[count++] = tmpl;
9059 specs[count++] = tmpl;
9064 /* Handle all AR[REG] resources */
9065 if (note == 0 || note == 1)
9067 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9068 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9069 && regno == dep->regindex)
9071 specs[count++] = tmpl;
9073 /* other AR[REG] resources may be affected by AR accesses */
9074 else if (idesc->operands[0] == IA64_OPND_AR3)
9077 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9078 switch (dep->regindex)
9084 if (regno == AR_BSPSTORE)
9086 specs[count++] = tmpl;
9090 (regno == AR_BSPSTORE
9091 || regno == AR_RNAT))
9093 specs[count++] = tmpl;
9098 else if (idesc->operands[1] == IA64_OPND_AR3)
9101 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9102 switch (dep->regindex)
9107 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9109 specs[count++] = tmpl;
9116 specs[count++] = tmpl;
9126 /* Handle all CR[REG] resources */
9127 if (note == 0 || note == 1)
9129 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9131 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9132 if (regno == dep->regindex)
9134 specs[count++] = tmpl;
9136 else if (!rsrc_write)
9138 /* Reads from CR[IVR] affect other resources. */
9139 if (regno == CR_IVR)
9141 if ((dep->regindex >= CR_IRR0
9142 && dep->regindex <= CR_IRR3)
9143 || dep->regindex == CR_TPR)
9145 specs[count++] = tmpl;
9152 specs[count++] = tmpl;
9161 case IA64_RS_INSERVICE:
9162 /* look for write of EOI (67) or read of IVR (65) */
9163 if ((idesc->operands[0] == IA64_OPND_CR3
9164 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9165 || (idesc->operands[1] == IA64_OPND_CR3
9166 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9168 specs[count++] = tmpl;
9175 specs[count++] = tmpl;
9186 specs[count++] = tmpl;
9190 /* Check if any of the registers accessed are in the rotating region.
9191 mov to/from pr accesses CFM only when qp_regno is in the rotating
9193 for (i = 0; i < NELEMS (idesc->operands); i++)
9195 if (idesc->operands[i] == IA64_OPND_R1
9196 || idesc->operands[i] == IA64_OPND_R2
9197 || idesc->operands[i] == IA64_OPND_R3)
9199 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9200 /* Assumes that md.rot.num_regs is always valid */
9201 if (md.rot.num_regs > 0
9203 && num < 31 + md.rot.num_regs)
9205 specs[count] = tmpl;
9206 specs[count++].specific = 0;
9209 else if (idesc->operands[i] == IA64_OPND_F1
9210 || idesc->operands[i] == IA64_OPND_F2
9211 || idesc->operands[i] == IA64_OPND_F3
9212 || idesc->operands[i] == IA64_OPND_F4)
9214 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9217 specs[count] = tmpl;
9218 specs[count++].specific = 0;
9221 else if (idesc->operands[i] == IA64_OPND_P1
9222 || idesc->operands[i] == IA64_OPND_P2)
9224 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9227 specs[count] = tmpl;
9228 specs[count++].specific = 0;
9232 if (CURR_SLOT.qp_regno > 15)
9234 specs[count] = tmpl;
9235 specs[count++].specific = 0;
9240 /* This is the same as IA64_RS_PRr, except simplified to account for
9241 the fact that there is only one register. */
9245 specs[count++] = tmpl;
9250 if (idesc->operands[2] == IA64_OPND_IMM17)
9251 mask = CURR_SLOT.opnd[2].X_add_number;
9252 if (mask & ((valueT) 1 << 63))
9253 specs[count++] = tmpl;
9255 else if (note == 11)
9257 if ((idesc->operands[0] == IA64_OPND_P1
9258 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9259 || (idesc->operands[1] == IA64_OPND_P2
9260 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9262 specs[count++] = tmpl;
9265 else if (note == 12)
9267 if (CURR_SLOT.qp_regno == 63)
9269 specs[count++] = tmpl;
9276 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9277 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9278 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9279 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9282 && (idesc->operands[0] == IA64_OPND_P1
9283 || idesc->operands[0] == IA64_OPND_P2))
9285 specs[count] = tmpl;
9286 specs[count++].cmp_type =
9287 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9290 && (idesc->operands[1] == IA64_OPND_P1
9291 || idesc->operands[1] == IA64_OPND_P2))
9293 specs[count] = tmpl;
9294 specs[count++].cmp_type =
9295 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9300 if (CURR_SLOT.qp_regno == 63)
9302 specs[count++] = tmpl;
9313 /* FIXME we can identify some individual RSE written resources, but RSE
9314 read resources have not yet been completely identified, so for now
9315 treat RSE as a single resource */
9316 if (strncmp (idesc->name, "mov", 3) == 0)
9320 if (idesc->operands[0] == IA64_OPND_AR3
9321 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9323 specs[count++] = tmpl;
9328 if (idesc->operands[0] == IA64_OPND_AR3)
9330 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9331 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9333 specs[count++] = tmpl;
9336 else if (idesc->operands[1] == IA64_OPND_AR3)
9338 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9339 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9340 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9342 specs[count++] = tmpl;
9349 specs[count++] = tmpl;
9354 /* FIXME -- do any of these need to be non-specific? */
9355 specs[count++] = tmpl;
9359 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9366 /* Clear branch flags on marked resources. This breaks the link between the
9367 QP of the marking instruction and a subsequent branch on the same QP. */
9370 clear_qp_branch_flag (mask)
9374 for (i = 0; i < regdepslen; i++)
9376 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9377 if ((bit & mask) != 0)
9379 regdeps[i].link_to_qp_branch = 0;
9384 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9385 any mutexes which contain one of the PRs and create new ones when
9389 update_qp_mutex (valueT mask)
9395 while (i < qp_mutexeslen)
9397 if ((qp_mutexes[i].prmask & mask) != 0)
9399 /* If it destroys and creates the same mutex, do nothing. */
9400 if (qp_mutexes[i].prmask == mask
9401 && qp_mutexes[i].path == md.path)
9412 fprintf (stderr, " Clearing mutex relation");
9413 print_prmask (qp_mutexes[i].prmask);
9414 fprintf (stderr, "\n");
9417 /* Deal with the old mutex with more than 3+ PRs only if
9418 the new mutex on the same execution path with it.
9420 FIXME: The 3+ mutex support is incomplete.
9421 dot_pred_rel () may be a better place to fix it. */
9422 if (qp_mutexes[i].path == md.path)
9424 /* If it is a proper subset of the mutex, create a
9427 && (qp_mutexes[i].prmask & mask) == mask)
9430 qp_mutexes[i].prmask &= ~mask;
9431 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9433 /* Modify the mutex if there are more than one
9441 /* Remove the mutex. */
9442 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9450 add_qp_mutex (mask);
9455 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9457 Any changes to a PR clears the mutex relations which include that PR. */
9460 clear_qp_mutex (mask)
9466 while (i < qp_mutexeslen)
9468 if ((qp_mutexes[i].prmask & mask) != 0)
9472 fprintf (stderr, " Clearing mutex relation");
9473 print_prmask (qp_mutexes[i].prmask);
9474 fprintf (stderr, "\n");
9476 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9483 /* Clear implies relations which contain PRs in the given masks.
9484 P1_MASK indicates the source of the implies relation, while P2_MASK
9485 indicates the implied PR. */
9488 clear_qp_implies (p1_mask, p2_mask)
9495 while (i < qp_implieslen)
9497 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9498 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9501 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9502 qp_implies[i].p1, qp_implies[i].p2);
9503 qp_implies[i] = qp_implies[--qp_implieslen];
9510 /* Add the PRs specified to the list of implied relations. */
9513 add_qp_imply (p1, p2)
9520 /* p0 is not meaningful here. */
9521 if (p1 == 0 || p2 == 0)
9527 /* If it exists already, ignore it. */
9528 for (i = 0; i < qp_implieslen; i++)
9530 if (qp_implies[i].p1 == p1
9531 && qp_implies[i].p2 == p2
9532 && qp_implies[i].path == md.path
9533 && !qp_implies[i].p2_branched)
9537 if (qp_implieslen == qp_impliestotlen)
9539 qp_impliestotlen += 20;
9540 qp_implies = (struct qp_imply *)
9541 xrealloc ((void *) qp_implies,
9542 qp_impliestotlen * sizeof (struct qp_imply));
9545 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9546 qp_implies[qp_implieslen].p1 = p1;
9547 qp_implies[qp_implieslen].p2 = p2;
9548 qp_implies[qp_implieslen].path = md.path;
9549 qp_implies[qp_implieslen++].p2_branched = 0;
9551 /* Add in the implied transitive relations; for everything that p2 implies,
9552 make p1 imply that, too; for everything that implies p1, make it imply p2
9554 for (i = 0; i < qp_implieslen; i++)
9556 if (qp_implies[i].p1 == p2)
9557 add_qp_imply (p1, qp_implies[i].p2);
9558 if (qp_implies[i].p2 == p1)
9559 add_qp_imply (qp_implies[i].p1, p2);
9561 /* Add in mutex relations implied by this implies relation; for each mutex
9562 relation containing p2, duplicate it and replace p2 with p1. */
9563 bit = (valueT) 1 << p1;
9564 mask = (valueT) 1 << p2;
9565 for (i = 0; i < qp_mutexeslen; i++)
9567 if (qp_mutexes[i].prmask & mask)
9568 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9572 /* Add the PRs specified in the mask to the mutex list; this means that only
9573 one of the PRs can be true at any time. PR0 should never be included in
9583 if (qp_mutexeslen == qp_mutexestotlen)
9585 qp_mutexestotlen += 20;
9586 qp_mutexes = (struct qpmutex *)
9587 xrealloc ((void *) qp_mutexes,
9588 qp_mutexestotlen * sizeof (struct qpmutex));
9592 fprintf (stderr, " Registering mutex on");
9593 print_prmask (mask);
9594 fprintf (stderr, "\n");
9596 qp_mutexes[qp_mutexeslen].path = md.path;
9597 qp_mutexes[qp_mutexeslen++].prmask = mask;
9601 has_suffix_p (name, suffix)
9605 size_t namelen = strlen (name);
9606 size_t sufflen = strlen (suffix);
9608 if (namelen <= sufflen)
9610 return strcmp (name + namelen - sufflen, suffix) == 0;
9614 clear_register_values ()
9618 fprintf (stderr, " Clearing register values\n");
9619 for (i = 1; i < NELEMS (gr_values); i++)
9620 gr_values[i].known = 0;
9623 /* Keep track of register values/changes which affect DV tracking.
9625 optimization note: should add a flag to classes of insns where otherwise we
9626 have to examine a group of strings to identify them. */
9629 note_register_values (idesc)
9630 struct ia64_opcode *idesc;
9632 valueT qp_changemask = 0;
9635 /* Invalidate values for registers being written to. */
9636 for (i = 0; i < idesc->num_outputs; i++)
9638 if (idesc->operands[i] == IA64_OPND_R1
9639 || idesc->operands[i] == IA64_OPND_R2
9640 || idesc->operands[i] == IA64_OPND_R3)
9642 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9643 if (regno > 0 && regno < NELEMS (gr_values))
9644 gr_values[regno].known = 0;
9646 else if (idesc->operands[i] == IA64_OPND_R3_2)
9648 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9649 if (regno > 0 && regno < 4)
9650 gr_values[regno].known = 0;
9652 else if (idesc->operands[i] == IA64_OPND_P1
9653 || idesc->operands[i] == IA64_OPND_P2)
9655 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9656 qp_changemask |= (valueT) 1 << regno;
9658 else if (idesc->operands[i] == IA64_OPND_PR)
9660 if (idesc->operands[2] & (valueT) 0x10000)
9661 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9663 qp_changemask = idesc->operands[2];
9666 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9668 if (idesc->operands[1] & ((valueT) 1 << 43))
9669 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9671 qp_changemask = idesc->operands[1];
9672 qp_changemask &= ~(valueT) 0xFFFF;
9677 /* Always clear qp branch flags on any PR change. */
9678 /* FIXME there may be exceptions for certain compares. */
9679 clear_qp_branch_flag (qp_changemask);
9681 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9682 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9684 qp_changemask |= ~(valueT) 0xFFFF;
9685 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9687 for (i = 32; i < 32 + md.rot.num_regs; i++)
9688 gr_values[i].known = 0;
9690 clear_qp_mutex (qp_changemask);
9691 clear_qp_implies (qp_changemask, qp_changemask);
9693 /* After a call, all register values are undefined, except those marked
9695 else if (strncmp (idesc->name, "br.call", 6) == 0
9696 || strncmp (idesc->name, "brl.call", 7) == 0)
9698 /* FIXME keep GR values which are marked as "safe_across_calls" */
9699 clear_register_values ();
9700 clear_qp_mutex (~qp_safe_across_calls);
9701 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9702 clear_qp_branch_flag (~qp_safe_across_calls);
9704 else if (is_interruption_or_rfi (idesc)
9705 || is_taken_branch (idesc))
9707 clear_register_values ();
9708 clear_qp_mutex (~(valueT) 0);
9709 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9711 /* Look for mutex and implies relations. */
9712 else if ((idesc->operands[0] == IA64_OPND_P1
9713 || idesc->operands[0] == IA64_OPND_P2)
9714 && (idesc->operands[1] == IA64_OPND_P1
9715 || idesc->operands[1] == IA64_OPND_P2))
9717 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9718 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9719 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9720 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9722 /* If both PRs are PR0, we can't really do anything. */
9723 if (p1 == 0 && p2 == 0)
9726 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9728 /* In general, clear mutexes and implies which include P1 or P2,
9729 with the following exceptions. */
9730 else if (has_suffix_p (idesc->name, ".or.andcm")
9731 || has_suffix_p (idesc->name, ".and.orcm"))
9733 clear_qp_implies (p2mask, p1mask);
9735 else if (has_suffix_p (idesc->name, ".andcm")
9736 || has_suffix_p (idesc->name, ".and"))
9738 clear_qp_implies (0, p1mask | p2mask);
9740 else if (has_suffix_p (idesc->name, ".orcm")
9741 || has_suffix_p (idesc->name, ".or"))
9743 clear_qp_mutex (p1mask | p2mask);
9744 clear_qp_implies (p1mask | p2mask, 0);
9750 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9752 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9753 if (p1 == 0 || p2 == 0)
9754 clear_qp_mutex (p1mask | p2mask);
9756 added = update_qp_mutex (p1mask | p2mask);
9758 if (CURR_SLOT.qp_regno == 0
9759 || has_suffix_p (idesc->name, ".unc"))
9761 if (added == 0 && p1 && p2)
9762 add_qp_mutex (p1mask | p2mask);
9763 if (CURR_SLOT.qp_regno != 0)
9766 add_qp_imply (p1, CURR_SLOT.qp_regno);
9768 add_qp_imply (p2, CURR_SLOT.qp_regno);
9773 /* Look for mov imm insns into GRs. */
9774 else if (idesc->operands[0] == IA64_OPND_R1
9775 && (idesc->operands[1] == IA64_OPND_IMM22
9776 || idesc->operands[1] == IA64_OPND_IMMU64)
9777 && CURR_SLOT.opnd[1].X_op == O_constant
9778 && (strcmp (idesc->name, "mov") == 0
9779 || strcmp (idesc->name, "movl") == 0))
9781 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9782 if (regno > 0 && regno < NELEMS (gr_values))
9784 gr_values[regno].known = 1;
9785 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9786 gr_values[regno].path = md.path;
9789 fprintf (stderr, " Know gr%d = ", regno);
9790 fprintf_vma (stderr, gr_values[regno].value);
9791 fputs ("\n", stderr);
9795 /* Look for dep.z imm insns. */
9796 else if (idesc->operands[0] == IA64_OPND_R1
9797 && idesc->operands[1] == IA64_OPND_IMM8
9798 && strcmp (idesc->name, "dep.z") == 0)
9800 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9801 if (regno > 0 && regno < NELEMS (gr_values))
9803 valueT value = CURR_SLOT.opnd[1].X_add_number;
9805 if (CURR_SLOT.opnd[3].X_add_number < 64)
9806 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
9807 value <<= CURR_SLOT.opnd[2].X_add_number;
9808 gr_values[regno].known = 1;
9809 gr_values[regno].value = value;
9810 gr_values[regno].path = md.path;
9813 fprintf (stderr, " Know gr%d = ", regno);
9814 fprintf_vma (stderr, gr_values[regno].value);
9815 fputs ("\n", stderr);
9821 clear_qp_mutex (qp_changemask);
9822 clear_qp_implies (qp_changemask, qp_changemask);
9826 /* Return whether the given predicate registers are currently mutex. */
9829 qp_mutex (p1, p2, path)
9839 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9840 for (i = 0; i < qp_mutexeslen; i++)
9842 if (qp_mutexes[i].path >= path
9843 && (qp_mutexes[i].prmask & mask) == mask)
9850 /* Return whether the given resource is in the given insn's list of chks
9851 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9855 resources_match (rs, idesc, note, qp_regno, path)
9857 struct ia64_opcode *idesc;
9862 struct rsrc specs[MAX_SPECS];
9865 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9866 we don't need to check. One exception is note 11, which indicates that
9867 target predicates are written regardless of PR[qp]. */
9868 if (qp_mutex (rs->qp_regno, qp_regno, path)
9872 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9875 /* UNAT checking is a bit more specific than other resources */
9876 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9877 && specs[count].mem_offset.hint
9878 && rs->mem_offset.hint)
9880 if (rs->mem_offset.base == specs[count].mem_offset.base)
9882 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9883 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9890 /* Skip apparent PR write conflicts where both writes are an AND or both
9891 writes are an OR. */
9892 if (rs->dependency->specifier == IA64_RS_PR
9893 || rs->dependency->specifier == IA64_RS_PRr
9894 || rs->dependency->specifier == IA64_RS_PR63)
9896 if (specs[count].cmp_type != CMP_NONE
9897 && specs[count].cmp_type == rs->cmp_type)
9900 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9901 dv_mode[rs->dependency->mode],
9902 rs->dependency->specifier != IA64_RS_PR63 ?
9903 specs[count].index : 63);
9908 " %s on parallel compare conflict %s vs %s on PR%d\n",
9909 dv_mode[rs->dependency->mode],
9910 dv_cmp_type[rs->cmp_type],
9911 dv_cmp_type[specs[count].cmp_type],
9912 rs->dependency->specifier != IA64_RS_PR63 ?
9913 specs[count].index : 63);
9917 /* If either resource is not specific, conservatively assume a conflict
9919 if (!specs[count].specific || !rs->specific)
9921 else if (specs[count].index == rs->index)
9928 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9929 insert a stop to create the break. Update all resource dependencies
9930 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9931 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9932 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9936 insn_group_break (insert_stop, qp_regno, save_current)
9943 if (insert_stop && md.num_slots_in_use > 0)
9944 PREV_SLOT.end_of_insn_group = 1;
9948 fprintf (stderr, " Insn group break%s",
9949 (insert_stop ? " (w/stop)" : ""));
9951 fprintf (stderr, " effective for QP=%d", qp_regno);
9952 fprintf (stderr, "\n");
9956 while (i < regdepslen)
9958 const struct ia64_dependency *dep = regdeps[i].dependency;
9961 && regdeps[i].qp_regno != qp_regno)
9968 && CURR_SLOT.src_file == regdeps[i].file
9969 && CURR_SLOT.src_line == regdeps[i].line)
9975 /* clear dependencies which are automatically cleared by a stop, or
9976 those that have reached the appropriate state of insn serialization */
9977 if (dep->semantics == IA64_DVS_IMPLIED
9978 || dep->semantics == IA64_DVS_IMPLIEDF
9979 || regdeps[i].insn_srlz == STATE_SRLZ)
9981 print_dependency ("Removing", i);
9982 regdeps[i] = regdeps[--regdepslen];
9986 if (dep->semantics == IA64_DVS_DATA
9987 || dep->semantics == IA64_DVS_INSTR
9988 || dep->semantics == IA64_DVS_SPECIFIC)
9990 if (regdeps[i].insn_srlz == STATE_NONE)
9991 regdeps[i].insn_srlz = STATE_STOP;
9992 if (regdeps[i].data_srlz == STATE_NONE)
9993 regdeps[i].data_srlz = STATE_STOP;
10000 /* Add the given resource usage spec to the list of active dependencies. */
10003 mark_resource (idesc, dep, spec, depind, path)
10004 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10005 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
10010 if (regdepslen == regdepstotlen)
10012 regdepstotlen += 20;
10013 regdeps = (struct rsrc *)
10014 xrealloc ((void *) regdeps,
10015 regdepstotlen * sizeof (struct rsrc));
10018 regdeps[regdepslen] = *spec;
10019 regdeps[regdepslen].depind = depind;
10020 regdeps[regdepslen].path = path;
10021 regdeps[regdepslen].file = CURR_SLOT.src_file;
10022 regdeps[regdepslen].line = CURR_SLOT.src_line;
10024 print_dependency ("Adding", regdepslen);
10030 print_dependency (action, depind)
10031 const char *action;
10036 fprintf (stderr, " %s %s '%s'",
10037 action, dv_mode[(regdeps[depind].dependency)->mode],
10038 (regdeps[depind].dependency)->name);
10039 if (regdeps[depind].specific && regdeps[depind].index >= 0)
10040 fprintf (stderr, " (%d)", regdeps[depind].index);
10041 if (regdeps[depind].mem_offset.hint)
10043 fputs (" ", stderr);
10044 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10045 fputs ("+", stderr);
10046 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10048 fprintf (stderr, "\n");
10053 instruction_serialization ()
10057 fprintf (stderr, " Instruction serialization\n");
10058 for (i = 0; i < regdepslen; i++)
10059 if (regdeps[i].insn_srlz == STATE_STOP)
10060 regdeps[i].insn_srlz = STATE_SRLZ;
10064 data_serialization ()
10068 fprintf (stderr, " Data serialization\n");
10069 while (i < regdepslen)
10071 if (regdeps[i].data_srlz == STATE_STOP
10072 /* Note: as of 991210, all "other" dependencies are cleared by a
10073 data serialization. This might change with new tables */
10074 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10076 print_dependency ("Removing", i);
10077 regdeps[i] = regdeps[--regdepslen];
10084 /* Insert stops and serializations as needed to avoid DVs. */
10087 remove_marked_resource (rs)
10090 switch (rs->dependency->semantics)
10092 case IA64_DVS_SPECIFIC:
10094 fprintf (stderr, "Implementation-specific, assume worst case...\n");
10095 /* ...fall through... */
10096 case IA64_DVS_INSTR:
10098 fprintf (stderr, "Inserting instr serialization\n");
10099 if (rs->insn_srlz < STATE_STOP)
10100 insn_group_break (1, 0, 0);
10101 if (rs->insn_srlz < STATE_SRLZ)
10103 struct slot oldslot = CURR_SLOT;
10104 /* Manually jam a srlz.i insn into the stream */
10105 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10106 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10107 instruction_serialization ();
10108 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10109 if (++md.num_slots_in_use >= NUM_SLOTS)
10110 emit_one_bundle ();
10111 CURR_SLOT = oldslot;
10113 insn_group_break (1, 0, 0);
10115 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
10116 "other" types of DV are eliminated
10117 by a data serialization */
10118 case IA64_DVS_DATA:
10120 fprintf (stderr, "Inserting data serialization\n");
10121 if (rs->data_srlz < STATE_STOP)
10122 insn_group_break (1, 0, 0);
10124 struct slot oldslot = CURR_SLOT;
10125 /* Manually jam a srlz.d insn into the stream */
10126 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10127 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10128 data_serialization ();
10129 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10130 if (++md.num_slots_in_use >= NUM_SLOTS)
10131 emit_one_bundle ();
10132 CURR_SLOT = oldslot;
10135 case IA64_DVS_IMPLIED:
10136 case IA64_DVS_IMPLIEDF:
10138 fprintf (stderr, "Inserting stop\n");
10139 insn_group_break (1, 0, 0);
10146 /* Check the resources used by the given opcode against the current dependency
10149 The check is run once for each execution path encountered. In this case,
10150 a unique execution path is the sequence of instructions following a code
10151 entry point, e.g. the following has three execution paths, one starting
10152 at L0, one at L1, and one at L2.
10161 check_dependencies (idesc)
10162 struct ia64_opcode *idesc;
10164 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10168 /* Note that the number of marked resources may change within the
10169 loop if in auto mode. */
10171 while (i < regdepslen)
10173 struct rsrc *rs = ®deps[i];
10174 const struct ia64_dependency *dep = rs->dependency;
10177 int start_over = 0;
10179 if (dep->semantics == IA64_DVS_NONE
10180 || (chkind = depends_on (rs->depind, idesc)) == -1)
10186 note = NOTE (opdeps->chks[chkind]);
10188 /* Check this resource against each execution path seen thus far. */
10189 for (path = 0; path <= md.path; path++)
10193 /* If the dependency wasn't on the path being checked, ignore it. */
10194 if (rs->path < path)
10197 /* If the QP for this insn implies a QP which has branched, don't
10198 bother checking. Ed. NOTE: I don't think this check is terribly
10199 useful; what's the point of generating code which will only be
10200 reached if its QP is zero?
10201 This code was specifically inserted to handle the following code,
10202 based on notes from Intel's DV checking code, where p1 implies p2.
10208 if (CURR_SLOT.qp_regno != 0)
10212 for (implies = 0; implies < qp_implieslen; implies++)
10214 if (qp_implies[implies].path >= path
10215 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10216 && qp_implies[implies].p2_branched)
10226 if ((matchtype = resources_match (rs, idesc, note,
10227 CURR_SLOT.qp_regno, path)) != 0)
10230 char pathmsg[256] = "";
10231 char indexmsg[256] = "";
10232 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10235 sprintf (pathmsg, " when entry is at label '%s'",
10236 md.entry_labels[path - 1]);
10237 if (matchtype == 1 && rs->index >= 0)
10238 sprintf (indexmsg, ", specific resource number is %d",
10240 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10242 (certain ? "violates" : "may violate"),
10243 dv_mode[dep->mode], dep->name,
10244 dv_sem[dep->semantics],
10245 pathmsg, indexmsg);
10247 if (md.explicit_mode)
10249 as_warn ("%s", msg);
10250 if (path < md.path)
10251 as_warn (_("Only the first path encountering the conflict "
10253 as_warn_where (rs->file, rs->line,
10254 _("This is the location of the "
10255 "conflicting usage"));
10256 /* Don't bother checking other paths, to avoid duplicating
10257 the same warning */
10263 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10265 remove_marked_resource (rs);
10267 /* since the set of dependencies has changed, start over */
10268 /* FIXME -- since we're removing dvs as we go, we
10269 probably don't really need to start over... */
10282 /* Register new dependencies based on the given opcode. */
10285 mark_resources (idesc)
10286 struct ia64_opcode *idesc;
10289 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10290 int add_only_qp_reads = 0;
10292 /* A conditional branch only uses its resources if it is taken; if it is
10293 taken, we stop following that path. The other branch types effectively
10294 *always* write their resources. If it's not taken, register only QP
10296 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10298 add_only_qp_reads = 1;
10302 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10304 for (i = 0; i < opdeps->nregs; i++)
10306 const struct ia64_dependency *dep;
10307 struct rsrc specs[MAX_SPECS];
10312 dep = ia64_find_dependency (opdeps->regs[i]);
10313 note = NOTE (opdeps->regs[i]);
10315 if (add_only_qp_reads
10316 && !(dep->mode == IA64_DV_WAR
10317 && (dep->specifier == IA64_RS_PR
10318 || dep->specifier == IA64_RS_PRr
10319 || dep->specifier == IA64_RS_PR63)))
10322 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10324 while (count-- > 0)
10326 mark_resource (idesc, dep, &specs[count],
10327 DEP (opdeps->regs[i]), md.path);
10330 /* The execution path may affect register values, which may in turn
10331 affect which indirect-access resources are accessed. */
10332 switch (dep->specifier)
10336 case IA64_RS_CPUID:
10344 for (path = 0; path < md.path; path++)
10346 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10347 while (count-- > 0)
10348 mark_resource (idesc, dep, &specs[count],
10349 DEP (opdeps->regs[i]), path);
10356 /* Remove dependencies when they no longer apply. */
10359 update_dependencies (idesc)
10360 struct ia64_opcode *idesc;
10364 if (strcmp (idesc->name, "srlz.i") == 0)
10366 instruction_serialization ();
10368 else if (strcmp (idesc->name, "srlz.d") == 0)
10370 data_serialization ();
10372 else if (is_interruption_or_rfi (idesc)
10373 || is_taken_branch (idesc))
10375 /* Although technically the taken branch doesn't clear dependencies
10376 which require a srlz.[id], we don't follow the branch; the next
10377 instruction is assumed to start with a clean slate. */
10381 else if (is_conditional_branch (idesc)
10382 && CURR_SLOT.qp_regno != 0)
10384 int is_call = strstr (idesc->name, ".call") != NULL;
10386 for (i = 0; i < qp_implieslen; i++)
10388 /* If the conditional branch's predicate is implied by the predicate
10389 in an existing dependency, remove that dependency. */
10390 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10393 /* Note that this implied predicate takes a branch so that if
10394 a later insn generates a DV but its predicate implies this
10395 one, we can avoid the false DV warning. */
10396 qp_implies[i].p2_branched = 1;
10397 while (depind < regdepslen)
10399 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10401 print_dependency ("Removing", depind);
10402 regdeps[depind] = regdeps[--regdepslen];
10409 /* Any marked resources which have this same predicate should be
10410 cleared, provided that the QP hasn't been modified between the
10411 marking instruction and the branch. */
10414 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10419 while (i < regdepslen)
10421 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10422 && regdeps[i].link_to_qp_branch
10423 && (regdeps[i].file != CURR_SLOT.src_file
10424 || regdeps[i].line != CURR_SLOT.src_line))
10426 /* Treat like a taken branch */
10427 print_dependency ("Removing", i);
10428 regdeps[i] = regdeps[--regdepslen];
10437 /* Examine the current instruction for dependency violations. */
10441 struct ia64_opcode *idesc;
10445 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10446 idesc->name, CURR_SLOT.src_line,
10447 idesc->dependencies->nchks,
10448 idesc->dependencies->nregs);
10451 /* Look through the list of currently marked resources; if the current
10452 instruction has the dependency in its chks list which uses that resource,
10453 check against the specific resources used. */
10454 check_dependencies (idesc);
10456 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10457 then add them to the list of marked resources. */
10458 mark_resources (idesc);
10460 /* There are several types of dependency semantics, and each has its own
10461 requirements for being cleared
10463 Instruction serialization (insns separated by interruption, rfi, or
10464 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10466 Data serialization (instruction serialization, or writer + srlz.d +
10467 reader, where writer and srlz.d are in separate groups) clears
10468 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10469 always be the case).
10471 Instruction group break (groups separated by stop, taken branch,
10472 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10474 update_dependencies (idesc);
10476 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10477 warning. Keep track of as many as possible that are useful. */
10478 note_register_values (idesc);
10480 /* We don't need or want this anymore. */
10481 md.mem_offset.hint = 0;
10486 /* Translate one line of assembly. Pseudo ops and labels do not show
10492 char *saved_input_line_pointer, *mnemonic;
10493 const struct pseudo_opcode *pdesc;
10494 struct ia64_opcode *idesc;
10495 unsigned char qp_regno;
10496 unsigned int flags;
10499 saved_input_line_pointer = input_line_pointer;
10500 input_line_pointer = str;
10502 /* extract the opcode (mnemonic): */
10504 mnemonic = input_line_pointer;
10505 ch = get_symbol_end ();
10506 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10509 *input_line_pointer = ch;
10510 (*pdesc->handler) (pdesc->arg);
10514 /* Find the instruction descriptor matching the arguments. */
10516 idesc = ia64_find_opcode (mnemonic);
10517 *input_line_pointer = ch;
10520 as_bad ("Unknown opcode `%s'", mnemonic);
10524 idesc = parse_operands (idesc);
10528 /* Handle the dynamic ops we can handle now: */
10529 if (idesc->type == IA64_TYPE_DYN)
10531 if (strcmp (idesc->name, "add") == 0)
10533 if (CURR_SLOT.opnd[2].X_op == O_register
10534 && CURR_SLOT.opnd[2].X_add_number < 4)
10538 ia64_free_opcode (idesc);
10539 idesc = ia64_find_opcode (mnemonic);
10541 else if (strcmp (idesc->name, "mov") == 0)
10543 enum ia64_opnd opnd1, opnd2;
10546 opnd1 = idesc->operands[0];
10547 opnd2 = idesc->operands[1];
10548 if (opnd1 == IA64_OPND_AR3)
10550 else if (opnd2 == IA64_OPND_AR3)
10554 if (CURR_SLOT.opnd[rop].X_op == O_register)
10556 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10557 mnemonic = "mov.i";
10558 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10559 mnemonic = "mov.m";
10567 ia64_free_opcode (idesc);
10568 idesc = ia64_find_opcode (mnemonic);
10569 while (idesc != NULL
10570 && (idesc->operands[0] != opnd1
10571 || idesc->operands[1] != opnd2))
10572 idesc = get_next_opcode (idesc);
10576 else if (strcmp (idesc->name, "mov.i") == 0
10577 || strcmp (idesc->name, "mov.m") == 0)
10579 enum ia64_opnd opnd1, opnd2;
10582 opnd1 = idesc->operands[0];
10583 opnd2 = idesc->operands[1];
10584 if (opnd1 == IA64_OPND_AR3)
10586 else if (opnd2 == IA64_OPND_AR3)
10590 if (CURR_SLOT.opnd[rop].X_op == O_register)
10593 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10595 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10597 if (unit != 'a' && unit != idesc->name [4])
10598 as_bad ("AR %d cannot be accessed by %c-unit",
10599 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10605 if (md.qp.X_op == O_register)
10607 qp_regno = md.qp.X_add_number - REG_P;
10608 md.qp.X_op = O_absent;
10611 flags = idesc->flags;
10613 if ((flags & IA64_OPCODE_FIRST) != 0)
10615 /* The alignment frag has to end with a stop bit only if the
10616 next instruction after the alignment directive has to be
10617 the first instruction in an instruction group. */
10620 while (align_frag->fr_type != rs_align_code)
10622 align_frag = align_frag->fr_next;
10626 /* align_frag can be NULL if there are directives in
10628 if (align_frag && align_frag->fr_next == frag_now)
10629 align_frag->tc_frag_data = 1;
10632 insn_group_break (1, 0, 0);
10636 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10638 as_bad ("`%s' cannot be predicated", idesc->name);
10642 /* Build the instruction. */
10643 CURR_SLOT.qp_regno = qp_regno;
10644 CURR_SLOT.idesc = idesc;
10645 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10646 dwarf2_where (&CURR_SLOT.debug_line);
10648 /* Add unwind entry, if there is one. */
10649 if (unwind.current_entry)
10651 CURR_SLOT.unwind_record = unwind.current_entry;
10652 unwind.current_entry = NULL;
10654 if (unwind.proc_start && S_IS_DEFINED (unwind.proc_start))
10657 /* Check for dependency violations. */
10661 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10662 if (++md.num_slots_in_use >= NUM_SLOTS)
10663 emit_one_bundle ();
10665 if ((flags & IA64_OPCODE_LAST) != 0)
10666 insn_group_break (1, 0, 0);
10668 md.last_text_seg = now_seg;
10671 input_line_pointer = saved_input_line_pointer;
10674 /* Called when symbol NAME cannot be found in the symbol table.
10675 Should be used for dynamic valued symbols only. */
10678 md_undefined_symbol (name)
10679 char *name ATTRIBUTE_UNUSED;
10684 /* Called for any expression that can not be recognized. When the
10685 function is called, `input_line_pointer' will point to the start of
10692 switch (*input_line_pointer)
10695 ++input_line_pointer;
10697 if (*input_line_pointer != ']')
10699 as_bad ("Closing bracket missing");
10704 if (e->X_op != O_register)
10705 as_bad ("Register expected as index");
10707 ++input_line_pointer;
10718 ignore_rest_of_line ();
10721 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10722 a section symbol plus some offset. For relocs involving @fptr(),
10723 directives we don't want such adjustments since we need to have the
10724 original symbol's name in the reloc. */
10726 ia64_fix_adjustable (fix)
10729 /* Prevent all adjustments to global symbols */
10730 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10733 switch (fix->fx_r_type)
10735 case BFD_RELOC_IA64_FPTR64I:
10736 case BFD_RELOC_IA64_FPTR32MSB:
10737 case BFD_RELOC_IA64_FPTR32LSB:
10738 case BFD_RELOC_IA64_FPTR64MSB:
10739 case BFD_RELOC_IA64_FPTR64LSB:
10740 case BFD_RELOC_IA64_LTOFF_FPTR22:
10741 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10751 ia64_force_relocation (fix)
10754 switch (fix->fx_r_type)
10756 case BFD_RELOC_IA64_FPTR64I:
10757 case BFD_RELOC_IA64_FPTR32MSB:
10758 case BFD_RELOC_IA64_FPTR32LSB:
10759 case BFD_RELOC_IA64_FPTR64MSB:
10760 case BFD_RELOC_IA64_FPTR64LSB:
10762 case BFD_RELOC_IA64_LTOFF22:
10763 case BFD_RELOC_IA64_LTOFF64I:
10764 case BFD_RELOC_IA64_LTOFF_FPTR22:
10765 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10766 case BFD_RELOC_IA64_PLTOFF22:
10767 case BFD_RELOC_IA64_PLTOFF64I:
10768 case BFD_RELOC_IA64_PLTOFF64MSB:
10769 case BFD_RELOC_IA64_PLTOFF64LSB:
10771 case BFD_RELOC_IA64_LTOFF22X:
10772 case BFD_RELOC_IA64_LDXMOV:
10779 return generic_force_reloc (fix);
10782 /* Decide from what point a pc-relative relocation is relative to,
10783 relative to the pc-relative fixup. Er, relatively speaking. */
10785 ia64_pcrel_from_section (fix, sec)
10789 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10791 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10798 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10800 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10804 expr.X_op = O_pseudo_fixup;
10805 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10806 expr.X_add_number = 0;
10807 expr.X_add_symbol = symbol;
10808 emit_expr (&expr, size);
10811 /* This is called whenever some data item (not an instruction) needs a
10812 fixup. We pick the right reloc code depending on the byteorder
10813 currently in effect. */
10815 ia64_cons_fix_new (f, where, nbytes, exp)
10821 bfd_reloc_code_real_type code;
10826 /* There are no reloc for 8 and 16 bit quantities, but we allow
10827 them here since they will work fine as long as the expression
10828 is fully defined at the end of the pass over the source file. */
10829 case 1: code = BFD_RELOC_8; break;
10830 case 2: code = BFD_RELOC_16; break;
10832 if (target_big_endian)
10833 code = BFD_RELOC_IA64_DIR32MSB;
10835 code = BFD_RELOC_IA64_DIR32LSB;
10839 /* In 32-bit mode, data8 could mean function descriptors too. */
10840 if (exp->X_op == O_pseudo_fixup
10841 && exp->X_op_symbol
10842 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10843 && !(md.flags & EF_IA_64_ABI64))
10845 if (target_big_endian)
10846 code = BFD_RELOC_IA64_IPLTMSB;
10848 code = BFD_RELOC_IA64_IPLTLSB;
10849 exp->X_op = O_symbol;
10854 if (target_big_endian)
10855 code = BFD_RELOC_IA64_DIR64MSB;
10857 code = BFD_RELOC_IA64_DIR64LSB;
10862 if (exp->X_op == O_pseudo_fixup
10863 && exp->X_op_symbol
10864 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10866 if (target_big_endian)
10867 code = BFD_RELOC_IA64_IPLTMSB;
10869 code = BFD_RELOC_IA64_IPLTLSB;
10870 exp->X_op = O_symbol;
10876 as_bad ("Unsupported fixup size %d", nbytes);
10877 ignore_rest_of_line ();
10881 if (exp->X_op == O_pseudo_fixup)
10883 exp->X_op = O_symbol;
10884 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10885 /* ??? If code unchanged, unsupported. */
10888 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10889 /* We need to store the byte order in effect in case we're going
10890 to fix an 8 or 16 bit relocation (for which there no real
10891 relocs available). See md_apply_fix3(). */
10892 fix->tc_fix_data.bigendian = target_big_endian;
10895 /* Return the actual relocation we wish to associate with the pseudo
10896 reloc described by SYM and R_TYPE. SYM should be one of the
10897 symbols in the pseudo_func array, or NULL. */
10899 static bfd_reloc_code_real_type
10900 ia64_gen_real_reloc_type (sym, r_type)
10901 struct symbol *sym;
10902 bfd_reloc_code_real_type r_type;
10904 bfd_reloc_code_real_type new = 0;
10905 const char *type = NULL, *suffix = "";
10912 switch (S_GET_VALUE (sym))
10914 case FUNC_FPTR_RELATIVE:
10917 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10918 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10919 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10920 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10921 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10922 default: type = "FPTR"; break;
10926 case FUNC_GP_RELATIVE:
10929 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10930 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10931 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10932 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10933 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10934 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10935 default: type = "GPREL"; break;
10939 case FUNC_LT_RELATIVE:
10942 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10943 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10944 default: type = "LTOFF"; break;
10948 case FUNC_LT_RELATIVE_X:
10951 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10952 default: type = "LTOFF"; suffix = "X"; break;
10956 case FUNC_PC_RELATIVE:
10959 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10960 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10961 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10962 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10963 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10964 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10965 default: type = "PCREL"; break;
10969 case FUNC_PLT_RELATIVE:
10972 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10973 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10974 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10975 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10976 default: type = "PLTOFF"; break;
10980 case FUNC_SEC_RELATIVE:
10983 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10984 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10985 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10986 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10987 default: type = "SECREL"; break;
10991 case FUNC_SEG_RELATIVE:
10994 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10995 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10996 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10997 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10998 default: type = "SEGREL"; break;
11002 case FUNC_LTV_RELATIVE:
11005 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11006 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11007 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11008 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
11009 default: type = "LTV"; break;
11013 case FUNC_LT_FPTR_RELATIVE:
11016 case BFD_RELOC_IA64_IMM22:
11017 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11018 case BFD_RELOC_IA64_IMM64:
11019 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
11020 case BFD_RELOC_IA64_DIR32MSB:
11021 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11022 case BFD_RELOC_IA64_DIR32LSB:
11023 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11024 case BFD_RELOC_IA64_DIR64MSB:
11025 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11026 case BFD_RELOC_IA64_DIR64LSB:
11027 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
11029 type = "LTOFF_FPTR"; break;
11033 case FUNC_TP_RELATIVE:
11036 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11037 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11038 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11039 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11040 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11041 default: type = "TPREL"; break;
11045 case FUNC_LT_TP_RELATIVE:
11048 case BFD_RELOC_IA64_IMM22:
11049 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11051 type = "LTOFF_TPREL"; break;
11055 case FUNC_DTP_MODULE:
11058 case BFD_RELOC_IA64_DIR64MSB:
11059 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11060 case BFD_RELOC_IA64_DIR64LSB:
11061 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11063 type = "DTPMOD"; break;
11067 case FUNC_LT_DTP_MODULE:
11070 case BFD_RELOC_IA64_IMM22:
11071 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11073 type = "LTOFF_DTPMOD"; break;
11077 case FUNC_DTP_RELATIVE:
11080 case BFD_RELOC_IA64_DIR32MSB:
11081 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11082 case BFD_RELOC_IA64_DIR32LSB:
11083 new = BFD_RELOC_IA64_DTPREL32LSB; break;
11084 case BFD_RELOC_IA64_DIR64MSB:
11085 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11086 case BFD_RELOC_IA64_DIR64LSB:
11087 new = BFD_RELOC_IA64_DTPREL64LSB; break;
11088 case BFD_RELOC_IA64_IMM14:
11089 new = BFD_RELOC_IA64_DTPREL14; break;
11090 case BFD_RELOC_IA64_IMM22:
11091 new = BFD_RELOC_IA64_DTPREL22; break;
11092 case BFD_RELOC_IA64_IMM64:
11093 new = BFD_RELOC_IA64_DTPREL64I; break;
11095 type = "DTPREL"; break;
11099 case FUNC_LT_DTP_RELATIVE:
11102 case BFD_RELOC_IA64_IMM22:
11103 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11105 type = "LTOFF_DTPREL"; break;
11109 case FUNC_IPLT_RELOC:
11112 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11113 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11114 default: type = "IPLT"; break;
11132 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11133 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11134 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11135 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11136 case BFD_RELOC_IA64_IMM14: width = 14; break;
11137 case BFD_RELOC_IA64_IMM22: width = 22; break;
11138 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11142 /* This should be an error, but since previously there wasn't any
11143 diagnostic here, dont't make it fail because of this for now. */
11144 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11149 /* Here is where generate the appropriate reloc for pseudo relocation
11152 ia64_validate_fix (fix)
11155 switch (fix->fx_r_type)
11157 case BFD_RELOC_IA64_FPTR64I:
11158 case BFD_RELOC_IA64_FPTR32MSB:
11159 case BFD_RELOC_IA64_FPTR64LSB:
11160 case BFD_RELOC_IA64_LTOFF_FPTR22:
11161 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11162 if (fix->fx_offset != 0)
11163 as_bad_where (fix->fx_file, fix->fx_line,
11164 "No addend allowed in @fptr() relocation");
11172 fix_insn (fix, odesc, value)
11174 const struct ia64_operand *odesc;
11177 bfd_vma insn[3], t0, t1, control_bits;
11182 slot = fix->fx_where & 0x3;
11183 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11185 /* Bundles are always in little-endian byte order */
11186 t0 = bfd_getl64 (fixpos);
11187 t1 = bfd_getl64 (fixpos + 8);
11188 control_bits = t0 & 0x1f;
11189 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11190 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11191 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11194 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
11196 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11197 insn[2] |= (((value & 0x7f) << 13)
11198 | (((value >> 7) & 0x1ff) << 27)
11199 | (((value >> 16) & 0x1f) << 22)
11200 | (((value >> 21) & 0x1) << 21)
11201 | (((value >> 63) & 0x1) << 36));
11203 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11205 if (value & ~0x3fffffffffffffffULL)
11206 err = "integer operand out of range";
11207 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11208 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11210 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11213 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11214 insn[2] |= ((((value >> 59) & 0x1) << 36)
11215 | (((value >> 0) & 0xfffff) << 13));
11218 err = (*odesc->insert) (odesc, value, insn + slot);
11221 as_bad_where (fix->fx_file, fix->fx_line, err);
11223 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11224 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
11225 number_to_chars_littleendian (fixpos + 0, t0, 8);
11226 number_to_chars_littleendian (fixpos + 8, t1, 8);
11229 /* Attempt to simplify or even eliminate a fixup. The return value is
11230 ignored; perhaps it was once meaningful, but now it is historical.
11231 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11233 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11237 md_apply_fix3 (fix, valP, seg)
11240 segT seg ATTRIBUTE_UNUSED;
11243 valueT value = *valP;
11245 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11249 switch (fix->fx_r_type)
11251 case BFD_RELOC_IA64_PCREL21B: break;
11252 case BFD_RELOC_IA64_PCREL21BI: break;
11253 case BFD_RELOC_IA64_PCREL21F: break;
11254 case BFD_RELOC_IA64_PCREL21M: break;
11255 case BFD_RELOC_IA64_PCREL60B: break;
11256 case BFD_RELOC_IA64_PCREL22: break;
11257 case BFD_RELOC_IA64_PCREL64I: break;
11258 case BFD_RELOC_IA64_PCREL32MSB: break;
11259 case BFD_RELOC_IA64_PCREL32LSB: break;
11260 case BFD_RELOC_IA64_PCREL64MSB: break;
11261 case BFD_RELOC_IA64_PCREL64LSB: break;
11263 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11270 switch (fix->fx_r_type)
11272 case BFD_RELOC_UNUSED:
11273 /* This must be a TAG13 or TAG13b operand. There are no external
11274 relocs defined for them, so we must give an error. */
11275 as_bad_where (fix->fx_file, fix->fx_line,
11276 "%s must have a constant value",
11277 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11281 case BFD_RELOC_IA64_TPREL14:
11282 case BFD_RELOC_IA64_TPREL22:
11283 case BFD_RELOC_IA64_TPREL64I:
11284 case BFD_RELOC_IA64_LTOFF_TPREL22:
11285 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11286 case BFD_RELOC_IA64_DTPREL14:
11287 case BFD_RELOC_IA64_DTPREL22:
11288 case BFD_RELOC_IA64_DTPREL64I:
11289 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11290 S_SET_THREAD_LOCAL (fix->fx_addsy);
11297 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11299 if (fix->tc_fix_data.bigendian)
11300 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11302 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11307 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11312 /* Generate the BFD reloc to be stuck in the object file from the
11313 fixup used internally in the assembler. */
11316 tc_gen_reloc (sec, fixp)
11317 asection *sec ATTRIBUTE_UNUSED;
11322 reloc = xmalloc (sizeof (*reloc));
11323 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11324 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11325 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11326 reloc->addend = fixp->fx_offset;
11327 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11331 as_bad_where (fixp->fx_file, fixp->fx_line,
11332 "Cannot represent %s relocation in object file",
11333 bfd_get_reloc_code_name (fixp->fx_r_type));
11338 /* Turn a string in input_line_pointer into a floating point constant
11339 of type TYPE, and store the appropriate bytes in *LIT. The number
11340 of LITTLENUMS emitted is stored in *SIZE. An error message is
11341 returned, or NULL on OK. */
11343 #define MAX_LITTLENUMS 5
11346 md_atof (type, lit, size)
11351 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11381 return "Bad call to MD_ATOF()";
11383 t = atof_ieee (input_line_pointer, type, words);
11385 input_line_pointer = t;
11387 (*ia64_float_to_chars) (lit, words, prec);
11391 /* It is 10 byte floating point with 6 byte padding. */
11392 memset (&lit [10], 0, 6);
11393 *size = 8 * sizeof (LITTLENUM_TYPE);
11396 *size = prec * sizeof (LITTLENUM_TYPE);
11401 /* Handle ia64 specific semantics of the align directive. */
11404 ia64_md_do_align (n, fill, len, max)
11405 int n ATTRIBUTE_UNUSED;
11406 const char *fill ATTRIBUTE_UNUSED;
11407 int len ATTRIBUTE_UNUSED;
11408 int max ATTRIBUTE_UNUSED;
11410 if (subseg_text_p (now_seg))
11411 ia64_flush_insns ();
11414 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11415 of an rs_align_code fragment. */
11418 ia64_handle_align (fragp)
11421 /* Use mfi bundle of nops with no stop bits. */
11422 static const unsigned char le_nop[]
11423 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11424 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11425 static const unsigned char le_nop_stop[]
11426 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
11427 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
11431 const unsigned char *nop;
11433 if (fragp->fr_type != rs_align_code)
11436 /* Check if this frag has to end with a stop bit. */
11437 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11439 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11440 p = fragp->fr_literal + fragp->fr_fix;
11442 /* If no paddings are needed, we check if we need a stop bit. */
11443 if (!bytes && fragp->tc_frag_data)
11445 if (fragp->fr_fix < 16)
11447 /* FIXME: It won't work with
11449 alloc r32=ar.pfs,1,2,4,0
11453 as_bad_where (fragp->fr_file, fragp->fr_line,
11454 _("Can't add stop bit to mark end of instruction group"));
11457 /* Bundles are always in little-endian byte order. Make sure
11458 the previous bundle has the stop bit. */
11462 /* Make sure we are on a 16-byte boundary, in case someone has been
11463 putting data into a text section. */
11466 int fix = bytes & 15;
11467 memset (p, 0, fix);
11470 fragp->fr_fix += fix;
11473 /* Instruction bundles are always little-endian. */
11474 memcpy (p, nop, 16);
11475 fragp->fr_var = 16;
11479 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11484 number_to_chars_bigendian (lit, (long) (*words++),
11485 sizeof (LITTLENUM_TYPE));
11486 lit += sizeof (LITTLENUM_TYPE);
11491 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11496 number_to_chars_littleendian (lit, (long) (words[prec]),
11497 sizeof (LITTLENUM_TYPE));
11498 lit += sizeof (LITTLENUM_TYPE);
11503 ia64_elf_section_change_hook (void)
11505 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11506 && elf_linked_to_section (now_seg) == NULL)
11507 elf_linked_to_section (now_seg) = text_section;
11508 dot_byteorder (-1);
11511 /* Check if a label should be made global. */
11513 ia64_check_label (symbolS *label)
11515 if (*input_line_pointer == ':')
11517 S_SET_EXTERNAL (label);
11518 input_line_pointer++;
11522 /* Used to remember where .alias and .secalias directives are seen. We
11523 will rename symbol and section names when we are about to output
11524 the relocatable file. */
11527 char *file; /* The file where the directive is seen. */
11528 unsigned int line; /* The line number the directive is at. */
11529 const char *name; /* The orignale name of the symbol. */
11532 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11533 .secalias. Otherwise, it is .alias. */
11535 dot_alias (int section)
11537 char *name, *alias;
11541 const char *error_string;
11544 struct hash_control *ahash, *nhash;
11547 name = input_line_pointer;
11548 delim = get_symbol_end ();
11549 end_name = input_line_pointer;
11552 if (name == end_name)
11554 as_bad (_("expected symbol name"));
11555 discard_rest_of_line ();
11559 SKIP_WHITESPACE ();
11561 if (*input_line_pointer != ',')
11564 as_bad (_("expected comma after \"%s\""), name);
11566 ignore_rest_of_line ();
11570 input_line_pointer++;
11572 ia64_canonicalize_symbol_name (name);
11574 /* We call demand_copy_C_string to check if alias string is valid.
11575 There should be a closing `"' and no `\0' in the string. */
11576 alias = demand_copy_C_string (&len);
11579 ignore_rest_of_line ();
11583 /* Make a copy of name string. */
11584 len = strlen (name) + 1;
11585 obstack_grow (¬es, name, len);
11586 name = obstack_finish (¬es);
11591 ahash = secalias_hash;
11592 nhash = secalias_name_hash;
11597 ahash = alias_hash;
11598 nhash = alias_name_hash;
11601 /* Check if alias has been used before. */
11602 h = (struct alias *) hash_find (ahash, alias);
11605 if (strcmp (h->name, name))
11606 as_bad (_("`%s' is already the alias of %s `%s'"),
11607 alias, kind, h->name);
11611 /* Check if name already has an alias. */
11612 a = (const char *) hash_find (nhash, name);
11615 if (strcmp (a, alias))
11616 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11620 h = (struct alias *) xmalloc (sizeof (struct alias));
11621 as_where (&h->file, &h->line);
11624 error_string = hash_jam (ahash, alias, (PTR) h);
11627 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11628 alias, kind, error_string);
11632 error_string = hash_jam (nhash, name, (PTR) alias);
11635 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11636 alias, kind, error_string);
11638 obstack_free (¬es, name);
11639 obstack_free (¬es, alias);
11642 demand_empty_rest_of_line ();
11645 /* It renames the original symbol name to its alias. */
11647 do_alias (const char *alias, PTR value)
11649 struct alias *h = (struct alias *) value;
11650 symbolS *sym = symbol_find (h->name);
11653 as_warn_where (h->file, h->line,
11654 _("symbol `%s' aliased to `%s' is not used"),
11657 S_SET_NAME (sym, (char *) alias);
11660 /* Called from write_object_file. */
11662 ia64_adjust_symtab (void)
11664 hash_traverse (alias_hash, do_alias);
11667 /* It renames the original section name to its alias. */
11669 do_secalias (const char *alias, PTR value)
11671 struct alias *h = (struct alias *) value;
11672 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11675 as_warn_where (h->file, h->line,
11676 _("section `%s' aliased to `%s' is not used"),
11682 /* Called from write_object_file. */
11684 ia64_frob_file (void)
11686 hash_traverse (secalias_hash, do_secalias);