1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS = 0,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
99 FUNC_LT_FPTR_RELATIVE,
101 FUNC_LT_DTP_RELATIVE,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR = 0, /* dynamic general purpose register */
142 DYNREG_FR, /* dynamic floating point register */
143 DYNREG_PR, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix *next;
164 /* This is the endianness of the current section. */
165 extern int target_big_endian;
167 /* This is the default endianness. */
168 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
170 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
172 static void ia64_float_to_chars_bigendian
173 PARAMS ((char *, LITTLENUM_TYPE *, int));
174 static void ia64_float_to_chars_littleendian
175 PARAMS ((char *, LITTLENUM_TYPE *, int));
176 static void (*ia64_float_to_chars)
177 PARAMS ((char *, LITTLENUM_TYPE *, int));
179 static struct hash_control *alias_hash;
180 static struct hash_control *alias_name_hash;
181 static struct hash_control *secalias_hash;
182 static struct hash_control *secalias_name_hash;
184 /* List of chars besides those in app.c:symbol_chars that can start an
185 operand. Used to prevent the scrubber eating vital white-space. */
186 const char ia64_symbol_chars[] = "@?";
188 /* Characters which always start a comment. */
189 const char comment_chars[] = "";
191 /* Characters which start a comment at the beginning of a line. */
192 const char line_comment_chars[] = "#";
194 /* Characters which may be used to separate multiple commands on a
196 const char line_separator_chars[] = ";";
198 /* Characters which are used to indicate an exponent in a floating
200 const char EXP_CHARS[] = "eE";
202 /* Characters which mean that a number is a floating point constant,
204 const char FLT_CHARS[] = "rRsSfFdDxXpP";
206 /* ia64-specific option processing: */
208 const char *md_shortopts = "m:N:x::";
210 struct option md_longopts[] =
212 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
213 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
214 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
215 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
218 size_t md_longopts_size = sizeof (md_longopts);
222 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
223 struct hash_control *reg_hash; /* register name hash table */
224 struct hash_control *dynreg_hash; /* dynamic register hash table */
225 struct hash_control *const_hash; /* constant hash table */
226 struct hash_control *entry_hash; /* code entry hint hash table */
228 symbolS *regsym[REG_NUM];
230 /* If X_op is != O_absent, the registername for the instruction's
231 qualifying predicate. If NULL, p0 is assumed for instructions
232 that are predicatable. */
235 /* Optimize for which CPU. */
242 /* What to do when hint.b is used. */
254 explicit_mode : 1, /* which mode we're in */
255 default_explicit_mode : 1, /* which mode is the default */
256 mode_explicitly_set : 1, /* was the current mode explicitly set? */
258 keep_pending_output : 1;
260 /* What to do when something is wrong with unwind directives. */
263 unwind_check_warning,
267 /* Each bundle consists of up to three instructions. We keep
268 track of four most recent instructions so we can correctly set
269 the end_of_insn_group for the last instruction in a bundle. */
271 int num_slots_in_use;
275 end_of_insn_group : 1,
276 manual_bundling_on : 1,
277 manual_bundling_off : 1,
278 loc_directive_seen : 1;
279 signed char user_template; /* user-selected template, if any */
280 unsigned char qp_regno; /* qualifying predicate */
281 /* This duplicates a good fraction of "struct fix" but we
282 can't use a "struct fix" instead since we can't call
283 fix_new_exp() until we know the address of the instruction. */
287 bfd_reloc_code_real_type code;
288 enum ia64_opnd opnd; /* type of operand in need of fix */
289 unsigned int is_pcrel : 1; /* is operand pc-relative? */
290 expressionS expr; /* the value to be inserted */
292 fixup[2]; /* at most two fixups per insn */
293 struct ia64_opcode *idesc;
294 struct label_fix *label_fixups;
295 struct label_fix *tag_fixups;
296 struct unw_rec_list *unwind_record; /* Unwind directive. */
299 unsigned int src_line;
300 struct dwarf2_line_info debug_line;
308 struct dynreg *next; /* next dynamic register */
310 unsigned short base; /* the base register number */
311 unsigned short num_regs; /* # of registers in this set */
313 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
315 flagword flags; /* ELF-header flags */
318 unsigned hint:1; /* is this hint currently valid? */
319 bfd_vma offset; /* mem.offset offset */
320 bfd_vma base; /* mem.offset base */
323 int path; /* number of alt. entry points seen */
324 const char **entry_labels; /* labels of all alternate paths in
325 the current DV-checking block. */
326 int maxpaths; /* size currently allocated for
329 int pointer_size; /* size in bytes of a pointer */
330 int pointer_size_shift; /* shift size of a pointer for alignment */
334 /* These are not const, because they are modified to MMI for non-itanium1
336 /* MFI bundle of nops. */
337 static unsigned char le_nop[16] =
339 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
340 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
342 /* MFI bundle of nops with stop-bit. */
343 static unsigned char le_nop_stop[16] =
345 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
346 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
349 /* application registers: */
355 #define AR_BSPSTORE 18
370 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
371 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
372 {"ar.rsc", 16}, {"ar.bsp", 17},
373 {"ar.bspstore", 18}, {"ar.rnat", 19},
374 {"ar.fcr", 21}, {"ar.eflag", 24},
375 {"ar.csd", 25}, {"ar.ssd", 26},
376 {"ar.cflg", 27}, {"ar.fsr", 28},
377 {"ar.fir", 29}, {"ar.fdr", 30},
378 {"ar.ccv", 32}, {"ar.unat", 36},
379 {"ar.fpsr", 40}, {"ar.itc", 44},
380 {"ar.pfs", 64}, {"ar.lc", 65},
401 /* control registers: */
443 static const struct const_desc
450 /* PSR constant masks: */
453 {"psr.be", ((valueT) 1) << 1},
454 {"psr.up", ((valueT) 1) << 2},
455 {"psr.ac", ((valueT) 1) << 3},
456 {"psr.mfl", ((valueT) 1) << 4},
457 {"psr.mfh", ((valueT) 1) << 5},
459 {"psr.ic", ((valueT) 1) << 13},
460 {"psr.i", ((valueT) 1) << 14},
461 {"psr.pk", ((valueT) 1) << 15},
463 {"psr.dt", ((valueT) 1) << 17},
464 {"psr.dfl", ((valueT) 1) << 18},
465 {"psr.dfh", ((valueT) 1) << 19},
466 {"psr.sp", ((valueT) 1) << 20},
467 {"psr.pp", ((valueT) 1) << 21},
468 {"psr.di", ((valueT) 1) << 22},
469 {"psr.si", ((valueT) 1) << 23},
470 {"psr.db", ((valueT) 1) << 24},
471 {"psr.lp", ((valueT) 1) << 25},
472 {"psr.tb", ((valueT) 1) << 26},
473 {"psr.rt", ((valueT) 1) << 27},
474 /* 28-31: reserved */
475 /* 32-33: cpl (current privilege level) */
476 {"psr.is", ((valueT) 1) << 34},
477 {"psr.mc", ((valueT) 1) << 35},
478 {"psr.it", ((valueT) 1) << 36},
479 {"psr.id", ((valueT) 1) << 37},
480 {"psr.da", ((valueT) 1) << 38},
481 {"psr.dd", ((valueT) 1) << 39},
482 {"psr.ss", ((valueT) 1) << 40},
483 /* 41-42: ri (restart instruction) */
484 {"psr.ed", ((valueT) 1) << 43},
485 {"psr.bn", ((valueT) 1) << 44},
488 /* indirect register-sets/memory: */
497 { "CPUID", IND_CPUID },
498 { "cpuid", IND_CPUID },
510 /* Pseudo functions used to indicate relocation types (these functions
511 start with an at sign (@). */
533 /* reloc pseudo functions (these must come first!): */
534 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
535 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
536 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
537 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
538 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
539 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
540 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
541 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
542 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
543 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
544 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
545 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
546 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
547 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
548 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
549 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
550 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
552 /* mbtype4 constants: */
553 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
554 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
555 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
556 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
557 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
559 /* fclass constants: */
560 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
561 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
562 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
563 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
564 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
565 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
566 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
567 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
568 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
570 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
572 /* hint constants: */
573 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
575 /* unwind-related constants: */
576 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
577 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
578 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
579 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
580 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
581 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
582 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
584 /* unwind-related registers: */
585 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
588 /* 41-bit nop opcodes (one per unit): */
589 static const bfd_vma nop[IA64_NUM_UNITS] =
591 0x0000000000LL, /* NIL => break 0 */
592 0x0008000000LL, /* I-unit nop */
593 0x0008000000LL, /* M-unit nop */
594 0x4000000000LL, /* B-unit nop */
595 0x0008000000LL, /* F-unit nop */
596 0x0008000000LL, /* L-"unit" nop */
597 0x0008000000LL, /* X-unit nop */
600 /* Can't be `const' as it's passed to input routines (which have the
601 habit of setting temporary sentinels. */
602 static char special_section_name[][20] =
604 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
605 {".IA_64.unwind"}, {".IA_64.unwind_info"},
606 {".init_array"}, {".fini_array"}
609 /* The best template for a particular sequence of up to three
611 #define N IA64_NUM_TYPES
612 static unsigned char best_template[N][N][N];
615 /* Resource dependencies currently in effect */
617 int depind; /* dependency index */
618 const struct ia64_dependency *dependency; /* actual dependency */
619 unsigned specific:1, /* is this a specific bit/regno? */
620 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
621 int index; /* specific regno/bit within dependency */
622 int note; /* optional qualifying note (0 if none) */
626 int insn_srlz; /* current insn serialization state */
627 int data_srlz; /* current data serialization state */
628 int qp_regno; /* qualifying predicate for this usage */
629 char *file; /* what file marked this dependency */
630 unsigned int line; /* what line marked this dependency */
631 struct mem_offset mem_offset; /* optional memory offset hint */
632 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
633 int path; /* corresponding code entry index */
635 static int regdepslen = 0;
636 static int regdepstotlen = 0;
637 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
638 static const char *dv_sem[] = { "none", "implied", "impliedf",
639 "data", "instr", "specific", "stop", "other" };
640 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
642 /* Current state of PR mutexation */
643 static struct qpmutex {
646 } *qp_mutexes = NULL; /* QP mutex bitmasks */
647 static int qp_mutexeslen = 0;
648 static int qp_mutexestotlen = 0;
649 static valueT qp_safe_across_calls = 0;
651 /* Current state of PR implications */
652 static struct qp_imply {
655 unsigned p2_branched:1;
657 } *qp_implies = NULL;
658 static int qp_implieslen = 0;
659 static int qp_impliestotlen = 0;
661 /* Keep track of static GR values so that indirect register usage can
662 sometimes be tracked. */
673 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
679 /* Remember the alignment frag. */
680 static fragS *align_frag;
682 /* These are the routines required to output the various types of
685 /* A slot_number is a frag address plus the slot index (0-2). We use the
686 frag address here so that if there is a section switch in the middle of
687 a function, then instructions emitted to a different section are not
688 counted. Since there may be more than one frag for a function, this
689 means we also need to keep track of which frag this address belongs to
690 so we can compute inter-frag distances. This also nicely solves the
691 problem with nops emitted for align directives, which can't easily be
692 counted, but can easily be derived from frag sizes. */
694 typedef struct unw_rec_list {
696 unsigned long slot_number;
698 struct unw_rec_list *next;
701 #define SLOT_NUM_NOT_SET (unsigned)-1
703 /* Linked list of saved prologue counts. A very poor
704 implementation of a map from label numbers to prologue counts. */
705 typedef struct label_prologue_count
707 struct label_prologue_count *next;
708 unsigned long label_number;
709 unsigned int prologue_count;
710 } label_prologue_count;
712 typedef struct proc_pending
715 struct proc_pending *next;
720 /* Maintain a list of unwind entries for the current function. */
724 /* Any unwind entires that should be attached to the current slot
725 that an insn is being constructed for. */
726 unw_rec_list *current_entry;
728 /* These are used to create the unwind table entry for this function. */
729 proc_pending proc_pending;
730 symbolS *info; /* pointer to unwind info */
731 symbolS *personality_routine;
733 subsegT saved_text_subseg;
734 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
736 /* TRUE if processing unwind directives in a prologue region. */
737 unsigned int prologue : 1;
738 unsigned int prologue_mask : 4;
739 unsigned int body : 1;
740 unsigned int insn : 1;
741 unsigned int prologue_count; /* number of .prologues seen so far */
742 /* Prologue counts at previous .label_state directives. */
743 struct label_prologue_count * saved_prologue_counts;
746 /* The input value is a negated offset from psp, and specifies an address
747 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
748 must add 16 and divide by 4 to get the encoded value. */
750 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
752 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
754 /* Forward declarations: */
755 static void set_section PARAMS ((char *name));
756 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
757 unsigned int, unsigned int));
758 static void dot_align (int);
759 static void dot_radix PARAMS ((int));
760 static void dot_special_section PARAMS ((int));
761 static void dot_proc PARAMS ((int));
762 static void dot_fframe PARAMS ((int));
763 static void dot_vframe PARAMS ((int));
764 static void dot_vframesp PARAMS ((int));
765 static void dot_vframepsp PARAMS ((int));
766 static void dot_save PARAMS ((int));
767 static void dot_restore PARAMS ((int));
768 static void dot_restorereg PARAMS ((int));
769 static void dot_restorereg_p PARAMS ((int));
770 static void dot_handlerdata PARAMS ((int));
771 static void dot_unwentry PARAMS ((int));
772 static void dot_altrp PARAMS ((int));
773 static void dot_savemem PARAMS ((int));
774 static void dot_saveg PARAMS ((int));
775 static void dot_savef PARAMS ((int));
776 static void dot_saveb PARAMS ((int));
777 static void dot_savegf PARAMS ((int));
778 static void dot_spill PARAMS ((int));
779 static void dot_spillreg PARAMS ((int));
780 static void dot_spillmem PARAMS ((int));
781 static void dot_spillreg_p PARAMS ((int));
782 static void dot_spillmem_p PARAMS ((int));
783 static void dot_label_state PARAMS ((int));
784 static void dot_copy_state PARAMS ((int));
785 static void dot_unwabi PARAMS ((int));
786 static void dot_personality PARAMS ((int));
787 static void dot_body PARAMS ((int));
788 static void dot_prologue PARAMS ((int));
789 static void dot_endp PARAMS ((int));
790 static void dot_template PARAMS ((int));
791 static void dot_regstk PARAMS ((int));
792 static void dot_rot PARAMS ((int));
793 static void dot_byteorder PARAMS ((int));
794 static void dot_psr PARAMS ((int));
795 static void dot_alias PARAMS ((int));
796 static void dot_ln PARAMS ((int));
797 static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
798 static void dot_xdata PARAMS ((int));
799 static void stmt_float_cons PARAMS ((int));
800 static void stmt_cons_ua PARAMS ((int));
801 static void dot_xfloat_cons PARAMS ((int));
802 static void dot_xstringer PARAMS ((int));
803 static void dot_xdata_ua PARAMS ((int));
804 static void dot_xfloat_cons_ua PARAMS ((int));
805 static void print_prmask PARAMS ((valueT mask));
806 static void dot_pred_rel PARAMS ((int));
807 static void dot_reg_val PARAMS ((int));
808 static void dot_serialize PARAMS ((int));
809 static void dot_dv_mode PARAMS ((int));
810 static void dot_entry PARAMS ((int));
811 static void dot_mem_offset PARAMS ((int));
812 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
813 static symbolS *declare_register PARAMS ((const char *name, int regnum));
814 static void declare_register_set PARAMS ((const char *, int, int));
815 static unsigned int operand_width PARAMS ((enum ia64_opnd));
816 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
819 static int parse_operand PARAMS ((expressionS *e));
820 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
821 static void build_insn PARAMS ((struct slot *, bfd_vma *));
822 static void emit_one_bundle PARAMS ((void));
823 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
824 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
825 bfd_reloc_code_real_type r_type));
826 static void insn_group_break PARAMS ((int, int, int));
827 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
828 struct rsrc *, int depind, int path));
829 static void add_qp_mutex PARAMS((valueT mask));
830 static void add_qp_imply PARAMS((int p1, int p2));
831 static void clear_qp_branch_flag PARAMS((valueT mask));
832 static void clear_qp_mutex PARAMS((valueT mask));
833 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
834 static int has_suffix_p PARAMS((const char *, const char *));
835 static void clear_register_values PARAMS ((void));
836 static void print_dependency PARAMS ((const char *action, int depind));
837 static void instruction_serialization PARAMS ((void));
838 static void data_serialization PARAMS ((void));
839 static void remove_marked_resource PARAMS ((struct rsrc *));
840 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
841 static int is_taken_branch PARAMS ((struct ia64_opcode *));
842 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
843 static int depends_on PARAMS ((int, struct ia64_opcode *));
844 static int specify_resource PARAMS ((const struct ia64_dependency *,
845 struct ia64_opcode *, int, struct rsrc [], int, int));
846 static int check_dv PARAMS((struct ia64_opcode *idesc));
847 static void check_dependencies PARAMS((struct ia64_opcode *));
848 static void mark_resources PARAMS((struct ia64_opcode *));
849 static void update_dependencies PARAMS((struct ia64_opcode *));
850 static void note_register_values PARAMS((struct ia64_opcode *));
851 static int qp_mutex PARAMS ((int, int, int));
852 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
853 static void output_vbyte_mem PARAMS ((int, char *, char *));
854 static void count_output PARAMS ((int, char *, char *));
855 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
856 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
857 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
858 static void output_P1_format PARAMS ((vbyte_func, int));
859 static void output_P2_format PARAMS ((vbyte_func, int, int));
860 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
861 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
862 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
863 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
864 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
865 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
866 static void output_P9_format PARAMS ((vbyte_func, int, int));
867 static void output_P10_format PARAMS ((vbyte_func, int, int));
868 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
869 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
870 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
871 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
872 static char format_ab_reg PARAMS ((int, int));
873 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
875 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
876 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
878 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
879 static unw_rec_list *output_endp PARAMS ((void));
880 static unw_rec_list *output_prologue PARAMS ((void));
881 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
882 static unw_rec_list *output_body PARAMS ((void));
883 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
884 static unw_rec_list *output_mem_stack_v PARAMS ((void));
885 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
886 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
887 static unw_rec_list *output_rp_when PARAMS ((void));
888 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
889 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
890 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
891 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
892 static unw_rec_list *output_pfs_when PARAMS ((void));
893 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
894 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
895 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
896 static unw_rec_list *output_preds_when PARAMS ((void));
897 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
898 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
899 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
900 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
901 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
902 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
903 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
904 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
905 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
906 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
907 static unw_rec_list *output_unat_when PARAMS ((void));
908 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
909 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
910 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
911 static unw_rec_list *output_lc_when PARAMS ((void));
912 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
913 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
914 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
915 static unw_rec_list *output_fpsr_when PARAMS ((void));
916 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
917 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
918 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
919 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
920 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
921 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
922 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
923 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
924 static unw_rec_list *output_bsp_when PARAMS ((void));
925 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
926 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
927 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
928 static unw_rec_list *output_bspstore_when PARAMS ((void));
929 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
930 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
931 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
932 static unw_rec_list *output_rnat_when PARAMS ((void));
933 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
934 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
935 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
936 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
937 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
938 static unw_rec_list *output_label_state PARAMS ((unsigned long));
939 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
940 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
941 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
942 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
944 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
946 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
948 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
949 unsigned int, unsigned int));
950 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
951 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
952 static int calc_record_size PARAMS ((unw_rec_list *));
953 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
954 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
955 unsigned long, fragS *,
957 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
958 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
959 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
960 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
961 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
962 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
963 static void free_saved_prologue_counts PARAMS ((void));
965 /* Determine if application register REGNUM resides only in the integer
966 unit (as opposed to the memory unit). */
968 ar_is_only_in_integer_unit (int reg)
971 return reg >= 64 && reg <= 111;
974 /* Determine if application register REGNUM resides only in the memory
975 unit (as opposed to the integer unit). */
977 ar_is_only_in_memory_unit (int reg)
980 return reg >= 0 && reg <= 47;
983 /* Switch to section NAME and create section if necessary. It's
984 rather ugly that we have to manipulate input_line_pointer but I
985 don't see any other way to accomplish the same thing without
986 changing obj-elf.c (which may be the Right Thing, in the end). */
991 char *saved_input_line_pointer;
993 saved_input_line_pointer = input_line_pointer;
994 input_line_pointer = name;
996 input_line_pointer = saved_input_line_pointer;
999 /* Map 's' to SHF_IA_64_SHORT. */
1002 ia64_elf_section_letter (letter, ptr_msg)
1007 return SHF_IA_64_SHORT;
1008 else if (letter == 'o')
1009 return SHF_LINK_ORDER;
1011 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1015 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1018 ia64_elf_section_flags (flags, attr, type)
1020 int attr, type ATTRIBUTE_UNUSED;
1022 if (attr & SHF_IA_64_SHORT)
1023 flags |= SEC_SMALL_DATA;
1028 ia64_elf_section_type (str, len)
1032 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1034 if (STREQ (ELF_STRING_ia64_unwind_info))
1035 return SHT_PROGBITS;
1037 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1038 return SHT_PROGBITS;
1040 if (STREQ (ELF_STRING_ia64_unwind))
1041 return SHT_IA_64_UNWIND;
1043 if (STREQ (ELF_STRING_ia64_unwind_once))
1044 return SHT_IA_64_UNWIND;
1046 if (STREQ ("unwind"))
1047 return SHT_IA_64_UNWIND;
1054 set_regstack (ins, locs, outs, rots)
1055 unsigned int ins, locs, outs, rots;
1057 /* Size of frame. */
1060 sof = ins + locs + outs;
1063 as_bad ("Size of frame exceeds maximum of 96 registers");
1068 as_warn ("Size of rotating registers exceeds frame size");
1071 md.in.base = REG_GR + 32;
1072 md.loc.base = md.in.base + ins;
1073 md.out.base = md.loc.base + locs;
1075 md.in.num_regs = ins;
1076 md.loc.num_regs = locs;
1077 md.out.num_regs = outs;
1078 md.rot.num_regs = rots;
1085 struct label_fix *lfix;
1087 subsegT saved_subseg;
1090 if (!md.last_text_seg)
1093 saved_seg = now_seg;
1094 saved_subseg = now_subseg;
1096 subseg_set (md.last_text_seg, 0);
1098 while (md.num_slots_in_use > 0)
1099 emit_one_bundle (); /* force out queued instructions */
1101 /* In case there are labels following the last instruction, resolve
1103 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1105 S_SET_VALUE (lfix->sym, frag_now_fix ());
1106 symbol_set_frag (lfix->sym, frag_now);
1108 CURR_SLOT.label_fixups = 0;
1109 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1111 S_SET_VALUE (lfix->sym, frag_now_fix ());
1112 symbol_set_frag (lfix->sym, frag_now);
1114 CURR_SLOT.tag_fixups = 0;
1116 /* In case there are unwind directives following the last instruction,
1117 resolve those now. We only handle prologue, body, and endp directives
1118 here. Give an error for others. */
1119 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1121 switch (ptr->r.type)
1127 ptr->slot_number = (unsigned long) frag_more (0);
1128 ptr->slot_frag = frag_now;
1131 /* Allow any record which doesn't have a "t" field (i.e.,
1132 doesn't relate to a particular instruction). */
1148 as_bad (_("Unwind directive not followed by an instruction."));
1152 unwind.current_entry = NULL;
1154 subseg_set (saved_seg, saved_subseg);
1156 if (md.qp.X_op == O_register)
1157 as_bad ("qualifying predicate not followed by instruction");
1161 ia64_do_align (int nbytes)
1163 char *saved_input_line_pointer = input_line_pointer;
1165 input_line_pointer = "";
1166 s_align_bytes (nbytes);
1167 input_line_pointer = saved_input_line_pointer;
1171 ia64_cons_align (nbytes)
1176 char *saved_input_line_pointer = input_line_pointer;
1177 input_line_pointer = "";
1178 s_align_bytes (nbytes);
1179 input_line_pointer = saved_input_line_pointer;
1183 /* Output COUNT bytes to a memory location. */
1184 static char *vbyte_mem_ptr = NULL;
1187 output_vbyte_mem (count, ptr, comment)
1190 char *comment ATTRIBUTE_UNUSED;
1193 if (vbyte_mem_ptr == NULL)
1198 for (x = 0; x < count; x++)
1199 *(vbyte_mem_ptr++) = ptr[x];
1202 /* Count the number of bytes required for records. */
1203 static int vbyte_count = 0;
1205 count_output (count, ptr, comment)
1207 char *ptr ATTRIBUTE_UNUSED;
1208 char *comment ATTRIBUTE_UNUSED;
1210 vbyte_count += count;
1214 output_R1_format (f, rtype, rlen)
1216 unw_record_type rtype;
1223 output_R3_format (f, rtype, rlen);
1229 else if (rtype != prologue)
1230 as_bad ("record type is not valid");
1232 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1233 (*f) (1, &byte, NULL);
1237 output_R2_format (f, mask, grsave, rlen)
1244 mask = (mask & 0x0f);
1245 grsave = (grsave & 0x7f);
1247 bytes[0] = (UNW_R2 | (mask >> 1));
1248 bytes[1] = (((mask & 0x01) << 7) | grsave);
1249 count += output_leb128 (bytes + 2, rlen, 0);
1250 (*f) (count, bytes, NULL);
1254 output_R3_format (f, rtype, rlen)
1256 unw_record_type rtype;
1263 output_R1_format (f, rtype, rlen);
1269 else if (rtype != prologue)
1270 as_bad ("record type is not valid");
1271 bytes[0] = (UNW_R3 | r);
1272 count = output_leb128 (bytes + 1, rlen, 0);
1273 (*f) (count + 1, bytes, NULL);
1277 output_P1_format (f, brmask)
1282 byte = UNW_P1 | (brmask & 0x1f);
1283 (*f) (1, &byte, NULL);
1287 output_P2_format (f, brmask, gr)
1293 brmask = (brmask & 0x1f);
1294 bytes[0] = UNW_P2 | (brmask >> 1);
1295 bytes[1] = (((brmask & 1) << 7) | gr);
1296 (*f) (2, bytes, NULL);
1300 output_P3_format (f, rtype, reg)
1302 unw_record_type rtype;
1347 as_bad ("Invalid record type for P3 format.");
1349 bytes[0] = (UNW_P3 | (r >> 1));
1350 bytes[1] = (((r & 1) << 7) | reg);
1351 (*f) (2, bytes, NULL);
1355 output_P4_format (f, imask, imask_size)
1357 unsigned char *imask;
1358 unsigned long imask_size;
1361 (*f) (imask_size, (char *) imask, NULL);
1365 output_P5_format (f, grmask, frmask)
1368 unsigned long frmask;
1371 grmask = (grmask & 0x0f);
1374 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1375 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1376 bytes[3] = (frmask & 0x000000ff);
1377 (*f) (4, bytes, NULL);
1381 output_P6_format (f, rtype, rmask)
1383 unw_record_type rtype;
1389 if (rtype == gr_mem)
1391 else if (rtype != fr_mem)
1392 as_bad ("Invalid record type for format P6");
1393 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1394 (*f) (1, &byte, NULL);
1398 output_P7_format (f, rtype, w1, w2)
1400 unw_record_type rtype;
1407 count += output_leb128 (bytes + 1, w1, 0);
1412 count += output_leb128 (bytes + count, w2 >> 4, 0);
1462 bytes[0] = (UNW_P7 | r);
1463 (*f) (count, bytes, NULL);
1467 output_P8_format (f, rtype, t)
1469 unw_record_type rtype;
1508 case bspstore_psprel:
1511 case bspstore_sprel:
1523 case priunat_when_gr:
1526 case priunat_psprel:
1532 case priunat_when_mem:
1539 count += output_leb128 (bytes + 2, t, 0);
1540 (*f) (count, bytes, NULL);
1544 output_P9_format (f, grmask, gr)
1551 bytes[1] = (grmask & 0x0f);
1552 bytes[2] = (gr & 0x7f);
1553 (*f) (3, bytes, NULL);
1557 output_P10_format (f, abi, context)
1564 bytes[1] = (abi & 0xff);
1565 bytes[2] = (context & 0xff);
1566 (*f) (3, bytes, NULL);
1570 output_B1_format (f, rtype, label)
1572 unw_record_type rtype;
1573 unsigned long label;
1579 output_B4_format (f, rtype, label);
1582 if (rtype == copy_state)
1584 else if (rtype != label_state)
1585 as_bad ("Invalid record type for format B1");
1587 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1588 (*f) (1, &byte, NULL);
1592 output_B2_format (f, ecount, t)
1594 unsigned long ecount;
1601 output_B3_format (f, ecount, t);
1604 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1605 count += output_leb128 (bytes + 1, t, 0);
1606 (*f) (count, bytes, NULL);
1610 output_B3_format (f, ecount, t)
1612 unsigned long ecount;
1619 output_B2_format (f, ecount, t);
1623 count += output_leb128 (bytes + 1, t, 0);
1624 count += output_leb128 (bytes + count, ecount, 0);
1625 (*f) (count, bytes, NULL);
1629 output_B4_format (f, rtype, label)
1631 unw_record_type rtype;
1632 unsigned long label;
1639 output_B1_format (f, rtype, label);
1643 if (rtype == copy_state)
1645 else if (rtype != label_state)
1646 as_bad ("Invalid record type for format B1");
1648 bytes[0] = (UNW_B4 | (r << 3));
1649 count += output_leb128 (bytes + 1, label, 0);
1650 (*f) (count, bytes, NULL);
1654 format_ab_reg (ab, reg)
1661 ret = (ab << 5) | reg;
1666 output_X1_format (f, rtype, ab, reg, t, w1)
1668 unw_record_type rtype;
1678 if (rtype == spill_sprel)
1680 else if (rtype != spill_psprel)
1681 as_bad ("Invalid record type for format X1");
1682 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1683 count += output_leb128 (bytes + 2, t, 0);
1684 count += output_leb128 (bytes + count, w1, 0);
1685 (*f) (count, bytes, NULL);
1689 output_X2_format (f, ab, reg, x, y, treg, t)
1698 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1699 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1700 count += output_leb128 (bytes + 3, t, 0);
1701 (*f) (count, bytes, NULL);
1705 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1707 unw_record_type rtype;
1718 if (rtype == spill_sprel_p)
1720 else if (rtype != spill_psprel_p)
1721 as_bad ("Invalid record type for format X3");
1722 bytes[1] = ((r << 7) | (qp & 0x3f));
1723 bytes[2] = format_ab_reg (ab, reg);
1724 count += output_leb128 (bytes + 3, t, 0);
1725 count += output_leb128 (bytes + count, w1, 0);
1726 (*f) (count, bytes, NULL);
1730 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1740 bytes[1] = (qp & 0x3f);
1741 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1742 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1743 count += output_leb128 (bytes + 4, t, 0);
1744 (*f) (count, bytes, NULL);
1747 /* This function allocates a record list structure, and initializes fields. */
1749 static unw_rec_list *
1750 alloc_record (unw_record_type t)
1753 ptr = xmalloc (sizeof (*ptr));
1755 ptr->slot_number = SLOT_NUM_NOT_SET;
1760 /* Dummy unwind record used for calculating the length of the last prologue or
1763 static unw_rec_list *
1766 unw_rec_list *ptr = alloc_record (endp);
1770 static unw_rec_list *
1773 unw_rec_list *ptr = alloc_record (prologue);
1774 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1778 static unw_rec_list *
1779 output_prologue_gr (saved_mask, reg)
1780 unsigned int saved_mask;
1783 unw_rec_list *ptr = alloc_record (prologue_gr);
1784 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1785 ptr->r.record.r.grmask = saved_mask;
1786 ptr->r.record.r.grsave = reg;
1790 static unw_rec_list *
1793 unw_rec_list *ptr = alloc_record (body);
1797 static unw_rec_list *
1798 output_mem_stack_f (size)
1801 unw_rec_list *ptr = alloc_record (mem_stack_f);
1802 ptr->r.record.p.size = size;
1806 static unw_rec_list *
1807 output_mem_stack_v ()
1809 unw_rec_list *ptr = alloc_record (mem_stack_v);
1813 static unw_rec_list *
1817 unw_rec_list *ptr = alloc_record (psp_gr);
1818 ptr->r.record.p.gr = gr;
1822 static unw_rec_list *
1823 output_psp_sprel (offset)
1824 unsigned int offset;
1826 unw_rec_list *ptr = alloc_record (psp_sprel);
1827 ptr->r.record.p.spoff = offset / 4;
1831 static unw_rec_list *
1834 unw_rec_list *ptr = alloc_record (rp_when);
1838 static unw_rec_list *
1842 unw_rec_list *ptr = alloc_record (rp_gr);
1843 ptr->r.record.p.gr = gr;
1847 static unw_rec_list *
1851 unw_rec_list *ptr = alloc_record (rp_br);
1852 ptr->r.record.p.br = br;
1856 static unw_rec_list *
1857 output_rp_psprel (offset)
1858 unsigned int offset;
1860 unw_rec_list *ptr = alloc_record (rp_psprel);
1861 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1865 static unw_rec_list *
1866 output_rp_sprel (offset)
1867 unsigned int offset;
1869 unw_rec_list *ptr = alloc_record (rp_sprel);
1870 ptr->r.record.p.spoff = offset / 4;
1874 static unw_rec_list *
1877 unw_rec_list *ptr = alloc_record (pfs_when);
1881 static unw_rec_list *
1885 unw_rec_list *ptr = alloc_record (pfs_gr);
1886 ptr->r.record.p.gr = gr;
1890 static unw_rec_list *
1891 output_pfs_psprel (offset)
1892 unsigned int offset;
1894 unw_rec_list *ptr = alloc_record (pfs_psprel);
1895 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1899 static unw_rec_list *
1900 output_pfs_sprel (offset)
1901 unsigned int offset;
1903 unw_rec_list *ptr = alloc_record (pfs_sprel);
1904 ptr->r.record.p.spoff = offset / 4;
1908 static unw_rec_list *
1909 output_preds_when ()
1911 unw_rec_list *ptr = alloc_record (preds_when);
1915 static unw_rec_list *
1916 output_preds_gr (gr)
1919 unw_rec_list *ptr = alloc_record (preds_gr);
1920 ptr->r.record.p.gr = gr;
1924 static unw_rec_list *
1925 output_preds_psprel (offset)
1926 unsigned int offset;
1928 unw_rec_list *ptr = alloc_record (preds_psprel);
1929 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
1933 static unw_rec_list *
1934 output_preds_sprel (offset)
1935 unsigned int offset;
1937 unw_rec_list *ptr = alloc_record (preds_sprel);
1938 ptr->r.record.p.spoff = offset / 4;
1942 static unw_rec_list *
1943 output_fr_mem (mask)
1946 unw_rec_list *ptr = alloc_record (fr_mem);
1947 ptr->r.record.p.rmask = mask;
1951 static unw_rec_list *
1952 output_frgr_mem (gr_mask, fr_mask)
1953 unsigned int gr_mask;
1954 unsigned int fr_mask;
1956 unw_rec_list *ptr = alloc_record (frgr_mem);
1957 ptr->r.record.p.grmask = gr_mask;
1958 ptr->r.record.p.frmask = fr_mask;
1962 static unw_rec_list *
1963 output_gr_gr (mask, reg)
1967 unw_rec_list *ptr = alloc_record (gr_gr);
1968 ptr->r.record.p.grmask = mask;
1969 ptr->r.record.p.gr = reg;
1973 static unw_rec_list *
1974 output_gr_mem (mask)
1977 unw_rec_list *ptr = alloc_record (gr_mem);
1978 ptr->r.record.p.rmask = mask;
1982 static unw_rec_list *
1983 output_br_mem (unsigned int mask)
1985 unw_rec_list *ptr = alloc_record (br_mem);
1986 ptr->r.record.p.brmask = mask;
1990 static unw_rec_list *
1991 output_br_gr (save_mask, reg)
1992 unsigned int save_mask;
1995 unw_rec_list *ptr = alloc_record (br_gr);
1996 ptr->r.record.p.brmask = save_mask;
1997 ptr->r.record.p.gr = reg;
2001 static unw_rec_list *
2002 output_spill_base (offset)
2003 unsigned int offset;
2005 unw_rec_list *ptr = alloc_record (spill_base);
2006 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2010 static unw_rec_list *
2013 unw_rec_list *ptr = alloc_record (unat_when);
2017 static unw_rec_list *
2021 unw_rec_list *ptr = alloc_record (unat_gr);
2022 ptr->r.record.p.gr = gr;
2026 static unw_rec_list *
2027 output_unat_psprel (offset)
2028 unsigned int offset;
2030 unw_rec_list *ptr = alloc_record (unat_psprel);
2031 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2035 static unw_rec_list *
2036 output_unat_sprel (offset)
2037 unsigned int offset;
2039 unw_rec_list *ptr = alloc_record (unat_sprel);
2040 ptr->r.record.p.spoff = offset / 4;
2044 static unw_rec_list *
2047 unw_rec_list *ptr = alloc_record (lc_when);
2051 static unw_rec_list *
2055 unw_rec_list *ptr = alloc_record (lc_gr);
2056 ptr->r.record.p.gr = gr;
2060 static unw_rec_list *
2061 output_lc_psprel (offset)
2062 unsigned int offset;
2064 unw_rec_list *ptr = alloc_record (lc_psprel);
2065 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2069 static unw_rec_list *
2070 output_lc_sprel (offset)
2071 unsigned int offset;
2073 unw_rec_list *ptr = alloc_record (lc_sprel);
2074 ptr->r.record.p.spoff = offset / 4;
2078 static unw_rec_list *
2081 unw_rec_list *ptr = alloc_record (fpsr_when);
2085 static unw_rec_list *
2089 unw_rec_list *ptr = alloc_record (fpsr_gr);
2090 ptr->r.record.p.gr = gr;
2094 static unw_rec_list *
2095 output_fpsr_psprel (offset)
2096 unsigned int offset;
2098 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2099 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2103 static unw_rec_list *
2104 output_fpsr_sprel (offset)
2105 unsigned int offset;
2107 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2108 ptr->r.record.p.spoff = offset / 4;
2112 static unw_rec_list *
2113 output_priunat_when_gr ()
2115 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2119 static unw_rec_list *
2120 output_priunat_when_mem ()
2122 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2126 static unw_rec_list *
2127 output_priunat_gr (gr)
2130 unw_rec_list *ptr = alloc_record (priunat_gr);
2131 ptr->r.record.p.gr = gr;
2135 static unw_rec_list *
2136 output_priunat_psprel (offset)
2137 unsigned int offset;
2139 unw_rec_list *ptr = alloc_record (priunat_psprel);
2140 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2144 static unw_rec_list *
2145 output_priunat_sprel (offset)
2146 unsigned int offset;
2148 unw_rec_list *ptr = alloc_record (priunat_sprel);
2149 ptr->r.record.p.spoff = offset / 4;
2153 static unw_rec_list *
2156 unw_rec_list *ptr = alloc_record (bsp_when);
2160 static unw_rec_list *
2164 unw_rec_list *ptr = alloc_record (bsp_gr);
2165 ptr->r.record.p.gr = gr;
2169 static unw_rec_list *
2170 output_bsp_psprel (offset)
2171 unsigned int offset;
2173 unw_rec_list *ptr = alloc_record (bsp_psprel);
2174 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2178 static unw_rec_list *
2179 output_bsp_sprel (offset)
2180 unsigned int offset;
2182 unw_rec_list *ptr = alloc_record (bsp_sprel);
2183 ptr->r.record.p.spoff = offset / 4;
2187 static unw_rec_list *
2188 output_bspstore_when ()
2190 unw_rec_list *ptr = alloc_record (bspstore_when);
2194 static unw_rec_list *
2195 output_bspstore_gr (gr)
2198 unw_rec_list *ptr = alloc_record (bspstore_gr);
2199 ptr->r.record.p.gr = gr;
2203 static unw_rec_list *
2204 output_bspstore_psprel (offset)
2205 unsigned int offset;
2207 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2208 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2212 static unw_rec_list *
2213 output_bspstore_sprel (offset)
2214 unsigned int offset;
2216 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2217 ptr->r.record.p.spoff = offset / 4;
2221 static unw_rec_list *
2224 unw_rec_list *ptr = alloc_record (rnat_when);
2228 static unw_rec_list *
2232 unw_rec_list *ptr = alloc_record (rnat_gr);
2233 ptr->r.record.p.gr = gr;
2237 static unw_rec_list *
2238 output_rnat_psprel (offset)
2239 unsigned int offset;
2241 unw_rec_list *ptr = alloc_record (rnat_psprel);
2242 ptr->r.record.p.pspoff = ENCODED_PSP_OFFSET (offset);
2246 static unw_rec_list *
2247 output_rnat_sprel (offset)
2248 unsigned int offset;
2250 unw_rec_list *ptr = alloc_record (rnat_sprel);
2251 ptr->r.record.p.spoff = offset / 4;
2255 static unw_rec_list *
2256 output_unwabi (abi, context)
2258 unsigned long context;
2260 unw_rec_list *ptr = alloc_record (unwabi);
2261 ptr->r.record.p.abi = abi;
2262 ptr->r.record.p.context = context;
2266 static unw_rec_list *
2267 output_epilogue (unsigned long ecount)
2269 unw_rec_list *ptr = alloc_record (epilogue);
2270 ptr->r.record.b.ecount = ecount;
2274 static unw_rec_list *
2275 output_label_state (unsigned long label)
2277 unw_rec_list *ptr = alloc_record (label_state);
2278 ptr->r.record.b.label = label;
2282 static unw_rec_list *
2283 output_copy_state (unsigned long label)
2285 unw_rec_list *ptr = alloc_record (copy_state);
2286 ptr->r.record.b.label = label;
2290 static unw_rec_list *
2291 output_spill_psprel (ab, reg, offset)
2294 unsigned int offset;
2296 unw_rec_list *ptr = alloc_record (spill_psprel);
2297 ptr->r.record.x.ab = ab;
2298 ptr->r.record.x.reg = reg;
2299 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2303 static unw_rec_list *
2304 output_spill_sprel (ab, reg, offset)
2307 unsigned int offset;
2309 unw_rec_list *ptr = alloc_record (spill_sprel);
2310 ptr->r.record.x.ab = ab;
2311 ptr->r.record.x.reg = reg;
2312 ptr->r.record.x.spoff = offset / 4;
2316 static unw_rec_list *
2317 output_spill_psprel_p (ab, reg, offset, predicate)
2320 unsigned int offset;
2321 unsigned int predicate;
2323 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2324 ptr->r.record.x.ab = ab;
2325 ptr->r.record.x.reg = reg;
2326 ptr->r.record.x.pspoff = ENCODED_PSP_OFFSET (offset);
2327 ptr->r.record.x.qp = predicate;
2331 static unw_rec_list *
2332 output_spill_sprel_p (ab, reg, offset, predicate)
2335 unsigned int offset;
2336 unsigned int predicate;
2338 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2339 ptr->r.record.x.ab = ab;
2340 ptr->r.record.x.reg = reg;
2341 ptr->r.record.x.spoff = offset / 4;
2342 ptr->r.record.x.qp = predicate;
2346 static unw_rec_list *
2347 output_spill_reg (ab, reg, targ_reg, xy)
2350 unsigned int targ_reg;
2353 unw_rec_list *ptr = alloc_record (spill_reg);
2354 ptr->r.record.x.ab = ab;
2355 ptr->r.record.x.reg = reg;
2356 ptr->r.record.x.treg = targ_reg;
2357 ptr->r.record.x.xy = xy;
2361 static unw_rec_list *
2362 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2365 unsigned int targ_reg;
2367 unsigned int predicate;
2369 unw_rec_list *ptr = alloc_record (spill_reg_p);
2370 ptr->r.record.x.ab = ab;
2371 ptr->r.record.x.reg = reg;
2372 ptr->r.record.x.treg = targ_reg;
2373 ptr->r.record.x.xy = xy;
2374 ptr->r.record.x.qp = predicate;
2378 /* Given a unw_rec_list process the correct format with the
2379 specified function. */
2382 process_one_record (ptr, f)
2386 unsigned long fr_mask, gr_mask;
2388 switch (ptr->r.type)
2390 /* This is a dummy record that takes up no space in the output. */
2398 /* These are taken care of by prologue/prologue_gr. */
2403 if (ptr->r.type == prologue_gr)
2404 output_R2_format (f, ptr->r.record.r.grmask,
2405 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2407 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2409 /* Output descriptor(s) for union of register spills (if any). */
2410 gr_mask = ptr->r.record.r.mask.gr_mem;
2411 fr_mask = ptr->r.record.r.mask.fr_mem;
2414 if ((fr_mask & ~0xfUL) == 0)
2415 output_P6_format (f, fr_mem, fr_mask);
2418 output_P5_format (f, gr_mask, fr_mask);
2423 output_P6_format (f, gr_mem, gr_mask);
2424 if (ptr->r.record.r.mask.br_mem)
2425 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2427 /* output imask descriptor if necessary: */
2428 if (ptr->r.record.r.mask.i)
2429 output_P4_format (f, ptr->r.record.r.mask.i,
2430 ptr->r.record.r.imask_size);
2434 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2438 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2439 ptr->r.record.p.size);
2452 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2455 output_P3_format (f, rp_br, ptr->r.record.p.br);
2458 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2466 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2475 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2485 case bspstore_sprel:
2487 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2490 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2493 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2496 as_bad ("spill_mask record unimplemented.");
2498 case priunat_when_gr:
2499 case priunat_when_mem:
2503 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2505 case priunat_psprel:
2507 case bspstore_psprel:
2509 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2512 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2515 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2519 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2522 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2523 ptr->r.record.x.reg, ptr->r.record.x.t,
2524 ptr->r.record.x.pspoff);
2527 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2528 ptr->r.record.x.reg, ptr->r.record.x.t,
2529 ptr->r.record.x.spoff);
2532 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2533 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2534 ptr->r.record.x.treg, ptr->r.record.x.t);
2536 case spill_psprel_p:
2537 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2538 ptr->r.record.x.ab, ptr->r.record.x.reg,
2539 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2542 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2543 ptr->r.record.x.ab, ptr->r.record.x.reg,
2544 ptr->r.record.x.t, ptr->r.record.x.spoff);
2547 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2548 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2549 ptr->r.record.x.xy, ptr->r.record.x.treg,
2553 as_bad ("record_type_not_valid");
2558 /* Given a unw_rec_list list, process all the records with
2559 the specified function. */
2561 process_unw_records (list, f)
2566 for (ptr = list; ptr; ptr = ptr->next)
2567 process_one_record (ptr, f);
2570 /* Determine the size of a record list in bytes. */
2572 calc_record_size (list)
2576 process_unw_records (list, count_output);
2580 /* Update IMASK bitmask to reflect the fact that one or more registers
2581 of type TYPE are saved starting at instruction with index T. If N
2582 bits are set in REGMASK, it is assumed that instructions T through
2583 T+N-1 save these registers.
2587 1: instruction saves next fp reg
2588 2: instruction saves next general reg
2589 3: instruction saves next branch reg */
2591 set_imask (region, regmask, t, type)
2592 unw_rec_list *region;
2593 unsigned long regmask;
2597 unsigned char *imask;
2598 unsigned long imask_size;
2602 imask = region->r.record.r.mask.i;
2603 imask_size = region->r.record.r.imask_size;
2606 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2607 imask = xmalloc (imask_size);
2608 memset (imask, 0, imask_size);
2610 region->r.record.r.imask_size = imask_size;
2611 region->r.record.r.mask.i = imask;
2615 pos = 2 * (3 - t % 4);
2618 if (i >= imask_size)
2620 as_bad ("Ignoring attempt to spill beyond end of region");
2624 imask[i] |= (type & 0x3) << pos;
2626 regmask &= (regmask - 1);
2636 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2637 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2638 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2642 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2643 unsigned long slot_addr;
2645 unsigned long first_addr;
2649 unsigned long index = 0;
2651 /* First time we are called, the initial address and frag are invalid. */
2652 if (first_addr == 0)
2655 /* If the two addresses are in different frags, then we need to add in
2656 the remaining size of this frag, and then the entire size of intermediate
2658 while (slot_frag != first_frag)
2660 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2664 /* We can get the final addresses only during and after
2666 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2667 index += 3 * ((first_frag->fr_next->fr_address
2668 - first_frag->fr_address
2669 - first_frag->fr_fix) >> 4);
2672 /* We don't know what the final addresses will be. We try our
2673 best to estimate. */
2674 switch (first_frag->fr_type)
2680 as_fatal ("only constant space allocation is supported");
2686 /* Take alignment into account. Assume the worst case
2687 before relaxation. */
2688 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2692 if (first_frag->fr_symbol)
2694 as_fatal ("only constant offsets are supported");
2698 index += 3 * (first_frag->fr_offset >> 4);
2702 /* Add in the full size of the frag converted to instruction slots. */
2703 index += 3 * (first_frag->fr_fix >> 4);
2704 /* Subtract away the initial part before first_addr. */
2705 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2706 + ((first_addr & 0x3) - (start_addr & 0x3)));
2708 /* Move to the beginning of the next frag. */
2709 first_frag = first_frag->fr_next;
2710 first_addr = (unsigned long) &first_frag->fr_literal;
2712 /* This can happen if there is section switching in the middle of a
2713 function, causing the frag chain for the function to be broken. */
2714 if (first_frag == NULL)
2716 /* We get six warnings for one problem, because of the loop in
2717 fixup_unw_records, and because fixup_unw_records is called 3
2718 times: once before creating the variant frag, once to estimate
2719 its size, and once to relax it. This is unreasonable, so we use
2720 a static var to make sure we only emit the warning once. */
2721 static int warned = 0;
2725 as_warn ("Corrupted unwind info due to unsupported section switching");
2733 /* Add in the used part of the last frag. */
2734 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2735 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2739 /* Optimize unwind record directives. */
2741 static unw_rec_list *
2742 optimize_unw_records (list)
2748 /* If the only unwind record is ".prologue" or ".prologue" followed
2749 by ".body", then we can optimize the unwind directives away. */
2750 if (list->r.type == prologue
2751 && (list->next->r.type == endp
2752 || (list->next->r.type == body && list->next->next->r.type == endp)))
2758 /* Given a complete record list, process any records which have
2759 unresolved fields, (ie length counts for a prologue). After
2760 this has been run, all necessary information should be available
2761 within each record to generate an image. */
2764 fixup_unw_records (list, before_relax)
2768 unw_rec_list *ptr, *region = 0;
2769 unsigned long first_addr = 0, rlen = 0, t;
2770 fragS *first_frag = 0;
2772 for (ptr = list; ptr; ptr = ptr->next)
2774 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2775 as_bad (" Insn slot not set in unwind record.");
2776 t = slot_index (ptr->slot_number, ptr->slot_frag,
2777 first_addr, first_frag, before_relax);
2778 switch (ptr->r.type)
2786 unsigned long last_addr = 0;
2787 fragS *last_frag = NULL;
2789 first_addr = ptr->slot_number;
2790 first_frag = ptr->slot_frag;
2791 /* Find either the next body/prologue start, or the end of
2792 the function, and determine the size of the region. */
2793 for (last = ptr->next; last != NULL; last = last->next)
2794 if (last->r.type == prologue || last->r.type == prologue_gr
2795 || last->r.type == body || last->r.type == endp)
2797 last_addr = last->slot_number;
2798 last_frag = last->slot_frag;
2801 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2803 rlen = ptr->r.record.r.rlen = size;
2804 if (ptr->r.type == body)
2805 /* End of region. */
2813 ptr->r.record.b.t = rlen - 1 - t;
2815 /* This happens when a memory-stack-less procedure uses a
2816 ".restore sp" directive at the end of a region to pop
2818 ptr->r.record.b.t = 0;
2829 case priunat_when_gr:
2830 case priunat_when_mem:
2834 ptr->r.record.p.t = t;
2842 case spill_psprel_p:
2843 ptr->r.record.x.t = t;
2849 as_bad ("frgr_mem record before region record!");
2852 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2853 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2854 set_imask (region, ptr->r.record.p.frmask, t, 1);
2855 set_imask (region, ptr->r.record.p.grmask, t, 2);
2860 as_bad ("fr_mem record before region record!");
2863 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2864 set_imask (region, ptr->r.record.p.rmask, t, 1);
2869 as_bad ("gr_mem record before region record!");
2872 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2873 set_imask (region, ptr->r.record.p.rmask, t, 2);
2878 as_bad ("br_mem record before region record!");
2881 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2882 set_imask (region, ptr->r.record.p.brmask, t, 3);
2888 as_bad ("gr_gr record before region record!");
2891 set_imask (region, ptr->r.record.p.grmask, t, 2);
2896 as_bad ("br_gr record before region record!");
2899 set_imask (region, ptr->r.record.p.brmask, t, 3);
2908 /* Estimate the size of a frag before relaxing. We only have one type of frag
2909 to handle here, which is the unwind info frag. */
2912 ia64_estimate_size_before_relax (fragS *frag,
2913 asection *segtype ATTRIBUTE_UNUSED)
2918 /* ??? This code is identical to the first part of ia64_convert_frag. */
2919 list = (unw_rec_list *) frag->fr_opcode;
2920 fixup_unw_records (list, 0);
2922 len = calc_record_size (list);
2923 /* pad to pointer-size boundary. */
2924 pad = len % md.pointer_size;
2926 len += md.pointer_size - pad;
2927 /* Add 8 for the header. */
2929 /* Add a pointer for the personality offset. */
2930 if (frag->fr_offset)
2931 size += md.pointer_size;
2933 /* fr_var carries the max_chars that we created the fragment with.
2934 We must, of course, have allocated enough memory earlier. */
2935 assert (frag->fr_var >= size);
2937 return frag->fr_fix + size;
2940 /* This function converts a rs_machine_dependent variant frag into a
2941 normal fill frag with the unwind image from the the record list. */
2943 ia64_convert_frag (fragS *frag)
2949 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2950 list = (unw_rec_list *) frag->fr_opcode;
2951 fixup_unw_records (list, 0);
2953 len = calc_record_size (list);
2954 /* pad to pointer-size boundary. */
2955 pad = len % md.pointer_size;
2957 len += md.pointer_size - pad;
2958 /* Add 8 for the header. */
2960 /* Add a pointer for the personality offset. */
2961 if (frag->fr_offset)
2962 size += md.pointer_size;
2964 /* fr_var carries the max_chars that we created the fragment with.
2965 We must, of course, have allocated enough memory earlier. */
2966 assert (frag->fr_var >= size);
2968 /* Initialize the header area. fr_offset is initialized with
2969 unwind.personality_routine. */
2970 if (frag->fr_offset)
2972 if (md.flags & EF_IA_64_ABI64)
2973 flag_value = (bfd_vma) 3 << 32;
2975 /* 32-bit unwind info block. */
2976 flag_value = (bfd_vma) 0x1003 << 32;
2981 md_number_to_chars (frag->fr_literal,
2982 (((bfd_vma) 1 << 48) /* Version. */
2983 | flag_value /* U & E handler flags. */
2984 | (len / md.pointer_size)), /* Length. */
2987 /* Skip the header. */
2988 vbyte_mem_ptr = frag->fr_literal + 8;
2989 process_unw_records (list, output_vbyte_mem);
2991 /* Fill the padding bytes with zeros. */
2993 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2994 md.pointer_size - pad);
2996 frag->fr_fix += size;
2997 frag->fr_type = rs_fill;
2999 frag->fr_offset = 0;
3003 convert_expr_to_ab_reg (e, ab, regp)
3010 if (e->X_op != O_register)
3013 reg = e->X_add_number;
3014 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
3017 *regp = reg - REG_GR;
3019 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3020 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
3023 *regp = reg - REG_FR;
3025 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
3028 *regp = reg - REG_BR;
3035 case REG_PR: *regp = 0; break;
3036 case REG_PSP: *regp = 1; break;
3037 case REG_PRIUNAT: *regp = 2; break;
3038 case REG_BR + 0: *regp = 3; break;
3039 case REG_AR + AR_BSP: *regp = 4; break;
3040 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3041 case REG_AR + AR_RNAT: *regp = 6; break;
3042 case REG_AR + AR_UNAT: *regp = 7; break;
3043 case REG_AR + AR_FPSR: *regp = 8; break;
3044 case REG_AR + AR_PFS: *regp = 9; break;
3045 case REG_AR + AR_LC: *regp = 10; break;
3055 convert_expr_to_xy_reg (e, xy, regp)
3062 if (e->X_op != O_register)
3065 reg = e->X_add_number;
3067 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
3070 *regp = reg - REG_GR;
3072 else if (reg >= REG_FR && reg <= (REG_FR + 127))
3075 *regp = reg - REG_FR;
3077 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3080 *regp = reg - REG_BR;
3090 /* The current frag is an alignment frag. */
3091 align_frag = frag_now;
3092 s_align_bytes (arg);
3097 int dummy ATTRIBUTE_UNUSED;
3104 if (is_it_end_of_statement ())
3106 radix = input_line_pointer;
3107 ch = get_symbol_end ();
3108 ia64_canonicalize_symbol_name (radix);
3109 if (strcasecmp (radix, "C"))
3110 as_bad ("Radix `%s' unsupported or invalid", radix);
3111 *input_line_pointer = ch;
3112 demand_empty_rest_of_line ();
3115 /* Helper function for .loc directives. If the assembler is not generating
3116 line number info, then we need to remember which instructions have a .loc
3117 directive, and only call dwarf2_gen_line_info for those instructions. */
3122 CURR_SLOT.loc_directive_seen = 1;
3123 dwarf2_directive_loc (x);
3126 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3128 dot_special_section (which)
3131 set_section ((char *) special_section_name[which]);
3134 /* Return -1 for warning and 0 for error. */
3137 unwind_diagnostic (const char * region, const char *directive)
3139 if (md.unwind_check == unwind_check_warning)
3141 as_warn (".%s outside of %s", directive, region);
3146 as_bad (".%s outside of %s", directive, region);
3147 ignore_rest_of_line ();
3152 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3153 a procedure but the unwind directive check is set to warning, 0 if
3154 a directive isn't in a procedure and the unwind directive check is set
3158 in_procedure (const char *directive)
3160 if (unwind.proc_pending.sym
3161 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3163 return unwind_diagnostic ("procedure", directive);
3166 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3167 a prologue but the unwind directive check is set to warning, 0 if
3168 a directive isn't in a prologue and the unwind directive check is set
3172 in_prologue (const char *directive)
3174 int in = in_procedure (directive);
3177 /* We are in a procedure. Check if we are in a prologue. */
3178 if (unwind.prologue)
3180 /* We only want to issue one message. */
3182 return unwind_diagnostic ("prologue", directive);
3189 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3190 a body but the unwind directive check is set to warning, 0 if
3191 a directive isn't in a body and the unwind directive check is set
3195 in_body (const char *directive)
3197 int in = in_procedure (directive);
3200 /* We are in a procedure. Check if we are in a body. */
3203 /* We only want to issue one message. */
3205 return unwind_diagnostic ("body region", directive);
3213 add_unwind_entry (ptr)
3217 unwind.tail->next = ptr;
3222 /* The current entry can in fact be a chain of unwind entries. */
3223 if (unwind.current_entry == NULL)
3224 unwind.current_entry = ptr;
3229 int dummy ATTRIBUTE_UNUSED;
3233 if (!in_prologue ("fframe"))
3238 if (e.X_op != O_constant)
3239 as_bad ("Operand to .fframe must be a constant");
3241 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3246 int dummy ATTRIBUTE_UNUSED;
3251 if (!in_prologue ("vframe"))
3255 reg = e.X_add_number - REG_GR;
3256 if (e.X_op == O_register && reg < 128)
3258 add_unwind_entry (output_mem_stack_v ());
3259 if (! (unwind.prologue_mask & 2))
3260 add_unwind_entry (output_psp_gr (reg));
3263 as_bad ("First operand to .vframe must be a general register");
3267 dot_vframesp (dummy)
3268 int dummy ATTRIBUTE_UNUSED;
3272 if (!in_prologue ("vframesp"))
3276 if (e.X_op == O_constant)
3278 add_unwind_entry (output_mem_stack_v ());
3279 add_unwind_entry (output_psp_sprel (e.X_add_number));
3282 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3286 dot_vframepsp (dummy)
3287 int dummy ATTRIBUTE_UNUSED;
3291 if (!in_prologue ("vframepsp"))
3295 if (e.X_op == O_constant)
3297 add_unwind_entry (output_mem_stack_v ());
3298 add_unwind_entry (output_psp_sprel (e.X_add_number));
3301 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3306 int dummy ATTRIBUTE_UNUSED;
3312 if (!in_prologue ("save"))
3315 sep = parse_operand (&e1);
3317 as_bad ("No second operand to .save");
3318 sep = parse_operand (&e2);
3320 reg1 = e1.X_add_number;
3321 reg2 = e2.X_add_number - REG_GR;
3323 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3324 if (e1.X_op == O_register)
3326 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3330 case REG_AR + AR_BSP:
3331 add_unwind_entry (output_bsp_when ());
3332 add_unwind_entry (output_bsp_gr (reg2));
3334 case REG_AR + AR_BSPSTORE:
3335 add_unwind_entry (output_bspstore_when ());
3336 add_unwind_entry (output_bspstore_gr (reg2));
3338 case REG_AR + AR_RNAT:
3339 add_unwind_entry (output_rnat_when ());
3340 add_unwind_entry (output_rnat_gr (reg2));
3342 case REG_AR + AR_UNAT:
3343 add_unwind_entry (output_unat_when ());
3344 add_unwind_entry (output_unat_gr (reg2));
3346 case REG_AR + AR_FPSR:
3347 add_unwind_entry (output_fpsr_when ());
3348 add_unwind_entry (output_fpsr_gr (reg2));
3350 case REG_AR + AR_PFS:
3351 add_unwind_entry (output_pfs_when ());
3352 if (! (unwind.prologue_mask & 4))
3353 add_unwind_entry (output_pfs_gr (reg2));
3355 case REG_AR + AR_LC:
3356 add_unwind_entry (output_lc_when ());
3357 add_unwind_entry (output_lc_gr (reg2));
3360 add_unwind_entry (output_rp_when ());
3361 if (! (unwind.prologue_mask & 8))
3362 add_unwind_entry (output_rp_gr (reg2));
3365 add_unwind_entry (output_preds_when ());
3366 if (! (unwind.prologue_mask & 1))
3367 add_unwind_entry (output_preds_gr (reg2));
3370 add_unwind_entry (output_priunat_when_gr ());
3371 add_unwind_entry (output_priunat_gr (reg2));
3374 as_bad ("First operand not a valid register");
3378 as_bad (" Second operand not a valid register");
3381 as_bad ("First operand not a register");
3386 int dummy ATTRIBUTE_UNUSED;
3389 unsigned long ecount; /* # of _additional_ regions to pop */
3392 if (!in_body ("restore"))
3395 sep = parse_operand (&e1);
3396 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3398 as_bad ("First operand to .restore must be stack pointer (sp)");
3404 parse_operand (&e2);
3405 if (e2.X_op != O_constant || e2.X_add_number < 0)
3407 as_bad ("Second operand to .restore must be a constant >= 0");
3410 ecount = e2.X_add_number;
3413 ecount = unwind.prologue_count - 1;
3415 if (ecount >= unwind.prologue_count)
3417 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3418 ecount + 1, unwind.prologue_count);
3422 add_unwind_entry (output_epilogue (ecount));
3424 if (ecount < unwind.prologue_count)
3425 unwind.prologue_count -= ecount + 1;
3427 unwind.prologue_count = 0;
3431 dot_restorereg (dummy)
3432 int dummy ATTRIBUTE_UNUSED;
3434 unsigned int ab, reg;
3437 if (!in_procedure ("restorereg"))
3442 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3444 as_bad ("First operand to .restorereg must be a preserved register");
3447 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3451 dot_restorereg_p (dummy)
3452 int dummy ATTRIBUTE_UNUSED;
3454 unsigned int qp, ab, reg;
3458 if (!in_procedure ("restorereg.p"))
3461 sep = parse_operand (&e1);
3464 as_bad ("No second operand to .restorereg.p");
3468 parse_operand (&e2);
3470 qp = e1.X_add_number - REG_P;
3471 if (e1.X_op != O_register || qp > 63)
3473 as_bad ("First operand to .restorereg.p must be a predicate");
3477 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3479 as_bad ("Second operand to .restorereg.p must be a preserved register");
3482 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3485 static char *special_linkonce_name[] =
3487 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3491 start_unwind_section (const segT text_seg, int sec_index)
3494 Use a slightly ugly scheme to derive the unwind section names from
3495 the text section name:
3497 text sect. unwind table sect.
3498 name: name: comments:
3499 ---------- ----------------- --------------------------------
3501 .text.foo .IA_64.unwind.text.foo
3502 .foo .IA_64.unwind.foo
3504 .gnu.linkonce.ia64unw.foo
3505 _info .IA_64.unwind_info gas issues error message (ditto)
3506 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3508 This mapping is done so that:
3510 (a) An object file with unwind info only in .text will use
3511 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3512 This follows the letter of the ABI and also ensures backwards
3513 compatibility with older toolchains.
3515 (b) An object file with unwind info in multiple text sections
3516 will use separate unwind sections for each text section.
3517 This allows us to properly set the "sh_info" and "sh_link"
3518 fields in SHT_IA_64_UNWIND as required by the ABI and also
3519 lets GNU ld support programs with multiple segments
3520 containing unwind info (as might be the case for certain
3521 embedded applications).
3523 (c) An error is issued if there would be a name clash.
3526 const char *text_name, *sec_text_name;
3528 const char *prefix = special_section_name [sec_index];
3530 size_t prefix_len, suffix_len, sec_name_len;
3532 sec_text_name = segment_name (text_seg);
3533 text_name = sec_text_name;
3534 if (strncmp (text_name, "_info", 5) == 0)
3536 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3538 ignore_rest_of_line ();
3541 if (strcmp (text_name, ".text") == 0)
3544 /* Build the unwind section name by appending the (possibly stripped)
3545 text section name to the unwind prefix. */
3547 if (strncmp (text_name, ".gnu.linkonce.t.",
3548 sizeof (".gnu.linkonce.t.") - 1) == 0)
3550 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3551 suffix += sizeof (".gnu.linkonce.t.") - 1;
3554 prefix_len = strlen (prefix);
3555 suffix_len = strlen (suffix);
3556 sec_name_len = prefix_len + suffix_len;
3557 sec_name = alloca (sec_name_len + 1);
3558 memcpy (sec_name, prefix, prefix_len);
3559 memcpy (sec_name + prefix_len, suffix, suffix_len);
3560 sec_name [sec_name_len] = '\0';
3562 /* Handle COMDAT group. */
3563 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3564 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
3567 size_t len, group_name_len;
3568 const char *group_name = elf_group_name (text_seg);
3570 if (group_name == NULL)
3572 as_bad ("Group section `%s' has no group signature",
3574 ignore_rest_of_line ();
3577 /* We have to construct a fake section directive. */
3578 group_name_len = strlen (group_name);
3580 + 16 /* ,"aG",@progbits, */
3581 + group_name_len /* ,group_name */
3584 section = alloca (len + 1);
3585 memcpy (section, sec_name, sec_name_len);
3586 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3587 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3588 memcpy (section + len - 7, ",comdat", 7);
3589 section [len] = '\0';
3590 set_section (section);
3594 set_section (sec_name);
3595 bfd_set_section_flags (stdoutput, now_seg,
3596 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3599 elf_linked_to_section (now_seg) = text_seg;
3603 generate_unwind_image (const segT text_seg)
3608 /* Mark the end of the unwind info, so that we can compute the size of the
3609 last unwind region. */
3610 add_unwind_entry (output_endp ());
3612 /* Force out pending instructions, to make sure all unwind records have
3613 a valid slot_number field. */
3614 ia64_flush_insns ();
3616 /* Generate the unwind record. */
3617 list = optimize_unw_records (unwind.list);
3618 fixup_unw_records (list, 1);
3619 size = calc_record_size (list);
3621 if (size > 0 || unwind.force_unwind_entry)
3623 unwind.force_unwind_entry = 0;
3624 /* pad to pointer-size boundary. */
3625 pad = size % md.pointer_size;
3627 size += md.pointer_size - pad;
3628 /* Add 8 for the header. */
3630 /* Add a pointer for the personality offset. */
3631 if (unwind.personality_routine)
3632 size += md.pointer_size;
3635 /* If there are unwind records, switch sections, and output the info. */
3639 bfd_reloc_code_real_type reloc;
3641 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
3643 /* Make sure the section has 4 byte alignment for ILP32 and
3644 8 byte alignment for LP64. */
3645 frag_align (md.pointer_size_shift, 0, 0);
3646 record_alignment (now_seg, md.pointer_size_shift);
3648 /* Set expression which points to start of unwind descriptor area. */
3649 unwind.info = expr_build_dot ();
3651 frag_var (rs_machine_dependent, size, size, 0, 0,
3652 (offsetT) (long) unwind.personality_routine,
3655 /* Add the personality address to the image. */
3656 if (unwind.personality_routine != 0)
3658 exp.X_op = O_symbol;
3659 exp.X_add_symbol = unwind.personality_routine;
3660 exp.X_add_number = 0;
3662 if (md.flags & EF_IA_64_BE)
3664 if (md.flags & EF_IA_64_ABI64)
3665 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3667 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3671 if (md.flags & EF_IA_64_ABI64)
3672 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3674 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3677 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3678 md.pointer_size, &exp, 0, reloc);
3679 unwind.personality_routine = 0;
3683 free_saved_prologue_counts ();
3684 unwind.list = unwind.tail = unwind.current_entry = NULL;
3688 dot_handlerdata (dummy)
3689 int dummy ATTRIBUTE_UNUSED;
3691 if (!in_procedure ("handlerdata"))
3693 unwind.force_unwind_entry = 1;
3695 /* Remember which segment we're in so we can switch back after .endp */
3696 unwind.saved_text_seg = now_seg;
3697 unwind.saved_text_subseg = now_subseg;
3699 /* Generate unwind info into unwind-info section and then leave that
3700 section as the currently active one so dataXX directives go into
3701 the language specific data area of the unwind info block. */
3702 generate_unwind_image (now_seg);
3703 demand_empty_rest_of_line ();
3707 dot_unwentry (dummy)
3708 int dummy ATTRIBUTE_UNUSED;
3710 if (!in_procedure ("unwentry"))
3712 unwind.force_unwind_entry = 1;
3713 demand_empty_rest_of_line ();
3718 int dummy ATTRIBUTE_UNUSED;
3723 if (!in_prologue ("altrp"))
3727 reg = e.X_add_number - REG_BR;
3728 if (e.X_op == O_register && reg < 8)
3729 add_unwind_entry (output_rp_br (reg));
3731 as_bad ("First operand not a valid branch register");
3735 dot_savemem (psprel)
3742 if (!in_prologue (psprel ? "savepsp" : "savesp"))
3745 sep = parse_operand (&e1);
3747 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3748 sep = parse_operand (&e2);
3750 reg1 = e1.X_add_number;
3751 val = e2.X_add_number;
3753 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3754 if (e1.X_op == O_register)
3756 if (e2.X_op == O_constant)
3760 case REG_AR + AR_BSP:
3761 add_unwind_entry (output_bsp_when ());
3762 add_unwind_entry ((psprel
3764 : output_bsp_sprel) (val));
3766 case REG_AR + AR_BSPSTORE:
3767 add_unwind_entry (output_bspstore_when ());
3768 add_unwind_entry ((psprel
3769 ? output_bspstore_psprel
3770 : output_bspstore_sprel) (val));
3772 case REG_AR + AR_RNAT:
3773 add_unwind_entry (output_rnat_when ());
3774 add_unwind_entry ((psprel
3775 ? output_rnat_psprel
3776 : output_rnat_sprel) (val));
3778 case REG_AR + AR_UNAT:
3779 add_unwind_entry (output_unat_when ());
3780 add_unwind_entry ((psprel
3781 ? output_unat_psprel
3782 : output_unat_sprel) (val));
3784 case REG_AR + AR_FPSR:
3785 add_unwind_entry (output_fpsr_when ());
3786 add_unwind_entry ((psprel
3787 ? output_fpsr_psprel
3788 : output_fpsr_sprel) (val));
3790 case REG_AR + AR_PFS:
3791 add_unwind_entry (output_pfs_when ());
3792 add_unwind_entry ((psprel
3794 : output_pfs_sprel) (val));
3796 case REG_AR + AR_LC:
3797 add_unwind_entry (output_lc_when ());
3798 add_unwind_entry ((psprel
3800 : output_lc_sprel) (val));
3803 add_unwind_entry (output_rp_when ());
3804 add_unwind_entry ((psprel
3806 : output_rp_sprel) (val));
3809 add_unwind_entry (output_preds_when ());
3810 add_unwind_entry ((psprel
3811 ? output_preds_psprel
3812 : output_preds_sprel) (val));
3815 add_unwind_entry (output_priunat_when_mem ());
3816 add_unwind_entry ((psprel
3817 ? output_priunat_psprel
3818 : output_priunat_sprel) (val));
3821 as_bad ("First operand not a valid register");
3825 as_bad (" Second operand not a valid constant");
3828 as_bad ("First operand not a register");
3833 int dummy ATTRIBUTE_UNUSED;
3838 if (!in_prologue ("save.g"))
3841 sep = parse_operand (&e1);
3843 parse_operand (&e2);
3845 if (e1.X_op != O_constant)
3846 as_bad ("First operand to .save.g must be a constant.");
3849 int grmask = e1.X_add_number;
3851 add_unwind_entry (output_gr_mem (grmask));
3854 int reg = e2.X_add_number - REG_GR;
3855 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3856 add_unwind_entry (output_gr_gr (grmask, reg));
3858 as_bad ("Second operand is an invalid register.");
3865 int dummy ATTRIBUTE_UNUSED;
3870 if (!in_prologue ("save.f"))
3873 sep = parse_operand (&e1);
3875 if (e1.X_op != O_constant)
3876 as_bad ("Operand to .save.f must be a constant.");
3878 add_unwind_entry (output_fr_mem (e1.X_add_number));
3883 int dummy ATTRIBUTE_UNUSED;
3890 if (!in_prologue ("save.b"))
3893 sep = parse_operand (&e1);
3894 if (e1.X_op != O_constant)
3896 as_bad ("First operand to .save.b must be a constant.");
3899 brmask = e1.X_add_number;
3903 sep = parse_operand (&e2);
3904 reg = e2.X_add_number - REG_GR;
3905 if (e2.X_op != O_register || reg > 127)
3907 as_bad ("Second operand to .save.b must be a general register.");
3910 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3913 add_unwind_entry (output_br_mem (brmask));
3915 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3916 demand_empty_rest_of_line ();
3921 int dummy ATTRIBUTE_UNUSED;
3926 if (!in_prologue ("save.gf"))
3929 sep = parse_operand (&e1);
3931 parse_operand (&e2);
3933 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3934 as_bad ("Both operands of .save.gf must be constants.");
3937 int grmask = e1.X_add_number;
3938 int frmask = e2.X_add_number;
3939 add_unwind_entry (output_frgr_mem (grmask, frmask));
3945 int dummy ATTRIBUTE_UNUSED;
3950 if (!in_prologue ("spill"))
3953 sep = parse_operand (&e);
3954 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3955 demand_empty_rest_of_line ();
3957 if (e.X_op != O_constant)
3958 as_bad ("Operand to .spill must be a constant");
3960 add_unwind_entry (output_spill_base (e.X_add_number));
3964 dot_spillreg (dummy)
3965 int dummy ATTRIBUTE_UNUSED;
3968 unsigned int ab, xy, reg, treg;
3971 if (!in_procedure ("spillreg"))
3974 sep = parse_operand (&e1);
3977 as_bad ("No second operand to .spillreg");
3981 parse_operand (&e2);
3983 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3985 as_bad ("First operand to .spillreg must be a preserved register");
3989 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3991 as_bad ("Second operand to .spillreg must be a register");
3995 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3999 dot_spillmem (psprel)
4004 unsigned int ab, reg;
4006 if (!in_procedure ("spillmem"))
4009 sep = parse_operand (&e1);
4012 as_bad ("Second operand missing");
4016 parse_operand (&e2);
4018 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
4020 as_bad ("First operand to .spill%s must be a preserved register",
4021 psprel ? "psp" : "sp");
4025 if (e2.X_op != O_constant)
4027 as_bad ("Second operand to .spill%s must be a constant",
4028 psprel ? "psp" : "sp");
4033 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
4035 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
4039 dot_spillreg_p (dummy)
4040 int dummy ATTRIBUTE_UNUSED;
4043 unsigned int ab, xy, reg, treg;
4044 expressionS e1, e2, e3;
4047 if (!in_procedure ("spillreg.p"))
4050 sep = parse_operand (&e1);
4053 as_bad ("No second and third operand to .spillreg.p");
4057 sep = parse_operand (&e2);
4060 as_bad ("No third operand to .spillreg.p");
4064 parse_operand (&e3);
4066 qp = e1.X_add_number - REG_P;
4068 if (e1.X_op != O_register || qp > 63)
4070 as_bad ("First operand to .spillreg.p must be a predicate");
4074 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4076 as_bad ("Second operand to .spillreg.p must be a preserved register");
4080 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
4082 as_bad ("Third operand to .spillreg.p must be a register");
4086 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
4090 dot_spillmem_p (psprel)
4093 expressionS e1, e2, e3;
4095 unsigned int ab, reg;
4098 if (!in_procedure ("spillmem.p"))
4101 sep = parse_operand (&e1);
4104 as_bad ("Second operand missing");
4108 parse_operand (&e2);
4111 as_bad ("Second operand missing");
4115 parse_operand (&e3);
4117 qp = e1.X_add_number - REG_P;
4118 if (e1.X_op != O_register || qp > 63)
4120 as_bad ("First operand to .spill%s_p must be a predicate",
4121 psprel ? "psp" : "sp");
4125 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
4127 as_bad ("Second operand to .spill%s_p must be a preserved register",
4128 psprel ? "psp" : "sp");
4132 if (e3.X_op != O_constant)
4134 as_bad ("Third operand to .spill%s_p must be a constant",
4135 psprel ? "psp" : "sp");
4140 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
4142 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
4146 get_saved_prologue_count (lbl)
4149 label_prologue_count *lpc = unwind.saved_prologue_counts;
4151 while (lpc != NULL && lpc->label_number != lbl)
4155 return lpc->prologue_count;
4157 as_bad ("Missing .label_state %ld", lbl);
4162 save_prologue_count (lbl, count)
4166 label_prologue_count *lpc = unwind.saved_prologue_counts;
4168 while (lpc != NULL && lpc->label_number != lbl)
4172 lpc->prologue_count = count;
4175 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4177 new_lpc->next = unwind.saved_prologue_counts;
4178 new_lpc->label_number = lbl;
4179 new_lpc->prologue_count = count;
4180 unwind.saved_prologue_counts = new_lpc;
4185 free_saved_prologue_counts ()
4187 label_prologue_count *lpc = unwind.saved_prologue_counts;
4188 label_prologue_count *next;
4197 unwind.saved_prologue_counts = NULL;
4201 dot_label_state (dummy)
4202 int dummy ATTRIBUTE_UNUSED;
4206 if (!in_body ("label_state"))
4210 if (e.X_op != O_constant)
4212 as_bad ("Operand to .label_state must be a constant");
4215 add_unwind_entry (output_label_state (e.X_add_number));
4216 save_prologue_count (e.X_add_number, unwind.prologue_count);
4220 dot_copy_state (dummy)
4221 int dummy ATTRIBUTE_UNUSED;
4225 if (!in_body ("copy_state"))
4229 if (e.X_op != O_constant)
4231 as_bad ("Operand to .copy_state must be a constant");
4234 add_unwind_entry (output_copy_state (e.X_add_number));
4235 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4240 int dummy ATTRIBUTE_UNUSED;
4245 if (!in_procedure ("unwabi"))
4248 sep = parse_operand (&e1);
4251 as_bad ("Second operand to .unwabi missing");
4254 sep = parse_operand (&e2);
4255 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4256 demand_empty_rest_of_line ();
4258 if (e1.X_op != O_constant)
4260 as_bad ("First operand to .unwabi must be a constant");
4264 if (e2.X_op != O_constant)
4266 as_bad ("Second operand to .unwabi must be a constant");
4270 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4274 dot_personality (dummy)
4275 int dummy ATTRIBUTE_UNUSED;
4278 if (!in_procedure ("personality"))
4281 name = input_line_pointer;
4282 c = get_symbol_end ();
4283 p = input_line_pointer;
4284 unwind.personality_routine = symbol_find_or_make (name);
4285 unwind.force_unwind_entry = 1;
4288 demand_empty_rest_of_line ();
4293 int dummy ATTRIBUTE_UNUSED;
4297 proc_pending *pending, *last_pending;
4299 if (unwind.proc_pending.sym)
4301 (md.unwind_check == unwind_check_warning
4303 : as_bad) ("Missing .endp after previous .proc");
4304 while (unwind.proc_pending.next)
4306 pending = unwind.proc_pending.next;
4307 unwind.proc_pending.next = pending->next;
4311 last_pending = NULL;
4313 /* Parse names of main and alternate entry points and mark them as
4314 function symbols: */
4318 name = input_line_pointer;
4319 c = get_symbol_end ();
4320 p = input_line_pointer;
4322 as_bad ("Empty argument of .proc");
4325 sym = symbol_find_or_make (name);
4326 if (S_IS_DEFINED (sym))
4327 as_bad ("`%s' was already defined", name);
4328 else if (!last_pending)
4330 unwind.proc_pending.sym = sym;
4331 last_pending = &unwind.proc_pending;
4335 pending = xmalloc (sizeof (*pending));
4337 last_pending = last_pending->next = pending;
4339 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4343 if (*input_line_pointer != ',')
4345 ++input_line_pointer;
4349 unwind.proc_pending.sym = expr_build_dot ();
4350 last_pending = &unwind.proc_pending;
4352 last_pending->next = NULL;
4353 demand_empty_rest_of_line ();
4356 unwind.prologue = 0;
4357 unwind.prologue_count = 0;
4360 unwind.list = unwind.tail = unwind.current_entry = NULL;
4361 unwind.personality_routine = 0;
4366 int dummy ATTRIBUTE_UNUSED;
4368 if (!in_procedure ("body"))
4370 if (!unwind.prologue && !unwind.body && unwind.insn)
4371 as_warn ("Initial .body should precede any instructions");
4373 unwind.prologue = 0;
4374 unwind.prologue_mask = 0;
4377 add_unwind_entry (output_body ());
4378 demand_empty_rest_of_line ();
4382 dot_prologue (dummy)
4383 int dummy ATTRIBUTE_UNUSED;
4386 int mask = 0, grsave = 0;
4388 if (!in_procedure ("prologue"))
4390 if (unwind.prologue)
4392 as_bad (".prologue within prologue");
4393 ignore_rest_of_line ();
4396 if (!unwind.body && unwind.insn)
4397 as_warn ("Initial .prologue should precede any instructions");
4399 if (!is_it_end_of_statement ())
4402 sep = parse_operand (&e1);
4404 as_bad ("No second operand to .prologue");
4405 sep = parse_operand (&e2);
4406 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4407 demand_empty_rest_of_line ();
4409 if (e1.X_op == O_constant)
4411 mask = e1.X_add_number;
4413 if (e2.X_op == O_constant)
4414 grsave = e2.X_add_number;
4415 else if (e2.X_op == O_register
4416 && (grsave = e2.X_add_number - REG_GR) < 128)
4419 as_bad ("Second operand not a constant or general register");
4421 add_unwind_entry (output_prologue_gr (mask, grsave));
4424 as_bad ("First operand not a constant");
4427 add_unwind_entry (output_prologue ());
4429 unwind.prologue = 1;
4430 unwind.prologue_mask = mask;
4432 ++unwind.prologue_count;
4437 int dummy ATTRIBUTE_UNUSED;
4440 int bytes_per_address;
4443 subsegT saved_subseg;
4444 proc_pending *pending;
4445 int unwind_check = md.unwind_check;
4447 md.unwind_check = unwind_check_error;
4448 if (!in_procedure ("endp"))
4450 md.unwind_check = unwind_check;
4452 if (unwind.saved_text_seg)
4454 saved_seg = unwind.saved_text_seg;
4455 saved_subseg = unwind.saved_text_subseg;
4456 unwind.saved_text_seg = NULL;
4460 saved_seg = now_seg;
4461 saved_subseg = now_subseg;
4464 insn_group_break (1, 0, 0);
4466 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4468 generate_unwind_image (saved_seg);
4470 if (unwind.info || unwind.force_unwind_entry)
4474 subseg_set (md.last_text_seg, 0);
4475 proc_end = expr_build_dot ();
4477 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
4479 /* Make sure that section has 4 byte alignment for ILP32 and
4480 8 byte alignment for LP64. */
4481 record_alignment (now_seg, md.pointer_size_shift);
4483 /* Need space for 3 pointers for procedure start, procedure end,
4485 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
4486 where = frag_now_fix () - (3 * md.pointer_size);
4487 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4489 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4490 e.X_op = O_pseudo_fixup;
4491 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4493 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4494 && S_IS_DEFINED (unwind.proc_pending.sym))
4495 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4496 S_GET_VALUE (unwind.proc_pending.sym),
4497 symbol_get_frag (unwind.proc_pending.sym));
4499 e.X_add_symbol = unwind.proc_pending.sym;
4500 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4502 e.X_op = O_pseudo_fixup;
4503 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4505 e.X_add_symbol = proc_end;
4506 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4507 bytes_per_address, &e);
4511 e.X_op = O_pseudo_fixup;
4512 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4514 e.X_add_symbol = unwind.info;
4515 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4516 bytes_per_address, &e);
4519 subseg_set (saved_seg, saved_subseg);
4521 /* Set symbol sizes. */
4522 pending = &unwind.proc_pending;
4523 if (S_GET_NAME (pending->sym))
4527 symbolS *sym = pending->sym;
4529 if (!S_IS_DEFINED (sym))
4530 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym));
4531 else if (S_GET_SIZE (sym) == 0
4532 && symbol_get_obj (sym)->size == NULL)
4534 fragS *frag = symbol_get_frag (sym);
4538 if (frag == frag_now && SEG_NORMAL (now_seg))
4539 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4542 symbol_get_obj (sym)->size =
4543 (expressionS *) xmalloc (sizeof (expressionS));
4544 symbol_get_obj (sym)->size->X_op = O_subtract;
4545 symbol_get_obj (sym)->size->X_add_symbol
4546 = symbol_new (FAKE_LABEL_NAME, now_seg,
4547 frag_now_fix (), frag_now);
4548 symbol_get_obj (sym)->size->X_op_symbol = sym;
4549 symbol_get_obj (sym)->size->X_add_number = 0;
4553 } while ((pending = pending->next) != NULL);
4556 /* Parse names of main and alternate entry points. */
4562 name = input_line_pointer;
4563 c = get_symbol_end ();
4564 p = input_line_pointer;
4566 (md.unwind_check == unwind_check_warning
4568 : as_bad) ("Empty argument of .endp");
4571 symbolS *sym = symbol_find (name);
4573 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4575 if (sym == pending->sym)
4577 pending->sym = NULL;
4581 if (!sym || !pending)
4582 as_warn ("`%s' was not specified with previous .proc", name);
4586 if (*input_line_pointer != ',')
4588 ++input_line_pointer;
4590 demand_empty_rest_of_line ();
4592 /* Deliberately only checking for the main entry point here; the
4593 language spec even says all arguments to .endp are ignored. */
4594 if (unwind.proc_pending.sym
4595 && S_GET_NAME (unwind.proc_pending.sym)
4596 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
4597 as_warn ("`%s' should be an operand to this .endp",
4598 S_GET_NAME (unwind.proc_pending.sym));
4599 while (unwind.proc_pending.next)
4601 pending = unwind.proc_pending.next;
4602 unwind.proc_pending.next = pending->next;
4605 unwind.proc_pending.sym = unwind.info = NULL;
4609 dot_template (template)
4612 CURR_SLOT.user_template = template;
4617 int dummy ATTRIBUTE_UNUSED;
4619 int ins, locs, outs, rots;
4621 if (is_it_end_of_statement ())
4622 ins = locs = outs = rots = 0;
4625 ins = get_absolute_expression ();
4626 if (*input_line_pointer++ != ',')
4628 locs = get_absolute_expression ();
4629 if (*input_line_pointer++ != ',')
4631 outs = get_absolute_expression ();
4632 if (*input_line_pointer++ != ',')
4634 rots = get_absolute_expression ();
4636 set_regstack (ins, locs, outs, rots);
4640 as_bad ("Comma expected");
4641 ignore_rest_of_line ();
4648 unsigned num_regs, num_alloced = 0;
4649 struct dynreg **drpp, *dr;
4650 int ch, base_reg = 0;
4656 case DYNREG_GR: base_reg = REG_GR + 32; break;
4657 case DYNREG_FR: base_reg = REG_FR + 32; break;
4658 case DYNREG_PR: base_reg = REG_P + 16; break;
4662 /* First, remove existing names from hash table. */
4663 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4665 hash_delete (md.dynreg_hash, dr->name);
4666 /* FIXME: Free dr->name. */
4670 drpp = &md.dynreg[type];
4673 start = input_line_pointer;
4674 ch = get_symbol_end ();
4675 len = strlen (ia64_canonicalize_symbol_name (start));
4676 *input_line_pointer = ch;
4679 if (*input_line_pointer != '[')
4681 as_bad ("Expected '['");
4684 ++input_line_pointer; /* skip '[' */
4686 num_regs = get_absolute_expression ();
4688 if (*input_line_pointer++ != ']')
4690 as_bad ("Expected ']'");
4695 num_alloced += num_regs;
4699 if (num_alloced > md.rot.num_regs)
4701 as_bad ("Used more than the declared %d rotating registers",
4707 if (num_alloced > 96)
4709 as_bad ("Used more than the available 96 rotating registers");
4714 if (num_alloced > 48)
4716 as_bad ("Used more than the available 48 rotating registers");
4727 *drpp = obstack_alloc (¬es, sizeof (*dr));
4728 memset (*drpp, 0, sizeof (*dr));
4731 name = obstack_alloc (¬es, len + 1);
4732 memcpy (name, start, len);
4737 dr->num_regs = num_regs;
4738 dr->base = base_reg;
4740 base_reg += num_regs;
4742 if (hash_insert (md.dynreg_hash, name, dr))
4744 as_bad ("Attempt to redefine register set `%s'", name);
4745 obstack_free (¬es, name);
4749 if (*input_line_pointer != ',')
4751 ++input_line_pointer; /* skip comma */
4754 demand_empty_rest_of_line ();
4758 ignore_rest_of_line ();
4762 dot_byteorder (byteorder)
4765 segment_info_type *seginfo = seg_info (now_seg);
4767 if (byteorder == -1)
4769 if (seginfo->tc_segment_info_data.endian == 0)
4770 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4771 byteorder = seginfo->tc_segment_info_data.endian == 1;
4774 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4776 if (target_big_endian != byteorder)
4778 target_big_endian = byteorder;
4779 if (target_big_endian)
4781 ia64_number_to_chars = number_to_chars_bigendian;
4782 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4786 ia64_number_to_chars = number_to_chars_littleendian;
4787 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4794 int dummy ATTRIBUTE_UNUSED;
4801 option = input_line_pointer;
4802 ch = get_symbol_end ();
4803 if (strcmp (option, "lsb") == 0)
4804 md.flags &= ~EF_IA_64_BE;
4805 else if (strcmp (option, "msb") == 0)
4806 md.flags |= EF_IA_64_BE;
4807 else if (strcmp (option, "abi32") == 0)
4808 md.flags &= ~EF_IA_64_ABI64;
4809 else if (strcmp (option, "abi64") == 0)
4810 md.flags |= EF_IA_64_ABI64;
4812 as_bad ("Unknown psr option `%s'", option);
4813 *input_line_pointer = ch;
4816 if (*input_line_pointer != ',')
4819 ++input_line_pointer;
4822 demand_empty_rest_of_line ();
4827 int dummy ATTRIBUTE_UNUSED;
4829 new_logical_line (0, get_absolute_expression ());
4830 demand_empty_rest_of_line ();
4834 cross_section (ref, cons, ua)
4836 void (*cons) PARAMS((int));
4840 int saved_auto_align;
4841 unsigned int section_count;
4844 start = input_line_pointer;
4850 name = demand_copy_C_string (&len);
4851 obstack_free(¬es, name);
4854 ignore_rest_of_line ();
4860 char c = get_symbol_end ();
4862 if (input_line_pointer == start)
4864 as_bad ("Missing section name");
4865 ignore_rest_of_line ();
4868 *input_line_pointer = c;
4870 end = input_line_pointer;
4872 if (*input_line_pointer != ',')
4874 as_bad ("Comma expected after section name");
4875 ignore_rest_of_line ();
4879 end = input_line_pointer + 1; /* skip comma */
4880 input_line_pointer = start;
4881 md.keep_pending_output = 1;
4882 section_count = bfd_count_sections(stdoutput);
4883 obj_elf_section (0);
4884 if (section_count != bfd_count_sections(stdoutput))
4885 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
4886 input_line_pointer = end;
4887 saved_auto_align = md.auto_align;
4892 md.auto_align = saved_auto_align;
4893 obj_elf_previous (0);
4894 md.keep_pending_output = 0;
4901 cross_section (size, cons, 0);
4904 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4907 stmt_float_cons (kind)
4928 ia64_do_align (alignment);
4936 int saved_auto_align = md.auto_align;
4940 md.auto_align = saved_auto_align;
4944 dot_xfloat_cons (kind)
4947 cross_section (kind, stmt_float_cons, 0);
4951 dot_xstringer (zero)
4954 cross_section (zero, stringer, 0);
4961 cross_section (size, cons, 1);
4965 dot_xfloat_cons_ua (kind)
4968 cross_section (kind, float_cons, 1);
4971 /* .reg.val <regname>,value */
4975 int dummy ATTRIBUTE_UNUSED;
4980 if (reg.X_op != O_register)
4982 as_bad (_("Register name expected"));
4983 ignore_rest_of_line ();
4985 else if (*input_line_pointer++ != ',')
4987 as_bad (_("Comma expected"));
4988 ignore_rest_of_line ();
4992 valueT value = get_absolute_expression ();
4993 int regno = reg.X_add_number;
4994 if (regno <= REG_GR || regno > REG_GR + 127)
4995 as_warn (_("Register value annotation ignored"));
4998 gr_values[regno - REG_GR].known = 1;
4999 gr_values[regno - REG_GR].value = value;
5000 gr_values[regno - REG_GR].path = md.path;
5003 demand_empty_rest_of_line ();
5008 .serialize.instruction
5011 dot_serialize (type)
5014 insn_group_break (0, 0, 0);
5016 instruction_serialization ();
5018 data_serialization ();
5019 insn_group_break (0, 0, 0);
5020 demand_empty_rest_of_line ();
5023 /* select dv checking mode
5028 A stop is inserted when changing modes
5035 if (md.manual_bundling)
5036 as_warn (_("Directive invalid within a bundle"));
5038 if (type == 'E' || type == 'A')
5039 md.mode_explicitly_set = 0;
5041 md.mode_explicitly_set = 1;
5048 if (md.explicit_mode)
5049 insn_group_break (1, 0, 0);
5050 md.explicit_mode = 0;
5054 if (!md.explicit_mode)
5055 insn_group_break (1, 0, 0);
5056 md.explicit_mode = 1;
5060 if (md.explicit_mode != md.default_explicit_mode)
5061 insn_group_break (1, 0, 0);
5062 md.explicit_mode = md.default_explicit_mode;
5063 md.mode_explicitly_set = 0;
5074 for (regno = 0; regno < 64; regno++)
5076 if (mask & ((valueT) 1 << regno))
5078 fprintf (stderr, "%s p%d", comma, regno);
5085 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5086 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5087 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5088 .pred.safe_across_calls p1 [, p2 [,...]]
5097 int p1 = -1, p2 = -1;
5101 if (*input_line_pointer == '"')
5104 char *form = demand_copy_C_string (&len);
5106 if (strcmp (form, "mutex") == 0)
5108 else if (strcmp (form, "clear") == 0)
5110 else if (strcmp (form, "imply") == 0)
5112 obstack_free (¬es, form);
5114 else if (*input_line_pointer == '@')
5116 char *form = ++input_line_pointer;
5117 char c = get_symbol_end();
5119 if (strcmp (form, "mutex") == 0)
5121 else if (strcmp (form, "clear") == 0)
5123 else if (strcmp (form, "imply") == 0)
5125 *input_line_pointer = c;
5129 as_bad (_("Missing predicate relation type"));
5130 ignore_rest_of_line ();
5135 as_bad (_("Unrecognized predicate relation type"));
5136 ignore_rest_of_line ();
5139 if (*input_line_pointer == ',')
5140 ++input_line_pointer;
5149 expressionS pr, *pr1, *pr2;
5152 if (pr.X_op == O_register
5153 && pr.X_add_number >= REG_P
5154 && pr.X_add_number <= REG_P + 63)
5156 regno = pr.X_add_number - REG_P;
5164 else if (type != 'i'
5165 && pr.X_op == O_subtract
5166 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5167 && pr1->X_op == O_register
5168 && pr1->X_add_number >= REG_P
5169 && pr1->X_add_number <= REG_P + 63
5170 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5171 && pr2->X_op == O_register
5172 && pr2->X_add_number >= REG_P
5173 && pr2->X_add_number <= REG_P + 63)
5178 regno = pr1->X_add_number - REG_P;
5179 stop = pr2->X_add_number - REG_P;
5182 as_bad (_("Bad register range"));
5183 ignore_rest_of_line ();
5186 bits = ((bits << stop) << 1) - (bits << regno);
5187 count += stop - regno + 1;
5191 as_bad (_("Predicate register expected"));
5192 ignore_rest_of_line ();
5196 as_warn (_("Duplicate predicate register ignored"));
5198 if (*input_line_pointer != ',')
5200 ++input_line_pointer;
5209 clear_qp_mutex (mask);
5210 clear_qp_implies (mask, (valueT) 0);
5213 if (count != 2 || p1 == -1 || p2 == -1)
5214 as_bad (_("Predicate source and target required"));
5215 else if (p1 == 0 || p2 == 0)
5216 as_bad (_("Use of p0 is not valid in this context"));
5218 add_qp_imply (p1, p2);
5223 as_bad (_("At least two PR arguments expected"));
5228 as_bad (_("Use of p0 is not valid in this context"));
5231 add_qp_mutex (mask);
5234 /* note that we don't override any existing relations */
5237 as_bad (_("At least one PR argument expected"));
5242 fprintf (stderr, "Safe across calls: ");
5243 print_prmask (mask);
5244 fprintf (stderr, "\n");
5246 qp_safe_across_calls = mask;
5249 demand_empty_rest_of_line ();
5252 /* .entry label [, label [, ...]]
5253 Hint to DV code that the given labels are to be considered entry points.
5254 Otherwise, only global labels are considered entry points. */
5258 int dummy ATTRIBUTE_UNUSED;
5267 name = input_line_pointer;
5268 c = get_symbol_end ();
5269 symbolP = symbol_find_or_make (name);
5271 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5273 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5276 *input_line_pointer = c;
5278 c = *input_line_pointer;
5281 input_line_pointer++;
5283 if (*input_line_pointer == '\n')
5289 demand_empty_rest_of_line ();
5292 /* .mem.offset offset, base
5293 "base" is used to distinguish between offsets from a different base. */
5296 dot_mem_offset (dummy)
5297 int dummy ATTRIBUTE_UNUSED;
5299 md.mem_offset.hint = 1;
5300 md.mem_offset.offset = get_absolute_expression ();
5301 if (*input_line_pointer != ',')
5303 as_bad (_("Comma expected"));
5304 ignore_rest_of_line ();
5307 ++input_line_pointer;
5308 md.mem_offset.base = get_absolute_expression ();
5309 demand_empty_rest_of_line ();
5312 /* ia64-specific pseudo-ops: */
5313 const pseudo_typeS md_pseudo_table[] =
5315 { "radix", dot_radix, 0 },
5316 { "lcomm", s_lcomm_bytes, 1 },
5317 { "loc", dot_loc, 0 },
5318 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5319 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5320 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5321 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5322 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5323 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5324 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5325 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5326 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5327 { "proc", dot_proc, 0 },
5328 { "body", dot_body, 0 },
5329 { "prologue", dot_prologue, 0 },
5330 { "endp", dot_endp, 0 },
5332 { "fframe", dot_fframe, 0 },
5333 { "vframe", dot_vframe, 0 },
5334 { "vframesp", dot_vframesp, 0 },
5335 { "vframepsp", dot_vframepsp, 0 },
5336 { "save", dot_save, 0 },
5337 { "restore", dot_restore, 0 },
5338 { "restorereg", dot_restorereg, 0 },
5339 { "restorereg.p", dot_restorereg_p, 0 },
5340 { "handlerdata", dot_handlerdata, 0 },
5341 { "unwentry", dot_unwentry, 0 },
5342 { "altrp", dot_altrp, 0 },
5343 { "savesp", dot_savemem, 0 },
5344 { "savepsp", dot_savemem, 1 },
5345 { "save.g", dot_saveg, 0 },
5346 { "save.f", dot_savef, 0 },
5347 { "save.b", dot_saveb, 0 },
5348 { "save.gf", dot_savegf, 0 },
5349 { "spill", dot_spill, 0 },
5350 { "spillreg", dot_spillreg, 0 },
5351 { "spillsp", dot_spillmem, 0 },
5352 { "spillpsp", dot_spillmem, 1 },
5353 { "spillreg.p", dot_spillreg_p, 0 },
5354 { "spillsp.p", dot_spillmem_p, 0 },
5355 { "spillpsp.p", dot_spillmem_p, 1 },
5356 { "label_state", dot_label_state, 0 },
5357 { "copy_state", dot_copy_state, 0 },
5358 { "unwabi", dot_unwabi, 0 },
5359 { "personality", dot_personality, 0 },
5360 { "mii", dot_template, 0x0 },
5361 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5362 { "mlx", dot_template, 0x2 },
5363 { "mmi", dot_template, 0x4 },
5364 { "mfi", dot_template, 0x6 },
5365 { "mmf", dot_template, 0x7 },
5366 { "mib", dot_template, 0x8 },
5367 { "mbb", dot_template, 0x9 },
5368 { "bbb", dot_template, 0xb },
5369 { "mmb", dot_template, 0xc },
5370 { "mfb", dot_template, 0xe },
5371 { "align", dot_align, 0 },
5372 { "regstk", dot_regstk, 0 },
5373 { "rotr", dot_rot, DYNREG_GR },
5374 { "rotf", dot_rot, DYNREG_FR },
5375 { "rotp", dot_rot, DYNREG_PR },
5376 { "lsb", dot_byteorder, 0 },
5377 { "msb", dot_byteorder, 1 },
5378 { "psr", dot_psr, 0 },
5379 { "alias", dot_alias, 0 },
5380 { "secalias", dot_alias, 1 },
5381 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5383 { "xdata1", dot_xdata, 1 },
5384 { "xdata2", dot_xdata, 2 },
5385 { "xdata4", dot_xdata, 4 },
5386 { "xdata8", dot_xdata, 8 },
5387 { "xdata16", dot_xdata, 16 },
5388 { "xreal4", dot_xfloat_cons, 'f' },
5389 { "xreal8", dot_xfloat_cons, 'd' },
5390 { "xreal10", dot_xfloat_cons, 'x' },
5391 { "xreal16", dot_xfloat_cons, 'X' },
5392 { "xstring", dot_xstringer, 0 },
5393 { "xstringz", dot_xstringer, 1 },
5395 /* unaligned versions: */
5396 { "xdata2.ua", dot_xdata_ua, 2 },
5397 { "xdata4.ua", dot_xdata_ua, 4 },
5398 { "xdata8.ua", dot_xdata_ua, 8 },
5399 { "xdata16.ua", dot_xdata_ua, 16 },
5400 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5401 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5402 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5403 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5405 /* annotations/DV checking support */
5406 { "entry", dot_entry, 0 },
5407 { "mem.offset", dot_mem_offset, 0 },
5408 { "pred.rel", dot_pred_rel, 0 },
5409 { "pred.rel.clear", dot_pred_rel, 'c' },
5410 { "pred.rel.imply", dot_pred_rel, 'i' },
5411 { "pred.rel.mutex", dot_pred_rel, 'm' },
5412 { "pred.safe_across_calls", dot_pred_rel, 's' },
5413 { "reg.val", dot_reg_val, 0 },
5414 { "serialize.data", dot_serialize, 0 },
5415 { "serialize.instruction", dot_serialize, 1 },
5416 { "auto", dot_dv_mode, 'a' },
5417 { "explicit", dot_dv_mode, 'e' },
5418 { "default", dot_dv_mode, 'd' },
5420 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5421 IA-64 aligns data allocation pseudo-ops by default, so we have to
5422 tell it that these ones are supposed to be unaligned. Long term,
5423 should rewrite so that only IA-64 specific data allocation pseudo-ops
5424 are aligned by default. */
5425 {"2byte", stmt_cons_ua, 2},
5426 {"4byte", stmt_cons_ua, 4},
5427 {"8byte", stmt_cons_ua, 8},
5432 static const struct pseudo_opcode
5435 void (*handler) (int);
5440 /* these are more like pseudo-ops, but don't start with a dot */
5441 { "data1", cons, 1 },
5442 { "data2", cons, 2 },
5443 { "data4", cons, 4 },
5444 { "data8", cons, 8 },
5445 { "data16", cons, 16 },
5446 { "real4", stmt_float_cons, 'f' },
5447 { "real8", stmt_float_cons, 'd' },
5448 { "real10", stmt_float_cons, 'x' },
5449 { "real16", stmt_float_cons, 'X' },
5450 { "string", stringer, 0 },
5451 { "stringz", stringer, 1 },
5453 /* unaligned versions: */
5454 { "data2.ua", stmt_cons_ua, 2 },
5455 { "data4.ua", stmt_cons_ua, 4 },
5456 { "data8.ua", stmt_cons_ua, 8 },
5457 { "data16.ua", stmt_cons_ua, 16 },
5458 { "real4.ua", float_cons, 'f' },
5459 { "real8.ua", float_cons, 'd' },
5460 { "real10.ua", float_cons, 'x' },
5461 { "real16.ua", float_cons, 'X' },
5464 /* Declare a register by creating a symbol for it and entering it in
5465 the symbol table. */
5468 declare_register (name, regnum)
5475 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5477 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5479 as_fatal ("Inserting \"%s\" into register table failed: %s",
5486 declare_register_set (prefix, num_regs, base_regnum)
5494 for (i = 0; i < num_regs; ++i)
5496 sprintf (name, "%s%u", prefix, i);
5497 declare_register (name, base_regnum + i);
5502 operand_width (opnd)
5503 enum ia64_opnd opnd;
5505 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5506 unsigned int bits = 0;
5510 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5511 bits += odesc->field[i].bits;
5516 static enum operand_match_result
5517 operand_match (idesc, index, e)
5518 const struct ia64_opcode *idesc;
5522 enum ia64_opnd opnd = idesc->operands[index];
5523 int bits, relocatable = 0;
5524 struct insn_fix *fix;
5531 case IA64_OPND_AR_CCV:
5532 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5533 return OPERAND_MATCH;
5536 case IA64_OPND_AR_CSD:
5537 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5538 return OPERAND_MATCH;
5541 case IA64_OPND_AR_PFS:
5542 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5543 return OPERAND_MATCH;
5547 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5548 return OPERAND_MATCH;
5552 if (e->X_op == O_register && e->X_add_number == REG_IP)
5553 return OPERAND_MATCH;
5557 if (e->X_op == O_register && e->X_add_number == REG_PR)
5558 return OPERAND_MATCH;
5561 case IA64_OPND_PR_ROT:
5562 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5563 return OPERAND_MATCH;
5567 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5568 return OPERAND_MATCH;
5571 case IA64_OPND_PSR_L:
5572 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5573 return OPERAND_MATCH;
5576 case IA64_OPND_PSR_UM:
5577 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5578 return OPERAND_MATCH;
5582 if (e->X_op == O_constant)
5584 if (e->X_add_number == 1)
5585 return OPERAND_MATCH;
5587 return OPERAND_OUT_OF_RANGE;
5592 if (e->X_op == O_constant)
5594 if (e->X_add_number == 8)
5595 return OPERAND_MATCH;
5597 return OPERAND_OUT_OF_RANGE;
5602 if (e->X_op == O_constant)
5604 if (e->X_add_number == 16)
5605 return OPERAND_MATCH;
5607 return OPERAND_OUT_OF_RANGE;
5611 /* register operands: */
5614 if (e->X_op == O_register && e->X_add_number >= REG_AR
5615 && e->X_add_number < REG_AR + 128)
5616 return OPERAND_MATCH;
5621 if (e->X_op == O_register && e->X_add_number >= REG_BR
5622 && e->X_add_number < REG_BR + 8)
5623 return OPERAND_MATCH;
5627 if (e->X_op == O_register && e->X_add_number >= REG_CR
5628 && e->X_add_number < REG_CR + 128)
5629 return OPERAND_MATCH;
5636 if (e->X_op == O_register && e->X_add_number >= REG_FR
5637 && e->X_add_number < REG_FR + 128)
5638 return OPERAND_MATCH;
5643 if (e->X_op == O_register && e->X_add_number >= REG_P
5644 && e->X_add_number < REG_P + 64)
5645 return OPERAND_MATCH;
5651 if (e->X_op == O_register && e->X_add_number >= REG_GR
5652 && e->X_add_number < REG_GR + 128)
5653 return OPERAND_MATCH;
5656 case IA64_OPND_R3_2:
5657 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5659 if (e->X_add_number < REG_GR + 4)
5660 return OPERAND_MATCH;
5661 else if (e->X_add_number < REG_GR + 128)
5662 return OPERAND_OUT_OF_RANGE;
5666 /* indirect operands: */
5667 case IA64_OPND_CPUID_R3:
5668 case IA64_OPND_DBR_R3:
5669 case IA64_OPND_DTR_R3:
5670 case IA64_OPND_ITR_R3:
5671 case IA64_OPND_IBR_R3:
5672 case IA64_OPND_MSR_R3:
5673 case IA64_OPND_PKR_R3:
5674 case IA64_OPND_PMC_R3:
5675 case IA64_OPND_PMD_R3:
5676 case IA64_OPND_RR_R3:
5677 if (e->X_op == O_index && e->X_op_symbol
5678 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5679 == opnd - IA64_OPND_CPUID_R3))
5680 return OPERAND_MATCH;
5684 if (e->X_op == O_index && !e->X_op_symbol)
5685 return OPERAND_MATCH;
5688 /* immediate operands: */
5689 case IA64_OPND_CNT2a:
5690 case IA64_OPND_LEN4:
5691 case IA64_OPND_LEN6:
5692 bits = operand_width (idesc->operands[index]);
5693 if (e->X_op == O_constant)
5695 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5696 return OPERAND_MATCH;
5698 return OPERAND_OUT_OF_RANGE;
5702 case IA64_OPND_CNT2b:
5703 if (e->X_op == O_constant)
5705 if ((bfd_vma) (e->X_add_number - 1) < 3)
5706 return OPERAND_MATCH;
5708 return OPERAND_OUT_OF_RANGE;
5712 case IA64_OPND_CNT2c:
5713 val = e->X_add_number;
5714 if (e->X_op == O_constant)
5716 if ((val == 0 || val == 7 || val == 15 || val == 16))
5717 return OPERAND_MATCH;
5719 return OPERAND_OUT_OF_RANGE;
5724 /* SOR must be an integer multiple of 8 */
5725 if (e->X_op == O_constant && e->X_add_number & 0x7)
5726 return OPERAND_OUT_OF_RANGE;
5729 if (e->X_op == O_constant)
5731 if ((bfd_vma) e->X_add_number <= 96)
5732 return OPERAND_MATCH;
5734 return OPERAND_OUT_OF_RANGE;
5738 case IA64_OPND_IMMU62:
5739 if (e->X_op == O_constant)
5741 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5742 return OPERAND_MATCH;
5744 return OPERAND_OUT_OF_RANGE;
5748 /* FIXME -- need 62-bit relocation type */
5749 as_bad (_("62-bit relocation not yet implemented"));
5753 case IA64_OPND_IMMU64:
5754 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5755 || e->X_op == O_subtract)
5757 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5758 fix->code = BFD_RELOC_IA64_IMM64;
5759 if (e->X_op != O_subtract)
5761 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5762 if (e->X_op == O_pseudo_fixup)
5766 fix->opnd = idesc->operands[index];
5769 ++CURR_SLOT.num_fixups;
5770 return OPERAND_MATCH;
5772 else if (e->X_op == O_constant)
5773 return OPERAND_MATCH;
5776 case IA64_OPND_CCNT5:
5777 case IA64_OPND_CNT5:
5778 case IA64_OPND_CNT6:
5779 case IA64_OPND_CPOS6a:
5780 case IA64_OPND_CPOS6b:
5781 case IA64_OPND_CPOS6c:
5782 case IA64_OPND_IMMU2:
5783 case IA64_OPND_IMMU7a:
5784 case IA64_OPND_IMMU7b:
5785 case IA64_OPND_IMMU21:
5786 case IA64_OPND_IMMU24:
5787 case IA64_OPND_MBTYPE4:
5788 case IA64_OPND_MHTYPE8:
5789 case IA64_OPND_POS6:
5790 bits = operand_width (idesc->operands[index]);
5791 if (e->X_op == O_constant)
5793 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5794 return OPERAND_MATCH;
5796 return OPERAND_OUT_OF_RANGE;
5800 case IA64_OPND_IMMU9:
5801 bits = operand_width (idesc->operands[index]);
5802 if (e->X_op == O_constant)
5804 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5806 int lobits = e->X_add_number & 0x3;
5807 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5808 e->X_add_number |= (bfd_vma) 0x3;
5809 return OPERAND_MATCH;
5812 return OPERAND_OUT_OF_RANGE;
5816 case IA64_OPND_IMM44:
5817 /* least 16 bits must be zero */
5818 if ((e->X_add_number & 0xffff) != 0)
5819 /* XXX technically, this is wrong: we should not be issuing warning
5820 messages until we're sure this instruction pattern is going to
5822 as_warn (_("lower 16 bits of mask ignored"));
5824 if (e->X_op == O_constant)
5826 if (((e->X_add_number >= 0
5827 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5828 || (e->X_add_number < 0
5829 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5832 if (e->X_add_number >= 0
5833 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5835 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5837 return OPERAND_MATCH;
5840 return OPERAND_OUT_OF_RANGE;
5844 case IA64_OPND_IMM17:
5845 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5846 if (e->X_op == O_constant)
5848 if (((e->X_add_number >= 0
5849 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5850 || (e->X_add_number < 0
5851 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5854 if (e->X_add_number >= 0
5855 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5857 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5859 return OPERAND_MATCH;
5862 return OPERAND_OUT_OF_RANGE;
5866 case IA64_OPND_IMM14:
5867 case IA64_OPND_IMM22:
5869 case IA64_OPND_IMM1:
5870 case IA64_OPND_IMM8:
5871 case IA64_OPND_IMM8U4:
5872 case IA64_OPND_IMM8M1:
5873 case IA64_OPND_IMM8M1U4:
5874 case IA64_OPND_IMM8M1U8:
5875 case IA64_OPND_IMM9a:
5876 case IA64_OPND_IMM9b:
5877 bits = operand_width (idesc->operands[index]);
5878 if (relocatable && (e->X_op == O_symbol
5879 || e->X_op == O_subtract
5880 || e->X_op == O_pseudo_fixup))
5882 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5884 if (idesc->operands[index] == IA64_OPND_IMM14)
5885 fix->code = BFD_RELOC_IA64_IMM14;
5887 fix->code = BFD_RELOC_IA64_IMM22;
5889 if (e->X_op != O_subtract)
5891 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5892 if (e->X_op == O_pseudo_fixup)
5896 fix->opnd = idesc->operands[index];
5899 ++CURR_SLOT.num_fixups;
5900 return OPERAND_MATCH;
5902 else if (e->X_op != O_constant
5903 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5904 return OPERAND_MISMATCH;
5906 if (opnd == IA64_OPND_IMM8M1U4)
5908 /* Zero is not valid for unsigned compares that take an adjusted
5909 constant immediate range. */
5910 if (e->X_add_number == 0)
5911 return OPERAND_OUT_OF_RANGE;
5913 /* Sign-extend 32-bit unsigned numbers, so that the following range
5914 checks will work. */
5915 val = e->X_add_number;
5916 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5917 && ((val & ((bfd_vma) 1 << 31)) != 0))
5918 val = ((val << 32) >> 32);
5920 /* Check for 0x100000000. This is valid because
5921 0x100000000-1 is the same as ((uint32_t) -1). */
5922 if (val == ((bfd_signed_vma) 1 << 32))
5923 return OPERAND_MATCH;
5927 else if (opnd == IA64_OPND_IMM8M1U8)
5929 /* Zero is not valid for unsigned compares that take an adjusted
5930 constant immediate range. */
5931 if (e->X_add_number == 0)
5932 return OPERAND_OUT_OF_RANGE;
5934 /* Check for 0x10000000000000000. */
5935 if (e->X_op == O_big)
5937 if (generic_bignum[0] == 0
5938 && generic_bignum[1] == 0
5939 && generic_bignum[2] == 0
5940 && generic_bignum[3] == 0
5941 && generic_bignum[4] == 1)
5942 return OPERAND_MATCH;
5944 return OPERAND_OUT_OF_RANGE;
5947 val = e->X_add_number - 1;
5949 else if (opnd == IA64_OPND_IMM8M1)
5950 val = e->X_add_number - 1;
5951 else if (opnd == IA64_OPND_IMM8U4)
5953 /* Sign-extend 32-bit unsigned numbers, so that the following range
5954 checks will work. */
5955 val = e->X_add_number;
5956 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5957 && ((val & ((bfd_vma) 1 << 31)) != 0))
5958 val = ((val << 32) >> 32);
5961 val = e->X_add_number;
5963 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5964 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5965 return OPERAND_MATCH;
5967 return OPERAND_OUT_OF_RANGE;
5969 case IA64_OPND_INC3:
5970 /* +/- 1, 4, 8, 16 */
5971 val = e->X_add_number;
5974 if (e->X_op == O_constant)
5976 if ((val == 1 || val == 4 || val == 8 || val == 16))
5977 return OPERAND_MATCH;
5979 return OPERAND_OUT_OF_RANGE;
5983 case IA64_OPND_TGT25:
5984 case IA64_OPND_TGT25b:
5985 case IA64_OPND_TGT25c:
5986 case IA64_OPND_TGT64:
5987 if (e->X_op == O_symbol)
5989 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5990 if (opnd == IA64_OPND_TGT25)
5991 fix->code = BFD_RELOC_IA64_PCREL21F;
5992 else if (opnd == IA64_OPND_TGT25b)
5993 fix->code = BFD_RELOC_IA64_PCREL21M;
5994 else if (opnd == IA64_OPND_TGT25c)
5995 fix->code = BFD_RELOC_IA64_PCREL21B;
5996 else if (opnd == IA64_OPND_TGT64)
5997 fix->code = BFD_RELOC_IA64_PCREL60B;
6001 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6002 fix->opnd = idesc->operands[index];
6005 ++CURR_SLOT.num_fixups;
6006 return OPERAND_MATCH;
6008 case IA64_OPND_TAG13:
6009 case IA64_OPND_TAG13b:
6013 return OPERAND_MATCH;
6016 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6017 /* There are no external relocs for TAG13/TAG13b fields, so we
6018 create a dummy reloc. This will not live past md_apply_fix. */
6019 fix->code = BFD_RELOC_UNUSED;
6020 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6021 fix->opnd = idesc->operands[index];
6024 ++CURR_SLOT.num_fixups;
6025 return OPERAND_MATCH;
6032 case IA64_OPND_LDXMOV:
6033 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6034 fix->code = BFD_RELOC_IA64_LDXMOV;
6035 fix->opnd = idesc->operands[index];
6038 ++CURR_SLOT.num_fixups;
6039 return OPERAND_MATCH;
6044 return OPERAND_MISMATCH;
6053 memset (e, 0, sizeof (*e));
6056 if (*input_line_pointer != '}')
6058 sep = *input_line_pointer++;
6062 if (!md.manual_bundling)
6063 as_warn ("Found '}' when manual bundling is off");
6065 CURR_SLOT.manual_bundling_off = 1;
6066 md.manual_bundling = 0;
6072 /* Returns the next entry in the opcode table that matches the one in
6073 IDESC, and frees the entry in IDESC. If no matching entry is
6074 found, NULL is returned instead. */
6076 static struct ia64_opcode *
6077 get_next_opcode (struct ia64_opcode *idesc)
6079 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6080 ia64_free_opcode (idesc);
6084 /* Parse the operands for the opcode and find the opcode variant that
6085 matches the specified operands, or NULL if no match is possible. */
6087 static struct ia64_opcode *
6088 parse_operands (idesc)
6089 struct ia64_opcode *idesc;
6091 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
6092 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
6095 enum ia64_opnd expected_operand = IA64_OPND_NIL;
6096 enum operand_match_result result;
6098 char *first_arg = 0, *end, *saved_input_pointer;
6101 assert (strlen (idesc->name) <= 128);
6103 strcpy (mnemonic, idesc->name);
6104 if (idesc->operands[2] == IA64_OPND_SOF
6105 || idesc->operands[1] == IA64_OPND_SOF)
6107 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6108 can't parse the first operand until we have parsed the
6109 remaining operands of the "alloc" instruction. */
6111 first_arg = input_line_pointer;
6112 end = strchr (input_line_pointer, '=');
6115 as_bad ("Expected separator `='");
6118 input_line_pointer = end + 1;
6125 if (i < NELEMS (CURR_SLOT.opnd))
6127 sep = parse_operand (CURR_SLOT.opnd + i);
6128 if (CURR_SLOT.opnd[i].X_op == O_absent)
6135 sep = parse_operand (&dummy);
6136 if (dummy.X_op == O_absent)
6142 if (sep != '=' && sep != ',')
6147 if (num_outputs > 0)
6148 as_bad ("Duplicate equal sign (=) in instruction");
6150 num_outputs = i + 1;
6155 as_bad ("Illegal operand separator `%c'", sep);
6159 if (idesc->operands[2] == IA64_OPND_SOF
6160 || idesc->operands[1] == IA64_OPND_SOF)
6162 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
6163 know (strcmp (idesc->name, "alloc") == 0);
6164 i = (CURR_SLOT.opnd[1].X_op == O_register
6165 && CURR_SLOT.opnd[1].X_add_number == REG_AR + AR_PFS) ? 2 : 1;
6166 if (num_operands == i + 3 /* first_arg not included in this count! */
6167 && CURR_SLOT.opnd[i].X_op == O_constant
6168 && CURR_SLOT.opnd[i + 1].X_op == O_constant
6169 && CURR_SLOT.opnd[i + 2].X_op == O_constant
6170 && CURR_SLOT.opnd[i + 3].X_op == O_constant)
6172 sof = set_regstack (CURR_SLOT.opnd[i].X_add_number,
6173 CURR_SLOT.opnd[i + 1].X_add_number,
6174 CURR_SLOT.opnd[i + 2].X_add_number,
6175 CURR_SLOT.opnd[i + 3].X_add_number);
6177 /* now we can parse the first arg: */
6178 saved_input_pointer = input_line_pointer;
6179 input_line_pointer = first_arg;
6180 sep = parse_operand (CURR_SLOT.opnd + 0);
6182 --num_outputs; /* force error */
6183 input_line_pointer = saved_input_pointer;
6185 CURR_SLOT.opnd[i].X_add_number = sof;
6186 CURR_SLOT.opnd[i + 1].X_add_number
6187 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6188 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6192 highest_unmatched_operand = -4;
6193 curr_out_of_range_pos = -1;
6195 for (; idesc; idesc = get_next_opcode (idesc))
6197 if (num_outputs != idesc->num_outputs)
6198 continue; /* mismatch in # of outputs */
6199 if (highest_unmatched_operand < 0)
6200 highest_unmatched_operand |= 1;
6201 if (num_operands > NELEMS (idesc->operands)
6202 || (num_operands < NELEMS (idesc->operands)
6203 && idesc->operands[num_operands])
6204 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6205 continue; /* mismatch in number of arguments */
6206 if (highest_unmatched_operand < 0)
6207 highest_unmatched_operand |= 2;
6209 CURR_SLOT.num_fixups = 0;
6211 /* Try to match all operands. If we see an out-of-range operand,
6212 then continue trying to match the rest of the operands, since if
6213 the rest match, then this idesc will give the best error message. */
6215 out_of_range_pos = -1;
6216 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6218 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6219 if (result != OPERAND_MATCH)
6221 if (result != OPERAND_OUT_OF_RANGE)
6223 if (out_of_range_pos < 0)
6224 /* remember position of the first out-of-range operand: */
6225 out_of_range_pos = i;
6229 /* If we did not match all operands, or if at least one operand was
6230 out-of-range, then this idesc does not match. Keep track of which
6231 idesc matched the most operands before failing. If we have two
6232 idescs that failed at the same position, and one had an out-of-range
6233 operand, then prefer the out-of-range operand. Thus if we have
6234 "add r0=0x1000000,r1" we get an error saying the constant is out
6235 of range instead of an error saying that the constant should have been
6238 if (i != num_operands || out_of_range_pos >= 0)
6240 if (i > highest_unmatched_operand
6241 || (i == highest_unmatched_operand
6242 && out_of_range_pos > curr_out_of_range_pos))
6244 highest_unmatched_operand = i;
6245 if (out_of_range_pos >= 0)
6247 expected_operand = idesc->operands[out_of_range_pos];
6248 error_pos = out_of_range_pos;
6252 expected_operand = idesc->operands[i];
6255 curr_out_of_range_pos = out_of_range_pos;
6264 if (expected_operand)
6265 as_bad ("Operand %u of `%s' should be %s",
6266 error_pos + 1, mnemonic,
6267 elf64_ia64_operands[expected_operand].desc);
6268 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6269 as_bad ("Wrong number of output operands");
6270 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6271 as_bad ("Wrong number of input operands");
6273 as_bad ("Operand mismatch");
6277 /* Check that the instruction doesn't use
6278 - r0, f0, or f1 as output operands
6279 - the same predicate twice as output operands
6280 - r0 as address of a base update load or store
6281 - the same GR as output and address of a base update load
6282 - two even- or two odd-numbered FRs as output operands of a floating
6283 point parallel load.
6284 At most two (conflicting) output (or output-like) operands can exist,
6285 (floating point parallel loads have three outputs, but the base register,
6286 if updated, cannot conflict with the actual outputs). */
6288 for (i = 0; i < num_operands; ++i)
6293 switch (idesc->operands[i])
6298 if (i < num_outputs)
6300 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6303 reg1 = CURR_SLOT.opnd[i].X_add_number;
6305 reg2 = CURR_SLOT.opnd[i].X_add_number;
6310 if (i < num_outputs)
6313 reg1 = CURR_SLOT.opnd[i].X_add_number;
6315 reg2 = CURR_SLOT.opnd[i].X_add_number;
6322 if (i < num_outputs)
6324 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6325 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6328 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6331 reg1 = CURR_SLOT.opnd[i].X_add_number;
6333 reg2 = CURR_SLOT.opnd[i].X_add_number;
6337 if (idesc->flags & IA64_OPCODE_POSTINC)
6339 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6342 reg1 = CURR_SLOT.opnd[i].X_add_number;
6344 reg2 = CURR_SLOT.opnd[i].X_add_number;
6355 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6358 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6364 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6369 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6374 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6382 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6384 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6385 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6386 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6387 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6388 && ! ((reg1 ^ reg2) & 1))
6389 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6390 reg1 - REG_FR, reg2 - REG_FR);
6391 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6392 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6393 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6394 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6395 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6396 reg1 - REG_FR, reg2 - REG_FR);
6401 build_insn (slot, insnp)
6405 const struct ia64_operand *odesc, *o2desc;
6406 struct ia64_opcode *idesc = slot->idesc;
6412 insn = idesc->opcode | slot->qp_regno;
6414 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6416 if (slot->opnd[i].X_op == O_register
6417 || slot->opnd[i].X_op == O_constant
6418 || slot->opnd[i].X_op == O_index)
6419 val = slot->opnd[i].X_add_number;
6420 else if (slot->opnd[i].X_op == O_big)
6422 /* This must be the value 0x10000000000000000. */
6423 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6429 switch (idesc->operands[i])
6431 case IA64_OPND_IMMU64:
6432 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6433 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6434 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6435 | (((val >> 63) & 0x1) << 36));
6438 case IA64_OPND_IMMU62:
6439 val &= 0x3fffffffffffffffULL;
6440 if (val != slot->opnd[i].X_add_number)
6441 as_warn (_("Value truncated to 62 bits"));
6442 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6443 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6446 case IA64_OPND_TGT64:
6448 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6449 insn |= ((((val >> 59) & 0x1) << 36)
6450 | (((val >> 0) & 0xfffff) << 13));
6481 case IA64_OPND_R3_2:
6482 case IA64_OPND_CPUID_R3:
6483 case IA64_OPND_DBR_R3:
6484 case IA64_OPND_DTR_R3:
6485 case IA64_OPND_ITR_R3:
6486 case IA64_OPND_IBR_R3:
6488 case IA64_OPND_MSR_R3:
6489 case IA64_OPND_PKR_R3:
6490 case IA64_OPND_PMC_R3:
6491 case IA64_OPND_PMD_R3:
6492 case IA64_OPND_RR_R3:
6500 odesc = elf64_ia64_operands + idesc->operands[i];
6501 err = (*odesc->insert) (odesc, val, &insn);
6503 as_bad_where (slot->src_file, slot->src_line,
6504 "Bad operand value: %s", err);
6505 if (idesc->flags & IA64_OPCODE_PSEUDO)
6507 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6508 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6510 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6511 (*o2desc->insert) (o2desc, val, &insn);
6513 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6514 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6515 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6517 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6518 (*o2desc->insert) (o2desc, 64 - val, &insn);
6528 int manual_bundling_off = 0, manual_bundling = 0;
6529 enum ia64_unit required_unit, insn_unit = 0;
6530 enum ia64_insn_type type[3], insn_type;
6531 unsigned int template, orig_template;
6532 bfd_vma insn[3] = { -1, -1, -1 };
6533 struct ia64_opcode *idesc;
6534 int end_of_insn_group = 0, user_template = -1;
6535 int n, i, j, first, curr, last_slot;
6536 bfd_vma t0 = 0, t1 = 0;
6537 struct label_fix *lfix;
6538 struct insn_fix *ifix;
6544 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6545 know (first >= 0 & first < NUM_SLOTS);
6546 n = MIN (3, md.num_slots_in_use);
6548 /* Determine template: user user_template if specified, best match
6551 if (md.slot[first].user_template >= 0)
6552 user_template = template = md.slot[first].user_template;
6555 /* Auto select appropriate template. */
6556 memset (type, 0, sizeof (type));
6558 for (i = 0; i < n; ++i)
6560 if (md.slot[curr].label_fixups && i != 0)
6562 type[i] = md.slot[curr].idesc->type;
6563 curr = (curr + 1) % NUM_SLOTS;
6565 template = best_template[type[0]][type[1]][type[2]];
6568 /* initialize instructions with appropriate nops: */
6569 for (i = 0; i < 3; ++i)
6570 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6574 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6575 from the start of the frag. */
6576 addr_mod = frag_now_fix () & 15;
6577 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6578 as_bad (_("instruction address is not a multiple of 16"));
6579 frag_now->insn_addr = addr_mod;
6580 frag_now->has_code = 1;
6582 /* now fill in slots with as many insns as possible: */
6584 idesc = md.slot[curr].idesc;
6585 end_of_insn_group = 0;
6587 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6589 /* If we have unwind records, we may need to update some now. */
6590 unw_rec_list *ptr = md.slot[curr].unwind_record;
6591 unw_rec_list *end_ptr = NULL;
6595 /* Find the last prologue/body record in the list for the current
6596 insn, and set the slot number for all records up to that point.
6597 This needs to be done now, because prologue/body records refer to
6598 the current point, not the point after the instruction has been
6599 issued. This matters because there may have been nops emitted
6600 meanwhile. Any non-prologue non-body record followed by a
6601 prologue/body record must also refer to the current point. */
6602 unw_rec_list *last_ptr;
6604 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6605 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6606 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
6607 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6608 || ptr->r.type == body)
6612 /* Make last_ptr point one after the last prologue/body
6614 last_ptr = last_ptr->next;
6615 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6618 ptr->slot_number = (unsigned long) f + i;
6619 ptr->slot_frag = frag_now;
6621 /* Remove the initialized records, so that we won't accidentally
6622 update them again if we insert a nop and continue. */
6623 md.slot[curr].unwind_record = last_ptr;
6627 manual_bundling_off = md.slot[curr].manual_bundling_off;
6628 if (md.slot[curr].manual_bundling_on)
6631 manual_bundling = 1;
6633 break; /* Need to start a new bundle. */
6636 /* If this instruction specifies a template, then it must be the first
6637 instruction of a bundle. */
6638 if (curr != first && md.slot[curr].user_template >= 0)
6641 if (idesc->flags & IA64_OPCODE_SLOT2)
6643 if (manual_bundling && !manual_bundling_off)
6645 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6646 "`%s' must be last in bundle", idesc->name);
6648 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6652 if (idesc->flags & IA64_OPCODE_LAST)
6655 unsigned int required_template;
6657 /* If we need a stop bit after an M slot, our only choice is
6658 template 5 (M;;MI). If we need a stop bit after a B
6659 slot, our only choice is to place it at the end of the
6660 bundle, because the only available templates are MIB,
6661 MBB, BBB, MMB, and MFB. We don't handle anything other
6662 than M and B slots because these are the only kind of
6663 instructions that can have the IA64_OPCODE_LAST bit set. */
6664 required_template = template;
6665 switch (idesc->type)
6669 required_template = 5;
6677 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6678 "Internal error: don't know how to force %s to end"
6679 "of instruction group", idesc->name);
6684 && (i > required_slot
6685 || (required_slot == 2 && !manual_bundling_off)
6686 || (user_template >= 0
6687 /* Changing from MMI to M;MI is OK. */
6688 && (template ^ required_template) > 1)))
6690 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6691 "`%s' must be last in instruction group",
6693 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6694 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6696 if (required_slot < i)
6697 /* Can't fit this instruction. */
6701 if (required_template != template)
6703 /* If we switch the template, we need to reset the NOPs
6704 after slot i. The slot-types of the instructions ahead
6705 of i never change, so we don't need to worry about
6706 changing NOPs in front of this slot. */
6707 for (j = i; j < 3; ++j)
6708 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6710 template = required_template;
6712 if (curr != first && md.slot[curr].label_fixups)
6714 if (manual_bundling)
6716 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6717 "Label must be first in a bundle");
6718 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6720 /* This insn must go into the first slot of a bundle. */
6724 if (end_of_insn_group && md.num_slots_in_use >= 1)
6726 /* We need an instruction group boundary in the middle of a
6727 bundle. See if we can switch to an other template with
6728 an appropriate boundary. */
6730 orig_template = template;
6731 if (i == 1 && (user_template == 4
6732 || (user_template < 0
6733 && (ia64_templ_desc[template].exec_unit[0]
6737 end_of_insn_group = 0;
6739 else if (i == 2 && (user_template == 0
6740 || (user_template < 0
6741 && (ia64_templ_desc[template].exec_unit[1]
6743 /* This test makes sure we don't switch the template if
6744 the next instruction is one that needs to be first in
6745 an instruction group. Since all those instructions are
6746 in the M group, there is no way such an instruction can
6747 fit in this bundle even if we switch the template. The
6748 reason we have to check for this is that otherwise we
6749 may end up generating "MI;;I M.." which has the deadly
6750 effect that the second M instruction is no longer the
6751 first in the group! --davidm 99/12/16 */
6752 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6755 end_of_insn_group = 0;
6758 && user_template == 0
6759 && !(idesc->flags & IA64_OPCODE_FIRST))
6760 /* Use the next slot. */
6762 else if (curr != first)
6763 /* can't fit this insn */
6766 if (template != orig_template)
6767 /* if we switch the template, we need to reset the NOPs
6768 after slot i. The slot-types of the instructions ahead
6769 of i never change, so we don't need to worry about
6770 changing NOPs in front of this slot. */
6771 for (j = i; j < 3; ++j)
6772 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6774 required_unit = ia64_templ_desc[template].exec_unit[i];
6776 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6777 if (idesc->type == IA64_TYPE_DYN)
6779 enum ia64_opnd opnd1, opnd2;
6781 if ((strcmp (idesc->name, "nop") == 0)
6782 || (strcmp (idesc->name, "break") == 0))
6783 insn_unit = required_unit;
6784 else if (strcmp (idesc->name, "hint") == 0)
6786 insn_unit = required_unit;
6787 if (required_unit == IA64_UNIT_B)
6793 case hint_b_warning:
6794 as_warn ("hint in B unit may be treated as nop");
6797 /* When manual bundling is off and there is no
6798 user template, we choose a different unit so
6799 that hint won't go into the current slot. We
6800 will fill the current bundle with nops and
6801 try to put hint into the next bundle. */
6802 if (!manual_bundling && user_template < 0)
6803 insn_unit = IA64_UNIT_I;
6805 as_bad ("hint in B unit can't be used");
6810 else if (strcmp (idesc->name, "chk.s") == 0
6811 || strcmp (idesc->name, "mov") == 0)
6813 insn_unit = IA64_UNIT_M;
6814 if (required_unit == IA64_UNIT_I
6815 || (required_unit == IA64_UNIT_F && template == 6))
6816 insn_unit = IA64_UNIT_I;
6819 as_fatal ("emit_one_bundle: unexpected dynamic op");
6821 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6822 opnd1 = idesc->operands[0];
6823 opnd2 = idesc->operands[1];
6824 ia64_free_opcode (idesc);
6825 idesc = ia64_find_opcode (mnemonic);
6826 /* moves to/from ARs have collisions */
6827 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6829 while (idesc != NULL
6830 && (idesc->operands[0] != opnd1
6831 || idesc->operands[1] != opnd2))
6832 idesc = get_next_opcode (idesc);
6834 md.slot[curr].idesc = idesc;
6838 insn_type = idesc->type;
6839 insn_unit = IA64_UNIT_NIL;
6843 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6844 insn_unit = required_unit;
6846 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6847 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6848 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6849 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6850 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6855 if (insn_unit != required_unit)
6856 continue; /* Try next slot. */
6858 if (debug_type == DEBUG_DWARF2 || md.slot[curr].loc_directive_seen)
6860 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6862 md.slot[curr].loc_directive_seen = 0;
6863 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6866 build_insn (md.slot + curr, insn + i);
6868 ptr = md.slot[curr].unwind_record;
6871 /* Set slot numbers for all remaining unwind records belonging to the
6872 current insn. There can not be any prologue/body unwind records
6874 for (; ptr != end_ptr; ptr = ptr->next)
6876 ptr->slot_number = (unsigned long) f + i;
6877 ptr->slot_frag = frag_now;
6879 md.slot[curr].unwind_record = NULL;
6882 if (required_unit == IA64_UNIT_L)
6885 /* skip one slot for long/X-unit instructions */
6888 --md.num_slots_in_use;
6891 /* now is a good time to fix up the labels for this insn: */
6892 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6894 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6895 symbol_set_frag (lfix->sym, frag_now);
6897 /* and fix up the tags also. */
6898 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6900 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6901 symbol_set_frag (lfix->sym, frag_now);
6904 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6906 ifix = md.slot[curr].fixup + j;
6907 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6908 &ifix->expr, ifix->is_pcrel, ifix->code);
6909 fix->tc_fix_data.opnd = ifix->opnd;
6910 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6911 fix->fx_file = md.slot[curr].src_file;
6912 fix->fx_line = md.slot[curr].src_line;
6915 end_of_insn_group = md.slot[curr].end_of_insn_group;
6918 ia64_free_opcode (md.slot[curr].idesc);
6919 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6920 md.slot[curr].user_template = -1;
6922 if (manual_bundling_off)
6924 manual_bundling = 0;
6927 curr = (curr + 1) % NUM_SLOTS;
6928 idesc = md.slot[curr].idesc;
6930 if (manual_bundling > 0)
6932 if (md.num_slots_in_use > 0)
6935 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6936 "`%s' does not fit into bundle", idesc->name);
6937 else if (last_slot < 0)
6939 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6940 "`%s' does not fit into %s template",
6941 idesc->name, ia64_templ_desc[template].name);
6942 /* Drop first insn so we don't livelock. */
6943 --md.num_slots_in_use;
6944 know (curr == first);
6945 ia64_free_opcode (md.slot[curr].idesc);
6946 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6947 md.slot[curr].user_template = -1;
6955 else if (last_slot == 0)
6956 where = "slots 2 or 3";
6959 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6960 "`%s' can't go in %s of %s template",
6961 idesc->name, where, ia64_templ_desc[template].name);
6965 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6966 "Missing '}' at end of file");
6968 know (md.num_slots_in_use < NUM_SLOTS);
6970 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6971 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6973 number_to_chars_littleendian (f + 0, t0, 8);
6974 number_to_chars_littleendian (f + 8, t1, 8);
6978 md_parse_option (c, arg)
6985 /* Switches from the Intel assembler. */
6987 if (strcmp (arg, "ilp64") == 0
6988 || strcmp (arg, "lp64") == 0
6989 || strcmp (arg, "p64") == 0)
6991 md.flags |= EF_IA_64_ABI64;
6993 else if (strcmp (arg, "ilp32") == 0)
6995 md.flags &= ~EF_IA_64_ABI64;
6997 else if (strcmp (arg, "le") == 0)
6999 md.flags &= ~EF_IA_64_BE;
7000 default_big_endian = 0;
7002 else if (strcmp (arg, "be") == 0)
7004 md.flags |= EF_IA_64_BE;
7005 default_big_endian = 1;
7007 else if (strncmp (arg, "unwind-check=", 13) == 0)
7010 if (strcmp (arg, "warning") == 0)
7011 md.unwind_check = unwind_check_warning;
7012 else if (strcmp (arg, "error") == 0)
7013 md.unwind_check = unwind_check_error;
7017 else if (strncmp (arg, "hint.b=", 7) == 0)
7020 if (strcmp (arg, "ok") == 0)
7021 md.hint_b = hint_b_ok;
7022 else if (strcmp (arg, "warning") == 0)
7023 md.hint_b = hint_b_warning;
7024 else if (strcmp (arg, "error") == 0)
7025 md.hint_b = hint_b_error;
7029 else if (strncmp (arg, "tune=", 5) == 0)
7032 if (strcmp (arg, "itanium1") == 0)
7034 else if (strcmp (arg, "itanium2") == 0)
7044 if (strcmp (arg, "so") == 0)
7046 /* Suppress signon message. */
7048 else if (strcmp (arg, "pi") == 0)
7050 /* Reject privileged instructions. FIXME */
7052 else if (strcmp (arg, "us") == 0)
7054 /* Allow union of signed and unsigned range. FIXME */
7056 else if (strcmp (arg, "close_fcalls") == 0)
7058 /* Do not resolve global function calls. */
7065 /* temp[="prefix"] Insert temporary labels into the object file
7066 symbol table prefixed by "prefix".
7067 Default prefix is ":temp:".
7072 /* indirect=<tgt> Assume unannotated indirect branches behavior
7073 according to <tgt> --
7074 exit: branch out from the current context (default)
7075 labels: all labels in context may be branch targets
7077 if (strncmp (arg, "indirect=", 9) != 0)
7082 /* -X conflicts with an ignored option, use -x instead */
7084 if (!arg || strcmp (arg, "explicit") == 0)
7086 /* set default mode to explicit */
7087 md.default_explicit_mode = 1;
7090 else if (strcmp (arg, "auto") == 0)
7092 md.default_explicit_mode = 0;
7094 else if (strcmp (arg, "none") == 0)
7098 else if (strcmp (arg, "debug") == 0)
7102 else if (strcmp (arg, "debugx") == 0)
7104 md.default_explicit_mode = 1;
7107 else if (strcmp (arg, "debugn") == 0)
7114 as_bad (_("Unrecognized option '-x%s'"), arg);
7119 /* nops Print nops statistics. */
7122 /* GNU specific switches for gcc. */
7123 case OPTION_MCONSTANT_GP:
7124 md.flags |= EF_IA_64_CONS_GP;
7127 case OPTION_MAUTO_PIC:
7128 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7139 md_show_usage (stream)
7144 --mconstant-gp mark output file as using the constant-GP model\n\
7145 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7146 --mauto-pic mark output file as using the constant-GP model\n\
7147 without function descriptors (sets ELF header flag\n\
7148 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7149 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7150 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7151 -mtune=[itanium1|itanium2]\n\
7152 tune for a specific CPU (default -mtune=itanium2)\n\
7153 -munwind-check=[warning|error]\n\
7154 unwind directive check (default -munwind-check=warning)\n\
7155 -mhint.b=[ok|warning|error]\n\
7156 hint.b check (default -mhint.b=error)\n\
7157 -x | -xexplicit turn on dependency violation checking\n\
7158 -xauto automagically remove dependency violations (default)\n\
7159 -xnone turn off dependency violation checking\n\
7160 -xdebug debug dependency violation checker\n\
7161 -xdebugn debug dependency violation checker but turn off\n\
7162 dependency violation checking\n\
7163 -xdebugx debug dependency violation checker and turn on\n\
7164 dependency violation checking\n"),
7169 ia64_after_parse_args ()
7171 if (debug_type == DEBUG_STABS)
7172 as_fatal (_("--gstabs is not supported for ia64"));
7175 /* Return true if TYPE fits in TEMPL at SLOT. */
7178 match (int templ, int type, int slot)
7180 enum ia64_unit unit;
7183 unit = ia64_templ_desc[templ].exec_unit[slot];
7186 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7188 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7190 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7191 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7192 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7193 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7194 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7195 default: result = 0; break;
7200 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7201 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7202 type M or I would fit in TEMPL at SLOT. */
7205 extra_goodness (int templ, int slot)
7210 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7212 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7218 if (match (templ, IA64_TYPE_M, slot)
7219 || match (templ, IA64_TYPE_I, slot))
7220 /* Favor M- and I-unit NOPs. We definitely want to avoid
7221 F-unit and B-unit may cause split-issue or less-than-optimal
7222 branch-prediction. */
7233 /* This function is called once, at assembler startup time. It sets
7234 up all the tables, etc. that the MD part of the assembler will need
7235 that can be determined before arguments are parsed. */
7239 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
7244 md.explicit_mode = md.default_explicit_mode;
7246 bfd_set_section_alignment (stdoutput, text_section, 4);
7248 /* Make sure function pointers get initialized. */
7249 target_big_endian = -1;
7250 dot_byteorder (default_big_endian);
7252 alias_hash = hash_new ();
7253 alias_name_hash = hash_new ();
7254 secalias_hash = hash_new ();
7255 secalias_name_hash = hash_new ();
7257 pseudo_func[FUNC_DTP_MODULE].u.sym =
7258 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7259 &zero_address_frag);
7261 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7262 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7263 &zero_address_frag);
7265 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
7266 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7267 &zero_address_frag);
7269 pseudo_func[FUNC_GP_RELATIVE].u.sym =
7270 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7271 &zero_address_frag);
7273 pseudo_func[FUNC_LT_RELATIVE].u.sym =
7274 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7275 &zero_address_frag);
7277 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7278 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7279 &zero_address_frag);
7281 pseudo_func[FUNC_PC_RELATIVE].u.sym =
7282 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7283 &zero_address_frag);
7285 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
7286 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7287 &zero_address_frag);
7289 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
7290 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7291 &zero_address_frag);
7293 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
7294 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7295 &zero_address_frag);
7297 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7298 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7299 &zero_address_frag);
7301 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7302 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7303 &zero_address_frag);
7305 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7306 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7307 &zero_address_frag);
7309 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7310 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7311 &zero_address_frag);
7313 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7314 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7315 &zero_address_frag);
7317 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7318 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7319 &zero_address_frag);
7321 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7322 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7323 &zero_address_frag);
7325 if (md.tune != itanium1)
7327 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7329 le_nop_stop[0] = 0x9;
7332 /* Compute the table of best templates. We compute goodness as a
7333 base 4 value, in which each match counts for 3. Match-failures
7334 result in NOPs and we use extra_goodness() to pick the execution
7335 units that are best suited for issuing the NOP. */
7336 for (i = 0; i < IA64_NUM_TYPES; ++i)
7337 for (j = 0; j < IA64_NUM_TYPES; ++j)
7338 for (k = 0; k < IA64_NUM_TYPES; ++k)
7341 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7344 if (match (t, i, 0))
7346 if (match (t, j, 1))
7348 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
7349 goodness = 3 + 3 + 3;
7351 goodness = 3 + 3 + extra_goodness (t, 2);
7353 else if (match (t, j, 2))
7354 goodness = 3 + 3 + extra_goodness (t, 1);
7358 goodness += extra_goodness (t, 1);
7359 goodness += extra_goodness (t, 2);
7362 else if (match (t, i, 1))
7364 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
7367 goodness = 3 + extra_goodness (t, 2);
7369 else if (match (t, i, 2))
7370 goodness = 3 + extra_goodness (t, 1);
7372 if (goodness > best)
7375 best_template[i][j][k] = t;
7380 #ifdef DEBUG_TEMPLATES
7381 /* For debugging changes to the best_template calculations. We don't care
7382 about combinations with invalid instructions, so start the loops at 1. */
7383 for (i = 0; i < IA64_NUM_TYPES; ++i)
7384 for (j = 0; j < IA64_NUM_TYPES; ++j)
7385 for (k = 0; k < IA64_NUM_TYPES; ++k)
7387 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7389 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7391 ia64_templ_desc[best_template[i][j][k]].name);
7395 for (i = 0; i < NUM_SLOTS; ++i)
7396 md.slot[i].user_template = -1;
7398 md.pseudo_hash = hash_new ();
7399 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7401 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7402 (void *) (pseudo_opcode + i));
7404 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7405 pseudo_opcode[i].name, err);
7408 md.reg_hash = hash_new ();
7409 md.dynreg_hash = hash_new ();
7410 md.const_hash = hash_new ();
7411 md.entry_hash = hash_new ();
7413 /* general registers: */
7416 for (i = 0; i < total; ++i)
7418 sprintf (name, "r%d", i - REG_GR);
7419 md.regsym[i] = declare_register (name, i);
7422 /* floating point registers: */
7424 for (; i < total; ++i)
7426 sprintf (name, "f%d", i - REG_FR);
7427 md.regsym[i] = declare_register (name, i);
7430 /* application registers: */
7433 for (; i < total; ++i)
7435 sprintf (name, "ar%d", i - REG_AR);
7436 md.regsym[i] = declare_register (name, i);
7439 /* control registers: */
7442 for (; i < total; ++i)
7444 sprintf (name, "cr%d", i - REG_CR);
7445 md.regsym[i] = declare_register (name, i);
7448 /* predicate registers: */
7450 for (; i < total; ++i)
7452 sprintf (name, "p%d", i - REG_P);
7453 md.regsym[i] = declare_register (name, i);
7456 /* branch registers: */
7458 for (; i < total; ++i)
7460 sprintf (name, "b%d", i - REG_BR);
7461 md.regsym[i] = declare_register (name, i);
7464 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7465 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7466 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7467 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7468 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7469 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7470 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7472 for (i = 0; i < NELEMS (indirect_reg); ++i)
7474 regnum = indirect_reg[i].regnum;
7475 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7478 /* define synonyms for application registers: */
7479 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
7480 md.regsym[i] = declare_register (ar[i - REG_AR].name,
7481 REG_AR + ar[i - REG_AR].regnum);
7483 /* define synonyms for control registers: */
7484 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
7485 md.regsym[i] = declare_register (cr[i - REG_CR].name,
7486 REG_CR + cr[i - REG_CR].regnum);
7488 declare_register ("gp", REG_GR + 1);
7489 declare_register ("sp", REG_GR + 12);
7490 declare_register ("rp", REG_BR + 0);
7492 /* pseudo-registers used to specify unwind info: */
7493 declare_register ("psp", REG_PSP);
7495 declare_register_set ("ret", 4, REG_GR + 8);
7496 declare_register_set ("farg", 8, REG_FR + 8);
7497 declare_register_set ("fret", 8, REG_FR + 8);
7499 for (i = 0; i < NELEMS (const_bits); ++i)
7501 err = hash_insert (md.const_hash, const_bits[i].name,
7502 (PTR) (const_bits + i));
7504 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7508 /* Set the architecture and machine depending on defaults and command line
7510 if (md.flags & EF_IA_64_ABI64)
7511 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7513 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7516 as_warn (_("Could not set architecture and machine"));
7518 /* Set the pointer size and pointer shift size depending on md.flags */
7520 if (md.flags & EF_IA_64_ABI64)
7522 md.pointer_size = 8; /* pointers are 8 bytes */
7523 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7527 md.pointer_size = 4; /* pointers are 4 bytes */
7528 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7531 md.mem_offset.hint = 0;
7534 md.entry_labels = NULL;
7537 /* Set the default options in md. Cannot do this in md_begin because
7538 that is called after md_parse_option which is where we set the
7539 options in md based on command line options. */
7542 ia64_init (argc, argv)
7543 int argc ATTRIBUTE_UNUSED;
7544 char **argv ATTRIBUTE_UNUSED;
7546 md.flags = MD_FLAGS_DEFAULT;
7548 /* FIXME: We should change it to unwind_check_error someday. */
7549 md.unwind_check = unwind_check_warning;
7550 md.hint_b = hint_b_error;
7554 /* Return a string for the target object file format. */
7557 ia64_target_format ()
7559 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7561 if (md.flags & EF_IA_64_BE)
7563 if (md.flags & EF_IA_64_ABI64)
7564 #if defined(TE_AIX50)
7565 return "elf64-ia64-aix-big";
7566 #elif defined(TE_HPUX)
7567 return "elf64-ia64-hpux-big";
7569 return "elf64-ia64-big";
7572 #if defined(TE_AIX50)
7573 return "elf32-ia64-aix-big";
7574 #elif defined(TE_HPUX)
7575 return "elf32-ia64-hpux-big";
7577 return "elf32-ia64-big";
7582 if (md.flags & EF_IA_64_ABI64)
7584 return "elf64-ia64-aix-little";
7586 return "elf64-ia64-little";
7590 return "elf32-ia64-aix-little";
7592 return "elf32-ia64-little";
7597 return "unknown-format";
7601 ia64_end_of_source ()
7603 /* terminate insn group upon reaching end of file: */
7604 insn_group_break (1, 0, 0);
7606 /* emits slots we haven't written yet: */
7607 ia64_flush_insns ();
7609 bfd_set_private_flags (stdoutput, md.flags);
7611 md.mem_offset.hint = 0;
7617 if (md.qp.X_op == O_register)
7618 as_bad ("qualifying predicate not followed by instruction");
7619 md.qp.X_op = O_absent;
7621 if (ignore_input ())
7624 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7626 if (md.detect_dv && !md.explicit_mode)
7633 as_warn (_("Explicit stops are ignored in auto mode"));
7637 insn_group_break (1, 0, 0);
7641 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7643 static int defining_tag = 0;
7646 ia64_unrecognized_line (ch)
7652 expression (&md.qp);
7653 if (*input_line_pointer++ != ')')
7655 as_bad ("Expected ')'");
7658 if (md.qp.X_op != O_register)
7660 as_bad ("Qualifying predicate expected");
7663 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7665 as_bad ("Predicate register expected");
7671 if (md.manual_bundling)
7672 as_warn ("Found '{' when manual bundling is already turned on");
7674 CURR_SLOT.manual_bundling_on = 1;
7675 md.manual_bundling = 1;
7677 /* Bundling is only acceptable in explicit mode
7678 or when in default automatic mode. */
7679 if (md.detect_dv && !md.explicit_mode)
7681 if (!md.mode_explicitly_set
7682 && !md.default_explicit_mode)
7685 as_warn (_("Found '{' after explicit switch to automatic mode"));
7690 if (!md.manual_bundling)
7691 as_warn ("Found '}' when manual bundling is off");
7693 PREV_SLOT.manual_bundling_off = 1;
7694 md.manual_bundling = 0;
7696 /* switch back to automatic mode, if applicable */
7699 && !md.mode_explicitly_set
7700 && !md.default_explicit_mode)
7703 /* Allow '{' to follow on the same line. We also allow ";;", but that
7704 happens automatically because ';' is an end of line marker. */
7706 if (input_line_pointer[0] == '{')
7708 input_line_pointer++;
7709 return ia64_unrecognized_line ('{');
7712 demand_empty_rest_of_line ();
7722 if (md.qp.X_op == O_register)
7724 as_bad ("Tag must come before qualifying predicate.");
7728 /* This implements just enough of read_a_source_file in read.c to
7729 recognize labels. */
7730 if (is_name_beginner (*input_line_pointer))
7732 s = input_line_pointer;
7733 c = get_symbol_end ();
7735 else if (LOCAL_LABELS_FB
7736 && ISDIGIT (*input_line_pointer))
7739 while (ISDIGIT (*input_line_pointer))
7740 temp = (temp * 10) + *input_line_pointer++ - '0';
7741 fb_label_instance_inc (temp);
7742 s = fb_label_name (temp, 0);
7743 c = *input_line_pointer;
7752 /* Put ':' back for error messages' sake. */
7753 *input_line_pointer++ = ':';
7754 as_bad ("Expected ':'");
7761 /* Put ':' back for error messages' sake. */
7762 *input_line_pointer++ = ':';
7763 if (*input_line_pointer++ != ']')
7765 as_bad ("Expected ']'");
7770 as_bad ("Tag name expected");
7780 /* Not a valid line. */
7785 ia64_frob_label (sym)
7788 struct label_fix *fix;
7790 /* Tags need special handling since they are not bundle breaks like
7794 fix = obstack_alloc (¬es, sizeof (*fix));
7796 fix->next = CURR_SLOT.tag_fixups;
7797 CURR_SLOT.tag_fixups = fix;
7802 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7804 md.last_text_seg = now_seg;
7805 fix = obstack_alloc (¬es, sizeof (*fix));
7807 fix->next = CURR_SLOT.label_fixups;
7808 CURR_SLOT.label_fixups = fix;
7810 /* Keep track of how many code entry points we've seen. */
7811 if (md.path == md.maxpaths)
7814 md.entry_labels = (const char **)
7815 xrealloc ((void *) md.entry_labels,
7816 md.maxpaths * sizeof (char *));
7818 md.entry_labels[md.path++] = S_GET_NAME (sym);
7823 /* The HP-UX linker will give unresolved symbol errors for symbols
7824 that are declared but unused. This routine removes declared,
7825 unused symbols from an object. */
7827 ia64_frob_symbol (sym)
7830 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7831 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7832 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7833 && ! S_IS_EXTERNAL (sym)))
7840 ia64_flush_pending_output ()
7842 if (!md.keep_pending_output
7843 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7845 /* ??? This causes many unnecessary stop bits to be emitted.
7846 Unfortunately, it isn't clear if it is safe to remove this. */
7847 insn_group_break (1, 0, 0);
7848 ia64_flush_insns ();
7852 /* Do ia64-specific expression optimization. All that's done here is
7853 to transform index expressions that are either due to the indexing
7854 of rotating registers or due to the indexing of indirect register
7857 ia64_optimize_expr (l, op, r)
7866 if (l->X_op == O_register && r->X_op == O_constant)
7868 num_regs = (l->X_add_number >> 16);
7869 if ((unsigned) r->X_add_number >= num_regs)
7872 as_bad ("No current frame");
7874 as_bad ("Index out of range 0..%u", num_regs - 1);
7875 r->X_add_number = 0;
7877 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7880 else if (l->X_op == O_register && r->X_op == O_register)
7882 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7883 || l->X_add_number == IND_MEM)
7885 as_bad ("Indirect register set name expected");
7886 l->X_add_number = IND_CPUID;
7889 l->X_op_symbol = md.regsym[l->X_add_number];
7890 l->X_add_number = r->X_add_number;
7898 ia64_parse_name (name, e, nextcharP)
7903 struct const_desc *cdesc;
7904 struct dynreg *dr = 0;
7911 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
7913 /* Find what relocation pseudo-function we're dealing with. */
7914 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
7915 if (pseudo_func[idx].name
7916 && pseudo_func[idx].name[0] == name[1]
7917 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
7919 pseudo_type = pseudo_func[idx].type;
7922 switch (pseudo_type)
7924 case PSEUDO_FUNC_RELOC:
7925 end = input_line_pointer;
7926 if (*nextcharP != '(')
7928 as_bad ("Expected '('");
7932 ++input_line_pointer;
7934 if (*input_line_pointer != ')')
7936 as_bad ("Missing ')'");
7940 ++input_line_pointer;
7941 if (e->X_op != O_symbol)
7943 if (e->X_op != O_pseudo_fixup)
7945 as_bad ("Not a symbolic expression");
7948 if (idx != FUNC_LT_RELATIVE)
7950 as_bad ("Illegal combination of relocation functions");
7953 switch (S_GET_VALUE (e->X_op_symbol))
7955 case FUNC_FPTR_RELATIVE:
7956 idx = FUNC_LT_FPTR_RELATIVE; break;
7957 case FUNC_DTP_MODULE:
7958 idx = FUNC_LT_DTP_MODULE; break;
7959 case FUNC_DTP_RELATIVE:
7960 idx = FUNC_LT_DTP_RELATIVE; break;
7961 case FUNC_TP_RELATIVE:
7962 idx = FUNC_LT_TP_RELATIVE; break;
7964 as_bad ("Illegal combination of relocation functions");
7968 /* Make sure gas doesn't get rid of local symbols that are used
7970 e->X_op = O_pseudo_fixup;
7971 e->X_op_symbol = pseudo_func[idx].u.sym;
7973 *nextcharP = *input_line_pointer;
7976 case PSEUDO_FUNC_CONST:
7977 e->X_op = O_constant;
7978 e->X_add_number = pseudo_func[idx].u.ival;
7981 case PSEUDO_FUNC_REG:
7982 e->X_op = O_register;
7983 e->X_add_number = pseudo_func[idx].u.ival;
7992 /* first see if NAME is a known register name: */
7993 sym = hash_find (md.reg_hash, name);
7996 e->X_op = O_register;
7997 e->X_add_number = S_GET_VALUE (sym);
8001 cdesc = hash_find (md.const_hash, name);
8004 e->X_op = O_constant;
8005 e->X_add_number = cdesc->value;
8009 /* check for inN, locN, or outN: */
8014 if (name[1] == 'n' && ISDIGIT (name[2]))
8022 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
8030 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
8041 /* Ignore register numbers with leading zeroes, except zero itself. */
8042 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
8044 unsigned long regnum;
8046 /* The name is inN, locN, or outN; parse the register number. */
8047 regnum = strtoul (name + idx, &end, 10);
8048 if (end > name + idx && *end == '\0' && regnum < 96)
8050 if (regnum >= dr->num_regs)
8053 as_bad ("No current frame");
8055 as_bad ("Register number out of range 0..%u",
8059 e->X_op = O_register;
8060 e->X_add_number = dr->base + regnum;
8065 end = alloca (strlen (name) + 1);
8067 name = ia64_canonicalize_symbol_name (end);
8068 if ((dr = hash_find (md.dynreg_hash, name)))
8070 /* We've got ourselves the name of a rotating register set.
8071 Store the base register number in the low 16 bits of
8072 X_add_number and the size of the register set in the top 16
8074 e->X_op = O_register;
8075 e->X_add_number = dr->base | (dr->num_regs << 16);
8081 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8084 ia64_canonicalize_symbol_name (name)
8087 size_t len = strlen (name), full = len;
8089 while (len > 0 && name[len - 1] == '#')
8094 as_bad ("Standalone `#' is illegal");
8096 else if (len < full - 1)
8097 as_warn ("Redundant `#' suffix operators");
8102 /* Return true if idesc is a conditional branch instruction. This excludes
8103 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8104 because they always read/write resources regardless of the value of the
8105 qualifying predicate. br.ia must always use p0, and hence is always
8106 taken. Thus this function returns true for branches which can fall
8107 through, and which use no resources if they do fall through. */
8110 is_conditional_branch (idesc)
8111 struct ia64_opcode *idesc;
8113 /* br is a conditional branch. Everything that starts with br. except
8114 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8115 Everything that starts with brl is a conditional branch. */
8116 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8117 && (idesc->name[2] == '\0'
8118 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8119 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8120 || idesc->name[2] == 'l'
8121 /* br.cond, br.call, br.clr */
8122 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8123 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8124 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
8127 /* Return whether the given opcode is a taken branch. If there's any doubt,
8131 is_taken_branch (idesc)
8132 struct ia64_opcode *idesc;
8134 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
8135 || strncmp (idesc->name, "br.ia", 5) == 0);
8138 /* Return whether the given opcode is an interruption or rfi. If there's any
8139 doubt, returns zero. */
8142 is_interruption_or_rfi (idesc)
8143 struct ia64_opcode *idesc;
8145 if (strcmp (idesc->name, "rfi") == 0)
8150 /* Returns the index of the given dependency in the opcode's list of chks, or
8151 -1 if there is no dependency. */
8154 depends_on (depind, idesc)
8156 struct ia64_opcode *idesc;
8159 const struct ia64_opcode_dependency *dep = idesc->dependencies;
8160 for (i = 0; i < dep->nchks; i++)
8162 if (depind == DEP (dep->chks[i]))
8168 /* Determine a set of specific resources used for a particular resource
8169 class. Returns the number of specific resources identified For those
8170 cases which are not determinable statically, the resource returned is
8173 Meanings of value in 'NOTE':
8174 1) only read/write when the register number is explicitly encoded in the
8176 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8177 accesses CFM when qualifying predicate is in the rotating region.
8178 3) general register value is used to specify an indirect register; not
8179 determinable statically.
8180 4) only read the given resource when bits 7:0 of the indirect index
8181 register value does not match the register number of the resource; not
8182 determinable statically.
8183 5) all rules are implementation specific.
8184 6) only when both the index specified by the reader and the index specified
8185 by the writer have the same value in bits 63:61; not determinable
8187 7) only access the specified resource when the corresponding mask bit is
8189 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8190 only read when these insns reference FR2-31
8191 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8192 written when these insns write FR32-127
8193 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8195 11) The target predicates are written independently of PR[qp], but source
8196 registers are only read if PR[qp] is true. Since the state of PR[qp]
8197 cannot statically be determined, all source registers are marked used.
8198 12) This insn only reads the specified predicate register when that
8199 register is the PR[qp].
8200 13) This reference to ld-c only applies to teh GR whose value is loaded
8201 with data returned from memory, not the post-incremented address register.
8202 14) The RSE resource includes the implementation-specific RSE internal
8203 state resources. At least one (and possibly more) of these resources are
8204 read by each instruction listed in IC:rse-readers. At least one (and
8205 possibly more) of these resources are written by each insn listed in
8207 15+16) Represents reserved instructions, which the assembler does not
8210 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8211 this code; there are no dependency violations based on memory access.
8214 #define MAX_SPECS 256
8219 specify_resource (dep, idesc, type, specs, note, path)
8220 const struct ia64_dependency *dep;
8221 struct ia64_opcode *idesc;
8222 int type; /* is this a DV chk or a DV reg? */
8223 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8224 int note; /* resource note for this insn's usage */
8225 int path; /* which execution path to examine */
8232 if (dep->mode == IA64_DV_WAW
8233 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8234 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8237 /* template for any resources we identify */
8238 tmpl.dependency = dep;
8240 tmpl.insn_srlz = tmpl.data_srlz = 0;
8241 tmpl.qp_regno = CURR_SLOT.qp_regno;
8242 tmpl.link_to_qp_branch = 1;
8243 tmpl.mem_offset.hint = 0;
8244 tmpl.mem_offset.offset = 0;
8245 tmpl.mem_offset.base = 0;
8248 tmpl.cmp_type = CMP_NONE;
8255 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8256 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8257 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8259 /* we don't need to track these */
8260 if (dep->semantics == IA64_DVS_NONE)
8263 switch (dep->specifier)
8268 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8270 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8271 if (regno >= 0 && regno <= 7)
8273 specs[count] = tmpl;
8274 specs[count++].index = regno;
8280 for (i = 0; i < 8; i++)
8282 specs[count] = tmpl;
8283 specs[count++].index = i;
8292 case IA64_RS_AR_UNAT:
8293 /* This is a mov =AR or mov AR= instruction. */
8294 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8296 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8297 if (regno == AR_UNAT)
8299 specs[count++] = tmpl;
8304 /* This is a spill/fill, or other instruction that modifies the
8307 /* Unless we can determine the specific bits used, mark the whole
8308 thing; bits 8:3 of the memory address indicate the bit used in
8309 UNAT. The .mem.offset hint may be used to eliminate a small
8310 subset of conflicts. */
8311 specs[count] = tmpl;
8312 if (md.mem_offset.hint)
8315 fprintf (stderr, " Using hint for spill/fill\n");
8316 /* The index isn't actually used, just set it to something
8317 approximating the bit index. */
8318 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8319 specs[count].mem_offset.hint = 1;
8320 specs[count].mem_offset.offset = md.mem_offset.offset;
8321 specs[count++].mem_offset.base = md.mem_offset.base;
8325 specs[count++].specific = 0;
8333 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8335 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8336 if ((regno >= 8 && regno <= 15)
8337 || (regno >= 20 && regno <= 23)
8338 || (regno >= 31 && regno <= 39)
8339 || (regno >= 41 && regno <= 47)
8340 || (regno >= 67 && regno <= 111))
8342 specs[count] = tmpl;
8343 specs[count++].index = regno;
8356 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8358 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8359 if ((regno >= 48 && regno <= 63)
8360 || (regno >= 112 && regno <= 127))
8362 specs[count] = tmpl;
8363 specs[count++].index = regno;
8369 for (i = 48; i < 64; i++)
8371 specs[count] = tmpl;
8372 specs[count++].index = i;
8374 for (i = 112; i < 128; i++)
8376 specs[count] = tmpl;
8377 specs[count++].index = i;
8395 for (i = 0; i < idesc->num_outputs; i++)
8396 if (idesc->operands[i] == IA64_OPND_B1
8397 || idesc->operands[i] == IA64_OPND_B2)
8399 specs[count] = tmpl;
8400 specs[count++].index =
8401 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8406 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8407 if (idesc->operands[i] == IA64_OPND_B1
8408 || idesc->operands[i] == IA64_OPND_B2)
8410 specs[count] = tmpl;
8411 specs[count++].index =
8412 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8418 case IA64_RS_CPUID: /* four or more registers */
8421 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8423 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8424 if (regno >= 0 && regno < NELEMS (gr_values)
8427 specs[count] = tmpl;
8428 specs[count++].index = gr_values[regno].value & 0xFF;
8432 specs[count] = tmpl;
8433 specs[count++].specific = 0;
8443 case IA64_RS_DBR: /* four or more registers */
8446 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8448 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8449 if (regno >= 0 && regno < NELEMS (gr_values)
8452 specs[count] = tmpl;
8453 specs[count++].index = gr_values[regno].value & 0xFF;
8457 specs[count] = tmpl;
8458 specs[count++].specific = 0;
8462 else if (note == 0 && !rsrc_write)
8464 specs[count] = tmpl;
8465 specs[count++].specific = 0;
8473 case IA64_RS_IBR: /* four or more registers */
8476 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8478 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8479 if (regno >= 0 && regno < NELEMS (gr_values)
8482 specs[count] = tmpl;
8483 specs[count++].index = gr_values[regno].value & 0xFF;
8487 specs[count] = tmpl;
8488 specs[count++].specific = 0;
8501 /* These are implementation specific. Force all references to
8502 conflict with all other references. */
8503 specs[count] = tmpl;
8504 specs[count++].specific = 0;
8512 case IA64_RS_PKR: /* 16 or more registers */
8513 if (note == 3 || note == 4)
8515 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8517 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8518 if (regno >= 0 && regno < NELEMS (gr_values)
8523 specs[count] = tmpl;
8524 specs[count++].index = gr_values[regno].value & 0xFF;
8527 for (i = 0; i < NELEMS (gr_values); i++)
8529 /* Uses all registers *except* the one in R3. */
8530 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8532 specs[count] = tmpl;
8533 specs[count++].index = i;
8539 specs[count] = tmpl;
8540 specs[count++].specific = 0;
8547 specs[count] = tmpl;
8548 specs[count++].specific = 0;
8552 case IA64_RS_PMC: /* four or more registers */
8555 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8556 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8559 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8561 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8562 if (regno >= 0 && regno < NELEMS (gr_values)
8565 specs[count] = tmpl;
8566 specs[count++].index = gr_values[regno].value & 0xFF;
8570 specs[count] = tmpl;
8571 specs[count++].specific = 0;
8581 case IA64_RS_PMD: /* four or more registers */
8584 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8586 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8587 if (regno >= 0 && regno < NELEMS (gr_values)
8590 specs[count] = tmpl;
8591 specs[count++].index = gr_values[regno].value & 0xFF;
8595 specs[count] = tmpl;
8596 specs[count++].specific = 0;
8606 case IA64_RS_RR: /* eight registers */
8609 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8611 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8612 if (regno >= 0 && regno < NELEMS (gr_values)
8615 specs[count] = tmpl;
8616 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8620 specs[count] = tmpl;
8621 specs[count++].specific = 0;
8625 else if (note == 0 && !rsrc_write)
8627 specs[count] = tmpl;
8628 specs[count++].specific = 0;
8636 case IA64_RS_CR_IRR:
8639 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8640 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8642 && idesc->operands[1] == IA64_OPND_CR3
8645 for (i = 0; i < 4; i++)
8647 specs[count] = tmpl;
8648 specs[count++].index = CR_IRR0 + i;
8654 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8655 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8657 && regno <= CR_IRR3)
8659 specs[count] = tmpl;
8660 specs[count++].index = regno;
8669 case IA64_RS_CR_LRR:
8676 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8677 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8678 && (regno == CR_LRR0 || regno == CR_LRR1))
8680 specs[count] = tmpl;
8681 specs[count++].index = regno;
8689 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8691 specs[count] = tmpl;
8692 specs[count++].index =
8693 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8708 else if (rsrc_write)
8710 if (dep->specifier == IA64_RS_FRb
8711 && idesc->operands[0] == IA64_OPND_F1)
8713 specs[count] = tmpl;
8714 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8719 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8721 if (idesc->operands[i] == IA64_OPND_F2
8722 || idesc->operands[i] == IA64_OPND_F3
8723 || idesc->operands[i] == IA64_OPND_F4)
8725 specs[count] = tmpl;
8726 specs[count++].index =
8727 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8736 /* This reference applies only to the GR whose value is loaded with
8737 data returned from memory. */
8738 specs[count] = tmpl;
8739 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8745 for (i = 0; i < idesc->num_outputs; i++)
8746 if (idesc->operands[i] == IA64_OPND_R1
8747 || idesc->operands[i] == IA64_OPND_R2
8748 || idesc->operands[i] == IA64_OPND_R3)
8750 specs[count] = tmpl;
8751 specs[count++].index =
8752 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8754 if (idesc->flags & IA64_OPCODE_POSTINC)
8755 for (i = 0; i < NELEMS (idesc->operands); i++)
8756 if (idesc->operands[i] == IA64_OPND_MR3)
8758 specs[count] = tmpl;
8759 specs[count++].index =
8760 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8765 /* Look for anything that reads a GR. */
8766 for (i = 0; i < NELEMS (idesc->operands); i++)
8768 if (idesc->operands[i] == IA64_OPND_MR3
8769 || idesc->operands[i] == IA64_OPND_CPUID_R3
8770 || idesc->operands[i] == IA64_OPND_DBR_R3
8771 || idesc->operands[i] == IA64_OPND_IBR_R3
8772 || idesc->operands[i] == IA64_OPND_MSR_R3
8773 || idesc->operands[i] == IA64_OPND_PKR_R3
8774 || idesc->operands[i] == IA64_OPND_PMC_R3
8775 || idesc->operands[i] == IA64_OPND_PMD_R3
8776 || idesc->operands[i] == IA64_OPND_RR_R3
8777 || ((i >= idesc->num_outputs)
8778 && (idesc->operands[i] == IA64_OPND_R1
8779 || idesc->operands[i] == IA64_OPND_R2
8780 || idesc->operands[i] == IA64_OPND_R3
8781 /* addl source register. */
8782 || idesc->operands[i] == IA64_OPND_R3_2)))
8784 specs[count] = tmpl;
8785 specs[count++].index =
8786 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8797 /* This is the same as IA64_RS_PRr, except that the register range is
8798 from 1 - 15, and there are no rotating register reads/writes here. */
8802 for (i = 1; i < 16; i++)
8804 specs[count] = tmpl;
8805 specs[count++].index = i;
8811 /* Mark only those registers indicated by the mask. */
8814 mask = CURR_SLOT.opnd[2].X_add_number;
8815 for (i = 1; i < 16; i++)
8816 if (mask & ((valueT) 1 << i))
8818 specs[count] = tmpl;
8819 specs[count++].index = i;
8827 else if (note == 11) /* note 11 implies note 1 as well */
8831 for (i = 0; i < idesc->num_outputs; i++)
8833 if (idesc->operands[i] == IA64_OPND_P1
8834 || idesc->operands[i] == IA64_OPND_P2)
8836 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8837 if (regno >= 1 && regno < 16)
8839 specs[count] = tmpl;
8840 specs[count++].index = regno;
8850 else if (note == 12)
8852 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8854 specs[count] = tmpl;
8855 specs[count++].index = CURR_SLOT.qp_regno;
8862 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8863 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8864 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8865 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8867 if ((idesc->operands[0] == IA64_OPND_P1
8868 || idesc->operands[0] == IA64_OPND_P2)
8869 && p1 >= 1 && p1 < 16)
8871 specs[count] = tmpl;
8872 specs[count].cmp_type =
8873 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8874 specs[count++].index = p1;
8876 if ((idesc->operands[1] == IA64_OPND_P1
8877 || idesc->operands[1] == IA64_OPND_P2)
8878 && p2 >= 1 && p2 < 16)
8880 specs[count] = tmpl;
8881 specs[count].cmp_type =
8882 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8883 specs[count++].index = p2;
8888 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8890 specs[count] = tmpl;
8891 specs[count++].index = CURR_SLOT.qp_regno;
8893 if (idesc->operands[1] == IA64_OPND_PR)
8895 for (i = 1; i < 16; i++)
8897 specs[count] = tmpl;
8898 specs[count++].index = i;
8909 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8910 simplified cases of this. */
8914 for (i = 16; i < 63; i++)
8916 specs[count] = tmpl;
8917 specs[count++].index = i;
8923 /* Mark only those registers indicated by the mask. */
8925 && idesc->operands[0] == IA64_OPND_PR)
8927 mask = CURR_SLOT.opnd[2].X_add_number;
8928 if (mask & ((valueT) 1 << 16))
8929 for (i = 16; i < 63; i++)
8931 specs[count] = tmpl;
8932 specs[count++].index = i;
8936 && idesc->operands[0] == IA64_OPND_PR_ROT)
8938 for (i = 16; i < 63; i++)
8940 specs[count] = tmpl;
8941 specs[count++].index = i;
8949 else if (note == 11) /* note 11 implies note 1 as well */
8953 for (i = 0; i < idesc->num_outputs; i++)
8955 if (idesc->operands[i] == IA64_OPND_P1
8956 || idesc->operands[i] == IA64_OPND_P2)
8958 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8959 if (regno >= 16 && regno < 63)
8961 specs[count] = tmpl;
8962 specs[count++].index = regno;
8972 else if (note == 12)
8974 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8976 specs[count] = tmpl;
8977 specs[count++].index = CURR_SLOT.qp_regno;
8984 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8985 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8986 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8987 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8989 if ((idesc->operands[0] == IA64_OPND_P1
8990 || idesc->operands[0] == IA64_OPND_P2)
8991 && p1 >= 16 && p1 < 63)
8993 specs[count] = tmpl;
8994 specs[count].cmp_type =
8995 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8996 specs[count++].index = p1;
8998 if ((idesc->operands[1] == IA64_OPND_P1
8999 || idesc->operands[1] == IA64_OPND_P2)
9000 && p2 >= 16 && p2 < 63)
9002 specs[count] = tmpl;
9003 specs[count].cmp_type =
9004 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9005 specs[count++].index = p2;
9010 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
9012 specs[count] = tmpl;
9013 specs[count++].index = CURR_SLOT.qp_regno;
9015 if (idesc->operands[1] == IA64_OPND_PR)
9017 for (i = 16; i < 63; i++)
9019 specs[count] = tmpl;
9020 specs[count++].index = i;
9032 /* Verify that the instruction is using the PSR bit indicated in
9036 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9038 if (dep->regindex < 6)
9040 specs[count++] = tmpl;
9043 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9045 if (dep->regindex < 32
9046 || dep->regindex == 35
9047 || dep->regindex == 36
9048 || (!rsrc_write && dep->regindex == PSR_CPL))
9050 specs[count++] = tmpl;
9053 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9055 if (dep->regindex < 32
9056 || dep->regindex == 35
9057 || dep->regindex == 36
9058 || (rsrc_write && dep->regindex == PSR_CPL))
9060 specs[count++] = tmpl;
9065 /* Several PSR bits have very specific dependencies. */
9066 switch (dep->regindex)
9069 specs[count++] = tmpl;
9074 specs[count++] = tmpl;
9078 /* Only certain CR accesses use PSR.ic */
9079 if (idesc->operands[0] == IA64_OPND_CR3
9080 || idesc->operands[1] == IA64_OPND_CR3)
9083 ((idesc->operands[0] == IA64_OPND_CR3)
9086 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9101 specs[count++] = tmpl;
9110 specs[count++] = tmpl;
9114 /* Only some AR accesses use cpl */
9115 if (idesc->operands[0] == IA64_OPND_AR3
9116 || idesc->operands[1] == IA64_OPND_AR3)
9119 ((idesc->operands[0] == IA64_OPND_AR3)
9122 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9129 && regno <= AR_K7))))
9131 specs[count++] = tmpl;
9136 specs[count++] = tmpl;
9146 if (idesc->operands[0] == IA64_OPND_IMMU24)
9148 mask = CURR_SLOT.opnd[0].X_add_number;
9154 if (mask & ((valueT) 1 << dep->regindex))
9156 specs[count++] = tmpl;
9161 int min = dep->regindex == PSR_DFL ? 2 : 32;
9162 int max = dep->regindex == PSR_DFL ? 31 : 127;
9163 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9164 for (i = 0; i < NELEMS (idesc->operands); i++)
9166 if (idesc->operands[i] == IA64_OPND_F1
9167 || idesc->operands[i] == IA64_OPND_F2
9168 || idesc->operands[i] == IA64_OPND_F3
9169 || idesc->operands[i] == IA64_OPND_F4)
9171 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9172 if (reg >= min && reg <= max)
9174 specs[count++] = tmpl;
9181 int min = dep->regindex == PSR_MFL ? 2 : 32;
9182 int max = dep->regindex == PSR_MFL ? 31 : 127;
9183 /* mfh is read on writes to FR32-127; mfl is read on writes to
9185 for (i = 0; i < idesc->num_outputs; i++)
9187 if (idesc->operands[i] == IA64_OPND_F1)
9189 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9190 if (reg >= min && reg <= max)
9192 specs[count++] = tmpl;
9197 else if (note == 10)
9199 for (i = 0; i < NELEMS (idesc->operands); i++)
9201 if (idesc->operands[i] == IA64_OPND_R1
9202 || idesc->operands[i] == IA64_OPND_R2
9203 || idesc->operands[i] == IA64_OPND_R3)
9205 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9206 if (regno >= 16 && regno <= 31)
9208 specs[count++] = tmpl;
9219 case IA64_RS_AR_FPSR:
9220 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
9222 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9223 if (regno == AR_FPSR)
9225 specs[count++] = tmpl;
9230 specs[count++] = tmpl;
9235 /* Handle all AR[REG] resources */
9236 if (note == 0 || note == 1)
9238 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9239 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9240 && regno == dep->regindex)
9242 specs[count++] = tmpl;
9244 /* other AR[REG] resources may be affected by AR accesses */
9245 else if (idesc->operands[0] == IA64_OPND_AR3)
9248 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9249 switch (dep->regindex)
9255 if (regno == AR_BSPSTORE)
9257 specs[count++] = tmpl;
9261 (regno == AR_BSPSTORE
9262 || regno == AR_RNAT))
9264 specs[count++] = tmpl;
9269 else if (idesc->operands[1] == IA64_OPND_AR3)
9272 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9273 switch (dep->regindex)
9278 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9280 specs[count++] = tmpl;
9287 specs[count++] = tmpl;
9297 /* Handle all CR[REG] resources */
9298 if (note == 0 || note == 1)
9300 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9302 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9303 if (regno == dep->regindex)
9305 specs[count++] = tmpl;
9307 else if (!rsrc_write)
9309 /* Reads from CR[IVR] affect other resources. */
9310 if (regno == CR_IVR)
9312 if ((dep->regindex >= CR_IRR0
9313 && dep->regindex <= CR_IRR3)
9314 || dep->regindex == CR_TPR)
9316 specs[count++] = tmpl;
9323 specs[count++] = tmpl;
9332 case IA64_RS_INSERVICE:
9333 /* look for write of EOI (67) or read of IVR (65) */
9334 if ((idesc->operands[0] == IA64_OPND_CR3
9335 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9336 || (idesc->operands[1] == IA64_OPND_CR3
9337 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9339 specs[count++] = tmpl;
9346 specs[count++] = tmpl;
9357 specs[count++] = tmpl;
9361 /* Check if any of the registers accessed are in the rotating region.
9362 mov to/from pr accesses CFM only when qp_regno is in the rotating
9364 for (i = 0; i < NELEMS (idesc->operands); i++)
9366 if (idesc->operands[i] == IA64_OPND_R1
9367 || idesc->operands[i] == IA64_OPND_R2
9368 || idesc->operands[i] == IA64_OPND_R3)
9370 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9371 /* Assumes that md.rot.num_regs is always valid */
9372 if (md.rot.num_regs > 0
9374 && num < 31 + md.rot.num_regs)
9376 specs[count] = tmpl;
9377 specs[count++].specific = 0;
9380 else if (idesc->operands[i] == IA64_OPND_F1
9381 || idesc->operands[i] == IA64_OPND_F2
9382 || idesc->operands[i] == IA64_OPND_F3
9383 || idesc->operands[i] == IA64_OPND_F4)
9385 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9388 specs[count] = tmpl;
9389 specs[count++].specific = 0;
9392 else if (idesc->operands[i] == IA64_OPND_P1
9393 || idesc->operands[i] == IA64_OPND_P2)
9395 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9398 specs[count] = tmpl;
9399 specs[count++].specific = 0;
9403 if (CURR_SLOT.qp_regno > 15)
9405 specs[count] = tmpl;
9406 specs[count++].specific = 0;
9411 /* This is the same as IA64_RS_PRr, except simplified to account for
9412 the fact that there is only one register. */
9416 specs[count++] = tmpl;
9421 if (idesc->operands[2] == IA64_OPND_IMM17)
9422 mask = CURR_SLOT.opnd[2].X_add_number;
9423 if (mask & ((valueT) 1 << 63))
9424 specs[count++] = tmpl;
9426 else if (note == 11)
9428 if ((idesc->operands[0] == IA64_OPND_P1
9429 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9430 || (idesc->operands[1] == IA64_OPND_P2
9431 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9433 specs[count++] = tmpl;
9436 else if (note == 12)
9438 if (CURR_SLOT.qp_regno == 63)
9440 specs[count++] = tmpl;
9447 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9448 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9449 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9450 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9453 && (idesc->operands[0] == IA64_OPND_P1
9454 || idesc->operands[0] == IA64_OPND_P2))
9456 specs[count] = tmpl;
9457 specs[count++].cmp_type =
9458 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9461 && (idesc->operands[1] == IA64_OPND_P1
9462 || idesc->operands[1] == IA64_OPND_P2))
9464 specs[count] = tmpl;
9465 specs[count++].cmp_type =
9466 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9471 if (CURR_SLOT.qp_regno == 63)
9473 specs[count++] = tmpl;
9484 /* FIXME we can identify some individual RSE written resources, but RSE
9485 read resources have not yet been completely identified, so for now
9486 treat RSE as a single resource */
9487 if (strncmp (idesc->name, "mov", 3) == 0)
9491 if (idesc->operands[0] == IA64_OPND_AR3
9492 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9494 specs[count++] = tmpl;
9499 if (idesc->operands[0] == IA64_OPND_AR3)
9501 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9502 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9504 specs[count++] = tmpl;
9507 else if (idesc->operands[1] == IA64_OPND_AR3)
9509 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9510 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9511 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9513 specs[count++] = tmpl;
9520 specs[count++] = tmpl;
9525 /* FIXME -- do any of these need to be non-specific? */
9526 specs[count++] = tmpl;
9530 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9537 /* Clear branch flags on marked resources. This breaks the link between the
9538 QP of the marking instruction and a subsequent branch on the same QP. */
9541 clear_qp_branch_flag (mask)
9545 for (i = 0; i < regdepslen; i++)
9547 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9548 if ((bit & mask) != 0)
9550 regdeps[i].link_to_qp_branch = 0;
9555 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9556 any mutexes which contain one of the PRs and create new ones when
9560 update_qp_mutex (valueT mask)
9566 while (i < qp_mutexeslen)
9568 if ((qp_mutexes[i].prmask & mask) != 0)
9570 /* If it destroys and creates the same mutex, do nothing. */
9571 if (qp_mutexes[i].prmask == mask
9572 && qp_mutexes[i].path == md.path)
9583 fprintf (stderr, " Clearing mutex relation");
9584 print_prmask (qp_mutexes[i].prmask);
9585 fprintf (stderr, "\n");
9588 /* Deal with the old mutex with more than 3+ PRs only if
9589 the new mutex on the same execution path with it.
9591 FIXME: The 3+ mutex support is incomplete.
9592 dot_pred_rel () may be a better place to fix it. */
9593 if (qp_mutexes[i].path == md.path)
9595 /* If it is a proper subset of the mutex, create a
9598 && (qp_mutexes[i].prmask & mask) == mask)
9601 qp_mutexes[i].prmask &= ~mask;
9602 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9604 /* Modify the mutex if there are more than one
9612 /* Remove the mutex. */
9613 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9621 add_qp_mutex (mask);
9626 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9628 Any changes to a PR clears the mutex relations which include that PR. */
9631 clear_qp_mutex (mask)
9637 while (i < qp_mutexeslen)
9639 if ((qp_mutexes[i].prmask & mask) != 0)
9643 fprintf (stderr, " Clearing mutex relation");
9644 print_prmask (qp_mutexes[i].prmask);
9645 fprintf (stderr, "\n");
9647 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9654 /* Clear implies relations which contain PRs in the given masks.
9655 P1_MASK indicates the source of the implies relation, while P2_MASK
9656 indicates the implied PR. */
9659 clear_qp_implies (p1_mask, p2_mask)
9666 while (i < qp_implieslen)
9668 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9669 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9672 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9673 qp_implies[i].p1, qp_implies[i].p2);
9674 qp_implies[i] = qp_implies[--qp_implieslen];
9681 /* Add the PRs specified to the list of implied relations. */
9684 add_qp_imply (p1, p2)
9691 /* p0 is not meaningful here. */
9692 if (p1 == 0 || p2 == 0)
9698 /* If it exists already, ignore it. */
9699 for (i = 0; i < qp_implieslen; i++)
9701 if (qp_implies[i].p1 == p1
9702 && qp_implies[i].p2 == p2
9703 && qp_implies[i].path == md.path
9704 && !qp_implies[i].p2_branched)
9708 if (qp_implieslen == qp_impliestotlen)
9710 qp_impliestotlen += 20;
9711 qp_implies = (struct qp_imply *)
9712 xrealloc ((void *) qp_implies,
9713 qp_impliestotlen * sizeof (struct qp_imply));
9716 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9717 qp_implies[qp_implieslen].p1 = p1;
9718 qp_implies[qp_implieslen].p2 = p2;
9719 qp_implies[qp_implieslen].path = md.path;
9720 qp_implies[qp_implieslen++].p2_branched = 0;
9722 /* Add in the implied transitive relations; for everything that p2 implies,
9723 make p1 imply that, too; for everything that implies p1, make it imply p2
9725 for (i = 0; i < qp_implieslen; i++)
9727 if (qp_implies[i].p1 == p2)
9728 add_qp_imply (p1, qp_implies[i].p2);
9729 if (qp_implies[i].p2 == p1)
9730 add_qp_imply (qp_implies[i].p1, p2);
9732 /* Add in mutex relations implied by this implies relation; for each mutex
9733 relation containing p2, duplicate it and replace p2 with p1. */
9734 bit = (valueT) 1 << p1;
9735 mask = (valueT) 1 << p2;
9736 for (i = 0; i < qp_mutexeslen; i++)
9738 if (qp_mutexes[i].prmask & mask)
9739 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9743 /* Add the PRs specified in the mask to the mutex list; this means that only
9744 one of the PRs can be true at any time. PR0 should never be included in
9754 if (qp_mutexeslen == qp_mutexestotlen)
9756 qp_mutexestotlen += 20;
9757 qp_mutexes = (struct qpmutex *)
9758 xrealloc ((void *) qp_mutexes,
9759 qp_mutexestotlen * sizeof (struct qpmutex));
9763 fprintf (stderr, " Registering mutex on");
9764 print_prmask (mask);
9765 fprintf (stderr, "\n");
9767 qp_mutexes[qp_mutexeslen].path = md.path;
9768 qp_mutexes[qp_mutexeslen++].prmask = mask;
9772 has_suffix_p (name, suffix)
9776 size_t namelen = strlen (name);
9777 size_t sufflen = strlen (suffix);
9779 if (namelen <= sufflen)
9781 return strcmp (name + namelen - sufflen, suffix) == 0;
9785 clear_register_values ()
9789 fprintf (stderr, " Clearing register values\n");
9790 for (i = 1; i < NELEMS (gr_values); i++)
9791 gr_values[i].known = 0;
9794 /* Keep track of register values/changes which affect DV tracking.
9796 optimization note: should add a flag to classes of insns where otherwise we
9797 have to examine a group of strings to identify them. */
9800 note_register_values (idesc)
9801 struct ia64_opcode *idesc;
9803 valueT qp_changemask = 0;
9806 /* Invalidate values for registers being written to. */
9807 for (i = 0; i < idesc->num_outputs; i++)
9809 if (idesc->operands[i] == IA64_OPND_R1
9810 || idesc->operands[i] == IA64_OPND_R2
9811 || idesc->operands[i] == IA64_OPND_R3)
9813 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9814 if (regno > 0 && regno < NELEMS (gr_values))
9815 gr_values[regno].known = 0;
9817 else if (idesc->operands[i] == IA64_OPND_R3_2)
9819 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9820 if (regno > 0 && regno < 4)
9821 gr_values[regno].known = 0;
9823 else if (idesc->operands[i] == IA64_OPND_P1
9824 || idesc->operands[i] == IA64_OPND_P2)
9826 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9827 qp_changemask |= (valueT) 1 << regno;
9829 else if (idesc->operands[i] == IA64_OPND_PR)
9831 if (idesc->operands[2] & (valueT) 0x10000)
9832 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9834 qp_changemask = idesc->operands[2];
9837 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9839 if (idesc->operands[1] & ((valueT) 1 << 43))
9840 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9842 qp_changemask = idesc->operands[1];
9843 qp_changemask &= ~(valueT) 0xFFFF;
9848 /* Always clear qp branch flags on any PR change. */
9849 /* FIXME there may be exceptions for certain compares. */
9850 clear_qp_branch_flag (qp_changemask);
9852 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9853 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9855 qp_changemask |= ~(valueT) 0xFFFF;
9856 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9858 for (i = 32; i < 32 + md.rot.num_regs; i++)
9859 gr_values[i].known = 0;
9861 clear_qp_mutex (qp_changemask);
9862 clear_qp_implies (qp_changemask, qp_changemask);
9864 /* After a call, all register values are undefined, except those marked
9866 else if (strncmp (idesc->name, "br.call", 6) == 0
9867 || strncmp (idesc->name, "brl.call", 7) == 0)
9869 /* FIXME keep GR values which are marked as "safe_across_calls" */
9870 clear_register_values ();
9871 clear_qp_mutex (~qp_safe_across_calls);
9872 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9873 clear_qp_branch_flag (~qp_safe_across_calls);
9875 else if (is_interruption_or_rfi (idesc)
9876 || is_taken_branch (idesc))
9878 clear_register_values ();
9879 clear_qp_mutex (~(valueT) 0);
9880 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9882 /* Look for mutex and implies relations. */
9883 else if ((idesc->operands[0] == IA64_OPND_P1
9884 || idesc->operands[0] == IA64_OPND_P2)
9885 && (idesc->operands[1] == IA64_OPND_P1
9886 || idesc->operands[1] == IA64_OPND_P2))
9888 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9889 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9890 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9891 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9893 /* If both PRs are PR0, we can't really do anything. */
9894 if (p1 == 0 && p2 == 0)
9897 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9899 /* In general, clear mutexes and implies which include P1 or P2,
9900 with the following exceptions. */
9901 else if (has_suffix_p (idesc->name, ".or.andcm")
9902 || has_suffix_p (idesc->name, ".and.orcm"))
9904 clear_qp_implies (p2mask, p1mask);
9906 else if (has_suffix_p (idesc->name, ".andcm")
9907 || has_suffix_p (idesc->name, ".and"))
9909 clear_qp_implies (0, p1mask | p2mask);
9911 else if (has_suffix_p (idesc->name, ".orcm")
9912 || has_suffix_p (idesc->name, ".or"))
9914 clear_qp_mutex (p1mask | p2mask);
9915 clear_qp_implies (p1mask | p2mask, 0);
9921 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9923 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9924 if (p1 == 0 || p2 == 0)
9925 clear_qp_mutex (p1mask | p2mask);
9927 added = update_qp_mutex (p1mask | p2mask);
9929 if (CURR_SLOT.qp_regno == 0
9930 || has_suffix_p (idesc->name, ".unc"))
9932 if (added == 0 && p1 && p2)
9933 add_qp_mutex (p1mask | p2mask);
9934 if (CURR_SLOT.qp_regno != 0)
9937 add_qp_imply (p1, CURR_SLOT.qp_regno);
9939 add_qp_imply (p2, CURR_SLOT.qp_regno);
9944 /* Look for mov imm insns into GRs. */
9945 else if (idesc->operands[0] == IA64_OPND_R1
9946 && (idesc->operands[1] == IA64_OPND_IMM22
9947 || idesc->operands[1] == IA64_OPND_IMMU64)
9948 && CURR_SLOT.opnd[1].X_op == O_constant
9949 && (strcmp (idesc->name, "mov") == 0
9950 || strcmp (idesc->name, "movl") == 0))
9952 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9953 if (regno > 0 && regno < NELEMS (gr_values))
9955 gr_values[regno].known = 1;
9956 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9957 gr_values[regno].path = md.path;
9960 fprintf (stderr, " Know gr%d = ", regno);
9961 fprintf_vma (stderr, gr_values[regno].value);
9962 fputs ("\n", stderr);
9966 /* Look for dep.z imm insns. */
9967 else if (idesc->operands[0] == IA64_OPND_R1
9968 && idesc->operands[1] == IA64_OPND_IMM8
9969 && strcmp (idesc->name, "dep.z") == 0)
9971 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9972 if (regno > 0 && regno < NELEMS (gr_values))
9974 valueT value = CURR_SLOT.opnd[1].X_add_number;
9976 if (CURR_SLOT.opnd[3].X_add_number < 64)
9977 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
9978 value <<= CURR_SLOT.opnd[2].X_add_number;
9979 gr_values[regno].known = 1;
9980 gr_values[regno].value = value;
9981 gr_values[regno].path = md.path;
9984 fprintf (stderr, " Know gr%d = ", regno);
9985 fprintf_vma (stderr, gr_values[regno].value);
9986 fputs ("\n", stderr);
9992 clear_qp_mutex (qp_changemask);
9993 clear_qp_implies (qp_changemask, qp_changemask);
9997 /* Return whether the given predicate registers are currently mutex. */
10000 qp_mutex (p1, p2, path)
10010 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10011 for (i = 0; i < qp_mutexeslen; i++)
10013 if (qp_mutexes[i].path >= path
10014 && (qp_mutexes[i].prmask & mask) == mask)
10021 /* Return whether the given resource is in the given insn's list of chks
10022 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10026 resources_match (rs, idesc, note, qp_regno, path)
10028 struct ia64_opcode *idesc;
10033 struct rsrc specs[MAX_SPECS];
10036 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10037 we don't need to check. One exception is note 11, which indicates that
10038 target predicates are written regardless of PR[qp]. */
10039 if (qp_mutex (rs->qp_regno, qp_regno, path)
10043 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10044 while (count-- > 0)
10046 /* UNAT checking is a bit more specific than other resources */
10047 if (rs->dependency->specifier == IA64_RS_AR_UNAT
10048 && specs[count].mem_offset.hint
10049 && rs->mem_offset.hint)
10051 if (rs->mem_offset.base == specs[count].mem_offset.base)
10053 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10054 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10061 /* Skip apparent PR write conflicts where both writes are an AND or both
10062 writes are an OR. */
10063 if (rs->dependency->specifier == IA64_RS_PR
10064 || rs->dependency->specifier == IA64_RS_PRr
10065 || rs->dependency->specifier == IA64_RS_PR63)
10067 if (specs[count].cmp_type != CMP_NONE
10068 && specs[count].cmp_type == rs->cmp_type)
10071 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10072 dv_mode[rs->dependency->mode],
10073 rs->dependency->specifier != IA64_RS_PR63 ?
10074 specs[count].index : 63);
10079 " %s on parallel compare conflict %s vs %s on PR%d\n",
10080 dv_mode[rs->dependency->mode],
10081 dv_cmp_type[rs->cmp_type],
10082 dv_cmp_type[specs[count].cmp_type],
10083 rs->dependency->specifier != IA64_RS_PR63 ?
10084 specs[count].index : 63);
10088 /* If either resource is not specific, conservatively assume a conflict
10090 if (!specs[count].specific || !rs->specific)
10092 else if (specs[count].index == rs->index)
10099 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10100 insert a stop to create the break. Update all resource dependencies
10101 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10102 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10103 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10107 insn_group_break (insert_stop, qp_regno, save_current)
10114 if (insert_stop && md.num_slots_in_use > 0)
10115 PREV_SLOT.end_of_insn_group = 1;
10119 fprintf (stderr, " Insn group break%s",
10120 (insert_stop ? " (w/stop)" : ""));
10122 fprintf (stderr, " effective for QP=%d", qp_regno);
10123 fprintf (stderr, "\n");
10127 while (i < regdepslen)
10129 const struct ia64_dependency *dep = regdeps[i].dependency;
10132 && regdeps[i].qp_regno != qp_regno)
10139 && CURR_SLOT.src_file == regdeps[i].file
10140 && CURR_SLOT.src_line == regdeps[i].line)
10146 /* clear dependencies which are automatically cleared by a stop, or
10147 those that have reached the appropriate state of insn serialization */
10148 if (dep->semantics == IA64_DVS_IMPLIED
10149 || dep->semantics == IA64_DVS_IMPLIEDF
10150 || regdeps[i].insn_srlz == STATE_SRLZ)
10152 print_dependency ("Removing", i);
10153 regdeps[i] = regdeps[--regdepslen];
10157 if (dep->semantics == IA64_DVS_DATA
10158 || dep->semantics == IA64_DVS_INSTR
10159 || dep->semantics == IA64_DVS_SPECIFIC)
10161 if (regdeps[i].insn_srlz == STATE_NONE)
10162 regdeps[i].insn_srlz = STATE_STOP;
10163 if (regdeps[i].data_srlz == STATE_NONE)
10164 regdeps[i].data_srlz = STATE_STOP;
10171 /* Add the given resource usage spec to the list of active dependencies. */
10174 mark_resource (idesc, dep, spec, depind, path)
10175 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10176 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
10181 if (regdepslen == regdepstotlen)
10183 regdepstotlen += 20;
10184 regdeps = (struct rsrc *)
10185 xrealloc ((void *) regdeps,
10186 regdepstotlen * sizeof (struct rsrc));
10189 regdeps[regdepslen] = *spec;
10190 regdeps[regdepslen].depind = depind;
10191 regdeps[regdepslen].path = path;
10192 regdeps[regdepslen].file = CURR_SLOT.src_file;
10193 regdeps[regdepslen].line = CURR_SLOT.src_line;
10195 print_dependency ("Adding", regdepslen);
10201 print_dependency (action, depind)
10202 const char *action;
10207 fprintf (stderr, " %s %s '%s'",
10208 action, dv_mode[(regdeps[depind].dependency)->mode],
10209 (regdeps[depind].dependency)->name);
10210 if (regdeps[depind].specific && regdeps[depind].index >= 0)
10211 fprintf (stderr, " (%d)", regdeps[depind].index);
10212 if (regdeps[depind].mem_offset.hint)
10214 fputs (" ", stderr);
10215 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10216 fputs ("+", stderr);
10217 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10219 fprintf (stderr, "\n");
10224 instruction_serialization ()
10228 fprintf (stderr, " Instruction serialization\n");
10229 for (i = 0; i < regdepslen; i++)
10230 if (regdeps[i].insn_srlz == STATE_STOP)
10231 regdeps[i].insn_srlz = STATE_SRLZ;
10235 data_serialization ()
10239 fprintf (stderr, " Data serialization\n");
10240 while (i < regdepslen)
10242 if (regdeps[i].data_srlz == STATE_STOP
10243 /* Note: as of 991210, all "other" dependencies are cleared by a
10244 data serialization. This might change with new tables */
10245 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10247 print_dependency ("Removing", i);
10248 regdeps[i] = regdeps[--regdepslen];
10255 /* Insert stops and serializations as needed to avoid DVs. */
10258 remove_marked_resource (rs)
10261 switch (rs->dependency->semantics)
10263 case IA64_DVS_SPECIFIC:
10265 fprintf (stderr, "Implementation-specific, assume worst case...\n");
10266 /* ...fall through... */
10267 case IA64_DVS_INSTR:
10269 fprintf (stderr, "Inserting instr serialization\n");
10270 if (rs->insn_srlz < STATE_STOP)
10271 insn_group_break (1, 0, 0);
10272 if (rs->insn_srlz < STATE_SRLZ)
10274 struct slot oldslot = CURR_SLOT;
10275 /* Manually jam a srlz.i insn into the stream */
10276 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10277 CURR_SLOT.user_template = -1;
10278 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10279 instruction_serialization ();
10280 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10281 if (++md.num_slots_in_use >= NUM_SLOTS)
10282 emit_one_bundle ();
10283 CURR_SLOT = oldslot;
10285 insn_group_break (1, 0, 0);
10287 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
10288 "other" types of DV are eliminated
10289 by a data serialization */
10290 case IA64_DVS_DATA:
10292 fprintf (stderr, "Inserting data serialization\n");
10293 if (rs->data_srlz < STATE_STOP)
10294 insn_group_break (1, 0, 0);
10296 struct slot oldslot = CURR_SLOT;
10297 /* Manually jam a srlz.d insn into the stream */
10298 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10299 CURR_SLOT.user_template = -1;
10300 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10301 data_serialization ();
10302 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10303 if (++md.num_slots_in_use >= NUM_SLOTS)
10304 emit_one_bundle ();
10305 CURR_SLOT = oldslot;
10308 case IA64_DVS_IMPLIED:
10309 case IA64_DVS_IMPLIEDF:
10311 fprintf (stderr, "Inserting stop\n");
10312 insn_group_break (1, 0, 0);
10319 /* Check the resources used by the given opcode against the current dependency
10322 The check is run once for each execution path encountered. In this case,
10323 a unique execution path is the sequence of instructions following a code
10324 entry point, e.g. the following has three execution paths, one starting
10325 at L0, one at L1, and one at L2.
10334 check_dependencies (idesc)
10335 struct ia64_opcode *idesc;
10337 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10341 /* Note that the number of marked resources may change within the
10342 loop if in auto mode. */
10344 while (i < regdepslen)
10346 struct rsrc *rs = ®deps[i];
10347 const struct ia64_dependency *dep = rs->dependency;
10350 int start_over = 0;
10352 if (dep->semantics == IA64_DVS_NONE
10353 || (chkind = depends_on (rs->depind, idesc)) == -1)
10359 note = NOTE (opdeps->chks[chkind]);
10361 /* Check this resource against each execution path seen thus far. */
10362 for (path = 0; path <= md.path; path++)
10366 /* If the dependency wasn't on the path being checked, ignore it. */
10367 if (rs->path < path)
10370 /* If the QP for this insn implies a QP which has branched, don't
10371 bother checking. Ed. NOTE: I don't think this check is terribly
10372 useful; what's the point of generating code which will only be
10373 reached if its QP is zero?
10374 This code was specifically inserted to handle the following code,
10375 based on notes from Intel's DV checking code, where p1 implies p2.
10381 if (CURR_SLOT.qp_regno != 0)
10385 for (implies = 0; implies < qp_implieslen; implies++)
10387 if (qp_implies[implies].path >= path
10388 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10389 && qp_implies[implies].p2_branched)
10399 if ((matchtype = resources_match (rs, idesc, note,
10400 CURR_SLOT.qp_regno, path)) != 0)
10403 char pathmsg[256] = "";
10404 char indexmsg[256] = "";
10405 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10408 sprintf (pathmsg, " when entry is at label '%s'",
10409 md.entry_labels[path - 1]);
10410 if (matchtype == 1 && rs->index >= 0)
10411 sprintf (indexmsg, ", specific resource number is %d",
10413 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10415 (certain ? "violates" : "may violate"),
10416 dv_mode[dep->mode], dep->name,
10417 dv_sem[dep->semantics],
10418 pathmsg, indexmsg);
10420 if (md.explicit_mode)
10422 as_warn ("%s", msg);
10423 if (path < md.path)
10424 as_warn (_("Only the first path encountering the conflict "
10426 as_warn_where (rs->file, rs->line,
10427 _("This is the location of the "
10428 "conflicting usage"));
10429 /* Don't bother checking other paths, to avoid duplicating
10430 the same warning */
10436 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10438 remove_marked_resource (rs);
10440 /* since the set of dependencies has changed, start over */
10441 /* FIXME -- since we're removing dvs as we go, we
10442 probably don't really need to start over... */
10455 /* Register new dependencies based on the given opcode. */
10458 mark_resources (idesc)
10459 struct ia64_opcode *idesc;
10462 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10463 int add_only_qp_reads = 0;
10465 /* A conditional branch only uses its resources if it is taken; if it is
10466 taken, we stop following that path. The other branch types effectively
10467 *always* write their resources. If it's not taken, register only QP
10469 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10471 add_only_qp_reads = 1;
10475 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10477 for (i = 0; i < opdeps->nregs; i++)
10479 const struct ia64_dependency *dep;
10480 struct rsrc specs[MAX_SPECS];
10485 dep = ia64_find_dependency (opdeps->regs[i]);
10486 note = NOTE (opdeps->regs[i]);
10488 if (add_only_qp_reads
10489 && !(dep->mode == IA64_DV_WAR
10490 && (dep->specifier == IA64_RS_PR
10491 || dep->specifier == IA64_RS_PRr
10492 || dep->specifier == IA64_RS_PR63)))
10495 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10497 while (count-- > 0)
10499 mark_resource (idesc, dep, &specs[count],
10500 DEP (opdeps->regs[i]), md.path);
10503 /* The execution path may affect register values, which may in turn
10504 affect which indirect-access resources are accessed. */
10505 switch (dep->specifier)
10509 case IA64_RS_CPUID:
10517 for (path = 0; path < md.path; path++)
10519 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10520 while (count-- > 0)
10521 mark_resource (idesc, dep, &specs[count],
10522 DEP (opdeps->regs[i]), path);
10529 /* Remove dependencies when they no longer apply. */
10532 update_dependencies (idesc)
10533 struct ia64_opcode *idesc;
10537 if (strcmp (idesc->name, "srlz.i") == 0)
10539 instruction_serialization ();
10541 else if (strcmp (idesc->name, "srlz.d") == 0)
10543 data_serialization ();
10545 else if (is_interruption_or_rfi (idesc)
10546 || is_taken_branch (idesc))
10548 /* Although technically the taken branch doesn't clear dependencies
10549 which require a srlz.[id], we don't follow the branch; the next
10550 instruction is assumed to start with a clean slate. */
10554 else if (is_conditional_branch (idesc)
10555 && CURR_SLOT.qp_regno != 0)
10557 int is_call = strstr (idesc->name, ".call") != NULL;
10559 for (i = 0; i < qp_implieslen; i++)
10561 /* If the conditional branch's predicate is implied by the predicate
10562 in an existing dependency, remove that dependency. */
10563 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10566 /* Note that this implied predicate takes a branch so that if
10567 a later insn generates a DV but its predicate implies this
10568 one, we can avoid the false DV warning. */
10569 qp_implies[i].p2_branched = 1;
10570 while (depind < regdepslen)
10572 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10574 print_dependency ("Removing", depind);
10575 regdeps[depind] = regdeps[--regdepslen];
10582 /* Any marked resources which have this same predicate should be
10583 cleared, provided that the QP hasn't been modified between the
10584 marking instruction and the branch. */
10587 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10592 while (i < regdepslen)
10594 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10595 && regdeps[i].link_to_qp_branch
10596 && (regdeps[i].file != CURR_SLOT.src_file
10597 || regdeps[i].line != CURR_SLOT.src_line))
10599 /* Treat like a taken branch */
10600 print_dependency ("Removing", i);
10601 regdeps[i] = regdeps[--regdepslen];
10610 /* Examine the current instruction for dependency violations. */
10614 struct ia64_opcode *idesc;
10618 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10619 idesc->name, CURR_SLOT.src_line,
10620 idesc->dependencies->nchks,
10621 idesc->dependencies->nregs);
10624 /* Look through the list of currently marked resources; if the current
10625 instruction has the dependency in its chks list which uses that resource,
10626 check against the specific resources used. */
10627 check_dependencies (idesc);
10629 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10630 then add them to the list of marked resources. */
10631 mark_resources (idesc);
10633 /* There are several types of dependency semantics, and each has its own
10634 requirements for being cleared
10636 Instruction serialization (insns separated by interruption, rfi, or
10637 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10639 Data serialization (instruction serialization, or writer + srlz.d +
10640 reader, where writer and srlz.d are in separate groups) clears
10641 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10642 always be the case).
10644 Instruction group break (groups separated by stop, taken branch,
10645 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10647 update_dependencies (idesc);
10649 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10650 warning. Keep track of as many as possible that are useful. */
10651 note_register_values (idesc);
10653 /* We don't need or want this anymore. */
10654 md.mem_offset.hint = 0;
10659 /* Translate one line of assembly. Pseudo ops and labels do not show
10665 char *saved_input_line_pointer, *mnemonic;
10666 const struct pseudo_opcode *pdesc;
10667 struct ia64_opcode *idesc;
10668 unsigned char qp_regno;
10669 unsigned int flags;
10672 saved_input_line_pointer = input_line_pointer;
10673 input_line_pointer = str;
10675 /* extract the opcode (mnemonic): */
10677 mnemonic = input_line_pointer;
10678 ch = get_symbol_end ();
10679 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10682 *input_line_pointer = ch;
10683 (*pdesc->handler) (pdesc->arg);
10687 /* Find the instruction descriptor matching the arguments. */
10689 idesc = ia64_find_opcode (mnemonic);
10690 *input_line_pointer = ch;
10693 as_bad ("Unknown opcode `%s'", mnemonic);
10697 idesc = parse_operands (idesc);
10701 /* Handle the dynamic ops we can handle now: */
10702 if (idesc->type == IA64_TYPE_DYN)
10704 if (strcmp (idesc->name, "add") == 0)
10706 if (CURR_SLOT.opnd[2].X_op == O_register
10707 && CURR_SLOT.opnd[2].X_add_number < 4)
10711 ia64_free_opcode (idesc);
10712 idesc = ia64_find_opcode (mnemonic);
10714 else if (strcmp (idesc->name, "mov") == 0)
10716 enum ia64_opnd opnd1, opnd2;
10719 opnd1 = idesc->operands[0];
10720 opnd2 = idesc->operands[1];
10721 if (opnd1 == IA64_OPND_AR3)
10723 else if (opnd2 == IA64_OPND_AR3)
10727 if (CURR_SLOT.opnd[rop].X_op == O_register)
10729 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10730 mnemonic = "mov.i";
10731 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10732 mnemonic = "mov.m";
10740 ia64_free_opcode (idesc);
10741 idesc = ia64_find_opcode (mnemonic);
10742 while (idesc != NULL
10743 && (idesc->operands[0] != opnd1
10744 || idesc->operands[1] != opnd2))
10745 idesc = get_next_opcode (idesc);
10749 else if (strcmp (idesc->name, "mov.i") == 0
10750 || strcmp (idesc->name, "mov.m") == 0)
10752 enum ia64_opnd opnd1, opnd2;
10755 opnd1 = idesc->operands[0];
10756 opnd2 = idesc->operands[1];
10757 if (opnd1 == IA64_OPND_AR3)
10759 else if (opnd2 == IA64_OPND_AR3)
10763 if (CURR_SLOT.opnd[rop].X_op == O_register)
10766 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10768 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10770 if (unit != 'a' && unit != idesc->name [4])
10771 as_bad ("AR %d can only be accessed by %c-unit",
10772 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10776 else if (strcmp (idesc->name, "hint.b") == 0)
10782 case hint_b_warning:
10783 as_warn ("hint.b may be treated as nop");
10786 as_bad ("hint.b shouldn't be used");
10792 if (md.qp.X_op == O_register)
10794 qp_regno = md.qp.X_add_number - REG_P;
10795 md.qp.X_op = O_absent;
10798 flags = idesc->flags;
10800 if ((flags & IA64_OPCODE_FIRST) != 0)
10802 /* The alignment frag has to end with a stop bit only if the
10803 next instruction after the alignment directive has to be
10804 the first instruction in an instruction group. */
10807 while (align_frag->fr_type != rs_align_code)
10809 align_frag = align_frag->fr_next;
10813 /* align_frag can be NULL if there are directives in
10815 if (align_frag && align_frag->fr_next == frag_now)
10816 align_frag->tc_frag_data = 1;
10819 insn_group_break (1, 0, 0);
10823 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10825 as_bad ("`%s' cannot be predicated", idesc->name);
10829 /* Build the instruction. */
10830 CURR_SLOT.qp_regno = qp_regno;
10831 CURR_SLOT.idesc = idesc;
10832 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10833 dwarf2_where (&CURR_SLOT.debug_line);
10835 /* Add unwind entry, if there is one. */
10836 if (unwind.current_entry)
10838 CURR_SLOT.unwind_record = unwind.current_entry;
10839 unwind.current_entry = NULL;
10841 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
10844 /* Check for dependency violations. */
10848 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10849 if (++md.num_slots_in_use >= NUM_SLOTS)
10850 emit_one_bundle ();
10852 if ((flags & IA64_OPCODE_LAST) != 0)
10853 insn_group_break (1, 0, 0);
10855 md.last_text_seg = now_seg;
10858 input_line_pointer = saved_input_line_pointer;
10861 /* Called when symbol NAME cannot be found in the symbol table.
10862 Should be used for dynamic valued symbols only. */
10865 md_undefined_symbol (name)
10866 char *name ATTRIBUTE_UNUSED;
10871 /* Called for any expression that can not be recognized. When the
10872 function is called, `input_line_pointer' will point to the start of
10879 switch (*input_line_pointer)
10882 ++input_line_pointer;
10884 if (*input_line_pointer != ']')
10886 as_bad ("Closing bracket missing");
10891 if (e->X_op != O_register)
10892 as_bad ("Register expected as index");
10894 ++input_line_pointer;
10905 ignore_rest_of_line ();
10908 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10909 a section symbol plus some offset. For relocs involving @fptr(),
10910 directives we don't want such adjustments since we need to have the
10911 original symbol's name in the reloc. */
10913 ia64_fix_adjustable (fix)
10916 /* Prevent all adjustments to global symbols */
10917 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10920 switch (fix->fx_r_type)
10922 case BFD_RELOC_IA64_FPTR64I:
10923 case BFD_RELOC_IA64_FPTR32MSB:
10924 case BFD_RELOC_IA64_FPTR32LSB:
10925 case BFD_RELOC_IA64_FPTR64MSB:
10926 case BFD_RELOC_IA64_FPTR64LSB:
10927 case BFD_RELOC_IA64_LTOFF_FPTR22:
10928 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10938 ia64_force_relocation (fix)
10941 switch (fix->fx_r_type)
10943 case BFD_RELOC_IA64_FPTR64I:
10944 case BFD_RELOC_IA64_FPTR32MSB:
10945 case BFD_RELOC_IA64_FPTR32LSB:
10946 case BFD_RELOC_IA64_FPTR64MSB:
10947 case BFD_RELOC_IA64_FPTR64LSB:
10949 case BFD_RELOC_IA64_LTOFF22:
10950 case BFD_RELOC_IA64_LTOFF64I:
10951 case BFD_RELOC_IA64_LTOFF_FPTR22:
10952 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10953 case BFD_RELOC_IA64_PLTOFF22:
10954 case BFD_RELOC_IA64_PLTOFF64I:
10955 case BFD_RELOC_IA64_PLTOFF64MSB:
10956 case BFD_RELOC_IA64_PLTOFF64LSB:
10958 case BFD_RELOC_IA64_LTOFF22X:
10959 case BFD_RELOC_IA64_LDXMOV:
10966 return generic_force_reloc (fix);
10969 /* Decide from what point a pc-relative relocation is relative to,
10970 relative to the pc-relative fixup. Er, relatively speaking. */
10972 ia64_pcrel_from_section (fix, sec)
10976 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10978 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10985 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10987 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10991 expr.X_op = O_pseudo_fixup;
10992 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10993 expr.X_add_number = 0;
10994 expr.X_add_symbol = symbol;
10995 emit_expr (&expr, size);
10998 /* This is called whenever some data item (not an instruction) needs a
10999 fixup. We pick the right reloc code depending on the byteorder
11000 currently in effect. */
11002 ia64_cons_fix_new (f, where, nbytes, exp)
11008 bfd_reloc_code_real_type code;
11013 /* There are no reloc for 8 and 16 bit quantities, but we allow
11014 them here since they will work fine as long as the expression
11015 is fully defined at the end of the pass over the source file. */
11016 case 1: code = BFD_RELOC_8; break;
11017 case 2: code = BFD_RELOC_16; break;
11019 if (target_big_endian)
11020 code = BFD_RELOC_IA64_DIR32MSB;
11022 code = BFD_RELOC_IA64_DIR32LSB;
11026 /* In 32-bit mode, data8 could mean function descriptors too. */
11027 if (exp->X_op == O_pseudo_fixup
11028 && exp->X_op_symbol
11029 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11030 && !(md.flags & EF_IA_64_ABI64))
11032 if (target_big_endian)
11033 code = BFD_RELOC_IA64_IPLTMSB;
11035 code = BFD_RELOC_IA64_IPLTLSB;
11036 exp->X_op = O_symbol;
11041 if (target_big_endian)
11042 code = BFD_RELOC_IA64_DIR64MSB;
11044 code = BFD_RELOC_IA64_DIR64LSB;
11049 if (exp->X_op == O_pseudo_fixup
11050 && exp->X_op_symbol
11051 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11053 if (target_big_endian)
11054 code = BFD_RELOC_IA64_IPLTMSB;
11056 code = BFD_RELOC_IA64_IPLTLSB;
11057 exp->X_op = O_symbol;
11063 as_bad ("Unsupported fixup size %d", nbytes);
11064 ignore_rest_of_line ();
11068 if (exp->X_op == O_pseudo_fixup)
11070 exp->X_op = O_symbol;
11071 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
11072 /* ??? If code unchanged, unsupported. */
11075 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11076 /* We need to store the byte order in effect in case we're going
11077 to fix an 8 or 16 bit relocation (for which there no real
11078 relocs available). See md_apply_fix(). */
11079 fix->tc_fix_data.bigendian = target_big_endian;
11082 /* Return the actual relocation we wish to associate with the pseudo
11083 reloc described by SYM and R_TYPE. SYM should be one of the
11084 symbols in the pseudo_func array, or NULL. */
11086 static bfd_reloc_code_real_type
11087 ia64_gen_real_reloc_type (sym, r_type)
11088 struct symbol *sym;
11089 bfd_reloc_code_real_type r_type;
11091 bfd_reloc_code_real_type new = 0;
11092 const char *type = NULL, *suffix = "";
11099 switch (S_GET_VALUE (sym))
11101 case FUNC_FPTR_RELATIVE:
11104 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11105 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11106 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11107 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11108 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
11109 default: type = "FPTR"; break;
11113 case FUNC_GP_RELATIVE:
11116 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11117 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11118 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11119 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11120 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11121 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
11122 default: type = "GPREL"; break;
11126 case FUNC_LT_RELATIVE:
11129 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11130 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
11131 default: type = "LTOFF"; break;
11135 case FUNC_LT_RELATIVE_X:
11138 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
11139 default: type = "LTOFF"; suffix = "X"; break;
11143 case FUNC_PC_RELATIVE:
11146 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11147 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11148 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11149 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11150 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11151 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
11152 default: type = "PCREL"; break;
11156 case FUNC_PLT_RELATIVE:
11159 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11160 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11161 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11162 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
11163 default: type = "PLTOFF"; break;
11167 case FUNC_SEC_RELATIVE:
11170 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11171 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11172 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11173 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
11174 default: type = "SECREL"; break;
11178 case FUNC_SEG_RELATIVE:
11181 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11182 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11183 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11184 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
11185 default: type = "SEGREL"; break;
11189 case FUNC_LTV_RELATIVE:
11192 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11193 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11194 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11195 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
11196 default: type = "LTV"; break;
11200 case FUNC_LT_FPTR_RELATIVE:
11203 case BFD_RELOC_IA64_IMM22:
11204 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11205 case BFD_RELOC_IA64_IMM64:
11206 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
11207 case BFD_RELOC_IA64_DIR32MSB:
11208 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11209 case BFD_RELOC_IA64_DIR32LSB:
11210 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11211 case BFD_RELOC_IA64_DIR64MSB:
11212 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11213 case BFD_RELOC_IA64_DIR64LSB:
11214 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
11216 type = "LTOFF_FPTR"; break;
11220 case FUNC_TP_RELATIVE:
11223 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11224 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11225 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11226 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11227 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11228 default: type = "TPREL"; break;
11232 case FUNC_LT_TP_RELATIVE:
11235 case BFD_RELOC_IA64_IMM22:
11236 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11238 type = "LTOFF_TPREL"; break;
11242 case FUNC_DTP_MODULE:
11245 case BFD_RELOC_IA64_DIR64MSB:
11246 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11247 case BFD_RELOC_IA64_DIR64LSB:
11248 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11250 type = "DTPMOD"; break;
11254 case FUNC_LT_DTP_MODULE:
11257 case BFD_RELOC_IA64_IMM22:
11258 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11260 type = "LTOFF_DTPMOD"; break;
11264 case FUNC_DTP_RELATIVE:
11267 case BFD_RELOC_IA64_DIR32MSB:
11268 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11269 case BFD_RELOC_IA64_DIR32LSB:
11270 new = BFD_RELOC_IA64_DTPREL32LSB; break;
11271 case BFD_RELOC_IA64_DIR64MSB:
11272 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11273 case BFD_RELOC_IA64_DIR64LSB:
11274 new = BFD_RELOC_IA64_DTPREL64LSB; break;
11275 case BFD_RELOC_IA64_IMM14:
11276 new = BFD_RELOC_IA64_DTPREL14; break;
11277 case BFD_RELOC_IA64_IMM22:
11278 new = BFD_RELOC_IA64_DTPREL22; break;
11279 case BFD_RELOC_IA64_IMM64:
11280 new = BFD_RELOC_IA64_DTPREL64I; break;
11282 type = "DTPREL"; break;
11286 case FUNC_LT_DTP_RELATIVE:
11289 case BFD_RELOC_IA64_IMM22:
11290 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11292 type = "LTOFF_DTPREL"; break;
11296 case FUNC_IPLT_RELOC:
11299 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11300 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11301 default: type = "IPLT"; break;
11319 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11320 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11321 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11322 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11323 case BFD_RELOC_UNUSED: width = 13; break;
11324 case BFD_RELOC_IA64_IMM14: width = 14; break;
11325 case BFD_RELOC_IA64_IMM22: width = 22; break;
11326 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11330 /* This should be an error, but since previously there wasn't any
11331 diagnostic here, dont't make it fail because of this for now. */
11332 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11337 /* Here is where generate the appropriate reloc for pseudo relocation
11340 ia64_validate_fix (fix)
11343 switch (fix->fx_r_type)
11345 case BFD_RELOC_IA64_FPTR64I:
11346 case BFD_RELOC_IA64_FPTR32MSB:
11347 case BFD_RELOC_IA64_FPTR64LSB:
11348 case BFD_RELOC_IA64_LTOFF_FPTR22:
11349 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11350 if (fix->fx_offset != 0)
11351 as_bad_where (fix->fx_file, fix->fx_line,
11352 "No addend allowed in @fptr() relocation");
11360 fix_insn (fix, odesc, value)
11362 const struct ia64_operand *odesc;
11365 bfd_vma insn[3], t0, t1, control_bits;
11370 slot = fix->fx_where & 0x3;
11371 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11373 /* Bundles are always in little-endian byte order */
11374 t0 = bfd_getl64 (fixpos);
11375 t1 = bfd_getl64 (fixpos + 8);
11376 control_bits = t0 & 0x1f;
11377 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11378 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11379 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11382 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
11384 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11385 insn[2] |= (((value & 0x7f) << 13)
11386 | (((value >> 7) & 0x1ff) << 27)
11387 | (((value >> 16) & 0x1f) << 22)
11388 | (((value >> 21) & 0x1) << 21)
11389 | (((value >> 63) & 0x1) << 36));
11391 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11393 if (value & ~0x3fffffffffffffffULL)
11394 err = "integer operand out of range";
11395 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11396 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11398 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11401 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11402 insn[2] |= ((((value >> 59) & 0x1) << 36)
11403 | (((value >> 0) & 0xfffff) << 13));
11406 err = (*odesc->insert) (odesc, value, insn + slot);
11409 as_bad_where (fix->fx_file, fix->fx_line, err);
11411 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11412 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
11413 number_to_chars_littleendian (fixpos + 0, t0, 8);
11414 number_to_chars_littleendian (fixpos + 8, t1, 8);
11417 /* Attempt to simplify or even eliminate a fixup. The return value is
11418 ignored; perhaps it was once meaningful, but now it is historical.
11419 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11421 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11425 md_apply_fix (fix, valP, seg)
11428 segT seg ATTRIBUTE_UNUSED;
11431 valueT value = *valP;
11433 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11437 switch (fix->fx_r_type)
11439 case BFD_RELOC_IA64_PCREL21B: break;
11440 case BFD_RELOC_IA64_PCREL21BI: break;
11441 case BFD_RELOC_IA64_PCREL21F: break;
11442 case BFD_RELOC_IA64_PCREL21M: break;
11443 case BFD_RELOC_IA64_PCREL60B: break;
11444 case BFD_RELOC_IA64_PCREL22: break;
11445 case BFD_RELOC_IA64_PCREL64I: break;
11446 case BFD_RELOC_IA64_PCREL32MSB: break;
11447 case BFD_RELOC_IA64_PCREL32LSB: break;
11448 case BFD_RELOC_IA64_PCREL64MSB: break;
11449 case BFD_RELOC_IA64_PCREL64LSB: break;
11451 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11458 switch (fix->fx_r_type)
11460 case BFD_RELOC_UNUSED:
11461 /* This must be a TAG13 or TAG13b operand. There are no external
11462 relocs defined for them, so we must give an error. */
11463 as_bad_where (fix->fx_file, fix->fx_line,
11464 "%s must have a constant value",
11465 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11469 case BFD_RELOC_IA64_TPREL14:
11470 case BFD_RELOC_IA64_TPREL22:
11471 case BFD_RELOC_IA64_TPREL64I:
11472 case BFD_RELOC_IA64_LTOFF_TPREL22:
11473 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11474 case BFD_RELOC_IA64_DTPREL14:
11475 case BFD_RELOC_IA64_DTPREL22:
11476 case BFD_RELOC_IA64_DTPREL64I:
11477 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11478 S_SET_THREAD_LOCAL (fix->fx_addsy);
11485 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11487 if (fix->tc_fix_data.bigendian)
11488 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11490 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11495 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11500 /* Generate the BFD reloc to be stuck in the object file from the
11501 fixup used internally in the assembler. */
11504 tc_gen_reloc (sec, fixp)
11505 asection *sec ATTRIBUTE_UNUSED;
11510 reloc = xmalloc (sizeof (*reloc));
11511 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11512 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11513 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11514 reloc->addend = fixp->fx_offset;
11515 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11519 as_bad_where (fixp->fx_file, fixp->fx_line,
11520 "Cannot represent %s relocation in object file",
11521 bfd_get_reloc_code_name (fixp->fx_r_type));
11526 /* Turn a string in input_line_pointer into a floating point constant
11527 of type TYPE, and store the appropriate bytes in *LIT. The number
11528 of LITTLENUMS emitted is stored in *SIZE. An error message is
11529 returned, or NULL on OK. */
11531 #define MAX_LITTLENUMS 5
11534 md_atof (type, lit, size)
11539 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11569 return "Bad call to MD_ATOF()";
11571 t = atof_ieee (input_line_pointer, type, words);
11573 input_line_pointer = t;
11575 (*ia64_float_to_chars) (lit, words, prec);
11579 /* It is 10 byte floating point with 6 byte padding. */
11580 memset (&lit [10], 0, 6);
11581 *size = 8 * sizeof (LITTLENUM_TYPE);
11584 *size = prec * sizeof (LITTLENUM_TYPE);
11589 /* Handle ia64 specific semantics of the align directive. */
11592 ia64_md_do_align (n, fill, len, max)
11593 int n ATTRIBUTE_UNUSED;
11594 const char *fill ATTRIBUTE_UNUSED;
11595 int len ATTRIBUTE_UNUSED;
11596 int max ATTRIBUTE_UNUSED;
11598 if (subseg_text_p (now_seg))
11599 ia64_flush_insns ();
11602 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11603 of an rs_align_code fragment. */
11606 ia64_handle_align (fragp)
11611 const unsigned char *nop;
11613 if (fragp->fr_type != rs_align_code)
11616 /* Check if this frag has to end with a stop bit. */
11617 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11619 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11620 p = fragp->fr_literal + fragp->fr_fix;
11622 /* If no paddings are needed, we check if we need a stop bit. */
11623 if (!bytes && fragp->tc_frag_data)
11625 if (fragp->fr_fix < 16)
11627 /* FIXME: It won't work with
11629 alloc r32=ar.pfs,1,2,4,0
11633 as_bad_where (fragp->fr_file, fragp->fr_line,
11634 _("Can't add stop bit to mark end of instruction group"));
11637 /* Bundles are always in little-endian byte order. Make sure
11638 the previous bundle has the stop bit. */
11642 /* Make sure we are on a 16-byte boundary, in case someone has been
11643 putting data into a text section. */
11646 int fix = bytes & 15;
11647 memset (p, 0, fix);
11650 fragp->fr_fix += fix;
11653 /* Instruction bundles are always little-endian. */
11654 memcpy (p, nop, 16);
11655 fragp->fr_var = 16;
11659 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11664 number_to_chars_bigendian (lit, (long) (*words++),
11665 sizeof (LITTLENUM_TYPE));
11666 lit += sizeof (LITTLENUM_TYPE);
11671 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11676 number_to_chars_littleendian (lit, (long) (words[prec]),
11677 sizeof (LITTLENUM_TYPE));
11678 lit += sizeof (LITTLENUM_TYPE);
11683 ia64_elf_section_change_hook (void)
11685 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11686 && elf_linked_to_section (now_seg) == NULL)
11687 elf_linked_to_section (now_seg) = text_section;
11688 dot_byteorder (-1);
11691 /* Check if a label should be made global. */
11693 ia64_check_label (symbolS *label)
11695 if (*input_line_pointer == ':')
11697 S_SET_EXTERNAL (label);
11698 input_line_pointer++;
11702 /* Used to remember where .alias and .secalias directives are seen. We
11703 will rename symbol and section names when we are about to output
11704 the relocatable file. */
11707 char *file; /* The file where the directive is seen. */
11708 unsigned int line; /* The line number the directive is at. */
11709 const char *name; /* The orignale name of the symbol. */
11712 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11713 .secalias. Otherwise, it is .alias. */
11715 dot_alias (int section)
11717 char *name, *alias;
11721 const char *error_string;
11724 struct hash_control *ahash, *nhash;
11727 name = input_line_pointer;
11728 delim = get_symbol_end ();
11729 end_name = input_line_pointer;
11732 if (name == end_name)
11734 as_bad (_("expected symbol name"));
11735 discard_rest_of_line ();
11739 SKIP_WHITESPACE ();
11741 if (*input_line_pointer != ',')
11744 as_bad (_("expected comma after \"%s\""), name);
11746 ignore_rest_of_line ();
11750 input_line_pointer++;
11752 ia64_canonicalize_symbol_name (name);
11754 /* We call demand_copy_C_string to check if alias string is valid.
11755 There should be a closing `"' and no `\0' in the string. */
11756 alias = demand_copy_C_string (&len);
11759 ignore_rest_of_line ();
11763 /* Make a copy of name string. */
11764 len = strlen (name) + 1;
11765 obstack_grow (¬es, name, len);
11766 name = obstack_finish (¬es);
11771 ahash = secalias_hash;
11772 nhash = secalias_name_hash;
11777 ahash = alias_hash;
11778 nhash = alias_name_hash;
11781 /* Check if alias has been used before. */
11782 h = (struct alias *) hash_find (ahash, alias);
11785 if (strcmp (h->name, name))
11786 as_bad (_("`%s' is already the alias of %s `%s'"),
11787 alias, kind, h->name);
11791 /* Check if name already has an alias. */
11792 a = (const char *) hash_find (nhash, name);
11795 if (strcmp (a, alias))
11796 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11800 h = (struct alias *) xmalloc (sizeof (struct alias));
11801 as_where (&h->file, &h->line);
11804 error_string = hash_jam (ahash, alias, (PTR) h);
11807 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11808 alias, kind, error_string);
11812 error_string = hash_jam (nhash, name, (PTR) alias);
11815 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11816 alias, kind, error_string);
11818 obstack_free (¬es, name);
11819 obstack_free (¬es, alias);
11822 demand_empty_rest_of_line ();
11825 /* It renames the original symbol name to its alias. */
11827 do_alias (const char *alias, PTR value)
11829 struct alias *h = (struct alias *) value;
11830 symbolS *sym = symbol_find (h->name);
11833 as_warn_where (h->file, h->line,
11834 _("symbol `%s' aliased to `%s' is not used"),
11837 S_SET_NAME (sym, (char *) alias);
11840 /* Called from write_object_file. */
11842 ia64_adjust_symtab (void)
11844 hash_traverse (alias_hash, do_alias);
11847 /* It renames the original section name to its alias. */
11849 do_secalias (const char *alias, PTR value)
11851 struct alias *h = (struct alias *) value;
11852 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11855 as_warn_where (h->file, h->line,
11856 _("section `%s' aliased to `%s' is not used"),
11862 /* Called from write_object_file. */
11864 ia64_frob_file (void)
11866 hash_traverse (secalias_hash, do_secalias);