1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003 Free Software Foundation, Inc.
3 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
34 - labels are wrong if automatic alignment is introduced
35 (e.g., checkout the second real10 definition in test-data.s)
37 <reg>.safe_across_calls and any other DV-related directives I don't
38 have documentation for.
39 verify mod-sched-brs reads/writes are checked/marked (and other
45 #include "safe-ctype.h"
46 #include "dwarf2dbg.h"
49 #include "opcode/ia64.h"
53 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
54 #define MIN(a,b) ((a) < (b) ? (a) : (b))
57 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
58 #define CURR_SLOT md.slot[md.curr_slot]
60 #define O_pseudo_fixup (O_max + 1)
64 /* IA-64 ABI section pseudo-ops. */
65 SPECIAL_SECTION_BSS = 0,
67 SPECIAL_SECTION_SDATA,
68 SPECIAL_SECTION_RODATA,
69 SPECIAL_SECTION_COMMENT,
70 SPECIAL_SECTION_UNWIND,
71 SPECIAL_SECTION_UNWIND_INFO,
72 /* HPUX specific section pseudo-ops. */
73 SPECIAL_SECTION_INIT_ARRAY,
74 SPECIAL_SECTION_FINI_ARRAY,
91 FUNC_LT_FPTR_RELATIVE,
101 REG_FR = (REG_GR + 128),
102 REG_AR = (REG_FR + 128),
103 REG_CR = (REG_AR + 128),
104 REG_P = (REG_CR + 128),
105 REG_BR = (REG_P + 64),
106 REG_IP = (REG_BR + 8),
113 /* The following are pseudo-registers for use by gas only. */
125 /* The following pseudo-registers are used for unwind directives only: */
133 DYNREG_GR = 0, /* dynamic general purpose register */
134 DYNREG_FR, /* dynamic floating point register */
135 DYNREG_PR, /* dynamic predicate register */
139 enum operand_match_result
142 OPERAND_OUT_OF_RANGE,
146 /* On the ia64, we can't know the address of a text label until the
147 instructions are packed into a bundle. To handle this, we keep
148 track of the list of labels that appear in front of each
152 struct label_fix *next;
156 extern int target_big_endian;
158 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
160 static void ia64_float_to_chars_bigendian
161 PARAMS ((char *, LITTLENUM_TYPE *, int));
162 static void ia64_float_to_chars_littleendian
163 PARAMS ((char *, LITTLENUM_TYPE *, int));
164 static void (*ia64_float_to_chars)
165 PARAMS ((char *, LITTLENUM_TYPE *, int));
167 static struct hash_control *alias_hash;
168 static struct hash_control *alias_name_hash;
169 static struct hash_control *secalias_hash;
170 static struct hash_control *secalias_name_hash;
172 /* Characters which always start a comment. */
173 const char comment_chars[] = "";
175 /* Characters which start a comment at the beginning of a line. */
176 const char line_comment_chars[] = "#";
178 /* Characters which may be used to separate multiple commands on a
180 const char line_separator_chars[] = ";";
182 /* Characters which are used to indicate an exponent in a floating
184 const char EXP_CHARS[] = "eE";
186 /* Characters which mean that a number is a floating point constant,
188 const char FLT_CHARS[] = "rRsSfFdDxXpP";
190 /* ia64-specific option processing: */
192 const char *md_shortopts = "m:N:x::";
194 struct option md_longopts[] =
196 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
197 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
198 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
199 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
202 size_t md_longopts_size = sizeof (md_longopts);
206 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
207 struct hash_control *reg_hash; /* register name hash table */
208 struct hash_control *dynreg_hash; /* dynamic register hash table */
209 struct hash_control *const_hash; /* constant hash table */
210 struct hash_control *entry_hash; /* code entry hint hash table */
212 symbolS *regsym[REG_NUM];
214 /* If X_op is != O_absent, the registername for the instruction's
215 qualifying predicate. If NULL, p0 is assumed for instructions
216 that are predicatable. */
223 explicit_mode : 1, /* which mode we're in */
224 default_explicit_mode : 1, /* which mode is the default */
225 mode_explicitly_set : 1, /* was the current mode explicitly set? */
227 keep_pending_output : 1;
229 /* Each bundle consists of up to three instructions. We keep
230 track of four most recent instructions so we can correctly set
231 the end_of_insn_group for the last instruction in a bundle. */
233 int num_slots_in_use;
237 end_of_insn_group : 1,
238 manual_bundling_on : 1,
239 manual_bundling_off : 1;
240 signed char user_template; /* user-selected template, if any */
241 unsigned char qp_regno; /* qualifying predicate */
242 /* This duplicates a good fraction of "struct fix" but we
243 can't use a "struct fix" instead since we can't call
244 fix_new_exp() until we know the address of the instruction. */
248 bfd_reloc_code_real_type code;
249 enum ia64_opnd opnd; /* type of operand in need of fix */
250 unsigned int is_pcrel : 1; /* is operand pc-relative? */
251 expressionS expr; /* the value to be inserted */
253 fixup[2]; /* at most two fixups per insn */
254 struct ia64_opcode *idesc;
255 struct label_fix *label_fixups;
256 struct label_fix *tag_fixups;
257 struct unw_rec_list *unwind_record; /* Unwind directive. */
260 unsigned int src_line;
261 struct dwarf2_line_info debug_line;
269 struct dynreg *next; /* next dynamic register */
271 unsigned short base; /* the base register number */
272 unsigned short num_regs; /* # of registers in this set */
274 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
276 flagword flags; /* ELF-header flags */
279 unsigned hint:1; /* is this hint currently valid? */
280 bfd_vma offset; /* mem.offset offset */
281 bfd_vma base; /* mem.offset base */
284 int path; /* number of alt. entry points seen */
285 const char **entry_labels; /* labels of all alternate paths in
286 the current DV-checking block. */
287 int maxpaths; /* size currently allocated for
289 /* Support for hardware errata workarounds. */
291 /* Record data about the last three insn groups. */
294 /* B-step workaround.
295 For each predicate register, this is set if the corresponding insn
296 group conditionally sets this register with one of the affected
299 /* B-step workaround.
300 For each general register, this is set if the corresponding insn
301 a) is conditional one one of the predicate registers for which
302 P_REG_SET is 1 in the corresponding entry of the previous group,
303 b) sets this general register with one of the affected
305 int g_reg_set_conditionally[128];
309 int pointer_size; /* size in bytes of a pointer */
310 int pointer_size_shift; /* shift size of a pointer for alignment */
314 /* application registers: */
320 #define AR_BSPSTORE 18
335 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
336 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
337 {"ar.rsc", 16}, {"ar.bsp", 17},
338 {"ar.bspstore", 18}, {"ar.rnat", 19},
339 {"ar.fcr", 21}, {"ar.eflag", 24},
340 {"ar.csd", 25}, {"ar.ssd", 26},
341 {"ar.cflg", 27}, {"ar.fsr", 28},
342 {"ar.fir", 29}, {"ar.fdr", 30},
343 {"ar.ccv", 32}, {"ar.unat", 36},
344 {"ar.fpsr", 40}, {"ar.itc", 44},
345 {"ar.pfs", 64}, {"ar.lc", 65},
366 /* control registers: */
408 static const struct const_desc
415 /* PSR constant masks: */
418 {"psr.be", ((valueT) 1) << 1},
419 {"psr.up", ((valueT) 1) << 2},
420 {"psr.ac", ((valueT) 1) << 3},
421 {"psr.mfl", ((valueT) 1) << 4},
422 {"psr.mfh", ((valueT) 1) << 5},
424 {"psr.ic", ((valueT) 1) << 13},
425 {"psr.i", ((valueT) 1) << 14},
426 {"psr.pk", ((valueT) 1) << 15},
428 {"psr.dt", ((valueT) 1) << 17},
429 {"psr.dfl", ((valueT) 1) << 18},
430 {"psr.dfh", ((valueT) 1) << 19},
431 {"psr.sp", ((valueT) 1) << 20},
432 {"psr.pp", ((valueT) 1) << 21},
433 {"psr.di", ((valueT) 1) << 22},
434 {"psr.si", ((valueT) 1) << 23},
435 {"psr.db", ((valueT) 1) << 24},
436 {"psr.lp", ((valueT) 1) << 25},
437 {"psr.tb", ((valueT) 1) << 26},
438 {"psr.rt", ((valueT) 1) << 27},
439 /* 28-31: reserved */
440 /* 32-33: cpl (current privilege level) */
441 {"psr.is", ((valueT) 1) << 34},
442 {"psr.mc", ((valueT) 1) << 35},
443 {"psr.it", ((valueT) 1) << 36},
444 {"psr.id", ((valueT) 1) << 37},
445 {"psr.da", ((valueT) 1) << 38},
446 {"psr.dd", ((valueT) 1) << 39},
447 {"psr.ss", ((valueT) 1) << 40},
448 /* 41-42: ri (restart instruction) */
449 {"psr.ed", ((valueT) 1) << 43},
450 {"psr.bn", ((valueT) 1) << 44},
453 /* indirect register-sets/memory: */
462 { "CPUID", IND_CPUID },
463 { "cpuid", IND_CPUID },
475 /* Pseudo functions used to indicate relocation types (these functions
476 start with an at sign (@). */
498 /* reloc pseudo functions (these must come first!): */
499 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
500 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
501 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
502 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
503 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
504 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
505 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
506 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
507 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
508 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
509 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
510 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
511 { "", 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
512 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
513 { "", 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
514 { "", 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
515 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
517 /* mbtype4 constants: */
518 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
519 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
520 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
521 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
522 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
524 /* fclass constants: */
525 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
526 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
527 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
528 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
529 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
530 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
531 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
532 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
533 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
535 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
537 /* hint constants: */
538 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
540 /* unwind-related constants: */
541 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
542 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
543 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
544 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
545 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
546 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
547 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
549 /* unwind-related registers: */
550 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
553 /* 41-bit nop opcodes (one per unit): */
554 static const bfd_vma nop[IA64_NUM_UNITS] =
556 0x0000000000LL, /* NIL => break 0 */
557 0x0008000000LL, /* I-unit nop */
558 0x0008000000LL, /* M-unit nop */
559 0x4000000000LL, /* B-unit nop */
560 0x0008000000LL, /* F-unit nop */
561 0x0008000000LL, /* L-"unit" nop */
562 0x0008000000LL, /* X-unit nop */
565 /* Can't be `const' as it's passed to input routines (which have the
566 habit of setting temporary sentinels. */
567 static char special_section_name[][20] =
569 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
570 {".IA_64.unwind"}, {".IA_64.unwind_info"},
571 {".init_array"}, {".fini_array"}
574 /* The best template for a particular sequence of up to three
576 #define N IA64_NUM_TYPES
577 static unsigned char best_template[N][N][N];
580 /* Resource dependencies currently in effect */
582 int depind; /* dependency index */
583 const struct ia64_dependency *dependency; /* actual dependency */
584 unsigned specific:1, /* is this a specific bit/regno? */
585 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
586 int index; /* specific regno/bit within dependency */
587 int note; /* optional qualifying note (0 if none) */
591 int insn_srlz; /* current insn serialization state */
592 int data_srlz; /* current data serialization state */
593 int qp_regno; /* qualifying predicate for this usage */
594 char *file; /* what file marked this dependency */
595 unsigned int line; /* what line marked this dependency */
596 struct mem_offset mem_offset; /* optional memory offset hint */
597 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
598 int path; /* corresponding code entry index */
600 static int regdepslen = 0;
601 static int regdepstotlen = 0;
602 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
603 static const char *dv_sem[] = { "none", "implied", "impliedf",
604 "data", "instr", "specific", "stop", "other" };
605 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
607 /* Current state of PR mutexation */
608 static struct qpmutex {
611 } *qp_mutexes = NULL; /* QP mutex bitmasks */
612 static int qp_mutexeslen = 0;
613 static int qp_mutexestotlen = 0;
614 static valueT qp_safe_across_calls = 0;
616 /* Current state of PR implications */
617 static struct qp_imply {
620 unsigned p2_branched:1;
622 } *qp_implies = NULL;
623 static int qp_implieslen = 0;
624 static int qp_impliestotlen = 0;
626 /* Keep track of static GR values so that indirect register usage can
627 sometimes be tracked. */
632 } gr_values[128] = {{ 1, 0, 0 }};
634 /* Remember the alignment frag. */
635 static fragS *align_frag;
637 /* These are the routines required to output the various types of
640 /* A slot_number is a frag address plus the slot index (0-2). We use the
641 frag address here so that if there is a section switch in the middle of
642 a function, then instructions emitted to a different section are not
643 counted. Since there may be more than one frag for a function, this
644 means we also need to keep track of which frag this address belongs to
645 so we can compute inter-frag distances. This also nicely solves the
646 problem with nops emitted for align directives, which can't easily be
647 counted, but can easily be derived from frag sizes. */
649 typedef struct unw_rec_list {
651 unsigned long slot_number;
653 unsigned long next_slot_number;
654 fragS *next_slot_frag;
655 struct unw_rec_list *next;
658 #define SLOT_NUM_NOT_SET (unsigned)-1
660 /* Linked list of saved prologue counts. A very poor
661 implementation of a map from label numbers to prologue counts. */
662 typedef struct label_prologue_count
664 struct label_prologue_count *next;
665 unsigned long label_number;
666 unsigned int prologue_count;
667 } label_prologue_count;
671 /* Maintain a list of unwind entries for the current function. */
675 /* Any unwind entires that should be attached to the current slot
676 that an insn is being constructed for. */
677 unw_rec_list *current_entry;
679 /* These are used to create the unwind table entry for this function. */
682 symbolS *info; /* pointer to unwind info */
683 symbolS *personality_routine;
685 subsegT saved_text_subseg;
686 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
688 /* TRUE if processing unwind directives in a prologue region. */
691 unsigned int prologue_count; /* number of .prologues seen so far */
692 /* Prologue counts at previous .label_state directives. */
693 struct label_prologue_count * saved_prologue_counts;
696 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
698 /* Forward declarations: */
699 static int ar_is_in_integer_unit PARAMS ((int regnum));
700 static void set_section PARAMS ((char *name));
701 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
702 unsigned int, unsigned int));
703 static void dot_align (int);
704 static void dot_radix PARAMS ((int));
705 static void dot_special_section PARAMS ((int));
706 static void dot_proc PARAMS ((int));
707 static void dot_fframe PARAMS ((int));
708 static void dot_vframe PARAMS ((int));
709 static void dot_vframesp PARAMS ((int));
710 static void dot_vframepsp PARAMS ((int));
711 static void dot_save PARAMS ((int));
712 static void dot_restore PARAMS ((int));
713 static void dot_restorereg PARAMS ((int));
714 static void dot_restorereg_p PARAMS ((int));
715 static void dot_handlerdata PARAMS ((int));
716 static void dot_unwentry PARAMS ((int));
717 static void dot_altrp PARAMS ((int));
718 static void dot_savemem PARAMS ((int));
719 static void dot_saveg PARAMS ((int));
720 static void dot_savef PARAMS ((int));
721 static void dot_saveb PARAMS ((int));
722 static void dot_savegf PARAMS ((int));
723 static void dot_spill PARAMS ((int));
724 static void dot_spillreg PARAMS ((int));
725 static void dot_spillmem PARAMS ((int));
726 static void dot_spillreg_p PARAMS ((int));
727 static void dot_spillmem_p PARAMS ((int));
728 static void dot_label_state PARAMS ((int));
729 static void dot_copy_state PARAMS ((int));
730 static void dot_unwabi PARAMS ((int));
731 static void dot_personality PARAMS ((int));
732 static void dot_body PARAMS ((int));
733 static void dot_prologue PARAMS ((int));
734 static void dot_endp PARAMS ((int));
735 static void dot_template PARAMS ((int));
736 static void dot_regstk PARAMS ((int));
737 static void dot_rot PARAMS ((int));
738 static void dot_byteorder PARAMS ((int));
739 static void dot_psr PARAMS ((int));
740 static void dot_alias PARAMS ((int));
741 static void dot_ln PARAMS ((int));
742 static char *parse_section_name PARAMS ((void));
743 static void dot_xdata PARAMS ((int));
744 static void stmt_float_cons PARAMS ((int));
745 static void stmt_cons_ua PARAMS ((int));
746 static void dot_xfloat_cons PARAMS ((int));
747 static void dot_xstringer PARAMS ((int));
748 static void dot_xdata_ua PARAMS ((int));
749 static void dot_xfloat_cons_ua PARAMS ((int));
750 static void print_prmask PARAMS ((valueT mask));
751 static void dot_pred_rel PARAMS ((int));
752 static void dot_reg_val PARAMS ((int));
753 static void dot_dv_mode PARAMS ((int));
754 static void dot_entry PARAMS ((int));
755 static void dot_mem_offset PARAMS ((int));
756 static void add_unwind_entry PARAMS((unw_rec_list *ptr));
757 static symbolS *declare_register PARAMS ((const char *name, int regnum));
758 static void declare_register_set PARAMS ((const char *, int, int));
759 static unsigned int operand_width PARAMS ((enum ia64_opnd));
760 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
763 static int parse_operand PARAMS ((expressionS *e));
764 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
765 static int errata_nop_necessary_p PARAMS ((struct slot *, enum ia64_unit));
766 static void build_insn PARAMS ((struct slot *, bfd_vma *));
767 static void emit_one_bundle PARAMS ((void));
768 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
769 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
770 bfd_reloc_code_real_type r_type));
771 static void insn_group_break PARAMS ((int, int, int));
772 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
773 struct rsrc *, int depind, int path));
774 static void add_qp_mutex PARAMS((valueT mask));
775 static void add_qp_imply PARAMS((int p1, int p2));
776 static void clear_qp_branch_flag PARAMS((valueT mask));
777 static void clear_qp_mutex PARAMS((valueT mask));
778 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
779 static int has_suffix_p PARAMS((const char *, const char *));
780 static void clear_register_values PARAMS ((void));
781 static void print_dependency PARAMS ((const char *action, int depind));
782 static void instruction_serialization PARAMS ((void));
783 static void data_serialization PARAMS ((void));
784 static void remove_marked_resource PARAMS ((struct rsrc *));
785 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
786 static int is_taken_branch PARAMS ((struct ia64_opcode *));
787 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
788 static int depends_on PARAMS ((int, struct ia64_opcode *));
789 static int specify_resource PARAMS ((const struct ia64_dependency *,
790 struct ia64_opcode *, int, struct rsrc [], int, int));
791 static int check_dv PARAMS((struct ia64_opcode *idesc));
792 static void check_dependencies PARAMS((struct ia64_opcode *));
793 static void mark_resources PARAMS((struct ia64_opcode *));
794 static void update_dependencies PARAMS((struct ia64_opcode *));
795 static void note_register_values PARAMS((struct ia64_opcode *));
796 static int qp_mutex PARAMS ((int, int, int));
797 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
798 static void output_vbyte_mem PARAMS ((int, char *, char *));
799 static void count_output PARAMS ((int, char *, char *));
800 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
801 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
802 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
803 static void output_P1_format PARAMS ((vbyte_func, int));
804 static void output_P2_format PARAMS ((vbyte_func, int, int));
805 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
806 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
807 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
808 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
809 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
810 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
811 static void output_P9_format PARAMS ((vbyte_func, int, int));
812 static void output_P10_format PARAMS ((vbyte_func, int, int));
813 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
814 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
815 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
816 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
817 static char format_ab_reg PARAMS ((int, int));
818 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
820 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
821 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
823 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
824 static unw_rec_list *output_endp PARAMS ((void));
825 static unw_rec_list *output_prologue PARAMS ((void));
826 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
827 static unw_rec_list *output_body PARAMS ((void));
828 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
829 static unw_rec_list *output_mem_stack_v PARAMS ((void));
830 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
831 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
832 static unw_rec_list *output_rp_when PARAMS ((void));
833 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
834 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
835 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
836 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
837 static unw_rec_list *output_pfs_when PARAMS ((void));
838 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
839 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
840 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
841 static unw_rec_list *output_preds_when PARAMS ((void));
842 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
843 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
844 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
845 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
846 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
847 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
848 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
849 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
850 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
851 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
852 static unw_rec_list *output_unat_when PARAMS ((void));
853 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
854 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
855 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
856 static unw_rec_list *output_lc_when PARAMS ((void));
857 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
858 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
859 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
860 static unw_rec_list *output_fpsr_when PARAMS ((void));
861 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
862 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
863 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
864 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
865 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
866 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
867 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
868 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
869 static unw_rec_list *output_bsp_when PARAMS ((void));
870 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
871 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
872 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
873 static unw_rec_list *output_bspstore_when PARAMS ((void));
874 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
875 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
876 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
877 static unw_rec_list *output_rnat_when PARAMS ((void));
878 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
879 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
880 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
881 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
882 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
883 static unw_rec_list *output_label_state PARAMS ((unsigned long));
884 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
885 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int));
886 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int));
887 static unw_rec_list *output_spill_psprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
889 static unw_rec_list *output_spill_sprel_p PARAMS ((unsigned int, unsigned int, unsigned int,
891 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
893 static unw_rec_list *output_spill_reg_p PARAMS ((unsigned int, unsigned int, unsigned int,
894 unsigned int, unsigned int));
895 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
896 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
897 static int calc_record_size PARAMS ((unw_rec_list *));
898 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
899 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
900 unsigned long, fragS *,
902 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
903 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
904 static int convert_expr_to_ab_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
905 static int convert_expr_to_xy_reg PARAMS ((expressionS *, unsigned int *, unsigned int *));
906 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
907 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
908 static void free_saved_prologue_counts PARAMS ((void));
910 /* Determine if application register REGNUM resides in the integer
911 unit (as opposed to the memory unit). */
913 ar_is_in_integer_unit (reg)
918 return (reg == 64 /* pfs */
919 || reg == 65 /* lc */
920 || reg == 66 /* ec */
921 /* ??? ias accepts and puts these in the integer unit. */
922 || (reg >= 112 && reg <= 127));
925 /* Switch to section NAME and create section if necessary. It's
926 rather ugly that we have to manipulate input_line_pointer but I
927 don't see any other way to accomplish the same thing without
928 changing obj-elf.c (which may be the Right Thing, in the end). */
933 char *saved_input_line_pointer;
935 saved_input_line_pointer = input_line_pointer;
936 input_line_pointer = name;
938 input_line_pointer = saved_input_line_pointer;
941 /* Map 's' to SHF_IA_64_SHORT. */
944 ia64_elf_section_letter (letter, ptr_msg)
949 return SHF_IA_64_SHORT;
950 else if (letter == 'o')
951 return SHF_LINK_ORDER;
953 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
957 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
960 ia64_elf_section_flags (flags, attr, type)
962 int attr, type ATTRIBUTE_UNUSED;
964 if (attr & SHF_IA_64_SHORT)
965 flags |= SEC_SMALL_DATA;
970 ia64_elf_section_type (str, len)
974 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
976 if (STREQ (ELF_STRING_ia64_unwind_info))
979 if (STREQ (ELF_STRING_ia64_unwind_info_once))
982 if (STREQ (ELF_STRING_ia64_unwind))
983 return SHT_IA_64_UNWIND;
985 if (STREQ (ELF_STRING_ia64_unwind_once))
986 return SHT_IA_64_UNWIND;
988 if (STREQ ("unwind"))
989 return SHT_IA_64_UNWIND;
991 if (STREQ ("init_array"))
992 return SHT_INIT_ARRAY;
994 if (STREQ ("fini_array"))
995 return SHT_FINI_ARRAY;
1002 set_regstack (ins, locs, outs, rots)
1003 unsigned int ins, locs, outs, rots;
1005 /* Size of frame. */
1008 sof = ins + locs + outs;
1011 as_bad ("Size of frame exceeds maximum of 96 registers");
1016 as_warn ("Size of rotating registers exceeds frame size");
1019 md.in.base = REG_GR + 32;
1020 md.loc.base = md.in.base + ins;
1021 md.out.base = md.loc.base + locs;
1023 md.in.num_regs = ins;
1024 md.loc.num_regs = locs;
1025 md.out.num_regs = outs;
1026 md.rot.num_regs = rots;
1033 struct label_fix *lfix;
1035 subsegT saved_subseg;
1038 if (!md.last_text_seg)
1041 saved_seg = now_seg;
1042 saved_subseg = now_subseg;
1044 subseg_set (md.last_text_seg, 0);
1046 while (md.num_slots_in_use > 0)
1047 emit_one_bundle (); /* force out queued instructions */
1049 /* In case there are labels following the last instruction, resolve
1051 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1053 S_SET_VALUE (lfix->sym, frag_now_fix ());
1054 symbol_set_frag (lfix->sym, frag_now);
1056 CURR_SLOT.label_fixups = 0;
1057 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1059 S_SET_VALUE (lfix->sym, frag_now_fix ());
1060 symbol_set_frag (lfix->sym, frag_now);
1062 CURR_SLOT.tag_fixups = 0;
1064 /* In case there are unwind directives following the last instruction,
1065 resolve those now. We only handle prologue, body, and endp directives
1066 here. Give an error for others. */
1067 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1069 switch (ptr->r.type)
1075 ptr->slot_number = (unsigned long) frag_more (0);
1076 ptr->slot_frag = frag_now;
1079 /* Allow any record which doesn't have a "t" field (i.e.,
1080 doesn't relate to a particular instruction). */
1096 as_bad (_("Unwind directive not followed by an instruction."));
1100 unwind.current_entry = NULL;
1102 subseg_set (saved_seg, saved_subseg);
1104 if (md.qp.X_op == O_register)
1105 as_bad ("qualifying predicate not followed by instruction");
1109 ia64_do_align (int nbytes)
1111 char *saved_input_line_pointer = input_line_pointer;
1113 input_line_pointer = "";
1114 s_align_bytes (nbytes);
1115 input_line_pointer = saved_input_line_pointer;
1119 ia64_cons_align (nbytes)
1124 char *saved_input_line_pointer = input_line_pointer;
1125 input_line_pointer = "";
1126 s_align_bytes (nbytes);
1127 input_line_pointer = saved_input_line_pointer;
1131 /* Output COUNT bytes to a memory location. */
1132 static unsigned char *vbyte_mem_ptr = NULL;
1135 output_vbyte_mem (count, ptr, comment)
1138 char *comment ATTRIBUTE_UNUSED;
1141 if (vbyte_mem_ptr == NULL)
1146 for (x = 0; x < count; x++)
1147 *(vbyte_mem_ptr++) = ptr[x];
1150 /* Count the number of bytes required for records. */
1151 static int vbyte_count = 0;
1153 count_output (count, ptr, comment)
1155 char *ptr ATTRIBUTE_UNUSED;
1156 char *comment ATTRIBUTE_UNUSED;
1158 vbyte_count += count;
1162 output_R1_format (f, rtype, rlen)
1164 unw_record_type rtype;
1171 output_R3_format (f, rtype, rlen);
1177 else if (rtype != prologue)
1178 as_bad ("record type is not valid");
1180 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1181 (*f) (1, &byte, NULL);
1185 output_R2_format (f, mask, grsave, rlen)
1192 mask = (mask & 0x0f);
1193 grsave = (grsave & 0x7f);
1195 bytes[0] = (UNW_R2 | (mask >> 1));
1196 bytes[1] = (((mask & 0x01) << 7) | grsave);
1197 count += output_leb128 (bytes + 2, rlen, 0);
1198 (*f) (count, bytes, NULL);
1202 output_R3_format (f, rtype, rlen)
1204 unw_record_type rtype;
1211 output_R1_format (f, rtype, rlen);
1217 else if (rtype != prologue)
1218 as_bad ("record type is not valid");
1219 bytes[0] = (UNW_R3 | r);
1220 count = output_leb128 (bytes + 1, rlen, 0);
1221 (*f) (count + 1, bytes, NULL);
1225 output_P1_format (f, brmask)
1230 byte = UNW_P1 | (brmask & 0x1f);
1231 (*f) (1, &byte, NULL);
1235 output_P2_format (f, brmask, gr)
1241 brmask = (brmask & 0x1f);
1242 bytes[0] = UNW_P2 | (brmask >> 1);
1243 bytes[1] = (((brmask & 1) << 7) | gr);
1244 (*f) (2, bytes, NULL);
1248 output_P3_format (f, rtype, reg)
1250 unw_record_type rtype;
1295 as_bad ("Invalid record type for P3 format.");
1297 bytes[0] = (UNW_P3 | (r >> 1));
1298 bytes[1] = (((r & 1) << 7) | reg);
1299 (*f) (2, bytes, NULL);
1303 output_P4_format (f, imask, imask_size)
1305 unsigned char *imask;
1306 unsigned long imask_size;
1309 (*f) (imask_size, imask, NULL);
1313 output_P5_format (f, grmask, frmask)
1316 unsigned long frmask;
1319 grmask = (grmask & 0x0f);
1322 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1323 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1324 bytes[3] = (frmask & 0x000000ff);
1325 (*f) (4, bytes, NULL);
1329 output_P6_format (f, rtype, rmask)
1331 unw_record_type rtype;
1337 if (rtype == gr_mem)
1339 else if (rtype != fr_mem)
1340 as_bad ("Invalid record type for format P6");
1341 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1342 (*f) (1, &byte, NULL);
1346 output_P7_format (f, rtype, w1, w2)
1348 unw_record_type rtype;
1355 count += output_leb128 (bytes + 1, w1, 0);
1360 count += output_leb128 (bytes + count, w2 >> 4, 0);
1410 bytes[0] = (UNW_P7 | r);
1411 (*f) (count, bytes, NULL);
1415 output_P8_format (f, rtype, t)
1417 unw_record_type rtype;
1456 case bspstore_psprel:
1459 case bspstore_sprel:
1471 case priunat_when_gr:
1474 case priunat_psprel:
1480 case priunat_when_mem:
1487 count += output_leb128 (bytes + 2, t, 0);
1488 (*f) (count, bytes, NULL);
1492 output_P9_format (f, grmask, gr)
1499 bytes[1] = (grmask & 0x0f);
1500 bytes[2] = (gr & 0x7f);
1501 (*f) (3, bytes, NULL);
1505 output_P10_format (f, abi, context)
1512 bytes[1] = (abi & 0xff);
1513 bytes[2] = (context & 0xff);
1514 (*f) (3, bytes, NULL);
1518 output_B1_format (f, rtype, label)
1520 unw_record_type rtype;
1521 unsigned long label;
1527 output_B4_format (f, rtype, label);
1530 if (rtype == copy_state)
1532 else if (rtype != label_state)
1533 as_bad ("Invalid record type for format B1");
1535 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1536 (*f) (1, &byte, NULL);
1540 output_B2_format (f, ecount, t)
1542 unsigned long ecount;
1549 output_B3_format (f, ecount, t);
1552 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1553 count += output_leb128 (bytes + 1, t, 0);
1554 (*f) (count, bytes, NULL);
1558 output_B3_format (f, ecount, t)
1560 unsigned long ecount;
1567 output_B2_format (f, ecount, t);
1571 count += output_leb128 (bytes + 1, t, 0);
1572 count += output_leb128 (bytes + count, ecount, 0);
1573 (*f) (count, bytes, NULL);
1577 output_B4_format (f, rtype, label)
1579 unw_record_type rtype;
1580 unsigned long label;
1587 output_B1_format (f, rtype, label);
1591 if (rtype == copy_state)
1593 else if (rtype != label_state)
1594 as_bad ("Invalid record type for format B1");
1596 bytes[0] = (UNW_B4 | (r << 3));
1597 count += output_leb128 (bytes + 1, label, 0);
1598 (*f) (count, bytes, NULL);
1602 format_ab_reg (ab, reg)
1609 ret = (ab << 5) | reg;
1614 output_X1_format (f, rtype, ab, reg, t, w1)
1616 unw_record_type rtype;
1626 if (rtype == spill_sprel)
1628 else if (rtype != spill_psprel)
1629 as_bad ("Invalid record type for format X1");
1630 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1631 count += output_leb128 (bytes + 2, t, 0);
1632 count += output_leb128 (bytes + count, w1, 0);
1633 (*f) (count, bytes, NULL);
1637 output_X2_format (f, ab, reg, x, y, treg, t)
1646 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1647 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1648 count += output_leb128 (bytes + 3, t, 0);
1649 (*f) (count, bytes, NULL);
1653 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1655 unw_record_type rtype;
1666 if (rtype == spill_sprel_p)
1668 else if (rtype != spill_psprel_p)
1669 as_bad ("Invalid record type for format X3");
1670 bytes[1] = ((r << 7) | (qp & 0x3f));
1671 bytes[2] = format_ab_reg (ab, reg);
1672 count += output_leb128 (bytes + 3, t, 0);
1673 count += output_leb128 (bytes + count, w1, 0);
1674 (*f) (count, bytes, NULL);
1678 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1688 bytes[1] = (qp & 0x3f);
1689 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1690 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1691 count += output_leb128 (bytes + 4, t, 0);
1692 (*f) (count, bytes, NULL);
1695 /* This function allocates a record list structure, and initializes fields. */
1697 static unw_rec_list *
1698 alloc_record (unw_record_type t)
1701 ptr = xmalloc (sizeof (*ptr));
1703 ptr->slot_number = SLOT_NUM_NOT_SET;
1705 ptr->next_slot_number = 0;
1706 ptr->next_slot_frag = 0;
1710 /* Dummy unwind record used for calculating the length of the last prologue or
1713 static unw_rec_list *
1716 unw_rec_list *ptr = alloc_record (endp);
1720 static unw_rec_list *
1723 unw_rec_list *ptr = alloc_record (prologue);
1724 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1728 static unw_rec_list *
1729 output_prologue_gr (saved_mask, reg)
1730 unsigned int saved_mask;
1733 unw_rec_list *ptr = alloc_record (prologue_gr);
1734 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1735 ptr->r.record.r.grmask = saved_mask;
1736 ptr->r.record.r.grsave = reg;
1740 static unw_rec_list *
1743 unw_rec_list *ptr = alloc_record (body);
1747 static unw_rec_list *
1748 output_mem_stack_f (size)
1751 unw_rec_list *ptr = alloc_record (mem_stack_f);
1752 ptr->r.record.p.size = size;
1756 static unw_rec_list *
1757 output_mem_stack_v ()
1759 unw_rec_list *ptr = alloc_record (mem_stack_v);
1763 static unw_rec_list *
1767 unw_rec_list *ptr = alloc_record (psp_gr);
1768 ptr->r.record.p.gr = gr;
1772 static unw_rec_list *
1773 output_psp_sprel (offset)
1774 unsigned int offset;
1776 unw_rec_list *ptr = alloc_record (psp_sprel);
1777 ptr->r.record.p.spoff = offset / 4;
1781 static unw_rec_list *
1784 unw_rec_list *ptr = alloc_record (rp_when);
1788 static unw_rec_list *
1792 unw_rec_list *ptr = alloc_record (rp_gr);
1793 ptr->r.record.p.gr = gr;
1797 static unw_rec_list *
1801 unw_rec_list *ptr = alloc_record (rp_br);
1802 ptr->r.record.p.br = br;
1806 static unw_rec_list *
1807 output_rp_psprel (offset)
1808 unsigned int offset;
1810 unw_rec_list *ptr = alloc_record (rp_psprel);
1811 ptr->r.record.p.pspoff = offset / 4;
1815 static unw_rec_list *
1816 output_rp_sprel (offset)
1817 unsigned int offset;
1819 unw_rec_list *ptr = alloc_record (rp_sprel);
1820 ptr->r.record.p.spoff = offset / 4;
1824 static unw_rec_list *
1827 unw_rec_list *ptr = alloc_record (pfs_when);
1831 static unw_rec_list *
1835 unw_rec_list *ptr = alloc_record (pfs_gr);
1836 ptr->r.record.p.gr = gr;
1840 static unw_rec_list *
1841 output_pfs_psprel (offset)
1842 unsigned int offset;
1844 unw_rec_list *ptr = alloc_record (pfs_psprel);
1845 ptr->r.record.p.pspoff = offset / 4;
1849 static unw_rec_list *
1850 output_pfs_sprel (offset)
1851 unsigned int offset;
1853 unw_rec_list *ptr = alloc_record (pfs_sprel);
1854 ptr->r.record.p.spoff = offset / 4;
1858 static unw_rec_list *
1859 output_preds_when ()
1861 unw_rec_list *ptr = alloc_record (preds_when);
1865 static unw_rec_list *
1866 output_preds_gr (gr)
1869 unw_rec_list *ptr = alloc_record (preds_gr);
1870 ptr->r.record.p.gr = gr;
1874 static unw_rec_list *
1875 output_preds_psprel (offset)
1876 unsigned int offset;
1878 unw_rec_list *ptr = alloc_record (preds_psprel);
1879 ptr->r.record.p.pspoff = offset / 4;
1883 static unw_rec_list *
1884 output_preds_sprel (offset)
1885 unsigned int offset;
1887 unw_rec_list *ptr = alloc_record (preds_sprel);
1888 ptr->r.record.p.spoff = offset / 4;
1892 static unw_rec_list *
1893 output_fr_mem (mask)
1896 unw_rec_list *ptr = alloc_record (fr_mem);
1897 ptr->r.record.p.rmask = mask;
1901 static unw_rec_list *
1902 output_frgr_mem (gr_mask, fr_mask)
1903 unsigned int gr_mask;
1904 unsigned int fr_mask;
1906 unw_rec_list *ptr = alloc_record (frgr_mem);
1907 ptr->r.record.p.grmask = gr_mask;
1908 ptr->r.record.p.frmask = fr_mask;
1912 static unw_rec_list *
1913 output_gr_gr (mask, reg)
1917 unw_rec_list *ptr = alloc_record (gr_gr);
1918 ptr->r.record.p.grmask = mask;
1919 ptr->r.record.p.gr = reg;
1923 static unw_rec_list *
1924 output_gr_mem (mask)
1927 unw_rec_list *ptr = alloc_record (gr_mem);
1928 ptr->r.record.p.rmask = mask;
1932 static unw_rec_list *
1933 output_br_mem (unsigned int mask)
1935 unw_rec_list *ptr = alloc_record (br_mem);
1936 ptr->r.record.p.brmask = mask;
1940 static unw_rec_list *
1941 output_br_gr (save_mask, reg)
1942 unsigned int save_mask;
1945 unw_rec_list *ptr = alloc_record (br_gr);
1946 ptr->r.record.p.brmask = save_mask;
1947 ptr->r.record.p.gr = reg;
1951 static unw_rec_list *
1952 output_spill_base (offset)
1953 unsigned int offset;
1955 unw_rec_list *ptr = alloc_record (spill_base);
1956 ptr->r.record.p.pspoff = offset / 4;
1960 static unw_rec_list *
1963 unw_rec_list *ptr = alloc_record (unat_when);
1967 static unw_rec_list *
1971 unw_rec_list *ptr = alloc_record (unat_gr);
1972 ptr->r.record.p.gr = gr;
1976 static unw_rec_list *
1977 output_unat_psprel (offset)
1978 unsigned int offset;
1980 unw_rec_list *ptr = alloc_record (unat_psprel);
1981 ptr->r.record.p.pspoff = offset / 4;
1985 static unw_rec_list *
1986 output_unat_sprel (offset)
1987 unsigned int offset;
1989 unw_rec_list *ptr = alloc_record (unat_sprel);
1990 ptr->r.record.p.spoff = offset / 4;
1994 static unw_rec_list *
1997 unw_rec_list *ptr = alloc_record (lc_when);
2001 static unw_rec_list *
2005 unw_rec_list *ptr = alloc_record (lc_gr);
2006 ptr->r.record.p.gr = gr;
2010 static unw_rec_list *
2011 output_lc_psprel (offset)
2012 unsigned int offset;
2014 unw_rec_list *ptr = alloc_record (lc_psprel);
2015 ptr->r.record.p.pspoff = offset / 4;
2019 static unw_rec_list *
2020 output_lc_sprel (offset)
2021 unsigned int offset;
2023 unw_rec_list *ptr = alloc_record (lc_sprel);
2024 ptr->r.record.p.spoff = offset / 4;
2028 static unw_rec_list *
2031 unw_rec_list *ptr = alloc_record (fpsr_when);
2035 static unw_rec_list *
2039 unw_rec_list *ptr = alloc_record (fpsr_gr);
2040 ptr->r.record.p.gr = gr;
2044 static unw_rec_list *
2045 output_fpsr_psprel (offset)
2046 unsigned int offset;
2048 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2049 ptr->r.record.p.pspoff = offset / 4;
2053 static unw_rec_list *
2054 output_fpsr_sprel (offset)
2055 unsigned int offset;
2057 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2058 ptr->r.record.p.spoff = offset / 4;
2062 static unw_rec_list *
2063 output_priunat_when_gr ()
2065 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2069 static unw_rec_list *
2070 output_priunat_when_mem ()
2072 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2076 static unw_rec_list *
2077 output_priunat_gr (gr)
2080 unw_rec_list *ptr = alloc_record (priunat_gr);
2081 ptr->r.record.p.gr = gr;
2085 static unw_rec_list *
2086 output_priunat_psprel (offset)
2087 unsigned int offset;
2089 unw_rec_list *ptr = alloc_record (priunat_psprel);
2090 ptr->r.record.p.pspoff = offset / 4;
2094 static unw_rec_list *
2095 output_priunat_sprel (offset)
2096 unsigned int offset;
2098 unw_rec_list *ptr = alloc_record (priunat_sprel);
2099 ptr->r.record.p.spoff = offset / 4;
2103 static unw_rec_list *
2106 unw_rec_list *ptr = alloc_record (bsp_when);
2110 static unw_rec_list *
2114 unw_rec_list *ptr = alloc_record (bsp_gr);
2115 ptr->r.record.p.gr = gr;
2119 static unw_rec_list *
2120 output_bsp_psprel (offset)
2121 unsigned int offset;
2123 unw_rec_list *ptr = alloc_record (bsp_psprel);
2124 ptr->r.record.p.pspoff = offset / 4;
2128 static unw_rec_list *
2129 output_bsp_sprel (offset)
2130 unsigned int offset;
2132 unw_rec_list *ptr = alloc_record (bsp_sprel);
2133 ptr->r.record.p.spoff = offset / 4;
2137 static unw_rec_list *
2138 output_bspstore_when ()
2140 unw_rec_list *ptr = alloc_record (bspstore_when);
2144 static unw_rec_list *
2145 output_bspstore_gr (gr)
2148 unw_rec_list *ptr = alloc_record (bspstore_gr);
2149 ptr->r.record.p.gr = gr;
2153 static unw_rec_list *
2154 output_bspstore_psprel (offset)
2155 unsigned int offset;
2157 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2158 ptr->r.record.p.pspoff = offset / 4;
2162 static unw_rec_list *
2163 output_bspstore_sprel (offset)
2164 unsigned int offset;
2166 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2167 ptr->r.record.p.spoff = offset / 4;
2171 static unw_rec_list *
2174 unw_rec_list *ptr = alloc_record (rnat_when);
2178 static unw_rec_list *
2182 unw_rec_list *ptr = alloc_record (rnat_gr);
2183 ptr->r.record.p.gr = gr;
2187 static unw_rec_list *
2188 output_rnat_psprel (offset)
2189 unsigned int offset;
2191 unw_rec_list *ptr = alloc_record (rnat_psprel);
2192 ptr->r.record.p.pspoff = offset / 4;
2196 static unw_rec_list *
2197 output_rnat_sprel (offset)
2198 unsigned int offset;
2200 unw_rec_list *ptr = alloc_record (rnat_sprel);
2201 ptr->r.record.p.spoff = offset / 4;
2205 static unw_rec_list *
2206 output_unwabi (abi, context)
2208 unsigned long context;
2210 unw_rec_list *ptr = alloc_record (unwabi);
2211 ptr->r.record.p.abi = abi;
2212 ptr->r.record.p.context = context;
2216 static unw_rec_list *
2217 output_epilogue (unsigned long ecount)
2219 unw_rec_list *ptr = alloc_record (epilogue);
2220 ptr->r.record.b.ecount = ecount;
2224 static unw_rec_list *
2225 output_label_state (unsigned long label)
2227 unw_rec_list *ptr = alloc_record (label_state);
2228 ptr->r.record.b.label = label;
2232 static unw_rec_list *
2233 output_copy_state (unsigned long label)
2235 unw_rec_list *ptr = alloc_record (copy_state);
2236 ptr->r.record.b.label = label;
2240 static unw_rec_list *
2241 output_spill_psprel (ab, reg, offset)
2244 unsigned int offset;
2246 unw_rec_list *ptr = alloc_record (spill_psprel);
2247 ptr->r.record.x.ab = ab;
2248 ptr->r.record.x.reg = reg;
2249 ptr->r.record.x.pspoff = offset / 4;
2253 static unw_rec_list *
2254 output_spill_sprel (ab, reg, offset)
2257 unsigned int offset;
2259 unw_rec_list *ptr = alloc_record (spill_sprel);
2260 ptr->r.record.x.ab = ab;
2261 ptr->r.record.x.reg = reg;
2262 ptr->r.record.x.spoff = offset / 4;
2266 static unw_rec_list *
2267 output_spill_psprel_p (ab, reg, offset, predicate)
2270 unsigned int offset;
2271 unsigned int predicate;
2273 unw_rec_list *ptr = alloc_record (spill_psprel_p);
2274 ptr->r.record.x.ab = ab;
2275 ptr->r.record.x.reg = reg;
2276 ptr->r.record.x.pspoff = offset / 4;
2277 ptr->r.record.x.qp = predicate;
2281 static unw_rec_list *
2282 output_spill_sprel_p (ab, reg, offset, predicate)
2285 unsigned int offset;
2286 unsigned int predicate;
2288 unw_rec_list *ptr = alloc_record (spill_sprel_p);
2289 ptr->r.record.x.ab = ab;
2290 ptr->r.record.x.reg = reg;
2291 ptr->r.record.x.spoff = offset / 4;
2292 ptr->r.record.x.qp = predicate;
2296 static unw_rec_list *
2297 output_spill_reg (ab, reg, targ_reg, xy)
2300 unsigned int targ_reg;
2303 unw_rec_list *ptr = alloc_record (spill_reg);
2304 ptr->r.record.x.ab = ab;
2305 ptr->r.record.x.reg = reg;
2306 ptr->r.record.x.treg = targ_reg;
2307 ptr->r.record.x.xy = xy;
2311 static unw_rec_list *
2312 output_spill_reg_p (ab, reg, targ_reg, xy, predicate)
2315 unsigned int targ_reg;
2317 unsigned int predicate;
2319 unw_rec_list *ptr = alloc_record (spill_reg_p);
2320 ptr->r.record.x.ab = ab;
2321 ptr->r.record.x.reg = reg;
2322 ptr->r.record.x.treg = targ_reg;
2323 ptr->r.record.x.xy = xy;
2324 ptr->r.record.x.qp = predicate;
2328 /* Given a unw_rec_list process the correct format with the
2329 specified function. */
2332 process_one_record (ptr, f)
2336 unsigned long fr_mask, gr_mask;
2338 switch (ptr->r.type)
2340 /* This is a dummy record that takes up no space in the output. */
2348 /* These are taken care of by prologue/prologue_gr. */
2353 if (ptr->r.type == prologue_gr)
2354 output_R2_format (f, ptr->r.record.r.grmask,
2355 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2357 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2359 /* Output descriptor(s) for union of register spills (if any). */
2360 gr_mask = ptr->r.record.r.mask.gr_mem;
2361 fr_mask = ptr->r.record.r.mask.fr_mem;
2364 if ((fr_mask & ~0xfUL) == 0)
2365 output_P6_format (f, fr_mem, fr_mask);
2368 output_P5_format (f, gr_mask, fr_mask);
2373 output_P6_format (f, gr_mem, gr_mask);
2374 if (ptr->r.record.r.mask.br_mem)
2375 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2377 /* output imask descriptor if necessary: */
2378 if (ptr->r.record.r.mask.i)
2379 output_P4_format (f, ptr->r.record.r.mask.i,
2380 ptr->r.record.r.imask_size);
2384 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2388 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2389 ptr->r.record.p.size);
2402 output_P3_format (f, ptr->r.type, ptr->r.record.p.gr);
2405 output_P3_format (f, rp_br, ptr->r.record.p.br);
2408 output_P7_format (f, psp_sprel, ptr->r.record.p.spoff, 0);
2416 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2425 output_P7_format (f, ptr->r.type, ptr->r.record.p.pspoff, 0);
2435 case bspstore_sprel:
2437 output_P8_format (f, ptr->r.type, ptr->r.record.p.spoff);
2440 output_P9_format (f, ptr->r.record.p.grmask, ptr->r.record.p.gr);
2443 output_P2_format (f, ptr->r.record.p.brmask, ptr->r.record.p.gr);
2446 as_bad ("spill_mask record unimplemented.");
2448 case priunat_when_gr:
2449 case priunat_when_mem:
2453 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2455 case priunat_psprel:
2457 case bspstore_psprel:
2459 output_P8_format (f, ptr->r.type, ptr->r.record.p.pspoff);
2462 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2465 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2469 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2472 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2473 ptr->r.record.x.reg, ptr->r.record.x.t,
2474 ptr->r.record.x.pspoff);
2477 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2478 ptr->r.record.x.reg, ptr->r.record.x.t,
2479 ptr->r.record.x.spoff);
2482 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2483 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2484 ptr->r.record.x.treg, ptr->r.record.x.t);
2486 case spill_psprel_p:
2487 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2488 ptr->r.record.x.ab, ptr->r.record.x.reg,
2489 ptr->r.record.x.t, ptr->r.record.x.pspoff);
2492 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2493 ptr->r.record.x.ab, ptr->r.record.x.reg,
2494 ptr->r.record.x.t, ptr->r.record.x.spoff);
2497 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2498 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2499 ptr->r.record.x.xy, ptr->r.record.x.treg,
2503 as_bad ("record_type_not_valid");
2508 /* Given a unw_rec_list list, process all the records with
2509 the specified function. */
2511 process_unw_records (list, f)
2516 for (ptr = list; ptr; ptr = ptr->next)
2517 process_one_record (ptr, f);
2520 /* Determine the size of a record list in bytes. */
2522 calc_record_size (list)
2526 process_unw_records (list, count_output);
2530 /* Update IMASK bitmask to reflect the fact that one or more registers
2531 of type TYPE are saved starting at instruction with index T. If N
2532 bits are set in REGMASK, it is assumed that instructions T through
2533 T+N-1 save these registers.
2537 1: instruction saves next fp reg
2538 2: instruction saves next general reg
2539 3: instruction saves next branch reg */
2541 set_imask (region, regmask, t, type)
2542 unw_rec_list *region;
2543 unsigned long regmask;
2547 unsigned char *imask;
2548 unsigned long imask_size;
2552 imask = region->r.record.r.mask.i;
2553 imask_size = region->r.record.r.imask_size;
2556 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2557 imask = xmalloc (imask_size);
2558 memset (imask, 0, imask_size);
2560 region->r.record.r.imask_size = imask_size;
2561 region->r.record.r.mask.i = imask;
2565 pos = 2 * (3 - t % 4);
2568 if (i >= imask_size)
2570 as_bad ("Ignoring attempt to spill beyond end of region");
2574 imask[i] |= (type & 0x3) << pos;
2576 regmask &= (regmask - 1);
2586 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2587 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2588 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2592 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2593 unsigned long slot_addr;
2595 unsigned long first_addr;
2599 unsigned long index = 0;
2601 /* First time we are called, the initial address and frag are invalid. */
2602 if (first_addr == 0)
2605 /* If the two addresses are in different frags, then we need to add in
2606 the remaining size of this frag, and then the entire size of intermediate
2608 while (slot_frag != first_frag)
2610 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2614 /* We can get the final addresses only during and after
2616 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2617 index += 3 * ((first_frag->fr_next->fr_address
2618 - first_frag->fr_address
2619 - first_frag->fr_fix) >> 4);
2622 /* We don't know what the final addresses will be. We try our
2623 best to estimate. */
2624 switch (first_frag->fr_type)
2630 as_fatal ("only constant space allocation is supported");
2636 /* Take alignment into account. Assume the worst case
2637 before relaxation. */
2638 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2642 if (first_frag->fr_symbol)
2644 as_fatal ("only constant offsets are supported");
2648 index += 3 * (first_frag->fr_offset >> 4);
2652 /* Add in the full size of the frag converted to instruction slots. */
2653 index += 3 * (first_frag->fr_fix >> 4);
2654 /* Subtract away the initial part before first_addr. */
2655 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2656 + ((first_addr & 0x3) - (start_addr & 0x3)));
2658 /* Move to the beginning of the next frag. */
2659 first_frag = first_frag->fr_next;
2660 first_addr = (unsigned long) &first_frag->fr_literal;
2663 /* Add in the used part of the last frag. */
2664 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2665 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2669 /* Optimize unwind record directives. */
2671 static unw_rec_list *
2672 optimize_unw_records (list)
2678 /* If the only unwind record is ".prologue" or ".prologue" followed
2679 by ".body", then we can optimize the unwind directives away. */
2680 if (list->r.type == prologue
2681 && (list->next->r.type == endp
2682 || (list->next->r.type == body && list->next->next->r.type == endp)))
2688 /* Given a complete record list, process any records which have
2689 unresolved fields, (ie length counts for a prologue). After
2690 this has been run, all necessary information should be available
2691 within each record to generate an image. */
2694 fixup_unw_records (list, before_relax)
2698 unw_rec_list *ptr, *region = 0;
2699 unsigned long first_addr = 0, rlen = 0, t;
2700 fragS *first_frag = 0;
2702 for (ptr = list; ptr; ptr = ptr->next)
2704 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2705 as_bad (" Insn slot not set in unwind record.");
2706 t = slot_index (ptr->slot_number, ptr->slot_frag,
2707 first_addr, first_frag, before_relax);
2708 switch (ptr->r.type)
2716 unsigned long last_addr = 0;
2717 fragS *last_frag = NULL;
2719 first_addr = ptr->slot_number;
2720 first_frag = ptr->slot_frag;
2721 /* Find either the next body/prologue start, or the end of
2722 the function, and determine the size of the region. */
2723 for (last = ptr->next; last != NULL; last = last->next)
2724 if (last->r.type == prologue || last->r.type == prologue_gr
2725 || last->r.type == body || last->r.type == endp)
2727 last_addr = last->slot_number;
2728 last_frag = last->slot_frag;
2731 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2733 rlen = ptr->r.record.r.rlen = size;
2734 if (ptr->r.type == body)
2735 /* End of region. */
2742 ptr->r.record.b.t = rlen - 1 - t;
2753 case priunat_when_gr:
2754 case priunat_when_mem:
2758 ptr->r.record.p.t = t;
2766 case spill_psprel_p:
2767 ptr->r.record.x.t = t;
2773 as_bad ("frgr_mem record before region record!\n");
2776 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
2777 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
2778 set_imask (region, ptr->r.record.p.frmask, t, 1);
2779 set_imask (region, ptr->r.record.p.grmask, t, 2);
2784 as_bad ("fr_mem record before region record!\n");
2787 region->r.record.r.mask.fr_mem |= ptr->r.record.p.rmask;
2788 set_imask (region, ptr->r.record.p.rmask, t, 1);
2793 as_bad ("gr_mem record before region record!\n");
2796 region->r.record.r.mask.gr_mem |= ptr->r.record.p.rmask;
2797 set_imask (region, ptr->r.record.p.rmask, t, 2);
2802 as_bad ("br_mem record before region record!\n");
2805 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
2806 set_imask (region, ptr->r.record.p.brmask, t, 3);
2812 as_bad ("gr_gr record before region record!\n");
2815 set_imask (region, ptr->r.record.p.grmask, t, 2);
2820 as_bad ("br_gr record before region record!\n");
2823 set_imask (region, ptr->r.record.p.brmask, t, 3);
2832 /* Estimate the size of a frag before relaxing. We only have one type of frag
2833 to handle here, which is the unwind info frag. */
2836 ia64_estimate_size_before_relax (fragS *frag,
2837 asection *segtype ATTRIBUTE_UNUSED)
2842 /* ??? This code is identical to the first part of ia64_convert_frag. */
2843 list = (unw_rec_list *) frag->fr_opcode;
2844 fixup_unw_records (list, 0);
2846 len = calc_record_size (list);
2847 /* pad to pointer-size boundary. */
2848 pad = len % md.pointer_size;
2850 len += md.pointer_size - pad;
2851 /* Add 8 for the header + a pointer for the personality offset. */
2852 size = len + 8 + md.pointer_size;
2854 /* fr_var carries the max_chars that we created the fragment with.
2855 We must, of course, have allocated enough memory earlier. */
2856 assert (frag->fr_var >= size);
2858 return frag->fr_fix + size;
2861 /* This function converts a rs_machine_dependent variant frag into a
2862 normal fill frag with the unwind image from the the record list. */
2864 ia64_convert_frag (fragS *frag)
2870 /* ??? This code is identical to ia64_estimate_size_before_relax. */
2871 list = (unw_rec_list *) frag->fr_opcode;
2872 fixup_unw_records (list, 0);
2874 len = calc_record_size (list);
2875 /* pad to pointer-size boundary. */
2876 pad = len % md.pointer_size;
2878 len += md.pointer_size - pad;
2879 /* Add 8 for the header + a pointer for the personality offset. */
2880 size = len + 8 + md.pointer_size;
2882 /* fr_var carries the max_chars that we created the fragment with.
2883 We must, of course, have allocated enough memory earlier. */
2884 assert (frag->fr_var >= size);
2886 /* Initialize the header area. fr_offset is initialized with
2887 unwind.personality_routine. */
2888 if (frag->fr_offset)
2890 if (md.flags & EF_IA_64_ABI64)
2891 flag_value = (bfd_vma) 3 << 32;
2893 /* 32-bit unwind info block. */
2894 flag_value = (bfd_vma) 0x1003 << 32;
2899 md_number_to_chars (frag->fr_literal,
2900 (((bfd_vma) 1 << 48) /* Version. */
2901 | flag_value /* U & E handler flags. */
2902 | (len / md.pointer_size)), /* Length. */
2905 /* Skip the header. */
2906 vbyte_mem_ptr = frag->fr_literal + 8;
2907 process_unw_records (list, output_vbyte_mem);
2909 /* Fill the padding bytes with zeros. */
2911 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
2912 md.pointer_size - pad);
2914 frag->fr_fix += size;
2915 frag->fr_type = rs_fill;
2917 frag->fr_offset = 0;
2921 convert_expr_to_ab_reg (e, ab, regp)
2928 if (e->X_op != O_register)
2931 reg = e->X_add_number;
2932 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
2935 *regp = reg - REG_GR;
2937 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
2938 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
2941 *regp = reg - REG_FR;
2943 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
2946 *regp = reg - REG_BR;
2953 case REG_PR: *regp = 0; break;
2954 case REG_PSP: *regp = 1; break;
2955 case REG_PRIUNAT: *regp = 2; break;
2956 case REG_BR + 0: *regp = 3; break;
2957 case REG_AR + AR_BSP: *regp = 4; break;
2958 case REG_AR + AR_BSPSTORE: *regp = 5; break;
2959 case REG_AR + AR_RNAT: *regp = 6; break;
2960 case REG_AR + AR_UNAT: *regp = 7; break;
2961 case REG_AR + AR_FPSR: *regp = 8; break;
2962 case REG_AR + AR_PFS: *regp = 9; break;
2963 case REG_AR + AR_LC: *regp = 10; break;
2973 convert_expr_to_xy_reg (e, xy, regp)
2980 if (e->X_op != O_register)
2983 reg = e->X_add_number;
2985 if (/* reg >= REG_GR && */ reg <= (REG_GR + 127))
2988 *regp = reg - REG_GR;
2990 else if (reg >= REG_FR && reg <= (REG_FR + 127))
2993 *regp = reg - REG_FR;
2995 else if (reg >= REG_BR && reg <= (REG_BR + 7))
2998 *regp = reg - REG_BR;
3008 /* The current frag is an alignment frag. */
3009 align_frag = frag_now;
3010 s_align_bytes (arg);
3015 int dummy ATTRIBUTE_UNUSED;
3020 radix = *input_line_pointer++;
3022 if (radix != 'C' && !is_end_of_line[(unsigned char) radix])
3024 as_bad ("Radix `%c' unsupported", *input_line_pointer);
3025 ignore_rest_of_line ();
3030 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3032 dot_special_section (which)
3035 set_section ((char *) special_section_name[which]);
3039 add_unwind_entry (ptr)
3043 unwind.tail->next = ptr;
3048 /* The current entry can in fact be a chain of unwind entries. */
3049 if (unwind.current_entry == NULL)
3050 unwind.current_entry = ptr;
3055 int dummy ATTRIBUTE_UNUSED;
3061 if (e.X_op != O_constant)
3062 as_bad ("Operand to .fframe must be a constant");
3064 add_unwind_entry (output_mem_stack_f (e.X_add_number));
3069 int dummy ATTRIBUTE_UNUSED;
3075 reg = e.X_add_number - REG_GR;
3076 if (e.X_op == O_register && reg < 128)
3078 add_unwind_entry (output_mem_stack_v ());
3079 if (! (unwind.prologue_mask & 2))
3080 add_unwind_entry (output_psp_gr (reg));
3083 as_bad ("First operand to .vframe must be a general register");
3087 dot_vframesp (dummy)
3088 int dummy ATTRIBUTE_UNUSED;
3093 if (e.X_op == O_constant)
3095 add_unwind_entry (output_mem_stack_v ());
3096 add_unwind_entry (output_psp_sprel (e.X_add_number));
3099 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3103 dot_vframepsp (dummy)
3104 int dummy ATTRIBUTE_UNUSED;
3109 if (e.X_op == O_constant)
3111 add_unwind_entry (output_mem_stack_v ());
3112 add_unwind_entry (output_psp_sprel (e.X_add_number));
3115 as_bad ("Operand to .vframepsp must be a constant (psp-relative offset)");
3120 int dummy ATTRIBUTE_UNUSED;
3126 sep = parse_operand (&e1);
3128 as_bad ("No second operand to .save");
3129 sep = parse_operand (&e2);
3131 reg1 = e1.X_add_number;
3132 reg2 = e2.X_add_number - REG_GR;
3134 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3135 if (e1.X_op == O_register)
3137 if (e2.X_op == O_register && reg2 >= 0 && reg2 < 128)
3141 case REG_AR + AR_BSP:
3142 add_unwind_entry (output_bsp_when ());
3143 add_unwind_entry (output_bsp_gr (reg2));
3145 case REG_AR + AR_BSPSTORE:
3146 add_unwind_entry (output_bspstore_when ());
3147 add_unwind_entry (output_bspstore_gr (reg2));
3149 case REG_AR + AR_RNAT:
3150 add_unwind_entry (output_rnat_when ());
3151 add_unwind_entry (output_rnat_gr (reg2));
3153 case REG_AR + AR_UNAT:
3154 add_unwind_entry (output_unat_when ());
3155 add_unwind_entry (output_unat_gr (reg2));
3157 case REG_AR + AR_FPSR:
3158 add_unwind_entry (output_fpsr_when ());
3159 add_unwind_entry (output_fpsr_gr (reg2));
3161 case REG_AR + AR_PFS:
3162 add_unwind_entry (output_pfs_when ());
3163 if (! (unwind.prologue_mask & 4))
3164 add_unwind_entry (output_pfs_gr (reg2));
3166 case REG_AR + AR_LC:
3167 add_unwind_entry (output_lc_when ());
3168 add_unwind_entry (output_lc_gr (reg2));
3171 add_unwind_entry (output_rp_when ());
3172 if (! (unwind.prologue_mask & 8))
3173 add_unwind_entry (output_rp_gr (reg2));
3176 add_unwind_entry (output_preds_when ());
3177 if (! (unwind.prologue_mask & 1))
3178 add_unwind_entry (output_preds_gr (reg2));
3181 add_unwind_entry (output_priunat_when_gr ());
3182 add_unwind_entry (output_priunat_gr (reg2));
3185 as_bad ("First operand not a valid register");
3189 as_bad (" Second operand not a valid register");
3192 as_bad ("First operand not a register");
3197 int dummy ATTRIBUTE_UNUSED;
3200 unsigned long ecount; /* # of _additional_ regions to pop */
3203 sep = parse_operand (&e1);
3204 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3206 as_bad ("First operand to .restore must be stack pointer (sp)");
3212 parse_operand (&e2);
3213 if (e2.X_op != O_constant || e2.X_add_number < 0)
3215 as_bad ("Second operand to .restore must be a constant >= 0");
3218 ecount = e2.X_add_number;
3221 ecount = unwind.prologue_count - 1;
3223 if (ecount >= unwind.prologue_count)
3225 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3226 ecount + 1, unwind.prologue_count);
3230 add_unwind_entry (output_epilogue (ecount));
3232 if (ecount < unwind.prologue_count)
3233 unwind.prologue_count -= ecount + 1;
3235 unwind.prologue_count = 0;
3239 dot_restorereg (dummy)
3240 int dummy ATTRIBUTE_UNUSED;
3242 unsigned int ab, reg;
3247 if (!convert_expr_to_ab_reg (&e, &ab, ®))
3249 as_bad ("First operand to .restorereg must be a preserved register");
3252 add_unwind_entry (output_spill_reg (ab, reg, 0, 0));
3256 dot_restorereg_p (dummy)
3257 int dummy ATTRIBUTE_UNUSED;
3259 unsigned int qp, ab, reg;
3263 sep = parse_operand (&e1);
3266 as_bad ("No second operand to .restorereg.p");
3270 parse_operand (&e2);
3272 qp = e1.X_add_number - REG_P;
3273 if (e1.X_op != O_register || qp > 63)
3275 as_bad ("First operand to .restorereg.p must be a predicate");
3279 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3281 as_bad ("Second operand to .restorereg.p must be a preserved register");
3284 add_unwind_entry (output_spill_reg_p (ab, reg, 0, 0, qp));
3287 static char *special_linkonce_name[] =
3289 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3293 start_unwind_section (const segT text_seg, int sec_index)
3296 Use a slightly ugly scheme to derive the unwind section names from
3297 the text section name:
3299 text sect. unwind table sect.
3300 name: name: comments:
3301 ---------- ----------------- --------------------------------
3303 .text.foo .IA_64.unwind.text.foo
3304 .foo .IA_64.unwind.foo
3306 .gnu.linkonce.ia64unw.foo
3307 _info .IA_64.unwind_info gas issues error message (ditto)
3308 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3310 This mapping is done so that:
3312 (a) An object file with unwind info only in .text will use
3313 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3314 This follows the letter of the ABI and also ensures backwards
3315 compatibility with older toolchains.
3317 (b) An object file with unwind info in multiple text sections
3318 will use separate unwind sections for each text section.
3319 This allows us to properly set the "sh_info" and "sh_link"
3320 fields in SHT_IA_64_UNWIND as required by the ABI and also
3321 lets GNU ld support programs with multiple segments
3322 containing unwind info (as might be the case for certain
3323 embedded applications).
3325 (c) An error is issued if there would be a name clash.
3328 const char *text_name, *sec_text_name;
3330 const char *prefix = special_section_name [sec_index];
3332 size_t prefix_len, suffix_len, sec_name_len;
3334 sec_text_name = segment_name (text_seg);
3335 text_name = sec_text_name;
3336 if (strncmp (text_name, "_info", 5) == 0)
3338 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3340 ignore_rest_of_line ();
3343 if (strcmp (text_name, ".text") == 0)
3346 /* Build the unwind section name by appending the (possibly stripped)
3347 text section name to the unwind prefix. */
3349 if (strncmp (text_name, ".gnu.linkonce.t.",
3350 sizeof (".gnu.linkonce.t.") - 1) == 0)
3352 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3353 suffix += sizeof (".gnu.linkonce.t.") - 1;
3356 prefix_len = strlen (prefix);
3357 suffix_len = strlen (suffix);
3358 sec_name_len = prefix_len + suffix_len;
3359 sec_name = alloca (sec_name_len + 1);
3360 memcpy (sec_name, prefix, prefix_len);
3361 memcpy (sec_name + prefix_len, suffix, suffix_len);
3362 sec_name [sec_name_len] = '\0';
3364 /* Handle COMDAT group. */
3365 if (suffix == text_name && (text_seg->flags & SEC_LINK_ONCE) != 0)
3368 size_t len, group_name_len;
3369 const char *group_name = elf_group_name (text_seg);
3371 if (group_name == NULL)
3373 as_bad ("Group section `%s' has no group signature",
3375 ignore_rest_of_line ();
3378 /* We have to construct a fake section directive. */
3379 group_name_len = strlen (group_name);
3381 + 16 /* ,"aG",@progbits, */
3382 + group_name_len /* ,group_name */
3385 section = alloca (len + 1);
3386 memcpy (section, sec_name, sec_name_len);
3387 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3388 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3389 memcpy (section + len - 7, ",comdat", 7);
3390 section [len] = '\0';
3391 set_section (section);
3395 set_section (sec_name);
3396 bfd_set_section_flags (stdoutput, now_seg,
3397 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3402 generate_unwind_image (const segT text_seg)
3407 /* Mark the end of the unwind info, so that we can compute the size of the
3408 last unwind region. */
3409 add_unwind_entry (output_endp ());
3411 /* Force out pending instructions, to make sure all unwind records have
3412 a valid slot_number field. */
3413 ia64_flush_insns ();
3415 /* Generate the unwind record. */
3416 list = optimize_unw_records (unwind.list);
3417 fixup_unw_records (list, 1);
3418 size = calc_record_size (list);
3420 if (size > 0 || unwind.force_unwind_entry)
3422 unwind.force_unwind_entry = 0;
3423 /* pad to pointer-size boundary. */
3424 pad = size % md.pointer_size;
3426 size += md.pointer_size - pad;
3427 /* Add 8 for the header + a pointer for the personality
3429 size += 8 + md.pointer_size;
3432 /* If there are unwind records, switch sections, and output the info. */
3436 bfd_reloc_code_real_type reloc;
3438 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
3440 /* Make sure the section has 4 byte alignment for ILP32 and
3441 8 byte alignment for LP64. */
3442 frag_align (md.pointer_size_shift, 0, 0);
3443 record_alignment (now_seg, md.pointer_size_shift);
3445 /* Set expression which points to start of unwind descriptor area. */
3446 unwind.info = expr_build_dot ();
3448 frag_var (rs_machine_dependent, size, size, 0, 0,
3449 (offsetT) unwind.personality_routine, (char *) list);
3451 /* Add the personality address to the image. */
3452 if (unwind.personality_routine != 0)
3454 exp.X_op = O_symbol;
3455 exp.X_add_symbol = unwind.personality_routine;
3456 exp.X_add_number = 0;
3458 if (md.flags & EF_IA_64_BE)
3460 if (md.flags & EF_IA_64_ABI64)
3461 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3463 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3467 if (md.flags & EF_IA_64_ABI64)
3468 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3470 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3473 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3474 md.pointer_size, &exp, 0, reloc);
3475 unwind.personality_routine = 0;
3479 free_saved_prologue_counts ();
3480 unwind.list = unwind.tail = unwind.current_entry = NULL;
3484 dot_handlerdata (dummy)
3485 int dummy ATTRIBUTE_UNUSED;
3487 unwind.force_unwind_entry = 1;
3489 /* Remember which segment we're in so we can switch back after .endp */
3490 unwind.saved_text_seg = now_seg;
3491 unwind.saved_text_subseg = now_subseg;
3493 /* Generate unwind info into unwind-info section and then leave that
3494 section as the currently active one so dataXX directives go into
3495 the language specific data area of the unwind info block. */
3496 generate_unwind_image (now_seg);
3497 demand_empty_rest_of_line ();
3501 dot_unwentry (dummy)
3502 int dummy ATTRIBUTE_UNUSED;
3504 unwind.force_unwind_entry = 1;
3505 demand_empty_rest_of_line ();
3510 int dummy ATTRIBUTE_UNUSED;
3516 reg = e.X_add_number - REG_BR;
3517 if (e.X_op == O_register && reg < 8)
3518 add_unwind_entry (output_rp_br (reg));
3520 as_bad ("First operand not a valid branch register");
3524 dot_savemem (psprel)
3531 sep = parse_operand (&e1);
3533 as_bad ("No second operand to .save%ssp", psprel ? "p" : "");
3534 sep = parse_operand (&e2);
3536 reg1 = e1.X_add_number;
3537 val = e2.X_add_number;
3539 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3540 if (e1.X_op == O_register)
3542 if (e2.X_op == O_constant)
3546 case REG_AR + AR_BSP:
3547 add_unwind_entry (output_bsp_when ());
3548 add_unwind_entry ((psprel
3550 : output_bsp_sprel) (val));
3552 case REG_AR + AR_BSPSTORE:
3553 add_unwind_entry (output_bspstore_when ());
3554 add_unwind_entry ((psprel
3555 ? output_bspstore_psprel
3556 : output_bspstore_sprel) (val));
3558 case REG_AR + AR_RNAT:
3559 add_unwind_entry (output_rnat_when ());
3560 add_unwind_entry ((psprel
3561 ? output_rnat_psprel
3562 : output_rnat_sprel) (val));
3564 case REG_AR + AR_UNAT:
3565 add_unwind_entry (output_unat_when ());
3566 add_unwind_entry ((psprel
3567 ? output_unat_psprel
3568 : output_unat_sprel) (val));
3570 case REG_AR + AR_FPSR:
3571 add_unwind_entry (output_fpsr_when ());
3572 add_unwind_entry ((psprel
3573 ? output_fpsr_psprel
3574 : output_fpsr_sprel) (val));
3576 case REG_AR + AR_PFS:
3577 add_unwind_entry (output_pfs_when ());
3578 add_unwind_entry ((psprel
3580 : output_pfs_sprel) (val));
3582 case REG_AR + AR_LC:
3583 add_unwind_entry (output_lc_when ());
3584 add_unwind_entry ((psprel
3586 : output_lc_sprel) (val));
3589 add_unwind_entry (output_rp_when ());
3590 add_unwind_entry ((psprel
3592 : output_rp_sprel) (val));
3595 add_unwind_entry (output_preds_when ());
3596 add_unwind_entry ((psprel
3597 ? output_preds_psprel
3598 : output_preds_sprel) (val));
3601 add_unwind_entry (output_priunat_when_mem ());
3602 add_unwind_entry ((psprel
3603 ? output_priunat_psprel
3604 : output_priunat_sprel) (val));
3607 as_bad ("First operand not a valid register");
3611 as_bad (" Second operand not a valid constant");
3614 as_bad ("First operand not a register");
3619 int dummy ATTRIBUTE_UNUSED;
3623 sep = parse_operand (&e1);
3625 parse_operand (&e2);
3627 if (e1.X_op != O_constant)
3628 as_bad ("First operand to .save.g must be a constant.");
3631 int grmask = e1.X_add_number;
3633 add_unwind_entry (output_gr_mem (grmask));
3636 int reg = e2.X_add_number - REG_GR;
3637 if (e2.X_op == O_register && reg >= 0 && reg < 128)
3638 add_unwind_entry (output_gr_gr (grmask, reg));
3640 as_bad ("Second operand is an invalid register.");
3647 int dummy ATTRIBUTE_UNUSED;
3651 sep = parse_operand (&e1);
3653 if (e1.X_op != O_constant)
3654 as_bad ("Operand to .save.f must be a constant.");
3656 add_unwind_entry (output_fr_mem (e1.X_add_number));
3661 int dummy ATTRIBUTE_UNUSED;
3668 sep = parse_operand (&e1);
3669 if (e1.X_op != O_constant)
3671 as_bad ("First operand to .save.b must be a constant.");
3674 brmask = e1.X_add_number;
3678 sep = parse_operand (&e2);
3679 reg = e2.X_add_number - REG_GR;
3680 if (e2.X_op != O_register || reg > 127)
3682 as_bad ("Second operand to .save.b must be a general register.");
3685 add_unwind_entry (output_br_gr (brmask, e2.X_add_number));
3688 add_unwind_entry (output_br_mem (brmask));
3690 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3691 demand_empty_rest_of_line ();
3696 int dummy ATTRIBUTE_UNUSED;
3700 sep = parse_operand (&e1);
3702 parse_operand (&e2);
3704 if (e1.X_op != O_constant || sep != ',' || e2.X_op != O_constant)
3705 as_bad ("Both operands of .save.gf must be constants.");
3708 int grmask = e1.X_add_number;
3709 int frmask = e2.X_add_number;
3710 add_unwind_entry (output_frgr_mem (grmask, frmask));
3716 int dummy ATTRIBUTE_UNUSED;
3721 sep = parse_operand (&e);
3722 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3723 demand_empty_rest_of_line ();
3725 if (e.X_op != O_constant)
3726 as_bad ("Operand to .spill must be a constant");
3728 add_unwind_entry (output_spill_base (e.X_add_number));
3732 dot_spillreg (dummy)
3733 int dummy ATTRIBUTE_UNUSED;
3735 int sep, ab, xy, reg, treg;
3738 sep = parse_operand (&e1);
3741 as_bad ("No second operand to .spillreg");
3745 parse_operand (&e2);
3747 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3749 as_bad ("First operand to .spillreg must be a preserved register");
3753 if (!convert_expr_to_xy_reg (&e2, &xy, &treg))
3755 as_bad ("Second operand to .spillreg must be a register");
3759 add_unwind_entry (output_spill_reg (ab, reg, treg, xy));
3763 dot_spillmem (psprel)
3769 sep = parse_operand (&e1);
3772 as_bad ("Second operand missing");
3776 parse_operand (&e2);
3778 if (!convert_expr_to_ab_reg (&e1, &ab, ®))
3780 as_bad ("First operand to .spill%s must be a preserved register",
3781 psprel ? "psp" : "sp");
3785 if (e2.X_op != O_constant)
3787 as_bad ("Second operand to .spill%s must be a constant",
3788 psprel ? "psp" : "sp");
3793 add_unwind_entry (output_spill_psprel (ab, reg, e2.X_add_number));
3795 add_unwind_entry (output_spill_sprel (ab, reg, e2.X_add_number));
3799 dot_spillreg_p (dummy)
3800 int dummy ATTRIBUTE_UNUSED;
3802 int sep, ab, xy, reg, treg;
3803 expressionS e1, e2, e3;
3806 sep = parse_operand (&e1);
3809 as_bad ("No second and third operand to .spillreg.p");
3813 sep = parse_operand (&e2);
3816 as_bad ("No third operand to .spillreg.p");
3820 parse_operand (&e3);
3822 qp = e1.X_add_number - REG_P;
3824 if (e1.X_op != O_register || qp > 63)
3826 as_bad ("First operand to .spillreg.p must be a predicate");
3830 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3832 as_bad ("Second operand to .spillreg.p must be a preserved register");
3836 if (!convert_expr_to_xy_reg (&e3, &xy, &treg))
3838 as_bad ("Third operand to .spillreg.p must be a register");
3842 add_unwind_entry (output_spill_reg_p (ab, reg, treg, xy, qp));
3846 dot_spillmem_p (psprel)
3849 expressionS e1, e2, e3;
3853 sep = parse_operand (&e1);
3856 as_bad ("Second operand missing");
3860 parse_operand (&e2);
3863 as_bad ("Second operand missing");
3867 parse_operand (&e3);
3869 qp = e1.X_add_number - REG_P;
3870 if (e1.X_op != O_register || qp > 63)
3872 as_bad ("First operand to .spill%s_p must be a predicate",
3873 psprel ? "psp" : "sp");
3877 if (!convert_expr_to_ab_reg (&e2, &ab, ®))
3879 as_bad ("Second operand to .spill%s_p must be a preserved register",
3880 psprel ? "psp" : "sp");
3884 if (e3.X_op != O_constant)
3886 as_bad ("Third operand to .spill%s_p must be a constant",
3887 psprel ? "psp" : "sp");
3892 add_unwind_entry (output_spill_psprel_p (ab, reg, e3.X_add_number, qp));
3894 add_unwind_entry (output_spill_sprel_p (ab, reg, e3.X_add_number, qp));
3898 get_saved_prologue_count (lbl)
3901 label_prologue_count *lpc = unwind.saved_prologue_counts;
3903 while (lpc != NULL && lpc->label_number != lbl)
3907 return lpc->prologue_count;
3909 as_bad ("Missing .label_state %ld", lbl);
3914 save_prologue_count (lbl, count)
3918 label_prologue_count *lpc = unwind.saved_prologue_counts;
3920 while (lpc != NULL && lpc->label_number != lbl)
3924 lpc->prologue_count = count;
3927 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
3929 new_lpc->next = unwind.saved_prologue_counts;
3930 new_lpc->label_number = lbl;
3931 new_lpc->prologue_count = count;
3932 unwind.saved_prologue_counts = new_lpc;
3937 free_saved_prologue_counts ()
3939 label_prologue_count *lpc = unwind.saved_prologue_counts;
3940 label_prologue_count *next;
3949 unwind.saved_prologue_counts = NULL;
3953 dot_label_state (dummy)
3954 int dummy ATTRIBUTE_UNUSED;
3959 if (e.X_op != O_constant)
3961 as_bad ("Operand to .label_state must be a constant");
3964 add_unwind_entry (output_label_state (e.X_add_number));
3965 save_prologue_count (e.X_add_number, unwind.prologue_count);
3969 dot_copy_state (dummy)
3970 int dummy ATTRIBUTE_UNUSED;
3975 if (e.X_op != O_constant)
3977 as_bad ("Operand to .copy_state must be a constant");
3980 add_unwind_entry (output_copy_state (e.X_add_number));
3981 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
3986 int dummy ATTRIBUTE_UNUSED;
3991 sep = parse_operand (&e1);
3994 as_bad ("Second operand to .unwabi missing");
3997 sep = parse_operand (&e2);
3998 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
3999 demand_empty_rest_of_line ();
4001 if (e1.X_op != O_constant)
4003 as_bad ("First operand to .unwabi must be a constant");
4007 if (e2.X_op != O_constant)
4009 as_bad ("Second operand to .unwabi must be a constant");
4013 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number));
4017 dot_personality (dummy)
4018 int dummy ATTRIBUTE_UNUSED;
4022 name = input_line_pointer;
4023 c = get_symbol_end ();
4024 p = input_line_pointer;
4025 unwind.personality_routine = symbol_find_or_make (name);
4026 unwind.force_unwind_entry = 1;
4029 demand_empty_rest_of_line ();
4034 int dummy ATTRIBUTE_UNUSED;
4039 unwind.proc_start = expr_build_dot ();
4040 /* Parse names of main and alternate entry points and mark them as
4041 function symbols: */
4045 name = input_line_pointer;
4046 c = get_symbol_end ();
4047 p = input_line_pointer;
4048 sym = symbol_find_or_make (name);
4049 if (unwind.proc_start == 0)
4051 unwind.proc_start = sym;
4053 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4056 if (*input_line_pointer != ',')
4058 ++input_line_pointer;
4060 demand_empty_rest_of_line ();
4063 unwind.prologue_count = 0;
4064 unwind.list = unwind.tail = unwind.current_entry = NULL;
4065 unwind.personality_routine = 0;
4070 int dummy ATTRIBUTE_UNUSED;
4072 unwind.prologue = 0;
4073 unwind.prologue_mask = 0;
4075 add_unwind_entry (output_body ());
4076 demand_empty_rest_of_line ();
4080 dot_prologue (dummy)
4081 int dummy ATTRIBUTE_UNUSED;
4084 int mask = 0, grsave = 0;
4086 if (!is_it_end_of_statement ())
4089 sep = parse_operand (&e1);
4091 as_bad ("No second operand to .prologue");
4092 sep = parse_operand (&e2);
4093 if (!is_end_of_line[sep] && !is_it_end_of_statement ())
4094 demand_empty_rest_of_line ();
4096 if (e1.X_op == O_constant)
4098 mask = e1.X_add_number;
4100 if (e2.X_op == O_constant)
4101 grsave = e2.X_add_number;
4102 else if (e2.X_op == O_register
4103 && (grsave = e2.X_add_number - REG_GR) < 128)
4106 as_bad ("Second operand not a constant or general register");
4108 add_unwind_entry (output_prologue_gr (mask, grsave));
4111 as_bad ("First operand not a constant");
4114 add_unwind_entry (output_prologue ());
4116 unwind.prologue = 1;
4117 unwind.prologue_mask = mask;
4118 ++unwind.prologue_count;
4123 int dummy ATTRIBUTE_UNUSED;
4127 int bytes_per_address;
4130 subsegT saved_subseg;
4134 if (unwind.saved_text_seg)
4136 saved_seg = unwind.saved_text_seg;
4137 saved_subseg = unwind.saved_text_subseg;
4138 unwind.saved_text_seg = NULL;
4142 saved_seg = now_seg;
4143 saved_subseg = now_subseg;
4146 insn_group_break (1, 0, 0);
4148 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4150 generate_unwind_image (saved_seg);
4152 if (unwind.info || unwind.force_unwind_entry)
4154 subseg_set (md.last_text_seg, 0);
4155 unwind.proc_end = expr_build_dot ();
4157 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
4159 /* Make sure that section has 4 byte alignment for ILP32 and
4160 8 byte alignment for LP64. */
4161 record_alignment (now_seg, md.pointer_size_shift);
4163 /* Need space for 3 pointers for procedure start, procedure end,
4165 ptr = frag_more (3 * md.pointer_size);
4166 where = frag_now_fix () - (3 * md.pointer_size);
4167 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4169 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4170 e.X_op = O_pseudo_fixup;
4171 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4173 e.X_add_symbol = unwind.proc_start;
4174 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4176 e.X_op = O_pseudo_fixup;
4177 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4179 e.X_add_symbol = unwind.proc_end;
4180 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4181 bytes_per_address, &e);
4185 e.X_op = O_pseudo_fixup;
4186 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4188 e.X_add_symbol = unwind.info;
4189 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4190 bytes_per_address, &e);
4193 md_number_to_chars (ptr + (bytes_per_address * 2), 0,
4197 subseg_set (saved_seg, saved_subseg);
4199 /* Parse names of main and alternate entry points and set symbol sizes. */
4203 name = input_line_pointer;
4204 c = get_symbol_end ();
4205 p = input_line_pointer;
4206 sym = symbol_find (name);
4207 if (sym && unwind.proc_start
4208 && (symbol_get_bfdsym (sym)->flags & BSF_FUNCTION)
4209 && S_GET_SIZE (sym) == 0 && symbol_get_obj (sym)->size == NULL)
4211 fragS *fr = symbol_get_frag (unwind.proc_start);
4212 fragS *frag = symbol_get_frag (sym);
4214 /* Check whether the function label is at or beyond last
4216 while (fr && fr != frag)
4220 if (frag == frag_now && SEG_NORMAL (now_seg))
4221 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4224 symbol_get_obj (sym)->size =
4225 (expressionS *) xmalloc (sizeof (expressionS));
4226 symbol_get_obj (sym)->size->X_op = O_subtract;
4227 symbol_get_obj (sym)->size->X_add_symbol
4228 = symbol_new (FAKE_LABEL_NAME, now_seg,
4229 frag_now_fix (), frag_now);
4230 symbol_get_obj (sym)->size->X_op_symbol = sym;
4231 symbol_get_obj (sym)->size->X_add_number = 0;
4237 if (*input_line_pointer != ',')
4239 ++input_line_pointer;
4241 demand_empty_rest_of_line ();
4242 unwind.proc_start = unwind.proc_end = unwind.info = 0;
4246 dot_template (template)
4249 CURR_SLOT.user_template = template;
4254 int dummy ATTRIBUTE_UNUSED;
4256 int ins, locs, outs, rots;
4258 if (is_it_end_of_statement ())
4259 ins = locs = outs = rots = 0;
4262 ins = get_absolute_expression ();
4263 if (*input_line_pointer++ != ',')
4265 locs = get_absolute_expression ();
4266 if (*input_line_pointer++ != ',')
4268 outs = get_absolute_expression ();
4269 if (*input_line_pointer++ != ',')
4271 rots = get_absolute_expression ();
4273 set_regstack (ins, locs, outs, rots);
4277 as_bad ("Comma expected");
4278 ignore_rest_of_line ();
4285 unsigned num_regs, num_alloced = 0;
4286 struct dynreg **drpp, *dr;
4287 int ch, base_reg = 0;
4293 case DYNREG_GR: base_reg = REG_GR + 32; break;
4294 case DYNREG_FR: base_reg = REG_FR + 32; break;
4295 case DYNREG_PR: base_reg = REG_P + 16; break;
4299 /* First, remove existing names from hash table. */
4300 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4302 hash_delete (md.dynreg_hash, dr->name);
4306 drpp = &md.dynreg[type];
4309 start = input_line_pointer;
4310 ch = get_symbol_end ();
4311 *input_line_pointer = ch;
4312 len = (input_line_pointer - start);
4315 if (*input_line_pointer != '[')
4317 as_bad ("Expected '['");
4320 ++input_line_pointer; /* skip '[' */
4322 num_regs = get_absolute_expression ();
4324 if (*input_line_pointer++ != ']')
4326 as_bad ("Expected ']'");
4331 num_alloced += num_regs;
4335 if (num_alloced > md.rot.num_regs)
4337 as_bad ("Used more than the declared %d rotating registers",
4343 if (num_alloced > 96)
4345 as_bad ("Used more than the available 96 rotating registers");
4350 if (num_alloced > 48)
4352 as_bad ("Used more than the available 48 rotating registers");
4361 name = obstack_alloc (¬es, len + 1);
4362 memcpy (name, start, len);
4367 *drpp = obstack_alloc (¬es, sizeof (*dr));
4368 memset (*drpp, 0, sizeof (*dr));
4373 dr->num_regs = num_regs;
4374 dr->base = base_reg;
4376 base_reg += num_regs;
4378 if (hash_insert (md.dynreg_hash, name, dr))
4380 as_bad ("Attempt to redefine register set `%s'", name);
4384 if (*input_line_pointer != ',')
4386 ++input_line_pointer; /* skip comma */
4389 demand_empty_rest_of_line ();
4393 ignore_rest_of_line ();
4397 dot_byteorder (byteorder)
4400 segment_info_type *seginfo = seg_info (now_seg);
4402 if (byteorder == -1)
4404 if (seginfo->tc_segment_info_data.endian == 0)
4405 seginfo->tc_segment_info_data.endian
4406 = TARGET_BYTES_BIG_ENDIAN ? 1 : 2;
4407 byteorder = seginfo->tc_segment_info_data.endian == 1;
4410 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4412 if (target_big_endian != byteorder)
4414 target_big_endian = byteorder;
4415 if (target_big_endian)
4417 ia64_number_to_chars = number_to_chars_bigendian;
4418 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4422 ia64_number_to_chars = number_to_chars_littleendian;
4423 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4430 int dummy ATTRIBUTE_UNUSED;
4437 option = input_line_pointer;
4438 ch = get_symbol_end ();
4439 if (strcmp (option, "lsb") == 0)
4440 md.flags &= ~EF_IA_64_BE;
4441 else if (strcmp (option, "msb") == 0)
4442 md.flags |= EF_IA_64_BE;
4443 else if (strcmp (option, "abi32") == 0)
4444 md.flags &= ~EF_IA_64_ABI64;
4445 else if (strcmp (option, "abi64") == 0)
4446 md.flags |= EF_IA_64_ABI64;
4448 as_bad ("Unknown psr option `%s'", option);
4449 *input_line_pointer = ch;
4452 if (*input_line_pointer != ',')
4455 ++input_line_pointer;
4458 demand_empty_rest_of_line ();
4463 int dummy ATTRIBUTE_UNUSED;
4465 new_logical_line (0, get_absolute_expression ());
4466 demand_empty_rest_of_line ();
4470 parse_section_name ()
4476 if (*input_line_pointer != '"')
4478 as_bad ("Missing section name");
4479 ignore_rest_of_line ();
4482 name = demand_copy_C_string (&len);
4485 ignore_rest_of_line ();
4489 if (*input_line_pointer != ',')
4491 as_bad ("Comma expected after section name");
4492 ignore_rest_of_line ();
4495 ++input_line_pointer; /* skip comma */
4503 char *name = parse_section_name ();
4507 md.keep_pending_output = 1;
4510 obj_elf_previous (0);
4511 md.keep_pending_output = 0;
4514 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
4517 stmt_float_cons (kind)
4538 ia64_do_align (alignment);
4546 int saved_auto_align = md.auto_align;
4550 md.auto_align = saved_auto_align;
4554 dot_xfloat_cons (kind)
4557 char *name = parse_section_name ();
4561 md.keep_pending_output = 1;
4563 stmt_float_cons (kind);
4564 obj_elf_previous (0);
4565 md.keep_pending_output = 0;
4569 dot_xstringer (zero)
4572 char *name = parse_section_name ();
4576 md.keep_pending_output = 1;
4579 obj_elf_previous (0);
4580 md.keep_pending_output = 0;
4587 int saved_auto_align = md.auto_align;
4588 char *name = parse_section_name ();
4592 md.keep_pending_output = 1;
4596 md.auto_align = saved_auto_align;
4597 obj_elf_previous (0);
4598 md.keep_pending_output = 0;
4602 dot_xfloat_cons_ua (kind)
4605 int saved_auto_align = md.auto_align;
4606 char *name = parse_section_name ();
4610 md.keep_pending_output = 1;
4613 stmt_float_cons (kind);
4614 md.auto_align = saved_auto_align;
4615 obj_elf_previous (0);
4616 md.keep_pending_output = 0;
4619 /* .reg.val <regname>,value */
4623 int dummy ATTRIBUTE_UNUSED;
4628 if (reg.X_op != O_register)
4630 as_bad (_("Register name expected"));
4631 ignore_rest_of_line ();
4633 else if (*input_line_pointer++ != ',')
4635 as_bad (_("Comma expected"));
4636 ignore_rest_of_line ();
4640 valueT value = get_absolute_expression ();
4641 int regno = reg.X_add_number;
4642 if (regno < REG_GR || regno > REG_GR + 128)
4643 as_warn (_("Register value annotation ignored"));
4646 gr_values[regno - REG_GR].known = 1;
4647 gr_values[regno - REG_GR].value = value;
4648 gr_values[regno - REG_GR].path = md.path;
4651 demand_empty_rest_of_line ();
4654 /* select dv checking mode
4659 A stop is inserted when changing modes
4666 if (md.manual_bundling)
4667 as_warn (_("Directive invalid within a bundle"));
4669 if (type == 'E' || type == 'A')
4670 md.mode_explicitly_set = 0;
4672 md.mode_explicitly_set = 1;
4679 if (md.explicit_mode)
4680 insn_group_break (1, 0, 0);
4681 md.explicit_mode = 0;
4685 if (!md.explicit_mode)
4686 insn_group_break (1, 0, 0);
4687 md.explicit_mode = 1;
4691 if (md.explicit_mode != md.default_explicit_mode)
4692 insn_group_break (1, 0, 0);
4693 md.explicit_mode = md.default_explicit_mode;
4694 md.mode_explicitly_set = 0;
4705 for (regno = 0; regno < 64; regno++)
4707 if (mask & ((valueT) 1 << regno))
4709 fprintf (stderr, "%s p%d", comma, regno);
4716 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear")
4717 .pred.rel.imply p1, p2 (also .pred.rel "imply")
4718 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex")
4719 .pred.safe_across_calls p1 [, p2 [,...]]
4728 int p1 = -1, p2 = -1;
4732 if (*input_line_pointer != '"')
4734 as_bad (_("Missing predicate relation type"));
4735 ignore_rest_of_line ();
4741 char *form = demand_copy_C_string (&len);
4742 if (strcmp (form, "mutex") == 0)
4744 else if (strcmp (form, "clear") == 0)
4746 else if (strcmp (form, "imply") == 0)
4750 as_bad (_("Unrecognized predicate relation type"));
4751 ignore_rest_of_line ();
4755 if (*input_line_pointer == ',')
4756 ++input_line_pointer;
4766 if (TOUPPER (*input_line_pointer) != 'P'
4767 || (regno = atoi (++input_line_pointer)) < 0
4770 as_bad (_("Predicate register expected"));
4771 ignore_rest_of_line ();
4774 while (ISDIGIT (*input_line_pointer))
4775 ++input_line_pointer;
4782 as_warn (_("Duplicate predicate register ignored"));
4785 /* See if it's a range. */
4786 if (*input_line_pointer == '-')
4789 ++input_line_pointer;
4791 if (TOUPPER (*input_line_pointer) != 'P'
4792 || (regno = atoi (++input_line_pointer)) < 0
4795 as_bad (_("Predicate register expected"));
4796 ignore_rest_of_line ();
4799 while (ISDIGIT (*input_line_pointer))
4800 ++input_line_pointer;
4804 as_bad (_("Bad register range"));
4805 ignore_rest_of_line ();
4816 if (*input_line_pointer != ',')
4818 ++input_line_pointer;
4827 clear_qp_mutex (mask);
4828 clear_qp_implies (mask, (valueT) 0);
4831 if (count != 2 || p1 == -1 || p2 == -1)
4832 as_bad (_("Predicate source and target required"));
4833 else if (p1 == 0 || p2 == 0)
4834 as_bad (_("Use of p0 is not valid in this context"));
4836 add_qp_imply (p1, p2);
4841 as_bad (_("At least two PR arguments expected"));
4846 as_bad (_("Use of p0 is not valid in this context"));
4849 add_qp_mutex (mask);
4852 /* note that we don't override any existing relations */
4855 as_bad (_("At least one PR argument expected"));
4860 fprintf (stderr, "Safe across calls: ");
4861 print_prmask (mask);
4862 fprintf (stderr, "\n");
4864 qp_safe_across_calls = mask;
4867 demand_empty_rest_of_line ();
4870 /* .entry label [, label [, ...]]
4871 Hint to DV code that the given labels are to be considered entry points.
4872 Otherwise, only global labels are considered entry points. */
4876 int dummy ATTRIBUTE_UNUSED;
4885 name = input_line_pointer;
4886 c = get_symbol_end ();
4887 symbolP = symbol_find_or_make (name);
4889 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
4891 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
4894 *input_line_pointer = c;
4896 c = *input_line_pointer;
4899 input_line_pointer++;
4901 if (*input_line_pointer == '\n')
4907 demand_empty_rest_of_line ();
4910 /* .mem.offset offset, base
4911 "base" is used to distinguish between offsets from a different base. */
4914 dot_mem_offset (dummy)
4915 int dummy ATTRIBUTE_UNUSED;
4917 md.mem_offset.hint = 1;
4918 md.mem_offset.offset = get_absolute_expression ();
4919 if (*input_line_pointer != ',')
4921 as_bad (_("Comma expected"));
4922 ignore_rest_of_line ();
4925 ++input_line_pointer;
4926 md.mem_offset.base = get_absolute_expression ();
4927 demand_empty_rest_of_line ();
4930 /* ia64-specific pseudo-ops: */
4931 const pseudo_typeS md_pseudo_table[] =
4933 { "radix", dot_radix, 0 },
4934 { "lcomm", s_lcomm_bytes, 1 },
4935 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
4936 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
4937 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
4938 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
4939 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
4940 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
4941 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
4942 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
4943 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
4944 { "proc", dot_proc, 0 },
4945 { "body", dot_body, 0 },
4946 { "prologue", dot_prologue, 0 },
4947 { "endp", dot_endp, 0 },
4949 { "fframe", dot_fframe, 0 },
4950 { "vframe", dot_vframe, 0 },
4951 { "vframesp", dot_vframesp, 0 },
4952 { "vframepsp", dot_vframepsp, 0 },
4953 { "save", dot_save, 0 },
4954 { "restore", dot_restore, 0 },
4955 { "restorereg", dot_restorereg, 0 },
4956 { "restorereg.p", dot_restorereg_p, 0 },
4957 { "handlerdata", dot_handlerdata, 0 },
4958 { "unwentry", dot_unwentry, 0 },
4959 { "altrp", dot_altrp, 0 },
4960 { "savesp", dot_savemem, 0 },
4961 { "savepsp", dot_savemem, 1 },
4962 { "save.g", dot_saveg, 0 },
4963 { "save.f", dot_savef, 0 },
4964 { "save.b", dot_saveb, 0 },
4965 { "save.gf", dot_savegf, 0 },
4966 { "spill", dot_spill, 0 },
4967 { "spillreg", dot_spillreg, 0 },
4968 { "spillsp", dot_spillmem, 0 },
4969 { "spillpsp", dot_spillmem, 1 },
4970 { "spillreg.p", dot_spillreg_p, 0 },
4971 { "spillsp.p", dot_spillmem_p, 0 },
4972 { "spillpsp.p", dot_spillmem_p, 1 },
4973 { "label_state", dot_label_state, 0 },
4974 { "copy_state", dot_copy_state, 0 },
4975 { "unwabi", dot_unwabi, 0 },
4976 { "personality", dot_personality, 0 },
4978 { "estate", dot_estate, 0 },
4980 { "mii", dot_template, 0x0 },
4981 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
4982 { "mlx", dot_template, 0x2 },
4983 { "mmi", dot_template, 0x4 },
4984 { "mfi", dot_template, 0x6 },
4985 { "mmf", dot_template, 0x7 },
4986 { "mib", dot_template, 0x8 },
4987 { "mbb", dot_template, 0x9 },
4988 { "bbb", dot_template, 0xb },
4989 { "mmb", dot_template, 0xc },
4990 { "mfb", dot_template, 0xe },
4992 { "lb", dot_scope, 0 },
4993 { "le", dot_scope, 1 },
4995 { "align", dot_align, 0 },
4996 { "regstk", dot_regstk, 0 },
4997 { "rotr", dot_rot, DYNREG_GR },
4998 { "rotf", dot_rot, DYNREG_FR },
4999 { "rotp", dot_rot, DYNREG_PR },
5000 { "lsb", dot_byteorder, 0 },
5001 { "msb", dot_byteorder, 1 },
5002 { "psr", dot_psr, 0 },
5003 { "alias", dot_alias, 0 },
5004 { "secalias", dot_alias, 1 },
5005 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5007 { "xdata1", dot_xdata, 1 },
5008 { "xdata2", dot_xdata, 2 },
5009 { "xdata4", dot_xdata, 4 },
5010 { "xdata8", dot_xdata, 8 },
5011 { "xreal4", dot_xfloat_cons, 'f' },
5012 { "xreal8", dot_xfloat_cons, 'd' },
5013 { "xreal10", dot_xfloat_cons, 'x' },
5014 { "xreal16", dot_xfloat_cons, 'X' },
5015 { "xstring", dot_xstringer, 0 },
5016 { "xstringz", dot_xstringer, 1 },
5018 /* unaligned versions: */
5019 { "xdata2.ua", dot_xdata_ua, 2 },
5020 { "xdata4.ua", dot_xdata_ua, 4 },
5021 { "xdata8.ua", dot_xdata_ua, 8 },
5022 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5023 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5024 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5025 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5027 /* annotations/DV checking support */
5028 { "entry", dot_entry, 0 },
5029 { "mem.offset", dot_mem_offset, 0 },
5030 { "pred.rel", dot_pred_rel, 0 },
5031 { "pred.rel.clear", dot_pred_rel, 'c' },
5032 { "pred.rel.imply", dot_pred_rel, 'i' },
5033 { "pred.rel.mutex", dot_pred_rel, 'm' },
5034 { "pred.safe_across_calls", dot_pred_rel, 's' },
5035 { "reg.val", dot_reg_val, 0 },
5036 { "auto", dot_dv_mode, 'a' },
5037 { "explicit", dot_dv_mode, 'e' },
5038 { "default", dot_dv_mode, 'd' },
5040 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5041 IA-64 aligns data allocation pseudo-ops by default, so we have to
5042 tell it that these ones are supposed to be unaligned. Long term,
5043 should rewrite so that only IA-64 specific data allocation pseudo-ops
5044 are aligned by default. */
5045 {"2byte", stmt_cons_ua, 2},
5046 {"4byte", stmt_cons_ua, 4},
5047 {"8byte", stmt_cons_ua, 8},
5052 static const struct pseudo_opcode
5055 void (*handler) (int);
5060 /* these are more like pseudo-ops, but don't start with a dot */
5061 { "data1", cons, 1 },
5062 { "data2", cons, 2 },
5063 { "data4", cons, 4 },
5064 { "data8", cons, 8 },
5065 { "data16", cons, 16 },
5066 { "real4", stmt_float_cons, 'f' },
5067 { "real8", stmt_float_cons, 'd' },
5068 { "real10", stmt_float_cons, 'x' },
5069 { "real16", stmt_float_cons, 'X' },
5070 { "string", stringer, 0 },
5071 { "stringz", stringer, 1 },
5073 /* unaligned versions: */
5074 { "data2.ua", stmt_cons_ua, 2 },
5075 { "data4.ua", stmt_cons_ua, 4 },
5076 { "data8.ua", stmt_cons_ua, 8 },
5077 { "data16.ua", stmt_cons_ua, 16 },
5078 { "real4.ua", float_cons, 'f' },
5079 { "real8.ua", float_cons, 'd' },
5080 { "real10.ua", float_cons, 'x' },
5081 { "real16.ua", float_cons, 'X' },
5084 /* Declare a register by creating a symbol for it and entering it in
5085 the symbol table. */
5088 declare_register (name, regnum)
5095 sym = symbol_new (name, reg_section, regnum, &zero_address_frag);
5097 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5099 as_fatal ("Inserting \"%s\" into register table failed: %s",
5106 declare_register_set (prefix, num_regs, base_regnum)
5114 for (i = 0; i < num_regs; ++i)
5116 sprintf (name, "%s%u", prefix, i);
5117 declare_register (name, base_regnum + i);
5122 operand_width (opnd)
5123 enum ia64_opnd opnd;
5125 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5126 unsigned int bits = 0;
5130 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5131 bits += odesc->field[i].bits;
5136 static enum operand_match_result
5137 operand_match (idesc, index, e)
5138 const struct ia64_opcode *idesc;
5142 enum ia64_opnd opnd = idesc->operands[index];
5143 int bits, relocatable = 0;
5144 struct insn_fix *fix;
5151 case IA64_OPND_AR_CCV:
5152 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5153 return OPERAND_MATCH;
5156 case IA64_OPND_AR_CSD:
5157 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5158 return OPERAND_MATCH;
5161 case IA64_OPND_AR_PFS:
5162 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5163 return OPERAND_MATCH;
5167 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5168 return OPERAND_MATCH;
5172 if (e->X_op == O_register && e->X_add_number == REG_IP)
5173 return OPERAND_MATCH;
5177 if (e->X_op == O_register && e->X_add_number == REG_PR)
5178 return OPERAND_MATCH;
5181 case IA64_OPND_PR_ROT:
5182 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5183 return OPERAND_MATCH;
5187 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5188 return OPERAND_MATCH;
5191 case IA64_OPND_PSR_L:
5192 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5193 return OPERAND_MATCH;
5196 case IA64_OPND_PSR_UM:
5197 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5198 return OPERAND_MATCH;
5202 if (e->X_op == O_constant)
5204 if (e->X_add_number == 1)
5205 return OPERAND_MATCH;
5207 return OPERAND_OUT_OF_RANGE;
5212 if (e->X_op == O_constant)
5214 if (e->X_add_number == 8)
5215 return OPERAND_MATCH;
5217 return OPERAND_OUT_OF_RANGE;
5222 if (e->X_op == O_constant)
5224 if (e->X_add_number == 16)
5225 return OPERAND_MATCH;
5227 return OPERAND_OUT_OF_RANGE;
5231 /* register operands: */
5234 if (e->X_op == O_register && e->X_add_number >= REG_AR
5235 && e->X_add_number < REG_AR + 128)
5236 return OPERAND_MATCH;
5241 if (e->X_op == O_register && e->X_add_number >= REG_BR
5242 && e->X_add_number < REG_BR + 8)
5243 return OPERAND_MATCH;
5247 if (e->X_op == O_register && e->X_add_number >= REG_CR
5248 && e->X_add_number < REG_CR + 128)
5249 return OPERAND_MATCH;
5256 if (e->X_op == O_register && e->X_add_number >= REG_FR
5257 && e->X_add_number < REG_FR + 128)
5258 return OPERAND_MATCH;
5263 if (e->X_op == O_register && e->X_add_number >= REG_P
5264 && e->X_add_number < REG_P + 64)
5265 return OPERAND_MATCH;
5271 if (e->X_op == O_register && e->X_add_number >= REG_GR
5272 && e->X_add_number < REG_GR + 128)
5273 return OPERAND_MATCH;
5276 case IA64_OPND_R3_2:
5277 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5279 if (e->X_add_number < REG_GR + 4)
5280 return OPERAND_MATCH;
5281 else if (e->X_add_number < REG_GR + 128)
5282 return OPERAND_OUT_OF_RANGE;
5286 /* indirect operands: */
5287 case IA64_OPND_CPUID_R3:
5288 case IA64_OPND_DBR_R3:
5289 case IA64_OPND_DTR_R3:
5290 case IA64_OPND_ITR_R3:
5291 case IA64_OPND_IBR_R3:
5292 case IA64_OPND_MSR_R3:
5293 case IA64_OPND_PKR_R3:
5294 case IA64_OPND_PMC_R3:
5295 case IA64_OPND_PMD_R3:
5296 case IA64_OPND_RR_R3:
5297 if (e->X_op == O_index && e->X_op_symbol
5298 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5299 == opnd - IA64_OPND_CPUID_R3))
5300 return OPERAND_MATCH;
5304 if (e->X_op == O_index && !e->X_op_symbol)
5305 return OPERAND_MATCH;
5308 /* immediate operands: */
5309 case IA64_OPND_CNT2a:
5310 case IA64_OPND_LEN4:
5311 case IA64_OPND_LEN6:
5312 bits = operand_width (idesc->operands[index]);
5313 if (e->X_op == O_constant)
5315 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5316 return OPERAND_MATCH;
5318 return OPERAND_OUT_OF_RANGE;
5322 case IA64_OPND_CNT2b:
5323 if (e->X_op == O_constant)
5325 if ((bfd_vma) (e->X_add_number - 1) < 3)
5326 return OPERAND_MATCH;
5328 return OPERAND_OUT_OF_RANGE;
5332 case IA64_OPND_CNT2c:
5333 val = e->X_add_number;
5334 if (e->X_op == O_constant)
5336 if ((val == 0 || val == 7 || val == 15 || val == 16))
5337 return OPERAND_MATCH;
5339 return OPERAND_OUT_OF_RANGE;
5344 /* SOR must be an integer multiple of 8 */
5345 if (e->X_op == O_constant && e->X_add_number & 0x7)
5346 return OPERAND_OUT_OF_RANGE;
5349 if (e->X_op == O_constant)
5351 if ((bfd_vma) e->X_add_number <= 96)
5352 return OPERAND_MATCH;
5354 return OPERAND_OUT_OF_RANGE;
5358 case IA64_OPND_IMMU62:
5359 if (e->X_op == O_constant)
5361 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5362 return OPERAND_MATCH;
5364 return OPERAND_OUT_OF_RANGE;
5368 /* FIXME -- need 62-bit relocation type */
5369 as_bad (_("62-bit relocation not yet implemented"));
5373 case IA64_OPND_IMMU64:
5374 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5375 || e->X_op == O_subtract)
5377 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5378 fix->code = BFD_RELOC_IA64_IMM64;
5379 if (e->X_op != O_subtract)
5381 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5382 if (e->X_op == O_pseudo_fixup)
5386 fix->opnd = idesc->operands[index];
5389 ++CURR_SLOT.num_fixups;
5390 return OPERAND_MATCH;
5392 else if (e->X_op == O_constant)
5393 return OPERAND_MATCH;
5396 case IA64_OPND_CCNT5:
5397 case IA64_OPND_CNT5:
5398 case IA64_OPND_CNT6:
5399 case IA64_OPND_CPOS6a:
5400 case IA64_OPND_CPOS6b:
5401 case IA64_OPND_CPOS6c:
5402 case IA64_OPND_IMMU2:
5403 case IA64_OPND_IMMU7a:
5404 case IA64_OPND_IMMU7b:
5405 case IA64_OPND_IMMU21:
5406 case IA64_OPND_IMMU24:
5407 case IA64_OPND_MBTYPE4:
5408 case IA64_OPND_MHTYPE8:
5409 case IA64_OPND_POS6:
5410 bits = operand_width (idesc->operands[index]);
5411 if (e->X_op == O_constant)
5413 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5414 return OPERAND_MATCH;
5416 return OPERAND_OUT_OF_RANGE;
5420 case IA64_OPND_IMMU9:
5421 bits = operand_width (idesc->operands[index]);
5422 if (e->X_op == O_constant)
5424 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5426 int lobits = e->X_add_number & 0x3;
5427 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5428 e->X_add_number |= (bfd_vma) 0x3;
5429 return OPERAND_MATCH;
5432 return OPERAND_OUT_OF_RANGE;
5436 case IA64_OPND_IMM44:
5437 /* least 16 bits must be zero */
5438 if ((e->X_add_number & 0xffff) != 0)
5439 /* XXX technically, this is wrong: we should not be issuing warning
5440 messages until we're sure this instruction pattern is going to
5442 as_warn (_("lower 16 bits of mask ignored"));
5444 if (e->X_op == O_constant)
5446 if (((e->X_add_number >= 0
5447 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5448 || (e->X_add_number < 0
5449 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5452 if (e->X_add_number >= 0
5453 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5455 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5457 return OPERAND_MATCH;
5460 return OPERAND_OUT_OF_RANGE;
5464 case IA64_OPND_IMM17:
5465 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5466 if (e->X_op == O_constant)
5468 if (((e->X_add_number >= 0
5469 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5470 || (e->X_add_number < 0
5471 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5474 if (e->X_add_number >= 0
5475 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5477 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5479 return OPERAND_MATCH;
5482 return OPERAND_OUT_OF_RANGE;
5486 case IA64_OPND_IMM14:
5487 case IA64_OPND_IMM22:
5489 case IA64_OPND_IMM1:
5490 case IA64_OPND_IMM8:
5491 case IA64_OPND_IMM8U4:
5492 case IA64_OPND_IMM8M1:
5493 case IA64_OPND_IMM8M1U4:
5494 case IA64_OPND_IMM8M1U8:
5495 case IA64_OPND_IMM9a:
5496 case IA64_OPND_IMM9b:
5497 bits = operand_width (idesc->operands[index]);
5498 if (relocatable && (e->X_op == O_symbol
5499 || e->X_op == O_subtract
5500 || e->X_op == O_pseudo_fixup))
5502 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5504 if (idesc->operands[index] == IA64_OPND_IMM14)
5505 fix->code = BFD_RELOC_IA64_IMM14;
5507 fix->code = BFD_RELOC_IA64_IMM22;
5509 if (e->X_op != O_subtract)
5511 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5512 if (e->X_op == O_pseudo_fixup)
5516 fix->opnd = idesc->operands[index];
5519 ++CURR_SLOT.num_fixups;
5520 return OPERAND_MATCH;
5522 else if (e->X_op != O_constant
5523 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
5524 return OPERAND_MISMATCH;
5526 if (opnd == IA64_OPND_IMM8M1U4)
5528 /* Zero is not valid for unsigned compares that take an adjusted
5529 constant immediate range. */
5530 if (e->X_add_number == 0)
5531 return OPERAND_OUT_OF_RANGE;
5533 /* Sign-extend 32-bit unsigned numbers, so that the following range
5534 checks will work. */
5535 val = e->X_add_number;
5536 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5537 && ((val & ((bfd_vma) 1 << 31)) != 0))
5538 val = ((val << 32) >> 32);
5540 /* Check for 0x100000000. This is valid because
5541 0x100000000-1 is the same as ((uint32_t) -1). */
5542 if (val == ((bfd_signed_vma) 1 << 32))
5543 return OPERAND_MATCH;
5547 else if (opnd == IA64_OPND_IMM8M1U8)
5549 /* Zero is not valid for unsigned compares that take an adjusted
5550 constant immediate range. */
5551 if (e->X_add_number == 0)
5552 return OPERAND_OUT_OF_RANGE;
5554 /* Check for 0x10000000000000000. */
5555 if (e->X_op == O_big)
5557 if (generic_bignum[0] == 0
5558 && generic_bignum[1] == 0
5559 && generic_bignum[2] == 0
5560 && generic_bignum[3] == 0
5561 && generic_bignum[4] == 1)
5562 return OPERAND_MATCH;
5564 return OPERAND_OUT_OF_RANGE;
5567 val = e->X_add_number - 1;
5569 else if (opnd == IA64_OPND_IMM8M1)
5570 val = e->X_add_number - 1;
5571 else if (opnd == IA64_OPND_IMM8U4)
5573 /* Sign-extend 32-bit unsigned numbers, so that the following range
5574 checks will work. */
5575 val = e->X_add_number;
5576 if (((val & (~(bfd_vma) 0 << 32)) == 0)
5577 && ((val & ((bfd_vma) 1 << 31)) != 0))
5578 val = ((val << 32) >> 32);
5581 val = e->X_add_number;
5583 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
5584 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
5585 return OPERAND_MATCH;
5587 return OPERAND_OUT_OF_RANGE;
5589 case IA64_OPND_INC3:
5590 /* +/- 1, 4, 8, 16 */
5591 val = e->X_add_number;
5594 if (e->X_op == O_constant)
5596 if ((val == 1 || val == 4 || val == 8 || val == 16))
5597 return OPERAND_MATCH;
5599 return OPERAND_OUT_OF_RANGE;
5603 case IA64_OPND_TGT25:
5604 case IA64_OPND_TGT25b:
5605 case IA64_OPND_TGT25c:
5606 case IA64_OPND_TGT64:
5607 if (e->X_op == O_symbol)
5609 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5610 if (opnd == IA64_OPND_TGT25)
5611 fix->code = BFD_RELOC_IA64_PCREL21F;
5612 else if (opnd == IA64_OPND_TGT25b)
5613 fix->code = BFD_RELOC_IA64_PCREL21M;
5614 else if (opnd == IA64_OPND_TGT25c)
5615 fix->code = BFD_RELOC_IA64_PCREL21B;
5616 else if (opnd == IA64_OPND_TGT64)
5617 fix->code = BFD_RELOC_IA64_PCREL60B;
5621 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5622 fix->opnd = idesc->operands[index];
5625 ++CURR_SLOT.num_fixups;
5626 return OPERAND_MATCH;
5628 case IA64_OPND_TAG13:
5629 case IA64_OPND_TAG13b:
5633 return OPERAND_MATCH;
5636 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5637 /* There are no external relocs for TAG13/TAG13b fields, so we
5638 create a dummy reloc. This will not live past md_apply_fix3. */
5639 fix->code = BFD_RELOC_UNUSED;
5640 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5641 fix->opnd = idesc->operands[index];
5644 ++CURR_SLOT.num_fixups;
5645 return OPERAND_MATCH;
5652 case IA64_OPND_LDXMOV:
5653 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5654 fix->code = BFD_RELOC_IA64_LDXMOV;
5655 fix->opnd = idesc->operands[index];
5658 ++CURR_SLOT.num_fixups;
5659 return OPERAND_MATCH;
5664 return OPERAND_MISMATCH;
5673 memset (e, 0, sizeof (*e));
5676 if (*input_line_pointer != '}')
5678 sep = *input_line_pointer++;
5682 if (!md.manual_bundling)
5683 as_warn ("Found '}' when manual bundling is off");
5685 CURR_SLOT.manual_bundling_off = 1;
5686 md.manual_bundling = 0;
5692 /* Returns the next entry in the opcode table that matches the one in
5693 IDESC, and frees the entry in IDESC. If no matching entry is
5694 found, NULL is returned instead. */
5696 static struct ia64_opcode *
5697 get_next_opcode (struct ia64_opcode *idesc)
5699 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
5700 ia64_free_opcode (idesc);
5704 /* Parse the operands for the opcode and find the opcode variant that
5705 matches the specified operands, or NULL if no match is possible. */
5707 static struct ia64_opcode *
5708 parse_operands (idesc)
5709 struct ia64_opcode *idesc;
5711 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
5712 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
5713 enum ia64_opnd expected_operand = IA64_OPND_NIL;
5714 enum operand_match_result result;
5716 char *first_arg = 0, *end, *saved_input_pointer;
5719 assert (strlen (idesc->name) <= 128);
5721 strcpy (mnemonic, idesc->name);
5722 if (idesc->operands[2] == IA64_OPND_SOF)
5724 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
5725 can't parse the first operand until we have parsed the
5726 remaining operands of the "alloc" instruction. */
5728 first_arg = input_line_pointer;
5729 end = strchr (input_line_pointer, '=');
5732 as_bad ("Expected separator `='");
5735 input_line_pointer = end + 1;
5740 for (; i < NELEMS (CURR_SLOT.opnd); ++i)
5742 sep = parse_operand (CURR_SLOT.opnd + i);
5743 if (CURR_SLOT.opnd[i].X_op == O_absent)
5748 if (sep != '=' && sep != ',')
5753 if (num_outputs > 0)
5754 as_bad ("Duplicate equal sign (=) in instruction");
5756 num_outputs = i + 1;
5761 as_bad ("Illegal operand separator `%c'", sep);
5765 if (idesc->operands[2] == IA64_OPND_SOF)
5767 /* map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r */
5768 know (strcmp (idesc->name, "alloc") == 0);
5769 if (num_operands == 5 /* first_arg not included in this count! */
5770 && CURR_SLOT.opnd[2].X_op == O_constant
5771 && CURR_SLOT.opnd[3].X_op == O_constant
5772 && CURR_SLOT.opnd[4].X_op == O_constant
5773 && CURR_SLOT.opnd[5].X_op == O_constant)
5775 sof = set_regstack (CURR_SLOT.opnd[2].X_add_number,
5776 CURR_SLOT.opnd[3].X_add_number,
5777 CURR_SLOT.opnd[4].X_add_number,
5778 CURR_SLOT.opnd[5].X_add_number);
5780 /* now we can parse the first arg: */
5781 saved_input_pointer = input_line_pointer;
5782 input_line_pointer = first_arg;
5783 sep = parse_operand (CURR_SLOT.opnd + 0);
5785 --num_outputs; /* force error */
5786 input_line_pointer = saved_input_pointer;
5788 CURR_SLOT.opnd[2].X_add_number = sof;
5789 CURR_SLOT.opnd[3].X_add_number
5790 = sof - CURR_SLOT.opnd[4].X_add_number;
5791 CURR_SLOT.opnd[4] = CURR_SLOT.opnd[5];
5795 highest_unmatched_operand = 0;
5796 curr_out_of_range_pos = -1;
5798 expected_operand = idesc->operands[0];
5799 for (; idesc; idesc = get_next_opcode (idesc))
5801 if (num_outputs != idesc->num_outputs)
5802 continue; /* mismatch in # of outputs */
5804 CURR_SLOT.num_fixups = 0;
5806 /* Try to match all operands. If we see an out-of-range operand,
5807 then continue trying to match the rest of the operands, since if
5808 the rest match, then this idesc will give the best error message. */
5810 out_of_range_pos = -1;
5811 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
5813 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
5814 if (result != OPERAND_MATCH)
5816 if (result != OPERAND_OUT_OF_RANGE)
5818 if (out_of_range_pos < 0)
5819 /* remember position of the first out-of-range operand: */
5820 out_of_range_pos = i;
5824 /* If we did not match all operands, or if at least one operand was
5825 out-of-range, then this idesc does not match. Keep track of which
5826 idesc matched the most operands before failing. If we have two
5827 idescs that failed at the same position, and one had an out-of-range
5828 operand, then prefer the out-of-range operand. Thus if we have
5829 "add r0=0x1000000,r1" we get an error saying the constant is out
5830 of range instead of an error saying that the constant should have been
5833 if (i != num_operands || out_of_range_pos >= 0)
5835 if (i > highest_unmatched_operand
5836 || (i == highest_unmatched_operand
5837 && out_of_range_pos > curr_out_of_range_pos))
5839 highest_unmatched_operand = i;
5840 if (out_of_range_pos >= 0)
5842 expected_operand = idesc->operands[out_of_range_pos];
5843 error_pos = out_of_range_pos;
5847 expected_operand = idesc->operands[i];
5850 curr_out_of_range_pos = out_of_range_pos;
5855 if (num_operands < NELEMS (idesc->operands)
5856 && idesc->operands[num_operands])
5857 continue; /* mismatch in number of arguments */
5863 if (expected_operand)
5864 as_bad ("Operand %u of `%s' should be %s",
5865 error_pos + 1, mnemonic,
5866 elf64_ia64_operands[expected_operand].desc);
5868 as_bad ("Operand mismatch");
5874 /* Keep track of state necessary to determine whether a NOP is necessary
5875 to avoid an erratum in A and B step Itanium chips, and return 1 if we
5876 detect a case where additional NOPs may be necessary. */
5878 errata_nop_necessary_p (slot, insn_unit)
5880 enum ia64_unit insn_unit;
5883 struct group *this_group = md.last_groups + md.group_idx;
5884 struct group *prev_group = md.last_groups + (md.group_idx + 2) % 3;
5885 struct ia64_opcode *idesc = slot->idesc;
5887 /* Test whether this could be the first insn in a problematic sequence. */
5888 if (insn_unit == IA64_UNIT_F)
5890 for (i = 0; i < idesc->num_outputs; i++)
5891 if (idesc->operands[i] == IA64_OPND_P1
5892 || idesc->operands[i] == IA64_OPND_P2)
5894 int regno = slot->opnd[i].X_add_number - REG_P;
5895 /* Ignore invalid operands; they generate errors elsewhere. */
5898 this_group->p_reg_set[regno] = 1;
5902 /* Test whether this could be the second insn in a problematic sequence. */
5903 if (insn_unit == IA64_UNIT_M && slot->qp_regno > 0
5904 && prev_group->p_reg_set[slot->qp_regno])
5906 for (i = 0; i < idesc->num_outputs; i++)
5907 if (idesc->operands[i] == IA64_OPND_R1
5908 || idesc->operands[i] == IA64_OPND_R2
5909 || idesc->operands[i] == IA64_OPND_R3)
5911 int regno = slot->opnd[i].X_add_number - REG_GR;
5912 /* Ignore invalid operands; they generate errors elsewhere. */
5915 if (strncmp (idesc->name, "add", 3) != 0
5916 && strncmp (idesc->name, "sub", 3) != 0
5917 && strncmp (idesc->name, "shladd", 6) != 0
5918 && (idesc->flags & IA64_OPCODE_POSTINC) == 0)
5919 this_group->g_reg_set_conditionally[regno] = 1;
5923 /* Test whether this could be the third insn in a problematic sequence. */
5924 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; i++)
5926 if (/* For fc, ptc, ptr, tak, thash, tpa, ttag, probe, ptr, ptc. */
5927 idesc->operands[i] == IA64_OPND_R3
5928 /* For mov indirect. */
5929 || idesc->operands[i] == IA64_OPND_RR_R3
5930 || idesc->operands[i] == IA64_OPND_DBR_R3
5931 || idesc->operands[i] == IA64_OPND_IBR_R3
5932 || idesc->operands[i] == IA64_OPND_PKR_R3
5933 || idesc->operands[i] == IA64_OPND_PMC_R3
5934 || idesc->operands[i] == IA64_OPND_PMD_R3
5935 || idesc->operands[i] == IA64_OPND_MSR_R3
5936 || idesc->operands[i] == IA64_OPND_CPUID_R3
5938 || idesc->operands[i] == IA64_OPND_ITR_R3
5939 || idesc->operands[i] == IA64_OPND_DTR_R3
5940 /* Normal memory addresses (load, store, xchg, cmpxchg, etc.). */
5941 || idesc->operands[i] == IA64_OPND_MR3)
5943 int regno = slot->opnd[i].X_add_number - REG_GR;
5944 /* Ignore invalid operands; they generate errors elsewhere. */
5947 if (idesc->operands[i] == IA64_OPND_R3)
5949 if (strcmp (idesc->name, "fc") != 0
5950 && strcmp (idesc->name, "tak") != 0
5951 && strcmp (idesc->name, "thash") != 0
5952 && strcmp (idesc->name, "tpa") != 0
5953 && strcmp (idesc->name, "ttag") != 0
5954 && strncmp (idesc->name, "ptr", 3) != 0
5955 && strncmp (idesc->name, "ptc", 3) != 0
5956 && strncmp (idesc->name, "probe", 5) != 0)
5959 if (prev_group->g_reg_set_conditionally[regno])
5967 build_insn (slot, insnp)
5971 const struct ia64_operand *odesc, *o2desc;
5972 struct ia64_opcode *idesc = slot->idesc;
5973 bfd_signed_vma insn, val;
5977 insn = idesc->opcode | slot->qp_regno;
5979 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
5981 if (slot->opnd[i].X_op == O_register
5982 || slot->opnd[i].X_op == O_constant
5983 || slot->opnd[i].X_op == O_index)
5984 val = slot->opnd[i].X_add_number;
5985 else if (slot->opnd[i].X_op == O_big)
5987 /* This must be the value 0x10000000000000000. */
5988 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
5994 switch (idesc->operands[i])
5996 case IA64_OPND_IMMU64:
5997 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
5998 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
5999 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6000 | (((val >> 63) & 0x1) << 36));
6003 case IA64_OPND_IMMU62:
6004 val &= 0x3fffffffffffffffULL;
6005 if (val != slot->opnd[i].X_add_number)
6006 as_warn (_("Value truncated to 62 bits"));
6007 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6008 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6011 case IA64_OPND_TGT64:
6013 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6014 insn |= ((((val >> 59) & 0x1) << 36)
6015 | (((val >> 0) & 0xfffff) << 13));
6046 case IA64_OPND_R3_2:
6047 case IA64_OPND_CPUID_R3:
6048 case IA64_OPND_DBR_R3:
6049 case IA64_OPND_DTR_R3:
6050 case IA64_OPND_ITR_R3:
6051 case IA64_OPND_IBR_R3:
6053 case IA64_OPND_MSR_R3:
6054 case IA64_OPND_PKR_R3:
6055 case IA64_OPND_PMC_R3:
6056 case IA64_OPND_PMD_R3:
6057 case IA64_OPND_RR_R3:
6065 odesc = elf64_ia64_operands + idesc->operands[i];
6066 err = (*odesc->insert) (odesc, val, &insn);
6068 as_bad_where (slot->src_file, slot->src_line,
6069 "Bad operand value: %s", err);
6070 if (idesc->flags & IA64_OPCODE_PSEUDO)
6072 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6073 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6075 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6076 (*o2desc->insert) (o2desc, val, &insn);
6078 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6079 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6080 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6082 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6083 (*o2desc->insert) (o2desc, 64 - val, &insn);
6093 unsigned int manual_bundling_on = 0, manual_bundling_off = 0;
6094 unsigned int manual_bundling = 0;
6095 enum ia64_unit required_unit, insn_unit = 0;
6096 enum ia64_insn_type type[3], insn_type;
6097 unsigned int template, orig_template;
6098 bfd_vma insn[3] = { -1, -1, -1 };
6099 struct ia64_opcode *idesc;
6100 int end_of_insn_group = 0, user_template = -1;
6101 int n, i, j, first, curr;
6102 unw_rec_list *ptr, *last_ptr, *end_ptr;
6103 bfd_vma t0 = 0, t1 = 0;
6104 struct label_fix *lfix;
6105 struct insn_fix *ifix;
6110 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6111 know (first >= 0 & first < NUM_SLOTS);
6112 n = MIN (3, md.num_slots_in_use);
6114 /* Determine template: user user_template if specified, best match
6117 if (md.slot[first].user_template >= 0)
6118 user_template = template = md.slot[first].user_template;
6121 /* Auto select appropriate template. */
6122 memset (type, 0, sizeof (type));
6124 for (i = 0; i < n; ++i)
6126 if (md.slot[curr].label_fixups && i != 0)
6128 type[i] = md.slot[curr].idesc->type;
6129 curr = (curr + 1) % NUM_SLOTS;
6131 template = best_template[type[0]][type[1]][type[2]];
6134 /* initialize instructions with appropriate nops: */
6135 for (i = 0; i < 3; ++i)
6136 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6140 /* now fill in slots with as many insns as possible: */
6142 idesc = md.slot[curr].idesc;
6143 end_of_insn_group = 0;
6144 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6146 /* If we have unwind records, we may need to update some now. */
6147 ptr = md.slot[curr].unwind_record;
6150 /* Find the last prologue/body record in the list for the current
6151 insn, and set the slot number for all records up to that point.
6152 This needs to be done now, because prologue/body records refer to
6153 the current point, not the point after the instruction has been
6154 issued. This matters because there may have been nops emitted
6155 meanwhile. Any non-prologue non-body record followed by a
6156 prologue/body record must also refer to the current point. */
6158 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6159 for (; ptr != end_ptr; ptr = ptr->next)
6160 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6161 || ptr->r.type == body)
6165 /* Make last_ptr point one after the last prologue/body
6167 last_ptr = last_ptr->next;
6168 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6171 ptr->slot_number = (unsigned long) f + i;
6172 ptr->slot_frag = frag_now;
6174 /* Remove the initialized records, so that we won't accidentally
6175 update them again if we insert a nop and continue. */
6176 md.slot[curr].unwind_record = last_ptr;
6180 if (idesc->flags & IA64_OPCODE_SLOT2)
6182 if (manual_bundling && i != 2)
6183 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6184 "`%s' must be last in bundle", idesc->name);
6188 if (idesc->flags & IA64_OPCODE_LAST)
6191 unsigned int required_template;
6193 /* If we need a stop bit after an M slot, our only choice is
6194 template 5 (M;;MI). If we need a stop bit after a B
6195 slot, our only choice is to place it at the end of the
6196 bundle, because the only available templates are MIB,
6197 MBB, BBB, MMB, and MFB. We don't handle anything other
6198 than M and B slots because these are the only kind of
6199 instructions that can have the IA64_OPCODE_LAST bit set. */
6200 required_template = template;
6201 switch (idesc->type)
6205 required_template = 5;
6213 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6214 "Internal error: don't know how to force %s to end"
6215 "of instruction group", idesc->name);
6219 if (manual_bundling && i != required_slot)
6220 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6221 "`%s' must be last in instruction group",
6223 if (required_slot < i)
6224 /* Can't fit this instruction. */
6228 if (required_template != template)
6230 /* If we switch the template, we need to reset the NOPs
6231 after slot i. The slot-types of the instructions ahead
6232 of i never change, so we don't need to worry about
6233 changing NOPs in front of this slot. */
6234 for (j = i; j < 3; ++j)
6235 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6237 template = required_template;
6239 if (curr != first && md.slot[curr].label_fixups)
6241 if (manual_bundling_on)
6242 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6243 "Label must be first in a bundle");
6244 /* This insn must go into the first slot of a bundle. */
6248 manual_bundling_on = md.slot[curr].manual_bundling_on;
6249 manual_bundling_off = md.slot[curr].manual_bundling_off;
6251 if (manual_bundling_on)
6254 manual_bundling = 1;
6256 break; /* need to start a new bundle */
6259 if (end_of_insn_group && md.num_slots_in_use >= 1)
6261 /* We need an instruction group boundary in the middle of a
6262 bundle. See if we can switch to an other template with
6263 an appropriate boundary. */
6265 orig_template = template;
6266 if (i == 1 && (user_template == 4
6267 || (user_template < 0
6268 && (ia64_templ_desc[template].exec_unit[0]
6272 end_of_insn_group = 0;
6274 else if (i == 2 && (user_template == 0
6275 || (user_template < 0
6276 && (ia64_templ_desc[template].exec_unit[1]
6278 /* This test makes sure we don't switch the template if
6279 the next instruction is one that needs to be first in
6280 an instruction group. Since all those instructions are
6281 in the M group, there is no way such an instruction can
6282 fit in this bundle even if we switch the template. The
6283 reason we have to check for this is that otherwise we
6284 may end up generating "MI;;I M.." which has the deadly
6285 effect that the second M instruction is no longer the
6286 first in the bundle! --davidm 99/12/16 */
6287 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6290 end_of_insn_group = 0;
6292 else if (curr != first)
6293 /* can't fit this insn */
6296 if (template != orig_template)
6297 /* if we switch the template, we need to reset the NOPs
6298 after slot i. The slot-types of the instructions ahead
6299 of i never change, so we don't need to worry about
6300 changing NOPs in front of this slot. */
6301 for (j = i; j < 3; ++j)
6302 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6304 required_unit = ia64_templ_desc[template].exec_unit[i];
6306 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6307 if (idesc->type == IA64_TYPE_DYN)
6309 if ((strcmp (idesc->name, "nop") == 0)
6310 || (strcmp (idesc->name, "hint") == 0)
6311 || (strcmp (idesc->name, "break") == 0))
6312 insn_unit = required_unit;
6313 else if (strcmp (idesc->name, "chk.s") == 0)
6315 insn_unit = IA64_UNIT_M;
6316 if (required_unit == IA64_UNIT_I)
6317 insn_unit = IA64_UNIT_I;
6320 as_fatal ("emit_one_bundle: unexpected dynamic op");
6322 sprintf (mnemonic, "%s.%c", idesc->name, "?imbf??"[insn_unit]);
6323 ia64_free_opcode (idesc);
6324 md.slot[curr].idesc = idesc = ia64_find_opcode (mnemonic);
6326 know (!idesc->next); /* no resolved dynamic ops have collisions */
6331 insn_type = idesc->type;
6332 insn_unit = IA64_UNIT_NIL;
6336 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6337 insn_unit = required_unit;
6339 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6340 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6341 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6342 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6343 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6348 if (insn_unit != required_unit)
6350 if (required_unit == IA64_UNIT_L
6351 && insn_unit == IA64_UNIT_I
6352 && !(idesc->flags & IA64_OPCODE_X_IN_MLX))
6354 /* we got ourselves an MLX template but the current
6355 instruction isn't an X-unit, or an I-unit instruction
6356 that can go into the X slot of an MLX template. Duh. */
6357 if (md.num_slots_in_use >= NUM_SLOTS)
6359 as_bad_where (md.slot[curr].src_file,
6360 md.slot[curr].src_line,
6361 "`%s' can't go in X slot of "
6362 "MLX template", idesc->name);
6363 /* drop this insn so we don't livelock: */
6364 --md.num_slots_in_use;
6368 continue; /* try next slot */
6374 addr = frag_now->fr_address + frag_now_fix () - 16 + i;
6375 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
6378 if (errata_nop_necessary_p (md.slot + curr, insn_unit))
6379 as_warn (_("Additional NOP may be necessary to workaround Itanium processor A/B step errata"));
6381 build_insn (md.slot + curr, insn + i);
6383 ptr = md.slot[curr].unwind_record;
6386 /* Set slot numbers for all remaining unwind records belonging to the
6387 current insn. There can not be any prologue/body unwind records
6389 end_ptr = md.slot[(curr + 1) % NUM_SLOTS].unwind_record;
6390 for (; ptr != end_ptr; ptr = ptr->next)
6392 ptr->slot_number = (unsigned long) f + i;
6393 ptr->slot_frag = frag_now;
6395 md.slot[curr].unwind_record = NULL;
6398 if (required_unit == IA64_UNIT_L)
6401 /* skip one slot for long/X-unit instructions */
6404 --md.num_slots_in_use;
6406 /* now is a good time to fix up the labels for this insn: */
6407 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6409 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6410 symbol_set_frag (lfix->sym, frag_now);
6412 /* and fix up the tags also. */
6413 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6415 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6416 symbol_set_frag (lfix->sym, frag_now);
6419 for (j = 0; j < md.slot[curr].num_fixups; ++j)
6421 ifix = md.slot[curr].fixup + j;
6422 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
6423 &ifix->expr, ifix->is_pcrel, ifix->code);
6424 fix->tc_fix_data.opnd = ifix->opnd;
6425 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
6426 fix->fx_file = md.slot[curr].src_file;
6427 fix->fx_line = md.slot[curr].src_line;
6430 end_of_insn_group = md.slot[curr].end_of_insn_group;
6432 if (end_of_insn_group)
6434 md.group_idx = (md.group_idx + 1) % 3;
6435 memset (md.last_groups + md.group_idx, 0, sizeof md.last_groups[0]);
6439 ia64_free_opcode (md.slot[curr].idesc);
6440 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
6441 md.slot[curr].user_template = -1;
6443 if (manual_bundling_off)
6445 manual_bundling = 0;
6448 curr = (curr + 1) % NUM_SLOTS;
6449 idesc = md.slot[curr].idesc;
6451 if (manual_bundling)
6453 if (md.num_slots_in_use > 0)
6454 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6455 "`%s' does not fit into %s template",
6456 idesc->name, ia64_templ_desc[template].name);
6458 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6459 "Missing '}' at end of file");
6461 know (md.num_slots_in_use < NUM_SLOTS);
6463 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
6464 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
6466 number_to_chars_littleendian (f + 0, t0, 8);
6467 number_to_chars_littleendian (f + 8, t1, 8);
6471 unwind.list->next_slot_number = (unsigned long) f + 16;
6472 unwind.list->next_slot_frag = frag_now;
6477 md_parse_option (c, arg)
6484 /* Switches from the Intel assembler. */
6486 if (strcmp (arg, "ilp64") == 0
6487 || strcmp (arg, "lp64") == 0
6488 || strcmp (arg, "p64") == 0)
6490 md.flags |= EF_IA_64_ABI64;
6492 else if (strcmp (arg, "ilp32") == 0)
6494 md.flags &= ~EF_IA_64_ABI64;
6496 else if (strcmp (arg, "le") == 0)
6498 md.flags &= ~EF_IA_64_BE;
6500 else if (strcmp (arg, "be") == 0)
6502 md.flags |= EF_IA_64_BE;
6509 if (strcmp (arg, "so") == 0)
6511 /* Suppress signon message. */
6513 else if (strcmp (arg, "pi") == 0)
6515 /* Reject privileged instructions. FIXME */
6517 else if (strcmp (arg, "us") == 0)
6519 /* Allow union of signed and unsigned range. FIXME */
6521 else if (strcmp (arg, "close_fcalls") == 0)
6523 /* Do not resolve global function calls. */
6530 /* temp[="prefix"] Insert temporary labels into the object file
6531 symbol table prefixed by "prefix".
6532 Default prefix is ":temp:".
6537 /* indirect=<tgt> Assume unannotated indirect branches behavior
6538 according to <tgt> --
6539 exit: branch out from the current context (default)
6540 labels: all labels in context may be branch targets
6542 if (strncmp (arg, "indirect=", 9) != 0)
6547 /* -X conflicts with an ignored option, use -x instead */
6549 if (!arg || strcmp (arg, "explicit") == 0)
6551 /* set default mode to explicit */
6552 md.default_explicit_mode = 1;
6555 else if (strcmp (arg, "auto") == 0)
6557 md.default_explicit_mode = 0;
6559 else if (strcmp (arg, "debug") == 0)
6563 else if (strcmp (arg, "debugx") == 0)
6565 md.default_explicit_mode = 1;
6570 as_bad (_("Unrecognized option '-x%s'"), arg);
6575 /* nops Print nops statistics. */
6578 /* GNU specific switches for gcc. */
6579 case OPTION_MCONSTANT_GP:
6580 md.flags |= EF_IA_64_CONS_GP;
6583 case OPTION_MAUTO_PIC:
6584 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
6595 md_show_usage (stream)
6600 --mconstant-gp mark output file as using the constant-GP model\n\
6601 (sets ELF header flag EF_IA_64_CONS_GP)\n\
6602 --mauto-pic mark output file as using the constant-GP model\n\
6603 without function descriptors (sets ELF header flag\n\
6604 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
6605 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
6606 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
6607 -x | -xexplicit turn on dependency violation checking (default)\n\
6608 -xauto automagically remove dependency violations\n\
6609 -xdebug debug dependency violation checker\n"),
6614 ia64_after_parse_args ()
6616 if (debug_type == DEBUG_STABS)
6617 as_fatal (_("--gstabs is not supported for ia64"));
6620 /* Return true if TYPE fits in TEMPL at SLOT. */
6623 match (int templ, int type, int slot)
6625 enum ia64_unit unit;
6628 unit = ia64_templ_desc[templ].exec_unit[slot];
6631 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
6633 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
6635 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
6636 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
6637 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
6638 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
6639 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
6640 default: result = 0; break;
6645 /* Add a bit of extra goodness if a nop of type F or B would fit
6646 in TEMPL at SLOT. */
6649 extra_goodness (int templ, int slot)
6651 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
6653 if (slot == 2 && match (templ, IA64_TYPE_B, slot))
6658 /* This function is called once, at assembler startup time. It sets
6659 up all the tables, etc. that the MD part of the assembler will need
6660 that can be determined before arguments are parsed. */
6664 int i, j, k, t, total, ar_base, cr_base, goodness, best, regnum, ok;
6669 md.explicit_mode = md.default_explicit_mode;
6671 bfd_set_section_alignment (stdoutput, text_section, 4);
6673 /* Make sure function pointers get initialized. */
6674 target_big_endian = -1;
6675 dot_byteorder (TARGET_BYTES_BIG_ENDIAN);
6677 alias_hash = hash_new ();
6678 alias_name_hash = hash_new ();
6679 secalias_hash = hash_new ();
6680 secalias_name_hash = hash_new ();
6682 pseudo_func[FUNC_DTP_MODULE].u.sym =
6683 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
6684 &zero_address_frag);
6686 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
6687 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
6688 &zero_address_frag);
6690 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
6691 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
6692 &zero_address_frag);
6694 pseudo_func[FUNC_GP_RELATIVE].u.sym =
6695 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
6696 &zero_address_frag);
6698 pseudo_func[FUNC_LT_RELATIVE].u.sym =
6699 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
6700 &zero_address_frag);
6702 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
6703 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
6704 &zero_address_frag);
6706 pseudo_func[FUNC_PC_RELATIVE].u.sym =
6707 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
6708 &zero_address_frag);
6710 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
6711 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
6712 &zero_address_frag);
6714 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
6715 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
6716 &zero_address_frag);
6718 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
6719 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
6720 &zero_address_frag);
6722 pseudo_func[FUNC_TP_RELATIVE].u.sym =
6723 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
6724 &zero_address_frag);
6726 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
6727 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
6728 &zero_address_frag);
6730 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
6731 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
6732 &zero_address_frag);
6734 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
6735 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
6736 &zero_address_frag);
6738 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
6739 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
6740 &zero_address_frag);
6742 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
6743 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
6744 &zero_address_frag);
6746 pseudo_func[FUNC_IPLT_RELOC].u.sym =
6747 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
6748 &zero_address_frag);
6750 /* Compute the table of best templates. We compute goodness as a
6751 base 4 value, in which each match counts for 3, each F counts
6752 for 2, each B counts for 1. This should maximize the number of
6753 F and B nops in the chosen bundles, which is good because these
6754 pipelines are least likely to be overcommitted. */
6755 for (i = 0; i < IA64_NUM_TYPES; ++i)
6756 for (j = 0; j < IA64_NUM_TYPES; ++j)
6757 for (k = 0; k < IA64_NUM_TYPES; ++k)
6760 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
6763 if (match (t, i, 0))
6765 if (match (t, j, 1))
6767 if (match (t, k, 2))
6768 goodness = 3 + 3 + 3;
6770 goodness = 3 + 3 + extra_goodness (t, 2);
6772 else if (match (t, j, 2))
6773 goodness = 3 + 3 + extra_goodness (t, 1);
6777 goodness += extra_goodness (t, 1);
6778 goodness += extra_goodness (t, 2);
6781 else if (match (t, i, 1))
6783 if (match (t, j, 2))
6786 goodness = 3 + extra_goodness (t, 2);
6788 else if (match (t, i, 2))
6789 goodness = 3 + extra_goodness (t, 1);
6791 if (goodness > best)
6794 best_template[i][j][k] = t;
6799 for (i = 0; i < NUM_SLOTS; ++i)
6800 md.slot[i].user_template = -1;
6802 md.pseudo_hash = hash_new ();
6803 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
6805 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
6806 (void *) (pseudo_opcode + i));
6808 as_fatal ("ia64.md_begin: can't hash `%s': %s",
6809 pseudo_opcode[i].name, err);
6812 md.reg_hash = hash_new ();
6813 md.dynreg_hash = hash_new ();
6814 md.const_hash = hash_new ();
6815 md.entry_hash = hash_new ();
6817 /* general registers: */
6820 for (i = 0; i < total; ++i)
6822 sprintf (name, "r%d", i - REG_GR);
6823 md.regsym[i] = declare_register (name, i);
6826 /* floating point registers: */
6828 for (; i < total; ++i)
6830 sprintf (name, "f%d", i - REG_FR);
6831 md.regsym[i] = declare_register (name, i);
6834 /* application registers: */
6837 for (; i < total; ++i)
6839 sprintf (name, "ar%d", i - REG_AR);
6840 md.regsym[i] = declare_register (name, i);
6843 /* control registers: */
6846 for (; i < total; ++i)
6848 sprintf (name, "cr%d", i - REG_CR);
6849 md.regsym[i] = declare_register (name, i);
6852 /* predicate registers: */
6854 for (; i < total; ++i)
6856 sprintf (name, "p%d", i - REG_P);
6857 md.regsym[i] = declare_register (name, i);
6860 /* branch registers: */
6862 for (; i < total; ++i)
6864 sprintf (name, "b%d", i - REG_BR);
6865 md.regsym[i] = declare_register (name, i);
6868 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
6869 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
6870 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
6871 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
6872 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
6873 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
6874 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
6876 for (i = 0; i < NELEMS (indirect_reg); ++i)
6878 regnum = indirect_reg[i].regnum;
6879 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
6882 /* define synonyms for application registers: */
6883 for (i = REG_AR; i < REG_AR + NELEMS (ar); ++i)
6884 md.regsym[i] = declare_register (ar[i - REG_AR].name,
6885 REG_AR + ar[i - REG_AR].regnum);
6887 /* define synonyms for control registers: */
6888 for (i = REG_CR; i < REG_CR + NELEMS (cr); ++i)
6889 md.regsym[i] = declare_register (cr[i - REG_CR].name,
6890 REG_CR + cr[i - REG_CR].regnum);
6892 declare_register ("gp", REG_GR + 1);
6893 declare_register ("sp", REG_GR + 12);
6894 declare_register ("rp", REG_BR + 0);
6896 /* pseudo-registers used to specify unwind info: */
6897 declare_register ("psp", REG_PSP);
6899 declare_register_set ("ret", 4, REG_GR + 8);
6900 declare_register_set ("farg", 8, REG_FR + 8);
6901 declare_register_set ("fret", 8, REG_FR + 8);
6903 for (i = 0; i < NELEMS (const_bits); ++i)
6905 err = hash_insert (md.const_hash, const_bits[i].name,
6906 (PTR) (const_bits + i));
6908 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
6912 /* Set the architecture and machine depending on defaults and command line
6914 if (md.flags & EF_IA_64_ABI64)
6915 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
6917 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
6920 as_warn (_("Could not set architecture and machine"));
6922 /* Set the pointer size and pointer shift size depending on md.flags */
6924 if (md.flags & EF_IA_64_ABI64)
6926 md.pointer_size = 8; /* pointers are 8 bytes */
6927 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
6931 md.pointer_size = 4; /* pointers are 4 bytes */
6932 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
6935 md.mem_offset.hint = 0;
6938 md.entry_labels = NULL;
6941 /* Set the elf type to 64 bit ABI by default. Cannot do this in md_begin
6942 because that is called after md_parse_option which is where we do the
6943 dynamic changing of md.flags based on -mlp64 or -milp32. Also, set the
6944 default endianness. */
6947 ia64_init (argc, argv)
6948 int argc ATTRIBUTE_UNUSED;
6949 char **argv ATTRIBUTE_UNUSED;
6951 md.flags = MD_FLAGS_DEFAULT;
6954 /* Return a string for the target object file format. */
6957 ia64_target_format ()
6959 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
6961 if (md.flags & EF_IA_64_BE)
6963 if (md.flags & EF_IA_64_ABI64)
6964 #if defined(TE_AIX50)
6965 return "elf64-ia64-aix-big";
6966 #elif defined(TE_HPUX)
6967 return "elf64-ia64-hpux-big";
6969 return "elf64-ia64-big";
6972 #if defined(TE_AIX50)
6973 return "elf32-ia64-aix-big";
6974 #elif defined(TE_HPUX)
6975 return "elf32-ia64-hpux-big";
6977 return "elf32-ia64-big";
6982 if (md.flags & EF_IA_64_ABI64)
6984 return "elf64-ia64-aix-little";
6986 return "elf64-ia64-little";
6990 return "elf32-ia64-aix-little";
6992 return "elf32-ia64-little";
6997 return "unknown-format";
7001 ia64_end_of_source ()
7003 /* terminate insn group upon reaching end of file: */
7004 insn_group_break (1, 0, 0);
7006 /* emits slots we haven't written yet: */
7007 ia64_flush_insns ();
7009 bfd_set_private_flags (stdoutput, md.flags);
7011 md.mem_offset.hint = 0;
7017 if (md.qp.X_op == O_register)
7018 as_bad ("qualifying predicate not followed by instruction");
7019 md.qp.X_op = O_absent;
7021 if (ignore_input ())
7024 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7026 if (md.detect_dv && !md.explicit_mode)
7027 as_warn (_("Explicit stops are ignored in auto mode"));
7029 insn_group_break (1, 0, 0);
7033 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7035 static int defining_tag = 0;
7038 ia64_unrecognized_line (ch)
7044 expression (&md.qp);
7045 if (*input_line_pointer++ != ')')
7047 as_bad ("Expected ')'");
7050 if (md.qp.X_op != O_register)
7052 as_bad ("Qualifying predicate expected");
7055 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7057 as_bad ("Predicate register expected");
7063 if (md.manual_bundling)
7064 as_warn ("Found '{' when manual bundling is already turned on");
7066 CURR_SLOT.manual_bundling_on = 1;
7067 md.manual_bundling = 1;
7069 /* Bundling is only acceptable in explicit mode
7070 or when in default automatic mode. */
7071 if (md.detect_dv && !md.explicit_mode)
7073 if (!md.mode_explicitly_set
7074 && !md.default_explicit_mode)
7077 as_warn (_("Found '{' after explicit switch to automatic mode"));
7082 if (!md.manual_bundling)
7083 as_warn ("Found '}' when manual bundling is off");
7085 PREV_SLOT.manual_bundling_off = 1;
7086 md.manual_bundling = 0;
7088 /* switch back to automatic mode, if applicable */
7091 && !md.mode_explicitly_set
7092 && !md.default_explicit_mode)
7095 /* Allow '{' to follow on the same line. We also allow ";;", but that
7096 happens automatically because ';' is an end of line marker. */
7098 if (input_line_pointer[0] == '{')
7100 input_line_pointer++;
7101 return ia64_unrecognized_line ('{');
7104 demand_empty_rest_of_line ();
7114 if (md.qp.X_op == O_register)
7116 as_bad ("Tag must come before qualifying predicate.");
7120 /* This implements just enough of read_a_source_file in read.c to
7121 recognize labels. */
7122 if (is_name_beginner (*input_line_pointer))
7124 s = input_line_pointer;
7125 c = get_symbol_end ();
7127 else if (LOCAL_LABELS_FB
7128 && ISDIGIT (*input_line_pointer))
7131 while (ISDIGIT (*input_line_pointer))
7132 temp = (temp * 10) + *input_line_pointer++ - '0';
7133 fb_label_instance_inc (temp);
7134 s = fb_label_name (temp, 0);
7135 c = *input_line_pointer;
7144 /* Put ':' back for error messages' sake. */
7145 *input_line_pointer++ = ':';
7146 as_bad ("Expected ':'");
7153 /* Put ':' back for error messages' sake. */
7154 *input_line_pointer++ = ':';
7155 if (*input_line_pointer++ != ']')
7157 as_bad ("Expected ']'");
7162 as_bad ("Tag name expected");
7172 /* Not a valid line. */
7177 ia64_frob_label (sym)
7180 struct label_fix *fix;
7182 /* Tags need special handling since they are not bundle breaks like
7186 fix = obstack_alloc (¬es, sizeof (*fix));
7188 fix->next = CURR_SLOT.tag_fixups;
7189 CURR_SLOT.tag_fixups = fix;
7194 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7196 md.last_text_seg = now_seg;
7197 fix = obstack_alloc (¬es, sizeof (*fix));
7199 fix->next = CURR_SLOT.label_fixups;
7200 CURR_SLOT.label_fixups = fix;
7202 /* Keep track of how many code entry points we've seen. */
7203 if (md.path == md.maxpaths)
7206 md.entry_labels = (const char **)
7207 xrealloc ((void *) md.entry_labels,
7208 md.maxpaths * sizeof (char *));
7210 md.entry_labels[md.path++] = S_GET_NAME (sym);
7215 /* The HP-UX linker will give unresolved symbol errors for symbols
7216 that are declared but unused. This routine removes declared,
7217 unused symbols from an object. */
7219 ia64_frob_symbol (sym)
7222 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7223 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7224 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7225 && ! S_IS_EXTERNAL (sym)))
7232 ia64_flush_pending_output ()
7234 if (!md.keep_pending_output
7235 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7237 /* ??? This causes many unnecessary stop bits to be emitted.
7238 Unfortunately, it isn't clear if it is safe to remove this. */
7239 insn_group_break (1, 0, 0);
7240 ia64_flush_insns ();
7244 /* Do ia64-specific expression optimization. All that's done here is
7245 to transform index expressions that are either due to the indexing
7246 of rotating registers or due to the indexing of indirect register
7249 ia64_optimize_expr (l, op, r)
7258 if (l->X_op == O_register && r->X_op == O_constant)
7260 num_regs = (l->X_add_number >> 16);
7261 if ((unsigned) r->X_add_number >= num_regs)
7264 as_bad ("No current frame");
7266 as_bad ("Index out of range 0..%u", num_regs - 1);
7267 r->X_add_number = 0;
7269 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
7272 else if (l->X_op == O_register && r->X_op == O_register)
7274 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
7275 || l->X_add_number == IND_MEM)
7277 as_bad ("Indirect register set name expected");
7278 l->X_add_number = IND_CPUID;
7281 l->X_op_symbol = md.regsym[l->X_add_number];
7282 l->X_add_number = r->X_add_number;
7290 ia64_parse_name (name, e)
7294 struct const_desc *cdesc;
7295 struct dynreg *dr = 0;
7296 unsigned int regnum;
7300 /* first see if NAME is a known register name: */
7301 sym = hash_find (md.reg_hash, name);
7304 e->X_op = O_register;
7305 e->X_add_number = S_GET_VALUE (sym);
7309 cdesc = hash_find (md.const_hash, name);
7312 e->X_op = O_constant;
7313 e->X_add_number = cdesc->value;
7317 /* check for inN, locN, or outN: */
7321 if (name[1] == 'n' && ISDIGIT (name[2]))
7329 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
7337 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
7350 /* The name is inN, locN, or outN; parse the register number. */
7351 regnum = strtoul (name, &end, 10);
7352 if (end > name && *end == '\0')
7354 if ((unsigned) regnum >= dr->num_regs)
7357 as_bad ("No current frame");
7359 as_bad ("Register number out of range 0..%u",
7363 e->X_op = O_register;
7364 e->X_add_number = dr->base + regnum;
7369 if ((dr = hash_find (md.dynreg_hash, name)))
7371 /* We've got ourselves the name of a rotating register set.
7372 Store the base register number in the low 16 bits of
7373 X_add_number and the size of the register set in the top 16
7375 e->X_op = O_register;
7376 e->X_add_number = dr->base | (dr->num_regs << 16);
7382 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
7385 ia64_canonicalize_symbol_name (name)
7388 size_t len = strlen (name);
7389 if (len > 1 && name[len - 1] == '#')
7390 name[len - 1] = '\0';
7394 /* Return true if idesc is a conditional branch instruction. This excludes
7395 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
7396 because they always read/write resources regardless of the value of the
7397 qualifying predicate. br.ia must always use p0, and hence is always
7398 taken. Thus this function returns true for branches which can fall
7399 through, and which use no resources if they do fall through. */
7402 is_conditional_branch (idesc)
7403 struct ia64_opcode *idesc;
7405 /* br is a conditional branch. Everything that starts with br. except
7406 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
7407 Everything that starts with brl is a conditional branch. */
7408 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
7409 && (idesc->name[2] == '\0'
7410 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
7411 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
7412 || idesc->name[2] == 'l'
7413 /* br.cond, br.call, br.clr */
7414 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
7415 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
7416 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
7419 /* Return whether the given opcode is a taken branch. If there's any doubt,
7423 is_taken_branch (idesc)
7424 struct ia64_opcode *idesc;
7426 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
7427 || strncmp (idesc->name, "br.ia", 5) == 0);
7430 /* Return whether the given opcode is an interruption or rfi. If there's any
7431 doubt, returns zero. */
7434 is_interruption_or_rfi (idesc)
7435 struct ia64_opcode *idesc;
7437 if (strcmp (idesc->name, "rfi") == 0)
7442 /* Returns the index of the given dependency in the opcode's list of chks, or
7443 -1 if there is no dependency. */
7446 depends_on (depind, idesc)
7448 struct ia64_opcode *idesc;
7451 const struct ia64_opcode_dependency *dep = idesc->dependencies;
7452 for (i = 0; i < dep->nchks; i++)
7454 if (depind == DEP (dep->chks[i]))
7460 /* Determine a set of specific resources used for a particular resource
7461 class. Returns the number of specific resources identified For those
7462 cases which are not determinable statically, the resource returned is
7465 Meanings of value in 'NOTE':
7466 1) only read/write when the register number is explicitly encoded in the
7468 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
7469 accesses CFM when qualifying predicate is in the rotating region.
7470 3) general register value is used to specify an indirect register; not
7471 determinable statically.
7472 4) only read the given resource when bits 7:0 of the indirect index
7473 register value does not match the register number of the resource; not
7474 determinable statically.
7475 5) all rules are implementation specific.
7476 6) only when both the index specified by the reader and the index specified
7477 by the writer have the same value in bits 63:61; not determinable
7479 7) only access the specified resource when the corresponding mask bit is
7481 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
7482 only read when these insns reference FR2-31
7483 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
7484 written when these insns write FR32-127
7485 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
7487 11) The target predicates are written independently of PR[qp], but source
7488 registers are only read if PR[qp] is true. Since the state of PR[qp]
7489 cannot statically be determined, all source registers are marked used.
7490 12) This insn only reads the specified predicate register when that
7491 register is the PR[qp].
7492 13) This reference to ld-c only applies to teh GR whose value is loaded
7493 with data returned from memory, not the post-incremented address register.
7494 14) The RSE resource includes the implementation-specific RSE internal
7495 state resources. At least one (and possibly more) of these resources are
7496 read by each instruction listed in IC:rse-readers. At least one (and
7497 possibly more) of these resources are written by each insn listed in
7499 15+16) Represents reserved instructions, which the assembler does not
7502 Memory resources (i.e. locations in memory) are *not* marked or tracked by
7503 this code; there are no dependency violations based on memory access.
7506 #define MAX_SPECS 256
7511 specify_resource (dep, idesc, type, specs, note, path)
7512 const struct ia64_dependency *dep;
7513 struct ia64_opcode *idesc;
7514 int type; /* is this a DV chk or a DV reg? */
7515 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
7516 int note; /* resource note for this insn's usage */
7517 int path; /* which execution path to examine */
7524 if (dep->mode == IA64_DV_WAW
7525 || (dep->mode == IA64_DV_RAW && type == DV_REG)
7526 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
7529 /* template for any resources we identify */
7530 tmpl.dependency = dep;
7532 tmpl.insn_srlz = tmpl.data_srlz = 0;
7533 tmpl.qp_regno = CURR_SLOT.qp_regno;
7534 tmpl.link_to_qp_branch = 1;
7535 tmpl.mem_offset.hint = 0;
7538 tmpl.cmp_type = CMP_NONE;
7541 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
7542 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
7543 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
7545 /* we don't need to track these */
7546 if (dep->semantics == IA64_DVS_NONE)
7549 switch (dep->specifier)
7554 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7556 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7557 if (regno >= 0 && regno <= 7)
7559 specs[count] = tmpl;
7560 specs[count++].index = regno;
7566 for (i = 0; i < 8; i++)
7568 specs[count] = tmpl;
7569 specs[count++].index = i;
7578 case IA64_RS_AR_UNAT:
7579 /* This is a mov =AR or mov AR= instruction. */
7580 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7582 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7583 if (regno == AR_UNAT)
7585 specs[count++] = tmpl;
7590 /* This is a spill/fill, or other instruction that modifies the
7593 /* Unless we can determine the specific bits used, mark the whole
7594 thing; bits 8:3 of the memory address indicate the bit used in
7595 UNAT. The .mem.offset hint may be used to eliminate a small
7596 subset of conflicts. */
7597 specs[count] = tmpl;
7598 if (md.mem_offset.hint)
7601 fprintf (stderr, " Using hint for spill/fill\n");
7602 /* The index isn't actually used, just set it to something
7603 approximating the bit index. */
7604 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
7605 specs[count].mem_offset.hint = 1;
7606 specs[count].mem_offset.offset = md.mem_offset.offset;
7607 specs[count++].mem_offset.base = md.mem_offset.base;
7611 specs[count++].specific = 0;
7619 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7621 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7622 if ((regno >= 8 && regno <= 15)
7623 || (regno >= 20 && regno <= 23)
7624 || (regno >= 31 && regno <= 39)
7625 || (regno >= 41 && regno <= 47)
7626 || (regno >= 67 && regno <= 111))
7628 specs[count] = tmpl;
7629 specs[count++].index = regno;
7642 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
7644 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
7645 if ((regno >= 48 && regno <= 63)
7646 || (regno >= 112 && regno <= 127))
7648 specs[count] = tmpl;
7649 specs[count++].index = regno;
7655 for (i = 48; i < 64; i++)
7657 specs[count] = tmpl;
7658 specs[count++].index = i;
7660 for (i = 112; i < 128; i++)
7662 specs[count] = tmpl;
7663 specs[count++].index = i;
7681 for (i = 0; i < idesc->num_outputs; i++)
7682 if (idesc->operands[i] == IA64_OPND_B1
7683 || idesc->operands[i] == IA64_OPND_B2)
7685 specs[count] = tmpl;
7686 specs[count++].index =
7687 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7692 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
7693 if (idesc->operands[i] == IA64_OPND_B1
7694 || idesc->operands[i] == IA64_OPND_B2)
7696 specs[count] = tmpl;
7697 specs[count++].index =
7698 CURR_SLOT.opnd[i].X_add_number - REG_BR;
7704 case IA64_RS_CPUID: /* four or more registers */
7707 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
7709 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7710 if (regno >= 0 && regno < NELEMS (gr_values)
7713 specs[count] = tmpl;
7714 specs[count++].index = gr_values[regno].value & 0xFF;
7718 specs[count] = tmpl;
7719 specs[count++].specific = 0;
7729 case IA64_RS_DBR: /* four or more registers */
7732 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
7734 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7735 if (regno >= 0 && regno < NELEMS (gr_values)
7738 specs[count] = tmpl;
7739 specs[count++].index = gr_values[regno].value & 0xFF;
7743 specs[count] = tmpl;
7744 specs[count++].specific = 0;
7748 else if (note == 0 && !rsrc_write)
7750 specs[count] = tmpl;
7751 specs[count++].specific = 0;
7759 case IA64_RS_IBR: /* four or more registers */
7762 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
7764 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7765 if (regno >= 0 && regno < NELEMS (gr_values)
7768 specs[count] = tmpl;
7769 specs[count++].index = gr_values[regno].value & 0xFF;
7773 specs[count] = tmpl;
7774 specs[count++].specific = 0;
7787 /* These are implementation specific. Force all references to
7788 conflict with all other references. */
7789 specs[count] = tmpl;
7790 specs[count++].specific = 0;
7798 case IA64_RS_PKR: /* 16 or more registers */
7799 if (note == 3 || note == 4)
7801 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
7803 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7804 if (regno >= 0 && regno < NELEMS (gr_values)
7809 specs[count] = tmpl;
7810 specs[count++].index = gr_values[regno].value & 0xFF;
7813 for (i = 0; i < NELEMS (gr_values); i++)
7815 /* Uses all registers *except* the one in R3. */
7816 if ((unsigned)i != (gr_values[regno].value & 0xFF))
7818 specs[count] = tmpl;
7819 specs[count++].index = i;
7825 specs[count] = tmpl;
7826 specs[count++].specific = 0;
7833 specs[count] = tmpl;
7834 specs[count++].specific = 0;
7838 case IA64_RS_PMC: /* four or more registers */
7841 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
7842 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
7845 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
7847 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
7848 if (regno >= 0 && regno < NELEMS (gr_values)
7851 specs[count] = tmpl;
7852 specs[count++].index = gr_values[regno].value & 0xFF;
7856 specs[count] = tmpl;
7857 specs[count++].specific = 0;
7867 case IA64_RS_PMD: /* four or more registers */
7870 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
7872 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7873 if (regno >= 0 && regno < NELEMS (gr_values)
7876 specs[count] = tmpl;
7877 specs[count++].index = gr_values[regno].value & 0xFF;
7881 specs[count] = tmpl;
7882 specs[count++].specific = 0;
7892 case IA64_RS_RR: /* eight registers */
7895 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
7897 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
7898 if (regno >= 0 && regno < NELEMS (gr_values)
7901 specs[count] = tmpl;
7902 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
7906 specs[count] = tmpl;
7907 specs[count++].specific = 0;
7911 else if (note == 0 && !rsrc_write)
7913 specs[count] = tmpl;
7914 specs[count++].specific = 0;
7922 case IA64_RS_CR_IRR:
7925 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
7926 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
7928 && idesc->operands[1] == IA64_OPND_CR3
7931 for (i = 0; i < 4; i++)
7933 specs[count] = tmpl;
7934 specs[count++].index = CR_IRR0 + i;
7940 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7941 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7943 && regno <= CR_IRR3)
7945 specs[count] = tmpl;
7946 specs[count++].index = regno;
7955 case IA64_RS_CR_LRR:
7962 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7963 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
7964 && (regno == CR_LRR0 || regno == CR_LRR1))
7966 specs[count] = tmpl;
7967 specs[count++].index = regno;
7975 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
7977 specs[count] = tmpl;
7978 specs[count++].index =
7979 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
7994 else if (rsrc_write)
7996 if (dep->specifier == IA64_RS_FRb
7997 && idesc->operands[0] == IA64_OPND_F1)
7999 specs[count] = tmpl;
8000 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8005 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8007 if (idesc->operands[i] == IA64_OPND_F2
8008 || idesc->operands[i] == IA64_OPND_F3
8009 || idesc->operands[i] == IA64_OPND_F4)
8011 specs[count] = tmpl;
8012 specs[count++].index =
8013 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8022 /* This reference applies only to the GR whose value is loaded with
8023 data returned from memory. */
8024 specs[count] = tmpl;
8025 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8031 for (i = 0; i < idesc->num_outputs; i++)
8032 if (idesc->operands[i] == IA64_OPND_R1
8033 || idesc->operands[i] == IA64_OPND_R2
8034 || idesc->operands[i] == IA64_OPND_R3)
8036 specs[count] = tmpl;
8037 specs[count++].index =
8038 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8040 if (idesc->flags & IA64_OPCODE_POSTINC)
8041 for (i = 0; i < NELEMS (idesc->operands); i++)
8042 if (idesc->operands[i] == IA64_OPND_MR3)
8044 specs[count] = tmpl;
8045 specs[count++].index =
8046 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8051 /* Look for anything that reads a GR. */
8052 for (i = 0; i < NELEMS (idesc->operands); i++)
8054 if (idesc->operands[i] == IA64_OPND_MR3
8055 || idesc->operands[i] == IA64_OPND_CPUID_R3
8056 || idesc->operands[i] == IA64_OPND_DBR_R3
8057 || idesc->operands[i] == IA64_OPND_IBR_R3
8058 || idesc->operands[i] == IA64_OPND_MSR_R3
8059 || idesc->operands[i] == IA64_OPND_PKR_R3
8060 || idesc->operands[i] == IA64_OPND_PMC_R3
8061 || idesc->operands[i] == IA64_OPND_PMD_R3
8062 || idesc->operands[i] == IA64_OPND_RR_R3
8063 || ((i >= idesc->num_outputs)
8064 && (idesc->operands[i] == IA64_OPND_R1
8065 || idesc->operands[i] == IA64_OPND_R2
8066 || idesc->operands[i] == IA64_OPND_R3
8067 /* addl source register. */
8068 || idesc->operands[i] == IA64_OPND_R3_2)))
8070 specs[count] = tmpl;
8071 specs[count++].index =
8072 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8083 /* This is the same as IA64_RS_PRr, except that the register range is
8084 from 1 - 15, and there are no rotating register reads/writes here. */
8088 for (i = 1; i < 16; i++)
8090 specs[count] = tmpl;
8091 specs[count++].index = i;
8097 /* Mark only those registers indicated by the mask. */
8100 mask = CURR_SLOT.opnd[2].X_add_number;
8101 for (i = 1; i < 16; i++)
8102 if (mask & ((valueT) 1 << i))
8104 specs[count] = tmpl;
8105 specs[count++].index = i;
8113 else if (note == 11) /* note 11 implies note 1 as well */
8117 for (i = 0; i < idesc->num_outputs; i++)
8119 if (idesc->operands[i] == IA64_OPND_P1
8120 || idesc->operands[i] == IA64_OPND_P2)
8122 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8123 if (regno >= 1 && regno < 16)
8125 specs[count] = tmpl;
8126 specs[count++].index = regno;
8136 else if (note == 12)
8138 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8140 specs[count] = tmpl;
8141 specs[count++].index = CURR_SLOT.qp_regno;
8148 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8149 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8150 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8151 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8153 if ((idesc->operands[0] == IA64_OPND_P1
8154 || idesc->operands[0] == IA64_OPND_P2)
8155 && p1 >= 1 && p1 < 16)
8157 specs[count] = tmpl;
8158 specs[count].cmp_type =
8159 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8160 specs[count++].index = p1;
8162 if ((idesc->operands[1] == IA64_OPND_P1
8163 || idesc->operands[1] == IA64_OPND_P2)
8164 && p2 >= 1 && p2 < 16)
8166 specs[count] = tmpl;
8167 specs[count].cmp_type =
8168 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8169 specs[count++].index = p2;
8174 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8176 specs[count] = tmpl;
8177 specs[count++].index = CURR_SLOT.qp_regno;
8179 if (idesc->operands[1] == IA64_OPND_PR)
8181 for (i = 1; i < 16; i++)
8183 specs[count] = tmpl;
8184 specs[count++].index = i;
8195 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
8196 simplified cases of this. */
8200 for (i = 16; i < 63; i++)
8202 specs[count] = tmpl;
8203 specs[count++].index = i;
8209 /* Mark only those registers indicated by the mask. */
8211 && idesc->operands[0] == IA64_OPND_PR)
8213 mask = CURR_SLOT.opnd[2].X_add_number;
8214 if (mask & ((valueT) 1 << 16))
8215 for (i = 16; i < 63; i++)
8217 specs[count] = tmpl;
8218 specs[count++].index = i;
8222 && idesc->operands[0] == IA64_OPND_PR_ROT)
8224 for (i = 16; i < 63; i++)
8226 specs[count] = tmpl;
8227 specs[count++].index = i;
8235 else if (note == 11) /* note 11 implies note 1 as well */
8239 for (i = 0; i < idesc->num_outputs; i++)
8241 if (idesc->operands[i] == IA64_OPND_P1
8242 || idesc->operands[i] == IA64_OPND_P2)
8244 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8245 if (regno >= 16 && regno < 63)
8247 specs[count] = tmpl;
8248 specs[count++].index = regno;
8258 else if (note == 12)
8260 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8262 specs[count] = tmpl;
8263 specs[count++].index = CURR_SLOT.qp_regno;
8270 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8271 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8272 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8273 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8275 if ((idesc->operands[0] == IA64_OPND_P1
8276 || idesc->operands[0] == IA64_OPND_P2)
8277 && p1 >= 16 && p1 < 63)
8279 specs[count] = tmpl;
8280 specs[count].cmp_type =
8281 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8282 specs[count++].index = p1;
8284 if ((idesc->operands[1] == IA64_OPND_P1
8285 || idesc->operands[1] == IA64_OPND_P2)
8286 && p2 >= 16 && p2 < 63)
8288 specs[count] = tmpl;
8289 specs[count].cmp_type =
8290 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8291 specs[count++].index = p2;
8296 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
8298 specs[count] = tmpl;
8299 specs[count++].index = CURR_SLOT.qp_regno;
8301 if (idesc->operands[1] == IA64_OPND_PR)
8303 for (i = 16; i < 63; i++)
8305 specs[count] = tmpl;
8306 specs[count++].index = i;
8318 /* Verify that the instruction is using the PSR bit indicated in
8322 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
8324 if (dep->regindex < 6)
8326 specs[count++] = tmpl;
8329 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
8331 if (dep->regindex < 32
8332 || dep->regindex == 35
8333 || dep->regindex == 36
8334 || (!rsrc_write && dep->regindex == PSR_CPL))
8336 specs[count++] = tmpl;
8339 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
8341 if (dep->regindex < 32
8342 || dep->regindex == 35
8343 || dep->regindex == 36
8344 || (rsrc_write && dep->regindex == PSR_CPL))
8346 specs[count++] = tmpl;
8351 /* Several PSR bits have very specific dependencies. */
8352 switch (dep->regindex)
8355 specs[count++] = tmpl;
8360 specs[count++] = tmpl;
8364 /* Only certain CR accesses use PSR.ic */
8365 if (idesc->operands[0] == IA64_OPND_CR3
8366 || idesc->operands[1] == IA64_OPND_CR3)
8369 ((idesc->operands[0] == IA64_OPND_CR3)
8372 CURR_SLOT.opnd[index].X_add_number - REG_CR;
8387 specs[count++] = tmpl;
8396 specs[count++] = tmpl;
8400 /* Only some AR accesses use cpl */
8401 if (idesc->operands[0] == IA64_OPND_AR3
8402 || idesc->operands[1] == IA64_OPND_AR3)
8405 ((idesc->operands[0] == IA64_OPND_AR3)
8408 CURR_SLOT.opnd[index].X_add_number - REG_AR;
8415 && regno <= AR_K7))))
8417 specs[count++] = tmpl;
8422 specs[count++] = tmpl;
8432 if (idesc->operands[0] == IA64_OPND_IMMU24)
8434 mask = CURR_SLOT.opnd[0].X_add_number;
8440 if (mask & ((valueT) 1 << dep->regindex))
8442 specs[count++] = tmpl;
8447 int min = dep->regindex == PSR_DFL ? 2 : 32;
8448 int max = dep->regindex == PSR_DFL ? 31 : 127;
8449 /* dfh is read on FR32-127; dfl is read on FR2-31 */
8450 for (i = 0; i < NELEMS (idesc->operands); i++)
8452 if (idesc->operands[i] == IA64_OPND_F1
8453 || idesc->operands[i] == IA64_OPND_F2
8454 || idesc->operands[i] == IA64_OPND_F3
8455 || idesc->operands[i] == IA64_OPND_F4)
8457 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8458 if (reg >= min && reg <= max)
8460 specs[count++] = tmpl;
8467 int min = dep->regindex == PSR_MFL ? 2 : 32;
8468 int max = dep->regindex == PSR_MFL ? 31 : 127;
8469 /* mfh is read on writes to FR32-127; mfl is read on writes to
8471 for (i = 0; i < idesc->num_outputs; i++)
8473 if (idesc->operands[i] == IA64_OPND_F1)
8475 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8476 if (reg >= min && reg <= max)
8478 specs[count++] = tmpl;
8483 else if (note == 10)
8485 for (i = 0; i < NELEMS (idesc->operands); i++)
8487 if (idesc->operands[i] == IA64_OPND_R1
8488 || idesc->operands[i] == IA64_OPND_R2
8489 || idesc->operands[i] == IA64_OPND_R3)
8491 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8492 if (regno >= 16 && regno <= 31)
8494 specs[count++] = tmpl;
8505 case IA64_RS_AR_FPSR:
8506 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8508 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8509 if (regno == AR_FPSR)
8511 specs[count++] = tmpl;
8516 specs[count++] = tmpl;
8521 /* Handle all AR[REG] resources */
8522 if (note == 0 || note == 1)
8524 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8525 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
8526 && regno == dep->regindex)
8528 specs[count++] = tmpl;
8530 /* other AR[REG] resources may be affected by AR accesses */
8531 else if (idesc->operands[0] == IA64_OPND_AR3)
8534 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
8535 switch (dep->regindex)
8541 if (regno == AR_BSPSTORE)
8543 specs[count++] = tmpl;
8547 (regno == AR_BSPSTORE
8548 || regno == AR_RNAT))
8550 specs[count++] = tmpl;
8555 else if (idesc->operands[1] == IA64_OPND_AR3)
8558 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
8559 switch (dep->regindex)
8564 if (regno == AR_BSPSTORE || regno == AR_RNAT)
8566 specs[count++] = tmpl;
8573 specs[count++] = tmpl;
8583 /* Handle all CR[REG] resources */
8584 if (note == 0 || note == 1)
8586 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8588 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8589 if (regno == dep->regindex)
8591 specs[count++] = tmpl;
8593 else if (!rsrc_write)
8595 /* Reads from CR[IVR] affect other resources. */
8596 if (regno == CR_IVR)
8598 if ((dep->regindex >= CR_IRR0
8599 && dep->regindex <= CR_IRR3)
8600 || dep->regindex == CR_TPR)
8602 specs[count++] = tmpl;
8609 specs[count++] = tmpl;
8618 case IA64_RS_INSERVICE:
8619 /* look for write of EOI (67) or read of IVR (65) */
8620 if ((idesc->operands[0] == IA64_OPND_CR3
8621 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
8622 || (idesc->operands[1] == IA64_OPND_CR3
8623 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
8625 specs[count++] = tmpl;
8632 specs[count++] = tmpl;
8643 specs[count++] = tmpl;
8647 /* Check if any of the registers accessed are in the rotating region.
8648 mov to/from pr accesses CFM only when qp_regno is in the rotating
8650 for (i = 0; i < NELEMS (idesc->operands); i++)
8652 if (idesc->operands[i] == IA64_OPND_R1
8653 || idesc->operands[i] == IA64_OPND_R2
8654 || idesc->operands[i] == IA64_OPND_R3)
8656 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
8657 /* Assumes that md.rot.num_regs is always valid */
8658 if (md.rot.num_regs > 0
8660 && num < 31 + md.rot.num_regs)
8662 specs[count] = tmpl;
8663 specs[count++].specific = 0;
8666 else if (idesc->operands[i] == IA64_OPND_F1
8667 || idesc->operands[i] == IA64_OPND_F2
8668 || idesc->operands[i] == IA64_OPND_F3
8669 || idesc->operands[i] == IA64_OPND_F4)
8671 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
8674 specs[count] = tmpl;
8675 specs[count++].specific = 0;
8678 else if (idesc->operands[i] == IA64_OPND_P1
8679 || idesc->operands[i] == IA64_OPND_P2)
8681 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
8684 specs[count] = tmpl;
8685 specs[count++].specific = 0;
8689 if (CURR_SLOT.qp_regno > 15)
8691 specs[count] = tmpl;
8692 specs[count++].specific = 0;
8697 /* This is the same as IA64_RS_PRr, except simplified to account for
8698 the fact that there is only one register. */
8702 specs[count++] = tmpl;
8707 if (idesc->operands[2] == IA64_OPND_IMM17)
8708 mask = CURR_SLOT.opnd[2].X_add_number;
8709 if (mask & ((valueT) 1 << 63))
8710 specs[count++] = tmpl;
8712 else if (note == 11)
8714 if ((idesc->operands[0] == IA64_OPND_P1
8715 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
8716 || (idesc->operands[1] == IA64_OPND_P2
8717 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
8719 specs[count++] = tmpl;
8722 else if (note == 12)
8724 if (CURR_SLOT.qp_regno == 63)
8726 specs[count++] = tmpl;
8733 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8734 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8735 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8736 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8739 && (idesc->operands[0] == IA64_OPND_P1
8740 || idesc->operands[0] == IA64_OPND_P2))
8742 specs[count] = tmpl;
8743 specs[count++].cmp_type =
8744 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8747 && (idesc->operands[1] == IA64_OPND_P1
8748 || idesc->operands[1] == IA64_OPND_P2))
8750 specs[count] = tmpl;
8751 specs[count++].cmp_type =
8752 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
8757 if (CURR_SLOT.qp_regno == 63)
8759 specs[count++] = tmpl;
8770 /* FIXME we can identify some individual RSE written resources, but RSE
8771 read resources have not yet been completely identified, so for now
8772 treat RSE as a single resource */
8773 if (strncmp (idesc->name, "mov", 3) == 0)
8777 if (idesc->operands[0] == IA64_OPND_AR3
8778 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
8780 specs[count] = tmpl;
8781 specs[count++].index = 0; /* IA64_RSE_BSPLOAD/RNATBITINDEX */
8786 if (idesc->operands[0] == IA64_OPND_AR3)
8788 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
8789 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
8791 specs[count++] = tmpl;
8794 else if (idesc->operands[1] == IA64_OPND_AR3)
8796 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
8797 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
8798 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
8800 specs[count++] = tmpl;
8807 specs[count++] = tmpl;
8812 /* FIXME -- do any of these need to be non-specific? */
8813 specs[count++] = tmpl;
8817 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
8824 /* Clear branch flags on marked resources. This breaks the link between the
8825 QP of the marking instruction and a subsequent branch on the same QP. */
8828 clear_qp_branch_flag (mask)
8832 for (i = 0; i < regdepslen; i++)
8834 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
8835 if ((bit & mask) != 0)
8837 regdeps[i].link_to_qp_branch = 0;
8842 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
8843 any mutexes which contain one of the PRs and create new ones when
8847 update_qp_mutex (valueT mask)
8853 while (i < qp_mutexeslen)
8855 if ((qp_mutexes[i].prmask & mask) != 0)
8857 /* If it destroys and creates the same mutex, do nothing. */
8858 if (qp_mutexes[i].prmask == mask
8859 && qp_mutexes[i].path == md.path)
8870 fprintf (stderr, " Clearing mutex relation");
8871 print_prmask (qp_mutexes[i].prmask);
8872 fprintf (stderr, "\n");
8875 /* Deal with the old mutex with more than 3+ PRs only if
8876 the new mutex on the same execution path with it.
8878 FIXME: The 3+ mutex support is incomplete.
8879 dot_pred_rel () may be a better place to fix it. */
8880 if (qp_mutexes[i].path == md.path)
8882 /* If it is a proper subset of the mutex, create a
8885 && (qp_mutexes[i].prmask & mask) == mask)
8888 qp_mutexes[i].prmask &= ~mask;
8889 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
8891 /* Modify the mutex if there are more than one
8899 /* Remove the mutex. */
8900 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8908 add_qp_mutex (mask);
8913 /* Remove any mutexes which contain any of the PRs indicated in the mask.
8915 Any changes to a PR clears the mutex relations which include that PR. */
8918 clear_qp_mutex (mask)
8924 while (i < qp_mutexeslen)
8926 if ((qp_mutexes[i].prmask & mask) != 0)
8930 fprintf (stderr, " Clearing mutex relation");
8931 print_prmask (qp_mutexes[i].prmask);
8932 fprintf (stderr, "\n");
8934 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
8941 /* Clear implies relations which contain PRs in the given masks.
8942 P1_MASK indicates the source of the implies relation, while P2_MASK
8943 indicates the implied PR. */
8946 clear_qp_implies (p1_mask, p2_mask)
8953 while (i < qp_implieslen)
8955 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
8956 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
8959 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
8960 qp_implies[i].p1, qp_implies[i].p2);
8961 qp_implies[i] = qp_implies[--qp_implieslen];
8968 /* Add the PRs specified to the list of implied relations. */
8971 add_qp_imply (p1, p2)
8978 /* p0 is not meaningful here. */
8979 if (p1 == 0 || p2 == 0)
8985 /* If it exists already, ignore it. */
8986 for (i = 0; i < qp_implieslen; i++)
8988 if (qp_implies[i].p1 == p1
8989 && qp_implies[i].p2 == p2
8990 && qp_implies[i].path == md.path
8991 && !qp_implies[i].p2_branched)
8995 if (qp_implieslen == qp_impliestotlen)
8997 qp_impliestotlen += 20;
8998 qp_implies = (struct qp_imply *)
8999 xrealloc ((void *) qp_implies,
9000 qp_impliestotlen * sizeof (struct qp_imply));
9003 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9004 qp_implies[qp_implieslen].p1 = p1;
9005 qp_implies[qp_implieslen].p2 = p2;
9006 qp_implies[qp_implieslen].path = md.path;
9007 qp_implies[qp_implieslen++].p2_branched = 0;
9009 /* Add in the implied transitive relations; for everything that p2 implies,
9010 make p1 imply that, too; for everything that implies p1, make it imply p2
9012 for (i = 0; i < qp_implieslen; i++)
9014 if (qp_implies[i].p1 == p2)
9015 add_qp_imply (p1, qp_implies[i].p2);
9016 if (qp_implies[i].p2 == p1)
9017 add_qp_imply (qp_implies[i].p1, p2);
9019 /* Add in mutex relations implied by this implies relation; for each mutex
9020 relation containing p2, duplicate it and replace p2 with p1. */
9021 bit = (valueT) 1 << p1;
9022 mask = (valueT) 1 << p2;
9023 for (i = 0; i < qp_mutexeslen; i++)
9025 if (qp_mutexes[i].prmask & mask)
9026 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9030 /* Add the PRs specified in the mask to the mutex list; this means that only
9031 one of the PRs can be true at any time. PR0 should never be included in
9041 if (qp_mutexeslen == qp_mutexestotlen)
9043 qp_mutexestotlen += 20;
9044 qp_mutexes = (struct qpmutex *)
9045 xrealloc ((void *) qp_mutexes,
9046 qp_mutexestotlen * sizeof (struct qpmutex));
9050 fprintf (stderr, " Registering mutex on");
9051 print_prmask (mask);
9052 fprintf (stderr, "\n");
9054 qp_mutexes[qp_mutexeslen].path = md.path;
9055 qp_mutexes[qp_mutexeslen++].prmask = mask;
9059 has_suffix_p (name, suffix)
9063 size_t namelen = strlen (name);
9064 size_t sufflen = strlen (suffix);
9066 if (namelen <= sufflen)
9068 return strcmp (name + namelen - sufflen, suffix) == 0;
9072 clear_register_values ()
9076 fprintf (stderr, " Clearing register values\n");
9077 for (i = 1; i < NELEMS (gr_values); i++)
9078 gr_values[i].known = 0;
9081 /* Keep track of register values/changes which affect DV tracking.
9083 optimization note: should add a flag to classes of insns where otherwise we
9084 have to examine a group of strings to identify them. */
9087 note_register_values (idesc)
9088 struct ia64_opcode *idesc;
9090 valueT qp_changemask = 0;
9093 /* Invalidate values for registers being written to. */
9094 for (i = 0; i < idesc->num_outputs; i++)
9096 if (idesc->operands[i] == IA64_OPND_R1
9097 || idesc->operands[i] == IA64_OPND_R2
9098 || idesc->operands[i] == IA64_OPND_R3)
9100 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9101 if (regno > 0 && regno < NELEMS (gr_values))
9102 gr_values[regno].known = 0;
9104 else if (idesc->operands[i] == IA64_OPND_R3_2)
9106 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9107 if (regno > 0 && regno < 4)
9108 gr_values[regno].known = 0;
9110 else if (idesc->operands[i] == IA64_OPND_P1
9111 || idesc->operands[i] == IA64_OPND_P2)
9113 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9114 qp_changemask |= (valueT) 1 << regno;
9116 else if (idesc->operands[i] == IA64_OPND_PR)
9118 if (idesc->operands[2] & (valueT) 0x10000)
9119 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9121 qp_changemask = idesc->operands[2];
9124 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9126 if (idesc->operands[1] & ((valueT) 1 << 43))
9127 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9129 qp_changemask = idesc->operands[1];
9130 qp_changemask &= ~(valueT) 0xFFFF;
9135 /* Always clear qp branch flags on any PR change. */
9136 /* FIXME there may be exceptions for certain compares. */
9137 clear_qp_branch_flag (qp_changemask);
9139 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9140 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9142 qp_changemask |= ~(valueT) 0xFFFF;
9143 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9145 for (i = 32; i < 32 + md.rot.num_regs; i++)
9146 gr_values[i].known = 0;
9148 clear_qp_mutex (qp_changemask);
9149 clear_qp_implies (qp_changemask, qp_changemask);
9151 /* After a call, all register values are undefined, except those marked
9153 else if (strncmp (idesc->name, "br.call", 6) == 0
9154 || strncmp (idesc->name, "brl.call", 7) == 0)
9156 /* FIXME keep GR values which are marked as "safe_across_calls" */
9157 clear_register_values ();
9158 clear_qp_mutex (~qp_safe_across_calls);
9159 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9160 clear_qp_branch_flag (~qp_safe_across_calls);
9162 else if (is_interruption_or_rfi (idesc)
9163 || is_taken_branch (idesc))
9165 clear_register_values ();
9166 clear_qp_mutex (~(valueT) 0);
9167 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
9169 /* Look for mutex and implies relations. */
9170 else if ((idesc->operands[0] == IA64_OPND_P1
9171 || idesc->operands[0] == IA64_OPND_P2)
9172 && (idesc->operands[1] == IA64_OPND_P1
9173 || idesc->operands[1] == IA64_OPND_P2))
9175 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9176 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9177 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
9178 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
9180 /* If both PRs are PR0, we can't really do anything. */
9181 if (p1 == 0 && p2 == 0)
9184 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
9186 /* In general, clear mutexes and implies which include P1 or P2,
9187 with the following exceptions. */
9188 else if (has_suffix_p (idesc->name, ".or.andcm")
9189 || has_suffix_p (idesc->name, ".and.orcm"))
9191 clear_qp_implies (p2mask, p1mask);
9193 else if (has_suffix_p (idesc->name, ".andcm")
9194 || has_suffix_p (idesc->name, ".and"))
9196 clear_qp_implies (0, p1mask | p2mask);
9198 else if (has_suffix_p (idesc->name, ".orcm")
9199 || has_suffix_p (idesc->name, ".or"))
9201 clear_qp_mutex (p1mask | p2mask);
9202 clear_qp_implies (p1mask | p2mask, 0);
9208 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
9210 /* If one of the PRs is PR0, we call clear_qp_mutex. */
9211 if (p1 == 0 || p2 == 0)
9212 clear_qp_mutex (p1mask | p2mask);
9214 added = update_qp_mutex (p1mask | p2mask);
9216 if (CURR_SLOT.qp_regno == 0
9217 || has_suffix_p (idesc->name, ".unc"))
9219 if (added == 0 && p1 && p2)
9220 add_qp_mutex (p1mask | p2mask);
9221 if (CURR_SLOT.qp_regno != 0)
9224 add_qp_imply (p1, CURR_SLOT.qp_regno);
9226 add_qp_imply (p2, CURR_SLOT.qp_regno);
9231 /* Look for mov imm insns into GRs. */
9232 else if (idesc->operands[0] == IA64_OPND_R1
9233 && (idesc->operands[1] == IA64_OPND_IMM22
9234 || idesc->operands[1] == IA64_OPND_IMMU64)
9235 && (strcmp (idesc->name, "mov") == 0
9236 || strcmp (idesc->name, "movl") == 0))
9238 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
9239 if (regno > 0 && regno < NELEMS (gr_values))
9241 gr_values[regno].known = 1;
9242 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
9243 gr_values[regno].path = md.path;
9246 fprintf (stderr, " Know gr%d = ", regno);
9247 fprintf_vma (stderr, gr_values[regno].value);
9248 fputs ("\n", stderr);
9254 clear_qp_mutex (qp_changemask);
9255 clear_qp_implies (qp_changemask, qp_changemask);
9259 /* Return whether the given predicate registers are currently mutex. */
9262 qp_mutex (p1, p2, path)
9272 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
9273 for (i = 0; i < qp_mutexeslen; i++)
9275 if (qp_mutexes[i].path >= path
9276 && (qp_mutexes[i].prmask & mask) == mask)
9283 /* Return whether the given resource is in the given insn's list of chks
9284 Return 1 if the conflict is absolutely determined, 2 if it's a potential
9288 resources_match (rs, idesc, note, qp_regno, path)
9290 struct ia64_opcode *idesc;
9295 struct rsrc specs[MAX_SPECS];
9298 /* If the marked resource's qp_regno and the given qp_regno are mutex,
9299 we don't need to check. One exception is note 11, which indicates that
9300 target predicates are written regardless of PR[qp]. */
9301 if (qp_mutex (rs->qp_regno, qp_regno, path)
9305 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
9308 /* UNAT checking is a bit more specific than other resources */
9309 if (rs->dependency->specifier == IA64_RS_AR_UNAT
9310 && specs[count].mem_offset.hint
9311 && rs->mem_offset.hint)
9313 if (rs->mem_offset.base == specs[count].mem_offset.base)
9315 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
9316 ((specs[count].mem_offset.offset >> 3) & 0x3F))
9323 /* Skip apparent PR write conflicts where both writes are an AND or both
9324 writes are an OR. */
9325 if (rs->dependency->specifier == IA64_RS_PR
9326 || rs->dependency->specifier == IA64_RS_PRr
9327 || rs->dependency->specifier == IA64_RS_PR63)
9329 if (specs[count].cmp_type != CMP_NONE
9330 && specs[count].cmp_type == rs->cmp_type)
9333 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
9334 dv_mode[rs->dependency->mode],
9335 rs->dependency->specifier != IA64_RS_PR63 ?
9336 specs[count].index : 63);
9341 " %s on parallel compare conflict %s vs %s on PR%d\n",
9342 dv_mode[rs->dependency->mode],
9343 dv_cmp_type[rs->cmp_type],
9344 dv_cmp_type[specs[count].cmp_type],
9345 rs->dependency->specifier != IA64_RS_PR63 ?
9346 specs[count].index : 63);
9350 /* If either resource is not specific, conservatively assume a conflict
9352 if (!specs[count].specific || !rs->specific)
9354 else if (specs[count].index == rs->index)
9359 fprintf (stderr, " No %s conflicts\n", rs->dependency->name);
9365 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
9366 insert a stop to create the break. Update all resource dependencies
9367 appropriately. If QP_REGNO is non-zero, only apply the break to resources
9368 which use the same QP_REGNO and have the link_to_qp_branch flag set.
9369 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
9373 insn_group_break (insert_stop, qp_regno, save_current)
9380 if (insert_stop && md.num_slots_in_use > 0)
9381 PREV_SLOT.end_of_insn_group = 1;
9385 fprintf (stderr, " Insn group break%s",
9386 (insert_stop ? " (w/stop)" : ""));
9388 fprintf (stderr, " effective for QP=%d", qp_regno);
9389 fprintf (stderr, "\n");
9393 while (i < regdepslen)
9395 const struct ia64_dependency *dep = regdeps[i].dependency;
9398 && regdeps[i].qp_regno != qp_regno)
9405 && CURR_SLOT.src_file == regdeps[i].file
9406 && CURR_SLOT.src_line == regdeps[i].line)
9412 /* clear dependencies which are automatically cleared by a stop, or
9413 those that have reached the appropriate state of insn serialization */
9414 if (dep->semantics == IA64_DVS_IMPLIED
9415 || dep->semantics == IA64_DVS_IMPLIEDF
9416 || regdeps[i].insn_srlz == STATE_SRLZ)
9418 print_dependency ("Removing", i);
9419 regdeps[i] = regdeps[--regdepslen];
9423 if (dep->semantics == IA64_DVS_DATA
9424 || dep->semantics == IA64_DVS_INSTR
9425 || dep->semantics == IA64_DVS_SPECIFIC)
9427 if (regdeps[i].insn_srlz == STATE_NONE)
9428 regdeps[i].insn_srlz = STATE_STOP;
9429 if (regdeps[i].data_srlz == STATE_NONE)
9430 regdeps[i].data_srlz = STATE_STOP;
9437 /* Add the given resource usage spec to the list of active dependencies. */
9440 mark_resource (idesc, dep, spec, depind, path)
9441 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
9442 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
9447 if (regdepslen == regdepstotlen)
9449 regdepstotlen += 20;
9450 regdeps = (struct rsrc *)
9451 xrealloc ((void *) regdeps,
9452 regdepstotlen * sizeof (struct rsrc));
9455 regdeps[regdepslen] = *spec;
9456 regdeps[regdepslen].depind = depind;
9457 regdeps[regdepslen].path = path;
9458 regdeps[regdepslen].file = CURR_SLOT.src_file;
9459 regdeps[regdepslen].line = CURR_SLOT.src_line;
9461 print_dependency ("Adding", regdepslen);
9467 print_dependency (action, depind)
9473 fprintf (stderr, " %s %s '%s'",
9474 action, dv_mode[(regdeps[depind].dependency)->mode],
9475 (regdeps[depind].dependency)->name);
9476 if (regdeps[depind].specific && regdeps[depind].index != 0)
9477 fprintf (stderr, " (%d)", regdeps[depind].index);
9478 if (regdeps[depind].mem_offset.hint)
9480 fputs (" ", stderr);
9481 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
9482 fputs ("+", stderr);
9483 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
9485 fprintf (stderr, "\n");
9490 instruction_serialization ()
9494 fprintf (stderr, " Instruction serialization\n");
9495 for (i = 0; i < regdepslen; i++)
9496 if (regdeps[i].insn_srlz == STATE_STOP)
9497 regdeps[i].insn_srlz = STATE_SRLZ;
9501 data_serialization ()
9505 fprintf (stderr, " Data serialization\n");
9506 while (i < regdepslen)
9508 if (regdeps[i].data_srlz == STATE_STOP
9509 /* Note: as of 991210, all "other" dependencies are cleared by a
9510 data serialization. This might change with new tables */
9511 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
9513 print_dependency ("Removing", i);
9514 regdeps[i] = regdeps[--regdepslen];
9521 /* Insert stops and serializations as needed to avoid DVs. */
9524 remove_marked_resource (rs)
9527 switch (rs->dependency->semantics)
9529 case IA64_DVS_SPECIFIC:
9531 fprintf (stderr, "Implementation-specific, assume worst case...\n");
9532 /* ...fall through... */
9533 case IA64_DVS_INSTR:
9535 fprintf (stderr, "Inserting instr serialization\n");
9536 if (rs->insn_srlz < STATE_STOP)
9537 insn_group_break (1, 0, 0);
9538 if (rs->insn_srlz < STATE_SRLZ)
9540 int oldqp = CURR_SLOT.qp_regno;
9541 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9542 /* Manually jam a srlz.i insn into the stream */
9543 CURR_SLOT.qp_regno = 0;
9544 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
9545 instruction_serialization ();
9546 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9547 if (++md.num_slots_in_use >= NUM_SLOTS)
9549 CURR_SLOT.qp_regno = oldqp;
9550 CURR_SLOT.idesc = oldidesc;
9552 insn_group_break (1, 0, 0);
9554 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
9555 "other" types of DV are eliminated
9556 by a data serialization */
9559 fprintf (stderr, "Inserting data serialization\n");
9560 if (rs->data_srlz < STATE_STOP)
9561 insn_group_break (1, 0, 0);
9563 int oldqp = CURR_SLOT.qp_regno;
9564 struct ia64_opcode *oldidesc = CURR_SLOT.idesc;
9565 /* Manually jam a srlz.d insn into the stream */
9566 CURR_SLOT.qp_regno = 0;
9567 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
9568 data_serialization ();
9569 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
9570 if (++md.num_slots_in_use >= NUM_SLOTS)
9572 CURR_SLOT.qp_regno = oldqp;
9573 CURR_SLOT.idesc = oldidesc;
9576 case IA64_DVS_IMPLIED:
9577 case IA64_DVS_IMPLIEDF:
9579 fprintf (stderr, "Inserting stop\n");
9580 insn_group_break (1, 0, 0);
9587 /* Check the resources used by the given opcode against the current dependency
9590 The check is run once for each execution path encountered. In this case,
9591 a unique execution path is the sequence of instructions following a code
9592 entry point, e.g. the following has three execution paths, one starting
9593 at L0, one at L1, and one at L2.
9602 check_dependencies (idesc)
9603 struct ia64_opcode *idesc;
9605 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9609 /* Note that the number of marked resources may change within the
9610 loop if in auto mode. */
9612 while (i < regdepslen)
9614 struct rsrc *rs = ®deps[i];
9615 const struct ia64_dependency *dep = rs->dependency;
9620 if (dep->semantics == IA64_DVS_NONE
9621 || (chkind = depends_on (rs->depind, idesc)) == -1)
9627 note = NOTE (opdeps->chks[chkind]);
9629 /* Check this resource against each execution path seen thus far. */
9630 for (path = 0; path <= md.path; path++)
9634 /* If the dependency wasn't on the path being checked, ignore it. */
9635 if (rs->path < path)
9638 /* If the QP for this insn implies a QP which has branched, don't
9639 bother checking. Ed. NOTE: I don't think this check is terribly
9640 useful; what's the point of generating code which will only be
9641 reached if its QP is zero?
9642 This code was specifically inserted to handle the following code,
9643 based on notes from Intel's DV checking code, where p1 implies p2.
9649 if (CURR_SLOT.qp_regno != 0)
9653 for (implies = 0; implies < qp_implieslen; implies++)
9655 if (qp_implies[implies].path >= path
9656 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
9657 && qp_implies[implies].p2_branched)
9667 if ((matchtype = resources_match (rs, idesc, note,
9668 CURR_SLOT.qp_regno, path)) != 0)
9671 char pathmsg[256] = "";
9672 char indexmsg[256] = "";
9673 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
9676 sprintf (pathmsg, " when entry is at label '%s'",
9677 md.entry_labels[path - 1]);
9678 if (rs->specific && rs->index != 0)
9679 sprintf (indexmsg, ", specific resource number is %d",
9681 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
9683 (certain ? "violates" : "may violate"),
9684 dv_mode[dep->mode], dep->name,
9685 dv_sem[dep->semantics],
9688 if (md.explicit_mode)
9690 as_warn ("%s", msg);
9692 as_warn (_("Only the first path encountering the conflict "
9694 as_warn_where (rs->file, rs->line,
9695 _("This is the location of the "
9696 "conflicting usage"));
9697 /* Don't bother checking other paths, to avoid duplicating
9704 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
9706 remove_marked_resource (rs);
9708 /* since the set of dependencies has changed, start over */
9709 /* FIXME -- since we're removing dvs as we go, we
9710 probably don't really need to start over... */
9723 /* Register new dependencies based on the given opcode. */
9726 mark_resources (idesc)
9727 struct ia64_opcode *idesc;
9730 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
9731 int add_only_qp_reads = 0;
9733 /* A conditional branch only uses its resources if it is taken; if it is
9734 taken, we stop following that path. The other branch types effectively
9735 *always* write their resources. If it's not taken, register only QP
9737 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
9739 add_only_qp_reads = 1;
9743 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
9745 for (i = 0; i < opdeps->nregs; i++)
9747 const struct ia64_dependency *dep;
9748 struct rsrc specs[MAX_SPECS];
9753 dep = ia64_find_dependency (opdeps->regs[i]);
9754 note = NOTE (opdeps->regs[i]);
9756 if (add_only_qp_reads
9757 && !(dep->mode == IA64_DV_WAR
9758 && (dep->specifier == IA64_RS_PR
9759 || dep->specifier == IA64_RS_PRr
9760 || dep->specifier == IA64_RS_PR63)))
9763 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
9766 if (md.debug_dv && !count)
9767 fprintf (stderr, " No %s %s usage found (path %d)\n",
9768 dv_mode[dep->mode], dep->name, md.path);
9773 mark_resource (idesc, dep, &specs[count],
9774 DEP (opdeps->regs[i]), md.path);
9777 /* The execution path may affect register values, which may in turn
9778 affect which indirect-access resources are accessed. */
9779 switch (dep->specifier)
9791 for (path = 0; path < md.path; path++)
9793 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
9795 mark_resource (idesc, dep, &specs[count],
9796 DEP (opdeps->regs[i]), path);
9803 /* Remove dependencies when they no longer apply. */
9806 update_dependencies (idesc)
9807 struct ia64_opcode *idesc;
9811 if (strcmp (idesc->name, "srlz.i") == 0)
9813 instruction_serialization ();
9815 else if (strcmp (idesc->name, "srlz.d") == 0)
9817 data_serialization ();
9819 else if (is_interruption_or_rfi (idesc)
9820 || is_taken_branch (idesc))
9822 /* Although technically the taken branch doesn't clear dependencies
9823 which require a srlz.[id], we don't follow the branch; the next
9824 instruction is assumed to start with a clean slate. */
9828 else if (is_conditional_branch (idesc)
9829 && CURR_SLOT.qp_regno != 0)
9831 int is_call = strstr (idesc->name, ".call") != NULL;
9833 for (i = 0; i < qp_implieslen; i++)
9835 /* If the conditional branch's predicate is implied by the predicate
9836 in an existing dependency, remove that dependency. */
9837 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
9840 /* Note that this implied predicate takes a branch so that if
9841 a later insn generates a DV but its predicate implies this
9842 one, we can avoid the false DV warning. */
9843 qp_implies[i].p2_branched = 1;
9844 while (depind < regdepslen)
9846 if (regdeps[depind].qp_regno == qp_implies[i].p1)
9848 print_dependency ("Removing", depind);
9849 regdeps[depind] = regdeps[--regdepslen];
9856 /* Any marked resources which have this same predicate should be
9857 cleared, provided that the QP hasn't been modified between the
9858 marking instruction and the branch. */
9861 insn_group_break (0, CURR_SLOT.qp_regno, 1);
9866 while (i < regdepslen)
9868 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
9869 && regdeps[i].link_to_qp_branch
9870 && (regdeps[i].file != CURR_SLOT.src_file
9871 || regdeps[i].line != CURR_SLOT.src_line))
9873 /* Treat like a taken branch */
9874 print_dependency ("Removing", i);
9875 regdeps[i] = regdeps[--regdepslen];
9884 /* Examine the current instruction for dependency violations. */
9888 struct ia64_opcode *idesc;
9892 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
9893 idesc->name, CURR_SLOT.src_line,
9894 idesc->dependencies->nchks,
9895 idesc->dependencies->nregs);
9898 /* Look through the list of currently marked resources; if the current
9899 instruction has the dependency in its chks list which uses that resource,
9900 check against the specific resources used. */
9901 check_dependencies (idesc);
9903 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
9904 then add them to the list of marked resources. */
9905 mark_resources (idesc);
9907 /* There are several types of dependency semantics, and each has its own
9908 requirements for being cleared
9910 Instruction serialization (insns separated by interruption, rfi, or
9911 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
9913 Data serialization (instruction serialization, or writer + srlz.d +
9914 reader, where writer and srlz.d are in separate groups) clears
9915 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
9916 always be the case).
9918 Instruction group break (groups separated by stop, taken branch,
9919 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
9921 update_dependencies (idesc);
9923 /* Sometimes, knowing a register value allows us to avoid giving a false DV
9924 warning. Keep track of as many as possible that are useful. */
9925 note_register_values (idesc);
9927 /* We don't need or want this anymore. */
9928 md.mem_offset.hint = 0;
9933 /* Translate one line of assembly. Pseudo ops and labels do not show
9939 char *saved_input_line_pointer, *mnemonic;
9940 const struct pseudo_opcode *pdesc;
9941 struct ia64_opcode *idesc;
9942 unsigned char qp_regno;
9946 saved_input_line_pointer = input_line_pointer;
9947 input_line_pointer = str;
9949 /* extract the opcode (mnemonic): */
9951 mnemonic = input_line_pointer;
9952 ch = get_symbol_end ();
9953 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
9956 *input_line_pointer = ch;
9957 (*pdesc->handler) (pdesc->arg);
9961 /* Find the instruction descriptor matching the arguments. */
9963 idesc = ia64_find_opcode (mnemonic);
9964 *input_line_pointer = ch;
9967 as_bad ("Unknown opcode `%s'", mnemonic);
9971 idesc = parse_operands (idesc);
9975 /* Handle the dynamic ops we can handle now: */
9976 if (idesc->type == IA64_TYPE_DYN)
9978 if (strcmp (idesc->name, "add") == 0)
9980 if (CURR_SLOT.opnd[2].X_op == O_register
9981 && CURR_SLOT.opnd[2].X_add_number < 4)
9985 ia64_free_opcode (idesc);
9986 idesc = ia64_find_opcode (mnemonic);
9988 know (!idesc->next);
9991 else if (strcmp (idesc->name, "mov") == 0)
9993 enum ia64_opnd opnd1, opnd2;
9996 opnd1 = idesc->operands[0];
9997 opnd2 = idesc->operands[1];
9998 if (opnd1 == IA64_OPND_AR3)
10000 else if (opnd2 == IA64_OPND_AR3)
10004 if (CURR_SLOT.opnd[rop].X_op == O_register
10005 && ar_is_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10006 mnemonic = "mov.i";
10008 mnemonic = "mov.m";
10009 ia64_free_opcode (idesc);
10010 idesc = ia64_find_opcode (mnemonic);
10011 while (idesc != NULL
10012 && (idesc->operands[0] != opnd1
10013 || idesc->operands[1] != opnd2))
10014 idesc = get_next_opcode (idesc);
10019 if (md.qp.X_op == O_register)
10021 qp_regno = md.qp.X_add_number - REG_P;
10022 md.qp.X_op = O_absent;
10025 flags = idesc->flags;
10027 if ((flags & IA64_OPCODE_FIRST) != 0)
10029 /* The alignment frag has to end with a stop bit only if the
10030 next instruction after the alignment directive has to be
10031 the first instruction in an instruction group. */
10034 while (align_frag->fr_type != rs_align_code)
10036 align_frag = align_frag->fr_next;
10040 /* align_frag can be NULL if there are directives in
10042 if (align_frag && align_frag->fr_next == frag_now)
10043 align_frag->tc_frag_data = 1;
10046 insn_group_break (1, 0, 0);
10050 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10052 as_bad ("`%s' cannot be predicated", idesc->name);
10056 /* Build the instruction. */
10057 CURR_SLOT.qp_regno = qp_regno;
10058 CURR_SLOT.idesc = idesc;
10059 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10060 dwarf2_where (&CURR_SLOT.debug_line);
10062 /* Add unwind entry, if there is one. */
10063 if (unwind.current_entry)
10065 CURR_SLOT.unwind_record = unwind.current_entry;
10066 unwind.current_entry = NULL;
10069 /* Check for dependency violations. */
10073 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10074 if (++md.num_slots_in_use >= NUM_SLOTS)
10075 emit_one_bundle ();
10077 if ((flags & IA64_OPCODE_LAST) != 0)
10078 insn_group_break (1, 0, 0);
10080 md.last_text_seg = now_seg;
10083 input_line_pointer = saved_input_line_pointer;
10086 /* Called when symbol NAME cannot be found in the symbol table.
10087 Should be used for dynamic valued symbols only. */
10090 md_undefined_symbol (name)
10091 char *name ATTRIBUTE_UNUSED;
10096 /* Called for any expression that can not be recognized. When the
10097 function is called, `input_line_pointer' will point to the start of
10104 enum pseudo_type pseudo_type;
10109 switch (*input_line_pointer)
10112 /* Find what relocation pseudo-function we're dealing with. */
10114 ch = *++input_line_pointer;
10115 for (i = 0; i < NELEMS (pseudo_func); ++i)
10116 if (pseudo_func[i].name && pseudo_func[i].name[0] == ch)
10118 len = strlen (pseudo_func[i].name);
10119 if (strncmp (pseudo_func[i].name + 1,
10120 input_line_pointer + 1, len - 1) == 0
10121 && !is_part_of_name (input_line_pointer[len]))
10123 input_line_pointer += len;
10124 pseudo_type = pseudo_func[i].type;
10128 switch (pseudo_type)
10130 case PSEUDO_FUNC_RELOC:
10131 SKIP_WHITESPACE ();
10132 if (*input_line_pointer != '(')
10134 as_bad ("Expected '('");
10138 ++input_line_pointer;
10140 if (*input_line_pointer++ != ')')
10142 as_bad ("Missing ')'");
10145 if (e->X_op != O_symbol)
10147 if (e->X_op != O_pseudo_fixup)
10149 as_bad ("Not a symbolic expression");
10152 if (i != FUNC_LT_RELATIVE)
10154 as_bad ("Illegal combination of relocation functions");
10157 switch (S_GET_VALUE (e->X_op_symbol))
10159 case FUNC_FPTR_RELATIVE:
10160 i = FUNC_LT_FPTR_RELATIVE; break;
10161 case FUNC_DTP_MODULE:
10162 i = FUNC_LT_DTP_MODULE; break;
10163 case FUNC_DTP_RELATIVE:
10164 i = FUNC_LT_DTP_RELATIVE; break;
10165 case FUNC_TP_RELATIVE:
10166 i = FUNC_LT_TP_RELATIVE; break;
10168 as_bad ("Illegal combination of relocation functions");
10172 /* Make sure gas doesn't get rid of local symbols that are used
10174 e->X_op = O_pseudo_fixup;
10175 e->X_op_symbol = pseudo_func[i].u.sym;
10178 case PSEUDO_FUNC_CONST:
10179 e->X_op = O_constant;
10180 e->X_add_number = pseudo_func[i].u.ival;
10183 case PSEUDO_FUNC_REG:
10184 e->X_op = O_register;
10185 e->X_add_number = pseudo_func[i].u.ival;
10189 name = input_line_pointer - 1;
10191 as_bad ("Unknown pseudo function `%s'", name);
10197 ++input_line_pointer;
10199 if (*input_line_pointer != ']')
10201 as_bad ("Closing bracket misssing");
10206 if (e->X_op != O_register)
10207 as_bad ("Register expected as index");
10209 ++input_line_pointer;
10220 ignore_rest_of_line ();
10223 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
10224 a section symbol plus some offset. For relocs involving @fptr(),
10225 directives we don't want such adjustments since we need to have the
10226 original symbol's name in the reloc. */
10228 ia64_fix_adjustable (fix)
10231 /* Prevent all adjustments to global symbols */
10232 if (S_IS_EXTERN (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
10235 switch (fix->fx_r_type)
10237 case BFD_RELOC_IA64_FPTR64I:
10238 case BFD_RELOC_IA64_FPTR32MSB:
10239 case BFD_RELOC_IA64_FPTR32LSB:
10240 case BFD_RELOC_IA64_FPTR64MSB:
10241 case BFD_RELOC_IA64_FPTR64LSB:
10242 case BFD_RELOC_IA64_LTOFF_FPTR22:
10243 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10253 ia64_force_relocation (fix)
10256 switch (fix->fx_r_type)
10258 case BFD_RELOC_IA64_FPTR64I:
10259 case BFD_RELOC_IA64_FPTR32MSB:
10260 case BFD_RELOC_IA64_FPTR32LSB:
10261 case BFD_RELOC_IA64_FPTR64MSB:
10262 case BFD_RELOC_IA64_FPTR64LSB:
10264 case BFD_RELOC_IA64_LTOFF22:
10265 case BFD_RELOC_IA64_LTOFF64I:
10266 case BFD_RELOC_IA64_LTOFF_FPTR22:
10267 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10268 case BFD_RELOC_IA64_PLTOFF22:
10269 case BFD_RELOC_IA64_PLTOFF64I:
10270 case BFD_RELOC_IA64_PLTOFF64MSB:
10271 case BFD_RELOC_IA64_PLTOFF64LSB:
10273 case BFD_RELOC_IA64_LTOFF22X:
10274 case BFD_RELOC_IA64_LDXMOV:
10281 return generic_force_reloc (fix);
10284 /* Decide from what point a pc-relative relocation is relative to,
10285 relative to the pc-relative fixup. Er, relatively speaking. */
10287 ia64_pcrel_from_section (fix, sec)
10291 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
10293 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
10300 /* Used to emit section-relative relocs for the dwarf2 debug data. */
10302 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
10306 expr.X_op = O_pseudo_fixup;
10307 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
10308 expr.X_add_number = 0;
10309 expr.X_add_symbol = symbol;
10310 emit_expr (&expr, size);
10313 /* This is called whenever some data item (not an instruction) needs a
10314 fixup. We pick the right reloc code depending on the byteorder
10315 currently in effect. */
10317 ia64_cons_fix_new (f, where, nbytes, exp)
10323 bfd_reloc_code_real_type code;
10328 /* There are no reloc for 8 and 16 bit quantities, but we allow
10329 them here since they will work fine as long as the expression
10330 is fully defined at the end of the pass over the source file. */
10331 case 1: code = BFD_RELOC_8; break;
10332 case 2: code = BFD_RELOC_16; break;
10334 if (target_big_endian)
10335 code = BFD_RELOC_IA64_DIR32MSB;
10337 code = BFD_RELOC_IA64_DIR32LSB;
10341 /* In 32-bit mode, data8 could mean function descriptors too. */
10342 if (exp->X_op == O_pseudo_fixup
10343 && exp->X_op_symbol
10344 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
10345 && !(md.flags & EF_IA_64_ABI64))
10347 if (target_big_endian)
10348 code = BFD_RELOC_IA64_IPLTMSB;
10350 code = BFD_RELOC_IA64_IPLTLSB;
10351 exp->X_op = O_symbol;
10356 if (target_big_endian)
10357 code = BFD_RELOC_IA64_DIR64MSB;
10359 code = BFD_RELOC_IA64_DIR64LSB;
10364 if (exp->X_op == O_pseudo_fixup
10365 && exp->X_op_symbol
10366 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
10368 if (target_big_endian)
10369 code = BFD_RELOC_IA64_IPLTMSB;
10371 code = BFD_RELOC_IA64_IPLTLSB;
10372 exp->X_op = O_symbol;
10378 as_bad ("Unsupported fixup size %d", nbytes);
10379 ignore_rest_of_line ();
10383 if (exp->X_op == O_pseudo_fixup)
10385 exp->X_op = O_symbol;
10386 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
10387 /* ??? If code unchanged, unsupported. */
10390 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
10391 /* We need to store the byte order in effect in case we're going
10392 to fix an 8 or 16 bit relocation (for which there no real
10393 relocs available). See md_apply_fix3(). */
10394 fix->tc_fix_data.bigendian = target_big_endian;
10397 /* Return the actual relocation we wish to associate with the pseudo
10398 reloc described by SYM and R_TYPE. SYM should be one of the
10399 symbols in the pseudo_func array, or NULL. */
10401 static bfd_reloc_code_real_type
10402 ia64_gen_real_reloc_type (sym, r_type)
10403 struct symbol *sym;
10404 bfd_reloc_code_real_type r_type;
10406 bfd_reloc_code_real_type new = 0;
10413 switch (S_GET_VALUE (sym))
10415 case FUNC_FPTR_RELATIVE:
10418 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
10419 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
10420 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
10421 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
10422 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
10427 case FUNC_GP_RELATIVE:
10430 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
10431 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
10432 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
10433 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
10434 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
10435 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
10440 case FUNC_LT_RELATIVE:
10443 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
10444 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
10449 case FUNC_LT_RELATIVE_X:
10452 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
10457 case FUNC_PC_RELATIVE:
10460 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
10461 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
10462 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
10463 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
10464 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
10465 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
10470 case FUNC_PLT_RELATIVE:
10473 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
10474 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
10475 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
10476 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
10481 case FUNC_SEC_RELATIVE:
10484 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
10485 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
10486 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
10487 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
10492 case FUNC_SEG_RELATIVE:
10495 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
10496 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
10497 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
10498 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
10503 case FUNC_LTV_RELATIVE:
10506 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
10507 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
10508 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
10509 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
10514 case FUNC_LT_FPTR_RELATIVE:
10517 case BFD_RELOC_IA64_IMM22:
10518 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
10519 case BFD_RELOC_IA64_IMM64:
10520 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
10526 case FUNC_TP_RELATIVE:
10529 case BFD_RELOC_IA64_IMM14:
10530 new = BFD_RELOC_IA64_TPREL14; break;
10531 case BFD_RELOC_IA64_IMM22:
10532 new = BFD_RELOC_IA64_TPREL22; break;
10533 case BFD_RELOC_IA64_IMM64:
10534 new = BFD_RELOC_IA64_TPREL64I; break;
10540 case FUNC_LT_TP_RELATIVE:
10543 case BFD_RELOC_IA64_IMM22:
10544 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
10550 case FUNC_LT_DTP_MODULE:
10553 case BFD_RELOC_IA64_IMM22:
10554 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
10560 case FUNC_DTP_RELATIVE:
10563 case BFD_RELOC_IA64_DIR64MSB:
10564 new = BFD_RELOC_IA64_DTPREL64MSB; break;
10565 case BFD_RELOC_IA64_DIR64LSB:
10566 new = BFD_RELOC_IA64_DTPREL64LSB; break;
10567 case BFD_RELOC_IA64_IMM14:
10568 new = BFD_RELOC_IA64_DTPREL14; break;
10569 case BFD_RELOC_IA64_IMM22:
10570 new = BFD_RELOC_IA64_DTPREL22; break;
10571 case BFD_RELOC_IA64_IMM64:
10572 new = BFD_RELOC_IA64_DTPREL64I; break;
10578 case FUNC_LT_DTP_RELATIVE:
10581 case BFD_RELOC_IA64_IMM22:
10582 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
10588 case FUNC_IPLT_RELOC:
10595 /* Hmmmm. Should this ever occur? */
10602 /* Here is where generate the appropriate reloc for pseudo relocation
10605 ia64_validate_fix (fix)
10608 switch (fix->fx_r_type)
10610 case BFD_RELOC_IA64_FPTR64I:
10611 case BFD_RELOC_IA64_FPTR32MSB:
10612 case BFD_RELOC_IA64_FPTR64LSB:
10613 case BFD_RELOC_IA64_LTOFF_FPTR22:
10614 case BFD_RELOC_IA64_LTOFF_FPTR64I:
10615 if (fix->fx_offset != 0)
10616 as_bad_where (fix->fx_file, fix->fx_line,
10617 "No addend allowed in @fptr() relocation");
10625 fix_insn (fix, odesc, value)
10627 const struct ia64_operand *odesc;
10630 bfd_vma insn[3], t0, t1, control_bits;
10635 slot = fix->fx_where & 0x3;
10636 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
10638 /* Bundles are always in little-endian byte order */
10639 t0 = bfd_getl64 (fixpos);
10640 t1 = bfd_getl64 (fixpos + 8);
10641 control_bits = t0 & 0x1f;
10642 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
10643 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
10644 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
10647 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
10649 insn[1] = (value >> 22) & 0x1ffffffffffLL;
10650 insn[2] |= (((value & 0x7f) << 13)
10651 | (((value >> 7) & 0x1ff) << 27)
10652 | (((value >> 16) & 0x1f) << 22)
10653 | (((value >> 21) & 0x1) << 21)
10654 | (((value >> 63) & 0x1) << 36));
10656 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
10658 if (value & ~0x3fffffffffffffffULL)
10659 err = "integer operand out of range";
10660 insn[1] = (value >> 21) & 0x1ffffffffffLL;
10661 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
10663 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
10666 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
10667 insn[2] |= ((((value >> 59) & 0x1) << 36)
10668 | (((value >> 0) & 0xfffff) << 13));
10671 err = (*odesc->insert) (odesc, value, insn + slot);
10674 as_bad_where (fix->fx_file, fix->fx_line, err);
10676 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
10677 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
10678 number_to_chars_littleendian (fixpos + 0, t0, 8);
10679 number_to_chars_littleendian (fixpos + 8, t1, 8);
10682 /* Attempt to simplify or even eliminate a fixup. The return value is
10683 ignored; perhaps it was once meaningful, but now it is historical.
10684 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
10686 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
10690 md_apply_fix3 (fix, valP, seg)
10693 segT seg ATTRIBUTE_UNUSED;
10696 valueT value = *valP;
10698 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
10702 switch (fix->fx_r_type)
10704 case BFD_RELOC_IA64_DIR32MSB:
10705 fix->fx_r_type = BFD_RELOC_IA64_PCREL32MSB;
10708 case BFD_RELOC_IA64_DIR32LSB:
10709 fix->fx_r_type = BFD_RELOC_IA64_PCREL32LSB;
10712 case BFD_RELOC_IA64_DIR64MSB:
10713 fix->fx_r_type = BFD_RELOC_IA64_PCREL64MSB;
10716 case BFD_RELOC_IA64_DIR64LSB:
10717 fix->fx_r_type = BFD_RELOC_IA64_PCREL64LSB;
10726 switch (fix->fx_r_type)
10728 case BFD_RELOC_UNUSED:
10729 /* This must be a TAG13 or TAG13b operand. There are no external
10730 relocs defined for them, so we must give an error. */
10731 as_bad_where (fix->fx_file, fix->fx_line,
10732 "%s must have a constant value",
10733 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
10737 case BFD_RELOC_IA64_TPREL14:
10738 case BFD_RELOC_IA64_TPREL22:
10739 case BFD_RELOC_IA64_TPREL64I:
10740 case BFD_RELOC_IA64_LTOFF_TPREL22:
10741 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
10742 case BFD_RELOC_IA64_DTPREL14:
10743 case BFD_RELOC_IA64_DTPREL22:
10744 case BFD_RELOC_IA64_DTPREL64I:
10745 case BFD_RELOC_IA64_LTOFF_DTPREL22:
10746 S_SET_THREAD_LOCAL (fix->fx_addsy);
10753 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
10755 if (fix->tc_fix_data.bigendian)
10756 number_to_chars_bigendian (fixpos, value, fix->fx_size);
10758 number_to_chars_littleendian (fixpos, value, fix->fx_size);
10763 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
10768 /* Generate the BFD reloc to be stuck in the object file from the
10769 fixup used internally in the assembler. */
10772 tc_gen_reloc (sec, fixp)
10773 asection *sec ATTRIBUTE_UNUSED;
10778 reloc = xmalloc (sizeof (*reloc));
10779 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
10780 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
10781 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
10782 reloc->addend = fixp->fx_offset;
10783 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
10787 as_bad_where (fixp->fx_file, fixp->fx_line,
10788 "Cannot represent %s relocation in object file",
10789 bfd_get_reloc_code_name (fixp->fx_r_type));
10794 /* Turn a string in input_line_pointer into a floating point constant
10795 of type TYPE, and store the appropriate bytes in *LIT. The number
10796 of LITTLENUMS emitted is stored in *SIZE. An error message is
10797 returned, or NULL on OK. */
10799 #define MAX_LITTLENUMS 5
10802 md_atof (type, lit, size)
10807 LITTLENUM_TYPE words[MAX_LITTLENUMS];
10837 return "Bad call to MD_ATOF()";
10839 t = atof_ieee (input_line_pointer, type, words);
10841 input_line_pointer = t;
10843 (*ia64_float_to_chars) (lit, words, prec);
10847 /* It is 10 byte floating point with 6 byte padding. */
10848 memset (&lit [10], 0, 6);
10849 *size = 8 * sizeof (LITTLENUM_TYPE);
10852 *size = prec * sizeof (LITTLENUM_TYPE);
10857 /* Handle ia64 specific semantics of the align directive. */
10860 ia64_md_do_align (n, fill, len, max)
10861 int n ATTRIBUTE_UNUSED;
10862 const char *fill ATTRIBUTE_UNUSED;
10863 int len ATTRIBUTE_UNUSED;
10864 int max ATTRIBUTE_UNUSED;
10866 if (subseg_text_p (now_seg))
10867 ia64_flush_insns ();
10870 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
10871 of an rs_align_code fragment. */
10874 ia64_handle_align (fragp)
10877 /* Use mfi bundle of nops with no stop bits. */
10878 static const unsigned char le_nop[]
10879 = { 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10880 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10881 static const unsigned char le_nop_stop[]
10882 = { 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
10883 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00};
10887 const unsigned char *nop;
10889 if (fragp->fr_type != rs_align_code)
10892 /* Check if this frag has to end with a stop bit. */
10893 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
10895 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
10896 p = fragp->fr_literal + fragp->fr_fix;
10898 /* If no paddings are needed, we check if we need a stop bit. */
10899 if (!bytes && fragp->tc_frag_data)
10901 if (fragp->fr_fix < 16)
10903 /* FIXME: It won't work with
10905 alloc r32=ar.pfs,1,2,4,0
10909 as_bad_where (fragp->fr_file, fragp->fr_line,
10910 _("Can't add stop bit to mark end of instruction group"));
10913 /* Bundles are always in little-endian byte order. Make sure
10914 the previous bundle has the stop bit. */
10918 /* Make sure we are on a 16-byte boundary, in case someone has been
10919 putting data into a text section. */
10922 int fix = bytes & 15;
10923 memset (p, 0, fix);
10926 fragp->fr_fix += fix;
10929 /* Instruction bundles are always little-endian. */
10930 memcpy (p, nop, 16);
10931 fragp->fr_var = 16;
10935 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
10940 number_to_chars_bigendian (lit, (long) (*words++),
10941 sizeof (LITTLENUM_TYPE));
10942 lit += sizeof (LITTLENUM_TYPE);
10947 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
10952 number_to_chars_littleendian (lit, (long) (words[prec]),
10953 sizeof (LITTLENUM_TYPE));
10954 lit += sizeof (LITTLENUM_TYPE);
10959 ia64_elf_section_change_hook (void)
10961 dot_byteorder (-1);
10964 /* Check if a label should be made global. */
10966 ia64_check_label (symbolS *label)
10968 if (*input_line_pointer == ':')
10970 S_SET_EXTERNAL (label);
10971 input_line_pointer++;
10975 /* Used to remember where .alias and .secalias directives are seen. We
10976 will rename symbol and section names when we are about to output
10977 the relocatable file. */
10980 char *file; /* The file where the directive is seen. */
10981 unsigned int line; /* The line number the directive is at. */
10982 const char *name; /* The orignale name of the symbol. */
10985 /* Called for .alias and .secalias directives. If SECTION is 1, it is
10986 .secalias. Otherwise, it is .alias. */
10988 dot_alias (int section)
10990 char *name, *alias;
10994 const char *error_string;
10997 struct hash_control *ahash, *nhash;
11000 name = input_line_pointer;
11001 delim = get_symbol_end ();
11002 end_name = input_line_pointer;
11005 if (name == end_name)
11007 as_bad (_("expected symbol name"));
11008 discard_rest_of_line ();
11012 SKIP_WHITESPACE ();
11014 if (*input_line_pointer != ',')
11017 as_bad (_("expected comma after \"%s\""), name);
11019 ignore_rest_of_line ();
11023 input_line_pointer++;
11026 /* We call demand_copy_C_string to check if alias string is valid.
11027 There should be a closing `"' and no `\0' in the string. */
11028 alias = demand_copy_C_string (&len);
11031 ignore_rest_of_line ();
11035 /* Make a copy of name string. */
11036 len = strlen (name) + 1;
11037 obstack_grow (¬es, name, len);
11038 name = obstack_finish (¬es);
11043 ahash = secalias_hash;
11044 nhash = secalias_name_hash;
11049 ahash = alias_hash;
11050 nhash = alias_name_hash;
11053 /* Check if alias has been used before. */
11054 h = (struct alias *) hash_find (ahash, alias);
11057 if (strcmp (h->name, name))
11058 as_bad (_("`%s' is already the alias of %s `%s'"),
11059 alias, kind, h->name);
11063 /* Check if name already has an alias. */
11064 a = (const char *) hash_find (nhash, name);
11067 if (strcmp (a, alias))
11068 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11072 h = (struct alias *) xmalloc (sizeof (struct alias));
11073 as_where (&h->file, &h->line);
11076 error_string = hash_jam (ahash, alias, (PTR) h);
11079 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11080 alias, kind, error_string);
11084 error_string = hash_jam (nhash, name, (PTR) alias);
11087 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11088 alias, kind, error_string);
11090 obstack_free (¬es, name);
11091 obstack_free (¬es, alias);
11094 demand_empty_rest_of_line ();
11097 /* It renames the original symbol name to its alias. */
11099 do_alias (const char *alias, PTR value)
11101 struct alias *h = (struct alias *) value;
11102 symbolS *sym = symbol_find (h->name);
11105 as_warn_where (h->file, h->line,
11106 _("symbol `%s' aliased to `%s' is not used"),
11109 S_SET_NAME (sym, (char *) alias);
11112 /* Called from write_object_file. */
11114 ia64_adjust_symtab (void)
11116 hash_traverse (alias_hash, do_alias);
11119 /* It renames the original section name to its alias. */
11121 do_secalias (const char *alias, PTR value)
11123 struct alias *h = (struct alias *) value;
11124 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11127 as_warn_where (h->file, h->line,
11128 _("section `%s' aliased to `%s' is not used"),
11134 /* Called from write_object_file. */
11136 ia64_frob_file (void)
11138 hash_traverse (secalias_hash, do_secalias);