1 /* tc-ia64.c -- Assembler for the HP/Intel IA-64 architecture.
2 Copyright 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
3 Free Software Foundation, Inc.
4 Contributed by David Mosberger-Tang <davidm@hpl.hp.com>
6 This file is part of GAS, the GNU Assembler.
8 GAS is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
13 GAS is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GAS; see the file COPYING. If not, write to
20 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
21 Boston, MA 02110-1301, USA. */
35 - labels are wrong if automatic alignment is introduced
36 (e.g., checkout the second real10 definition in test-data.s)
38 <reg>.safe_across_calls and any other DV-related directives I don't
39 have documentation for.
40 verify mod-sched-brs reads/writes are checked/marked (and other
46 #include "safe-ctype.h"
47 #include "dwarf2dbg.h"
50 #include "opcode/ia64.h"
58 #define NELEMS(a) ((int) (sizeof (a)/sizeof ((a)[0])))
60 /* Some systems define MIN in, e.g., param.h. */
62 #define MIN(a,b) ((a) < (b) ? (a) : (b))
65 #define PREV_SLOT md.slot[(md.curr_slot + NUM_SLOTS - 1) % NUM_SLOTS]
66 #define CURR_SLOT md.slot[md.curr_slot]
68 #define O_pseudo_fixup (O_max + 1)
72 /* IA-64 ABI section pseudo-ops. */
73 SPECIAL_SECTION_BSS = 0,
75 SPECIAL_SECTION_SDATA,
76 SPECIAL_SECTION_RODATA,
77 SPECIAL_SECTION_COMMENT,
78 SPECIAL_SECTION_UNWIND,
79 SPECIAL_SECTION_UNWIND_INFO,
80 /* HPUX specific section pseudo-ops. */
81 SPECIAL_SECTION_INIT_ARRAY,
82 SPECIAL_SECTION_FINI_ARRAY,
99 FUNC_LT_FPTR_RELATIVE,
101 FUNC_LT_DTP_RELATIVE,
109 REG_FR = (REG_GR + 128),
110 REG_AR = (REG_FR + 128),
111 REG_CR = (REG_AR + 128),
112 REG_P = (REG_CR + 128),
113 REG_BR = (REG_P + 64),
114 REG_IP = (REG_BR + 8),
121 /* The following are pseudo-registers for use by gas only. */
133 /* The following pseudo-registers are used for unwind directives only: */
141 DYNREG_GR = 0, /* dynamic general purpose register */
142 DYNREG_FR, /* dynamic floating point register */
143 DYNREG_PR, /* dynamic predicate register */
147 enum operand_match_result
150 OPERAND_OUT_OF_RANGE,
154 /* On the ia64, we can't know the address of a text label until the
155 instructions are packed into a bundle. To handle this, we keep
156 track of the list of labels that appear in front of each
160 struct label_fix *next;
162 bfd_boolean dw2_mark_labels;
165 /* This is the endianness of the current section. */
166 extern int target_big_endian;
168 /* This is the default endianness. */
169 static int default_big_endian = TARGET_BYTES_BIG_ENDIAN;
171 void (*ia64_number_to_chars) PARAMS ((char *, valueT, int));
173 static void ia64_float_to_chars_bigendian
174 PARAMS ((char *, LITTLENUM_TYPE *, int));
175 static void ia64_float_to_chars_littleendian
176 PARAMS ((char *, LITTLENUM_TYPE *, int));
177 static void (*ia64_float_to_chars)
178 PARAMS ((char *, LITTLENUM_TYPE *, int));
180 static struct hash_control *alias_hash;
181 static struct hash_control *alias_name_hash;
182 static struct hash_control *secalias_hash;
183 static struct hash_control *secalias_name_hash;
185 /* List of chars besides those in app.c:symbol_chars that can start an
186 operand. Used to prevent the scrubber eating vital white-space. */
187 const char ia64_symbol_chars[] = "@?";
189 /* Characters which always start a comment. */
190 const char comment_chars[] = "";
192 /* Characters which start a comment at the beginning of a line. */
193 const char line_comment_chars[] = "#";
195 /* Characters which may be used to separate multiple commands on a
197 const char line_separator_chars[] = ";{}";
199 /* Characters which are used to indicate an exponent in a floating
201 const char EXP_CHARS[] = "eE";
203 /* Characters which mean that a number is a floating point constant,
205 const char FLT_CHARS[] = "rRsSfFdDxXpP";
207 /* ia64-specific option processing: */
209 const char *md_shortopts = "m:N:x::";
211 struct option md_longopts[] =
213 #define OPTION_MCONSTANT_GP (OPTION_MD_BASE + 1)
214 {"mconstant-gp", no_argument, NULL, OPTION_MCONSTANT_GP},
215 #define OPTION_MAUTO_PIC (OPTION_MD_BASE + 2)
216 {"mauto-pic", no_argument, NULL, OPTION_MAUTO_PIC}
219 size_t md_longopts_size = sizeof (md_longopts);
223 struct hash_control *pseudo_hash; /* pseudo opcode hash table */
224 struct hash_control *reg_hash; /* register name hash table */
225 struct hash_control *dynreg_hash; /* dynamic register hash table */
226 struct hash_control *const_hash; /* constant hash table */
227 struct hash_control *entry_hash; /* code entry hint hash table */
229 symbolS *regsym[REG_NUM];
231 /* If X_op is != O_absent, the registername for the instruction's
232 qualifying predicate. If NULL, p0 is assumed for instructions
233 that are predicatable. */
236 /* Optimize for which CPU. */
243 /* What to do when hint.b is used. */
255 explicit_mode : 1, /* which mode we're in */
256 default_explicit_mode : 1, /* which mode is the default */
257 mode_explicitly_set : 1, /* was the current mode explicitly set? */
259 keep_pending_output : 1;
261 /* What to do when something is wrong with unwind directives. */
264 unwind_check_warning,
268 /* Each bundle consists of up to three instructions. We keep
269 track of four most recent instructions so we can correctly set
270 the end_of_insn_group for the last instruction in a bundle. */
272 int num_slots_in_use;
276 end_of_insn_group : 1,
277 manual_bundling_on : 1,
278 manual_bundling_off : 1,
279 loc_directive_seen : 1;
280 signed char user_template; /* user-selected template, if any */
281 unsigned char qp_regno; /* qualifying predicate */
282 /* This duplicates a good fraction of "struct fix" but we
283 can't use a "struct fix" instead since we can't call
284 fix_new_exp() until we know the address of the instruction. */
288 bfd_reloc_code_real_type code;
289 enum ia64_opnd opnd; /* type of operand in need of fix */
290 unsigned int is_pcrel : 1; /* is operand pc-relative? */
291 expressionS expr; /* the value to be inserted */
293 fixup[2]; /* at most two fixups per insn */
294 struct ia64_opcode *idesc;
295 struct label_fix *label_fixups;
296 struct label_fix *tag_fixups;
297 struct unw_rec_list *unwind_record; /* Unwind directive. */
300 unsigned int src_line;
301 struct dwarf2_line_info debug_line;
309 struct dynreg *next; /* next dynamic register */
311 unsigned short base; /* the base register number */
312 unsigned short num_regs; /* # of registers in this set */
314 *dynreg[DYNREG_NUM_TYPES], in, loc, out, rot;
316 flagword flags; /* ELF-header flags */
319 unsigned hint:1; /* is this hint currently valid? */
320 bfd_vma offset; /* mem.offset offset */
321 bfd_vma base; /* mem.offset base */
324 int path; /* number of alt. entry points seen */
325 const char **entry_labels; /* labels of all alternate paths in
326 the current DV-checking block. */
327 int maxpaths; /* size currently allocated for
330 int pointer_size; /* size in bytes of a pointer */
331 int pointer_size_shift; /* shift size of a pointer for alignment */
335 /* These are not const, because they are modified to MMI for non-itanium1
337 /* MFI bundle of nops. */
338 static unsigned char le_nop[16] =
340 0x0c, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
341 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
343 /* MFI bundle of nops with stop-bit. */
344 static unsigned char le_nop_stop[16] =
346 0x0d, 0x00, 0x00, 0x00, 0x01, 0x00, 0x00, 0x00,
347 0x00, 0x02, 0x00, 0x00, 0x00, 0x00, 0x04, 0x00
350 /* application registers: */
356 #define AR_BSPSTORE 18
371 {"ar.k0", 0}, {"ar.k1", 1}, {"ar.k2", 2}, {"ar.k3", 3},
372 {"ar.k4", 4}, {"ar.k5", 5}, {"ar.k6", 6}, {"ar.k7", 7},
373 {"ar.rsc", 16}, {"ar.bsp", 17},
374 {"ar.bspstore", 18}, {"ar.rnat", 19},
375 {"ar.fcr", 21}, {"ar.eflag", 24},
376 {"ar.csd", 25}, {"ar.ssd", 26},
377 {"ar.cflg", 27}, {"ar.fsr", 28},
378 {"ar.fir", 29}, {"ar.fdr", 30},
379 {"ar.ccv", 32}, {"ar.unat", 36},
380 {"ar.fpsr", 40}, {"ar.itc", 44},
381 {"ar.pfs", 64}, {"ar.lc", 65},
402 /* control registers: */
444 static const struct const_desc
451 /* PSR constant masks: */
454 {"psr.be", ((valueT) 1) << 1},
455 {"psr.up", ((valueT) 1) << 2},
456 {"psr.ac", ((valueT) 1) << 3},
457 {"psr.mfl", ((valueT) 1) << 4},
458 {"psr.mfh", ((valueT) 1) << 5},
460 {"psr.ic", ((valueT) 1) << 13},
461 {"psr.i", ((valueT) 1) << 14},
462 {"psr.pk", ((valueT) 1) << 15},
464 {"psr.dt", ((valueT) 1) << 17},
465 {"psr.dfl", ((valueT) 1) << 18},
466 {"psr.dfh", ((valueT) 1) << 19},
467 {"psr.sp", ((valueT) 1) << 20},
468 {"psr.pp", ((valueT) 1) << 21},
469 {"psr.di", ((valueT) 1) << 22},
470 {"psr.si", ((valueT) 1) << 23},
471 {"psr.db", ((valueT) 1) << 24},
472 {"psr.lp", ((valueT) 1) << 25},
473 {"psr.tb", ((valueT) 1) << 26},
474 {"psr.rt", ((valueT) 1) << 27},
475 /* 28-31: reserved */
476 /* 32-33: cpl (current privilege level) */
477 {"psr.is", ((valueT) 1) << 34},
478 {"psr.mc", ((valueT) 1) << 35},
479 {"psr.it", ((valueT) 1) << 36},
480 {"psr.id", ((valueT) 1) << 37},
481 {"psr.da", ((valueT) 1) << 38},
482 {"psr.dd", ((valueT) 1) << 39},
483 {"psr.ss", ((valueT) 1) << 40},
484 /* 41-42: ri (restart instruction) */
485 {"psr.ed", ((valueT) 1) << 43},
486 {"psr.bn", ((valueT) 1) << 44},
489 /* indirect register-sets/memory: */
498 { "CPUID", IND_CPUID },
499 { "cpuid", IND_CPUID },
511 /* Pseudo functions used to indicate relocation types (these functions
512 start with an at sign (@). */
534 /* reloc pseudo functions (these must come first!): */
535 { "dtpmod", PSEUDO_FUNC_RELOC, { 0 } },
536 { "dtprel", PSEUDO_FUNC_RELOC, { 0 } },
537 { "fptr", PSEUDO_FUNC_RELOC, { 0 } },
538 { "gprel", PSEUDO_FUNC_RELOC, { 0 } },
539 { "ltoff", PSEUDO_FUNC_RELOC, { 0 } },
540 { "ltoffx", PSEUDO_FUNC_RELOC, { 0 } },
541 { "pcrel", PSEUDO_FUNC_RELOC, { 0 } },
542 { "pltoff", PSEUDO_FUNC_RELOC, { 0 } },
543 { "secrel", PSEUDO_FUNC_RELOC, { 0 } },
544 { "segrel", PSEUDO_FUNC_RELOC, { 0 } },
545 { "tprel", PSEUDO_FUNC_RELOC, { 0 } },
546 { "ltv", PSEUDO_FUNC_RELOC, { 0 } },
547 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_FPTR_RELATIVE */
548 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_MODULE */
549 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_DTP_RELATIVE */
550 { NULL, 0, { 0 } }, /* placeholder for FUNC_LT_TP_RELATIVE */
551 { "iplt", PSEUDO_FUNC_RELOC, { 0 } },
553 /* mbtype4 constants: */
554 { "alt", PSEUDO_FUNC_CONST, { 0xa } },
555 { "brcst", PSEUDO_FUNC_CONST, { 0x0 } },
556 { "mix", PSEUDO_FUNC_CONST, { 0x8 } },
557 { "rev", PSEUDO_FUNC_CONST, { 0xb } },
558 { "shuf", PSEUDO_FUNC_CONST, { 0x9 } },
560 /* fclass constants: */
561 { "nat", PSEUDO_FUNC_CONST, { 0x100 } },
562 { "qnan", PSEUDO_FUNC_CONST, { 0x080 } },
563 { "snan", PSEUDO_FUNC_CONST, { 0x040 } },
564 { "pos", PSEUDO_FUNC_CONST, { 0x001 } },
565 { "neg", PSEUDO_FUNC_CONST, { 0x002 } },
566 { "zero", PSEUDO_FUNC_CONST, { 0x004 } },
567 { "unorm", PSEUDO_FUNC_CONST, { 0x008 } },
568 { "norm", PSEUDO_FUNC_CONST, { 0x010 } },
569 { "inf", PSEUDO_FUNC_CONST, { 0x020 } },
571 { "natval", PSEUDO_FUNC_CONST, { 0x100 } }, /* old usage */
573 /* hint constants: */
574 { "pause", PSEUDO_FUNC_CONST, { 0x0 } },
576 /* unwind-related constants: */
577 { "svr4", PSEUDO_FUNC_CONST, { ELFOSABI_NONE } },
578 { "hpux", PSEUDO_FUNC_CONST, { ELFOSABI_HPUX } },
579 { "nt", PSEUDO_FUNC_CONST, { 2 } }, /* conflicts w/ELFOSABI_NETBSD */
580 { "linux", PSEUDO_FUNC_CONST, { ELFOSABI_LINUX } },
581 { "freebsd", PSEUDO_FUNC_CONST, { ELFOSABI_FREEBSD } },
582 { "openvms", PSEUDO_FUNC_CONST, { ELFOSABI_OPENVMS } },
583 { "nsk", PSEUDO_FUNC_CONST, { ELFOSABI_NSK } },
585 /* unwind-related registers: */
586 { "priunat",PSEUDO_FUNC_REG, { REG_PRIUNAT } }
589 /* 41-bit nop opcodes (one per unit): */
590 static const bfd_vma nop[IA64_NUM_UNITS] =
592 0x0000000000LL, /* NIL => break 0 */
593 0x0008000000LL, /* I-unit nop */
594 0x0008000000LL, /* M-unit nop */
595 0x4000000000LL, /* B-unit nop */
596 0x0008000000LL, /* F-unit nop */
597 0x0000000000LL, /* L-"unit" nop immediate */
598 0x0008000000LL, /* X-unit nop */
601 /* Can't be `const' as it's passed to input routines (which have the
602 habit of setting temporary sentinels. */
603 static char special_section_name[][20] =
605 {".bss"}, {".sbss"}, {".sdata"}, {".rodata"}, {".comment"},
606 {".IA_64.unwind"}, {".IA_64.unwind_info"},
607 {".init_array"}, {".fini_array"}
610 /* The best template for a particular sequence of up to three
612 #define N IA64_NUM_TYPES
613 static unsigned char best_template[N][N][N];
616 /* Resource dependencies currently in effect */
618 int depind; /* dependency index */
619 const struct ia64_dependency *dependency; /* actual dependency */
620 unsigned specific:1, /* is this a specific bit/regno? */
621 link_to_qp_branch:1; /* will a branch on the same QP clear it?*/
622 int index; /* specific regno/bit within dependency */
623 int note; /* optional qualifying note (0 if none) */
627 int insn_srlz; /* current insn serialization state */
628 int data_srlz; /* current data serialization state */
629 int qp_regno; /* qualifying predicate for this usage */
630 char *file; /* what file marked this dependency */
631 unsigned int line; /* what line marked this dependency */
632 struct mem_offset mem_offset; /* optional memory offset hint */
633 enum { CMP_NONE, CMP_OR, CMP_AND } cmp_type; /* OR or AND compare? */
634 int path; /* corresponding code entry index */
636 static int regdepslen = 0;
637 static int regdepstotlen = 0;
638 static const char *dv_mode[] = { "RAW", "WAW", "WAR" };
639 static const char *dv_sem[] = { "none", "implied", "impliedf",
640 "data", "instr", "specific", "stop", "other" };
641 static const char *dv_cmp_type[] = { "none", "OR", "AND" };
643 /* Current state of PR mutexation */
644 static struct qpmutex {
647 } *qp_mutexes = NULL; /* QP mutex bitmasks */
648 static int qp_mutexeslen = 0;
649 static int qp_mutexestotlen = 0;
650 static valueT qp_safe_across_calls = 0;
652 /* Current state of PR implications */
653 static struct qp_imply {
656 unsigned p2_branched:1;
658 } *qp_implies = NULL;
659 static int qp_implieslen = 0;
660 static int qp_impliestotlen = 0;
662 /* Keep track of static GR values so that indirect register usage can
663 sometimes be tracked. */
674 (((1 << (8 * sizeof(gr_values->path) - 2)) - 1) << 1) + 1,
680 /* Remember the alignment frag. */
681 static fragS *align_frag;
683 /* These are the routines required to output the various types of
686 /* A slot_number is a frag address plus the slot index (0-2). We use the
687 frag address here so that if there is a section switch in the middle of
688 a function, then instructions emitted to a different section are not
689 counted. Since there may be more than one frag for a function, this
690 means we also need to keep track of which frag this address belongs to
691 so we can compute inter-frag distances. This also nicely solves the
692 problem with nops emitted for align directives, which can't easily be
693 counted, but can easily be derived from frag sizes. */
695 typedef struct unw_rec_list {
697 unsigned long slot_number;
699 struct unw_rec_list *next;
702 #define SLOT_NUM_NOT_SET (unsigned)-1
704 /* Linked list of saved prologue counts. A very poor
705 implementation of a map from label numbers to prologue counts. */
706 typedef struct label_prologue_count
708 struct label_prologue_count *next;
709 unsigned long label_number;
710 unsigned int prologue_count;
711 } label_prologue_count;
713 typedef struct proc_pending
716 struct proc_pending *next;
721 /* Maintain a list of unwind entries for the current function. */
725 /* Any unwind entires that should be attached to the current slot
726 that an insn is being constructed for. */
727 unw_rec_list *current_entry;
729 /* These are used to create the unwind table entry for this function. */
730 proc_pending proc_pending;
731 symbolS *info; /* pointer to unwind info */
732 symbolS *personality_routine;
734 subsegT saved_text_subseg;
735 unsigned int force_unwind_entry : 1; /* force generation of unwind entry? */
737 /* TRUE if processing unwind directives in a prologue region. */
738 unsigned int prologue : 1;
739 unsigned int prologue_mask : 4;
740 unsigned int prologue_gr : 7;
741 unsigned int body : 1;
742 unsigned int insn : 1;
743 unsigned int prologue_count; /* number of .prologues seen so far */
744 /* Prologue counts at previous .label_state directives. */
745 struct label_prologue_count * saved_prologue_counts;
747 /* List of split up .save-s. */
748 unw_p_record *pending_saves;
751 /* The input value is a negated offset from psp, and specifies an address
752 psp - offset. The encoded value is psp + 16 - (4 * offset). Thus we
753 must add 16 and divide by 4 to get the encoded value. */
755 #define ENCODED_PSP_OFFSET(OFFSET) (((OFFSET) + 16) / 4)
757 typedef void (*vbyte_func) PARAMS ((int, char *, char *));
759 /* Forward declarations: */
760 static void set_section PARAMS ((char *name));
761 static unsigned int set_regstack PARAMS ((unsigned int, unsigned int,
762 unsigned int, unsigned int));
763 static void dot_align (int);
764 static void dot_radix PARAMS ((int));
765 static void dot_special_section PARAMS ((int));
766 static void dot_proc PARAMS ((int));
767 static void dot_fframe PARAMS ((int));
768 static void dot_vframe PARAMS ((int));
769 static void dot_vframesp PARAMS ((int));
770 static void dot_save PARAMS ((int));
771 static void dot_restore PARAMS ((int));
772 static void dot_restorereg PARAMS ((int));
773 static void dot_handlerdata PARAMS ((int));
774 static void dot_unwentry PARAMS ((int));
775 static void dot_altrp PARAMS ((int));
776 static void dot_savemem PARAMS ((int));
777 static void dot_saveg PARAMS ((int));
778 static void dot_savef PARAMS ((int));
779 static void dot_saveb PARAMS ((int));
780 static void dot_savegf PARAMS ((int));
781 static void dot_spill PARAMS ((int));
782 static void dot_spillreg PARAMS ((int));
783 static void dot_spillmem PARAMS ((int));
784 static void dot_label_state PARAMS ((int));
785 static void dot_copy_state PARAMS ((int));
786 static void dot_unwabi PARAMS ((int));
787 static void dot_personality PARAMS ((int));
788 static void dot_body PARAMS ((int));
789 static void dot_prologue PARAMS ((int));
790 static void dot_endp PARAMS ((int));
791 static void dot_template PARAMS ((int));
792 static void dot_regstk PARAMS ((int));
793 static void dot_rot PARAMS ((int));
794 static void dot_byteorder PARAMS ((int));
795 static void dot_psr PARAMS ((int));
796 static void dot_alias PARAMS ((int));
797 static void dot_ln PARAMS ((int));
798 static void cross_section PARAMS ((int ref, void (*cons) PARAMS((int)), int ua));
799 static void dot_xdata PARAMS ((int));
800 static void stmt_float_cons PARAMS ((int));
801 static void stmt_cons_ua PARAMS ((int));
802 static void dot_xfloat_cons PARAMS ((int));
803 static void dot_xstringer PARAMS ((int));
804 static void dot_xdata_ua PARAMS ((int));
805 static void dot_xfloat_cons_ua PARAMS ((int));
806 static void print_prmask PARAMS ((valueT mask));
807 static void dot_pred_rel PARAMS ((int));
808 static void dot_reg_val PARAMS ((int));
809 static void dot_serialize PARAMS ((int));
810 static void dot_dv_mode PARAMS ((int));
811 static void dot_entry PARAMS ((int));
812 static void dot_mem_offset PARAMS ((int));
813 static void add_unwind_entry PARAMS((unw_rec_list *, int));
814 static symbolS *declare_register PARAMS ((const char *name, int regnum));
815 static void declare_register_set PARAMS ((const char *, int, int));
816 static unsigned int operand_width PARAMS ((enum ia64_opnd));
817 static enum operand_match_result operand_match PARAMS ((const struct ia64_opcode *idesc,
820 static int parse_operand PARAMS ((expressionS *, int));
821 static struct ia64_opcode * parse_operands PARAMS ((struct ia64_opcode *));
822 static void build_insn PARAMS ((struct slot *, bfd_vma *));
823 static void emit_one_bundle PARAMS ((void));
824 static void fix_insn PARAMS ((fixS *, const struct ia64_operand *, valueT));
825 static bfd_reloc_code_real_type ia64_gen_real_reloc_type PARAMS ((struct symbol *sym,
826 bfd_reloc_code_real_type r_type));
827 static void insn_group_break PARAMS ((int, int, int));
828 static void mark_resource PARAMS ((struct ia64_opcode *, const struct ia64_dependency *,
829 struct rsrc *, int depind, int path));
830 static void add_qp_mutex PARAMS((valueT mask));
831 static void add_qp_imply PARAMS((int p1, int p2));
832 static void clear_qp_branch_flag PARAMS((valueT mask));
833 static void clear_qp_mutex PARAMS((valueT mask));
834 static void clear_qp_implies PARAMS((valueT p1_mask, valueT p2_mask));
835 static int has_suffix_p PARAMS((const char *, const char *));
836 static void clear_register_values PARAMS ((void));
837 static void print_dependency PARAMS ((const char *action, int depind));
838 static void instruction_serialization PARAMS ((void));
839 static void data_serialization PARAMS ((void));
840 static void remove_marked_resource PARAMS ((struct rsrc *));
841 static int is_conditional_branch PARAMS ((struct ia64_opcode *));
842 static int is_taken_branch PARAMS ((struct ia64_opcode *));
843 static int is_interruption_or_rfi PARAMS ((struct ia64_opcode *));
844 static int depends_on PARAMS ((int, struct ia64_opcode *));
845 static int specify_resource PARAMS ((const struct ia64_dependency *,
846 struct ia64_opcode *, int, struct rsrc [], int, int));
847 static int check_dv PARAMS((struct ia64_opcode *idesc));
848 static void check_dependencies PARAMS((struct ia64_opcode *));
849 static void mark_resources PARAMS((struct ia64_opcode *));
850 static void update_dependencies PARAMS((struct ia64_opcode *));
851 static void note_register_values PARAMS((struct ia64_opcode *));
852 static int qp_mutex PARAMS ((int, int, int));
853 static int resources_match PARAMS ((struct rsrc *, struct ia64_opcode *, int, int, int));
854 static void output_vbyte_mem PARAMS ((int, char *, char *));
855 static void count_output PARAMS ((int, char *, char *));
856 static void output_R1_format PARAMS ((vbyte_func, unw_record_type, int));
857 static void output_R2_format PARAMS ((vbyte_func, int, int, unsigned long));
858 static void output_R3_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
859 static void output_P1_format PARAMS ((vbyte_func, int));
860 static void output_P2_format PARAMS ((vbyte_func, int, int));
861 static void output_P3_format PARAMS ((vbyte_func, unw_record_type, int));
862 static void output_P4_format PARAMS ((vbyte_func, unsigned char *, unsigned long));
863 static void output_P5_format PARAMS ((vbyte_func, int, unsigned long));
864 static void output_P6_format PARAMS ((vbyte_func, unw_record_type, int));
865 static void output_P7_format PARAMS ((vbyte_func, unw_record_type, unsigned long, unsigned long));
866 static void output_P8_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
867 static void output_P9_format PARAMS ((vbyte_func, int, int));
868 static void output_P10_format PARAMS ((vbyte_func, int, int));
869 static void output_B1_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
870 static void output_B2_format PARAMS ((vbyte_func, unsigned long, unsigned long));
871 static void output_B3_format PARAMS ((vbyte_func, unsigned long, unsigned long));
872 static void output_B4_format PARAMS ((vbyte_func, unw_record_type, unsigned long));
873 static char format_ab_reg PARAMS ((int, int));
874 static void output_X1_format PARAMS ((vbyte_func, unw_record_type, int, int, unsigned long,
876 static void output_X2_format PARAMS ((vbyte_func, int, int, int, int, int, unsigned long));
877 static void output_X3_format PARAMS ((vbyte_func, unw_record_type, int, int, int, unsigned long,
879 static void output_X4_format PARAMS ((vbyte_func, int, int, int, int, int, int, unsigned long));
880 static unw_rec_list *output_endp PARAMS ((void));
881 static unw_rec_list *output_prologue PARAMS ((void));
882 static unw_rec_list *output_prologue_gr PARAMS ((unsigned int, unsigned int));
883 static unw_rec_list *output_body PARAMS ((void));
884 static unw_rec_list *output_mem_stack_f PARAMS ((unsigned int));
885 static unw_rec_list *output_mem_stack_v PARAMS ((void));
886 static unw_rec_list *output_psp_gr PARAMS ((unsigned int));
887 static unw_rec_list *output_psp_sprel PARAMS ((unsigned int));
888 static unw_rec_list *output_rp_when PARAMS ((void));
889 static unw_rec_list *output_rp_gr PARAMS ((unsigned int));
890 static unw_rec_list *output_rp_br PARAMS ((unsigned int));
891 static unw_rec_list *output_rp_psprel PARAMS ((unsigned int));
892 static unw_rec_list *output_rp_sprel PARAMS ((unsigned int));
893 static unw_rec_list *output_pfs_when PARAMS ((void));
894 static unw_rec_list *output_pfs_gr PARAMS ((unsigned int));
895 static unw_rec_list *output_pfs_psprel PARAMS ((unsigned int));
896 static unw_rec_list *output_pfs_sprel PARAMS ((unsigned int));
897 static unw_rec_list *output_preds_when PARAMS ((void));
898 static unw_rec_list *output_preds_gr PARAMS ((unsigned int));
899 static unw_rec_list *output_preds_psprel PARAMS ((unsigned int));
900 static unw_rec_list *output_preds_sprel PARAMS ((unsigned int));
901 static unw_rec_list *output_fr_mem PARAMS ((unsigned int));
902 static unw_rec_list *output_frgr_mem PARAMS ((unsigned int, unsigned int));
903 static unw_rec_list *output_gr_gr PARAMS ((unsigned int, unsigned int));
904 static unw_rec_list *output_gr_mem PARAMS ((unsigned int));
905 static unw_rec_list *output_br_mem PARAMS ((unsigned int));
906 static unw_rec_list *output_br_gr PARAMS ((unsigned int, unsigned int));
907 static unw_rec_list *output_spill_base PARAMS ((unsigned int));
908 static unw_rec_list *output_unat_when PARAMS ((void));
909 static unw_rec_list *output_unat_gr PARAMS ((unsigned int));
910 static unw_rec_list *output_unat_psprel PARAMS ((unsigned int));
911 static unw_rec_list *output_unat_sprel PARAMS ((unsigned int));
912 static unw_rec_list *output_lc_when PARAMS ((void));
913 static unw_rec_list *output_lc_gr PARAMS ((unsigned int));
914 static unw_rec_list *output_lc_psprel PARAMS ((unsigned int));
915 static unw_rec_list *output_lc_sprel PARAMS ((unsigned int));
916 static unw_rec_list *output_fpsr_when PARAMS ((void));
917 static unw_rec_list *output_fpsr_gr PARAMS ((unsigned int));
918 static unw_rec_list *output_fpsr_psprel PARAMS ((unsigned int));
919 static unw_rec_list *output_fpsr_sprel PARAMS ((unsigned int));
920 static unw_rec_list *output_priunat_when_gr PARAMS ((void));
921 static unw_rec_list *output_priunat_when_mem PARAMS ((void));
922 static unw_rec_list *output_priunat_gr PARAMS ((unsigned int));
923 static unw_rec_list *output_priunat_psprel PARAMS ((unsigned int));
924 static unw_rec_list *output_priunat_sprel PARAMS ((unsigned int));
925 static unw_rec_list *output_bsp_when PARAMS ((void));
926 static unw_rec_list *output_bsp_gr PARAMS ((unsigned int));
927 static unw_rec_list *output_bsp_psprel PARAMS ((unsigned int));
928 static unw_rec_list *output_bsp_sprel PARAMS ((unsigned int));
929 static unw_rec_list *output_bspstore_when PARAMS ((void));
930 static unw_rec_list *output_bspstore_gr PARAMS ((unsigned int));
931 static unw_rec_list *output_bspstore_psprel PARAMS ((unsigned int));
932 static unw_rec_list *output_bspstore_sprel PARAMS ((unsigned int));
933 static unw_rec_list *output_rnat_when PARAMS ((void));
934 static unw_rec_list *output_rnat_gr PARAMS ((unsigned int));
935 static unw_rec_list *output_rnat_psprel PARAMS ((unsigned int));
936 static unw_rec_list *output_rnat_sprel PARAMS ((unsigned int));
937 static unw_rec_list *output_unwabi PARAMS ((unsigned long, unsigned long));
938 static unw_rec_list *output_epilogue PARAMS ((unsigned long));
939 static unw_rec_list *output_label_state PARAMS ((unsigned long));
940 static unw_rec_list *output_copy_state PARAMS ((unsigned long));
941 static unw_rec_list *output_spill_psprel PARAMS ((unsigned int, unsigned int, unsigned int,
943 static unw_rec_list *output_spill_sprel PARAMS ((unsigned int, unsigned int, unsigned int,
945 static unw_rec_list *output_spill_reg PARAMS ((unsigned int, unsigned int, unsigned int,
946 unsigned int, unsigned int));
947 static void process_one_record PARAMS ((unw_rec_list *, vbyte_func));
948 static void process_unw_records PARAMS ((unw_rec_list *, vbyte_func));
949 static int calc_record_size PARAMS ((unw_rec_list *));
950 static void set_imask PARAMS ((unw_rec_list *, unsigned long, unsigned long, unsigned int));
951 static unsigned long slot_index PARAMS ((unsigned long, fragS *,
952 unsigned long, fragS *,
954 static unw_rec_list *optimize_unw_records PARAMS ((unw_rec_list *));
955 static void fixup_unw_records PARAMS ((unw_rec_list *, int));
956 static int parse_predicate_and_operand PARAMS ((expressionS *, unsigned *, const char *));
957 static void convert_expr_to_ab_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
958 static void convert_expr_to_xy_reg PARAMS ((const expressionS *, unsigned int *, unsigned int *, const char *, int));
959 static unsigned int get_saved_prologue_count PARAMS ((unsigned long));
960 static void save_prologue_count PARAMS ((unsigned long, unsigned int));
961 static void free_saved_prologue_counts PARAMS ((void));
963 /* Determine if application register REGNUM resides only in the integer
964 unit (as opposed to the memory unit). */
966 ar_is_only_in_integer_unit (int reg)
969 return reg >= 64 && reg <= 111;
972 /* Determine if application register REGNUM resides only in the memory
973 unit (as opposed to the integer unit). */
975 ar_is_only_in_memory_unit (int reg)
978 return reg >= 0 && reg <= 47;
981 /* Switch to section NAME and create section if necessary. It's
982 rather ugly that we have to manipulate input_line_pointer but I
983 don't see any other way to accomplish the same thing without
984 changing obj-elf.c (which may be the Right Thing, in the end). */
989 char *saved_input_line_pointer;
991 saved_input_line_pointer = input_line_pointer;
992 input_line_pointer = name;
994 input_line_pointer = saved_input_line_pointer;
997 /* Map 's' to SHF_IA_64_SHORT. */
1000 ia64_elf_section_letter (letter, ptr_msg)
1005 return SHF_IA_64_SHORT;
1006 else if (letter == 'o')
1007 return SHF_LINK_ORDER;
1009 *ptr_msg = _("Bad .section directive: want a,o,s,w,x,M,S,G,T in string");
1013 /* Map SHF_IA_64_SHORT to SEC_SMALL_DATA. */
1016 ia64_elf_section_flags (flags, attr, type)
1018 int attr, type ATTRIBUTE_UNUSED;
1020 if (attr & SHF_IA_64_SHORT)
1021 flags |= SEC_SMALL_DATA;
1026 ia64_elf_section_type (str, len)
1030 #define STREQ(s) ((len == sizeof (s) - 1) && (strncmp (str, s, sizeof (s) - 1) == 0))
1032 if (STREQ (ELF_STRING_ia64_unwind_info))
1033 return SHT_PROGBITS;
1035 if (STREQ (ELF_STRING_ia64_unwind_info_once))
1036 return SHT_PROGBITS;
1038 if (STREQ (ELF_STRING_ia64_unwind))
1039 return SHT_IA_64_UNWIND;
1041 if (STREQ (ELF_STRING_ia64_unwind_once))
1042 return SHT_IA_64_UNWIND;
1044 if (STREQ ("unwind"))
1045 return SHT_IA_64_UNWIND;
1052 set_regstack (ins, locs, outs, rots)
1053 unsigned int ins, locs, outs, rots;
1055 /* Size of frame. */
1058 sof = ins + locs + outs;
1061 as_bad ("Size of frame exceeds maximum of 96 registers");
1066 as_warn ("Size of rotating registers exceeds frame size");
1069 md.in.base = REG_GR + 32;
1070 md.loc.base = md.in.base + ins;
1071 md.out.base = md.loc.base + locs;
1073 md.in.num_regs = ins;
1074 md.loc.num_regs = locs;
1075 md.out.num_regs = outs;
1076 md.rot.num_regs = rots;
1083 struct label_fix *lfix;
1085 subsegT saved_subseg;
1089 if (!md.last_text_seg)
1092 saved_seg = now_seg;
1093 saved_subseg = now_subseg;
1095 subseg_set (md.last_text_seg, 0);
1097 while (md.num_slots_in_use > 0)
1098 emit_one_bundle (); /* force out queued instructions */
1100 /* In case there are labels following the last instruction, resolve
1103 for (lfix = CURR_SLOT.label_fixups; lfix; lfix = lfix->next)
1105 symbol_set_value_now (lfix->sym);
1106 mark |= lfix->dw2_mark_labels;
1110 dwarf2_where (&CURR_SLOT.debug_line);
1111 CURR_SLOT.debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
1112 dwarf2_gen_line_info (frag_now_fix (), &CURR_SLOT.debug_line);
1114 CURR_SLOT.label_fixups = 0;
1116 for (lfix = CURR_SLOT.tag_fixups; lfix; lfix = lfix->next)
1117 symbol_set_value_now (lfix->sym);
1118 CURR_SLOT.tag_fixups = 0;
1120 /* In case there are unwind directives following the last instruction,
1121 resolve those now. We only handle prologue, body, and endp directives
1122 here. Give an error for others. */
1123 for (ptr = unwind.current_entry; ptr; ptr = ptr->next)
1125 switch (ptr->r.type)
1131 ptr->slot_number = (unsigned long) frag_more (0);
1132 ptr->slot_frag = frag_now;
1135 /* Allow any record which doesn't have a "t" field (i.e.,
1136 doesn't relate to a particular instruction). */
1152 as_bad (_("Unwind directive not followed by an instruction."));
1156 unwind.current_entry = NULL;
1158 subseg_set (saved_seg, saved_subseg);
1160 if (md.qp.X_op == O_register)
1161 as_bad ("qualifying predicate not followed by instruction");
1165 ia64_do_align (int nbytes)
1167 char *saved_input_line_pointer = input_line_pointer;
1169 input_line_pointer = "";
1170 s_align_bytes (nbytes);
1171 input_line_pointer = saved_input_line_pointer;
1175 ia64_cons_align (nbytes)
1180 char *saved_input_line_pointer = input_line_pointer;
1181 input_line_pointer = "";
1182 s_align_bytes (nbytes);
1183 input_line_pointer = saved_input_line_pointer;
1187 /* Output COUNT bytes to a memory location. */
1188 static char *vbyte_mem_ptr = NULL;
1191 output_vbyte_mem (count, ptr, comment)
1194 char *comment ATTRIBUTE_UNUSED;
1197 if (vbyte_mem_ptr == NULL)
1202 for (x = 0; x < count; x++)
1203 *(vbyte_mem_ptr++) = ptr[x];
1206 /* Count the number of bytes required for records. */
1207 static int vbyte_count = 0;
1209 count_output (count, ptr, comment)
1211 char *ptr ATTRIBUTE_UNUSED;
1212 char *comment ATTRIBUTE_UNUSED;
1214 vbyte_count += count;
1218 output_R1_format (f, rtype, rlen)
1220 unw_record_type rtype;
1227 output_R3_format (f, rtype, rlen);
1233 else if (rtype != prologue)
1234 as_bad ("record type is not valid");
1236 byte = UNW_R1 | (r << 5) | (rlen & 0x1f);
1237 (*f) (1, &byte, NULL);
1241 output_R2_format (f, mask, grsave, rlen)
1248 mask = (mask & 0x0f);
1249 grsave = (grsave & 0x7f);
1251 bytes[0] = (UNW_R2 | (mask >> 1));
1252 bytes[1] = (((mask & 0x01) << 7) | grsave);
1253 count += output_leb128 (bytes + 2, rlen, 0);
1254 (*f) (count, bytes, NULL);
1258 output_R3_format (f, rtype, rlen)
1260 unw_record_type rtype;
1267 output_R1_format (f, rtype, rlen);
1273 else if (rtype != prologue)
1274 as_bad ("record type is not valid");
1275 bytes[0] = (UNW_R3 | r);
1276 count = output_leb128 (bytes + 1, rlen, 0);
1277 (*f) (count + 1, bytes, NULL);
1281 output_P1_format (f, brmask)
1286 byte = UNW_P1 | (brmask & 0x1f);
1287 (*f) (1, &byte, NULL);
1291 output_P2_format (f, brmask, gr)
1297 brmask = (brmask & 0x1f);
1298 bytes[0] = UNW_P2 | (brmask >> 1);
1299 bytes[1] = (((brmask & 1) << 7) | gr);
1300 (*f) (2, bytes, NULL);
1304 output_P3_format (f, rtype, reg)
1306 unw_record_type rtype;
1351 as_bad ("Invalid record type for P3 format.");
1353 bytes[0] = (UNW_P3 | (r >> 1));
1354 bytes[1] = (((r & 1) << 7) | reg);
1355 (*f) (2, bytes, NULL);
1359 output_P4_format (f, imask, imask_size)
1361 unsigned char *imask;
1362 unsigned long imask_size;
1365 (*f) (imask_size, (char *) imask, NULL);
1369 output_P5_format (f, grmask, frmask)
1372 unsigned long frmask;
1375 grmask = (grmask & 0x0f);
1378 bytes[1] = ((grmask << 4) | ((frmask & 0x000f0000) >> 16));
1379 bytes[2] = ((frmask & 0x0000ff00) >> 8);
1380 bytes[3] = (frmask & 0x000000ff);
1381 (*f) (4, bytes, NULL);
1385 output_P6_format (f, rtype, rmask)
1387 unw_record_type rtype;
1393 if (rtype == gr_mem)
1395 else if (rtype != fr_mem)
1396 as_bad ("Invalid record type for format P6");
1397 byte = (UNW_P6 | (r << 4) | (rmask & 0x0f));
1398 (*f) (1, &byte, NULL);
1402 output_P7_format (f, rtype, w1, w2)
1404 unw_record_type rtype;
1411 count += output_leb128 (bytes + 1, w1, 0);
1416 count += output_leb128 (bytes + count, w2 >> 4, 0);
1466 bytes[0] = (UNW_P7 | r);
1467 (*f) (count, bytes, NULL);
1471 output_P8_format (f, rtype, t)
1473 unw_record_type rtype;
1512 case bspstore_psprel:
1515 case bspstore_sprel:
1527 case priunat_when_gr:
1530 case priunat_psprel:
1536 case priunat_when_mem:
1543 count += output_leb128 (bytes + 2, t, 0);
1544 (*f) (count, bytes, NULL);
1548 output_P9_format (f, grmask, gr)
1555 bytes[1] = (grmask & 0x0f);
1556 bytes[2] = (gr & 0x7f);
1557 (*f) (3, bytes, NULL);
1561 output_P10_format (f, abi, context)
1568 bytes[1] = (abi & 0xff);
1569 bytes[2] = (context & 0xff);
1570 (*f) (3, bytes, NULL);
1574 output_B1_format (f, rtype, label)
1576 unw_record_type rtype;
1577 unsigned long label;
1583 output_B4_format (f, rtype, label);
1586 if (rtype == copy_state)
1588 else if (rtype != label_state)
1589 as_bad ("Invalid record type for format B1");
1591 byte = (UNW_B1 | (r << 5) | (label & 0x1f));
1592 (*f) (1, &byte, NULL);
1596 output_B2_format (f, ecount, t)
1598 unsigned long ecount;
1605 output_B3_format (f, ecount, t);
1608 bytes[0] = (UNW_B2 | (ecount & 0x1f));
1609 count += output_leb128 (bytes + 1, t, 0);
1610 (*f) (count, bytes, NULL);
1614 output_B3_format (f, ecount, t)
1616 unsigned long ecount;
1623 output_B2_format (f, ecount, t);
1627 count += output_leb128 (bytes + 1, t, 0);
1628 count += output_leb128 (bytes + count, ecount, 0);
1629 (*f) (count, bytes, NULL);
1633 output_B4_format (f, rtype, label)
1635 unw_record_type rtype;
1636 unsigned long label;
1643 output_B1_format (f, rtype, label);
1647 if (rtype == copy_state)
1649 else if (rtype != label_state)
1650 as_bad ("Invalid record type for format B1");
1652 bytes[0] = (UNW_B4 | (r << 3));
1653 count += output_leb128 (bytes + 1, label, 0);
1654 (*f) (count, bytes, NULL);
1658 format_ab_reg (ab, reg)
1665 ret = (ab << 5) | reg;
1670 output_X1_format (f, rtype, ab, reg, t, w1)
1672 unw_record_type rtype;
1682 if (rtype == spill_sprel)
1684 else if (rtype != spill_psprel)
1685 as_bad ("Invalid record type for format X1");
1686 bytes[1] = ((r << 7) | format_ab_reg (ab, reg));
1687 count += output_leb128 (bytes + 2, t, 0);
1688 count += output_leb128 (bytes + count, w1, 0);
1689 (*f) (count, bytes, NULL);
1693 output_X2_format (f, ab, reg, x, y, treg, t)
1702 bytes[1] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1703 bytes[2] = (((y & 1) << 7) | (treg & 0x7f));
1704 count += output_leb128 (bytes + 3, t, 0);
1705 (*f) (count, bytes, NULL);
1709 output_X3_format (f, rtype, qp, ab, reg, t, w1)
1711 unw_record_type rtype;
1722 if (rtype == spill_sprel_p)
1724 else if (rtype != spill_psprel_p)
1725 as_bad ("Invalid record type for format X3");
1726 bytes[1] = ((r << 7) | (qp & 0x3f));
1727 bytes[2] = format_ab_reg (ab, reg);
1728 count += output_leb128 (bytes + 3, t, 0);
1729 count += output_leb128 (bytes + count, w1, 0);
1730 (*f) (count, bytes, NULL);
1734 output_X4_format (f, qp, ab, reg, x, y, treg, t)
1744 bytes[1] = (qp & 0x3f);
1745 bytes[2] = (((x & 1) << 7) | format_ab_reg (ab, reg));
1746 bytes[3] = (((y & 1) << 7) | (treg & 0x7f));
1747 count += output_leb128 (bytes + 4, t, 0);
1748 (*f) (count, bytes, NULL);
1751 /* This function checks whether there are any outstanding .save-s and
1752 discards them if so. */
1755 check_pending_save (void)
1757 if (unwind.pending_saves)
1759 unw_rec_list *cur, *prev;
1761 as_warn ("Previous .save incomplete");
1762 for (cur = unwind.list, prev = NULL; cur; )
1763 if (&cur->r.record.p == unwind.pending_saves)
1766 prev->next = cur->next;
1768 unwind.list = cur->next;
1769 if (cur == unwind.tail)
1771 if (cur == unwind.current_entry)
1772 unwind.current_entry = cur->next;
1773 /* Don't free the first discarded record, it's being used as
1774 terminator for (currently) br_gr and gr_gr processing, and
1775 also prevents leaving a dangling pointer to it in its
1777 cur->r.record.p.grmask = 0;
1778 cur->r.record.p.brmask = 0;
1779 cur->r.record.p.frmask = 0;
1780 prev = cur->r.record.p.next;
1781 cur->r.record.p.next = NULL;
1793 cur = cur->r.record.p.next;
1796 unwind.pending_saves = NULL;
1800 /* This function allocates a record list structure, and initializes fields. */
1802 static unw_rec_list *
1803 alloc_record (unw_record_type t)
1806 ptr = xmalloc (sizeof (*ptr));
1807 memset (ptr, 0, sizeof (*ptr));
1808 ptr->slot_number = SLOT_NUM_NOT_SET;
1813 /* Dummy unwind record used for calculating the length of the last prologue or
1816 static unw_rec_list *
1819 unw_rec_list *ptr = alloc_record (endp);
1823 static unw_rec_list *
1826 unw_rec_list *ptr = alloc_record (prologue);
1827 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1831 static unw_rec_list *
1832 output_prologue_gr (saved_mask, reg)
1833 unsigned int saved_mask;
1836 unw_rec_list *ptr = alloc_record (prologue_gr);
1837 memset (&ptr->r.record.r.mask, 0, sizeof (ptr->r.record.r.mask));
1838 ptr->r.record.r.grmask = saved_mask;
1839 ptr->r.record.r.grsave = reg;
1843 static unw_rec_list *
1846 unw_rec_list *ptr = alloc_record (body);
1850 static unw_rec_list *
1851 output_mem_stack_f (size)
1854 unw_rec_list *ptr = alloc_record (mem_stack_f);
1855 ptr->r.record.p.size = size;
1859 static unw_rec_list *
1860 output_mem_stack_v ()
1862 unw_rec_list *ptr = alloc_record (mem_stack_v);
1866 static unw_rec_list *
1870 unw_rec_list *ptr = alloc_record (psp_gr);
1871 ptr->r.record.p.r.gr = gr;
1875 static unw_rec_list *
1876 output_psp_sprel (offset)
1877 unsigned int offset;
1879 unw_rec_list *ptr = alloc_record (psp_sprel);
1880 ptr->r.record.p.off.sp = offset / 4;
1884 static unw_rec_list *
1887 unw_rec_list *ptr = alloc_record (rp_when);
1891 static unw_rec_list *
1895 unw_rec_list *ptr = alloc_record (rp_gr);
1896 ptr->r.record.p.r.gr = gr;
1900 static unw_rec_list *
1904 unw_rec_list *ptr = alloc_record (rp_br);
1905 ptr->r.record.p.r.br = br;
1909 static unw_rec_list *
1910 output_rp_psprel (offset)
1911 unsigned int offset;
1913 unw_rec_list *ptr = alloc_record (rp_psprel);
1914 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
1918 static unw_rec_list *
1919 output_rp_sprel (offset)
1920 unsigned int offset;
1922 unw_rec_list *ptr = alloc_record (rp_sprel);
1923 ptr->r.record.p.off.sp = offset / 4;
1927 static unw_rec_list *
1930 unw_rec_list *ptr = alloc_record (pfs_when);
1934 static unw_rec_list *
1938 unw_rec_list *ptr = alloc_record (pfs_gr);
1939 ptr->r.record.p.r.gr = gr;
1943 static unw_rec_list *
1944 output_pfs_psprel (offset)
1945 unsigned int offset;
1947 unw_rec_list *ptr = alloc_record (pfs_psprel);
1948 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
1952 static unw_rec_list *
1953 output_pfs_sprel (offset)
1954 unsigned int offset;
1956 unw_rec_list *ptr = alloc_record (pfs_sprel);
1957 ptr->r.record.p.off.sp = offset / 4;
1961 static unw_rec_list *
1962 output_preds_when ()
1964 unw_rec_list *ptr = alloc_record (preds_when);
1968 static unw_rec_list *
1969 output_preds_gr (gr)
1972 unw_rec_list *ptr = alloc_record (preds_gr);
1973 ptr->r.record.p.r.gr = gr;
1977 static unw_rec_list *
1978 output_preds_psprel (offset)
1979 unsigned int offset;
1981 unw_rec_list *ptr = alloc_record (preds_psprel);
1982 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
1986 static unw_rec_list *
1987 output_preds_sprel (offset)
1988 unsigned int offset;
1990 unw_rec_list *ptr = alloc_record (preds_sprel);
1991 ptr->r.record.p.off.sp = offset / 4;
1995 static unw_rec_list *
1996 output_fr_mem (mask)
1999 unw_rec_list *ptr = alloc_record (fr_mem);
2000 unw_rec_list *cur = ptr;
2002 ptr->r.record.p.frmask = mask;
2003 unwind.pending_saves = &ptr->r.record.p;
2006 unw_rec_list *prev = cur;
2008 /* Clear least significant set bit. */
2009 mask &= ~(mask & (~mask + 1));
2012 cur = alloc_record (fr_mem);
2013 cur->r.record.p.frmask = mask;
2014 /* Retain only least significant bit. */
2015 prev->r.record.p.frmask ^= mask;
2016 prev->r.record.p.next = cur;
2020 static unw_rec_list *
2021 output_frgr_mem (gr_mask, fr_mask)
2022 unsigned int gr_mask;
2023 unsigned int fr_mask;
2025 unw_rec_list *ptr = alloc_record (frgr_mem);
2026 unw_rec_list *cur = ptr;
2028 unwind.pending_saves = &cur->r.record.p;
2029 cur->r.record.p.frmask = fr_mask;
2032 unw_rec_list *prev = cur;
2034 /* Clear least significant set bit. */
2035 fr_mask &= ~(fr_mask & (~fr_mask + 1));
2036 if (!gr_mask && !fr_mask)
2038 cur = alloc_record (frgr_mem);
2039 cur->r.record.p.frmask = fr_mask;
2040 /* Retain only least significant bit. */
2041 prev->r.record.p.frmask ^= fr_mask;
2042 prev->r.record.p.next = cur;
2044 cur->r.record.p.grmask = gr_mask;
2047 unw_rec_list *prev = cur;
2049 /* Clear least significant set bit. */
2050 gr_mask &= ~(gr_mask & (~gr_mask + 1));
2053 cur = alloc_record (frgr_mem);
2054 cur->r.record.p.grmask = gr_mask;
2055 /* Retain only least significant bit. */
2056 prev->r.record.p.grmask ^= gr_mask;
2057 prev->r.record.p.next = cur;
2061 static unw_rec_list *
2062 output_gr_gr (mask, reg)
2066 unw_rec_list *ptr = alloc_record (gr_gr);
2067 unw_rec_list *cur = ptr;
2069 ptr->r.record.p.grmask = mask;
2070 ptr->r.record.p.r.gr = reg;
2071 unwind.pending_saves = &ptr->r.record.p;
2074 unw_rec_list *prev = cur;
2076 /* Clear least significant set bit. */
2077 mask &= ~(mask & (~mask + 1));
2080 cur = alloc_record (gr_gr);
2081 cur->r.record.p.grmask = mask;
2082 /* Indicate this record shouldn't be output. */
2083 cur->r.record.p.r.gr = REG_NUM;
2084 /* Retain only least significant bit. */
2085 prev->r.record.p.grmask ^= mask;
2086 prev->r.record.p.next = cur;
2090 static unw_rec_list *
2091 output_gr_mem (mask)
2094 unw_rec_list *ptr = alloc_record (gr_mem);
2095 unw_rec_list *cur = ptr;
2097 ptr->r.record.p.grmask = mask;
2098 unwind.pending_saves = &ptr->r.record.p;
2101 unw_rec_list *prev = cur;
2103 /* Clear least significant set bit. */
2104 mask &= ~(mask & (~mask + 1));
2107 cur = alloc_record (gr_mem);
2108 cur->r.record.p.grmask = mask;
2109 /* Retain only least significant bit. */
2110 prev->r.record.p.grmask ^= mask;
2111 prev->r.record.p.next = cur;
2115 static unw_rec_list *
2116 output_br_mem (unsigned int mask)
2118 unw_rec_list *ptr = alloc_record (br_mem);
2119 unw_rec_list *cur = ptr;
2121 ptr->r.record.p.brmask = mask;
2122 unwind.pending_saves = &ptr->r.record.p;
2125 unw_rec_list *prev = cur;
2127 /* Clear least significant set bit. */
2128 mask &= ~(mask & (~mask + 1));
2131 cur = alloc_record (br_mem);
2132 cur->r.record.p.brmask = mask;
2133 /* Retain only least significant bit. */
2134 prev->r.record.p.brmask ^= mask;
2135 prev->r.record.p.next = cur;
2139 static unw_rec_list *
2140 output_br_gr (mask, reg)
2144 unw_rec_list *ptr = alloc_record (br_gr);
2145 unw_rec_list *cur = ptr;
2147 ptr->r.record.p.brmask = mask;
2148 ptr->r.record.p.r.gr = reg;
2149 unwind.pending_saves = &ptr->r.record.p;
2152 unw_rec_list *prev = cur;
2154 /* Clear least significant set bit. */
2155 mask &= ~(mask & (~mask + 1));
2158 cur = alloc_record (br_gr);
2159 cur->r.record.p.brmask = mask;
2160 /* Indicate this record shouldn't be output. */
2161 cur->r.record.p.r.gr = REG_NUM;
2162 /* Retain only least significant bit. */
2163 prev->r.record.p.brmask ^= mask;
2164 prev->r.record.p.next = cur;
2168 static unw_rec_list *
2169 output_spill_base (offset)
2170 unsigned int offset;
2172 unw_rec_list *ptr = alloc_record (spill_base);
2173 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2177 static unw_rec_list *
2180 unw_rec_list *ptr = alloc_record (unat_when);
2184 static unw_rec_list *
2188 unw_rec_list *ptr = alloc_record (unat_gr);
2189 ptr->r.record.p.r.gr = gr;
2193 static unw_rec_list *
2194 output_unat_psprel (offset)
2195 unsigned int offset;
2197 unw_rec_list *ptr = alloc_record (unat_psprel);
2198 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2202 static unw_rec_list *
2203 output_unat_sprel (offset)
2204 unsigned int offset;
2206 unw_rec_list *ptr = alloc_record (unat_sprel);
2207 ptr->r.record.p.off.sp = offset / 4;
2211 static unw_rec_list *
2214 unw_rec_list *ptr = alloc_record (lc_when);
2218 static unw_rec_list *
2222 unw_rec_list *ptr = alloc_record (lc_gr);
2223 ptr->r.record.p.r.gr = gr;
2227 static unw_rec_list *
2228 output_lc_psprel (offset)
2229 unsigned int offset;
2231 unw_rec_list *ptr = alloc_record (lc_psprel);
2232 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2236 static unw_rec_list *
2237 output_lc_sprel (offset)
2238 unsigned int offset;
2240 unw_rec_list *ptr = alloc_record (lc_sprel);
2241 ptr->r.record.p.off.sp = offset / 4;
2245 static unw_rec_list *
2248 unw_rec_list *ptr = alloc_record (fpsr_when);
2252 static unw_rec_list *
2256 unw_rec_list *ptr = alloc_record (fpsr_gr);
2257 ptr->r.record.p.r.gr = gr;
2261 static unw_rec_list *
2262 output_fpsr_psprel (offset)
2263 unsigned int offset;
2265 unw_rec_list *ptr = alloc_record (fpsr_psprel);
2266 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2270 static unw_rec_list *
2271 output_fpsr_sprel (offset)
2272 unsigned int offset;
2274 unw_rec_list *ptr = alloc_record (fpsr_sprel);
2275 ptr->r.record.p.off.sp = offset / 4;
2279 static unw_rec_list *
2280 output_priunat_when_gr ()
2282 unw_rec_list *ptr = alloc_record (priunat_when_gr);
2286 static unw_rec_list *
2287 output_priunat_when_mem ()
2289 unw_rec_list *ptr = alloc_record (priunat_when_mem);
2293 static unw_rec_list *
2294 output_priunat_gr (gr)
2297 unw_rec_list *ptr = alloc_record (priunat_gr);
2298 ptr->r.record.p.r.gr = gr;
2302 static unw_rec_list *
2303 output_priunat_psprel (offset)
2304 unsigned int offset;
2306 unw_rec_list *ptr = alloc_record (priunat_psprel);
2307 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2311 static unw_rec_list *
2312 output_priunat_sprel (offset)
2313 unsigned int offset;
2315 unw_rec_list *ptr = alloc_record (priunat_sprel);
2316 ptr->r.record.p.off.sp = offset / 4;
2320 static unw_rec_list *
2323 unw_rec_list *ptr = alloc_record (bsp_when);
2327 static unw_rec_list *
2331 unw_rec_list *ptr = alloc_record (bsp_gr);
2332 ptr->r.record.p.r.gr = gr;
2336 static unw_rec_list *
2337 output_bsp_psprel (offset)
2338 unsigned int offset;
2340 unw_rec_list *ptr = alloc_record (bsp_psprel);
2341 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2345 static unw_rec_list *
2346 output_bsp_sprel (offset)
2347 unsigned int offset;
2349 unw_rec_list *ptr = alloc_record (bsp_sprel);
2350 ptr->r.record.p.off.sp = offset / 4;
2354 static unw_rec_list *
2355 output_bspstore_when ()
2357 unw_rec_list *ptr = alloc_record (bspstore_when);
2361 static unw_rec_list *
2362 output_bspstore_gr (gr)
2365 unw_rec_list *ptr = alloc_record (bspstore_gr);
2366 ptr->r.record.p.r.gr = gr;
2370 static unw_rec_list *
2371 output_bspstore_psprel (offset)
2372 unsigned int offset;
2374 unw_rec_list *ptr = alloc_record (bspstore_psprel);
2375 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2379 static unw_rec_list *
2380 output_bspstore_sprel (offset)
2381 unsigned int offset;
2383 unw_rec_list *ptr = alloc_record (bspstore_sprel);
2384 ptr->r.record.p.off.sp = offset / 4;
2388 static unw_rec_list *
2391 unw_rec_list *ptr = alloc_record (rnat_when);
2395 static unw_rec_list *
2399 unw_rec_list *ptr = alloc_record (rnat_gr);
2400 ptr->r.record.p.r.gr = gr;
2404 static unw_rec_list *
2405 output_rnat_psprel (offset)
2406 unsigned int offset;
2408 unw_rec_list *ptr = alloc_record (rnat_psprel);
2409 ptr->r.record.p.off.psp = ENCODED_PSP_OFFSET (offset);
2413 static unw_rec_list *
2414 output_rnat_sprel (offset)
2415 unsigned int offset;
2417 unw_rec_list *ptr = alloc_record (rnat_sprel);
2418 ptr->r.record.p.off.sp = offset / 4;
2422 static unw_rec_list *
2423 output_unwabi (abi, context)
2425 unsigned long context;
2427 unw_rec_list *ptr = alloc_record (unwabi);
2428 ptr->r.record.p.abi = abi;
2429 ptr->r.record.p.context = context;
2433 static unw_rec_list *
2434 output_epilogue (unsigned long ecount)
2436 unw_rec_list *ptr = alloc_record (epilogue);
2437 ptr->r.record.b.ecount = ecount;
2441 static unw_rec_list *
2442 output_label_state (unsigned long label)
2444 unw_rec_list *ptr = alloc_record (label_state);
2445 ptr->r.record.b.label = label;
2449 static unw_rec_list *
2450 output_copy_state (unsigned long label)
2452 unw_rec_list *ptr = alloc_record (copy_state);
2453 ptr->r.record.b.label = label;
2457 static unw_rec_list *
2458 output_spill_psprel (ab, reg, offset, predicate)
2461 unsigned int offset;
2462 unsigned int predicate;
2464 unw_rec_list *ptr = alloc_record (predicate ? spill_psprel_p : spill_psprel);
2465 ptr->r.record.x.ab = ab;
2466 ptr->r.record.x.reg = reg;
2467 ptr->r.record.x.where.pspoff = ENCODED_PSP_OFFSET (offset);
2468 ptr->r.record.x.qp = predicate;
2472 static unw_rec_list *
2473 output_spill_sprel (ab, reg, offset, predicate)
2476 unsigned int offset;
2477 unsigned int predicate;
2479 unw_rec_list *ptr = alloc_record (predicate ? spill_sprel_p : spill_sprel);
2480 ptr->r.record.x.ab = ab;
2481 ptr->r.record.x.reg = reg;
2482 ptr->r.record.x.where.spoff = offset / 4;
2483 ptr->r.record.x.qp = predicate;
2487 static unw_rec_list *
2488 output_spill_reg (ab, reg, targ_reg, xy, predicate)
2491 unsigned int targ_reg;
2493 unsigned int predicate;
2495 unw_rec_list *ptr = alloc_record (predicate ? spill_reg_p : spill_reg);
2496 ptr->r.record.x.ab = ab;
2497 ptr->r.record.x.reg = reg;
2498 ptr->r.record.x.where.reg = targ_reg;
2499 ptr->r.record.x.xy = xy;
2500 ptr->r.record.x.qp = predicate;
2504 /* Given a unw_rec_list process the correct format with the
2505 specified function. */
2508 process_one_record (ptr, f)
2512 unsigned int fr_mask, gr_mask;
2514 switch (ptr->r.type)
2516 /* This is a dummy record that takes up no space in the output. */
2524 /* These are taken care of by prologue/prologue_gr. */
2529 if (ptr->r.type == prologue_gr)
2530 output_R2_format (f, ptr->r.record.r.grmask,
2531 ptr->r.record.r.grsave, ptr->r.record.r.rlen);
2533 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2535 /* Output descriptor(s) for union of register spills (if any). */
2536 gr_mask = ptr->r.record.r.mask.gr_mem;
2537 fr_mask = ptr->r.record.r.mask.fr_mem;
2540 if ((fr_mask & ~0xfUL) == 0)
2541 output_P6_format (f, fr_mem, fr_mask);
2544 output_P5_format (f, gr_mask, fr_mask);
2549 output_P6_format (f, gr_mem, gr_mask);
2550 if (ptr->r.record.r.mask.br_mem)
2551 output_P1_format (f, ptr->r.record.r.mask.br_mem);
2553 /* output imask descriptor if necessary: */
2554 if (ptr->r.record.r.mask.i)
2555 output_P4_format (f, ptr->r.record.r.mask.i,
2556 ptr->r.record.r.imask_size);
2560 output_R1_format (f, ptr->r.type, ptr->r.record.r.rlen);
2564 output_P7_format (f, ptr->r.type, ptr->r.record.p.t,
2565 ptr->r.record.p.size);
2578 output_P3_format (f, ptr->r.type, ptr->r.record.p.r.gr);
2581 output_P3_format (f, rp_br, ptr->r.record.p.r.br);
2584 output_P7_format (f, psp_sprel, ptr->r.record.p.off.sp, 0);
2592 output_P7_format (f, ptr->r.type, ptr->r.record.p.t, 0);
2601 output_P7_format (f, ptr->r.type, ptr->r.record.p.off.psp, 0);
2611 case bspstore_sprel:
2613 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.sp);
2616 if (ptr->r.record.p.r.gr < REG_NUM)
2618 const unw_rec_list *cur = ptr;
2620 gr_mask = cur->r.record.p.grmask;
2621 while ((cur = cur->r.record.p.next) != NULL)
2622 gr_mask |= cur->r.record.p.grmask;
2623 output_P9_format (f, gr_mask, ptr->r.record.p.r.gr);
2627 if (ptr->r.record.p.r.gr < REG_NUM)
2629 const unw_rec_list *cur = ptr;
2631 gr_mask = cur->r.record.p.brmask;
2632 while ((cur = cur->r.record.p.next) != NULL)
2633 gr_mask |= cur->r.record.p.brmask;
2634 output_P2_format (f, gr_mask, ptr->r.record.p.r.gr);
2638 as_bad ("spill_mask record unimplemented.");
2640 case priunat_when_gr:
2641 case priunat_when_mem:
2645 output_P8_format (f, ptr->r.type, ptr->r.record.p.t);
2647 case priunat_psprel:
2649 case bspstore_psprel:
2651 output_P8_format (f, ptr->r.type, ptr->r.record.p.off.psp);
2654 output_P10_format (f, ptr->r.record.p.abi, ptr->r.record.p.context);
2657 output_B3_format (f, ptr->r.record.b.ecount, ptr->r.record.b.t);
2661 output_B4_format (f, ptr->r.type, ptr->r.record.b.label);
2664 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2665 ptr->r.record.x.reg, ptr->r.record.x.t,
2666 ptr->r.record.x.where.pspoff);
2669 output_X1_format (f, ptr->r.type, ptr->r.record.x.ab,
2670 ptr->r.record.x.reg, ptr->r.record.x.t,
2671 ptr->r.record.x.where.spoff);
2674 output_X2_format (f, ptr->r.record.x.ab, ptr->r.record.x.reg,
2675 ptr->r.record.x.xy >> 1, ptr->r.record.x.xy,
2676 ptr->r.record.x.where.reg, ptr->r.record.x.t);
2678 case spill_psprel_p:
2679 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2680 ptr->r.record.x.ab, ptr->r.record.x.reg,
2681 ptr->r.record.x.t, ptr->r.record.x.where.pspoff);
2684 output_X3_format (f, ptr->r.type, ptr->r.record.x.qp,
2685 ptr->r.record.x.ab, ptr->r.record.x.reg,
2686 ptr->r.record.x.t, ptr->r.record.x.where.spoff);
2689 output_X4_format (f, ptr->r.record.x.qp, ptr->r.record.x.ab,
2690 ptr->r.record.x.reg, ptr->r.record.x.xy >> 1,
2691 ptr->r.record.x.xy, ptr->r.record.x.where.reg,
2695 as_bad ("record_type_not_valid");
2700 /* Given a unw_rec_list list, process all the records with
2701 the specified function. */
2703 process_unw_records (list, f)
2708 for (ptr = list; ptr; ptr = ptr->next)
2709 process_one_record (ptr, f);
2712 /* Determine the size of a record list in bytes. */
2714 calc_record_size (list)
2718 process_unw_records (list, count_output);
2722 /* Return the number of bits set in the input value.
2723 Perhaps this has a better place... */
2724 #if __GNUC__ > 3 || (__GNUC__ == 3 && __GNUC_MINOR__ >= 4)
2725 # define popcount __builtin_popcount
2728 popcount (unsigned x)
2730 static const unsigned char popcnt[16] =
2738 if (x < NELEMS (popcnt))
2740 return popcnt[x % NELEMS (popcnt)] + popcount (x / NELEMS (popcnt));
2744 /* Update IMASK bitmask to reflect the fact that one or more registers
2745 of type TYPE are saved starting at instruction with index T. If N
2746 bits are set in REGMASK, it is assumed that instructions T through
2747 T+N-1 save these registers.
2751 1: instruction saves next fp reg
2752 2: instruction saves next general reg
2753 3: instruction saves next branch reg */
2755 set_imask (region, regmask, t, type)
2756 unw_rec_list *region;
2757 unsigned long regmask;
2761 unsigned char *imask;
2762 unsigned long imask_size;
2766 imask = region->r.record.r.mask.i;
2767 imask_size = region->r.record.r.imask_size;
2770 imask_size = (region->r.record.r.rlen * 2 + 7) / 8 + 1;
2771 imask = xmalloc (imask_size);
2772 memset (imask, 0, imask_size);
2774 region->r.record.r.imask_size = imask_size;
2775 region->r.record.r.mask.i = imask;
2779 pos = 2 * (3 - t % 4);
2782 if (i >= imask_size)
2784 as_bad ("Ignoring attempt to spill beyond end of region");
2788 imask[i] |= (type & 0x3) << pos;
2790 regmask &= (regmask - 1);
2800 /* Return the number of instruction slots from FIRST_ADDR to SLOT_ADDR.
2801 SLOT_FRAG is the frag containing SLOT_ADDR, and FIRST_FRAG is the frag
2802 containing FIRST_ADDR. If BEFORE_RELAX, then we use worst-case estimates
2806 slot_index (slot_addr, slot_frag, first_addr, first_frag, before_relax)
2807 unsigned long slot_addr;
2809 unsigned long first_addr;
2813 unsigned long index = 0;
2815 /* First time we are called, the initial address and frag are invalid. */
2816 if (first_addr == 0)
2819 /* If the two addresses are in different frags, then we need to add in
2820 the remaining size of this frag, and then the entire size of intermediate
2822 while (slot_frag != first_frag)
2824 unsigned long start_addr = (unsigned long) &first_frag->fr_literal;
2828 /* We can get the final addresses only during and after
2830 if (first_frag->fr_next && first_frag->fr_next->fr_address)
2831 index += 3 * ((first_frag->fr_next->fr_address
2832 - first_frag->fr_address
2833 - first_frag->fr_fix) >> 4);
2836 /* We don't know what the final addresses will be. We try our
2837 best to estimate. */
2838 switch (first_frag->fr_type)
2844 as_fatal ("only constant space allocation is supported");
2850 /* Take alignment into account. Assume the worst case
2851 before relaxation. */
2852 index += 3 * ((1 << first_frag->fr_offset) >> 4);
2856 if (first_frag->fr_symbol)
2858 as_fatal ("only constant offsets are supported");
2862 index += 3 * (first_frag->fr_offset >> 4);
2866 /* Add in the full size of the frag converted to instruction slots. */
2867 index += 3 * (first_frag->fr_fix >> 4);
2868 /* Subtract away the initial part before first_addr. */
2869 index -= (3 * ((first_addr >> 4) - (start_addr >> 4))
2870 + ((first_addr & 0x3) - (start_addr & 0x3)));
2872 /* Move to the beginning of the next frag. */
2873 first_frag = first_frag->fr_next;
2874 first_addr = (unsigned long) &first_frag->fr_literal;
2876 /* This can happen if there is section switching in the middle of a
2877 function, causing the frag chain for the function to be broken. */
2878 if (first_frag == NULL)
2880 /* We get six warnings for one problem, because of the loop in
2881 fixup_unw_records, and because fixup_unw_records is called 3
2882 times: once before creating the variant frag, once to estimate
2883 its size, and once to relax it. This is unreasonable, so we use
2884 a static var to make sure we only emit the warning once. */
2885 static int warned = 0;
2889 as_warn ("Corrupted unwind info due to unsupported section switching");
2897 /* Add in the used part of the last frag. */
2898 index += (3 * ((slot_addr >> 4) - (first_addr >> 4))
2899 + ((slot_addr & 0x3) - (first_addr & 0x3)));
2903 /* Optimize unwind record directives. */
2905 static unw_rec_list *
2906 optimize_unw_records (list)
2912 /* If the only unwind record is ".prologue" or ".prologue" followed
2913 by ".body", then we can optimize the unwind directives away. */
2914 if (list->r.type == prologue
2915 && (list->next->r.type == endp
2916 || (list->next->r.type == body && list->next->next->r.type == endp)))
2922 /* Given a complete record list, process any records which have
2923 unresolved fields, (ie length counts for a prologue). After
2924 this has been run, all necessary information should be available
2925 within each record to generate an image. */
2928 fixup_unw_records (list, before_relax)
2932 unw_rec_list *ptr, *region = 0;
2933 unsigned long first_addr = 0, rlen = 0, t;
2934 fragS *first_frag = 0;
2936 for (ptr = list; ptr; ptr = ptr->next)
2938 if (ptr->slot_number == SLOT_NUM_NOT_SET)
2939 as_bad (" Insn slot not set in unwind record.");
2940 t = slot_index (ptr->slot_number, ptr->slot_frag,
2941 first_addr, first_frag, before_relax);
2942 switch (ptr->r.type)
2950 unsigned long last_addr = 0;
2951 fragS *last_frag = NULL;
2953 first_addr = ptr->slot_number;
2954 first_frag = ptr->slot_frag;
2955 /* Find either the next body/prologue start, or the end of
2956 the function, and determine the size of the region. */
2957 for (last = ptr->next; last != NULL; last = last->next)
2958 if (last->r.type == prologue || last->r.type == prologue_gr
2959 || last->r.type == body || last->r.type == endp)
2961 last_addr = last->slot_number;
2962 last_frag = last->slot_frag;
2965 size = slot_index (last_addr, last_frag, first_addr, first_frag,
2967 rlen = ptr->r.record.r.rlen = size;
2968 if (ptr->r.type == body)
2969 /* End of region. */
2977 ptr->r.record.b.t = rlen - 1 - t;
2979 /* This happens when a memory-stack-less procedure uses a
2980 ".restore sp" directive at the end of a region to pop
2982 ptr->r.record.b.t = 0;
2993 case priunat_when_gr:
2994 case priunat_when_mem:
2998 ptr->r.record.p.t = t;
3006 case spill_psprel_p:
3007 ptr->r.record.x.t = t;
3013 as_bad ("frgr_mem record before region record!");
3016 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3017 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3018 set_imask (region, ptr->r.record.p.frmask, t, 1);
3019 set_imask (region, ptr->r.record.p.grmask, t, 2);
3024 as_bad ("fr_mem record before region record!");
3027 region->r.record.r.mask.fr_mem |= ptr->r.record.p.frmask;
3028 set_imask (region, ptr->r.record.p.frmask, t, 1);
3033 as_bad ("gr_mem record before region record!");
3036 region->r.record.r.mask.gr_mem |= ptr->r.record.p.grmask;
3037 set_imask (region, ptr->r.record.p.grmask, t, 2);
3042 as_bad ("br_mem record before region record!");
3045 region->r.record.r.mask.br_mem |= ptr->r.record.p.brmask;
3046 set_imask (region, ptr->r.record.p.brmask, t, 3);
3052 as_bad ("gr_gr record before region record!");
3055 set_imask (region, ptr->r.record.p.grmask, t, 2);
3060 as_bad ("br_gr record before region record!");
3063 set_imask (region, ptr->r.record.p.brmask, t, 3);
3072 /* Estimate the size of a frag before relaxing. We only have one type of frag
3073 to handle here, which is the unwind info frag. */
3076 ia64_estimate_size_before_relax (fragS *frag,
3077 asection *segtype ATTRIBUTE_UNUSED)
3082 /* ??? This code is identical to the first part of ia64_convert_frag. */
3083 list = (unw_rec_list *) frag->fr_opcode;
3084 fixup_unw_records (list, 0);
3086 len = calc_record_size (list);
3087 /* pad to pointer-size boundary. */
3088 pad = len % md.pointer_size;
3090 len += md.pointer_size - pad;
3091 /* Add 8 for the header. */
3093 /* Add a pointer for the personality offset. */
3094 if (frag->fr_offset)
3095 size += md.pointer_size;
3097 /* fr_var carries the max_chars that we created the fragment with.
3098 We must, of course, have allocated enough memory earlier. */
3099 assert (frag->fr_var >= size);
3101 return frag->fr_fix + size;
3104 /* This function converts a rs_machine_dependent variant frag into a
3105 normal fill frag with the unwind image from the the record list. */
3107 ia64_convert_frag (fragS *frag)
3113 /* ??? This code is identical to ia64_estimate_size_before_relax. */
3114 list = (unw_rec_list *) frag->fr_opcode;
3115 fixup_unw_records (list, 0);
3117 len = calc_record_size (list);
3118 /* pad to pointer-size boundary. */
3119 pad = len % md.pointer_size;
3121 len += md.pointer_size - pad;
3122 /* Add 8 for the header. */
3124 /* Add a pointer for the personality offset. */
3125 if (frag->fr_offset)
3126 size += md.pointer_size;
3128 /* fr_var carries the max_chars that we created the fragment with.
3129 We must, of course, have allocated enough memory earlier. */
3130 assert (frag->fr_var >= size);
3132 /* Initialize the header area. fr_offset is initialized with
3133 unwind.personality_routine. */
3134 if (frag->fr_offset)
3136 if (md.flags & EF_IA_64_ABI64)
3137 flag_value = (bfd_vma) 3 << 32;
3139 /* 32-bit unwind info block. */
3140 flag_value = (bfd_vma) 0x1003 << 32;
3145 md_number_to_chars (frag->fr_literal,
3146 (((bfd_vma) 1 << 48) /* Version. */
3147 | flag_value /* U & E handler flags. */
3148 | (len / md.pointer_size)), /* Length. */
3151 /* Skip the header. */
3152 vbyte_mem_ptr = frag->fr_literal + 8;
3153 process_unw_records (list, output_vbyte_mem);
3155 /* Fill the padding bytes with zeros. */
3157 md_number_to_chars (frag->fr_literal + len + 8 - md.pointer_size + pad, 0,
3158 md.pointer_size - pad);
3160 frag->fr_fix += size;
3161 frag->fr_type = rs_fill;
3163 frag->fr_offset = 0;
3167 parse_predicate_and_operand (e, qp, po)
3172 int sep = parse_operand (e, ',');
3174 *qp = e->X_add_number - REG_P;
3175 if (e->X_op != O_register || *qp > 63)
3177 as_bad ("First operand to .%s must be a predicate", po);
3181 as_warn ("Pointless use of p0 as first operand to .%s", po);
3183 sep = parse_operand (e, ',');
3190 convert_expr_to_ab_reg (e, ab, regp, po, n)
3191 const expressionS *e;
3197 unsigned int reg = e->X_add_number;
3199 *ab = *regp = 0; /* Anything valid is good here. */
3201 if (e->X_op != O_register)
3202 reg = REG_GR; /* Anything invalid is good here. */
3204 if (reg >= (REG_GR + 4) && reg <= (REG_GR + 7))
3207 *regp = reg - REG_GR;
3209 else if ((reg >= (REG_FR + 2) && reg <= (REG_FR + 5))
3210 || (reg >= (REG_FR + 16) && reg <= (REG_FR + 31)))
3213 *regp = reg - REG_FR;
3215 else if (reg >= (REG_BR + 1) && reg <= (REG_BR + 5))
3218 *regp = reg - REG_BR;
3225 case REG_PR: *regp = 0; break;
3226 case REG_PSP: *regp = 1; break;
3227 case REG_PRIUNAT: *regp = 2; break;
3228 case REG_BR + 0: *regp = 3; break;
3229 case REG_AR + AR_BSP: *regp = 4; break;
3230 case REG_AR + AR_BSPSTORE: *regp = 5; break;
3231 case REG_AR + AR_RNAT: *regp = 6; break;
3232 case REG_AR + AR_UNAT: *regp = 7; break;
3233 case REG_AR + AR_FPSR: *regp = 8; break;
3234 case REG_AR + AR_PFS: *regp = 9; break;
3235 case REG_AR + AR_LC: *regp = 10; break;
3238 as_bad ("Operand %d to .%s must be a preserved register", n, po);
3245 convert_expr_to_xy_reg (e, xy, regp, po, n)
3246 const expressionS *e;
3252 unsigned int reg = e->X_add_number;
3254 *xy = *regp = 0; /* Anything valid is good here. */
3256 if (e->X_op != O_register)
3257 reg = REG_GR; /* Anything invalid is good here. */
3259 if (reg >= (REG_GR + 1) && reg <= (REG_GR + 127))
3262 *regp = reg - REG_GR;
3264 else if (reg >= (REG_FR + 2) && reg <= (REG_FR + 127))
3267 *regp = reg - REG_FR;
3269 else if (reg >= REG_BR && reg <= (REG_BR + 7))
3272 *regp = reg - REG_BR;
3275 as_bad ("Operand %d to .%s must be a writable register", n, po);
3281 /* The current frag is an alignment frag. */
3282 align_frag = frag_now;
3283 s_align_bytes (arg);
3288 int dummy ATTRIBUTE_UNUSED;
3295 if (is_it_end_of_statement ())
3297 radix = input_line_pointer;
3298 ch = get_symbol_end ();
3299 ia64_canonicalize_symbol_name (radix);
3300 if (strcasecmp (radix, "C"))
3301 as_bad ("Radix `%s' unsupported or invalid", radix);
3302 *input_line_pointer = ch;
3303 demand_empty_rest_of_line ();
3306 /* Helper function for .loc directives. If the assembler is not generating
3307 line number info, then we need to remember which instructions have a .loc
3308 directive, and only call dwarf2_gen_line_info for those instructions. */
3313 CURR_SLOT.loc_directive_seen = 1;
3314 dwarf2_directive_loc (x);
3317 /* .sbss, .bss etc. are macros that expand into ".section SECNAME". */
3319 dot_special_section (which)
3322 set_section ((char *) special_section_name[which]);
3325 /* Return -1 for warning and 0 for error. */
3328 unwind_diagnostic (const char * region, const char *directive)
3330 if (md.unwind_check == unwind_check_warning)
3332 as_warn (".%s outside of %s", directive, region);
3337 as_bad (".%s outside of %s", directive, region);
3338 ignore_rest_of_line ();
3343 /* Return 1 if a directive is in a procedure, -1 if a directive isn't in
3344 a procedure but the unwind directive check is set to warning, 0 if
3345 a directive isn't in a procedure and the unwind directive check is set
3349 in_procedure (const char *directive)
3351 if (unwind.proc_pending.sym
3352 && (!unwind.saved_text_seg || strcmp (directive, "endp") == 0))
3354 return unwind_diagnostic ("procedure", directive);
3357 /* Return 1 if a directive is in a prologue, -1 if a directive isn't in
3358 a prologue but the unwind directive check is set to warning, 0 if
3359 a directive isn't in a prologue and the unwind directive check is set
3363 in_prologue (const char *directive)
3365 int in = in_procedure (directive);
3367 if (in > 0 && !unwind.prologue)
3368 in = unwind_diagnostic ("prologue", directive);
3369 check_pending_save ();
3373 /* Return 1 if a directive is in a body, -1 if a directive isn't in
3374 a body but the unwind directive check is set to warning, 0 if
3375 a directive isn't in a body and the unwind directive check is set
3379 in_body (const char *directive)
3381 int in = in_procedure (directive);
3383 if (in > 0 && !unwind.body)
3384 in = unwind_diagnostic ("body region", directive);
3389 add_unwind_entry (ptr, sep)
3396 unwind.tail->next = ptr;
3401 /* The current entry can in fact be a chain of unwind entries. */
3402 if (unwind.current_entry == NULL)
3403 unwind.current_entry = ptr;
3406 /* The current entry can in fact be a chain of unwind entries. */
3407 if (unwind.current_entry == NULL)
3408 unwind.current_entry = ptr;
3412 /* Parse a tag permitted for the current directive. */
3416 ch = get_symbol_end ();
3417 /* FIXME: For now, just issue a warning that this isn't implemented. */
3424 as_warn ("Tags on unwind pseudo-ops aren't supported, yet");
3427 *input_line_pointer = ch;
3429 if (sep != NOT_A_CHAR)
3430 demand_empty_rest_of_line ();
3435 int dummy ATTRIBUTE_UNUSED;
3440 if (!in_prologue ("fframe"))
3443 sep = parse_operand (&e, ',');
3445 if (e.X_op != O_constant)
3447 as_bad ("First operand to .fframe must be a constant");
3450 add_unwind_entry (output_mem_stack_f (e.X_add_number), sep);
3455 int dummy ATTRIBUTE_UNUSED;
3461 if (!in_prologue ("vframe"))
3464 sep = parse_operand (&e, ',');
3465 reg = e.X_add_number - REG_GR;
3466 if (e.X_op != O_register || reg > 127)
3468 as_bad ("First operand to .vframe must be a general register");
3471 add_unwind_entry (output_mem_stack_v (), sep);
3472 if (! (unwind.prologue_mask & 2))
3473 add_unwind_entry (output_psp_gr (reg), NOT_A_CHAR);
3474 else if (reg != unwind.prologue_gr
3475 + (unsigned) popcount (unwind.prologue_mask & (-2 << 1)))
3476 as_warn ("Operand of .vframe contradicts .prologue");
3487 as_warn (".vframepsp is meaningless, assuming .vframesp was meant");
3489 if (!in_prologue ("vframesp"))
3492 sep = parse_operand (&e, ',');
3493 if (e.X_op != O_constant)
3495 as_bad ("Operand to .vframesp must be a constant (sp-relative offset)");
3498 add_unwind_entry (output_mem_stack_v (), sep);
3499 add_unwind_entry (output_psp_sprel (e.X_add_number), NOT_A_CHAR);
3504 int dummy ATTRIBUTE_UNUSED;
3507 unsigned reg1, reg2;
3510 if (!in_prologue ("save"))
3513 sep = parse_operand (&e1, ',');
3515 sep = parse_operand (&e2, ',');
3519 reg1 = e1.X_add_number;
3520 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3521 if (e1.X_op != O_register)
3523 as_bad ("First operand to .save not a register");
3524 reg1 = REG_PR; /* Anything valid is good here. */
3526 reg2 = e2.X_add_number - REG_GR;
3527 if (e2.X_op != O_register || reg2 > 127)
3529 as_bad ("Second operand to .save not a valid register");
3534 case REG_AR + AR_BSP:
3535 add_unwind_entry (output_bsp_when (), sep);
3536 add_unwind_entry (output_bsp_gr (reg2), NOT_A_CHAR);
3538 case REG_AR + AR_BSPSTORE:
3539 add_unwind_entry (output_bspstore_when (), sep);
3540 add_unwind_entry (output_bspstore_gr (reg2), NOT_A_CHAR);
3542 case REG_AR + AR_RNAT:
3543 add_unwind_entry (output_rnat_when (), sep);
3544 add_unwind_entry (output_rnat_gr (reg2), NOT_A_CHAR);
3546 case REG_AR + AR_UNAT:
3547 add_unwind_entry (output_unat_when (), sep);
3548 add_unwind_entry (output_unat_gr (reg2), NOT_A_CHAR);
3550 case REG_AR + AR_FPSR:
3551 add_unwind_entry (output_fpsr_when (), sep);
3552 add_unwind_entry (output_fpsr_gr (reg2), NOT_A_CHAR);
3554 case REG_AR + AR_PFS:
3555 add_unwind_entry (output_pfs_when (), sep);
3556 if (! (unwind.prologue_mask & 4))
3557 add_unwind_entry (output_pfs_gr (reg2), NOT_A_CHAR);
3558 else if (reg2 != unwind.prologue_gr
3559 + (unsigned) popcount (unwind.prologue_mask & (-4 << 1)))
3560 as_warn ("Second operand of .save contradicts .prologue");
3562 case REG_AR + AR_LC:
3563 add_unwind_entry (output_lc_when (), sep);
3564 add_unwind_entry (output_lc_gr (reg2), NOT_A_CHAR);
3567 add_unwind_entry (output_rp_when (), sep);
3568 if (! (unwind.prologue_mask & 8))
3569 add_unwind_entry (output_rp_gr (reg2), NOT_A_CHAR);
3570 else if (reg2 != unwind.prologue_gr)
3571 as_warn ("Second operand of .save contradicts .prologue");
3574 add_unwind_entry (output_preds_when (), sep);
3575 if (! (unwind.prologue_mask & 1))
3576 add_unwind_entry (output_preds_gr (reg2), NOT_A_CHAR);
3577 else if (reg2 != unwind.prologue_gr
3578 + (unsigned) popcount (unwind.prologue_mask & (-1 << 1)))
3579 as_warn ("Second operand of .save contradicts .prologue");
3582 add_unwind_entry (output_priunat_when_gr (), sep);
3583 add_unwind_entry (output_priunat_gr (reg2), NOT_A_CHAR);
3586 as_bad ("First operand to .save not a valid register");
3587 add_unwind_entry (NULL, sep);
3594 int dummy ATTRIBUTE_UNUSED;
3597 unsigned long ecount; /* # of _additional_ regions to pop */
3600 if (!in_body ("restore"))
3603 sep = parse_operand (&e1, ',');
3604 if (e1.X_op != O_register || e1.X_add_number != REG_GR + 12)
3605 as_bad ("First operand to .restore must be stack pointer (sp)");
3611 sep = parse_operand (&e2, ',');
3612 if (e2.X_op != O_constant || e2.X_add_number < 0)
3614 as_bad ("Second operand to .restore must be a constant >= 0");
3615 e2.X_add_number = 0;
3617 ecount = e2.X_add_number;
3620 ecount = unwind.prologue_count - 1;
3622 if (ecount >= unwind.prologue_count)
3624 as_bad ("Epilogue count of %lu exceeds number of nested prologues (%u)",
3625 ecount + 1, unwind.prologue_count);
3629 add_unwind_entry (output_epilogue (ecount), sep);
3631 if (ecount < unwind.prologue_count)
3632 unwind.prologue_count -= ecount + 1;
3634 unwind.prologue_count = 0;
3638 dot_restorereg (pred)
3641 unsigned int qp, ab, reg;
3644 const char * const po = pred ? "restorereg.p" : "restorereg";
3646 if (!in_procedure (po))
3650 sep = parse_predicate_and_operand (&e, &qp, po);
3653 sep = parse_operand (&e, ',');
3656 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred);
3658 add_unwind_entry (output_spill_reg (ab, reg, 0, 0, qp), sep);
3661 static char *special_linkonce_name[] =
3663 ".gnu.linkonce.ia64unw.", ".gnu.linkonce.ia64unwi."
3667 start_unwind_section (const segT text_seg, int sec_index)
3670 Use a slightly ugly scheme to derive the unwind section names from
3671 the text section name:
3673 text sect. unwind table sect.
3674 name: name: comments:
3675 ---------- ----------------- --------------------------------
3677 .text.foo .IA_64.unwind.text.foo
3678 .foo .IA_64.unwind.foo
3680 .gnu.linkonce.ia64unw.foo
3681 _info .IA_64.unwind_info gas issues error message (ditto)
3682 _infoFOO .IA_64.unwind_infoFOO gas issues error message (ditto)
3684 This mapping is done so that:
3686 (a) An object file with unwind info only in .text will use
3687 unwind section names .IA_64.unwind and .IA_64.unwind_info.
3688 This follows the letter of the ABI and also ensures backwards
3689 compatibility with older toolchains.
3691 (b) An object file with unwind info in multiple text sections
3692 will use separate unwind sections for each text section.
3693 This allows us to properly set the "sh_info" and "sh_link"
3694 fields in SHT_IA_64_UNWIND as required by the ABI and also
3695 lets GNU ld support programs with multiple segments
3696 containing unwind info (as might be the case for certain
3697 embedded applications).
3699 (c) An error is issued if there would be a name clash.
3702 const char *text_name, *sec_text_name;
3704 const char *prefix = special_section_name [sec_index];
3706 size_t prefix_len, suffix_len, sec_name_len;
3708 sec_text_name = segment_name (text_seg);
3709 text_name = sec_text_name;
3710 if (strncmp (text_name, "_info", 5) == 0)
3712 as_bad ("Illegal section name `%s' (causes unwind section name clash)",
3714 ignore_rest_of_line ();
3717 if (strcmp (text_name, ".text") == 0)
3720 /* Build the unwind section name by appending the (possibly stripped)
3721 text section name to the unwind prefix. */
3723 if (strncmp (text_name, ".gnu.linkonce.t.",
3724 sizeof (".gnu.linkonce.t.") - 1) == 0)
3726 prefix = special_linkonce_name [sec_index - SPECIAL_SECTION_UNWIND];
3727 suffix += sizeof (".gnu.linkonce.t.") - 1;
3730 prefix_len = strlen (prefix);
3731 suffix_len = strlen (suffix);
3732 sec_name_len = prefix_len + suffix_len;
3733 sec_name = alloca (sec_name_len + 1);
3734 memcpy (sec_name, prefix, prefix_len);
3735 memcpy (sec_name + prefix_len, suffix, suffix_len);
3736 sec_name [sec_name_len] = '\0';
3738 /* Handle COMDAT group. */
3739 if ((text_seg->flags & SEC_LINK_ONCE) != 0
3740 && (elf_section_flags (text_seg) & SHF_GROUP) != 0)
3743 size_t len, group_name_len;
3744 const char *group_name = elf_group_name (text_seg);
3746 if (group_name == NULL)
3748 as_bad ("Group section `%s' has no group signature",
3750 ignore_rest_of_line ();
3753 /* We have to construct a fake section directive. */
3754 group_name_len = strlen (group_name);
3756 + 16 /* ,"aG",@progbits, */
3757 + group_name_len /* ,group_name */
3760 section = alloca (len + 1);
3761 memcpy (section, sec_name, sec_name_len);
3762 memcpy (section + sec_name_len, ",\"aG\",@progbits,", 16);
3763 memcpy (section + sec_name_len + 16, group_name, group_name_len);
3764 memcpy (section + len - 7, ",comdat", 7);
3765 section [len] = '\0';
3766 set_section (section);
3770 set_section (sec_name);
3771 bfd_set_section_flags (stdoutput, now_seg,
3772 SEC_LOAD | SEC_ALLOC | SEC_READONLY);
3775 elf_linked_to_section (now_seg) = text_seg;
3779 generate_unwind_image (const segT text_seg)
3784 /* Mark the end of the unwind info, so that we can compute the size of the
3785 last unwind region. */
3786 add_unwind_entry (output_endp (), NOT_A_CHAR);
3788 /* Force out pending instructions, to make sure all unwind records have
3789 a valid slot_number field. */
3790 ia64_flush_insns ();
3792 /* Generate the unwind record. */
3793 list = optimize_unw_records (unwind.list);
3794 fixup_unw_records (list, 1);
3795 size = calc_record_size (list);
3797 if (size > 0 || unwind.force_unwind_entry)
3799 unwind.force_unwind_entry = 0;
3800 /* pad to pointer-size boundary. */
3801 pad = size % md.pointer_size;
3803 size += md.pointer_size - pad;
3804 /* Add 8 for the header. */
3806 /* Add a pointer for the personality offset. */
3807 if (unwind.personality_routine)
3808 size += md.pointer_size;
3811 /* If there are unwind records, switch sections, and output the info. */
3815 bfd_reloc_code_real_type reloc;
3817 start_unwind_section (text_seg, SPECIAL_SECTION_UNWIND_INFO);
3819 /* Make sure the section has 4 byte alignment for ILP32 and
3820 8 byte alignment for LP64. */
3821 frag_align (md.pointer_size_shift, 0, 0);
3822 record_alignment (now_seg, md.pointer_size_shift);
3824 /* Set expression which points to start of unwind descriptor area. */
3825 unwind.info = expr_build_dot ();
3827 frag_var (rs_machine_dependent, size, size, 0, 0,
3828 (offsetT) (long) unwind.personality_routine,
3831 /* Add the personality address to the image. */
3832 if (unwind.personality_routine != 0)
3834 exp.X_op = O_symbol;
3835 exp.X_add_symbol = unwind.personality_routine;
3836 exp.X_add_number = 0;
3838 if (md.flags & EF_IA_64_BE)
3840 if (md.flags & EF_IA_64_ABI64)
3841 reloc = BFD_RELOC_IA64_LTOFF_FPTR64MSB;
3843 reloc = BFD_RELOC_IA64_LTOFF_FPTR32MSB;
3847 if (md.flags & EF_IA_64_ABI64)
3848 reloc = BFD_RELOC_IA64_LTOFF_FPTR64LSB;
3850 reloc = BFD_RELOC_IA64_LTOFF_FPTR32LSB;
3853 fix_new_exp (frag_now, frag_now_fix () - md.pointer_size,
3854 md.pointer_size, &exp, 0, reloc);
3855 unwind.personality_routine = 0;
3859 free_saved_prologue_counts ();
3860 unwind.list = unwind.tail = unwind.current_entry = NULL;
3864 dot_handlerdata (dummy)
3865 int dummy ATTRIBUTE_UNUSED;
3867 if (!in_procedure ("handlerdata"))
3869 unwind.force_unwind_entry = 1;
3871 /* Remember which segment we're in so we can switch back after .endp */
3872 unwind.saved_text_seg = now_seg;
3873 unwind.saved_text_subseg = now_subseg;
3875 /* Generate unwind info into unwind-info section and then leave that
3876 section as the currently active one so dataXX directives go into
3877 the language specific data area of the unwind info block. */
3878 generate_unwind_image (now_seg);
3879 demand_empty_rest_of_line ();
3883 dot_unwentry (dummy)
3884 int dummy ATTRIBUTE_UNUSED;
3886 if (!in_procedure ("unwentry"))
3888 unwind.force_unwind_entry = 1;
3889 demand_empty_rest_of_line ();
3894 int dummy ATTRIBUTE_UNUSED;
3899 if (!in_prologue ("altrp"))
3902 parse_operand (&e, 0);
3903 reg = e.X_add_number - REG_BR;
3904 if (e.X_op != O_register || reg > 7)
3906 as_bad ("First operand to .altrp not a valid branch register");
3909 add_unwind_entry (output_rp_br (reg), 0);
3913 dot_savemem (psprel)
3919 const char * const po = psprel ? "savepsp" : "savesp";
3921 if (!in_prologue (po))
3924 sep = parse_operand (&e1, ',');
3926 sep = parse_operand (&e2, ',');
3930 reg1 = e1.X_add_number;
3931 val = e2.X_add_number;
3933 /* Make sure its a valid ar.xxx reg, OR its br0, aka 'rp'. */
3934 if (e1.X_op != O_register)
3936 as_bad ("First operand to .%s not a register", po);
3937 reg1 = REG_PR; /* Anything valid is good here. */
3939 if (e2.X_op != O_constant)
3941 as_bad ("Second operand to .%s not a constant", po);
3947 case REG_AR + AR_BSP:
3948 add_unwind_entry (output_bsp_when (), sep);
3949 add_unwind_entry ((psprel
3951 : output_bsp_sprel) (val), NOT_A_CHAR);
3953 case REG_AR + AR_BSPSTORE:
3954 add_unwind_entry (output_bspstore_when (), sep);
3955 add_unwind_entry ((psprel
3956 ? output_bspstore_psprel
3957 : output_bspstore_sprel) (val), NOT_A_CHAR);
3959 case REG_AR + AR_RNAT:
3960 add_unwind_entry (output_rnat_when (), sep);
3961 add_unwind_entry ((psprel
3962 ? output_rnat_psprel
3963 : output_rnat_sprel) (val), NOT_A_CHAR);
3965 case REG_AR + AR_UNAT:
3966 add_unwind_entry (output_unat_when (), sep);
3967 add_unwind_entry ((psprel
3968 ? output_unat_psprel
3969 : output_unat_sprel) (val), NOT_A_CHAR);
3971 case REG_AR + AR_FPSR:
3972 add_unwind_entry (output_fpsr_when (), sep);
3973 add_unwind_entry ((psprel
3974 ? output_fpsr_psprel
3975 : output_fpsr_sprel) (val), NOT_A_CHAR);
3977 case REG_AR + AR_PFS:
3978 add_unwind_entry (output_pfs_when (), sep);
3979 add_unwind_entry ((psprel
3981 : output_pfs_sprel) (val), NOT_A_CHAR);
3983 case REG_AR + AR_LC:
3984 add_unwind_entry (output_lc_when (), sep);
3985 add_unwind_entry ((psprel
3987 : output_lc_sprel) (val), NOT_A_CHAR);
3990 add_unwind_entry (output_rp_when (), sep);
3991 add_unwind_entry ((psprel
3993 : output_rp_sprel) (val), NOT_A_CHAR);
3996 add_unwind_entry (output_preds_when (), sep);
3997 add_unwind_entry ((psprel
3998 ? output_preds_psprel
3999 : output_preds_sprel) (val), NOT_A_CHAR);
4002 add_unwind_entry (output_priunat_when_mem (), sep);
4003 add_unwind_entry ((psprel
4004 ? output_priunat_psprel
4005 : output_priunat_sprel) (val), NOT_A_CHAR);
4008 as_bad ("First operand to .%s not a valid register", po);
4009 add_unwind_entry (NULL, sep);
4016 int dummy ATTRIBUTE_UNUSED;
4022 if (!in_prologue ("save.g"))
4025 sep = parse_operand (&e, ',');
4027 grmask = e.X_add_number;
4028 if (e.X_op != O_constant
4029 || e.X_add_number <= 0
4030 || e.X_add_number > 0xf)
4032 as_bad ("First operand to .save.g must be a positive 4-bit constant");
4039 int n = popcount (grmask);
4041 parse_operand (&e, 0);
4042 reg = e.X_add_number - REG_GR;
4043 if (e.X_op != O_register || reg > 127)
4045 as_bad ("Second operand to .save.g must be a general register");
4048 else if (reg > 128U - n)
4050 as_bad ("Second operand to .save.g must be the first of %d general registers", n);
4053 add_unwind_entry (output_gr_gr (grmask, reg), 0);
4056 add_unwind_entry (output_gr_mem (grmask), 0);
4061 int dummy ATTRIBUTE_UNUSED;
4065 if (!in_prologue ("save.f"))
4068 parse_operand (&e, 0);
4070 if (e.X_op != O_constant
4071 || e.X_add_number <= 0
4072 || e.X_add_number > 0xfffff)
4074 as_bad ("Operand to .save.f must be a positive 20-bit constant");
4077 add_unwind_entry (output_fr_mem (e.X_add_number), 0);
4082 int dummy ATTRIBUTE_UNUSED;
4088 if (!in_prologue ("save.b"))
4091 sep = parse_operand (&e, ',');
4093 brmask = e.X_add_number;
4094 if (e.X_op != O_constant
4095 || e.X_add_number <= 0
4096 || e.X_add_number > 0x1f)
4098 as_bad ("First operand to .save.b must be a positive 5-bit constant");
4105 int n = popcount (brmask);
4107 parse_operand (&e, 0);
4108 reg = e.X_add_number - REG_GR;
4109 if (e.X_op != O_register || reg > 127)
4111 as_bad ("Second operand to .save.b must be a general register");
4114 else if (reg > 128U - n)
4116 as_bad ("Second operand to .save.b must be the first of %d general registers", n);
4119 add_unwind_entry (output_br_gr (brmask, reg), 0);
4122 add_unwind_entry (output_br_mem (brmask), 0);
4127 int dummy ATTRIBUTE_UNUSED;
4131 if (!in_prologue ("save.gf"))
4134 if (parse_operand (&e1, ',') == ',')
4135 parse_operand (&e2, 0);
4139 if (e1.X_op != O_constant
4140 || e1.X_add_number < 0
4141 || e1.X_add_number > 0xf)
4143 as_bad ("First operand to .save.gf must be a non-negative 4-bit constant");
4145 e1.X_add_number = 0;
4147 if (e2.X_op != O_constant
4148 || e2.X_add_number < 0
4149 || e2.X_add_number > 0xfffff)
4151 as_bad ("Second operand to .save.gf must be a non-negative 20-bit constant");
4153 e2.X_add_number = 0;
4155 if (e1.X_op == O_constant
4156 && e2.X_op == O_constant
4157 && e1.X_add_number == 0
4158 && e2.X_add_number == 0)
4159 as_bad ("Operands to .save.gf may not be both zero");
4161 add_unwind_entry (output_frgr_mem (e1.X_add_number, e2.X_add_number), 0);
4166 int dummy ATTRIBUTE_UNUSED;
4170 if (!in_prologue ("spill"))
4173 parse_operand (&e, 0);
4175 if (e.X_op != O_constant)
4177 as_bad ("Operand to .spill must be a constant");
4180 add_unwind_entry (output_spill_base (e.X_add_number), 0);
4188 unsigned int qp, ab, xy, reg, treg;
4190 const char * const po = pred ? "spillreg.p" : "spillreg";
4192 if (!in_procedure (po))
4196 sep = parse_predicate_and_operand (&e, &qp, po);
4199 sep = parse_operand (&e, ',');
4202 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred);
4205 sep = parse_operand (&e, ',');
4208 convert_expr_to_xy_reg (&e, &xy, &treg, po, 2 + pred);
4210 add_unwind_entry (output_spill_reg (ab, reg, treg, xy, qp), sep);
4214 dot_spillmem (psprel)
4218 int pred = (psprel < 0), sep;
4219 unsigned int qp, ab, reg;
4225 po = psprel ? "spillpsp.p" : "spillsp.p";
4228 po = psprel ? "spillpsp" : "spillsp";
4230 if (!in_procedure (po))
4234 sep = parse_predicate_and_operand (&e, &qp, po);
4237 sep = parse_operand (&e, ',');
4240 convert_expr_to_ab_reg (&e, &ab, ®, po, 1 + pred);
4243 sep = parse_operand (&e, ',');
4246 if (e.X_op != O_constant)
4248 as_bad ("Operand %d to .%s must be a constant", 2 + pred, po);
4253 add_unwind_entry (output_spill_psprel (ab, reg, e.X_add_number, qp), sep);
4255 add_unwind_entry (output_spill_sprel (ab, reg, e.X_add_number, qp), sep);
4259 get_saved_prologue_count (lbl)
4262 label_prologue_count *lpc = unwind.saved_prologue_counts;
4264 while (lpc != NULL && lpc->label_number != lbl)
4268 return lpc->prologue_count;
4270 as_bad ("Missing .label_state %ld", lbl);
4275 save_prologue_count (lbl, count)
4279 label_prologue_count *lpc = unwind.saved_prologue_counts;
4281 while (lpc != NULL && lpc->label_number != lbl)
4285 lpc->prologue_count = count;
4288 label_prologue_count *new_lpc = xmalloc (sizeof (* new_lpc));
4290 new_lpc->next = unwind.saved_prologue_counts;
4291 new_lpc->label_number = lbl;
4292 new_lpc->prologue_count = count;
4293 unwind.saved_prologue_counts = new_lpc;
4298 free_saved_prologue_counts ()
4300 label_prologue_count *lpc = unwind.saved_prologue_counts;
4301 label_prologue_count *next;
4310 unwind.saved_prologue_counts = NULL;
4314 dot_label_state (dummy)
4315 int dummy ATTRIBUTE_UNUSED;
4319 if (!in_body ("label_state"))
4322 parse_operand (&e, 0);
4323 if (e.X_op == O_constant)
4324 save_prologue_count (e.X_add_number, unwind.prologue_count);
4327 as_bad ("Operand to .label_state must be a constant");
4330 add_unwind_entry (output_label_state (e.X_add_number), 0);
4334 dot_copy_state (dummy)
4335 int dummy ATTRIBUTE_UNUSED;
4339 if (!in_body ("copy_state"))
4342 parse_operand (&e, 0);
4343 if (e.X_op == O_constant)
4344 unwind.prologue_count = get_saved_prologue_count (e.X_add_number);
4347 as_bad ("Operand to .copy_state must be a constant");
4350 add_unwind_entry (output_copy_state (e.X_add_number), 0);
4355 int dummy ATTRIBUTE_UNUSED;
4360 if (!in_prologue ("unwabi"))
4363 sep = parse_operand (&e1, ',');
4365 parse_operand (&e2, 0);
4369 if (e1.X_op != O_constant)
4371 as_bad ("First operand to .unwabi must be a constant");
4372 e1.X_add_number = 0;
4375 if (e2.X_op != O_constant)
4377 as_bad ("Second operand to .unwabi must be a constant");
4378 e2.X_add_number = 0;
4381 add_unwind_entry (output_unwabi (e1.X_add_number, e2.X_add_number), 0);
4385 dot_personality (dummy)
4386 int dummy ATTRIBUTE_UNUSED;
4389 if (!in_procedure ("personality"))
4392 name = input_line_pointer;
4393 c = get_symbol_end ();
4394 p = input_line_pointer;
4395 unwind.personality_routine = symbol_find_or_make (name);
4396 unwind.force_unwind_entry = 1;
4399 demand_empty_rest_of_line ();
4404 int dummy ATTRIBUTE_UNUSED;
4408 proc_pending *pending, *last_pending;
4410 if (unwind.proc_pending.sym)
4412 (md.unwind_check == unwind_check_warning
4414 : as_bad) ("Missing .endp after previous .proc");
4415 while (unwind.proc_pending.next)
4417 pending = unwind.proc_pending.next;
4418 unwind.proc_pending.next = pending->next;
4422 last_pending = NULL;
4424 /* Parse names of main and alternate entry points and mark them as
4425 function symbols: */
4429 name = input_line_pointer;
4430 c = get_symbol_end ();
4431 p = input_line_pointer;
4433 as_bad ("Empty argument of .proc");
4436 sym = symbol_find_or_make (name);
4437 if (S_IS_DEFINED (sym))
4438 as_bad ("`%s' was already defined", name);
4439 else if (!last_pending)
4441 unwind.proc_pending.sym = sym;
4442 last_pending = &unwind.proc_pending;
4446 pending = xmalloc (sizeof (*pending));
4448 last_pending = last_pending->next = pending;
4450 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4454 if (*input_line_pointer != ',')
4456 ++input_line_pointer;
4460 unwind.proc_pending.sym = expr_build_dot ();
4461 last_pending = &unwind.proc_pending;
4463 last_pending->next = NULL;
4464 demand_empty_rest_of_line ();
4467 unwind.prologue = 0;
4468 unwind.prologue_count = 0;
4471 unwind.list = unwind.tail = unwind.current_entry = NULL;
4472 unwind.personality_routine = 0;
4477 int dummy ATTRIBUTE_UNUSED;
4479 if (!in_procedure ("body"))
4481 if (!unwind.prologue && !unwind.body && unwind.insn)
4482 as_warn ("Initial .body should precede any instructions");
4483 check_pending_save ();
4485 unwind.prologue = 0;
4486 unwind.prologue_mask = 0;
4489 add_unwind_entry (output_body (), 0);
4493 dot_prologue (dummy)
4494 int dummy ATTRIBUTE_UNUSED;
4496 unsigned mask = 0, grsave = 0;
4498 if (!in_procedure ("prologue"))
4500 if (unwind.prologue)
4502 as_bad (".prologue within prologue");
4503 ignore_rest_of_line ();
4506 if (!unwind.body && unwind.insn)
4507 as_warn ("Initial .prologue should precede any instructions");
4509 if (!is_it_end_of_statement ())
4512 int n, sep = parse_operand (&e, ',');
4514 if (e.X_op != O_constant
4515 || e.X_add_number < 0
4516 || e.X_add_number > 0xf)
4517 as_bad ("First operand to .prologue must be a positive 4-bit constant");
4518 else if (e.X_add_number == 0)
4519 as_warn ("Pointless use of zero first operand to .prologue");
4521 mask = e.X_add_number;
4522 n = popcount (mask);
4525 parse_operand (&e, 0);
4528 if (e.X_op == O_constant
4529 && e.X_add_number >= 0
4530 && e.X_add_number < 128)
4532 if (md.unwind_check == unwind_check_error)
4533 as_warn ("Using a constant as second operand to .prologue is deprecated");
4534 grsave = e.X_add_number;
4536 else if (e.X_op != O_register
4537 || (grsave = e.X_add_number - REG_GR) > 127)
4539 as_bad ("Second operand to .prologue must be a general register");
4542 else if (grsave > 128U - n)
4544 as_bad ("Second operand to .prologue must be the first of %d general registers", n);
4551 add_unwind_entry (output_prologue_gr (mask, grsave), 0);
4553 add_unwind_entry (output_prologue (), 0);
4555 unwind.prologue = 1;
4556 unwind.prologue_mask = mask;
4557 unwind.prologue_gr = grsave;
4559 ++unwind.prologue_count;
4564 int dummy ATTRIBUTE_UNUSED;
4567 int bytes_per_address;
4570 subsegT saved_subseg;
4571 proc_pending *pending;
4572 int unwind_check = md.unwind_check;
4574 md.unwind_check = unwind_check_error;
4575 if (!in_procedure ("endp"))
4577 md.unwind_check = unwind_check;
4579 if (unwind.saved_text_seg)
4581 saved_seg = unwind.saved_text_seg;
4582 saved_subseg = unwind.saved_text_subseg;
4583 unwind.saved_text_seg = NULL;
4587 saved_seg = now_seg;
4588 saved_subseg = now_subseg;
4591 insn_group_break (1, 0, 0);
4593 /* If there wasn't a .handlerdata, we haven't generated an image yet. */
4595 generate_unwind_image (saved_seg);
4597 if (unwind.info || unwind.force_unwind_entry)
4601 subseg_set (md.last_text_seg, 0);
4602 proc_end = expr_build_dot ();
4604 start_unwind_section (saved_seg, SPECIAL_SECTION_UNWIND);
4606 /* Make sure that section has 4 byte alignment for ILP32 and
4607 8 byte alignment for LP64. */
4608 record_alignment (now_seg, md.pointer_size_shift);
4610 /* Need space for 3 pointers for procedure start, procedure end,
4612 memset (frag_more (3 * md.pointer_size), 0, 3 * md.pointer_size);
4613 where = frag_now_fix () - (3 * md.pointer_size);
4614 bytes_per_address = bfd_arch_bits_per_address (stdoutput) / 8;
4616 /* Issue the values of a) Proc Begin, b) Proc End, c) Unwind Record. */
4617 e.X_op = O_pseudo_fixup;
4618 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4620 if (!S_IS_LOCAL (unwind.proc_pending.sym)
4621 && S_IS_DEFINED (unwind.proc_pending.sym))
4622 e.X_add_symbol = symbol_temp_new (S_GET_SEGMENT (unwind.proc_pending.sym),
4623 S_GET_VALUE (unwind.proc_pending.sym),
4624 symbol_get_frag (unwind.proc_pending.sym));
4626 e.X_add_symbol = unwind.proc_pending.sym;
4627 ia64_cons_fix_new (frag_now, where, bytes_per_address, &e);
4629 e.X_op = O_pseudo_fixup;
4630 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4632 e.X_add_symbol = proc_end;
4633 ia64_cons_fix_new (frag_now, where + bytes_per_address,
4634 bytes_per_address, &e);
4638 e.X_op = O_pseudo_fixup;
4639 e.X_op_symbol = pseudo_func[FUNC_SEG_RELATIVE].u.sym;
4641 e.X_add_symbol = unwind.info;
4642 ia64_cons_fix_new (frag_now, where + (bytes_per_address * 2),
4643 bytes_per_address, &e);
4646 subseg_set (saved_seg, saved_subseg);
4648 /* Set symbol sizes. */
4649 pending = &unwind.proc_pending;
4650 if (S_GET_NAME (pending->sym))
4654 symbolS *sym = pending->sym;
4656 if (!S_IS_DEFINED (sym))
4657 as_bad ("`%s' was not defined within procedure", S_GET_NAME (sym));
4658 else if (S_GET_SIZE (sym) == 0
4659 && symbol_get_obj (sym)->size == NULL)
4661 fragS *frag = symbol_get_frag (sym);
4665 if (frag == frag_now && SEG_NORMAL (now_seg))
4666 S_SET_SIZE (sym, frag_now_fix () - S_GET_VALUE (sym));
4669 symbol_get_obj (sym)->size =
4670 (expressionS *) xmalloc (sizeof (expressionS));
4671 symbol_get_obj (sym)->size->X_op = O_subtract;
4672 symbol_get_obj (sym)->size->X_add_symbol
4673 = symbol_new (FAKE_LABEL_NAME, now_seg,
4674 frag_now_fix (), frag_now);
4675 symbol_get_obj (sym)->size->X_op_symbol = sym;
4676 symbol_get_obj (sym)->size->X_add_number = 0;
4680 } while ((pending = pending->next) != NULL);
4683 /* Parse names of main and alternate entry points. */
4689 name = input_line_pointer;
4690 c = get_symbol_end ();
4691 p = input_line_pointer;
4693 (md.unwind_check == unwind_check_warning
4695 : as_bad) ("Empty argument of .endp");
4698 symbolS *sym = symbol_find (name);
4700 for (pending = &unwind.proc_pending; pending; pending = pending->next)
4702 if (sym == pending->sym)
4704 pending->sym = NULL;
4708 if (!sym || !pending)
4709 as_warn ("`%s' was not specified with previous .proc", name);
4713 if (*input_line_pointer != ',')
4715 ++input_line_pointer;
4717 demand_empty_rest_of_line ();
4719 /* Deliberately only checking for the main entry point here; the
4720 language spec even says all arguments to .endp are ignored. */
4721 if (unwind.proc_pending.sym
4722 && S_GET_NAME (unwind.proc_pending.sym)
4723 && strcmp (S_GET_NAME (unwind.proc_pending.sym), FAKE_LABEL_NAME))
4724 as_warn ("`%s' should be an operand to this .endp",
4725 S_GET_NAME (unwind.proc_pending.sym));
4726 while (unwind.proc_pending.next)
4728 pending = unwind.proc_pending.next;
4729 unwind.proc_pending.next = pending->next;
4732 unwind.proc_pending.sym = unwind.info = NULL;
4736 dot_template (template)
4739 CURR_SLOT.user_template = template;
4744 int dummy ATTRIBUTE_UNUSED;
4746 int ins, locs, outs, rots;
4748 if (is_it_end_of_statement ())
4749 ins = locs = outs = rots = 0;
4752 ins = get_absolute_expression ();
4753 if (*input_line_pointer++ != ',')
4755 locs = get_absolute_expression ();
4756 if (*input_line_pointer++ != ',')
4758 outs = get_absolute_expression ();
4759 if (*input_line_pointer++ != ',')
4761 rots = get_absolute_expression ();
4763 set_regstack (ins, locs, outs, rots);
4767 as_bad ("Comma expected");
4768 ignore_rest_of_line ();
4775 unsigned num_regs, num_alloced = 0;
4776 struct dynreg **drpp, *dr;
4777 int ch, base_reg = 0;
4783 case DYNREG_GR: base_reg = REG_GR + 32; break;
4784 case DYNREG_FR: base_reg = REG_FR + 32; break;
4785 case DYNREG_PR: base_reg = REG_P + 16; break;
4789 /* First, remove existing names from hash table. */
4790 for (dr = md.dynreg[type]; dr && dr->num_regs; dr = dr->next)
4792 hash_delete (md.dynreg_hash, dr->name);
4793 /* FIXME: Free dr->name. */
4797 drpp = &md.dynreg[type];
4800 start = input_line_pointer;
4801 ch = get_symbol_end ();
4802 len = strlen (ia64_canonicalize_symbol_name (start));
4803 *input_line_pointer = ch;
4806 if (*input_line_pointer != '[')
4808 as_bad ("Expected '['");
4811 ++input_line_pointer; /* skip '[' */
4813 num_regs = get_absolute_expression ();
4815 if (*input_line_pointer++ != ']')
4817 as_bad ("Expected ']'");
4822 num_alloced += num_regs;
4826 if (num_alloced > md.rot.num_regs)
4828 as_bad ("Used more than the declared %d rotating registers",
4834 if (num_alloced > 96)
4836 as_bad ("Used more than the available 96 rotating registers");
4841 if (num_alloced > 48)
4843 as_bad ("Used more than the available 48 rotating registers");
4854 *drpp = obstack_alloc (¬es, sizeof (*dr));
4855 memset (*drpp, 0, sizeof (*dr));
4858 name = obstack_alloc (¬es, len + 1);
4859 memcpy (name, start, len);
4864 dr->num_regs = num_regs;
4865 dr->base = base_reg;
4867 base_reg += num_regs;
4869 if (hash_insert (md.dynreg_hash, name, dr))
4871 as_bad ("Attempt to redefine register set `%s'", name);
4872 obstack_free (¬es, name);
4876 if (*input_line_pointer != ',')
4878 ++input_line_pointer; /* skip comma */
4881 demand_empty_rest_of_line ();
4885 ignore_rest_of_line ();
4889 dot_byteorder (byteorder)
4892 segment_info_type *seginfo = seg_info (now_seg);
4894 if (byteorder == -1)
4896 if (seginfo->tc_segment_info_data.endian == 0)
4897 seginfo->tc_segment_info_data.endian = default_big_endian ? 1 : 2;
4898 byteorder = seginfo->tc_segment_info_data.endian == 1;
4901 seginfo->tc_segment_info_data.endian = byteorder ? 1 : 2;
4903 if (target_big_endian != byteorder)
4905 target_big_endian = byteorder;
4906 if (target_big_endian)
4908 ia64_number_to_chars = number_to_chars_bigendian;
4909 ia64_float_to_chars = ia64_float_to_chars_bigendian;
4913 ia64_number_to_chars = number_to_chars_littleendian;
4914 ia64_float_to_chars = ia64_float_to_chars_littleendian;
4921 int dummy ATTRIBUTE_UNUSED;
4928 option = input_line_pointer;
4929 ch = get_symbol_end ();
4930 if (strcmp (option, "lsb") == 0)
4931 md.flags &= ~EF_IA_64_BE;
4932 else if (strcmp (option, "msb") == 0)
4933 md.flags |= EF_IA_64_BE;
4934 else if (strcmp (option, "abi32") == 0)
4935 md.flags &= ~EF_IA_64_ABI64;
4936 else if (strcmp (option, "abi64") == 0)
4937 md.flags |= EF_IA_64_ABI64;
4939 as_bad ("Unknown psr option `%s'", option);
4940 *input_line_pointer = ch;
4943 if (*input_line_pointer != ',')
4946 ++input_line_pointer;
4949 demand_empty_rest_of_line ();
4954 int dummy ATTRIBUTE_UNUSED;
4956 new_logical_line (0, get_absolute_expression ());
4957 demand_empty_rest_of_line ();
4961 cross_section (ref, cons, ua)
4963 void (*cons) PARAMS((int));
4967 int saved_auto_align;
4968 unsigned int section_count;
4971 start = input_line_pointer;
4977 name = demand_copy_C_string (&len);
4978 obstack_free(¬es, name);
4981 ignore_rest_of_line ();
4987 char c = get_symbol_end ();
4989 if (input_line_pointer == start)
4991 as_bad ("Missing section name");
4992 ignore_rest_of_line ();
4995 *input_line_pointer = c;
4997 end = input_line_pointer;
4999 if (*input_line_pointer != ',')
5001 as_bad ("Comma expected after section name");
5002 ignore_rest_of_line ();
5006 end = input_line_pointer + 1; /* skip comma */
5007 input_line_pointer = start;
5008 md.keep_pending_output = 1;
5009 section_count = bfd_count_sections(stdoutput);
5010 obj_elf_section (0);
5011 if (section_count != bfd_count_sections(stdoutput))
5012 as_warn ("Creating sections with .xdataN/.xrealN/.xstringZ is deprecated.");
5013 input_line_pointer = end;
5014 saved_auto_align = md.auto_align;
5019 md.auto_align = saved_auto_align;
5020 obj_elf_previous (0);
5021 md.keep_pending_output = 0;
5028 cross_section (size, cons, 0);
5031 /* Why doesn't float_cons() call md_cons_align() the way cons() does? */
5034 stmt_float_cons (kind)
5055 ia64_do_align (alignment);
5063 int saved_auto_align = md.auto_align;
5067 md.auto_align = saved_auto_align;
5071 dot_xfloat_cons (kind)
5074 cross_section (kind, stmt_float_cons, 0);
5078 dot_xstringer (zero)
5081 cross_section (zero, stringer, 0);
5088 cross_section (size, cons, 1);
5092 dot_xfloat_cons_ua (kind)
5095 cross_section (kind, float_cons, 1);
5098 /* .reg.val <regname>,value */
5102 int dummy ATTRIBUTE_UNUSED;
5106 expression_and_evaluate (®);
5107 if (reg.X_op != O_register)
5109 as_bad (_("Register name expected"));
5110 ignore_rest_of_line ();
5112 else if (*input_line_pointer++ != ',')
5114 as_bad (_("Comma expected"));
5115 ignore_rest_of_line ();
5119 valueT value = get_absolute_expression ();
5120 int regno = reg.X_add_number;
5121 if (regno <= REG_GR || regno > REG_GR + 127)
5122 as_warn (_("Register value annotation ignored"));
5125 gr_values[regno - REG_GR].known = 1;
5126 gr_values[regno - REG_GR].value = value;
5127 gr_values[regno - REG_GR].path = md.path;
5130 demand_empty_rest_of_line ();
5135 .serialize.instruction
5138 dot_serialize (type)
5141 insn_group_break (0, 0, 0);
5143 instruction_serialization ();
5145 data_serialization ();
5146 insn_group_break (0, 0, 0);
5147 demand_empty_rest_of_line ();
5150 /* select dv checking mode
5155 A stop is inserted when changing modes
5162 if (md.manual_bundling)
5163 as_warn (_("Directive invalid within a bundle"));
5165 if (type == 'E' || type == 'A')
5166 md.mode_explicitly_set = 0;
5168 md.mode_explicitly_set = 1;
5175 if (md.explicit_mode)
5176 insn_group_break (1, 0, 0);
5177 md.explicit_mode = 0;
5181 if (!md.explicit_mode)
5182 insn_group_break (1, 0, 0);
5183 md.explicit_mode = 1;
5187 if (md.explicit_mode != md.default_explicit_mode)
5188 insn_group_break (1, 0, 0);
5189 md.explicit_mode = md.default_explicit_mode;
5190 md.mode_explicitly_set = 0;
5201 for (regno = 0; regno < 64; regno++)
5203 if (mask & ((valueT) 1 << regno))
5205 fprintf (stderr, "%s p%d", comma, regno);
5212 .pred.rel.clear [p1 [,p2 [,...]]] (also .pred.rel "clear" or @clear)
5213 .pred.rel.imply p1, p2 (also .pred.rel "imply" or @imply)
5214 .pred.rel.mutex p1, p2 [,...] (also .pred.rel "mutex" or @mutex)
5215 .pred.safe_across_calls p1 [, p2 [,...]]
5224 int p1 = -1, p2 = -1;
5228 if (*input_line_pointer == '"')
5231 char *form = demand_copy_C_string (&len);
5233 if (strcmp (form, "mutex") == 0)
5235 else if (strcmp (form, "clear") == 0)
5237 else if (strcmp (form, "imply") == 0)
5239 obstack_free (¬es, form);
5241 else if (*input_line_pointer == '@')
5243 char *form = ++input_line_pointer;
5244 char c = get_symbol_end();
5246 if (strcmp (form, "mutex") == 0)
5248 else if (strcmp (form, "clear") == 0)
5250 else if (strcmp (form, "imply") == 0)
5252 *input_line_pointer = c;
5256 as_bad (_("Missing predicate relation type"));
5257 ignore_rest_of_line ();
5262 as_bad (_("Unrecognized predicate relation type"));
5263 ignore_rest_of_line ();
5266 if (*input_line_pointer == ',')
5267 ++input_line_pointer;
5276 expressionS pr, *pr1, *pr2;
5278 expression_and_evaluate (&pr);
5279 if (pr.X_op == O_register
5280 && pr.X_add_number >= REG_P
5281 && pr.X_add_number <= REG_P + 63)
5283 regno = pr.X_add_number - REG_P;
5291 else if (type != 'i'
5292 && pr.X_op == O_subtract
5293 && (pr1 = symbol_get_value_expression (pr.X_add_symbol))
5294 && pr1->X_op == O_register
5295 && pr1->X_add_number >= REG_P
5296 && pr1->X_add_number <= REG_P + 63
5297 && (pr2 = symbol_get_value_expression (pr.X_op_symbol))
5298 && pr2->X_op == O_register
5299 && pr2->X_add_number >= REG_P
5300 && pr2->X_add_number <= REG_P + 63)
5305 regno = pr1->X_add_number - REG_P;
5306 stop = pr2->X_add_number - REG_P;
5309 as_bad (_("Bad register range"));
5310 ignore_rest_of_line ();
5313 bits = ((bits << stop) << 1) - (bits << regno);
5314 count += stop - regno + 1;
5318 as_bad (_("Predicate register expected"));
5319 ignore_rest_of_line ();
5323 as_warn (_("Duplicate predicate register ignored"));
5325 if (*input_line_pointer != ',')
5327 ++input_line_pointer;
5336 clear_qp_mutex (mask);
5337 clear_qp_implies (mask, (valueT) 0);
5340 if (count != 2 || p1 == -1 || p2 == -1)
5341 as_bad (_("Predicate source and target required"));
5342 else if (p1 == 0 || p2 == 0)
5343 as_bad (_("Use of p0 is not valid in this context"));
5345 add_qp_imply (p1, p2);
5350 as_bad (_("At least two PR arguments expected"));
5355 as_bad (_("Use of p0 is not valid in this context"));
5358 add_qp_mutex (mask);
5361 /* note that we don't override any existing relations */
5364 as_bad (_("At least one PR argument expected"));
5369 fprintf (stderr, "Safe across calls: ");
5370 print_prmask (mask);
5371 fprintf (stderr, "\n");
5373 qp_safe_across_calls = mask;
5376 demand_empty_rest_of_line ();
5379 /* .entry label [, label [, ...]]
5380 Hint to DV code that the given labels are to be considered entry points.
5381 Otherwise, only global labels are considered entry points. */
5385 int dummy ATTRIBUTE_UNUSED;
5394 name = input_line_pointer;
5395 c = get_symbol_end ();
5396 symbolP = symbol_find_or_make (name);
5398 err = hash_insert (md.entry_hash, S_GET_NAME (symbolP), (PTR) symbolP);
5400 as_fatal (_("Inserting \"%s\" into entry hint table failed: %s"),
5403 *input_line_pointer = c;
5405 c = *input_line_pointer;
5408 input_line_pointer++;
5410 if (*input_line_pointer == '\n')
5416 demand_empty_rest_of_line ();
5419 /* .mem.offset offset, base
5420 "base" is used to distinguish between offsets from a different base. */
5423 dot_mem_offset (dummy)
5424 int dummy ATTRIBUTE_UNUSED;
5426 md.mem_offset.hint = 1;
5427 md.mem_offset.offset = get_absolute_expression ();
5428 if (*input_line_pointer != ',')
5430 as_bad (_("Comma expected"));
5431 ignore_rest_of_line ();
5434 ++input_line_pointer;
5435 md.mem_offset.base = get_absolute_expression ();
5436 demand_empty_rest_of_line ();
5439 /* ia64-specific pseudo-ops: */
5440 const pseudo_typeS md_pseudo_table[] =
5442 { "radix", dot_radix, 0 },
5443 { "lcomm", s_lcomm_bytes, 1 },
5444 { "loc", dot_loc, 0 },
5445 { "bss", dot_special_section, SPECIAL_SECTION_BSS },
5446 { "sbss", dot_special_section, SPECIAL_SECTION_SBSS },
5447 { "sdata", dot_special_section, SPECIAL_SECTION_SDATA },
5448 { "rodata", dot_special_section, SPECIAL_SECTION_RODATA },
5449 { "comment", dot_special_section, SPECIAL_SECTION_COMMENT },
5450 { "ia_64.unwind", dot_special_section, SPECIAL_SECTION_UNWIND },
5451 { "ia_64.unwind_info", dot_special_section, SPECIAL_SECTION_UNWIND_INFO },
5452 { "init_array", dot_special_section, SPECIAL_SECTION_INIT_ARRAY },
5453 { "fini_array", dot_special_section, SPECIAL_SECTION_FINI_ARRAY },
5454 { "proc", dot_proc, 0 },
5455 { "body", dot_body, 0 },
5456 { "prologue", dot_prologue, 0 },
5457 { "endp", dot_endp, 0 },
5459 { "fframe", dot_fframe, 0 },
5460 { "vframe", dot_vframe, 0 },
5461 { "vframesp", dot_vframesp, 0 },
5462 { "vframepsp", dot_vframesp, 1 },
5463 { "save", dot_save, 0 },
5464 { "restore", dot_restore, 0 },
5465 { "restorereg", dot_restorereg, 0 },
5466 { "restorereg.p", dot_restorereg, 1 },
5467 { "handlerdata", dot_handlerdata, 0 },
5468 { "unwentry", dot_unwentry, 0 },
5469 { "altrp", dot_altrp, 0 },
5470 { "savesp", dot_savemem, 0 },
5471 { "savepsp", dot_savemem, 1 },
5472 { "save.g", dot_saveg, 0 },
5473 { "save.f", dot_savef, 0 },
5474 { "save.b", dot_saveb, 0 },
5475 { "save.gf", dot_savegf, 0 },
5476 { "spill", dot_spill, 0 },
5477 { "spillreg", dot_spillreg, 0 },
5478 { "spillsp", dot_spillmem, 0 },
5479 { "spillpsp", dot_spillmem, 1 },
5480 { "spillreg.p", dot_spillreg, 1 },
5481 { "spillsp.p", dot_spillmem, ~0 },
5482 { "spillpsp.p", dot_spillmem, ~1 },
5483 { "label_state", dot_label_state, 0 },
5484 { "copy_state", dot_copy_state, 0 },
5485 { "unwabi", dot_unwabi, 0 },
5486 { "personality", dot_personality, 0 },
5487 { "mii", dot_template, 0x0 },
5488 { "mli", dot_template, 0x2 }, /* old format, for compatibility */
5489 { "mlx", dot_template, 0x2 },
5490 { "mmi", dot_template, 0x4 },
5491 { "mfi", dot_template, 0x6 },
5492 { "mmf", dot_template, 0x7 },
5493 { "mib", dot_template, 0x8 },
5494 { "mbb", dot_template, 0x9 },
5495 { "bbb", dot_template, 0xb },
5496 { "mmb", dot_template, 0xc },
5497 { "mfb", dot_template, 0xe },
5498 { "align", dot_align, 0 },
5499 { "regstk", dot_regstk, 0 },
5500 { "rotr", dot_rot, DYNREG_GR },
5501 { "rotf", dot_rot, DYNREG_FR },
5502 { "rotp", dot_rot, DYNREG_PR },
5503 { "lsb", dot_byteorder, 0 },
5504 { "msb", dot_byteorder, 1 },
5505 { "psr", dot_psr, 0 },
5506 { "alias", dot_alias, 0 },
5507 { "secalias", dot_alias, 1 },
5508 { "ln", dot_ln, 0 }, /* source line info (for debugging) */
5510 { "xdata1", dot_xdata, 1 },
5511 { "xdata2", dot_xdata, 2 },
5512 { "xdata4", dot_xdata, 4 },
5513 { "xdata8", dot_xdata, 8 },
5514 { "xdata16", dot_xdata, 16 },
5515 { "xreal4", dot_xfloat_cons, 'f' },
5516 { "xreal8", dot_xfloat_cons, 'd' },
5517 { "xreal10", dot_xfloat_cons, 'x' },
5518 { "xreal16", dot_xfloat_cons, 'X' },
5519 { "xstring", dot_xstringer, 0 },
5520 { "xstringz", dot_xstringer, 1 },
5522 /* unaligned versions: */
5523 { "xdata2.ua", dot_xdata_ua, 2 },
5524 { "xdata4.ua", dot_xdata_ua, 4 },
5525 { "xdata8.ua", dot_xdata_ua, 8 },
5526 { "xdata16.ua", dot_xdata_ua, 16 },
5527 { "xreal4.ua", dot_xfloat_cons_ua, 'f' },
5528 { "xreal8.ua", dot_xfloat_cons_ua, 'd' },
5529 { "xreal10.ua", dot_xfloat_cons_ua, 'x' },
5530 { "xreal16.ua", dot_xfloat_cons_ua, 'X' },
5532 /* annotations/DV checking support */
5533 { "entry", dot_entry, 0 },
5534 { "mem.offset", dot_mem_offset, 0 },
5535 { "pred.rel", dot_pred_rel, 0 },
5536 { "pred.rel.clear", dot_pred_rel, 'c' },
5537 { "pred.rel.imply", dot_pred_rel, 'i' },
5538 { "pred.rel.mutex", dot_pred_rel, 'm' },
5539 { "pred.safe_across_calls", dot_pred_rel, 's' },
5540 { "reg.val", dot_reg_val, 0 },
5541 { "serialize.data", dot_serialize, 0 },
5542 { "serialize.instruction", dot_serialize, 1 },
5543 { "auto", dot_dv_mode, 'a' },
5544 { "explicit", dot_dv_mode, 'e' },
5545 { "default", dot_dv_mode, 'd' },
5547 /* ??? These are needed to make gas/testsuite/gas/elf/ehopt.s work.
5548 IA-64 aligns data allocation pseudo-ops by default, so we have to
5549 tell it that these ones are supposed to be unaligned. Long term,
5550 should rewrite so that only IA-64 specific data allocation pseudo-ops
5551 are aligned by default. */
5552 {"2byte", stmt_cons_ua, 2},
5553 {"4byte", stmt_cons_ua, 4},
5554 {"8byte", stmt_cons_ua, 8},
5559 static const struct pseudo_opcode
5562 void (*handler) (int);
5567 /* these are more like pseudo-ops, but don't start with a dot */
5568 { "data1", cons, 1 },
5569 { "data2", cons, 2 },
5570 { "data4", cons, 4 },
5571 { "data8", cons, 8 },
5572 { "data16", cons, 16 },
5573 { "real4", stmt_float_cons, 'f' },
5574 { "real8", stmt_float_cons, 'd' },
5575 { "real10", stmt_float_cons, 'x' },
5576 { "real16", stmt_float_cons, 'X' },
5577 { "string", stringer, 0 },
5578 { "stringz", stringer, 1 },
5580 /* unaligned versions: */
5581 { "data2.ua", stmt_cons_ua, 2 },
5582 { "data4.ua", stmt_cons_ua, 4 },
5583 { "data8.ua", stmt_cons_ua, 8 },
5584 { "data16.ua", stmt_cons_ua, 16 },
5585 { "real4.ua", float_cons, 'f' },
5586 { "real8.ua", float_cons, 'd' },
5587 { "real10.ua", float_cons, 'x' },
5588 { "real16.ua", float_cons, 'X' },
5591 /* Declare a register by creating a symbol for it and entering it in
5592 the symbol table. */
5595 declare_register (name, regnum)
5602 sym = symbol_create (name, reg_section, regnum, &zero_address_frag);
5604 err = hash_insert (md.reg_hash, S_GET_NAME (sym), (PTR) sym);
5606 as_fatal ("Inserting \"%s\" into register table failed: %s",
5613 declare_register_set (prefix, num_regs, base_regnum)
5621 for (i = 0; i < num_regs; ++i)
5623 sprintf (name, "%s%u", prefix, i);
5624 declare_register (name, base_regnum + i);
5629 operand_width (opnd)
5630 enum ia64_opnd opnd;
5632 const struct ia64_operand *odesc = &elf64_ia64_operands[opnd];
5633 unsigned int bits = 0;
5637 for (i = 0; i < NELEMS (odesc->field) && odesc->field[i].bits; ++i)
5638 bits += odesc->field[i].bits;
5643 static enum operand_match_result
5644 operand_match (idesc, index, e)
5645 const struct ia64_opcode *idesc;
5649 enum ia64_opnd opnd = idesc->operands[index];
5650 int bits, relocatable = 0;
5651 struct insn_fix *fix;
5658 case IA64_OPND_AR_CCV:
5659 if (e->X_op == O_register && e->X_add_number == REG_AR + 32)
5660 return OPERAND_MATCH;
5663 case IA64_OPND_AR_CSD:
5664 if (e->X_op == O_register && e->X_add_number == REG_AR + 25)
5665 return OPERAND_MATCH;
5668 case IA64_OPND_AR_PFS:
5669 if (e->X_op == O_register && e->X_add_number == REG_AR + 64)
5670 return OPERAND_MATCH;
5674 if (e->X_op == O_register && e->X_add_number == REG_GR + 0)
5675 return OPERAND_MATCH;
5679 if (e->X_op == O_register && e->X_add_number == REG_IP)
5680 return OPERAND_MATCH;
5684 if (e->X_op == O_register && e->X_add_number == REG_PR)
5685 return OPERAND_MATCH;
5688 case IA64_OPND_PR_ROT:
5689 if (e->X_op == O_register && e->X_add_number == REG_PR_ROT)
5690 return OPERAND_MATCH;
5694 if (e->X_op == O_register && e->X_add_number == REG_PSR)
5695 return OPERAND_MATCH;
5698 case IA64_OPND_PSR_L:
5699 if (e->X_op == O_register && e->X_add_number == REG_PSR_L)
5700 return OPERAND_MATCH;
5703 case IA64_OPND_PSR_UM:
5704 if (e->X_op == O_register && e->X_add_number == REG_PSR_UM)
5705 return OPERAND_MATCH;
5709 if (e->X_op == O_constant)
5711 if (e->X_add_number == 1)
5712 return OPERAND_MATCH;
5714 return OPERAND_OUT_OF_RANGE;
5719 if (e->X_op == O_constant)
5721 if (e->X_add_number == 8)
5722 return OPERAND_MATCH;
5724 return OPERAND_OUT_OF_RANGE;
5729 if (e->X_op == O_constant)
5731 if (e->X_add_number == 16)
5732 return OPERAND_MATCH;
5734 return OPERAND_OUT_OF_RANGE;
5738 /* register operands: */
5741 if (e->X_op == O_register && e->X_add_number >= REG_AR
5742 && e->X_add_number < REG_AR + 128)
5743 return OPERAND_MATCH;
5748 if (e->X_op == O_register && e->X_add_number >= REG_BR
5749 && e->X_add_number < REG_BR + 8)
5750 return OPERAND_MATCH;
5754 if (e->X_op == O_register && e->X_add_number >= REG_CR
5755 && e->X_add_number < REG_CR + 128)
5756 return OPERAND_MATCH;
5763 if (e->X_op == O_register && e->X_add_number >= REG_FR
5764 && e->X_add_number < REG_FR + 128)
5765 return OPERAND_MATCH;
5770 if (e->X_op == O_register && e->X_add_number >= REG_P
5771 && e->X_add_number < REG_P + 64)
5772 return OPERAND_MATCH;
5778 if (e->X_op == O_register && e->X_add_number >= REG_GR
5779 && e->X_add_number < REG_GR + 128)
5780 return OPERAND_MATCH;
5783 case IA64_OPND_R3_2:
5784 if (e->X_op == O_register && e->X_add_number >= REG_GR)
5786 if (e->X_add_number < REG_GR + 4)
5787 return OPERAND_MATCH;
5788 else if (e->X_add_number < REG_GR + 128)
5789 return OPERAND_OUT_OF_RANGE;
5793 /* indirect operands: */
5794 case IA64_OPND_CPUID_R3:
5795 case IA64_OPND_DBR_R3:
5796 case IA64_OPND_DTR_R3:
5797 case IA64_OPND_ITR_R3:
5798 case IA64_OPND_IBR_R3:
5799 case IA64_OPND_MSR_R3:
5800 case IA64_OPND_PKR_R3:
5801 case IA64_OPND_PMC_R3:
5802 case IA64_OPND_PMD_R3:
5803 case IA64_OPND_RR_R3:
5804 if (e->X_op == O_index && e->X_op_symbol
5805 && (S_GET_VALUE (e->X_op_symbol) - IND_CPUID
5806 == opnd - IA64_OPND_CPUID_R3))
5807 return OPERAND_MATCH;
5811 if (e->X_op == O_index && !e->X_op_symbol)
5812 return OPERAND_MATCH;
5815 /* immediate operands: */
5816 case IA64_OPND_CNT2a:
5817 case IA64_OPND_LEN4:
5818 case IA64_OPND_LEN6:
5819 bits = operand_width (idesc->operands[index]);
5820 if (e->X_op == O_constant)
5822 if ((bfd_vma) (e->X_add_number - 1) < ((bfd_vma) 1 << bits))
5823 return OPERAND_MATCH;
5825 return OPERAND_OUT_OF_RANGE;
5829 case IA64_OPND_CNT2b:
5830 if (e->X_op == O_constant)
5832 if ((bfd_vma) (e->X_add_number - 1) < 3)
5833 return OPERAND_MATCH;
5835 return OPERAND_OUT_OF_RANGE;
5839 case IA64_OPND_CNT2c:
5840 val = e->X_add_number;
5841 if (e->X_op == O_constant)
5843 if ((val == 0 || val == 7 || val == 15 || val == 16))
5844 return OPERAND_MATCH;
5846 return OPERAND_OUT_OF_RANGE;
5851 /* SOR must be an integer multiple of 8 */
5852 if (e->X_op == O_constant && e->X_add_number & 0x7)
5853 return OPERAND_OUT_OF_RANGE;
5856 if (e->X_op == O_constant)
5858 if ((bfd_vma) e->X_add_number <= 96)
5859 return OPERAND_MATCH;
5861 return OPERAND_OUT_OF_RANGE;
5865 case IA64_OPND_IMMU62:
5866 if (e->X_op == O_constant)
5868 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << 62))
5869 return OPERAND_MATCH;
5871 return OPERAND_OUT_OF_RANGE;
5875 /* FIXME -- need 62-bit relocation type */
5876 as_bad (_("62-bit relocation not yet implemented"));
5880 case IA64_OPND_IMMU64:
5881 if (e->X_op == O_symbol || e->X_op == O_pseudo_fixup
5882 || e->X_op == O_subtract)
5884 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
5885 fix->code = BFD_RELOC_IA64_IMM64;
5886 if (e->X_op != O_subtract)
5888 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
5889 if (e->X_op == O_pseudo_fixup)
5893 fix->opnd = idesc->operands[index];
5896 ++CURR_SLOT.num_fixups;
5897 return OPERAND_MATCH;
5899 else if (e->X_op == O_constant)
5900 return OPERAND_MATCH;
5903 case IA64_OPND_CCNT5:
5904 case IA64_OPND_CNT5:
5905 case IA64_OPND_CNT6:
5906 case IA64_OPND_CPOS6a:
5907 case IA64_OPND_CPOS6b:
5908 case IA64_OPND_CPOS6c:
5909 case IA64_OPND_IMMU2:
5910 case IA64_OPND_IMMU7a:
5911 case IA64_OPND_IMMU7b:
5912 case IA64_OPND_IMMU21:
5913 case IA64_OPND_IMMU24:
5914 case IA64_OPND_MBTYPE4:
5915 case IA64_OPND_MHTYPE8:
5916 case IA64_OPND_POS6:
5917 bits = operand_width (idesc->operands[index]);
5918 if (e->X_op == O_constant)
5920 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5921 return OPERAND_MATCH;
5923 return OPERAND_OUT_OF_RANGE;
5927 case IA64_OPND_IMMU9:
5928 bits = operand_width (idesc->operands[index]);
5929 if (e->X_op == O_constant)
5931 if ((bfd_vma) e->X_add_number < ((bfd_vma) 1 << bits))
5933 int lobits = e->X_add_number & 0x3;
5934 if (((bfd_vma) e->X_add_number & 0x3C) != 0 && lobits == 0)
5935 e->X_add_number |= (bfd_vma) 0x3;
5936 return OPERAND_MATCH;
5939 return OPERAND_OUT_OF_RANGE;
5943 case IA64_OPND_IMM44:
5944 /* least 16 bits must be zero */
5945 if ((e->X_add_number & 0xffff) != 0)
5946 /* XXX technically, this is wrong: we should not be issuing warning
5947 messages until we're sure this instruction pattern is going to
5949 as_warn (_("lower 16 bits of mask ignored"));
5951 if (e->X_op == O_constant)
5953 if (((e->X_add_number >= 0
5954 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 44))
5955 || (e->X_add_number < 0
5956 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 44))))
5959 if (e->X_add_number >= 0
5960 && (e->X_add_number & ((bfd_vma) 1 << 43)) != 0)
5962 e->X_add_number |= ~(((bfd_vma) 1 << 44) - 1);
5964 return OPERAND_MATCH;
5967 return OPERAND_OUT_OF_RANGE;
5971 case IA64_OPND_IMM17:
5972 /* bit 0 is a don't care (pr0 is hardwired to 1) */
5973 if (e->X_op == O_constant)
5975 if (((e->X_add_number >= 0
5976 && (bfd_vma) e->X_add_number < ((bfd_vma) 1 << 17))
5977 || (e->X_add_number < 0
5978 && (bfd_vma) -e->X_add_number <= ((bfd_vma) 1 << 17))))
5981 if (e->X_add_number >= 0
5982 && (e->X_add_number & ((bfd_vma) 1 << 16)) != 0)
5984 e->X_add_number |= ~(((bfd_vma) 1 << 17) - 1);
5986 return OPERAND_MATCH;
5989 return OPERAND_OUT_OF_RANGE;
5993 case IA64_OPND_IMM14:
5994 case IA64_OPND_IMM22:
5996 case IA64_OPND_IMM1:
5997 case IA64_OPND_IMM8:
5998 case IA64_OPND_IMM8U4:
5999 case IA64_OPND_IMM8M1:
6000 case IA64_OPND_IMM8M1U4:
6001 case IA64_OPND_IMM8M1U8:
6002 case IA64_OPND_IMM9a:
6003 case IA64_OPND_IMM9b:
6004 bits = operand_width (idesc->operands[index]);
6005 if (relocatable && (e->X_op == O_symbol
6006 || e->X_op == O_subtract
6007 || e->X_op == O_pseudo_fixup))
6009 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6011 if (idesc->operands[index] == IA64_OPND_IMM14)
6012 fix->code = BFD_RELOC_IA64_IMM14;
6014 fix->code = BFD_RELOC_IA64_IMM22;
6016 if (e->X_op != O_subtract)
6018 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6019 if (e->X_op == O_pseudo_fixup)
6023 fix->opnd = idesc->operands[index];
6026 ++CURR_SLOT.num_fixups;
6027 return OPERAND_MATCH;
6029 else if (e->X_op != O_constant
6030 && ! (e->X_op == O_big && opnd == IA64_OPND_IMM8M1U8))
6031 return OPERAND_MISMATCH;
6033 if (opnd == IA64_OPND_IMM8M1U4)
6035 /* Zero is not valid for unsigned compares that take an adjusted
6036 constant immediate range. */
6037 if (e->X_add_number == 0)
6038 return OPERAND_OUT_OF_RANGE;
6040 /* Sign-extend 32-bit unsigned numbers, so that the following range
6041 checks will work. */
6042 val = e->X_add_number;
6043 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6044 && ((val & ((bfd_vma) 1 << 31)) != 0))
6045 val = ((val << 32) >> 32);
6047 /* Check for 0x100000000. This is valid because
6048 0x100000000-1 is the same as ((uint32_t) -1). */
6049 if (val == ((bfd_signed_vma) 1 << 32))
6050 return OPERAND_MATCH;
6054 else if (opnd == IA64_OPND_IMM8M1U8)
6056 /* Zero is not valid for unsigned compares that take an adjusted
6057 constant immediate range. */
6058 if (e->X_add_number == 0)
6059 return OPERAND_OUT_OF_RANGE;
6061 /* Check for 0x10000000000000000. */
6062 if (e->X_op == O_big)
6064 if (generic_bignum[0] == 0
6065 && generic_bignum[1] == 0
6066 && generic_bignum[2] == 0
6067 && generic_bignum[3] == 0
6068 && generic_bignum[4] == 1)
6069 return OPERAND_MATCH;
6071 return OPERAND_OUT_OF_RANGE;
6074 val = e->X_add_number - 1;
6076 else if (opnd == IA64_OPND_IMM8M1)
6077 val = e->X_add_number - 1;
6078 else if (opnd == IA64_OPND_IMM8U4)
6080 /* Sign-extend 32-bit unsigned numbers, so that the following range
6081 checks will work. */
6082 val = e->X_add_number;
6083 if (((val & (~(bfd_vma) 0 << 32)) == 0)
6084 && ((val & ((bfd_vma) 1 << 31)) != 0))
6085 val = ((val << 32) >> 32);
6088 val = e->X_add_number;
6090 if ((val >= 0 && (bfd_vma) val < ((bfd_vma) 1 << (bits - 1)))
6091 || (val < 0 && (bfd_vma) -val <= ((bfd_vma) 1 << (bits - 1))))
6092 return OPERAND_MATCH;
6094 return OPERAND_OUT_OF_RANGE;
6096 case IA64_OPND_INC3:
6097 /* +/- 1, 4, 8, 16 */
6098 val = e->X_add_number;
6101 if (e->X_op == O_constant)
6103 if ((val == 1 || val == 4 || val == 8 || val == 16))
6104 return OPERAND_MATCH;
6106 return OPERAND_OUT_OF_RANGE;
6110 case IA64_OPND_TGT25:
6111 case IA64_OPND_TGT25b:
6112 case IA64_OPND_TGT25c:
6113 case IA64_OPND_TGT64:
6114 if (e->X_op == O_symbol)
6116 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6117 if (opnd == IA64_OPND_TGT25)
6118 fix->code = BFD_RELOC_IA64_PCREL21F;
6119 else if (opnd == IA64_OPND_TGT25b)
6120 fix->code = BFD_RELOC_IA64_PCREL21M;
6121 else if (opnd == IA64_OPND_TGT25c)
6122 fix->code = BFD_RELOC_IA64_PCREL21B;
6123 else if (opnd == IA64_OPND_TGT64)
6124 fix->code = BFD_RELOC_IA64_PCREL60B;
6128 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6129 fix->opnd = idesc->operands[index];
6132 ++CURR_SLOT.num_fixups;
6133 return OPERAND_MATCH;
6135 case IA64_OPND_TAG13:
6136 case IA64_OPND_TAG13b:
6140 return OPERAND_MATCH;
6143 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6144 /* There are no external relocs for TAG13/TAG13b fields, so we
6145 create a dummy reloc. This will not live past md_apply_fix. */
6146 fix->code = BFD_RELOC_UNUSED;
6147 fix->code = ia64_gen_real_reloc_type (e->X_op_symbol, fix->code);
6148 fix->opnd = idesc->operands[index];
6151 ++CURR_SLOT.num_fixups;
6152 return OPERAND_MATCH;
6159 case IA64_OPND_LDXMOV:
6160 fix = CURR_SLOT.fixup + CURR_SLOT.num_fixups;
6161 fix->code = BFD_RELOC_IA64_LDXMOV;
6162 fix->opnd = idesc->operands[index];
6165 ++CURR_SLOT.num_fixups;
6166 return OPERAND_MATCH;
6171 return OPERAND_MISMATCH;
6175 parse_operand (e, more)
6181 memset (e, 0, sizeof (*e));
6184 expression_and_evaluate (e);
6185 sep = *input_line_pointer;
6186 if (more && (sep == ',' || sep == more))
6187 ++input_line_pointer;
6191 /* Returns the next entry in the opcode table that matches the one in
6192 IDESC, and frees the entry in IDESC. If no matching entry is
6193 found, NULL is returned instead. */
6195 static struct ia64_opcode *
6196 get_next_opcode (struct ia64_opcode *idesc)
6198 struct ia64_opcode *next = ia64_find_next_opcode (idesc);
6199 ia64_free_opcode (idesc);
6203 /* Parse the operands for the opcode and find the opcode variant that
6204 matches the specified operands, or NULL if no match is possible. */
6206 static struct ia64_opcode *
6207 parse_operands (idesc)
6208 struct ia64_opcode *idesc;
6210 int i = 0, highest_unmatched_operand, num_operands = 0, num_outputs = 0;
6211 int error_pos, out_of_range_pos, curr_out_of_range_pos, sep = 0;
6214 enum ia64_opnd expected_operand = IA64_OPND_NIL;
6215 enum operand_match_result result;
6217 char *first_arg = 0, *end, *saved_input_pointer;
6220 assert (strlen (idesc->name) <= 128);
6222 strcpy (mnemonic, idesc->name);
6223 if (idesc->operands[2] == IA64_OPND_SOF
6224 || idesc->operands[1] == IA64_OPND_SOF)
6226 /* To make the common idiom "alloc loc?=ar.pfs,0,1,0,0" work, we
6227 can't parse the first operand until we have parsed the
6228 remaining operands of the "alloc" instruction. */
6230 first_arg = input_line_pointer;
6231 end = strchr (input_line_pointer, '=');
6234 as_bad ("Expected separator `='");
6237 input_line_pointer = end + 1;
6244 if (i < NELEMS (CURR_SLOT.opnd))
6246 sep = parse_operand (CURR_SLOT.opnd + i, '=');
6247 if (CURR_SLOT.opnd[i].X_op == O_absent)
6254 sep = parse_operand (&dummy, '=');
6255 if (dummy.X_op == O_absent)
6261 if (sep != '=' && sep != ',')
6266 if (num_outputs > 0)
6267 as_bad ("Duplicate equal sign (=) in instruction");
6269 num_outputs = i + 1;
6274 as_bad ("Illegal operand separator `%c'", sep);
6278 if (idesc->operands[2] == IA64_OPND_SOF
6279 || idesc->operands[1] == IA64_OPND_SOF)
6281 /* Map alloc r1=ar.pfs,i,l,o,r to alloc r1=ar.pfs,(i+l+o),(i+l),r.
6282 Note, however, that due to that mapping operand numbers in error
6283 messages for any of the constant operands will not be correct. */
6284 know (strcmp (idesc->name, "alloc") == 0);
6285 /* The first operand hasn't been parsed/initialized, yet (but
6286 num_operands intentionally doesn't account for that). */
6287 i = num_operands > 4 ? 2 : 1;
6288 #define FORCE_CONST(n) (CURR_SLOT.opnd[n].X_op == O_constant \
6289 ? CURR_SLOT.opnd[n].X_add_number \
6291 sof = set_regstack (FORCE_CONST(i),
6294 FORCE_CONST(i + 3));
6297 /* now we can parse the first arg: */
6298 saved_input_pointer = input_line_pointer;
6299 input_line_pointer = first_arg;
6300 sep = parse_operand (CURR_SLOT.opnd + 0, '=');
6302 --num_outputs; /* force error */
6303 input_line_pointer = saved_input_pointer;
6305 CURR_SLOT.opnd[i].X_add_number = sof;
6306 if (CURR_SLOT.opnd[i + 1].X_op == O_constant
6307 && CURR_SLOT.opnd[i + 2].X_op == O_constant)
6308 CURR_SLOT.opnd[i + 1].X_add_number
6309 = sof - CURR_SLOT.opnd[i + 2].X_add_number;
6311 CURR_SLOT.opnd[i + 1].X_op = O_illegal;
6312 CURR_SLOT.opnd[i + 2] = CURR_SLOT.opnd[i + 3];
6315 highest_unmatched_operand = -4;
6316 curr_out_of_range_pos = -1;
6318 for (; idesc; idesc = get_next_opcode (idesc))
6320 if (num_outputs != idesc->num_outputs)
6321 continue; /* mismatch in # of outputs */
6322 if (highest_unmatched_operand < 0)
6323 highest_unmatched_operand |= 1;
6324 if (num_operands > NELEMS (idesc->operands)
6325 || (num_operands < NELEMS (idesc->operands)
6326 && idesc->operands[num_operands])
6327 || (num_operands > 0 && !idesc->operands[num_operands - 1]))
6328 continue; /* mismatch in number of arguments */
6329 if (highest_unmatched_operand < 0)
6330 highest_unmatched_operand |= 2;
6332 CURR_SLOT.num_fixups = 0;
6334 /* Try to match all operands. If we see an out-of-range operand,
6335 then continue trying to match the rest of the operands, since if
6336 the rest match, then this idesc will give the best error message. */
6338 out_of_range_pos = -1;
6339 for (i = 0; i < num_operands && idesc->operands[i]; ++i)
6341 result = operand_match (idesc, i, CURR_SLOT.opnd + i);
6342 if (result != OPERAND_MATCH)
6344 if (result != OPERAND_OUT_OF_RANGE)
6346 if (out_of_range_pos < 0)
6347 /* remember position of the first out-of-range operand: */
6348 out_of_range_pos = i;
6352 /* If we did not match all operands, or if at least one operand was
6353 out-of-range, then this idesc does not match. Keep track of which
6354 idesc matched the most operands before failing. If we have two
6355 idescs that failed at the same position, and one had an out-of-range
6356 operand, then prefer the out-of-range operand. Thus if we have
6357 "add r0=0x1000000,r1" we get an error saying the constant is out
6358 of range instead of an error saying that the constant should have been
6361 if (i != num_operands || out_of_range_pos >= 0)
6363 if (i > highest_unmatched_operand
6364 || (i == highest_unmatched_operand
6365 && out_of_range_pos > curr_out_of_range_pos))
6367 highest_unmatched_operand = i;
6368 if (out_of_range_pos >= 0)
6370 expected_operand = idesc->operands[out_of_range_pos];
6371 error_pos = out_of_range_pos;
6375 expected_operand = idesc->operands[i];
6378 curr_out_of_range_pos = out_of_range_pos;
6387 if (expected_operand)
6388 as_bad ("Operand %u of `%s' should be %s",
6389 error_pos + 1, mnemonic,
6390 elf64_ia64_operands[expected_operand].desc);
6391 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 1))
6392 as_bad ("Wrong number of output operands");
6393 else if (highest_unmatched_operand < 0 && !(highest_unmatched_operand & 2))
6394 as_bad ("Wrong number of input operands");
6396 as_bad ("Operand mismatch");
6400 /* Check that the instruction doesn't use
6401 - r0, f0, or f1 as output operands
6402 - the same predicate twice as output operands
6403 - r0 as address of a base update load or store
6404 - the same GR as output and address of a base update load
6405 - two even- or two odd-numbered FRs as output operands of a floating
6406 point parallel load.
6407 At most two (conflicting) output (or output-like) operands can exist,
6408 (floating point parallel loads have three outputs, but the base register,
6409 if updated, cannot conflict with the actual outputs). */
6411 for (i = 0; i < num_operands; ++i)
6416 switch (idesc->operands[i])
6421 if (i < num_outputs)
6423 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6426 reg1 = CURR_SLOT.opnd[i].X_add_number;
6428 reg2 = CURR_SLOT.opnd[i].X_add_number;
6433 if (i < num_outputs)
6436 reg1 = CURR_SLOT.opnd[i].X_add_number;
6438 reg2 = CURR_SLOT.opnd[i].X_add_number;
6445 if (i < num_outputs)
6447 if (CURR_SLOT.opnd[i].X_add_number >= REG_FR
6448 && CURR_SLOT.opnd[i].X_add_number <= REG_FR + 1)
6451 regno = CURR_SLOT.opnd[i].X_add_number - REG_FR;
6454 reg1 = CURR_SLOT.opnd[i].X_add_number;
6456 reg2 = CURR_SLOT.opnd[i].X_add_number;
6460 if (idesc->flags & IA64_OPCODE_POSTINC)
6462 if (CURR_SLOT.opnd[i].X_add_number == REG_GR)
6465 reg1 = CURR_SLOT.opnd[i].X_add_number;
6467 reg2 = CURR_SLOT.opnd[i].X_add_number;
6478 as_warn ("Invalid use of `%c%d' as output operand", reg_class, regno);
6481 as_warn ("Invalid use of `r%d' as base update address operand", regno);
6487 if (reg1 >= REG_GR && reg1 <= REG_GR + 127)
6492 else if (reg1 >= REG_P && reg1 <= REG_P + 63)
6497 else if (reg1 >= REG_FR && reg1 <= REG_FR + 127)
6505 as_warn ("Invalid duplicate use of `%c%d'", reg_class, reg1);
6507 else if (((reg1 >= REG_FR && reg1 <= REG_FR + 31
6508 && reg2 >= REG_FR && reg2 <= REG_FR + 31)
6509 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6510 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127))
6511 && ! ((reg1 ^ reg2) & 1))
6512 as_warn ("Invalid simultaneous use of `f%d' and `f%d'",
6513 reg1 - REG_FR, reg2 - REG_FR);
6514 else if ((reg1 >= REG_FR && reg1 <= REG_FR + 31
6515 && reg2 >= REG_FR + 32 && reg2 <= REG_FR + 127)
6516 || (reg1 >= REG_FR + 32 && reg1 <= REG_FR + 127
6517 && reg2 >= REG_FR && reg2 <= REG_FR + 31))
6518 as_warn ("Dangerous simultaneous use of `f%d' and `f%d'",
6519 reg1 - REG_FR, reg2 - REG_FR);
6524 build_insn (slot, insnp)
6528 const struct ia64_operand *odesc, *o2desc;
6529 struct ia64_opcode *idesc = slot->idesc;
6535 insn = idesc->opcode | slot->qp_regno;
6537 for (i = 0; i < NELEMS (idesc->operands) && idesc->operands[i]; ++i)
6539 if (slot->opnd[i].X_op == O_register
6540 || slot->opnd[i].X_op == O_constant
6541 || slot->opnd[i].X_op == O_index)
6542 val = slot->opnd[i].X_add_number;
6543 else if (slot->opnd[i].X_op == O_big)
6545 /* This must be the value 0x10000000000000000. */
6546 assert (idesc->operands[i] == IA64_OPND_IMM8M1U8);
6552 switch (idesc->operands[i])
6554 case IA64_OPND_IMMU64:
6555 *insnp++ = (val >> 22) & 0x1ffffffffffLL;
6556 insn |= (((val & 0x7f) << 13) | (((val >> 7) & 0x1ff) << 27)
6557 | (((val >> 16) & 0x1f) << 22) | (((val >> 21) & 0x1) << 21)
6558 | (((val >> 63) & 0x1) << 36));
6561 case IA64_OPND_IMMU62:
6562 val &= 0x3fffffffffffffffULL;
6563 if (val != slot->opnd[i].X_add_number)
6564 as_warn (_("Value truncated to 62 bits"));
6565 *insnp++ = (val >> 21) & 0x1ffffffffffLL;
6566 insn |= (((val & 0xfffff) << 6) | (((val >> 20) & 0x1) << 36));
6569 case IA64_OPND_TGT64:
6571 *insnp++ = ((val >> 20) & 0x7fffffffffLL) << 2;
6572 insn |= ((((val >> 59) & 0x1) << 36)
6573 | (((val >> 0) & 0xfffff) << 13));
6604 case IA64_OPND_R3_2:
6605 case IA64_OPND_CPUID_R3:
6606 case IA64_OPND_DBR_R3:
6607 case IA64_OPND_DTR_R3:
6608 case IA64_OPND_ITR_R3:
6609 case IA64_OPND_IBR_R3:
6611 case IA64_OPND_MSR_R3:
6612 case IA64_OPND_PKR_R3:
6613 case IA64_OPND_PMC_R3:
6614 case IA64_OPND_PMD_R3:
6615 case IA64_OPND_RR_R3:
6623 odesc = elf64_ia64_operands + idesc->operands[i];
6624 err = (*odesc->insert) (odesc, val, &insn);
6626 as_bad_where (slot->src_file, slot->src_line,
6627 "Bad operand value: %s", err);
6628 if (idesc->flags & IA64_OPCODE_PSEUDO)
6630 if ((idesc->flags & IA64_OPCODE_F2_EQ_F3)
6631 && odesc == elf64_ia64_operands + IA64_OPND_F3)
6633 o2desc = elf64_ia64_operands + IA64_OPND_F2;
6634 (*o2desc->insert) (o2desc, val, &insn);
6636 if ((idesc->flags & IA64_OPCODE_LEN_EQ_64MCNT)
6637 && (odesc == elf64_ia64_operands + IA64_OPND_CPOS6a
6638 || odesc == elf64_ia64_operands + IA64_OPND_POS6))
6640 o2desc = elf64_ia64_operands + IA64_OPND_LEN6;
6641 (*o2desc->insert) (o2desc, 64 - val, &insn);
6651 int manual_bundling_off = 0, manual_bundling = 0;
6652 enum ia64_unit required_unit, insn_unit = 0;
6653 enum ia64_insn_type type[3], insn_type;
6654 unsigned int template, orig_template;
6655 bfd_vma insn[3] = { -1, -1, -1 };
6656 struct ia64_opcode *idesc;
6657 int end_of_insn_group = 0, user_template = -1;
6658 int n, i, j, first, curr, last_slot;
6659 bfd_vma t0 = 0, t1 = 0;
6660 struct label_fix *lfix;
6661 bfd_boolean mark_label;
6662 struct insn_fix *ifix;
6668 first = (md.curr_slot + NUM_SLOTS - md.num_slots_in_use) % NUM_SLOTS;
6669 know (first >= 0 & first < NUM_SLOTS);
6670 n = MIN (3, md.num_slots_in_use);
6672 /* Determine template: user user_template if specified, best match
6675 if (md.slot[first].user_template >= 0)
6676 user_template = template = md.slot[first].user_template;
6679 /* Auto select appropriate template. */
6680 memset (type, 0, sizeof (type));
6682 for (i = 0; i < n; ++i)
6684 if (md.slot[curr].label_fixups && i != 0)
6686 type[i] = md.slot[curr].idesc->type;
6687 curr = (curr + 1) % NUM_SLOTS;
6689 template = best_template[type[0]][type[1]][type[2]];
6692 /* initialize instructions with appropriate nops: */
6693 for (i = 0; i < 3; ++i)
6694 insn[i] = nop[ia64_templ_desc[template].exec_unit[i]];
6698 /* Check to see if this bundle is at an offset that is a multiple of 16-bytes
6699 from the start of the frag. */
6700 addr_mod = frag_now_fix () & 15;
6701 if (frag_now->has_code && frag_now->insn_addr != addr_mod)
6702 as_bad (_("instruction address is not a multiple of 16"));
6703 frag_now->insn_addr = addr_mod;
6704 frag_now->has_code = 1;
6706 /* now fill in slots with as many insns as possible: */
6708 idesc = md.slot[curr].idesc;
6709 end_of_insn_group = 0;
6711 for (i = 0; i < 3 && md.num_slots_in_use > 0; ++i)
6713 /* If we have unwind records, we may need to update some now. */
6714 unw_rec_list *ptr = md.slot[curr].unwind_record;
6715 unw_rec_list *end_ptr = NULL;
6719 /* Find the last prologue/body record in the list for the current
6720 insn, and set the slot number for all records up to that point.
6721 This needs to be done now, because prologue/body records refer to
6722 the current point, not the point after the instruction has been
6723 issued. This matters because there may have been nops emitted
6724 meanwhile. Any non-prologue non-body record followed by a
6725 prologue/body record must also refer to the current point. */
6726 unw_rec_list *last_ptr;
6728 for (j = 1; end_ptr == NULL && j < md.num_slots_in_use; ++j)
6729 end_ptr = md.slot[(curr + j) % NUM_SLOTS].unwind_record;
6730 for (last_ptr = NULL; ptr != end_ptr; ptr = ptr->next)
6731 if (ptr->r.type == prologue || ptr->r.type == prologue_gr
6732 || ptr->r.type == body)
6736 /* Make last_ptr point one after the last prologue/body
6738 last_ptr = last_ptr->next;
6739 for (ptr = md.slot[curr].unwind_record; ptr != last_ptr;
6742 ptr->slot_number = (unsigned long) f + i;
6743 ptr->slot_frag = frag_now;
6745 /* Remove the initialized records, so that we won't accidentally
6746 update them again if we insert a nop and continue. */
6747 md.slot[curr].unwind_record = last_ptr;
6751 manual_bundling_off = md.slot[curr].manual_bundling_off;
6752 if (md.slot[curr].manual_bundling_on)
6755 manual_bundling = 1;
6757 break; /* Need to start a new bundle. */
6760 /* If this instruction specifies a template, then it must be the first
6761 instruction of a bundle. */
6762 if (curr != first && md.slot[curr].user_template >= 0)
6765 if (idesc->flags & IA64_OPCODE_SLOT2)
6767 if (manual_bundling && !manual_bundling_off)
6769 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6770 "`%s' must be last in bundle", idesc->name);
6772 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6776 if (idesc->flags & IA64_OPCODE_LAST)
6779 unsigned int required_template;
6781 /* If we need a stop bit after an M slot, our only choice is
6782 template 5 (M;;MI). If we need a stop bit after a B
6783 slot, our only choice is to place it at the end of the
6784 bundle, because the only available templates are MIB,
6785 MBB, BBB, MMB, and MFB. We don't handle anything other
6786 than M and B slots because these are the only kind of
6787 instructions that can have the IA64_OPCODE_LAST bit set. */
6788 required_template = template;
6789 switch (idesc->type)
6793 required_template = 5;
6801 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6802 "Internal error: don't know how to force %s to end"
6803 "of instruction group", idesc->name);
6808 && (i > required_slot
6809 || (required_slot == 2 && !manual_bundling_off)
6810 || (user_template >= 0
6811 /* Changing from MMI to M;MI is OK. */
6812 && (template ^ required_template) > 1)))
6814 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6815 "`%s' must be last in instruction group",
6817 if (i < 2 && required_slot == 2 && !manual_bundling_off)
6818 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6820 if (required_slot < i)
6821 /* Can't fit this instruction. */
6825 if (required_template != template)
6827 /* If we switch the template, we need to reset the NOPs
6828 after slot i. The slot-types of the instructions ahead
6829 of i never change, so we don't need to worry about
6830 changing NOPs in front of this slot. */
6831 for (j = i; j < 3; ++j)
6832 insn[j] = nop[ia64_templ_desc[required_template].exec_unit[j]];
6834 template = required_template;
6836 if (curr != first && md.slot[curr].label_fixups)
6838 if (manual_bundling)
6840 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
6841 "Label must be first in a bundle");
6842 manual_bundling = -1; /* Suppress meaningless post-loop errors. */
6844 /* This insn must go into the first slot of a bundle. */
6848 if (end_of_insn_group && md.num_slots_in_use >= 1)
6850 /* We need an instruction group boundary in the middle of a
6851 bundle. See if we can switch to an other template with
6852 an appropriate boundary. */
6854 orig_template = template;
6855 if (i == 1 && (user_template == 4
6856 || (user_template < 0
6857 && (ia64_templ_desc[template].exec_unit[0]
6861 end_of_insn_group = 0;
6863 else if (i == 2 && (user_template == 0
6864 || (user_template < 0
6865 && (ia64_templ_desc[template].exec_unit[1]
6867 /* This test makes sure we don't switch the template if
6868 the next instruction is one that needs to be first in
6869 an instruction group. Since all those instructions are
6870 in the M group, there is no way such an instruction can
6871 fit in this bundle even if we switch the template. The
6872 reason we have to check for this is that otherwise we
6873 may end up generating "MI;;I M.." which has the deadly
6874 effect that the second M instruction is no longer the
6875 first in the group! --davidm 99/12/16 */
6876 && (idesc->flags & IA64_OPCODE_FIRST) == 0)
6879 end_of_insn_group = 0;
6882 && user_template == 0
6883 && !(idesc->flags & IA64_OPCODE_FIRST))
6884 /* Use the next slot. */
6886 else if (curr != first)
6887 /* can't fit this insn */
6890 if (template != orig_template)
6891 /* if we switch the template, we need to reset the NOPs
6892 after slot i. The slot-types of the instructions ahead
6893 of i never change, so we don't need to worry about
6894 changing NOPs in front of this slot. */
6895 for (j = i; j < 3; ++j)
6896 insn[j] = nop[ia64_templ_desc[template].exec_unit[j]];
6898 required_unit = ia64_templ_desc[template].exec_unit[i];
6900 /* resolve dynamic opcodes such as "break", "hint", and "nop": */
6901 if (idesc->type == IA64_TYPE_DYN)
6903 enum ia64_opnd opnd1, opnd2;
6905 if ((strcmp (idesc->name, "nop") == 0)
6906 || (strcmp (idesc->name, "break") == 0))
6907 insn_unit = required_unit;
6908 else if (strcmp (idesc->name, "hint") == 0)
6910 insn_unit = required_unit;
6911 if (required_unit == IA64_UNIT_B)
6917 case hint_b_warning:
6918 as_warn ("hint in B unit may be treated as nop");
6921 /* When manual bundling is off and there is no
6922 user template, we choose a different unit so
6923 that hint won't go into the current slot. We
6924 will fill the current bundle with nops and
6925 try to put hint into the next bundle. */
6926 if (!manual_bundling && user_template < 0)
6927 insn_unit = IA64_UNIT_I;
6929 as_bad ("hint in B unit can't be used");
6934 else if (strcmp (idesc->name, "chk.s") == 0
6935 || strcmp (idesc->name, "mov") == 0)
6937 insn_unit = IA64_UNIT_M;
6938 if (required_unit == IA64_UNIT_I
6939 || (required_unit == IA64_UNIT_F && template == 6))
6940 insn_unit = IA64_UNIT_I;
6943 as_fatal ("emit_one_bundle: unexpected dynamic op");
6945 sprintf (mnemonic, "%s.%c", idesc->name, "?imbfxx"[insn_unit]);
6946 opnd1 = idesc->operands[0];
6947 opnd2 = idesc->operands[1];
6948 ia64_free_opcode (idesc);
6949 idesc = ia64_find_opcode (mnemonic);
6950 /* moves to/from ARs have collisions */
6951 if (opnd1 == IA64_OPND_AR3 || opnd2 == IA64_OPND_AR3)
6953 while (idesc != NULL
6954 && (idesc->operands[0] != opnd1
6955 || idesc->operands[1] != opnd2))
6956 idesc = get_next_opcode (idesc);
6958 md.slot[curr].idesc = idesc;
6962 insn_type = idesc->type;
6963 insn_unit = IA64_UNIT_NIL;
6967 if (required_unit == IA64_UNIT_I || required_unit == IA64_UNIT_M)
6968 insn_unit = required_unit;
6970 case IA64_TYPE_X: insn_unit = IA64_UNIT_L; break;
6971 case IA64_TYPE_I: insn_unit = IA64_UNIT_I; break;
6972 case IA64_TYPE_M: insn_unit = IA64_UNIT_M; break;
6973 case IA64_TYPE_B: insn_unit = IA64_UNIT_B; break;
6974 case IA64_TYPE_F: insn_unit = IA64_UNIT_F; break;
6979 if (insn_unit != required_unit)
6980 continue; /* Try next slot. */
6982 /* Now is a good time to fix up the labels for this insn. */
6984 for (lfix = md.slot[curr].label_fixups; lfix; lfix = lfix->next)
6986 S_SET_VALUE (lfix->sym, frag_now_fix () - 16);
6987 symbol_set_frag (lfix->sym, frag_now);
6988 mark_label |= lfix->dw2_mark_labels;
6990 for (lfix = md.slot[curr].tag_fixups; lfix; lfix = lfix->next)
6992 S_SET_VALUE (lfix->sym, frag_now_fix () - 16 + i);
6993 symbol_set_frag (lfix->sym, frag_now);
6996 if (debug_type == DEBUG_DWARF2
6997 || md.slot[curr].loc_directive_seen
7000 bfd_vma addr = frag_now->fr_address + frag_now_fix () - 16 + i;
7002 md.slot[curr].loc_directive_seen = 0;
7004 md.slot[curr].debug_line.flags |= DWARF2_FLAG_BASIC_BLOCK;
7006 dwarf2_gen_line_info (addr, &md.slot[curr].debug_line);
7009 build_insn (md.slot + curr, insn + i);
7011 ptr = md.slot[curr].unwind_record;
7014 /* Set slot numbers for all remaining unwind records belonging to the
7015 current insn. There can not be any prologue/body unwind records
7017 for (; ptr != end_ptr; ptr = ptr->next)
7019 ptr->slot_number = (unsigned long) f + i;
7020 ptr->slot_frag = frag_now;
7022 md.slot[curr].unwind_record = NULL;
7025 if (required_unit == IA64_UNIT_L)
7028 /* skip one slot for long/X-unit instructions */
7031 --md.num_slots_in_use;
7034 for (j = 0; j < md.slot[curr].num_fixups; ++j)
7036 ifix = md.slot[curr].fixup + j;
7037 fix = fix_new_exp (frag_now, frag_now_fix () - 16 + i, 8,
7038 &ifix->expr, ifix->is_pcrel, ifix->code);
7039 fix->tc_fix_data.opnd = ifix->opnd;
7040 fix->fx_plt = (fix->fx_r_type == BFD_RELOC_IA64_PLTOFF22);
7041 fix->fx_file = md.slot[curr].src_file;
7042 fix->fx_line = md.slot[curr].src_line;
7045 end_of_insn_group = md.slot[curr].end_of_insn_group;
7048 ia64_free_opcode (md.slot[curr].idesc);
7049 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7050 md.slot[curr].user_template = -1;
7052 if (manual_bundling_off)
7054 manual_bundling = 0;
7057 curr = (curr + 1) % NUM_SLOTS;
7058 idesc = md.slot[curr].idesc;
7060 if (manual_bundling > 0)
7062 if (md.num_slots_in_use > 0)
7065 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7066 "`%s' does not fit into bundle", idesc->name);
7067 else if (last_slot < 0)
7069 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7070 "`%s' does not fit into %s template",
7071 idesc->name, ia64_templ_desc[template].name);
7072 /* Drop first insn so we don't livelock. */
7073 --md.num_slots_in_use;
7074 know (curr == first);
7075 ia64_free_opcode (md.slot[curr].idesc);
7076 memset (md.slot + curr, 0, sizeof (md.slot[curr]));
7077 md.slot[curr].user_template = -1;
7085 else if (last_slot == 0)
7086 where = "slots 2 or 3";
7089 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7090 "`%s' can't go in %s of %s template",
7091 idesc->name, where, ia64_templ_desc[template].name);
7095 as_bad_where (md.slot[curr].src_file, md.slot[curr].src_line,
7096 "Missing '}' at end of file");
7098 know (md.num_slots_in_use < NUM_SLOTS);
7100 t0 = end_of_insn_group | (template << 1) | (insn[0] << 5) | (insn[1] << 46);
7101 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
7103 number_to_chars_littleendian (f + 0, t0, 8);
7104 number_to_chars_littleendian (f + 8, t1, 8);
7108 md_parse_option (c, arg)
7115 /* Switches from the Intel assembler. */
7117 if (strcmp (arg, "ilp64") == 0
7118 || strcmp (arg, "lp64") == 0
7119 || strcmp (arg, "p64") == 0)
7121 md.flags |= EF_IA_64_ABI64;
7123 else if (strcmp (arg, "ilp32") == 0)
7125 md.flags &= ~EF_IA_64_ABI64;
7127 else if (strcmp (arg, "le") == 0)
7129 md.flags &= ~EF_IA_64_BE;
7130 default_big_endian = 0;
7132 else if (strcmp (arg, "be") == 0)
7134 md.flags |= EF_IA_64_BE;
7135 default_big_endian = 1;
7137 else if (strncmp (arg, "unwind-check=", 13) == 0)
7140 if (strcmp (arg, "warning") == 0)
7141 md.unwind_check = unwind_check_warning;
7142 else if (strcmp (arg, "error") == 0)
7143 md.unwind_check = unwind_check_error;
7147 else if (strncmp (arg, "hint.b=", 7) == 0)
7150 if (strcmp (arg, "ok") == 0)
7151 md.hint_b = hint_b_ok;
7152 else if (strcmp (arg, "warning") == 0)
7153 md.hint_b = hint_b_warning;
7154 else if (strcmp (arg, "error") == 0)
7155 md.hint_b = hint_b_error;
7159 else if (strncmp (arg, "tune=", 5) == 0)
7162 if (strcmp (arg, "itanium1") == 0)
7164 else if (strcmp (arg, "itanium2") == 0)
7174 if (strcmp (arg, "so") == 0)
7176 /* Suppress signon message. */
7178 else if (strcmp (arg, "pi") == 0)
7180 /* Reject privileged instructions. FIXME */
7182 else if (strcmp (arg, "us") == 0)
7184 /* Allow union of signed and unsigned range. FIXME */
7186 else if (strcmp (arg, "close_fcalls") == 0)
7188 /* Do not resolve global function calls. */
7195 /* temp[="prefix"] Insert temporary labels into the object file
7196 symbol table prefixed by "prefix".
7197 Default prefix is ":temp:".
7202 /* indirect=<tgt> Assume unannotated indirect branches behavior
7203 according to <tgt> --
7204 exit: branch out from the current context (default)
7205 labels: all labels in context may be branch targets
7207 if (strncmp (arg, "indirect=", 9) != 0)
7212 /* -X conflicts with an ignored option, use -x instead */
7214 if (!arg || strcmp (arg, "explicit") == 0)
7216 /* set default mode to explicit */
7217 md.default_explicit_mode = 1;
7220 else if (strcmp (arg, "auto") == 0)
7222 md.default_explicit_mode = 0;
7224 else if (strcmp (arg, "none") == 0)
7228 else if (strcmp (arg, "debug") == 0)
7232 else if (strcmp (arg, "debugx") == 0)
7234 md.default_explicit_mode = 1;
7237 else if (strcmp (arg, "debugn") == 0)
7244 as_bad (_("Unrecognized option '-x%s'"), arg);
7249 /* nops Print nops statistics. */
7252 /* GNU specific switches for gcc. */
7253 case OPTION_MCONSTANT_GP:
7254 md.flags |= EF_IA_64_CONS_GP;
7257 case OPTION_MAUTO_PIC:
7258 md.flags |= EF_IA_64_NOFUNCDESC_CONS_GP;
7269 md_show_usage (stream)
7274 --mconstant-gp mark output file as using the constant-GP model\n\
7275 (sets ELF header flag EF_IA_64_CONS_GP)\n\
7276 --mauto-pic mark output file as using the constant-GP model\n\
7277 without function descriptors (sets ELF header flag\n\
7278 EF_IA_64_NOFUNCDESC_CONS_GP)\n\
7279 -milp32|-milp64|-mlp64|-mp64 select data model (default -mlp64)\n\
7280 -mle | -mbe select little- or big-endian byte order (default -mle)\n\
7281 -mtune=[itanium1|itanium2]\n\
7282 tune for a specific CPU (default -mtune=itanium2)\n\
7283 -munwind-check=[warning|error]\n\
7284 unwind directive check (default -munwind-check=warning)\n\
7285 -mhint.b=[ok|warning|error]\n\
7286 hint.b check (default -mhint.b=error)\n\
7287 -x | -xexplicit turn on dependency violation checking\n\
7288 -xauto automagically remove dependency violations (default)\n\
7289 -xnone turn off dependency violation checking\n\
7290 -xdebug debug dependency violation checker\n\
7291 -xdebugn debug dependency violation checker but turn off\n\
7292 dependency violation checking\n\
7293 -xdebugx debug dependency violation checker and turn on\n\
7294 dependency violation checking\n"),
7299 ia64_after_parse_args ()
7301 if (debug_type == DEBUG_STABS)
7302 as_fatal (_("--gstabs is not supported for ia64"));
7305 /* Return true if TYPE fits in TEMPL at SLOT. */
7308 match (int templ, int type, int slot)
7310 enum ia64_unit unit;
7313 unit = ia64_templ_desc[templ].exec_unit[slot];
7316 case IA64_TYPE_DYN: result = 1; break; /* for nop and break */
7318 result = (unit == IA64_UNIT_I || unit == IA64_UNIT_M);
7320 case IA64_TYPE_X: result = (unit == IA64_UNIT_L); break;
7321 case IA64_TYPE_I: result = (unit == IA64_UNIT_I); break;
7322 case IA64_TYPE_M: result = (unit == IA64_UNIT_M); break;
7323 case IA64_TYPE_B: result = (unit == IA64_UNIT_B); break;
7324 case IA64_TYPE_F: result = (unit == IA64_UNIT_F); break;
7325 default: result = 0; break;
7330 /* For Itanium 1, add a bit of extra goodness if a nop of type F or B would fit
7331 in TEMPL at SLOT. For Itanium 2, add a bit of extra goodness if a nop of
7332 type M or I would fit in TEMPL at SLOT. */
7335 extra_goodness (int templ, int slot)
7340 if (slot == 1 && match (templ, IA64_TYPE_F, slot))
7342 else if (slot == 2 && match (templ, IA64_TYPE_B, slot))
7348 if (match (templ, IA64_TYPE_M, slot)
7349 || match (templ, IA64_TYPE_I, slot))
7350 /* Favor M- and I-unit NOPs. We definitely want to avoid
7351 F-unit and B-unit may cause split-issue or less-than-optimal
7352 branch-prediction. */
7363 /* This function is called once, at assembler startup time. It sets
7364 up all the tables, etc. that the MD part of the assembler will need
7365 that can be determined before arguments are parsed. */
7369 int i, j, k, t, goodness, best, regnum, ok;
7374 md.explicit_mode = md.default_explicit_mode;
7376 bfd_set_section_alignment (stdoutput, text_section, 4);
7378 /* Make sure function pointers get initialized. */
7379 target_big_endian = -1;
7380 dot_byteorder (default_big_endian);
7382 alias_hash = hash_new ();
7383 alias_name_hash = hash_new ();
7384 secalias_hash = hash_new ();
7385 secalias_name_hash = hash_new ();
7387 pseudo_func[FUNC_DTP_MODULE].u.sym =
7388 symbol_new (".<dtpmod>", undefined_section, FUNC_DTP_MODULE,
7389 &zero_address_frag);
7391 pseudo_func[FUNC_DTP_RELATIVE].u.sym =
7392 symbol_new (".<dtprel>", undefined_section, FUNC_DTP_RELATIVE,
7393 &zero_address_frag);
7395 pseudo_func[FUNC_FPTR_RELATIVE].u.sym =
7396 symbol_new (".<fptr>", undefined_section, FUNC_FPTR_RELATIVE,
7397 &zero_address_frag);
7399 pseudo_func[FUNC_GP_RELATIVE].u.sym =
7400 symbol_new (".<gprel>", undefined_section, FUNC_GP_RELATIVE,
7401 &zero_address_frag);
7403 pseudo_func[FUNC_LT_RELATIVE].u.sym =
7404 symbol_new (".<ltoff>", undefined_section, FUNC_LT_RELATIVE,
7405 &zero_address_frag);
7407 pseudo_func[FUNC_LT_RELATIVE_X].u.sym =
7408 symbol_new (".<ltoffx>", undefined_section, FUNC_LT_RELATIVE_X,
7409 &zero_address_frag);
7411 pseudo_func[FUNC_PC_RELATIVE].u.sym =
7412 symbol_new (".<pcrel>", undefined_section, FUNC_PC_RELATIVE,
7413 &zero_address_frag);
7415 pseudo_func[FUNC_PLT_RELATIVE].u.sym =
7416 symbol_new (".<pltoff>", undefined_section, FUNC_PLT_RELATIVE,
7417 &zero_address_frag);
7419 pseudo_func[FUNC_SEC_RELATIVE].u.sym =
7420 symbol_new (".<secrel>", undefined_section, FUNC_SEC_RELATIVE,
7421 &zero_address_frag);
7423 pseudo_func[FUNC_SEG_RELATIVE].u.sym =
7424 symbol_new (".<segrel>", undefined_section, FUNC_SEG_RELATIVE,
7425 &zero_address_frag);
7427 pseudo_func[FUNC_TP_RELATIVE].u.sym =
7428 symbol_new (".<tprel>", undefined_section, FUNC_TP_RELATIVE,
7429 &zero_address_frag);
7431 pseudo_func[FUNC_LTV_RELATIVE].u.sym =
7432 symbol_new (".<ltv>", undefined_section, FUNC_LTV_RELATIVE,
7433 &zero_address_frag);
7435 pseudo_func[FUNC_LT_FPTR_RELATIVE].u.sym =
7436 symbol_new (".<ltoff.fptr>", undefined_section, FUNC_LT_FPTR_RELATIVE,
7437 &zero_address_frag);
7439 pseudo_func[FUNC_LT_DTP_MODULE].u.sym =
7440 symbol_new (".<ltoff.dtpmod>", undefined_section, FUNC_LT_DTP_MODULE,
7441 &zero_address_frag);
7443 pseudo_func[FUNC_LT_DTP_RELATIVE].u.sym =
7444 symbol_new (".<ltoff.dptrel>", undefined_section, FUNC_LT_DTP_RELATIVE,
7445 &zero_address_frag);
7447 pseudo_func[FUNC_LT_TP_RELATIVE].u.sym =
7448 symbol_new (".<ltoff.tprel>", undefined_section, FUNC_LT_TP_RELATIVE,
7449 &zero_address_frag);
7451 pseudo_func[FUNC_IPLT_RELOC].u.sym =
7452 symbol_new (".<iplt>", undefined_section, FUNC_IPLT_RELOC,
7453 &zero_address_frag);
7455 if (md.tune != itanium1)
7457 /* Convert MFI NOPs bundles into MMI NOPs bundles. */
7459 le_nop_stop[0] = 0x9;
7462 /* Compute the table of best templates. We compute goodness as a
7463 base 4 value, in which each match counts for 3. Match-failures
7464 result in NOPs and we use extra_goodness() to pick the execution
7465 units that are best suited for issuing the NOP. */
7466 for (i = 0; i < IA64_NUM_TYPES; ++i)
7467 for (j = 0; j < IA64_NUM_TYPES; ++j)
7468 for (k = 0; k < IA64_NUM_TYPES; ++k)
7471 for (t = 0; t < NELEMS (ia64_templ_desc); ++t)
7474 if (match (t, i, 0))
7476 if (match (t, j, 1))
7478 if ((t == 2 && j == IA64_TYPE_X) || match (t, k, 2))
7479 goodness = 3 + 3 + 3;
7481 goodness = 3 + 3 + extra_goodness (t, 2);
7483 else if (match (t, j, 2))
7484 goodness = 3 + 3 + extra_goodness (t, 1);
7488 goodness += extra_goodness (t, 1);
7489 goodness += extra_goodness (t, 2);
7492 else if (match (t, i, 1))
7494 if ((t == 2 && i == IA64_TYPE_X) || match (t, j, 2))
7497 goodness = 3 + extra_goodness (t, 2);
7499 else if (match (t, i, 2))
7500 goodness = 3 + extra_goodness (t, 1);
7502 if (goodness > best)
7505 best_template[i][j][k] = t;
7510 #ifdef DEBUG_TEMPLATES
7511 /* For debugging changes to the best_template calculations. We don't care
7512 about combinations with invalid instructions, so start the loops at 1. */
7513 for (i = 0; i < IA64_NUM_TYPES; ++i)
7514 for (j = 0; j < IA64_NUM_TYPES; ++j)
7515 for (k = 0; k < IA64_NUM_TYPES; ++k)
7517 char type_letter[IA64_NUM_TYPES] = { 'n', 'a', 'i', 'm', 'b', 'f',
7519 fprintf (stderr, "%c%c%c %s\n", type_letter[i], type_letter[j],
7521 ia64_templ_desc[best_template[i][j][k]].name);
7525 for (i = 0; i < NUM_SLOTS; ++i)
7526 md.slot[i].user_template = -1;
7528 md.pseudo_hash = hash_new ();
7529 for (i = 0; i < NELEMS (pseudo_opcode); ++i)
7531 err = hash_insert (md.pseudo_hash, pseudo_opcode[i].name,
7532 (void *) (pseudo_opcode + i));
7534 as_fatal ("ia64.md_begin: can't hash `%s': %s",
7535 pseudo_opcode[i].name, err);
7538 md.reg_hash = hash_new ();
7539 md.dynreg_hash = hash_new ();
7540 md.const_hash = hash_new ();
7541 md.entry_hash = hash_new ();
7543 /* general registers: */
7544 for (i = REG_GR; i < REG_GR + 128; ++i)
7546 sprintf (name, "r%d", i - REG_GR);
7547 md.regsym[i] = declare_register (name, i);
7550 /* floating point registers: */
7551 for (i = REG_FR; i < REG_FR + 128; ++i)
7553 sprintf (name, "f%d", i - REG_FR);
7554 md.regsym[i] = declare_register (name, i);
7557 /* application registers: */
7558 for (i = REG_AR; i < REG_AR + 128; ++i)
7560 sprintf (name, "ar%d", i - REG_AR);
7561 md.regsym[i] = declare_register (name, i);
7564 /* control registers: */
7565 for (i = REG_CR; i < REG_CR + 128; ++i)
7567 sprintf (name, "cr%d", i - REG_CR);
7568 md.regsym[i] = declare_register (name, i);
7571 /* predicate registers: */
7572 for (i = REG_P; i < REG_P + 64; ++i)
7574 sprintf (name, "p%d", i - REG_P);
7575 md.regsym[i] = declare_register (name, i);
7578 /* branch registers: */
7579 for (i = REG_BR; i < REG_BR + 8; ++i)
7581 sprintf (name, "b%d", i - REG_BR);
7582 md.regsym[i] = declare_register (name, i);
7585 md.regsym[REG_IP] = declare_register ("ip", REG_IP);
7586 md.regsym[REG_CFM] = declare_register ("cfm", REG_CFM);
7587 md.regsym[REG_PR] = declare_register ("pr", REG_PR);
7588 md.regsym[REG_PR_ROT] = declare_register ("pr.rot", REG_PR_ROT);
7589 md.regsym[REG_PSR] = declare_register ("psr", REG_PSR);
7590 md.regsym[REG_PSR_L] = declare_register ("psr.l", REG_PSR_L);
7591 md.regsym[REG_PSR_UM] = declare_register ("psr.um", REG_PSR_UM);
7593 for (i = 0; i < NELEMS (indirect_reg); ++i)
7595 regnum = indirect_reg[i].regnum;
7596 md.regsym[regnum] = declare_register (indirect_reg[i].name, regnum);
7599 /* define synonyms for application registers: */
7600 for (i = 0; i < NELEMS (ar); ++i)
7601 declare_register (ar[i].name, REG_AR + ar[i].regnum);
7603 /* define synonyms for control registers: */
7604 for (i = 0; i < NELEMS (cr); ++i)
7605 declare_register (cr[i].name, REG_CR + cr[i].regnum);
7607 declare_register ("gp", REG_GR + 1);
7608 declare_register ("sp", REG_GR + 12);
7609 declare_register ("tp", REG_GR + 13);
7610 declare_register ("rp", REG_BR + 0);
7612 /* pseudo-registers used to specify unwind info: */
7613 declare_register ("psp", REG_PSP);
7615 declare_register_set ("ret", 4, REG_GR + 8);
7616 declare_register_set ("farg", 8, REG_FR + 8);
7617 declare_register_set ("fret", 8, REG_FR + 8);
7619 for (i = 0; i < NELEMS (const_bits); ++i)
7621 err = hash_insert (md.const_hash, const_bits[i].name,
7622 (PTR) (const_bits + i));
7624 as_fatal ("Inserting \"%s\" into constant hash table failed: %s",
7628 /* Set the architecture and machine depending on defaults and command line
7630 if (md.flags & EF_IA_64_ABI64)
7631 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf64);
7633 ok = bfd_set_arch_mach (stdoutput, bfd_arch_ia64, bfd_mach_ia64_elf32);
7636 as_warn (_("Could not set architecture and machine"));
7638 /* Set the pointer size and pointer shift size depending on md.flags */
7640 if (md.flags & EF_IA_64_ABI64)
7642 md.pointer_size = 8; /* pointers are 8 bytes */
7643 md.pointer_size_shift = 3; /* alignment is 8 bytes = 2^2 */
7647 md.pointer_size = 4; /* pointers are 4 bytes */
7648 md.pointer_size_shift = 2; /* alignment is 4 bytes = 2^2 */
7651 md.mem_offset.hint = 0;
7654 md.entry_labels = NULL;
7657 /* Set the default options in md. Cannot do this in md_begin because
7658 that is called after md_parse_option which is where we set the
7659 options in md based on command line options. */
7662 ia64_init (argc, argv)
7663 int argc ATTRIBUTE_UNUSED;
7664 char **argv ATTRIBUTE_UNUSED;
7666 md.flags = MD_FLAGS_DEFAULT;
7668 /* FIXME: We should change it to unwind_check_error someday. */
7669 md.unwind_check = unwind_check_warning;
7670 md.hint_b = hint_b_error;
7674 /* Return a string for the target object file format. */
7677 ia64_target_format ()
7679 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
7681 if (md.flags & EF_IA_64_BE)
7683 if (md.flags & EF_IA_64_ABI64)
7684 #if defined(TE_AIX50)
7685 return "elf64-ia64-aix-big";
7686 #elif defined(TE_HPUX)
7687 return "elf64-ia64-hpux-big";
7689 return "elf64-ia64-big";
7692 #if defined(TE_AIX50)
7693 return "elf32-ia64-aix-big";
7694 #elif defined(TE_HPUX)
7695 return "elf32-ia64-hpux-big";
7697 return "elf32-ia64-big";
7702 if (md.flags & EF_IA_64_ABI64)
7704 return "elf64-ia64-aix-little";
7706 return "elf64-ia64-little";
7710 return "elf32-ia64-aix-little";
7712 return "elf32-ia64-little";
7717 return "unknown-format";
7721 ia64_end_of_source ()
7723 /* terminate insn group upon reaching end of file: */
7724 insn_group_break (1, 0, 0);
7726 /* emits slots we haven't written yet: */
7727 ia64_flush_insns ();
7729 bfd_set_private_flags (stdoutput, md.flags);
7731 md.mem_offset.hint = 0;
7740 /* Make sure we don't reference input_line_pointer[-1] when that's
7746 if (md.qp.X_op == O_register)
7747 as_bad ("qualifying predicate not followed by instruction");
7748 md.qp.X_op = O_absent;
7750 if (ignore_input ())
7753 if (input_line_pointer[0] == ';' && input_line_pointer[-1] == ';')
7755 if (md.detect_dv && !md.explicit_mode)
7762 as_warn (_("Explicit stops are ignored in auto mode"));
7766 insn_group_break (1, 0, 0);
7768 else if (input_line_pointer[-1] == '{')
7770 if (md.manual_bundling)
7771 as_warn ("Found '{' when manual bundling is already turned on");
7773 CURR_SLOT.manual_bundling_on = 1;
7774 md.manual_bundling = 1;
7776 /* Bundling is only acceptable in explicit mode
7777 or when in default automatic mode. */
7778 if (md.detect_dv && !md.explicit_mode)
7780 if (!md.mode_explicitly_set
7781 && !md.default_explicit_mode)
7784 as_warn (_("Found '{' after explicit switch to automatic mode"));
7787 else if (input_line_pointer[-1] == '}')
7789 if (!md.manual_bundling)
7790 as_warn ("Found '}' when manual bundling is off");
7792 PREV_SLOT.manual_bundling_off = 1;
7793 md.manual_bundling = 0;
7795 /* switch back to automatic mode, if applicable */
7798 && !md.mode_explicitly_set
7799 && !md.default_explicit_mode)
7804 /* This is a hook for ia64_frob_label, so that it can distinguish tags from
7806 static int defining_tag = 0;
7809 ia64_unrecognized_line (ch)
7815 expression_and_evaluate (&md.qp);
7816 if (*input_line_pointer++ != ')')
7818 as_bad ("Expected ')'");
7821 if (md.qp.X_op != O_register)
7823 as_bad ("Qualifying predicate expected");
7826 if (md.qp.X_add_number < REG_P || md.qp.X_add_number >= REG_P + 64)
7828 as_bad ("Predicate register expected");
7840 if (md.qp.X_op == O_register)
7842 as_bad ("Tag must come before qualifying predicate.");
7846 /* This implements just enough of read_a_source_file in read.c to
7847 recognize labels. */
7848 if (is_name_beginner (*input_line_pointer))
7850 s = input_line_pointer;
7851 c = get_symbol_end ();
7853 else if (LOCAL_LABELS_FB
7854 && ISDIGIT (*input_line_pointer))
7857 while (ISDIGIT (*input_line_pointer))
7858 temp = (temp * 10) + *input_line_pointer++ - '0';
7859 fb_label_instance_inc (temp);
7860 s = fb_label_name (temp, 0);
7861 c = *input_line_pointer;
7870 /* Put ':' back for error messages' sake. */
7871 *input_line_pointer++ = ':';
7872 as_bad ("Expected ':'");
7879 /* Put ':' back for error messages' sake. */
7880 *input_line_pointer++ = ':';
7881 if (*input_line_pointer++ != ']')
7883 as_bad ("Expected ']'");
7888 as_bad ("Tag name expected");
7898 /* Not a valid line. */
7903 ia64_frob_label (sym)
7906 struct label_fix *fix;
7908 /* Tags need special handling since they are not bundle breaks like
7912 fix = obstack_alloc (¬es, sizeof (*fix));
7914 fix->next = CURR_SLOT.tag_fixups;
7915 fix->dw2_mark_labels = FALSE;
7916 CURR_SLOT.tag_fixups = fix;
7921 if (bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7923 md.last_text_seg = now_seg;
7924 fix = obstack_alloc (¬es, sizeof (*fix));
7926 fix->next = CURR_SLOT.label_fixups;
7927 fix->dw2_mark_labels = dwarf2_loc_mark_labels;
7928 CURR_SLOT.label_fixups = fix;
7930 /* Keep track of how many code entry points we've seen. */
7931 if (md.path == md.maxpaths)
7934 md.entry_labels = (const char **)
7935 xrealloc ((void *) md.entry_labels,
7936 md.maxpaths * sizeof (char *));
7938 md.entry_labels[md.path++] = S_GET_NAME (sym);
7943 /* The HP-UX linker will give unresolved symbol errors for symbols
7944 that are declared but unused. This routine removes declared,
7945 unused symbols from an object. */
7947 ia64_frob_symbol (sym)
7950 if ((S_GET_SEGMENT (sym) == &bfd_und_section && ! symbol_used_p (sym) &&
7951 ELF_ST_VISIBILITY (S_GET_OTHER (sym)) == STV_DEFAULT)
7952 || (S_GET_SEGMENT (sym) == &bfd_abs_section
7953 && ! S_IS_EXTERNAL (sym)))
7960 ia64_flush_pending_output ()
7962 if (!md.keep_pending_output
7963 && bfd_get_section_flags (stdoutput, now_seg) & SEC_CODE)
7965 /* ??? This causes many unnecessary stop bits to be emitted.
7966 Unfortunately, it isn't clear if it is safe to remove this. */
7967 insn_group_break (1, 0, 0);
7968 ia64_flush_insns ();
7972 /* Do ia64-specific expression optimization. All that's done here is
7973 to transform index expressions that are either due to the indexing
7974 of rotating registers or due to the indexing of indirect register
7977 ia64_optimize_expr (l, op, r)
7986 if (l->X_op == O_register && r->X_op == O_constant)
7988 num_regs = (l->X_add_number >> 16);
7989 if ((unsigned) r->X_add_number >= num_regs)
7992 as_bad ("No current frame");
7994 as_bad ("Index out of range 0..%u", num_regs - 1);
7995 r->X_add_number = 0;
7997 l->X_add_number = (l->X_add_number & 0xffff) + r->X_add_number;
8000 else if (l->X_op == O_register && r->X_op == O_register)
8002 if (l->X_add_number < IND_CPUID || l->X_add_number > IND_RR
8003 || l->X_add_number == IND_MEM)
8005 as_bad ("Indirect register set name expected");
8006 l->X_add_number = IND_CPUID;
8009 l->X_op_symbol = md.regsym[l->X_add_number];
8010 l->X_add_number = r->X_add_number;
8018 ia64_parse_name (name, e, nextcharP)
8023 struct const_desc *cdesc;
8024 struct dynreg *dr = 0;
8031 enum pseudo_type pseudo_type = PSEUDO_FUNC_NONE;
8033 /* Find what relocation pseudo-function we're dealing with. */
8034 for (idx = 0; idx < NELEMS (pseudo_func); ++idx)
8035 if (pseudo_func[idx].name
8036 && pseudo_func[idx].name[0] == name[1]
8037 && strcmp (pseudo_func[idx].name + 1, name + 2) == 0)
8039 pseudo_type = pseudo_func[idx].type;
8042 switch (pseudo_type)
8044 case PSEUDO_FUNC_RELOC:
8045 end = input_line_pointer;
8046 if (*nextcharP != '(')
8048 as_bad ("Expected '('");
8052 ++input_line_pointer;
8054 if (*input_line_pointer != ')')
8056 as_bad ("Missing ')'");
8060 ++input_line_pointer;
8061 if (e->X_op != O_symbol)
8063 if (e->X_op != O_pseudo_fixup)
8065 as_bad ("Not a symbolic expression");
8068 if (idx != FUNC_LT_RELATIVE)
8070 as_bad ("Illegal combination of relocation functions");
8073 switch (S_GET_VALUE (e->X_op_symbol))
8075 case FUNC_FPTR_RELATIVE:
8076 idx = FUNC_LT_FPTR_RELATIVE; break;
8077 case FUNC_DTP_MODULE:
8078 idx = FUNC_LT_DTP_MODULE; break;
8079 case FUNC_DTP_RELATIVE:
8080 idx = FUNC_LT_DTP_RELATIVE; break;
8081 case FUNC_TP_RELATIVE:
8082 idx = FUNC_LT_TP_RELATIVE; break;
8084 as_bad ("Illegal combination of relocation functions");
8088 /* Make sure gas doesn't get rid of local symbols that are used
8090 e->X_op = O_pseudo_fixup;
8091 e->X_op_symbol = pseudo_func[idx].u.sym;
8093 *nextcharP = *input_line_pointer;
8096 case PSEUDO_FUNC_CONST:
8097 e->X_op = O_constant;
8098 e->X_add_number = pseudo_func[idx].u.ival;
8101 case PSEUDO_FUNC_REG:
8102 e->X_op = O_register;
8103 e->X_add_number = pseudo_func[idx].u.ival;
8112 /* first see if NAME is a known register name: */
8113 sym = hash_find (md.reg_hash, name);
8116 e->X_op = O_register;
8117 e->X_add_number = S_GET_VALUE (sym);
8121 cdesc = hash_find (md.const_hash, name);
8124 e->X_op = O_constant;
8125 e->X_add_number = cdesc->value;
8129 /* check for inN, locN, or outN: */
8134 if (name[1] == 'n' && ISDIGIT (name[2]))
8142 if (name[1] == 'o' && name[2] == 'c' && ISDIGIT (name[3]))
8150 if (name[1] == 'u' && name[2] == 't' && ISDIGIT (name[3]))
8161 /* Ignore register numbers with leading zeroes, except zero itself. */
8162 if (dr && (name[idx] != '0' || name[idx + 1] == '\0'))
8164 unsigned long regnum;
8166 /* The name is inN, locN, or outN; parse the register number. */
8167 regnum = strtoul (name + idx, &end, 10);
8168 if (end > name + idx && *end == '\0' && regnum < 96)
8170 if (regnum >= dr->num_regs)
8173 as_bad ("No current frame");
8175 as_bad ("Register number out of range 0..%u",
8179 e->X_op = O_register;
8180 e->X_add_number = dr->base + regnum;
8185 end = alloca (strlen (name) + 1);
8187 name = ia64_canonicalize_symbol_name (end);
8188 if ((dr = hash_find (md.dynreg_hash, name)))
8190 /* We've got ourselves the name of a rotating register set.
8191 Store the base register number in the low 16 bits of
8192 X_add_number and the size of the register set in the top 16
8194 e->X_op = O_register;
8195 e->X_add_number = dr->base | (dr->num_regs << 16);
8201 /* Remove the '#' suffix that indicates a symbol as opposed to a register. */
8204 ia64_canonicalize_symbol_name (name)
8207 size_t len = strlen (name), full = len;
8209 while (len > 0 && name[len - 1] == '#')
8214 as_bad ("Standalone `#' is illegal");
8216 else if (len < full - 1)
8217 as_warn ("Redundant `#' suffix operators");
8222 /* Return true if idesc is a conditional branch instruction. This excludes
8223 the modulo scheduled branches, and br.ia. Mod-sched branches are excluded
8224 because they always read/write resources regardless of the value of the
8225 qualifying predicate. br.ia must always use p0, and hence is always
8226 taken. Thus this function returns true for branches which can fall
8227 through, and which use no resources if they do fall through. */
8230 is_conditional_branch (idesc)
8231 struct ia64_opcode *idesc;
8233 /* br is a conditional branch. Everything that starts with br. except
8234 br.ia, br.c{loop,top,exit}, and br.w{top,exit} is a conditional branch.
8235 Everything that starts with brl is a conditional branch. */
8236 return (idesc->name[0] == 'b' && idesc->name[1] == 'r'
8237 && (idesc->name[2] == '\0'
8238 || (idesc->name[2] == '.' && idesc->name[3] != 'i'
8239 && idesc->name[3] != 'c' && idesc->name[3] != 'w')
8240 || idesc->name[2] == 'l'
8241 /* br.cond, br.call, br.clr */
8242 || (idesc->name[2] == '.' && idesc->name[3] == 'c'
8243 && (idesc->name[4] == 'a' || idesc->name[4] == 'o'
8244 || (idesc->name[4] == 'l' && idesc->name[5] == 'r')))));
8247 /* Return whether the given opcode is a taken branch. If there's any doubt,
8251 is_taken_branch (idesc)
8252 struct ia64_opcode *idesc;
8254 return ((is_conditional_branch (idesc) && CURR_SLOT.qp_regno == 0)
8255 || strncmp (idesc->name, "br.ia", 5) == 0);
8258 /* Return whether the given opcode is an interruption or rfi. If there's any
8259 doubt, returns zero. */
8262 is_interruption_or_rfi (idesc)
8263 struct ia64_opcode *idesc;
8265 if (strcmp (idesc->name, "rfi") == 0)
8270 /* Returns the index of the given dependency in the opcode's list of chks, or
8271 -1 if there is no dependency. */
8274 depends_on (depind, idesc)
8276 struct ia64_opcode *idesc;
8279 const struct ia64_opcode_dependency *dep = idesc->dependencies;
8280 for (i = 0; i < dep->nchks; i++)
8282 if (depind == DEP (dep->chks[i]))
8288 /* Determine a set of specific resources used for a particular resource
8289 class. Returns the number of specific resources identified For those
8290 cases which are not determinable statically, the resource returned is
8293 Meanings of value in 'NOTE':
8294 1) only read/write when the register number is explicitly encoded in the
8296 2) only read CFM when accessing a rotating GR, FR, or PR. mov pr only
8297 accesses CFM when qualifying predicate is in the rotating region.
8298 3) general register value is used to specify an indirect register; not
8299 determinable statically.
8300 4) only read the given resource when bits 7:0 of the indirect index
8301 register value does not match the register number of the resource; not
8302 determinable statically.
8303 5) all rules are implementation specific.
8304 6) only when both the index specified by the reader and the index specified
8305 by the writer have the same value in bits 63:61; not determinable
8307 7) only access the specified resource when the corresponding mask bit is
8309 8) PSR.dfh is only read when these insns reference FR32-127. PSR.dfl is
8310 only read when these insns reference FR2-31
8311 9) PSR.mfl is only written when these insns write FR2-31. PSR.mfh is only
8312 written when these insns write FR32-127
8313 10) The PSR.bn bit is only accessed when one of GR16-31 is specified in the
8315 11) The target predicates are written independently of PR[qp], but source
8316 registers are only read if PR[qp] is true. Since the state of PR[qp]
8317 cannot statically be determined, all source registers are marked used.
8318 12) This insn only reads the specified predicate register when that
8319 register is the PR[qp].
8320 13) This reference to ld-c only applies to teh GR whose value is loaded
8321 with data returned from memory, not the post-incremented address register.
8322 14) The RSE resource includes the implementation-specific RSE internal
8323 state resources. At least one (and possibly more) of these resources are
8324 read by each instruction listed in IC:rse-readers. At least one (and
8325 possibly more) of these resources are written by each insn listed in
8327 15+16) Represents reserved instructions, which the assembler does not
8330 Memory resources (i.e. locations in memory) are *not* marked or tracked by
8331 this code; there are no dependency violations based on memory access.
8334 #define MAX_SPECS 256
8339 specify_resource (dep, idesc, type, specs, note, path)
8340 const struct ia64_dependency *dep;
8341 struct ia64_opcode *idesc;
8342 int type; /* is this a DV chk or a DV reg? */
8343 struct rsrc specs[MAX_SPECS]; /* returned specific resources */
8344 int note; /* resource note for this insn's usage */
8345 int path; /* which execution path to examine */
8352 if (dep->mode == IA64_DV_WAW
8353 || (dep->mode == IA64_DV_RAW && type == DV_REG)
8354 || (dep->mode == IA64_DV_WAR && type == DV_CHK))
8357 /* template for any resources we identify */
8358 tmpl.dependency = dep;
8360 tmpl.insn_srlz = tmpl.data_srlz = 0;
8361 tmpl.qp_regno = CURR_SLOT.qp_regno;
8362 tmpl.link_to_qp_branch = 1;
8363 tmpl.mem_offset.hint = 0;
8364 tmpl.mem_offset.offset = 0;
8365 tmpl.mem_offset.base = 0;
8368 tmpl.cmp_type = CMP_NONE;
8375 as_warn (_("Unhandled dependency %s for %s (%s), note %d"), \
8376 dep->name, idesc->name, (rsrc_write?"write":"read"), note)
8377 #define KNOWN(REG) (gr_values[REG].known && gr_values[REG].path >= path)
8379 /* we don't need to track these */
8380 if (dep->semantics == IA64_DVS_NONE)
8383 switch (dep->specifier)
8388 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8390 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8391 if (regno >= 0 && regno <= 7)
8393 specs[count] = tmpl;
8394 specs[count++].index = regno;
8400 for (i = 0; i < 8; i++)
8402 specs[count] = tmpl;
8403 specs[count++].index = i;
8412 case IA64_RS_AR_UNAT:
8413 /* This is a mov =AR or mov AR= instruction. */
8414 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8416 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8417 if (regno == AR_UNAT)
8419 specs[count++] = tmpl;
8424 /* This is a spill/fill, or other instruction that modifies the
8427 /* Unless we can determine the specific bits used, mark the whole
8428 thing; bits 8:3 of the memory address indicate the bit used in
8429 UNAT. The .mem.offset hint may be used to eliminate a small
8430 subset of conflicts. */
8431 specs[count] = tmpl;
8432 if (md.mem_offset.hint)
8435 fprintf (stderr, " Using hint for spill/fill\n");
8436 /* The index isn't actually used, just set it to something
8437 approximating the bit index. */
8438 specs[count].index = (md.mem_offset.offset >> 3) & 0x3F;
8439 specs[count].mem_offset.hint = 1;
8440 specs[count].mem_offset.offset = md.mem_offset.offset;
8441 specs[count++].mem_offset.base = md.mem_offset.base;
8445 specs[count++].specific = 0;
8453 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8455 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8456 if ((regno >= 8 && regno <= 15)
8457 || (regno >= 20 && regno <= 23)
8458 || (regno >= 31 && regno <= 39)
8459 || (regno >= 41 && regno <= 47)
8460 || (regno >= 67 && regno <= 111))
8462 specs[count] = tmpl;
8463 specs[count++].index = regno;
8476 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
8478 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
8479 if ((regno >= 48 && regno <= 63)
8480 || (regno >= 112 && regno <= 127))
8482 specs[count] = tmpl;
8483 specs[count++].index = regno;
8489 for (i = 48; i < 64; i++)
8491 specs[count] = tmpl;
8492 specs[count++].index = i;
8494 for (i = 112; i < 128; i++)
8496 specs[count] = tmpl;
8497 specs[count++].index = i;
8515 for (i = 0; i < idesc->num_outputs; i++)
8516 if (idesc->operands[i] == IA64_OPND_B1
8517 || idesc->operands[i] == IA64_OPND_B2)
8519 specs[count] = tmpl;
8520 specs[count++].index =
8521 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8526 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8527 if (idesc->operands[i] == IA64_OPND_B1
8528 || idesc->operands[i] == IA64_OPND_B2)
8530 specs[count] = tmpl;
8531 specs[count++].index =
8532 CURR_SLOT.opnd[i].X_add_number - REG_BR;
8538 case IA64_RS_CPUID: /* four or more registers */
8541 if (idesc->operands[!rsrc_write] == IA64_OPND_CPUID_R3)
8543 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8544 if (regno >= 0 && regno < NELEMS (gr_values)
8547 specs[count] = tmpl;
8548 specs[count++].index = gr_values[regno].value & 0xFF;
8552 specs[count] = tmpl;
8553 specs[count++].specific = 0;
8563 case IA64_RS_DBR: /* four or more registers */
8566 if (idesc->operands[!rsrc_write] == IA64_OPND_DBR_R3)
8568 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8569 if (regno >= 0 && regno < NELEMS (gr_values)
8572 specs[count] = tmpl;
8573 specs[count++].index = gr_values[regno].value & 0xFF;
8577 specs[count] = tmpl;
8578 specs[count++].specific = 0;
8582 else if (note == 0 && !rsrc_write)
8584 specs[count] = tmpl;
8585 specs[count++].specific = 0;
8593 case IA64_RS_IBR: /* four or more registers */
8596 if (idesc->operands[!rsrc_write] == IA64_OPND_IBR_R3)
8598 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8599 if (regno >= 0 && regno < NELEMS (gr_values)
8602 specs[count] = tmpl;
8603 specs[count++].index = gr_values[regno].value & 0xFF;
8607 specs[count] = tmpl;
8608 specs[count++].specific = 0;
8621 /* These are implementation specific. Force all references to
8622 conflict with all other references. */
8623 specs[count] = tmpl;
8624 specs[count++].specific = 0;
8632 case IA64_RS_PKR: /* 16 or more registers */
8633 if (note == 3 || note == 4)
8635 if (idesc->operands[!rsrc_write] == IA64_OPND_PKR_R3)
8637 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8638 if (regno >= 0 && regno < NELEMS (gr_values)
8643 specs[count] = tmpl;
8644 specs[count++].index = gr_values[regno].value & 0xFF;
8647 for (i = 0; i < NELEMS (gr_values); i++)
8649 /* Uses all registers *except* the one in R3. */
8650 if ((unsigned)i != (gr_values[regno].value & 0xFF))
8652 specs[count] = tmpl;
8653 specs[count++].index = i;
8659 specs[count] = tmpl;
8660 specs[count++].specific = 0;
8667 specs[count] = tmpl;
8668 specs[count++].specific = 0;
8672 case IA64_RS_PMC: /* four or more registers */
8675 if (idesc->operands[!rsrc_write] == IA64_OPND_PMC_R3
8676 || (!rsrc_write && idesc->operands[1] == IA64_OPND_PMD_R3))
8679 int index = ((idesc->operands[1] == IA64_OPND_R3 && !rsrc_write)
8681 int regno = CURR_SLOT.opnd[index].X_add_number - REG_GR;
8682 if (regno >= 0 && regno < NELEMS (gr_values)
8685 specs[count] = tmpl;
8686 specs[count++].index = gr_values[regno].value & 0xFF;
8690 specs[count] = tmpl;
8691 specs[count++].specific = 0;
8701 case IA64_RS_PMD: /* four or more registers */
8704 if (idesc->operands[!rsrc_write] == IA64_OPND_PMD_R3)
8706 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8707 if (regno >= 0 && regno < NELEMS (gr_values)
8710 specs[count] = tmpl;
8711 specs[count++].index = gr_values[regno].value & 0xFF;
8715 specs[count] = tmpl;
8716 specs[count++].specific = 0;
8726 case IA64_RS_RR: /* eight registers */
8729 if (idesc->operands[!rsrc_write] == IA64_OPND_RR_R3)
8731 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_GR;
8732 if (regno >= 0 && regno < NELEMS (gr_values)
8735 specs[count] = tmpl;
8736 specs[count++].index = (gr_values[regno].value >> 61) & 0x7;
8740 specs[count] = tmpl;
8741 specs[count++].specific = 0;
8745 else if (note == 0 && !rsrc_write)
8747 specs[count] = tmpl;
8748 specs[count++].specific = 0;
8756 case IA64_RS_CR_IRR:
8759 /* handle mov-from-CR-IVR; it's a read that writes CR[IRR] */
8760 int regno = CURR_SLOT.opnd[1].X_add_number - REG_CR;
8762 && idesc->operands[1] == IA64_OPND_CR3
8765 for (i = 0; i < 4; i++)
8767 specs[count] = tmpl;
8768 specs[count++].index = CR_IRR0 + i;
8774 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8775 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8777 && regno <= CR_IRR3)
8779 specs[count] = tmpl;
8780 specs[count++].index = regno;
8789 case IA64_RS_CR_LRR:
8796 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8797 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3
8798 && (regno == CR_LRR0 || regno == CR_LRR1))
8800 specs[count] = tmpl;
8801 specs[count++].index = regno;
8809 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
8811 specs[count] = tmpl;
8812 specs[count++].index =
8813 CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
8828 else if (rsrc_write)
8830 if (dep->specifier == IA64_RS_FRb
8831 && idesc->operands[0] == IA64_OPND_F1)
8833 specs[count] = tmpl;
8834 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_FR;
8839 for (i = idesc->num_outputs; i < NELEMS (idesc->operands); i++)
8841 if (idesc->operands[i] == IA64_OPND_F2
8842 || idesc->operands[i] == IA64_OPND_F3
8843 || idesc->operands[i] == IA64_OPND_F4)
8845 specs[count] = tmpl;
8846 specs[count++].index =
8847 CURR_SLOT.opnd[i].X_add_number - REG_FR;
8856 /* This reference applies only to the GR whose value is loaded with
8857 data returned from memory. */
8858 specs[count] = tmpl;
8859 specs[count++].index = CURR_SLOT.opnd[0].X_add_number - REG_GR;
8865 for (i = 0; i < idesc->num_outputs; i++)
8866 if (idesc->operands[i] == IA64_OPND_R1
8867 || idesc->operands[i] == IA64_OPND_R2
8868 || idesc->operands[i] == IA64_OPND_R3)
8870 specs[count] = tmpl;
8871 specs[count++].index =
8872 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8874 if (idesc->flags & IA64_OPCODE_POSTINC)
8875 for (i = 0; i < NELEMS (idesc->operands); i++)
8876 if (idesc->operands[i] == IA64_OPND_MR3)
8878 specs[count] = tmpl;
8879 specs[count++].index =
8880 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8885 /* Look for anything that reads a GR. */
8886 for (i = 0; i < NELEMS (idesc->operands); i++)
8888 if (idesc->operands[i] == IA64_OPND_MR3
8889 || idesc->operands[i] == IA64_OPND_CPUID_R3
8890 || idesc->operands[i] == IA64_OPND_DBR_R3
8891 || idesc->operands[i] == IA64_OPND_IBR_R3
8892 || idesc->operands[i] == IA64_OPND_MSR_R3
8893 || idesc->operands[i] == IA64_OPND_PKR_R3
8894 || idesc->operands[i] == IA64_OPND_PMC_R3
8895 || idesc->operands[i] == IA64_OPND_PMD_R3
8896 || idesc->operands[i] == IA64_OPND_RR_R3
8897 || ((i >= idesc->num_outputs)
8898 && (idesc->operands[i] == IA64_OPND_R1
8899 || idesc->operands[i] == IA64_OPND_R2
8900 || idesc->operands[i] == IA64_OPND_R3
8901 /* addl source register. */
8902 || idesc->operands[i] == IA64_OPND_R3_2)))
8904 specs[count] = tmpl;
8905 specs[count++].index =
8906 CURR_SLOT.opnd[i].X_add_number - REG_GR;
8917 /* This is the same as IA64_RS_PRr, except that the register range is
8918 from 1 - 15, and there are no rotating register reads/writes here. */
8922 for (i = 1; i < 16; i++)
8924 specs[count] = tmpl;
8925 specs[count++].index = i;
8931 /* Mark only those registers indicated by the mask. */
8934 mask = CURR_SLOT.opnd[2].X_add_number;
8935 for (i = 1; i < 16; i++)
8936 if (mask & ((valueT) 1 << i))
8938 specs[count] = tmpl;
8939 specs[count++].index = i;
8947 else if (note == 11) /* note 11 implies note 1 as well */
8951 for (i = 0; i < idesc->num_outputs; i++)
8953 if (idesc->operands[i] == IA64_OPND_P1
8954 || idesc->operands[i] == IA64_OPND_P2)
8956 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
8957 if (regno >= 1 && regno < 16)
8959 specs[count] = tmpl;
8960 specs[count++].index = regno;
8970 else if (note == 12)
8972 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
8974 specs[count] = tmpl;
8975 specs[count++].index = CURR_SLOT.qp_regno;
8982 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
8983 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
8984 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
8985 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
8987 if ((idesc->operands[0] == IA64_OPND_P1
8988 || idesc->operands[0] == IA64_OPND_P2)
8989 && p1 >= 1 && p1 < 16)
8991 specs[count] = tmpl;
8992 specs[count].cmp_type =
8993 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
8994 specs[count++].index = p1;
8996 if ((idesc->operands[1] == IA64_OPND_P1
8997 || idesc->operands[1] == IA64_OPND_P2)
8998 && p2 >= 1 && p2 < 16)
9000 specs[count] = tmpl;
9001 specs[count].cmp_type =
9002 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9003 specs[count++].index = p2;
9008 if (CURR_SLOT.qp_regno >= 1 && CURR_SLOT.qp_regno < 16)
9010 specs[count] = tmpl;
9011 specs[count++].index = CURR_SLOT.qp_regno;
9013 if (idesc->operands[1] == IA64_OPND_PR)
9015 for (i = 1; i < 16; i++)
9017 specs[count] = tmpl;
9018 specs[count++].index = i;
9029 /* This is the general case for PRs. IA64_RS_PR and IA64_RS_PR63 are
9030 simplified cases of this. */
9034 for (i = 16; i < 63; i++)
9036 specs[count] = tmpl;
9037 specs[count++].index = i;
9043 /* Mark only those registers indicated by the mask. */
9045 && idesc->operands[0] == IA64_OPND_PR)
9047 mask = CURR_SLOT.opnd[2].X_add_number;
9048 if (mask & ((valueT) 1 << 16))
9049 for (i = 16; i < 63; i++)
9051 specs[count] = tmpl;
9052 specs[count++].index = i;
9056 && idesc->operands[0] == IA64_OPND_PR_ROT)
9058 for (i = 16; i < 63; i++)
9060 specs[count] = tmpl;
9061 specs[count++].index = i;
9069 else if (note == 11) /* note 11 implies note 1 as well */
9073 for (i = 0; i < idesc->num_outputs; i++)
9075 if (idesc->operands[i] == IA64_OPND_P1
9076 || idesc->operands[i] == IA64_OPND_P2)
9078 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9079 if (regno >= 16 && regno < 63)
9081 specs[count] = tmpl;
9082 specs[count++].index = regno;
9092 else if (note == 12)
9094 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
9096 specs[count] = tmpl;
9097 specs[count++].index = CURR_SLOT.qp_regno;
9104 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9105 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9106 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9107 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9109 if ((idesc->operands[0] == IA64_OPND_P1
9110 || idesc->operands[0] == IA64_OPND_P2)
9111 && p1 >= 16 && p1 < 63)
9113 specs[count] = tmpl;
9114 specs[count].cmp_type =
9115 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9116 specs[count++].index = p1;
9118 if ((idesc->operands[1] == IA64_OPND_P1
9119 || idesc->operands[1] == IA64_OPND_P2)
9120 && p2 >= 16 && p2 < 63)
9122 specs[count] = tmpl;
9123 specs[count].cmp_type =
9124 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9125 specs[count++].index = p2;
9130 if (CURR_SLOT.qp_regno >= 16 && CURR_SLOT.qp_regno < 63)
9132 specs[count] = tmpl;
9133 specs[count++].index = CURR_SLOT.qp_regno;
9135 if (idesc->operands[1] == IA64_OPND_PR)
9137 for (i = 16; i < 63; i++)
9139 specs[count] = tmpl;
9140 specs[count++].index = i;
9152 /* Verify that the instruction is using the PSR bit indicated in
9156 if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_UM)
9158 if (dep->regindex < 6)
9160 specs[count++] = tmpl;
9163 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR)
9165 if (dep->regindex < 32
9166 || dep->regindex == 35
9167 || dep->regindex == 36
9168 || (!rsrc_write && dep->regindex == PSR_CPL))
9170 specs[count++] = tmpl;
9173 else if (idesc->operands[!rsrc_write] == IA64_OPND_PSR_L)
9175 if (dep->regindex < 32
9176 || dep->regindex == 35
9177 || dep->regindex == 36
9178 || (rsrc_write && dep->regindex == PSR_CPL))
9180 specs[count++] = tmpl;
9185 /* Several PSR bits have very specific dependencies. */
9186 switch (dep->regindex)
9189 specs[count++] = tmpl;
9194 specs[count++] = tmpl;
9198 /* Only certain CR accesses use PSR.ic */
9199 if (idesc->operands[0] == IA64_OPND_CR3
9200 || idesc->operands[1] == IA64_OPND_CR3)
9203 ((idesc->operands[0] == IA64_OPND_CR3)
9206 CURR_SLOT.opnd[index].X_add_number - REG_CR;
9221 specs[count++] = tmpl;
9230 specs[count++] = tmpl;
9234 /* Only some AR accesses use cpl */
9235 if (idesc->operands[0] == IA64_OPND_AR3
9236 || idesc->operands[1] == IA64_OPND_AR3)
9239 ((idesc->operands[0] == IA64_OPND_AR3)
9242 CURR_SLOT.opnd[index].X_add_number - REG_AR;
9249 && regno <= AR_K7))))
9251 specs[count++] = tmpl;
9256 specs[count++] = tmpl;
9266 if (idesc->operands[0] == IA64_OPND_IMMU24)
9268 mask = CURR_SLOT.opnd[0].X_add_number;
9274 if (mask & ((valueT) 1 << dep->regindex))
9276 specs[count++] = tmpl;
9281 int min = dep->regindex == PSR_DFL ? 2 : 32;
9282 int max = dep->regindex == PSR_DFL ? 31 : 127;
9283 /* dfh is read on FR32-127; dfl is read on FR2-31 */
9284 for (i = 0; i < NELEMS (idesc->operands); i++)
9286 if (idesc->operands[i] == IA64_OPND_F1
9287 || idesc->operands[i] == IA64_OPND_F2
9288 || idesc->operands[i] == IA64_OPND_F3
9289 || idesc->operands[i] == IA64_OPND_F4)
9291 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9292 if (reg >= min && reg <= max)
9294 specs[count++] = tmpl;
9301 int min = dep->regindex == PSR_MFL ? 2 : 32;
9302 int max = dep->regindex == PSR_MFL ? 31 : 127;
9303 /* mfh is read on writes to FR32-127; mfl is read on writes to
9305 for (i = 0; i < idesc->num_outputs; i++)
9307 if (idesc->operands[i] == IA64_OPND_F1)
9309 int reg = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9310 if (reg >= min && reg <= max)
9312 specs[count++] = tmpl;
9317 else if (note == 10)
9319 for (i = 0; i < NELEMS (idesc->operands); i++)
9321 if (idesc->operands[i] == IA64_OPND_R1
9322 || idesc->operands[i] == IA64_OPND_R2
9323 || idesc->operands[i] == IA64_OPND_R3)
9325 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9326 if (regno >= 16 && regno <= 31)
9328 specs[count++] = tmpl;
9339 case IA64_RS_AR_FPSR:
9340 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3)
9342 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9343 if (regno == AR_FPSR)
9345 specs[count++] = tmpl;
9350 specs[count++] = tmpl;
9355 /* Handle all AR[REG] resources */
9356 if (note == 0 || note == 1)
9358 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_AR;
9359 if (idesc->operands[!rsrc_write] == IA64_OPND_AR3
9360 && regno == dep->regindex)
9362 specs[count++] = tmpl;
9364 /* other AR[REG] resources may be affected by AR accesses */
9365 else if (idesc->operands[0] == IA64_OPND_AR3)
9368 regno = CURR_SLOT.opnd[0].X_add_number - REG_AR;
9369 switch (dep->regindex)
9375 if (regno == AR_BSPSTORE)
9377 specs[count++] = tmpl;
9381 (regno == AR_BSPSTORE
9382 || regno == AR_RNAT))
9384 specs[count++] = tmpl;
9389 else if (idesc->operands[1] == IA64_OPND_AR3)
9392 regno = CURR_SLOT.opnd[1].X_add_number - REG_AR;
9393 switch (dep->regindex)
9398 if (regno == AR_BSPSTORE || regno == AR_RNAT)
9400 specs[count++] = tmpl;
9407 specs[count++] = tmpl;
9417 /* Handle all CR[REG] resources */
9418 if (note == 0 || note == 1)
9420 if (idesc->operands[!rsrc_write] == IA64_OPND_CR3)
9422 int regno = CURR_SLOT.opnd[!rsrc_write].X_add_number - REG_CR;
9423 if (regno == dep->regindex)
9425 specs[count++] = tmpl;
9427 else if (!rsrc_write)
9429 /* Reads from CR[IVR] affect other resources. */
9430 if (regno == CR_IVR)
9432 if ((dep->regindex >= CR_IRR0
9433 && dep->regindex <= CR_IRR3)
9434 || dep->regindex == CR_TPR)
9436 specs[count++] = tmpl;
9443 specs[count++] = tmpl;
9452 case IA64_RS_INSERVICE:
9453 /* look for write of EOI (67) or read of IVR (65) */
9454 if ((idesc->operands[0] == IA64_OPND_CR3
9455 && CURR_SLOT.opnd[0].X_add_number - REG_CR == CR_EOI)
9456 || (idesc->operands[1] == IA64_OPND_CR3
9457 && CURR_SLOT.opnd[1].X_add_number - REG_CR == CR_IVR))
9459 specs[count++] = tmpl;
9466 specs[count++] = tmpl;
9477 specs[count++] = tmpl;
9481 /* Check if any of the registers accessed are in the rotating region.
9482 mov to/from pr accesses CFM only when qp_regno is in the rotating
9484 for (i = 0; i < NELEMS (idesc->operands); i++)
9486 if (idesc->operands[i] == IA64_OPND_R1
9487 || idesc->operands[i] == IA64_OPND_R2
9488 || idesc->operands[i] == IA64_OPND_R3)
9490 int num = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9491 /* Assumes that md.rot.num_regs is always valid */
9492 if (md.rot.num_regs > 0
9494 && num < 31 + md.rot.num_regs)
9496 specs[count] = tmpl;
9497 specs[count++].specific = 0;
9500 else if (idesc->operands[i] == IA64_OPND_F1
9501 || idesc->operands[i] == IA64_OPND_F2
9502 || idesc->operands[i] == IA64_OPND_F3
9503 || idesc->operands[i] == IA64_OPND_F4)
9505 int num = CURR_SLOT.opnd[i].X_add_number - REG_FR;
9508 specs[count] = tmpl;
9509 specs[count++].specific = 0;
9512 else if (idesc->operands[i] == IA64_OPND_P1
9513 || idesc->operands[i] == IA64_OPND_P2)
9515 int num = CURR_SLOT.opnd[i].X_add_number - REG_P;
9518 specs[count] = tmpl;
9519 specs[count++].specific = 0;
9523 if (CURR_SLOT.qp_regno > 15)
9525 specs[count] = tmpl;
9526 specs[count++].specific = 0;
9531 /* This is the same as IA64_RS_PRr, except simplified to account for
9532 the fact that there is only one register. */
9536 specs[count++] = tmpl;
9541 if (idesc->operands[2] == IA64_OPND_IMM17)
9542 mask = CURR_SLOT.opnd[2].X_add_number;
9543 if (mask & ((valueT) 1 << 63))
9544 specs[count++] = tmpl;
9546 else if (note == 11)
9548 if ((idesc->operands[0] == IA64_OPND_P1
9549 && CURR_SLOT.opnd[0].X_add_number - REG_P == 63)
9550 || (idesc->operands[1] == IA64_OPND_P2
9551 && CURR_SLOT.opnd[1].X_add_number - REG_P == 63))
9553 specs[count++] = tmpl;
9556 else if (note == 12)
9558 if (CURR_SLOT.qp_regno == 63)
9560 specs[count++] = tmpl;
9567 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
9568 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
9569 int or_andcm = strstr (idesc->name, "or.andcm") != NULL;
9570 int and_orcm = strstr (idesc->name, "and.orcm") != NULL;
9573 && (idesc->operands[0] == IA64_OPND_P1
9574 || idesc->operands[0] == IA64_OPND_P2))
9576 specs[count] = tmpl;
9577 specs[count++].cmp_type =
9578 (or_andcm ? CMP_OR : (and_orcm ? CMP_AND : CMP_NONE));
9581 && (idesc->operands[1] == IA64_OPND_P1
9582 || idesc->operands[1] == IA64_OPND_P2))
9584 specs[count] = tmpl;
9585 specs[count++].cmp_type =
9586 (or_andcm ? CMP_AND : (and_orcm ? CMP_OR : CMP_NONE));
9591 if (CURR_SLOT.qp_regno == 63)
9593 specs[count++] = tmpl;
9604 /* FIXME we can identify some individual RSE written resources, but RSE
9605 read resources have not yet been completely identified, so for now
9606 treat RSE as a single resource */
9607 if (strncmp (idesc->name, "mov", 3) == 0)
9611 if (idesc->operands[0] == IA64_OPND_AR3
9612 && CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE)
9614 specs[count++] = tmpl;
9619 if (idesc->operands[0] == IA64_OPND_AR3)
9621 if (CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_BSPSTORE
9622 || CURR_SLOT.opnd[0].X_add_number - REG_AR == AR_RNAT)
9624 specs[count++] = tmpl;
9627 else if (idesc->operands[1] == IA64_OPND_AR3)
9629 if (CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSP
9630 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_BSPSTORE
9631 || CURR_SLOT.opnd[1].X_add_number - REG_AR == AR_RNAT)
9633 specs[count++] = tmpl;
9640 specs[count++] = tmpl;
9645 /* FIXME -- do any of these need to be non-specific? */
9646 specs[count++] = tmpl;
9650 as_bad (_("Unrecognized dependency specifier %d\n"), dep->specifier);
9657 /* Clear branch flags on marked resources. This breaks the link between the
9658 QP of the marking instruction and a subsequent branch on the same QP. */
9661 clear_qp_branch_flag (mask)
9665 for (i = 0; i < regdepslen; i++)
9667 valueT bit = ((valueT) 1 << regdeps[i].qp_regno);
9668 if ((bit & mask) != 0)
9670 regdeps[i].link_to_qp_branch = 0;
9675 /* MASK contains 2 and only 2 PRs which are mutually exclusive. Remove
9676 any mutexes which contain one of the PRs and create new ones when
9680 update_qp_mutex (valueT mask)
9686 while (i < qp_mutexeslen)
9688 if ((qp_mutexes[i].prmask & mask) != 0)
9690 /* If it destroys and creates the same mutex, do nothing. */
9691 if (qp_mutexes[i].prmask == mask
9692 && qp_mutexes[i].path == md.path)
9703 fprintf (stderr, " Clearing mutex relation");
9704 print_prmask (qp_mutexes[i].prmask);
9705 fprintf (stderr, "\n");
9708 /* Deal with the old mutex with more than 3+ PRs only if
9709 the new mutex on the same execution path with it.
9711 FIXME: The 3+ mutex support is incomplete.
9712 dot_pred_rel () may be a better place to fix it. */
9713 if (qp_mutexes[i].path == md.path)
9715 /* If it is a proper subset of the mutex, create a
9718 && (qp_mutexes[i].prmask & mask) == mask)
9721 qp_mutexes[i].prmask &= ~mask;
9722 if (qp_mutexes[i].prmask & (qp_mutexes[i].prmask - 1))
9724 /* Modify the mutex if there are more than one
9732 /* Remove the mutex. */
9733 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9741 add_qp_mutex (mask);
9746 /* Remove any mutexes which contain any of the PRs indicated in the mask.
9748 Any changes to a PR clears the mutex relations which include that PR. */
9751 clear_qp_mutex (mask)
9757 while (i < qp_mutexeslen)
9759 if ((qp_mutexes[i].prmask & mask) != 0)
9763 fprintf (stderr, " Clearing mutex relation");
9764 print_prmask (qp_mutexes[i].prmask);
9765 fprintf (stderr, "\n");
9767 qp_mutexes[i] = qp_mutexes[--qp_mutexeslen];
9774 /* Clear implies relations which contain PRs in the given masks.
9775 P1_MASK indicates the source of the implies relation, while P2_MASK
9776 indicates the implied PR. */
9779 clear_qp_implies (p1_mask, p2_mask)
9786 while (i < qp_implieslen)
9788 if ((((valueT) 1 << qp_implies[i].p1) & p1_mask) != 0
9789 || (((valueT) 1 << qp_implies[i].p2) & p2_mask) != 0)
9792 fprintf (stderr, "Clearing implied relation PR%d->PR%d\n",
9793 qp_implies[i].p1, qp_implies[i].p2);
9794 qp_implies[i] = qp_implies[--qp_implieslen];
9801 /* Add the PRs specified to the list of implied relations. */
9804 add_qp_imply (p1, p2)
9811 /* p0 is not meaningful here. */
9812 if (p1 == 0 || p2 == 0)
9818 /* If it exists already, ignore it. */
9819 for (i = 0; i < qp_implieslen; i++)
9821 if (qp_implies[i].p1 == p1
9822 && qp_implies[i].p2 == p2
9823 && qp_implies[i].path == md.path
9824 && !qp_implies[i].p2_branched)
9828 if (qp_implieslen == qp_impliestotlen)
9830 qp_impliestotlen += 20;
9831 qp_implies = (struct qp_imply *)
9832 xrealloc ((void *) qp_implies,
9833 qp_impliestotlen * sizeof (struct qp_imply));
9836 fprintf (stderr, " Registering PR%d implies PR%d\n", p1, p2);
9837 qp_implies[qp_implieslen].p1 = p1;
9838 qp_implies[qp_implieslen].p2 = p2;
9839 qp_implies[qp_implieslen].path = md.path;
9840 qp_implies[qp_implieslen++].p2_branched = 0;
9842 /* Add in the implied transitive relations; for everything that p2 implies,
9843 make p1 imply that, too; for everything that implies p1, make it imply p2
9845 for (i = 0; i < qp_implieslen; i++)
9847 if (qp_implies[i].p1 == p2)
9848 add_qp_imply (p1, qp_implies[i].p2);
9849 if (qp_implies[i].p2 == p1)
9850 add_qp_imply (qp_implies[i].p1, p2);
9852 /* Add in mutex relations implied by this implies relation; for each mutex
9853 relation containing p2, duplicate it and replace p2 with p1. */
9854 bit = (valueT) 1 << p1;
9855 mask = (valueT) 1 << p2;
9856 for (i = 0; i < qp_mutexeslen; i++)
9858 if (qp_mutexes[i].prmask & mask)
9859 add_qp_mutex ((qp_mutexes[i].prmask & ~mask) | bit);
9863 /* Add the PRs specified in the mask to the mutex list; this means that only
9864 one of the PRs can be true at any time. PR0 should never be included in
9874 if (qp_mutexeslen == qp_mutexestotlen)
9876 qp_mutexestotlen += 20;
9877 qp_mutexes = (struct qpmutex *)
9878 xrealloc ((void *) qp_mutexes,
9879 qp_mutexestotlen * sizeof (struct qpmutex));
9883 fprintf (stderr, " Registering mutex on");
9884 print_prmask (mask);
9885 fprintf (stderr, "\n");
9887 qp_mutexes[qp_mutexeslen].path = md.path;
9888 qp_mutexes[qp_mutexeslen++].prmask = mask;
9892 has_suffix_p (name, suffix)
9896 size_t namelen = strlen (name);
9897 size_t sufflen = strlen (suffix);
9899 if (namelen <= sufflen)
9901 return strcmp (name + namelen - sufflen, suffix) == 0;
9905 clear_register_values ()
9909 fprintf (stderr, " Clearing register values\n");
9910 for (i = 1; i < NELEMS (gr_values); i++)
9911 gr_values[i].known = 0;
9914 /* Keep track of register values/changes which affect DV tracking.
9916 optimization note: should add a flag to classes of insns where otherwise we
9917 have to examine a group of strings to identify them. */
9920 note_register_values (idesc)
9921 struct ia64_opcode *idesc;
9923 valueT qp_changemask = 0;
9926 /* Invalidate values for registers being written to. */
9927 for (i = 0; i < idesc->num_outputs; i++)
9929 if (idesc->operands[i] == IA64_OPND_R1
9930 || idesc->operands[i] == IA64_OPND_R2
9931 || idesc->operands[i] == IA64_OPND_R3)
9933 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9934 if (regno > 0 && regno < NELEMS (gr_values))
9935 gr_values[regno].known = 0;
9937 else if (idesc->operands[i] == IA64_OPND_R3_2)
9939 int regno = CURR_SLOT.opnd[i].X_add_number - REG_GR;
9940 if (regno > 0 && regno < 4)
9941 gr_values[regno].known = 0;
9943 else if (idesc->operands[i] == IA64_OPND_P1
9944 || idesc->operands[i] == IA64_OPND_P2)
9946 int regno = CURR_SLOT.opnd[i].X_add_number - REG_P;
9947 qp_changemask |= (valueT) 1 << regno;
9949 else if (idesc->operands[i] == IA64_OPND_PR)
9951 if (idesc->operands[2] & (valueT) 0x10000)
9952 qp_changemask = ~(valueT) 0x1FFFF | idesc->operands[2];
9954 qp_changemask = idesc->operands[2];
9957 else if (idesc->operands[i] == IA64_OPND_PR_ROT)
9959 if (idesc->operands[1] & ((valueT) 1 << 43))
9960 qp_changemask = -((valueT) 1 << 44) | idesc->operands[1];
9962 qp_changemask = idesc->operands[1];
9963 qp_changemask &= ~(valueT) 0xFFFF;
9968 /* Always clear qp branch flags on any PR change. */
9969 /* FIXME there may be exceptions for certain compares. */
9970 clear_qp_branch_flag (qp_changemask);
9972 /* Invalidate rotating registers on insns which affect RRBs in CFM. */
9973 if (idesc->flags & IA64_OPCODE_MOD_RRBS)
9975 qp_changemask |= ~(valueT) 0xFFFF;
9976 if (strcmp (idesc->name, "clrrrb.pr") != 0)
9978 for (i = 32; i < 32 + md.rot.num_regs; i++)
9979 gr_values[i].known = 0;
9981 clear_qp_mutex (qp_changemask);
9982 clear_qp_implies (qp_changemask, qp_changemask);
9984 /* After a call, all register values are undefined, except those marked
9986 else if (strncmp (idesc->name, "br.call", 6) == 0
9987 || strncmp (idesc->name, "brl.call", 7) == 0)
9989 /* FIXME keep GR values which are marked as "safe_across_calls" */
9990 clear_register_values ();
9991 clear_qp_mutex (~qp_safe_across_calls);
9992 clear_qp_implies (~qp_safe_across_calls, ~qp_safe_across_calls);
9993 clear_qp_branch_flag (~qp_safe_across_calls);
9995 else if (is_interruption_or_rfi (idesc)
9996 || is_taken_branch (idesc))
9998 clear_register_values ();
9999 clear_qp_mutex (~(valueT) 0);
10000 clear_qp_implies (~(valueT) 0, ~(valueT) 0);
10002 /* Look for mutex and implies relations. */
10003 else if ((idesc->operands[0] == IA64_OPND_P1
10004 || idesc->operands[0] == IA64_OPND_P2)
10005 && (idesc->operands[1] == IA64_OPND_P1
10006 || idesc->operands[1] == IA64_OPND_P2))
10008 int p1 = CURR_SLOT.opnd[0].X_add_number - REG_P;
10009 int p2 = CURR_SLOT.opnd[1].X_add_number - REG_P;
10010 valueT p1mask = (p1 != 0) ? (valueT) 1 << p1 : 0;
10011 valueT p2mask = (p2 != 0) ? (valueT) 1 << p2 : 0;
10013 /* If both PRs are PR0, we can't really do anything. */
10014 if (p1 == 0 && p2 == 0)
10017 fprintf (stderr, " Ignoring PRs due to inclusion of p0\n");
10019 /* In general, clear mutexes and implies which include P1 or P2,
10020 with the following exceptions. */
10021 else if (has_suffix_p (idesc->name, ".or.andcm")
10022 || has_suffix_p (idesc->name, ".and.orcm"))
10024 clear_qp_implies (p2mask, p1mask);
10026 else if (has_suffix_p (idesc->name, ".andcm")
10027 || has_suffix_p (idesc->name, ".and"))
10029 clear_qp_implies (0, p1mask | p2mask);
10031 else if (has_suffix_p (idesc->name, ".orcm")
10032 || has_suffix_p (idesc->name, ".or"))
10034 clear_qp_mutex (p1mask | p2mask);
10035 clear_qp_implies (p1mask | p2mask, 0);
10041 clear_qp_implies (p1mask | p2mask, p1mask | p2mask);
10043 /* If one of the PRs is PR0, we call clear_qp_mutex. */
10044 if (p1 == 0 || p2 == 0)
10045 clear_qp_mutex (p1mask | p2mask);
10047 added = update_qp_mutex (p1mask | p2mask);
10049 if (CURR_SLOT.qp_regno == 0
10050 || has_suffix_p (idesc->name, ".unc"))
10052 if (added == 0 && p1 && p2)
10053 add_qp_mutex (p1mask | p2mask);
10054 if (CURR_SLOT.qp_regno != 0)
10057 add_qp_imply (p1, CURR_SLOT.qp_regno);
10059 add_qp_imply (p2, CURR_SLOT.qp_regno);
10064 /* Look for mov imm insns into GRs. */
10065 else if (idesc->operands[0] == IA64_OPND_R1
10066 && (idesc->operands[1] == IA64_OPND_IMM22
10067 || idesc->operands[1] == IA64_OPND_IMMU64)
10068 && CURR_SLOT.opnd[1].X_op == O_constant
10069 && (strcmp (idesc->name, "mov") == 0
10070 || strcmp (idesc->name, "movl") == 0))
10072 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10073 if (regno > 0 && regno < NELEMS (gr_values))
10075 gr_values[regno].known = 1;
10076 gr_values[regno].value = CURR_SLOT.opnd[1].X_add_number;
10077 gr_values[regno].path = md.path;
10080 fprintf (stderr, " Know gr%d = ", regno);
10081 fprintf_vma (stderr, gr_values[regno].value);
10082 fputs ("\n", stderr);
10086 /* Look for dep.z imm insns. */
10087 else if (idesc->operands[0] == IA64_OPND_R1
10088 && idesc->operands[1] == IA64_OPND_IMM8
10089 && strcmp (idesc->name, "dep.z") == 0)
10091 int regno = CURR_SLOT.opnd[0].X_add_number - REG_GR;
10092 if (regno > 0 && regno < NELEMS (gr_values))
10094 valueT value = CURR_SLOT.opnd[1].X_add_number;
10096 if (CURR_SLOT.opnd[3].X_add_number < 64)
10097 value &= ((valueT)1 << CURR_SLOT.opnd[3].X_add_number) - 1;
10098 value <<= CURR_SLOT.opnd[2].X_add_number;
10099 gr_values[regno].known = 1;
10100 gr_values[regno].value = value;
10101 gr_values[regno].path = md.path;
10104 fprintf (stderr, " Know gr%d = ", regno);
10105 fprintf_vma (stderr, gr_values[regno].value);
10106 fputs ("\n", stderr);
10112 clear_qp_mutex (qp_changemask);
10113 clear_qp_implies (qp_changemask, qp_changemask);
10117 /* Return whether the given predicate registers are currently mutex. */
10120 qp_mutex (p1, p2, path)
10130 mask = ((valueT) 1 << p1) | (valueT) 1 << p2;
10131 for (i = 0; i < qp_mutexeslen; i++)
10133 if (qp_mutexes[i].path >= path
10134 && (qp_mutexes[i].prmask & mask) == mask)
10141 /* Return whether the given resource is in the given insn's list of chks
10142 Return 1 if the conflict is absolutely determined, 2 if it's a potential
10146 resources_match (rs, idesc, note, qp_regno, path)
10148 struct ia64_opcode *idesc;
10153 struct rsrc specs[MAX_SPECS];
10156 /* If the marked resource's qp_regno and the given qp_regno are mutex,
10157 we don't need to check. One exception is note 11, which indicates that
10158 target predicates are written regardless of PR[qp]. */
10159 if (qp_mutex (rs->qp_regno, qp_regno, path)
10163 count = specify_resource (rs->dependency, idesc, DV_CHK, specs, note, path);
10164 while (count-- > 0)
10166 /* UNAT checking is a bit more specific than other resources */
10167 if (rs->dependency->specifier == IA64_RS_AR_UNAT
10168 && specs[count].mem_offset.hint
10169 && rs->mem_offset.hint)
10171 if (rs->mem_offset.base == specs[count].mem_offset.base)
10173 if (((rs->mem_offset.offset >> 3) & 0x3F) ==
10174 ((specs[count].mem_offset.offset >> 3) & 0x3F))
10181 /* Skip apparent PR write conflicts where both writes are an AND or both
10182 writes are an OR. */
10183 if (rs->dependency->specifier == IA64_RS_PR
10184 || rs->dependency->specifier == IA64_RS_PRr
10185 || rs->dependency->specifier == IA64_RS_PR63)
10187 if (specs[count].cmp_type != CMP_NONE
10188 && specs[count].cmp_type == rs->cmp_type)
10191 fprintf (stderr, " %s on parallel compare allowed (PR%d)\n",
10192 dv_mode[rs->dependency->mode],
10193 rs->dependency->specifier != IA64_RS_PR63 ?
10194 specs[count].index : 63);
10199 " %s on parallel compare conflict %s vs %s on PR%d\n",
10200 dv_mode[rs->dependency->mode],
10201 dv_cmp_type[rs->cmp_type],
10202 dv_cmp_type[specs[count].cmp_type],
10203 rs->dependency->specifier != IA64_RS_PR63 ?
10204 specs[count].index : 63);
10208 /* If either resource is not specific, conservatively assume a conflict
10210 if (!specs[count].specific || !rs->specific)
10212 else if (specs[count].index == rs->index)
10219 /* Indicate an instruction group break; if INSERT_STOP is non-zero, then
10220 insert a stop to create the break. Update all resource dependencies
10221 appropriately. If QP_REGNO is non-zero, only apply the break to resources
10222 which use the same QP_REGNO and have the link_to_qp_branch flag set.
10223 If SAVE_CURRENT is non-zero, don't affect resources marked by the current
10227 insn_group_break (insert_stop, qp_regno, save_current)
10234 if (insert_stop && md.num_slots_in_use > 0)
10235 PREV_SLOT.end_of_insn_group = 1;
10239 fprintf (stderr, " Insn group break%s",
10240 (insert_stop ? " (w/stop)" : ""));
10242 fprintf (stderr, " effective for QP=%d", qp_regno);
10243 fprintf (stderr, "\n");
10247 while (i < regdepslen)
10249 const struct ia64_dependency *dep = regdeps[i].dependency;
10252 && regdeps[i].qp_regno != qp_regno)
10259 && CURR_SLOT.src_file == regdeps[i].file
10260 && CURR_SLOT.src_line == regdeps[i].line)
10266 /* clear dependencies which are automatically cleared by a stop, or
10267 those that have reached the appropriate state of insn serialization */
10268 if (dep->semantics == IA64_DVS_IMPLIED
10269 || dep->semantics == IA64_DVS_IMPLIEDF
10270 || regdeps[i].insn_srlz == STATE_SRLZ)
10272 print_dependency ("Removing", i);
10273 regdeps[i] = regdeps[--regdepslen];
10277 if (dep->semantics == IA64_DVS_DATA
10278 || dep->semantics == IA64_DVS_INSTR
10279 || dep->semantics == IA64_DVS_SPECIFIC)
10281 if (regdeps[i].insn_srlz == STATE_NONE)
10282 regdeps[i].insn_srlz = STATE_STOP;
10283 if (regdeps[i].data_srlz == STATE_NONE)
10284 regdeps[i].data_srlz = STATE_STOP;
10291 /* Add the given resource usage spec to the list of active dependencies. */
10294 mark_resource (idesc, dep, spec, depind, path)
10295 struct ia64_opcode *idesc ATTRIBUTE_UNUSED;
10296 const struct ia64_dependency *dep ATTRIBUTE_UNUSED;
10301 if (regdepslen == regdepstotlen)
10303 regdepstotlen += 20;
10304 regdeps = (struct rsrc *)
10305 xrealloc ((void *) regdeps,
10306 regdepstotlen * sizeof (struct rsrc));
10309 regdeps[regdepslen] = *spec;
10310 regdeps[regdepslen].depind = depind;
10311 regdeps[regdepslen].path = path;
10312 regdeps[regdepslen].file = CURR_SLOT.src_file;
10313 regdeps[regdepslen].line = CURR_SLOT.src_line;
10315 print_dependency ("Adding", regdepslen);
10321 print_dependency (action, depind)
10322 const char *action;
10327 fprintf (stderr, " %s %s '%s'",
10328 action, dv_mode[(regdeps[depind].dependency)->mode],
10329 (regdeps[depind].dependency)->name);
10330 if (regdeps[depind].specific && regdeps[depind].index >= 0)
10331 fprintf (stderr, " (%d)", regdeps[depind].index);
10332 if (regdeps[depind].mem_offset.hint)
10334 fputs (" ", stderr);
10335 fprintf_vma (stderr, regdeps[depind].mem_offset.base);
10336 fputs ("+", stderr);
10337 fprintf_vma (stderr, regdeps[depind].mem_offset.offset);
10339 fprintf (stderr, "\n");
10344 instruction_serialization ()
10348 fprintf (stderr, " Instruction serialization\n");
10349 for (i = 0; i < regdepslen; i++)
10350 if (regdeps[i].insn_srlz == STATE_STOP)
10351 regdeps[i].insn_srlz = STATE_SRLZ;
10355 data_serialization ()
10359 fprintf (stderr, " Data serialization\n");
10360 while (i < regdepslen)
10362 if (regdeps[i].data_srlz == STATE_STOP
10363 /* Note: as of 991210, all "other" dependencies are cleared by a
10364 data serialization. This might change with new tables */
10365 || (regdeps[i].dependency)->semantics == IA64_DVS_OTHER)
10367 print_dependency ("Removing", i);
10368 regdeps[i] = regdeps[--regdepslen];
10375 /* Insert stops and serializations as needed to avoid DVs. */
10378 remove_marked_resource (rs)
10381 switch (rs->dependency->semantics)
10383 case IA64_DVS_SPECIFIC:
10385 fprintf (stderr, "Implementation-specific, assume worst case...\n");
10386 /* ...fall through... */
10387 case IA64_DVS_INSTR:
10389 fprintf (stderr, "Inserting instr serialization\n");
10390 if (rs->insn_srlz < STATE_STOP)
10391 insn_group_break (1, 0, 0);
10392 if (rs->insn_srlz < STATE_SRLZ)
10394 struct slot oldslot = CURR_SLOT;
10395 /* Manually jam a srlz.i insn into the stream */
10396 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10397 CURR_SLOT.user_template = -1;
10398 CURR_SLOT.idesc = ia64_find_opcode ("srlz.i");
10399 instruction_serialization ();
10400 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10401 if (++md.num_slots_in_use >= NUM_SLOTS)
10402 emit_one_bundle ();
10403 CURR_SLOT = oldslot;
10405 insn_group_break (1, 0, 0);
10407 case IA64_DVS_OTHER: /* as of rev2 (991220) of the DV tables, all
10408 "other" types of DV are eliminated
10409 by a data serialization */
10410 case IA64_DVS_DATA:
10412 fprintf (stderr, "Inserting data serialization\n");
10413 if (rs->data_srlz < STATE_STOP)
10414 insn_group_break (1, 0, 0);
10416 struct slot oldslot = CURR_SLOT;
10417 /* Manually jam a srlz.d insn into the stream */
10418 memset (&CURR_SLOT, 0, sizeof (CURR_SLOT));
10419 CURR_SLOT.user_template = -1;
10420 CURR_SLOT.idesc = ia64_find_opcode ("srlz.d");
10421 data_serialization ();
10422 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10423 if (++md.num_slots_in_use >= NUM_SLOTS)
10424 emit_one_bundle ();
10425 CURR_SLOT = oldslot;
10428 case IA64_DVS_IMPLIED:
10429 case IA64_DVS_IMPLIEDF:
10431 fprintf (stderr, "Inserting stop\n");
10432 insn_group_break (1, 0, 0);
10439 /* Check the resources used by the given opcode against the current dependency
10442 The check is run once for each execution path encountered. In this case,
10443 a unique execution path is the sequence of instructions following a code
10444 entry point, e.g. the following has three execution paths, one starting
10445 at L0, one at L1, and one at L2.
10454 check_dependencies (idesc)
10455 struct ia64_opcode *idesc;
10457 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10461 /* Note that the number of marked resources may change within the
10462 loop if in auto mode. */
10464 while (i < regdepslen)
10466 struct rsrc *rs = ®deps[i];
10467 const struct ia64_dependency *dep = rs->dependency;
10470 int start_over = 0;
10472 if (dep->semantics == IA64_DVS_NONE
10473 || (chkind = depends_on (rs->depind, idesc)) == -1)
10479 note = NOTE (opdeps->chks[chkind]);
10481 /* Check this resource against each execution path seen thus far. */
10482 for (path = 0; path <= md.path; path++)
10486 /* If the dependency wasn't on the path being checked, ignore it. */
10487 if (rs->path < path)
10490 /* If the QP for this insn implies a QP which has branched, don't
10491 bother checking. Ed. NOTE: I don't think this check is terribly
10492 useful; what's the point of generating code which will only be
10493 reached if its QP is zero?
10494 This code was specifically inserted to handle the following code,
10495 based on notes from Intel's DV checking code, where p1 implies p2.
10501 if (CURR_SLOT.qp_regno != 0)
10505 for (implies = 0; implies < qp_implieslen; implies++)
10507 if (qp_implies[implies].path >= path
10508 && qp_implies[implies].p1 == CURR_SLOT.qp_regno
10509 && qp_implies[implies].p2_branched)
10519 if ((matchtype = resources_match (rs, idesc, note,
10520 CURR_SLOT.qp_regno, path)) != 0)
10523 char pathmsg[256] = "";
10524 char indexmsg[256] = "";
10525 int certain = (matchtype == 1 && CURR_SLOT.qp_regno == 0);
10528 sprintf (pathmsg, " when entry is at label '%s'",
10529 md.entry_labels[path - 1]);
10530 if (matchtype == 1 && rs->index >= 0)
10531 sprintf (indexmsg, ", specific resource number is %d",
10533 sprintf (msg, "Use of '%s' %s %s dependency '%s' (%s)%s%s",
10535 (certain ? "violates" : "may violate"),
10536 dv_mode[dep->mode], dep->name,
10537 dv_sem[dep->semantics],
10538 pathmsg, indexmsg);
10540 if (md.explicit_mode)
10542 as_warn ("%s", msg);
10543 if (path < md.path)
10544 as_warn (_("Only the first path encountering the conflict "
10546 as_warn_where (rs->file, rs->line,
10547 _("This is the location of the "
10548 "conflicting usage"));
10549 /* Don't bother checking other paths, to avoid duplicating
10550 the same warning */
10556 fprintf (stderr, "%s @ %s:%d\n", msg, rs->file, rs->line);
10558 remove_marked_resource (rs);
10560 /* since the set of dependencies has changed, start over */
10561 /* FIXME -- since we're removing dvs as we go, we
10562 probably don't really need to start over... */
10575 /* Register new dependencies based on the given opcode. */
10578 mark_resources (idesc)
10579 struct ia64_opcode *idesc;
10582 const struct ia64_opcode_dependency *opdeps = idesc->dependencies;
10583 int add_only_qp_reads = 0;
10585 /* A conditional branch only uses its resources if it is taken; if it is
10586 taken, we stop following that path. The other branch types effectively
10587 *always* write their resources. If it's not taken, register only QP
10589 if (is_conditional_branch (idesc) || is_interruption_or_rfi (idesc))
10591 add_only_qp_reads = 1;
10595 fprintf (stderr, "Registering '%s' resource usage\n", idesc->name);
10597 for (i = 0; i < opdeps->nregs; i++)
10599 const struct ia64_dependency *dep;
10600 struct rsrc specs[MAX_SPECS];
10605 dep = ia64_find_dependency (opdeps->regs[i]);
10606 note = NOTE (opdeps->regs[i]);
10608 if (add_only_qp_reads
10609 && !(dep->mode == IA64_DV_WAR
10610 && (dep->specifier == IA64_RS_PR
10611 || dep->specifier == IA64_RS_PRr
10612 || dep->specifier == IA64_RS_PR63)))
10615 count = specify_resource (dep, idesc, DV_REG, specs, note, md.path);
10617 while (count-- > 0)
10619 mark_resource (idesc, dep, &specs[count],
10620 DEP (opdeps->regs[i]), md.path);
10623 /* The execution path may affect register values, which may in turn
10624 affect which indirect-access resources are accessed. */
10625 switch (dep->specifier)
10629 case IA64_RS_CPUID:
10637 for (path = 0; path < md.path; path++)
10639 count = specify_resource (dep, idesc, DV_REG, specs, note, path);
10640 while (count-- > 0)
10641 mark_resource (idesc, dep, &specs[count],
10642 DEP (opdeps->regs[i]), path);
10649 /* Remove dependencies when they no longer apply. */
10652 update_dependencies (idesc)
10653 struct ia64_opcode *idesc;
10657 if (strcmp (idesc->name, "srlz.i") == 0)
10659 instruction_serialization ();
10661 else if (strcmp (idesc->name, "srlz.d") == 0)
10663 data_serialization ();
10665 else if (is_interruption_or_rfi (idesc)
10666 || is_taken_branch (idesc))
10668 /* Although technically the taken branch doesn't clear dependencies
10669 which require a srlz.[id], we don't follow the branch; the next
10670 instruction is assumed to start with a clean slate. */
10674 else if (is_conditional_branch (idesc)
10675 && CURR_SLOT.qp_regno != 0)
10677 int is_call = strstr (idesc->name, ".call") != NULL;
10679 for (i = 0; i < qp_implieslen; i++)
10681 /* If the conditional branch's predicate is implied by the predicate
10682 in an existing dependency, remove that dependency. */
10683 if (qp_implies[i].p2 == CURR_SLOT.qp_regno)
10686 /* Note that this implied predicate takes a branch so that if
10687 a later insn generates a DV but its predicate implies this
10688 one, we can avoid the false DV warning. */
10689 qp_implies[i].p2_branched = 1;
10690 while (depind < regdepslen)
10692 if (regdeps[depind].qp_regno == qp_implies[i].p1)
10694 print_dependency ("Removing", depind);
10695 regdeps[depind] = regdeps[--regdepslen];
10702 /* Any marked resources which have this same predicate should be
10703 cleared, provided that the QP hasn't been modified between the
10704 marking instruction and the branch. */
10707 insn_group_break (0, CURR_SLOT.qp_regno, 1);
10712 while (i < regdepslen)
10714 if (regdeps[i].qp_regno == CURR_SLOT.qp_regno
10715 && regdeps[i].link_to_qp_branch
10716 && (regdeps[i].file != CURR_SLOT.src_file
10717 || regdeps[i].line != CURR_SLOT.src_line))
10719 /* Treat like a taken branch */
10720 print_dependency ("Removing", i);
10721 regdeps[i] = regdeps[--regdepslen];
10730 /* Examine the current instruction for dependency violations. */
10734 struct ia64_opcode *idesc;
10738 fprintf (stderr, "Checking %s for violations (line %d, %d/%d)\n",
10739 idesc->name, CURR_SLOT.src_line,
10740 idesc->dependencies->nchks,
10741 idesc->dependencies->nregs);
10744 /* Look through the list of currently marked resources; if the current
10745 instruction has the dependency in its chks list which uses that resource,
10746 check against the specific resources used. */
10747 check_dependencies (idesc);
10749 /* Look up the instruction's regdeps (RAW writes, WAW writes, and WAR reads),
10750 then add them to the list of marked resources. */
10751 mark_resources (idesc);
10753 /* There are several types of dependency semantics, and each has its own
10754 requirements for being cleared
10756 Instruction serialization (insns separated by interruption, rfi, or
10757 writer + srlz.i + reader, all in separate groups) clears DVS_INSTR.
10759 Data serialization (instruction serialization, or writer + srlz.d +
10760 reader, where writer and srlz.d are in separate groups) clears
10761 DVS_DATA. (This also clears DVS_OTHER, but that is not guaranteed to
10762 always be the case).
10764 Instruction group break (groups separated by stop, taken branch,
10765 interruption or rfi) clears DVS_IMPLIED and DVS_IMPLIEDF.
10767 update_dependencies (idesc);
10769 /* Sometimes, knowing a register value allows us to avoid giving a false DV
10770 warning. Keep track of as many as possible that are useful. */
10771 note_register_values (idesc);
10773 /* We don't need or want this anymore. */
10774 md.mem_offset.hint = 0;
10779 /* Translate one line of assembly. Pseudo ops and labels do not show
10785 char *saved_input_line_pointer, *mnemonic;
10786 const struct pseudo_opcode *pdesc;
10787 struct ia64_opcode *idesc;
10788 unsigned char qp_regno;
10789 unsigned int flags;
10792 saved_input_line_pointer = input_line_pointer;
10793 input_line_pointer = str;
10795 /* extract the opcode (mnemonic): */
10797 mnemonic = input_line_pointer;
10798 ch = get_symbol_end ();
10799 pdesc = (struct pseudo_opcode *) hash_find (md.pseudo_hash, mnemonic);
10802 *input_line_pointer = ch;
10803 (*pdesc->handler) (pdesc->arg);
10807 /* Find the instruction descriptor matching the arguments. */
10809 idesc = ia64_find_opcode (mnemonic);
10810 *input_line_pointer = ch;
10813 as_bad ("Unknown opcode `%s'", mnemonic);
10817 idesc = parse_operands (idesc);
10821 /* Handle the dynamic ops we can handle now: */
10822 if (idesc->type == IA64_TYPE_DYN)
10824 if (strcmp (idesc->name, "add") == 0)
10826 if (CURR_SLOT.opnd[2].X_op == O_register
10827 && CURR_SLOT.opnd[2].X_add_number < 4)
10831 ia64_free_opcode (idesc);
10832 idesc = ia64_find_opcode (mnemonic);
10834 else if (strcmp (idesc->name, "mov") == 0)
10836 enum ia64_opnd opnd1, opnd2;
10839 opnd1 = idesc->operands[0];
10840 opnd2 = idesc->operands[1];
10841 if (opnd1 == IA64_OPND_AR3)
10843 else if (opnd2 == IA64_OPND_AR3)
10847 if (CURR_SLOT.opnd[rop].X_op == O_register)
10849 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10850 mnemonic = "mov.i";
10851 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10852 mnemonic = "mov.m";
10860 ia64_free_opcode (idesc);
10861 idesc = ia64_find_opcode (mnemonic);
10862 while (idesc != NULL
10863 && (idesc->operands[0] != opnd1
10864 || idesc->operands[1] != opnd2))
10865 idesc = get_next_opcode (idesc);
10869 else if (strcmp (idesc->name, "mov.i") == 0
10870 || strcmp (idesc->name, "mov.m") == 0)
10872 enum ia64_opnd opnd1, opnd2;
10875 opnd1 = idesc->operands[0];
10876 opnd2 = idesc->operands[1];
10877 if (opnd1 == IA64_OPND_AR3)
10879 else if (opnd2 == IA64_OPND_AR3)
10883 if (CURR_SLOT.opnd[rop].X_op == O_register)
10886 if (ar_is_only_in_integer_unit (CURR_SLOT.opnd[rop].X_add_number))
10888 else if (ar_is_only_in_memory_unit (CURR_SLOT.opnd[rop].X_add_number))
10890 if (unit != 'a' && unit != idesc->name [4])
10891 as_bad ("AR %d can only be accessed by %c-unit",
10892 (int) (CURR_SLOT.opnd[rop].X_add_number - REG_AR),
10896 else if (strcmp (idesc->name, "hint.b") == 0)
10902 case hint_b_warning:
10903 as_warn ("hint.b may be treated as nop");
10906 as_bad ("hint.b shouldn't be used");
10912 if (md.qp.X_op == O_register)
10914 qp_regno = md.qp.X_add_number - REG_P;
10915 md.qp.X_op = O_absent;
10918 flags = idesc->flags;
10920 if ((flags & IA64_OPCODE_FIRST) != 0)
10922 /* The alignment frag has to end with a stop bit only if the
10923 next instruction after the alignment directive has to be
10924 the first instruction in an instruction group. */
10927 while (align_frag->fr_type != rs_align_code)
10929 align_frag = align_frag->fr_next;
10933 /* align_frag can be NULL if there are directives in
10935 if (align_frag && align_frag->fr_next == frag_now)
10936 align_frag->tc_frag_data = 1;
10939 insn_group_break (1, 0, 0);
10943 if ((flags & IA64_OPCODE_NO_PRED) != 0 && qp_regno != 0)
10945 as_bad ("`%s' cannot be predicated", idesc->name);
10949 /* Build the instruction. */
10950 CURR_SLOT.qp_regno = qp_regno;
10951 CURR_SLOT.idesc = idesc;
10952 as_where (&CURR_SLOT.src_file, &CURR_SLOT.src_line);
10953 dwarf2_where (&CURR_SLOT.debug_line);
10955 /* Add unwind entries, if there are any. */
10956 if (unwind.current_entry)
10958 CURR_SLOT.unwind_record = unwind.current_entry;
10959 unwind.current_entry = NULL;
10961 if (unwind.pending_saves)
10963 if (unwind.pending_saves->next)
10965 /* Attach the next pending save to the next slot so that its
10966 slot number will get set correctly. */
10967 add_unwind_entry (unwind.pending_saves->next, NOT_A_CHAR);
10968 unwind.pending_saves = &unwind.pending_saves->next->r.record.p;
10971 unwind.pending_saves = NULL;
10973 if (unwind.proc_pending.sym && S_IS_DEFINED (unwind.proc_pending.sym))
10976 /* Check for dependency violations. */
10980 md.curr_slot = (md.curr_slot + 1) % NUM_SLOTS;
10981 if (++md.num_slots_in_use >= NUM_SLOTS)
10982 emit_one_bundle ();
10984 if ((flags & IA64_OPCODE_LAST) != 0)
10985 insn_group_break (1, 0, 0);
10987 md.last_text_seg = now_seg;
10990 input_line_pointer = saved_input_line_pointer;
10993 /* Called when symbol NAME cannot be found in the symbol table.
10994 Should be used for dynamic valued symbols only. */
10997 md_undefined_symbol (name)
10998 char *name ATTRIBUTE_UNUSED;
11003 /* Called for any expression that can not be recognized. When the
11004 function is called, `input_line_pointer' will point to the start of
11011 switch (*input_line_pointer)
11014 ++input_line_pointer;
11015 expression_and_evaluate (e);
11016 if (*input_line_pointer != ']')
11018 as_bad ("Closing bracket missing");
11023 if (e->X_op != O_register)
11024 as_bad ("Register expected as index");
11026 ++input_line_pointer;
11037 ignore_rest_of_line ();
11040 /* Return 1 if it's OK to adjust a reloc by replacing the symbol with
11041 a section symbol plus some offset. For relocs involving @fptr(),
11042 directives we don't want such adjustments since we need to have the
11043 original symbol's name in the reloc. */
11045 ia64_fix_adjustable (fix)
11048 /* Prevent all adjustments to global symbols */
11049 if (S_IS_EXTERNAL (fix->fx_addsy) || S_IS_WEAK (fix->fx_addsy))
11052 switch (fix->fx_r_type)
11054 case BFD_RELOC_IA64_FPTR64I:
11055 case BFD_RELOC_IA64_FPTR32MSB:
11056 case BFD_RELOC_IA64_FPTR32LSB:
11057 case BFD_RELOC_IA64_FPTR64MSB:
11058 case BFD_RELOC_IA64_FPTR64LSB:
11059 case BFD_RELOC_IA64_LTOFF_FPTR22:
11060 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11070 ia64_force_relocation (fix)
11073 switch (fix->fx_r_type)
11075 case BFD_RELOC_IA64_FPTR64I:
11076 case BFD_RELOC_IA64_FPTR32MSB:
11077 case BFD_RELOC_IA64_FPTR32LSB:
11078 case BFD_RELOC_IA64_FPTR64MSB:
11079 case BFD_RELOC_IA64_FPTR64LSB:
11081 case BFD_RELOC_IA64_LTOFF22:
11082 case BFD_RELOC_IA64_LTOFF64I:
11083 case BFD_RELOC_IA64_LTOFF_FPTR22:
11084 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11085 case BFD_RELOC_IA64_PLTOFF22:
11086 case BFD_RELOC_IA64_PLTOFF64I:
11087 case BFD_RELOC_IA64_PLTOFF64MSB:
11088 case BFD_RELOC_IA64_PLTOFF64LSB:
11090 case BFD_RELOC_IA64_LTOFF22X:
11091 case BFD_RELOC_IA64_LDXMOV:
11098 return generic_force_reloc (fix);
11101 /* Decide from what point a pc-relative relocation is relative to,
11102 relative to the pc-relative fixup. Er, relatively speaking. */
11104 ia64_pcrel_from_section (fix, sec)
11108 unsigned long off = fix->fx_frag->fr_address + fix->fx_where;
11110 if (bfd_get_section_flags (stdoutput, sec) & SEC_CODE)
11117 /* Used to emit section-relative relocs for the dwarf2 debug data. */
11119 ia64_dwarf2_emit_offset (symbolS *symbol, unsigned int size)
11123 expr.X_op = O_pseudo_fixup;
11124 expr.X_op_symbol = pseudo_func[FUNC_SEC_RELATIVE].u.sym;
11125 expr.X_add_number = 0;
11126 expr.X_add_symbol = symbol;
11127 emit_expr (&expr, size);
11130 /* This is called whenever some data item (not an instruction) needs a
11131 fixup. We pick the right reloc code depending on the byteorder
11132 currently in effect. */
11134 ia64_cons_fix_new (f, where, nbytes, exp)
11140 bfd_reloc_code_real_type code;
11145 /* There are no reloc for 8 and 16 bit quantities, but we allow
11146 them here since they will work fine as long as the expression
11147 is fully defined at the end of the pass over the source file. */
11148 case 1: code = BFD_RELOC_8; break;
11149 case 2: code = BFD_RELOC_16; break;
11151 if (target_big_endian)
11152 code = BFD_RELOC_IA64_DIR32MSB;
11154 code = BFD_RELOC_IA64_DIR32LSB;
11158 /* In 32-bit mode, data8 could mean function descriptors too. */
11159 if (exp->X_op == O_pseudo_fixup
11160 && exp->X_op_symbol
11161 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC
11162 && !(md.flags & EF_IA_64_ABI64))
11164 if (target_big_endian)
11165 code = BFD_RELOC_IA64_IPLTMSB;
11167 code = BFD_RELOC_IA64_IPLTLSB;
11168 exp->X_op = O_symbol;
11173 if (target_big_endian)
11174 code = BFD_RELOC_IA64_DIR64MSB;
11176 code = BFD_RELOC_IA64_DIR64LSB;
11181 if (exp->X_op == O_pseudo_fixup
11182 && exp->X_op_symbol
11183 && S_GET_VALUE (exp->X_op_symbol) == FUNC_IPLT_RELOC)
11185 if (target_big_endian)
11186 code = BFD_RELOC_IA64_IPLTMSB;
11188 code = BFD_RELOC_IA64_IPLTLSB;
11189 exp->X_op = O_symbol;
11195 as_bad ("Unsupported fixup size %d", nbytes);
11196 ignore_rest_of_line ();
11200 if (exp->X_op == O_pseudo_fixup)
11202 exp->X_op = O_symbol;
11203 code = ia64_gen_real_reloc_type (exp->X_op_symbol, code);
11204 /* ??? If code unchanged, unsupported. */
11207 fix = fix_new_exp (f, where, nbytes, exp, 0, code);
11208 /* We need to store the byte order in effect in case we're going
11209 to fix an 8 or 16 bit relocation (for which there no real
11210 relocs available). See md_apply_fix(). */
11211 fix->tc_fix_data.bigendian = target_big_endian;
11214 /* Return the actual relocation we wish to associate with the pseudo
11215 reloc described by SYM and R_TYPE. SYM should be one of the
11216 symbols in the pseudo_func array, or NULL. */
11218 static bfd_reloc_code_real_type
11219 ia64_gen_real_reloc_type (sym, r_type)
11220 struct symbol *sym;
11221 bfd_reloc_code_real_type r_type;
11223 bfd_reloc_code_real_type new = 0;
11224 const char *type = NULL, *suffix = "";
11231 switch (S_GET_VALUE (sym))
11233 case FUNC_FPTR_RELATIVE:
11236 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_FPTR64I; break;
11237 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_FPTR32MSB; break;
11238 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_FPTR32LSB; break;
11239 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_FPTR64MSB; break;
11240 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_FPTR64LSB; break;
11241 default: type = "FPTR"; break;
11245 case FUNC_GP_RELATIVE:
11248 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_GPREL22; break;
11249 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_GPREL64I; break;
11250 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_GPREL32MSB; break;
11251 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_GPREL32LSB; break;
11252 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_GPREL64MSB; break;
11253 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_GPREL64LSB; break;
11254 default: type = "GPREL"; break;
11258 case FUNC_LT_RELATIVE:
11261 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22; break;
11262 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_LTOFF64I; break;
11263 default: type = "LTOFF"; break;
11267 case FUNC_LT_RELATIVE_X:
11270 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_LTOFF22X; break;
11271 default: type = "LTOFF"; suffix = "X"; break;
11275 case FUNC_PC_RELATIVE:
11278 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PCREL22; break;
11279 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PCREL64I; break;
11280 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_PCREL32MSB; break;
11281 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_PCREL32LSB; break;
11282 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PCREL64MSB; break;
11283 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PCREL64LSB; break;
11284 default: type = "PCREL"; break;
11288 case FUNC_PLT_RELATIVE:
11291 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_PLTOFF22; break;
11292 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_PLTOFF64I; break;
11293 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_PLTOFF64MSB;break;
11294 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_PLTOFF64LSB;break;
11295 default: type = "PLTOFF"; break;
11299 case FUNC_SEC_RELATIVE:
11302 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SECREL32MSB;break;
11303 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SECREL32LSB;break;
11304 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SECREL64MSB;break;
11305 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SECREL64LSB;break;
11306 default: type = "SECREL"; break;
11310 case FUNC_SEG_RELATIVE:
11313 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_SEGREL32MSB;break;
11314 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_SEGREL32LSB;break;
11315 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_SEGREL64MSB;break;
11316 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_SEGREL64LSB;break;
11317 default: type = "SEGREL"; break;
11321 case FUNC_LTV_RELATIVE:
11324 case BFD_RELOC_IA64_DIR32MSB: new = BFD_RELOC_IA64_LTV32MSB; break;
11325 case BFD_RELOC_IA64_DIR32LSB: new = BFD_RELOC_IA64_LTV32LSB; break;
11326 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_LTV64MSB; break;
11327 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_LTV64LSB; break;
11328 default: type = "LTV"; break;
11332 case FUNC_LT_FPTR_RELATIVE:
11335 case BFD_RELOC_IA64_IMM22:
11336 new = BFD_RELOC_IA64_LTOFF_FPTR22; break;
11337 case BFD_RELOC_IA64_IMM64:
11338 new = BFD_RELOC_IA64_LTOFF_FPTR64I; break;
11339 case BFD_RELOC_IA64_DIR32MSB:
11340 new = BFD_RELOC_IA64_LTOFF_FPTR32MSB; break;
11341 case BFD_RELOC_IA64_DIR32LSB:
11342 new = BFD_RELOC_IA64_LTOFF_FPTR32LSB; break;
11343 case BFD_RELOC_IA64_DIR64MSB:
11344 new = BFD_RELOC_IA64_LTOFF_FPTR64MSB; break;
11345 case BFD_RELOC_IA64_DIR64LSB:
11346 new = BFD_RELOC_IA64_LTOFF_FPTR64LSB; break;
11348 type = "LTOFF_FPTR"; break;
11352 case FUNC_TP_RELATIVE:
11355 case BFD_RELOC_IA64_IMM14: new = BFD_RELOC_IA64_TPREL14; break;
11356 case BFD_RELOC_IA64_IMM22: new = BFD_RELOC_IA64_TPREL22; break;
11357 case BFD_RELOC_IA64_IMM64: new = BFD_RELOC_IA64_TPREL64I; break;
11358 case BFD_RELOC_IA64_DIR64MSB: new = BFD_RELOC_IA64_TPREL64MSB; break;
11359 case BFD_RELOC_IA64_DIR64LSB: new = BFD_RELOC_IA64_TPREL64LSB; break;
11360 default: type = "TPREL"; break;
11364 case FUNC_LT_TP_RELATIVE:
11367 case BFD_RELOC_IA64_IMM22:
11368 new = BFD_RELOC_IA64_LTOFF_TPREL22; break;
11370 type = "LTOFF_TPREL"; break;
11374 case FUNC_DTP_MODULE:
11377 case BFD_RELOC_IA64_DIR64MSB:
11378 new = BFD_RELOC_IA64_DTPMOD64MSB; break;
11379 case BFD_RELOC_IA64_DIR64LSB:
11380 new = BFD_RELOC_IA64_DTPMOD64LSB; break;
11382 type = "DTPMOD"; break;
11386 case FUNC_LT_DTP_MODULE:
11389 case BFD_RELOC_IA64_IMM22:
11390 new = BFD_RELOC_IA64_LTOFF_DTPMOD22; break;
11392 type = "LTOFF_DTPMOD"; break;
11396 case FUNC_DTP_RELATIVE:
11399 case BFD_RELOC_IA64_DIR32MSB:
11400 new = BFD_RELOC_IA64_DTPREL32MSB; break;
11401 case BFD_RELOC_IA64_DIR32LSB:
11402 new = BFD_RELOC_IA64_DTPREL32LSB; break;
11403 case BFD_RELOC_IA64_DIR64MSB:
11404 new = BFD_RELOC_IA64_DTPREL64MSB; break;
11405 case BFD_RELOC_IA64_DIR64LSB:
11406 new = BFD_RELOC_IA64_DTPREL64LSB; break;
11407 case BFD_RELOC_IA64_IMM14:
11408 new = BFD_RELOC_IA64_DTPREL14; break;
11409 case BFD_RELOC_IA64_IMM22:
11410 new = BFD_RELOC_IA64_DTPREL22; break;
11411 case BFD_RELOC_IA64_IMM64:
11412 new = BFD_RELOC_IA64_DTPREL64I; break;
11414 type = "DTPREL"; break;
11418 case FUNC_LT_DTP_RELATIVE:
11421 case BFD_RELOC_IA64_IMM22:
11422 new = BFD_RELOC_IA64_LTOFF_DTPREL22; break;
11424 type = "LTOFF_DTPREL"; break;
11428 case FUNC_IPLT_RELOC:
11431 case BFD_RELOC_IA64_IPLTMSB: return r_type;
11432 case BFD_RELOC_IA64_IPLTLSB: return r_type;
11433 default: type = "IPLT"; break;
11451 case BFD_RELOC_IA64_DIR32MSB: width = 32; suffix = "MSB"; break;
11452 case BFD_RELOC_IA64_DIR32LSB: width = 32; suffix = "LSB"; break;
11453 case BFD_RELOC_IA64_DIR64MSB: width = 64; suffix = "MSB"; break;
11454 case BFD_RELOC_IA64_DIR64LSB: width = 64; suffix = "LSB"; break;
11455 case BFD_RELOC_UNUSED: width = 13; break;
11456 case BFD_RELOC_IA64_IMM14: width = 14; break;
11457 case BFD_RELOC_IA64_IMM22: width = 22; break;
11458 case BFD_RELOC_IA64_IMM64: width = 64; suffix = "I"; break;
11462 /* This should be an error, but since previously there wasn't any
11463 diagnostic here, dont't make it fail because of this for now. */
11464 as_warn ("Cannot express %s%d%s relocation", type, width, suffix);
11469 /* Here is where generate the appropriate reloc for pseudo relocation
11472 ia64_validate_fix (fix)
11475 switch (fix->fx_r_type)
11477 case BFD_RELOC_IA64_FPTR64I:
11478 case BFD_RELOC_IA64_FPTR32MSB:
11479 case BFD_RELOC_IA64_FPTR64LSB:
11480 case BFD_RELOC_IA64_LTOFF_FPTR22:
11481 case BFD_RELOC_IA64_LTOFF_FPTR64I:
11482 if (fix->fx_offset != 0)
11483 as_bad_where (fix->fx_file, fix->fx_line,
11484 "No addend allowed in @fptr() relocation");
11492 fix_insn (fix, odesc, value)
11494 const struct ia64_operand *odesc;
11497 bfd_vma insn[3], t0, t1, control_bits;
11502 slot = fix->fx_where & 0x3;
11503 fixpos = fix->fx_frag->fr_literal + (fix->fx_where - slot);
11505 /* Bundles are always in little-endian byte order */
11506 t0 = bfd_getl64 (fixpos);
11507 t1 = bfd_getl64 (fixpos + 8);
11508 control_bits = t0 & 0x1f;
11509 insn[0] = (t0 >> 5) & 0x1ffffffffffLL;
11510 insn[1] = ((t0 >> 46) & 0x3ffff) | ((t1 & 0x7fffff) << 18);
11511 insn[2] = (t1 >> 23) & 0x1ffffffffffLL;
11514 if (odesc - elf64_ia64_operands == IA64_OPND_IMMU64)
11516 insn[1] = (value >> 22) & 0x1ffffffffffLL;
11517 insn[2] |= (((value & 0x7f) << 13)
11518 | (((value >> 7) & 0x1ff) << 27)
11519 | (((value >> 16) & 0x1f) << 22)
11520 | (((value >> 21) & 0x1) << 21)
11521 | (((value >> 63) & 0x1) << 36));
11523 else if (odesc - elf64_ia64_operands == IA64_OPND_IMMU62)
11525 if (value & ~0x3fffffffffffffffULL)
11526 err = "integer operand out of range";
11527 insn[1] = (value >> 21) & 0x1ffffffffffLL;
11528 insn[2] |= (((value & 0xfffff) << 6) | (((value >> 20) & 0x1) << 36));
11530 else if (odesc - elf64_ia64_operands == IA64_OPND_TGT64)
11533 insn[1] = ((value >> 20) & 0x7fffffffffLL) << 2;
11534 insn[2] |= ((((value >> 59) & 0x1) << 36)
11535 | (((value >> 0) & 0xfffff) << 13));
11538 err = (*odesc->insert) (odesc, value, insn + slot);
11541 as_bad_where (fix->fx_file, fix->fx_line, err);
11543 t0 = control_bits | (insn[0] << 5) | (insn[1] << 46);
11544 t1 = ((insn[1] >> 18) & 0x7fffff) | (insn[2] << 23);
11545 number_to_chars_littleendian (fixpos + 0, t0, 8);
11546 number_to_chars_littleendian (fixpos + 8, t1, 8);
11549 /* Attempt to simplify or even eliminate a fixup. The return value is
11550 ignored; perhaps it was once meaningful, but now it is historical.
11551 To indicate that a fixup has been eliminated, set FIXP->FX_DONE.
11553 If fixp->fx_addsy is non-NULL, we'll have to generate a reloc entry
11557 md_apply_fix (fix, valP, seg)
11560 segT seg ATTRIBUTE_UNUSED;
11563 valueT value = *valP;
11565 fixpos = fix->fx_frag->fr_literal + fix->fx_where;
11569 switch (fix->fx_r_type)
11571 case BFD_RELOC_IA64_PCREL21B: break;
11572 case BFD_RELOC_IA64_PCREL21BI: break;
11573 case BFD_RELOC_IA64_PCREL21F: break;
11574 case BFD_RELOC_IA64_PCREL21M: break;
11575 case BFD_RELOC_IA64_PCREL60B: break;
11576 case BFD_RELOC_IA64_PCREL22: break;
11577 case BFD_RELOC_IA64_PCREL64I: break;
11578 case BFD_RELOC_IA64_PCREL32MSB: break;
11579 case BFD_RELOC_IA64_PCREL32LSB: break;
11580 case BFD_RELOC_IA64_PCREL64MSB: break;
11581 case BFD_RELOC_IA64_PCREL64LSB: break;
11583 fix->fx_r_type = ia64_gen_real_reloc_type (pseudo_func[FUNC_PC_RELATIVE].u.sym,
11590 switch (fix->fx_r_type)
11592 case BFD_RELOC_UNUSED:
11593 /* This must be a TAG13 or TAG13b operand. There are no external
11594 relocs defined for them, so we must give an error. */
11595 as_bad_where (fix->fx_file, fix->fx_line,
11596 "%s must have a constant value",
11597 elf64_ia64_operands[fix->tc_fix_data.opnd].desc);
11601 case BFD_RELOC_IA64_TPREL14:
11602 case BFD_RELOC_IA64_TPREL22:
11603 case BFD_RELOC_IA64_TPREL64I:
11604 case BFD_RELOC_IA64_LTOFF_TPREL22:
11605 case BFD_RELOC_IA64_LTOFF_DTPMOD22:
11606 case BFD_RELOC_IA64_DTPREL14:
11607 case BFD_RELOC_IA64_DTPREL22:
11608 case BFD_RELOC_IA64_DTPREL64I:
11609 case BFD_RELOC_IA64_LTOFF_DTPREL22:
11610 S_SET_THREAD_LOCAL (fix->fx_addsy);
11617 else if (fix->tc_fix_data.opnd == IA64_OPND_NIL)
11619 if (fix->tc_fix_data.bigendian)
11620 number_to_chars_bigendian (fixpos, value, fix->fx_size);
11622 number_to_chars_littleendian (fixpos, value, fix->fx_size);
11627 fix_insn (fix, elf64_ia64_operands + fix->tc_fix_data.opnd, value);
11632 /* Generate the BFD reloc to be stuck in the object file from the
11633 fixup used internally in the assembler. */
11636 tc_gen_reloc (sec, fixp)
11637 asection *sec ATTRIBUTE_UNUSED;
11642 reloc = xmalloc (sizeof (*reloc));
11643 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
11644 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
11645 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
11646 reloc->addend = fixp->fx_offset;
11647 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
11651 as_bad_where (fixp->fx_file, fixp->fx_line,
11652 "Cannot represent %s relocation in object file",
11653 bfd_get_reloc_code_name (fixp->fx_r_type));
11658 /* Turn a string in input_line_pointer into a floating point constant
11659 of type TYPE, and store the appropriate bytes in *LIT. The number
11660 of LITTLENUMS emitted is stored in *SIZE. An error message is
11661 returned, or NULL on OK. */
11663 #define MAX_LITTLENUMS 5
11666 md_atof (type, lit, size)
11671 LITTLENUM_TYPE words[MAX_LITTLENUMS];
11701 return "Bad call to MD_ATOF()";
11703 t = atof_ieee (input_line_pointer, type, words);
11705 input_line_pointer = t;
11707 (*ia64_float_to_chars) (lit, words, prec);
11711 /* It is 10 byte floating point with 6 byte padding. */
11712 memset (&lit [10], 0, 6);
11713 *size = 8 * sizeof (LITTLENUM_TYPE);
11716 *size = prec * sizeof (LITTLENUM_TYPE);
11721 /* Handle ia64 specific semantics of the align directive. */
11724 ia64_md_do_align (n, fill, len, max)
11725 int n ATTRIBUTE_UNUSED;
11726 const char *fill ATTRIBUTE_UNUSED;
11727 int len ATTRIBUTE_UNUSED;
11728 int max ATTRIBUTE_UNUSED;
11730 if (subseg_text_p (now_seg))
11731 ia64_flush_insns ();
11734 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
11735 of an rs_align_code fragment. */
11738 ia64_handle_align (fragp)
11743 const unsigned char *nop;
11745 if (fragp->fr_type != rs_align_code)
11748 /* Check if this frag has to end with a stop bit. */
11749 nop = fragp->tc_frag_data ? le_nop_stop : le_nop;
11751 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
11752 p = fragp->fr_literal + fragp->fr_fix;
11754 /* If no paddings are needed, we check if we need a stop bit. */
11755 if (!bytes && fragp->tc_frag_data)
11757 if (fragp->fr_fix < 16)
11759 /* FIXME: It won't work with
11761 alloc r32=ar.pfs,1,2,4,0
11765 as_bad_where (fragp->fr_file, fragp->fr_line,
11766 _("Can't add stop bit to mark end of instruction group"));
11769 /* Bundles are always in little-endian byte order. Make sure
11770 the previous bundle has the stop bit. */
11774 /* Make sure we are on a 16-byte boundary, in case someone has been
11775 putting data into a text section. */
11778 int fix = bytes & 15;
11779 memset (p, 0, fix);
11782 fragp->fr_fix += fix;
11785 /* Instruction bundles are always little-endian. */
11786 memcpy (p, nop, 16);
11787 fragp->fr_var = 16;
11791 ia64_float_to_chars_bigendian (char *lit, LITTLENUM_TYPE *words,
11796 number_to_chars_bigendian (lit, (long) (*words++),
11797 sizeof (LITTLENUM_TYPE));
11798 lit += sizeof (LITTLENUM_TYPE);
11803 ia64_float_to_chars_littleendian (char *lit, LITTLENUM_TYPE *words,
11808 number_to_chars_littleendian (lit, (long) (words[prec]),
11809 sizeof (LITTLENUM_TYPE));
11810 lit += sizeof (LITTLENUM_TYPE);
11815 ia64_elf_section_change_hook (void)
11817 if (elf_section_type (now_seg) == SHT_IA_64_UNWIND
11818 && elf_linked_to_section (now_seg) == NULL)
11819 elf_linked_to_section (now_seg) = text_section;
11820 dot_byteorder (-1);
11823 /* Check if a label should be made global. */
11825 ia64_check_label (symbolS *label)
11827 if (*input_line_pointer == ':')
11829 S_SET_EXTERNAL (label);
11830 input_line_pointer++;
11834 /* Used to remember where .alias and .secalias directives are seen. We
11835 will rename symbol and section names when we are about to output
11836 the relocatable file. */
11839 char *file; /* The file where the directive is seen. */
11840 unsigned int line; /* The line number the directive is at. */
11841 const char *name; /* The orignale name of the symbol. */
11844 /* Called for .alias and .secalias directives. If SECTION is 1, it is
11845 .secalias. Otherwise, it is .alias. */
11847 dot_alias (int section)
11849 char *name, *alias;
11853 const char *error_string;
11856 struct hash_control *ahash, *nhash;
11859 name = input_line_pointer;
11860 delim = get_symbol_end ();
11861 end_name = input_line_pointer;
11864 if (name == end_name)
11866 as_bad (_("expected symbol name"));
11867 ignore_rest_of_line ();
11871 SKIP_WHITESPACE ();
11873 if (*input_line_pointer != ',')
11876 as_bad (_("expected comma after \"%s\""), name);
11878 ignore_rest_of_line ();
11882 input_line_pointer++;
11884 ia64_canonicalize_symbol_name (name);
11886 /* We call demand_copy_C_string to check if alias string is valid.
11887 There should be a closing `"' and no `\0' in the string. */
11888 alias = demand_copy_C_string (&len);
11891 ignore_rest_of_line ();
11895 /* Make a copy of name string. */
11896 len = strlen (name) + 1;
11897 obstack_grow (¬es, name, len);
11898 name = obstack_finish (¬es);
11903 ahash = secalias_hash;
11904 nhash = secalias_name_hash;
11909 ahash = alias_hash;
11910 nhash = alias_name_hash;
11913 /* Check if alias has been used before. */
11914 h = (struct alias *) hash_find (ahash, alias);
11917 if (strcmp (h->name, name))
11918 as_bad (_("`%s' is already the alias of %s `%s'"),
11919 alias, kind, h->name);
11923 /* Check if name already has an alias. */
11924 a = (const char *) hash_find (nhash, name);
11927 if (strcmp (a, alias))
11928 as_bad (_("%s `%s' already has an alias `%s'"), kind, name, a);
11932 h = (struct alias *) xmalloc (sizeof (struct alias));
11933 as_where (&h->file, &h->line);
11936 error_string = hash_jam (ahash, alias, (PTR) h);
11939 as_fatal (_("inserting \"%s\" into %s alias hash table failed: %s"),
11940 alias, kind, error_string);
11944 error_string = hash_jam (nhash, name, (PTR) alias);
11947 as_fatal (_("inserting \"%s\" into %s name hash table failed: %s"),
11948 alias, kind, error_string);
11950 obstack_free (¬es, name);
11951 obstack_free (¬es, alias);
11954 demand_empty_rest_of_line ();
11957 /* It renames the original symbol name to its alias. */
11959 do_alias (const char *alias, PTR value)
11961 struct alias *h = (struct alias *) value;
11962 symbolS *sym = symbol_find (h->name);
11965 as_warn_where (h->file, h->line,
11966 _("symbol `%s' aliased to `%s' is not used"),
11969 S_SET_NAME (sym, (char *) alias);
11972 /* Called from write_object_file. */
11974 ia64_adjust_symtab (void)
11976 hash_traverse (alias_hash, do_alias);
11979 /* It renames the original section name to its alias. */
11981 do_secalias (const char *alias, PTR value)
11983 struct alias *h = (struct alias *) value;
11984 segT sec = bfd_get_section_by_name (stdoutput, h->name);
11987 as_warn_where (h->file, h->line,
11988 _("section `%s' aliased to `%s' is not used"),
11994 /* Called from write_object_file. */
11996 ia64_frob_file (void)
11998 hash_traverse (secalias_hash, do_secalias);