1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 91, 92, 93, 94, 95, 96, 97, 98, 1999
3 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 Intel 80386 machine specific gas.
24 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
25 Bugs & suggestions are completely welcome. This is free software.
26 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 #ifndef REGISTER_WARNINGS
40 #define REGISTER_WARNINGS 1
43 #ifndef SCALE1_WHEN_NO_INDEX
44 /* Specifying a scale factor besides 1 when there is no index is
45 futile. eg. `mov (%ebx,2),%al' does exactly the same as
46 `mov (%ebx),%al'. To slavishly follow what the programmer
47 specified, set SCALE1_WHEN_NO_INDEX to 0. */
48 #define SCALE1_WHEN_NO_INDEX 1
54 static unsigned int mode_from_disp_size PARAMS ((unsigned int));
55 static int fits_in_signed_byte PARAMS ((long));
56 static int fits_in_unsigned_byte PARAMS ((long));
57 static int fits_in_unsigned_word PARAMS ((long));
58 static int fits_in_signed_word PARAMS ((long));
59 static int smallest_imm_type PARAMS ((long));
60 static int add_prefix PARAMS ((unsigned int));
61 static void set_16bit_code_flag PARAMS ((int));
62 static void set_intel_syntax PARAMS ((int));
65 static bfd_reloc_code_real_type reloc
66 PARAMS ((int, int, bfd_reloc_code_real_type));
69 /* 'md_assemble ()' gathers together information and puts it into a
74 /* TM holds the template for the insn were currently assembling. */
77 /* SUFFIX holds the instruction mnemonic suffix if given.
78 (e.g. 'l' for 'movl') */
81 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
83 /* OPERANDS gives the number of given operands. */
84 unsigned int operands;
86 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
87 of given register, displacement, memory operands and immediate
89 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
91 /* TYPES [i] is the type (see above #defines) which tells us how to
92 search through DISPS [i] & IMMS [i] & REGS [i] for the required
94 unsigned int types[MAX_OPERANDS];
96 /* Displacements (if given) for each operand. */
97 expressionS *disps[MAX_OPERANDS];
99 /* Relocation type for operand */
101 enum bfd_reloc_code_real disp_reloc[MAX_OPERANDS];
103 int disp_reloc[MAX_OPERANDS];
106 /* Immediate operands (if given) for each operand. */
107 expressionS *imms[MAX_OPERANDS];
109 /* Register operands (if given) for each operand. */
110 const reg_entry *regs[MAX_OPERANDS];
112 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
113 the base index byte below. */
114 const reg_entry *base_reg;
115 const reg_entry *index_reg;
116 unsigned int log2_scale_factor;
118 /* SEG gives the seg_entries of this insn. They are zero unless
119 explicit segment overrides are given. */
120 const seg_entry *seg[2]; /* segments for memory operands (if given) */
122 /* PREFIX holds all the given prefix opcodes (usually null).
123 PREFIXES is the number of prefix opcodes. */
124 unsigned int prefixes;
125 unsigned char prefix[MAX_PREFIXES];
127 /* RM and SIB are the modrm byte and the sib byte where the
128 addressing modes of this insn are encoded. */
134 typedef struct _i386_insn i386_insn;
136 /* List of chars besides those in app.c:symbol_chars that can start an
137 operand. Used to prevent the scrubber eating vital white-space. */
139 const char extra_symbol_chars[] = "*%-(@";
141 const char extra_symbol_chars[] = "*%-(";
144 /* This array holds the chars that always start a comment. If the
145 pre-processor is disabled, these aren't very useful */
146 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
147 /* Putting '/' here makes it impossible to use the divide operator.
148 However, we need it for compatibility with SVR4 systems. */
149 const char comment_chars[] = "#/";
150 #define PREFIX_SEPARATOR '\\'
152 const char comment_chars[] = "#";
153 #define PREFIX_SEPARATOR '/'
156 /* This array holds the chars that only start a comment at the beginning of
157 a line. If the line seems to have the form '# 123 filename'
158 .line and .file directives will appear in the pre-processed output */
159 /* Note that input_file.c hand checks for '#' at the beginning of the
160 first line of the input file. This is because the compiler outputs
161 #NO_APP at the beginning of its output. */
162 /* Also note that comments started like this one will always work if
163 '/' isn't otherwise defined. */
164 #if defined (TE_I386AIX) || ((defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)) && ! defined (TE_LINUX))
165 const char line_comment_chars[] = "";
167 const char line_comment_chars[] = "/";
170 const char line_separator_chars[] = "";
172 /* Chars that can be used to separate mant from exp in floating point nums */
173 const char EXP_CHARS[] = "eE";
175 /* Chars that mean this number is a floating point constant */
178 const char FLT_CHARS[] = "fFdDxX";
180 /* tables for lexical analysis */
181 static char mnemonic_chars[256];
182 static char register_chars[256];
183 static char operand_chars[256];
184 static char identifier_chars[256];
185 static char digit_chars[256];
188 #define is_mnemonic_char(x) (mnemonic_chars[(unsigned char) x])
189 #define is_operand_char(x) (operand_chars[(unsigned char) x])
190 #define is_register_char(x) (register_chars[(unsigned char) x])
191 #define is_space_char(x) ((x) == ' ')
192 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
193 #define is_digit_char(x) (digit_chars[(unsigned char) x])
195 /* put here all non-digit non-letter charcters that may occur in an operand */
196 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:[@]";
198 /* md_assemble() always leaves the strings it's passed unaltered. To
199 effect this we maintain a stack of saved characters that we've smashed
200 with '\0's (indicating end of strings for various sub-fields of the
201 assembler instruction). */
202 static char save_stack[32];
203 static char *save_stack_p; /* stack pointer */
204 #define END_STRING_AND_SAVE(s) \
205 do { *save_stack_p++ = *(s); *(s) = '\0'; } while (0)
206 #define RESTORE_END_STRING(s) \
207 do { *(s) = *--save_stack_p; } while (0)
209 /* The instruction we're assembling. */
212 /* Possible templates for current insn. */
213 static const templates *current_templates;
215 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
216 static expressionS disp_expressions[2], im_expressions[2];
218 static int this_operand; /* current operand we are working on */
220 static int flag_do_long_jump; /* FIXME what does this do? */
222 static int flag_16bit_code; /* 1 if we're writing 16-bit code, 0 if 32-bit */
224 static int intel_syntax = 0; /* 1 for intel syntax, 0 if att syntax */
226 static int allow_naked_reg = 0; /* 1 if register prefix % not required */
228 /* Interface to relax_segment.
229 There are 2 relax states for 386 jump insns: one for conditional &
230 one for unconditional jumps. This is because the these two types
231 of jumps add different sizes to frags when we're figuring out what
232 sort of jump to choose to reach a given label. */
235 #define COND_JUMP 1 /* conditional jump */
236 #define UNCOND_JUMP 2 /* unconditional jump */
240 #define SMALL16 (SMALL|CODE16)
242 #define BIG16 (BIG|CODE16)
246 #define INLINE __inline__
252 #define ENCODE_RELAX_STATE(type,size) \
253 ((relax_substateT)((type<<2) | (size)))
254 #define SIZE_FROM_RELAX_STATE(s) \
255 ( (((s) & 0x3) == BIG ? 4 : (((s) & 0x3) == BIG16 ? 2 : 1)) )
257 /* This table is used by relax_frag to promote short jumps to long
258 ones where necessary. SMALL (short) jumps may be promoted to BIG
259 (32 bit long) ones, and SMALL16 jumps to BIG16 (16 bit long). We
260 don't allow a short jump in a 32 bit code segment to be promoted to
261 a 16 bit offset jump because it's slower (requires data size
262 prefix), and doesn't work, unless the destination is in the bottom
263 64k of the code segment (The top 16 bits of eip are zeroed). */
265 const relax_typeS md_relax_table[] =
268 1) most positive reach of this state,
269 2) most negative reach of this state,
270 3) how many bytes this mode will add to the size of the current frag
271 4) which index into the table to try if we can't fit into this one.
278 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP, BIG)},
279 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP, BIG16)},
280 /* dword conditionals adds 4 bytes to frag:
281 1 extra opcode byte, 3 extra displacement bytes. */
283 /* word conditionals add 2 bytes to frag:
284 1 extra opcode byte, 1 extra displacement byte. */
287 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG)},
288 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16)},
289 /* dword jmp adds 3 bytes to frag:
290 0 extra opcode bytes, 3 extra displacement bytes. */
292 /* word jmp adds 1 byte to frag:
293 0 extra opcode bytes, 1 extra displacement byte. */
300 i386_align_code (fragP, count)
304 /* Various efficient no-op patterns for aligning code labels. */
305 /* Note: Don't try to assemble the instructions in the comments. */
306 /* 0L and 0w are not legal */
307 static const char f32_1[] =
309 static const char f32_2[] =
310 {0x89,0xf6}; /* movl %esi,%esi */
311 static const char f32_3[] =
312 {0x8d,0x76,0x00}; /* leal 0(%esi),%esi */
313 static const char f32_4[] =
314 {0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
315 static const char f32_5[] =
317 0x8d,0x74,0x26,0x00}; /* leal 0(%esi,1),%esi */
318 static const char f32_6[] =
319 {0x8d,0xb6,0x00,0x00,0x00,0x00}; /* leal 0L(%esi),%esi */
320 static const char f32_7[] =
321 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
322 static const char f32_8[] =
324 0x8d,0xb4,0x26,0x00,0x00,0x00,0x00}; /* leal 0L(%esi,1),%esi */
325 static const char f32_9[] =
326 {0x89,0xf6, /* movl %esi,%esi */
327 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
328 static const char f32_10[] =
329 {0x8d,0x76,0x00, /* leal 0(%esi),%esi */
330 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
331 static const char f32_11[] =
332 {0x8d,0x74,0x26,0x00, /* leal 0(%esi,1),%esi */
333 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
334 static const char f32_12[] =
335 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
336 0x8d,0xbf,0x00,0x00,0x00,0x00}; /* leal 0L(%edi),%edi */
337 static const char f32_13[] =
338 {0x8d,0xb6,0x00,0x00,0x00,0x00, /* leal 0L(%esi),%esi */
339 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
340 static const char f32_14[] =
341 {0x8d,0xb4,0x26,0x00,0x00,0x00,0x00, /* leal 0L(%esi,1),%esi */
342 0x8d,0xbc,0x27,0x00,0x00,0x00,0x00}; /* leal 0L(%edi,1),%edi */
343 static const char f32_15[] =
344 {0xeb,0x0d,0x90,0x90,0x90,0x90,0x90, /* jmp .+15; lotsa nops */
345 0x90,0x90,0x90,0x90,0x90,0x90,0x90,0x90};
346 static const char f16_4[] =
347 {0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
348 static const char f16_5[] =
350 0x8d,0xb4,0x00,0x00}; /* lea 0w(%si),%si */
351 static const char f16_6[] =
352 {0x89,0xf6, /* mov %si,%si */
353 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
354 static const char f16_7[] =
355 {0x8d,0x74,0x00, /* lea 0(%si),%si */
356 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
357 static const char f16_8[] =
358 {0x8d,0xb4,0x00,0x00, /* lea 0w(%si),%si */
359 0x8d,0xbd,0x00,0x00}; /* lea 0w(%di),%di */
360 static const char *const f32_patt[] = {
361 f32_1, f32_2, f32_3, f32_4, f32_5, f32_6, f32_7, f32_8,
362 f32_9, f32_10, f32_11, f32_12, f32_13, f32_14, f32_15
364 static const char *const f16_patt[] = {
365 f32_1, f32_2, f32_3, f16_4, f16_5, f16_6, f16_7, f16_8,
366 f32_15, f32_15, f32_15, f32_15, f32_15, f32_15, f32_15
369 if (count > 0 && count <= 15)
373 memcpy(fragP->fr_literal + fragP->fr_fix,
374 f16_patt[count - 1], count);
375 if (count > 8) /* adjust jump offset */
376 fragP->fr_literal[fragP->fr_fix + 1] = count - 2;
379 memcpy(fragP->fr_literal + fragP->fr_fix,
380 f32_patt[count - 1], count);
381 fragP->fr_var = count;
385 static char *output_invalid PARAMS ((int c));
386 static int i386_operand PARAMS ((char *operand_string));
387 static int i386_intel_operand PARAMS ((char *operand_string, int got_a_float));
388 static const reg_entry *parse_register PARAMS ((char *reg_string,
392 static void s_bss PARAMS ((int));
395 symbolS *GOT_symbol; /* Pre-defined "_GLOBAL_OFFSET_TABLE_" */
397 static INLINE unsigned int
398 mode_from_disp_size (t)
401 return (t & Disp8) ? 1 : (t & (Disp16|Disp32)) ? 2 : 0;
405 fits_in_signed_byte (num)
408 return (num >= -128) && (num <= 127);
409 } /* fits_in_signed_byte() */
412 fits_in_unsigned_byte (num)
415 return (num & 0xff) == num;
416 } /* fits_in_unsigned_byte() */
419 fits_in_unsigned_word (num)
422 return (num & 0xffff) == num;
423 } /* fits_in_unsigned_word() */
426 fits_in_signed_word (num)
429 return (-32768 <= num) && (num <= 32767);
430 } /* fits_in_signed_word() */
433 smallest_imm_type (num)
437 /* This code is disabled because all the Imm1 forms in the opcode table
438 are slower on the i486, and they're the versions with the implicitly
439 specified single-position displacement, which has another syntax if
440 you really want to use that form. If you really prefer to have the
441 one-byte-shorter Imm1 form despite these problems, re-enable this
444 return Imm1 | Imm8 | Imm8S | Imm16 | Imm32;
446 return (fits_in_signed_byte (num)
447 ? (Imm8S | Imm8 | Imm16 | Imm32)
448 : fits_in_unsigned_byte (num)
449 ? (Imm8 | Imm16 | Imm32)
450 : (fits_in_signed_word (num) || fits_in_unsigned_word (num))
453 } /* smallest_imm_type() */
455 /* Returns 0 if attempting to add a prefix where one from the same
456 class already exists, 1 if non rep/repne added, 2 if rep/repne
470 case CS_PREFIX_OPCODE:
471 case DS_PREFIX_OPCODE:
472 case ES_PREFIX_OPCODE:
473 case FS_PREFIX_OPCODE:
474 case GS_PREFIX_OPCODE:
475 case SS_PREFIX_OPCODE:
479 case REPNE_PREFIX_OPCODE:
480 case REPE_PREFIX_OPCODE:
483 case LOCK_PREFIX_OPCODE:
491 case ADDR_PREFIX_OPCODE:
495 case DATA_PREFIX_OPCODE:
502 as_bad (_("same type of prefix used twice"));
507 i.prefix[q] = prefix;
512 set_16bit_code_flag (new_16bit_code_flag)
513 int new_16bit_code_flag;
515 flag_16bit_code = new_16bit_code_flag;
519 set_intel_syntax (syntax_flag)
522 /* Find out if register prefixing is specified. */
523 int ask_naked_reg = 0;
526 if (! is_end_of_line[(unsigned char) *input_line_pointer])
528 char *string = input_line_pointer;
529 int e = get_symbol_end ();
531 if (strcmp(string, "prefix") == 0)
533 else if (strcmp(string, "noprefix") == 0)
536 as_bad (_("Bad argument to syntax directive."));
537 *input_line_pointer = e;
539 demand_empty_rest_of_line ();
541 intel_syntax = syntax_flag;
543 if (ask_naked_reg == 0)
546 allow_naked_reg = (intel_syntax
547 && (bfd_get_symbol_leading_char (stdoutput) != '\0'));
549 allow_naked_reg = 0; /* conservative default */
553 allow_naked_reg = (ask_naked_reg < 0);
556 const pseudo_typeS md_pseudo_table[] =
561 #if !defined(OBJ_AOUT) && !defined(USE_ALIGN_PTWO)
562 {"align", s_align_bytes, 0},
564 {"align", s_align_ptwo, 0},
566 {"ffloat", float_cons, 'f'},
567 {"dfloat", float_cons, 'd'},
568 {"tfloat", float_cons, 'x'},
570 {"noopt", s_ignore, 0},
571 {"optim", s_ignore, 0},
572 {"code16", set_16bit_code_flag, 1},
573 {"code32", set_16bit_code_flag, 0},
574 {"intel_syntax", set_intel_syntax, 1},
575 {"att_syntax", set_intel_syntax, 0},
579 /* for interface with expression () */
580 extern char *input_line_pointer;
582 /* hash table for instruction mnemonic lookup */
583 static struct hash_control *op_hash;
584 /* hash table for register lookup */
585 static struct hash_control *reg_hash;
591 const char *hash_err;
593 /* initialize op_hash hash table */
594 op_hash = hash_new ();
597 register const template *optab;
598 register templates *core_optab;
600 optab = i386_optab; /* setup for loop */
601 core_optab = (templates *) xmalloc (sizeof (templates));
602 core_optab->start = optab;
607 if (optab->name == NULL
608 || strcmp (optab->name, (optab - 1)->name) != 0)
610 /* different name --> ship out current template list;
611 add to hash table; & begin anew */
612 core_optab->end = optab;
613 hash_err = hash_insert (op_hash,
619 as_fatal (_("Internal Error: Can't hash %s: %s"),
623 if (optab->name == NULL)
625 core_optab = (templates *) xmalloc (sizeof (templates));
626 core_optab->start = optab;
631 /* initialize reg_hash hash table */
632 reg_hash = hash_new ();
634 register const reg_entry *regtab;
636 for (regtab = i386_regtab;
637 regtab < i386_regtab + sizeof (i386_regtab) / sizeof (i386_regtab[0]);
640 hash_err = hash_insert (reg_hash, regtab->reg_name, (PTR) regtab);
646 /* fill in lexical tables: mnemonic_chars, operand_chars. */
651 for (c = 0; c < 256; c++)
656 mnemonic_chars[c] = c;
657 register_chars[c] = c;
658 operand_chars[c] = c;
660 else if (islower (c))
662 mnemonic_chars[c] = c;
663 register_chars[c] = c;
664 operand_chars[c] = c;
666 else if (isupper (c))
668 mnemonic_chars[c] = tolower (c);
669 register_chars[c] = mnemonic_chars[c];
670 operand_chars[c] = c;
673 if (isalpha (c) || isdigit (c))
674 identifier_chars[c] = c;
677 identifier_chars[c] = c;
678 operand_chars[c] = c;
683 identifier_chars['@'] = '@';
685 register_chars[')'] = ')';
686 register_chars['('] = '(';
687 digit_chars['-'] = '-';
688 identifier_chars['_'] = '_';
689 identifier_chars['.'] = '.';
691 for (p = operand_special_chars; *p != '\0'; p++)
692 operand_chars[(unsigned char) *p] = *p;
695 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
696 if (OUTPUT_FLAVOR == bfd_target_elf_flavour)
698 record_alignment (text_section, 2);
699 record_alignment (data_section, 2);
700 record_alignment (bss_section, 2);
706 i386_print_statistics (file)
709 hash_print_statistics (file, "i386 opcode", op_hash);
710 hash_print_statistics (file, "i386 register", reg_hash);
716 /* debugging routines for md_assemble */
717 static void pi PARAMS ((char *, i386_insn *));
718 static void pte PARAMS ((template *));
719 static void pt PARAMS ((unsigned int));
720 static void pe PARAMS ((expressionS *));
721 static void ps PARAMS ((symbolS *));
728 register template *p;
731 fprintf (stdout, "%s: template ", line);
733 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
734 x->rm.mode, x->rm.reg, x->rm.regmem);
735 fprintf (stdout, " base %x index %x scale %x\n",
736 x->bi.base, x->bi.index, x->bi.scale);
737 for (i = 0; i < x->operands; i++)
739 fprintf (stdout, " #%d: ", i + 1);
741 fprintf (stdout, "\n");
743 & (Reg | SReg2 | SReg3 | Control | Debug | Test | RegMMX | RegXMM))
744 fprintf (stdout, "%s\n", x->regs[i]->reg_name);
745 if (x->types[i] & Imm)
747 if (x->types[i] & Disp)
757 fprintf (stdout, " %d operands ", t->operands);
758 fprintf (stdout, "opcode %x ",
760 if (t->extension_opcode != None)
761 fprintf (stdout, "ext %x ", t->extension_opcode);
762 if (t->opcode_modifier & D)
763 fprintf (stdout, "D");
764 if (t->opcode_modifier & W)
765 fprintf (stdout, "W");
766 fprintf (stdout, "\n");
767 for (i = 0; i < t->operands; i++)
769 fprintf (stdout, " #%d type ", i + 1);
770 pt (t->operand_types[i]);
771 fprintf (stdout, "\n");
779 fprintf (stdout, " operation %d\n", e->X_op);
780 fprintf (stdout, " add_number %ld (%lx)\n",
781 (long) e->X_add_number, (long) e->X_add_number);
784 fprintf (stdout, " add_symbol ");
785 ps (e->X_add_symbol);
786 fprintf (stdout, "\n");
790 fprintf (stdout, " op_symbol ");
792 fprintf (stdout, "\n");
800 fprintf (stdout, "%s type %s%s",
802 S_IS_EXTERNAL (s) ? "EXTERNAL " : "",
803 segment_name (S_GET_SEGMENT (s)));
822 { BaseIndex, "BaseIndex" },
826 { InOutPortReg, "InOutPortReg" },
827 { ShiftCount, "ShiftCount" },
828 { Control, "control reg" },
829 { Test, "test reg" },
830 { Debug, "debug reg" },
831 { FloatReg, "FReg" },
832 { FloatAcc, "FAcc" },
836 { JumpAbsolute, "Jump Absolute" },
847 register struct type_name *ty;
851 fprintf (stdout, _("Unknown"));
855 for (ty = type_names; ty->mask; ty++)
857 fprintf (stdout, "%s, ", ty->tname);
862 #endif /* DEBUG386 */
865 tc_i386_force_relocation (fixp)
869 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
870 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
875 return fixp->fx_r_type==7;
880 static bfd_reloc_code_real_type reloc
881 PARAMS ((int, int, bfd_reloc_code_real_type));
883 static bfd_reloc_code_real_type
884 reloc (size, pcrel, other)
887 bfd_reloc_code_real_type other;
889 if (other != NO_RELOC) return other;
895 case 1: return BFD_RELOC_8_PCREL;
896 case 2: return BFD_RELOC_16_PCREL;
897 case 4: return BFD_RELOC_32_PCREL;
899 as_bad (_("Can not do %d byte pc-relative relocation"), size);
905 case 1: return BFD_RELOC_8;
906 case 2: return BFD_RELOC_16;
907 case 4: return BFD_RELOC_32;
909 as_bad (_("Can not do %d byte relocation"), size);
912 return BFD_RELOC_NONE;
916 * Here we decide which fixups can be adjusted to make them relative to
917 * the beginning of the section instead of the symbol. Basically we need
918 * to make sure that the dynamic relocations are done correctly, so in
919 * some cases we force the original symbol to be used.
922 tc_i386_fix_adjustable(fixP)
926 /* Prevent all adjustments to global symbols. */
927 if (S_IS_EXTERN (fixP->fx_addsy))
929 if (S_IS_WEAK (fixP->fx_addsy))
932 /* adjust_reloc_syms doesn't know about the GOT */
933 if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
934 || fixP->fx_r_type == BFD_RELOC_386_PLT32
935 || fixP->fx_r_type == BFD_RELOC_386_GOT32
936 || fixP->fx_r_type == BFD_RELOC_VTABLE_INHERIT
937 || fixP->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
942 #define reloc(SIZE,PCREL,OTHER) 0
943 #define BFD_RELOC_16 0
944 #define BFD_RELOC_32 0
945 #define BFD_RELOC_16_PCREL 0
946 #define BFD_RELOC_32_PCREL 0
947 #define BFD_RELOC_386_PLT32 0
948 #define BFD_RELOC_386_GOT32 0
949 #define BFD_RELOC_386_GOTOFF 0
953 intel_float_operand PARAMS ((char *mnemonic));
956 intel_float_operand (mnemonic)
959 if (mnemonic[0] == 'f' && mnemonic[1] =='i')
962 if (mnemonic[0] == 'f')
968 /* This is the guts of the machine-dependent assembler. LINE points to a
969 machine dependent instruction. This function is supposed to emit
970 the frags/bytes it assembles to. */
976 /* Points to template once we've found it. */
979 /* Count the size of the instruction generated. */
984 char mnemonic[MAX_MNEM_SIZE];
986 /* Initialize globals. */
987 memset (&i, '\0', sizeof (i));
988 for (j = 0; j < MAX_OPERANDS; j++)
989 i.disp_reloc[j] = NO_RELOC;
990 memset (disp_expressions, '\0', sizeof (disp_expressions));
991 memset (im_expressions, '\0', sizeof (im_expressions));
992 save_stack_p = save_stack; /* reset stack pointer */
994 /* First parse an instruction mnemonic & call i386_operand for the operands.
995 We assume that the scrubber has arranged it so that line[0] is the valid
996 start of a (possibly prefixed) mnemonic. */
999 char *token_start = l;
1002 /* Non-zero if we found a prefix only acceptable with string insns. */
1003 const char *expecting_string_instruction = NULL;
1008 while ((*mnem_p = mnemonic_chars[(unsigned char) *l]) != 0)
1011 if (mnem_p >= mnemonic + sizeof (mnemonic))
1013 as_bad (_("no such 386 instruction: `%s'"), token_start);
1018 if (!is_space_char (*l)
1019 && *l != END_OF_INSN
1020 && *l != PREFIX_SEPARATOR)
1022 as_bad (_("invalid character %s in mnemonic"),
1023 output_invalid (*l));
1026 if (token_start == l)
1028 if (*l == PREFIX_SEPARATOR)
1029 as_bad (_("expecting prefix; got nothing"));
1031 as_bad (_("expecting mnemonic; got nothing"));
1035 /* Look up instruction (or prefix) via hash table. */
1036 current_templates = hash_find (op_hash, mnemonic);
1038 if (*l != END_OF_INSN
1039 && (! is_space_char (*l) || l[1] != END_OF_INSN)
1040 && current_templates
1041 && (current_templates->start->opcode_modifier & IsPrefix))
1043 /* If we are in 16-bit mode, do not allow addr16 or data16.
1044 Similarly, in 32-bit mode, do not allow addr32 or data32. */
1045 if ((current_templates->start->opcode_modifier & (Size16 | Size32))
1046 && (((current_templates->start->opcode_modifier & Size32) != 0)
1049 as_bad (_("redundant %s prefix"),
1050 current_templates->start->name);
1053 /* Add prefix, checking for repeated prefixes. */
1054 switch (add_prefix (current_templates->start->base_opcode))
1059 expecting_string_instruction =
1060 current_templates->start->name;
1063 /* Skip past PREFIX_SEPARATOR and reset token_start. */
1070 if (!current_templates)
1072 /* See if we can get a match by trimming off a suffix. */
1075 case DWORD_MNEM_SUFFIX:
1076 case WORD_MNEM_SUFFIX:
1077 case BYTE_MNEM_SUFFIX:
1078 case SHORT_MNEM_SUFFIX:
1079 #if LONG_MNEM_SUFFIX != DWORD_MNEM_SUFFIX
1080 case LONG_MNEM_SUFFIX:
1082 i.suffix = mnem_p[-1];
1084 current_templates = hash_find (op_hash, mnemonic);
1088 case INTEL_DWORD_MNEM_SUFFIX:
1091 i.suffix = mnem_p[-1];
1093 current_templates = hash_find (op_hash, mnemonic);
1097 if (!current_templates)
1099 as_bad (_("no such 386 instruction: `%s'"), token_start);
1104 /* check for rep/repne without a string instruction */
1105 if (expecting_string_instruction
1106 && !(current_templates->start->opcode_modifier & IsString))
1108 as_bad (_("expecting string instruction after `%s'"),
1109 expecting_string_instruction);
1113 /* There may be operands to parse. */
1114 if (*l != END_OF_INSN)
1116 /* parse operands */
1118 /* 1 if operand is pending after ','. */
1119 unsigned int expecting_operand = 0;
1121 /* Non-zero if operand parens not balanced. */
1122 unsigned int paren_not_balanced;
1126 /* skip optional white space before operand */
1127 if (is_space_char (*l))
1129 if (!is_operand_char (*l) && *l != END_OF_INSN)
1131 as_bad (_("invalid character %s before operand %d"),
1132 output_invalid (*l),
1136 token_start = l; /* after white space */
1137 paren_not_balanced = 0;
1138 while (paren_not_balanced || *l != ',')
1140 if (*l == END_OF_INSN)
1142 if (paren_not_balanced)
1145 as_bad (_("unbalanced parenthesis in operand %d."),
1148 as_bad (_("unbalanced brackets in operand %d."),
1153 break; /* we are done */
1155 else if (!is_operand_char (*l) && !is_space_char (*l))
1157 as_bad (_("invalid character %s in operand %d"),
1158 output_invalid (*l),
1165 ++paren_not_balanced;
1167 --paren_not_balanced;
1172 ++paren_not_balanced;
1174 --paren_not_balanced;
1178 if (l != token_start)
1179 { /* yes, we've read in another operand */
1180 unsigned int operand_ok;
1181 this_operand = i.operands++;
1182 if (i.operands > MAX_OPERANDS)
1184 as_bad (_("spurious operands; (%d operands/instruction max)"),
1188 /* now parse operand adding info to 'i' as we go along */
1189 END_STRING_AND_SAVE (l);
1192 operand_ok = i386_intel_operand (token_start, intel_float_operand (mnemonic));
1194 operand_ok = i386_operand (token_start);
1196 RESTORE_END_STRING (l); /* restore old contents */
1202 if (expecting_operand)
1204 expecting_operand_after_comma:
1205 as_bad (_("expecting operand after ','; got nothing"));
1210 as_bad (_("expecting operand before ','; got nothing"));
1215 /* now *l must be either ',' or END_OF_INSN */
1218 if (*++l == END_OF_INSN)
1219 { /* just skip it, if it's \n complain */
1220 goto expecting_operand_after_comma;
1222 expecting_operand = 1;
1225 while (*l != END_OF_INSN); /* until we get end of insn */
1229 /* Now we've parsed the mnemonic into a set of templates, and have the
1232 Next, we find a template that matches the given insn,
1233 making sure the overlap of the given operands types is consistent
1234 with the template operand types. */
1236 #define MATCH(overlap, given, template) \
1238 && ((given) & BaseIndex) == ((overlap) & BaseIndex) \
1239 && ((given) & JumpAbsolute) == ((template) & JumpAbsolute))
1241 /* If given types r0 and r1 are registers they must be of the same type
1242 unless the expected operand type register overlap is null.
1243 Note that Acc in a template matches every size of reg. */
1244 #define CONSISTENT_REGISTER_MATCH(m0, g0, t0, m1, g1, t1) \
1245 ( ((g0) & Reg) == 0 || ((g1) & Reg) == 0 || \
1246 ((g0) & Reg) == ((g1) & Reg) || \
1247 ((((m0) & Acc) ? Reg : (t0)) & (((m1) & Acc) ? Reg : (t1)) & Reg) == 0 )
1250 register unsigned int overlap0, overlap1;
1251 unsigned int overlap2;
1252 unsigned int found_reverse_match;
1255 /* All intel opcodes have reversed operands except for BOUND and ENTER */
1257 && (strcmp (mnemonic, "enter") != 0)
1258 && (strcmp (mnemonic, "bound") != 0)
1259 && (strncmp (mnemonic, "fsub", 4) !=0)
1260 && (strncmp (mnemonic, "fdiv", 4) !=0))
1262 const reg_entry *temp_reg = NULL;
1263 expressionS *temp_disp = NULL;
1264 expressionS *temp_imm = NULL;
1265 unsigned int temp_type;
1269 if (i.operands == 2)
1274 else if (i.operands == 3)
1282 temp_type = i.types[xchg2];
1283 if (temp_type & (Reg | FloatReg))
1284 temp_reg = i.regs[xchg2];
1285 else if (temp_type & Imm)
1286 temp_imm = i.imms[xchg2];
1287 else if (temp_type & Disp)
1288 temp_disp = i.disps[xchg2];
1290 i.types[xchg2] = i.types[xchg1];
1292 if (i.types[xchg1] & (Reg | FloatReg))
1294 i.regs[xchg2] = i.regs[xchg1];
1295 i.regs[xchg1] = NULL;
1297 else if (i.types[xchg2] & Imm)
1299 i.imms[xchg2] = i.imms[xchg1];
1300 i.imms[xchg1] = NULL;
1302 else if (i.types[xchg2] & Disp)
1304 i.disps[xchg2] = i.disps[xchg1];
1305 i.disps[xchg1] = NULL;
1308 if (temp_type & (Reg | FloatReg))
1310 i.regs[xchg1] = temp_reg;
1311 if (! (i.types[xchg1] & (Reg | FloatReg)))
1312 i.regs[xchg2] = NULL;
1314 else if (temp_type & Imm)
1316 i.imms[xchg1] = temp_imm;
1317 if (! (i.types[xchg1] & Imm))
1318 i.imms[xchg2] = NULL;
1320 else if (temp_type & Disp)
1322 i.disps[xchg1] = temp_disp;
1323 if (! (i.types[xchg1] & Disp))
1324 i.disps[xchg2] = NULL;
1327 i.types[xchg1] = temp_type;
1329 if (!strcmp(mnemonic,"jmp")
1330 || !strcmp (mnemonic, "call"))
1331 if ((i.types[0] & Reg) || i.types[0] & BaseIndex)
1332 i.types[0] |= JumpAbsolute;
1338 found_reverse_match = 0;
1339 suffix_check = (i.suffix == BYTE_MNEM_SUFFIX
1341 : (i.suffix == WORD_MNEM_SUFFIX
1343 : (i.suffix == SHORT_MNEM_SUFFIX
1345 : (i.suffix == LONG_MNEM_SUFFIX
1347 : (i.suffix == INTEL_DWORD_MNEM_SUFFIX
1349 : (i.suffix == LONG_DOUBLE_MNEM_SUFFIX ? No_xSuf : 0))))));
1351 for (t = current_templates->start;
1352 t < current_templates->end;
1355 /* Must have right number of operands. */
1356 if (i.operands != t->operands)
1359 /* For some opcodes, don't check the suffix */
1362 if (strcmp (t->name, "fnstcw")
1363 && strcmp (t->name, "fldcw")
1364 && (t->opcode_modifier & suffix_check))
1367 /* Must not have disallowed suffix. */
1368 else if ((t->opcode_modifier & suffix_check))
1371 else if (!t->operands)
1372 break; /* 0 operands always matches */
1374 overlap0 = i.types[0] & t->operand_types[0];
1375 switch (t->operands)
1378 if (!MATCH (overlap0, i.types[0], t->operand_types[0]))
1383 overlap1 = i.types[1] & t->operand_types[1];
1384 if (!MATCH (overlap0, i.types[0], t->operand_types[0])
1385 || !MATCH (overlap1, i.types[1], t->operand_types[1])
1386 || !CONSISTENT_REGISTER_MATCH (overlap0, i.types[0],
1387 t->operand_types[0],
1388 overlap1, i.types[1],
1389 t->operand_types[1]))
1392 /* check if other direction is valid ... */
1393 if ((t->opcode_modifier & (D|FloatD)) == 0)
1396 /* try reversing direction of operands */
1397 overlap0 = i.types[0] & t->operand_types[1];
1398 overlap1 = i.types[1] & t->operand_types[0];
1399 if (!MATCH (overlap0, i.types[0], t->operand_types[1])
1400 || !MATCH (overlap1, i.types[1], t->operand_types[0])
1401 || !CONSISTENT_REGISTER_MATCH (overlap0, i.types[0],
1402 t->operand_types[1],
1403 overlap1, i.types[1],
1404 t->operand_types[0]))
1406 /* does not match either direction */
1409 /* found_reverse_match holds which of D or FloatDR
1411 found_reverse_match = t->opcode_modifier & (D|FloatDR);
1414 /* found a forward 2 operand match here */
1415 if (t->operands == 3)
1417 /* Here we make use of the fact that there are no
1418 reverse match 3 operand instructions, and all 3
1419 operand instructions only need to be checked for
1420 register consistency between operands 2 and 3. */
1421 overlap2 = i.types[2] & t->operand_types[2];
1422 if (!MATCH (overlap2, i.types[2], t->operand_types[2])
1423 || !CONSISTENT_REGISTER_MATCH (overlap1, i.types[1],
1424 t->operand_types[1],
1425 overlap2, i.types[2],
1426 t->operand_types[2]))
1430 /* found either forward/reverse 2 or 3 operand match here:
1431 slip through to break */
1433 break; /* we've found a match; break out of loop */
1434 } /* for (t = ... */
1435 if (t == current_templates->end)
1436 { /* we found no match */
1437 as_bad (_("suffix or operands invalid for `%s'"),
1438 current_templates->start->name);
1442 if ((t->opcode_modifier & (IsPrefix|IgnoreSize)) == (IsPrefix|IgnoreSize))
1444 /* Warn them that a data or address size prefix doesn't affect
1445 assembly of the next line of code. */
1446 as_warn (_("stand-alone `%s' prefix"), t->name);
1449 /* Copy the template we found. */
1451 if (found_reverse_match)
1453 i.tm.operand_types[0] = t->operand_types[1];
1454 i.tm.operand_types[1] = t->operand_types[0];
1458 if (i.tm.opcode_modifier & FWait)
1459 if (! add_prefix (FWAIT_OPCODE))
1462 /* Check string instruction segment overrides */
1463 if ((i.tm.opcode_modifier & IsString) != 0 && i.mem_operands != 0)
1465 int mem_op = (i.types[0] & AnyMem) ? 0 : 1;
1466 if ((i.tm.operand_types[mem_op] & EsSeg) != 0)
1468 if (i.seg[0] != NULL && i.seg[0] != &es)
1470 as_bad (_("`%s' operand %d must use `%%es' segment"),
1475 /* There's only ever one segment override allowed per instruction.
1476 This instruction possibly has a legal segment override on the
1477 second operand, so copy the segment to where non-string
1478 instructions store it, allowing common code. */
1479 i.seg[0] = i.seg[1];
1481 else if ((i.tm.operand_types[mem_op + 1] & EsSeg) != 0)
1483 if (i.seg[1] != NULL && i.seg[1] != &es)
1485 as_bad (_("`%s' operand %d must use `%%es' segment"),
1493 /* If matched instruction specifies an explicit instruction mnemonic
1495 if (i.tm.opcode_modifier & (Size16 | Size32))
1497 if (i.tm.opcode_modifier & Size16)
1498 i.suffix = WORD_MNEM_SUFFIX;
1500 i.suffix = DWORD_MNEM_SUFFIX;
1502 else if (i.reg_operands)
1504 /* If there's no instruction mnemonic suffix we try to invent one
1505 based on register operands. */
1508 /* We take i.suffix from the last register operand specified,
1509 Destination register type is more significant than source
1512 for (op = i.operands; --op >= 0; )
1513 if (i.types[op] & Reg)
1515 i.suffix = ((i.types[op] & Reg8) ? BYTE_MNEM_SUFFIX :
1516 (i.types[op] & Reg16) ? WORD_MNEM_SUFFIX :
1521 else if (i.suffix == BYTE_MNEM_SUFFIX)
1524 for (op = i.operands; --op >= 0; )
1526 /* If this is an eight bit register, it's OK. If it's
1527 the 16 or 32 bit version of an eight bit register,
1528 we will just use the low portion, and that's OK too. */
1529 if (i.types[op] & Reg8)
1532 /* movzx and movsx should not generate this warning. */
1534 && (i.tm.base_opcode == 0xfb7
1535 || i.tm.base_opcode == 0xfb6
1536 || i.tm.base_opcode == 0xfbe
1537 || i.tm.base_opcode == 0xfbf))
1540 if ((i.types[op] & WordReg) && i.regs[op]->reg_num < 4
1542 /* Check that the template allows eight bit regs
1543 This kills insns such as `orb $1,%edx', which
1544 maybe should be allowed. */
1545 && (i.tm.operand_types[op] & (Reg8|InOutPortReg))
1549 #if REGISTER_WARNINGS
1550 if ((i.tm.operand_types[op] & InOutPortReg) == 0)
1551 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1552 (i.regs[op] - (i.types[op] & Reg16 ? 8 : 16))->reg_name,
1553 i.regs[op]->reg_name,
1558 /* Any other register is bad */
1559 if (i.types[op] & (Reg | RegMMX | RegXMM
1561 | Control | Debug | Test
1562 | FloatReg | FloatAcc))
1564 as_bad (_("`%%%s' not allowed with `%s%c'"),
1565 i.regs[op]->reg_name,
1572 else if (i.suffix == DWORD_MNEM_SUFFIX)
1575 for (op = i.operands; --op >= 0; )
1576 /* Reject eight bit registers, except where the template
1577 requires them. (eg. movzb) */
1578 if ((i.types[op] & Reg8) != 0
1579 && (i.tm.operand_types[op] & (Reg16|Reg32|Acc)) != 0)
1581 as_bad (_("`%%%s' not allowed with `%s%c'"),
1582 i.regs[op]->reg_name,
1587 #if REGISTER_WARNINGS
1588 /* Warn if the e prefix on a general reg is missing. */
1589 else if ((i.types[op] & Reg16) != 0
1590 && (i.tm.operand_types[op] & (Reg32|Acc)) != 0)
1592 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1593 (i.regs[op] + 8)->reg_name,
1594 i.regs[op]->reg_name,
1599 else if (i.suffix == WORD_MNEM_SUFFIX)
1602 for (op = i.operands; --op >= 0; )
1603 /* Reject eight bit registers, except where the template
1604 requires them. (eg. movzb) */
1605 if ((i.types[op] & Reg8) != 0
1606 && (i.tm.operand_types[op] & (Reg16|Reg32|Acc)) != 0)
1608 as_bad (_("`%%%s' not allowed with `%s%c'"),
1609 i.regs[op]->reg_name,
1614 #if REGISTER_WARNINGS
1615 /* Warn if the e prefix on a general reg is present. */
1616 else if ((i.types[op] & Reg32) != 0
1617 && (i.tm.operand_types[op] & (Reg16|Acc)) != 0)
1619 as_warn (_("using `%%%s' instead of `%%%s' due to `%c' suffix"),
1620 (i.regs[op] - 8)->reg_name,
1621 i.regs[op]->reg_name,
1630 /* Make still unresolved immediate matches conform to size of immediate
1631 given in i.suffix. Note: overlap2 cannot be an immediate! */
1632 if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32))
1633 && overlap0 != Imm8 && overlap0 != Imm8S
1634 && overlap0 != Imm16 && overlap0 != Imm32)
1638 overlap0 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
1639 (i.suffix == WORD_MNEM_SUFFIX ? Imm16 : Imm32));
1641 else if (overlap0 == (Imm16 | Imm32))
1644 (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0)) ? Imm16 : Imm32;
1648 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1652 if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32))
1653 && overlap1 != Imm8 && overlap1 != Imm8S
1654 && overlap1 != Imm16 && overlap1 != Imm32)
1658 overlap1 &= (i.suffix == BYTE_MNEM_SUFFIX ? (Imm8 | Imm8S) :
1659 (i.suffix == WORD_MNEM_SUFFIX ? Imm16 : Imm32));
1661 else if (overlap1 == (Imm16 | Imm32))
1664 (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0)) ? Imm16 : Imm32;
1668 as_bad (_("no instruction mnemonic suffix given; can't determine immediate size"));
1672 assert ((overlap2 & Imm) == 0);
1674 i.types[0] = overlap0;
1675 if (overlap0 & ImplicitRegister)
1677 if (overlap0 & Imm1)
1678 i.imm_operands = 0; /* kludge for shift insns */
1680 i.types[1] = overlap1;
1681 if (overlap1 & ImplicitRegister)
1684 i.types[2] = overlap2;
1685 if (overlap2 & ImplicitRegister)
1688 /* Finalize opcode. First, we change the opcode based on the operand
1689 size given by i.suffix: We need not change things for byte insns. */
1691 if (!i.suffix && (i.tm.opcode_modifier & W))
1693 as_bad (_("no instruction mnemonic suffix given and no register operands; can't size instruction"));
1697 /* For movzx and movsx, need to check the register type */
1699 && (i.tm.base_opcode == 0xfb6 || i.tm.base_opcode == 0xfbe))
1700 if (i.suffix && i.suffix == BYTE_MNEM_SUFFIX)
1702 unsigned int prefix = DATA_PREFIX_OPCODE;
1704 if ((i.regs[1]->reg_type & Reg16) != 0)
1705 if (!add_prefix (prefix))
1709 if (i.suffix && i.suffix != BYTE_MNEM_SUFFIX)
1711 /* It's not a byte, select word/dword operation. */
1712 if (i.tm.opcode_modifier & W)
1714 if (i.tm.opcode_modifier & ShortForm)
1715 i.tm.base_opcode |= 8;
1717 i.tm.base_opcode |= 1;
1719 /* Now select between word & dword operations via the operand
1720 size prefix, except for instructions that will ignore this
1722 if (((intel_syntax && (i.suffix == INTEL_DWORD_MNEM_SUFFIX))
1723 || i.suffix == DWORD_MNEM_SUFFIX
1724 || i.suffix == LONG_MNEM_SUFFIX) == flag_16bit_code
1725 && !(i.tm.opcode_modifier & IgnoreSize))
1727 unsigned int prefix = DATA_PREFIX_OPCODE;
1728 if (i.tm.opcode_modifier & JumpByte) /* jcxz, loop */
1729 prefix = ADDR_PREFIX_OPCODE;
1731 if (! add_prefix (prefix))
1734 /* Size floating point instruction. */
1735 if (i.suffix == LONG_MNEM_SUFFIX
1736 || (intel_syntax && i.suffix == INTEL_DWORD_MNEM_SUFFIX))
1738 if (i.tm.opcode_modifier & FloatMF)
1739 i.tm.base_opcode ^= 4;
1742 if (intel_syntax && i.suffix == LONG_DOUBLE_MNEM_SUFFIX)
1744 if (i.tm.opcode_modifier & FloatMF)
1745 i.tm.base_opcode ^= 2;
1749 if (i.tm.opcode_modifier & ImmExt)
1751 /* These AMD 3DNow! and Intel Katmai New Instructions have an
1752 opcode suffix which is coded in the same place as an 8-bit
1753 immediate field would be. Here we fake an 8-bit immediate
1754 operand from the opcode suffix stored in tm.extension_opcode. */
1758 assert(i.imm_operands == 0 && i.operands <= 2);
1760 exp = &im_expressions[i.imm_operands++];
1761 i.imms[i.operands] = exp;
1762 i.types[i.operands++] = Imm8;
1763 exp->X_op = O_constant;
1764 exp->X_add_number = i.tm.extension_opcode;
1765 i.tm.extension_opcode = None;
1768 /* For insns with operands there are more diddles to do to the opcode. */
1771 /* Default segment register this instruction will use
1772 for memory accesses. 0 means unknown.
1773 This is only for optimizing out unnecessary segment overrides. */
1774 const seg_entry *default_seg = 0;
1776 /* If we found a reverse match we must alter the opcode
1777 direction bit. found_reverse_match holds bits to change
1778 (different for int & float insns). */
1780 i.tm.base_opcode ^= found_reverse_match;
1782 /* The imul $imm, %reg instruction is converted into
1783 imul $imm, %reg, %reg, and the clr %reg instruction
1784 is converted into xor %reg, %reg. */
1785 if (i.tm.opcode_modifier & regKludge)
1787 unsigned int first_reg_op = (i.types[0] & Reg) ? 0 : 1;
1788 /* Pretend we saw the extra register operand. */
1789 i.regs[first_reg_op+1] = i.regs[first_reg_op];
1793 if (i.tm.opcode_modifier & ShortForm)
1795 /* The register or float register operand is in operand 0 or 1. */
1796 unsigned int op = (i.types[0] & (Reg | FloatReg)) ? 0 : 1;
1797 /* Register goes in low 3 bits of opcode. */
1798 i.tm.base_opcode |= i.regs[op]->reg_num;
1799 if ((i.tm.opcode_modifier & Ugh) != 0)
1801 /* Warn about some common errors, but press on regardless.
1802 The first case can be generated by gcc (<= 2.8.1). */
1803 if (i.operands == 2)
1805 /* reversed arguments on faddp, fsubp, etc. */
1806 as_warn (_("translating to `%s %%%s,%%%s'"), i.tm.name,
1807 i.regs[1]->reg_name,
1808 i.regs[0]->reg_name);
1812 /* extraneous `l' suffix on fp insn */
1813 as_warn (_("translating to `%s %%%s'"), i.tm.name,
1814 i.regs[0]->reg_name);
1818 else if (i.tm.opcode_modifier & Modrm)
1820 /* The opcode is completed (modulo i.tm.extension_opcode which
1821 must be put into the modrm byte).
1822 Now, we make the modrm & index base bytes based on all the
1823 info we've collected. */
1825 /* i.reg_operands MUST be the number of real register operands;
1826 implicit registers do not count. */
1827 if (i.reg_operands == 2)
1829 unsigned int source, dest;
1830 source = ((i.types[0]
1831 & (Reg | RegMMX | RegXMM
1833 | Control | Debug | Test))
1838 /* One of the register operands will be encoded in the
1839 i.tm.reg field, the other in the combined i.tm.mode
1840 and i.tm.regmem fields. If no form of this
1841 instruction supports a memory destination operand,
1842 then we assume the source operand may sometimes be
1843 a memory operand and so we need to store the
1844 destination in the i.rm.reg field. */
1845 if ((i.tm.operand_types[dest] & AnyMem) == 0)
1847 i.rm.reg = i.regs[dest]->reg_num;
1848 i.rm.regmem = i.regs[source]->reg_num;
1852 i.rm.reg = i.regs[source]->reg_num;
1853 i.rm.regmem = i.regs[dest]->reg_num;
1857 { /* if it's not 2 reg operands... */
1860 unsigned int fake_zero_displacement = 0;
1861 unsigned int op = ((i.types[0] & AnyMem)
1863 : (i.types[1] & AnyMem) ? 1 : 2);
1870 if (! i.disp_operands)
1871 fake_zero_displacement = 1;
1874 /* Operand is just <disp> */
1875 if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
1877 i.rm.regmem = NO_BASE_REGISTER_16;
1878 i.types[op] &= ~Disp;
1879 i.types[op] |= Disp16;
1883 i.rm.regmem = NO_BASE_REGISTER;
1884 i.types[op] &= ~Disp;
1885 i.types[op] |= Disp32;
1888 else /* ! i.base_reg && i.index_reg */
1890 i.sib.index = i.index_reg->reg_num;
1891 i.sib.base = NO_BASE_REGISTER;
1892 i.sib.scale = i.log2_scale_factor;
1893 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1894 i.types[op] &= ~Disp;
1895 i.types[op] |= Disp32; /* Must be 32 bit */
1898 else if (i.base_reg->reg_type & Reg16)
1900 switch (i.base_reg->reg_num)
1905 else /* (%bx,%si) -> 0, or (%bx,%di) -> 1 */
1906 i.rm.regmem = i.index_reg->reg_num - 6;
1913 if ((i.types[op] & Disp) == 0)
1915 /* fake (%bp) into 0(%bp) */
1916 i.types[op] |= Disp8;
1917 fake_zero_displacement = 1;
1920 else /* (%bp,%si) -> 2, or (%bp,%di) -> 3 */
1921 i.rm.regmem = i.index_reg->reg_num - 6 + 2;
1923 default: /* (%si) -> 4 or (%di) -> 5 */
1924 i.rm.regmem = i.base_reg->reg_num - 6 + 4;
1926 i.rm.mode = mode_from_disp_size (i.types[op]);
1928 else /* i.base_reg and 32 bit mode */
1930 i.rm.regmem = i.base_reg->reg_num;
1931 i.sib.base = i.base_reg->reg_num;
1932 if (i.base_reg->reg_num == EBP_REG_NUM)
1935 if (i.disp_operands == 0)
1937 fake_zero_displacement = 1;
1938 i.types[op] |= Disp8;
1941 else if (i.base_reg->reg_num == ESP_REG_NUM)
1945 i.sib.scale = i.log2_scale_factor;
1948 /* <disp>(%esp) becomes two byte modrm
1949 with no index register. We've already
1950 stored the code for esp in i.rm.regmem
1951 ie. ESCAPE_TO_TWO_BYTE_ADDRESSING. Any
1952 base register besides %esp will not use
1953 the extra modrm byte. */
1954 i.sib.index = NO_INDEX_REGISTER;
1955 #if ! SCALE1_WHEN_NO_INDEX
1956 /* Another case where we force the second
1958 if (i.log2_scale_factor)
1959 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1964 i.sib.index = i.index_reg->reg_num;
1965 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1967 i.rm.mode = mode_from_disp_size (i.types[op]);
1970 if (fake_zero_displacement)
1972 /* Fakes a zero displacement assuming that i.types[op]
1973 holds the correct displacement size. */
1976 exp = &disp_expressions[i.disp_operands++];
1978 exp->X_op = O_constant;
1979 exp->X_add_number = 0;
1980 exp->X_add_symbol = (symbolS *) 0;
1981 exp->X_op_symbol = (symbolS *) 0;
1985 /* Fill in i.rm.reg or i.rm.regmem field with register
1986 operand (if any) based on i.tm.extension_opcode.
1987 Again, we must be careful to make sure that
1988 segment/control/debug/test/MMX registers are coded
1989 into the i.rm.reg field. */
1994 & (Reg | RegMMX | RegXMM
1996 | Control | Debug | Test))
1999 & (Reg | RegMMX | RegXMM
2001 | Control | Debug | Test))
2004 /* If there is an extension opcode to put here, the
2005 register number must be put into the regmem field. */
2006 if (i.tm.extension_opcode != None)
2007 i.rm.regmem = i.regs[op]->reg_num;
2009 i.rm.reg = i.regs[op]->reg_num;
2011 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
2012 we must set it to 3 to indicate this is a register
2013 operand in the regmem field. */
2014 if (!i.mem_operands)
2018 /* Fill in i.rm.reg field with extension opcode (if any). */
2019 if (i.tm.extension_opcode != None)
2020 i.rm.reg = i.tm.extension_opcode;
2023 else if (i.tm.opcode_modifier & (Seg2ShortForm | Seg3ShortForm))
2025 if (i.tm.base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1)
2027 as_bad (_("you can't `pop %%cs'"));
2030 i.tm.base_opcode |= (i.regs[0]->reg_num << 3);
2032 else if ((i.tm.base_opcode & ~(D|W)) == MOV_AX_DISP32)
2036 else if ((i.tm.opcode_modifier & IsString) != 0)
2038 /* For the string instructions that allow a segment override
2039 on one of their operands, the default segment is ds. */
2043 /* If a segment was explicitly specified,
2044 and the specified segment is not the default,
2045 use an opcode prefix to select it.
2046 If we never figured out what the default segment is,
2047 then default_seg will be zero at this point,
2048 and the specified segment prefix will always be used. */
2049 if ((i.seg[0]) && (i.seg[0] != default_seg))
2051 if (! add_prefix (i.seg[0]->seg_prefix))
2055 else if ((i.tm.opcode_modifier & Ugh) != 0)
2057 /* UnixWare fsub no args is alias for fsubp, fadd -> faddp, etc */
2058 as_warn (_("translating to `%sp'"), i.tm.name);
2062 /* Handle conversion of 'int $3' --> special int3 insn. */
2063 if (i.tm.base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3)
2065 i.tm.base_opcode = INT3_OPCODE;
2069 /* We are ready to output the insn. */
2074 if (i.tm.opcode_modifier & Jump)
2076 long n = (long) i.disps[0]->X_add_number;
2077 int prefix = (i.prefix[DATA_PREFIX] != 0);
2085 if (flag_16bit_code)
2088 if (!intel_syntax && (i.prefixes != 0))
2089 as_warn (_("skipping prefixes on this instruction"));
2091 if (i.disps[0]->X_op == O_constant)
2093 if (fits_in_signed_byte (n))
2097 p[0] = i.tm.base_opcode;
2102 /* Use 16-bit jumps only for 16-bit code,
2103 because text segments are limited to 64K anyway;
2104 Use 32-bit jumps for 32-bit code, because they're faster,
2105 and a 16-bit jump will clear the top 16 bits of %eip. */
2106 int jmp_size = code16 ? 2 : 4;
2107 if (code16 && !fits_in_signed_word (n))
2109 as_bad (_("16-bit jump out of range"));
2113 if (i.tm.base_opcode == JUMP_PC_RELATIVE)
2115 /* unconditional jump */
2116 insn_size += prefix + 1 + jmp_size;
2117 p = frag_more (prefix + 1 + jmp_size);
2119 *p++ = DATA_PREFIX_OPCODE;
2121 md_number_to_chars (p, (valueT) n, jmp_size);
2125 /* conditional jump */
2126 insn_size += prefix + 2 + jmp_size;
2127 p = frag_more (prefix + 2 + jmp_size);
2129 *p++ = DATA_PREFIX_OPCODE;
2130 *p++ = TWO_BYTE_OPCODE_ESCAPE;
2131 *p++ = i.tm.base_opcode + 0x10;
2132 md_number_to_chars (p, (valueT) n, jmp_size);
2138 int size = code16 ? 2 : 4;
2140 /* It's a symbol; end frag & setup for relax.
2141 Make sure there are more than 6 chars left in the current frag;
2142 if not we'll have to start a new one. */
2143 frag_grow (prefix + 1 + 2 + size);
2144 insn_size += 1 + prefix;
2145 p = frag_more (1 + prefix);
2147 *p++ = DATA_PREFIX_OPCODE;
2148 *p = i.tm.base_opcode;
2149 frag_var (rs_machine_dependent,
2150 prefix + 2 + size, /* 2 opcode/prefix + displacement */
2152 ((unsigned char) *p == JUMP_PC_RELATIVE
2153 ? ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL) | code16
2154 : ENCODE_RELAX_STATE (COND_JUMP, SMALL) | code16),
2155 i.disps[0]->X_add_symbol,
2159 else if (i.tm.opcode_modifier & (JumpByte | JumpDword))
2161 int size = (i.tm.opcode_modifier & JumpByte) ? 1 : 4;
2162 long n = (long) i.disps[0]->X_add_number;
2164 if (size == 1) /* then this is a loop or jecxz type instruction */
2166 if (i.prefix[ADDR_PREFIX])
2169 FRAG_APPEND_1_CHAR (ADDR_PREFIX_OPCODE);
2177 if (i.prefix[DATA_PREFIX])
2180 FRAG_APPEND_1_CHAR (DATA_PREFIX_OPCODE);
2184 if (flag_16bit_code)
2191 if (!intel_syntax && (i.prefixes != 0))
2192 as_warn (_("skipping prefixes on this instruction"));
2194 if (fits_in_unsigned_byte (i.tm.base_opcode))
2196 insn_size += 1 + size;
2197 p = frag_more (1 + size);
2201 insn_size += 2 + size; /* opcode can be at most two bytes */
2202 p = frag_more (2 + size);
2203 *p++ = (i.tm.base_opcode >> 8) & 0xff;
2205 *p++ = i.tm.base_opcode & 0xff;
2207 if (i.disps[0]->X_op == O_constant)
2209 if (size == 1 && !fits_in_signed_byte (n))
2211 as_bad (_("`%s' only takes byte displacement; %ld shortened to %d"),
2214 else if (size == 2 && !fits_in_signed_word (n))
2216 as_bad (_("16-bit jump out of range"));
2219 md_number_to_chars (p, (valueT) n, size);
2223 fix_new_exp (frag_now, p - frag_now->fr_literal, size,
2224 i.disps[0], 1, reloc (size, 1, i.disp_reloc[0]));
2228 else if (i.tm.opcode_modifier & JumpInterSegment)
2232 int prefix = i.prefix[DATA_PREFIX] != 0;
2240 if (flag_16bit_code)
2244 reloc_type = BFD_RELOC_32;
2248 reloc_type = BFD_RELOC_16;
2251 if (!intel_syntax && (i.prefixes != 0))
2252 as_warn (_("skipping prefixes on this instruction"));
2254 insn_size += prefix + 1 + 2 + size; /* 1 opcode; 2 segment; offset */
2255 p = frag_more (prefix + 1 + 2 + size);
2257 *p++ = DATA_PREFIX_OPCODE;
2258 *p++ = i.tm.base_opcode;
2259 if (i.imms[1]->X_op == O_constant)
2261 long n = (long) i.imms[1]->X_add_number;
2263 if (size == 2 && !fits_in_unsigned_word (n))
2265 as_bad (_("16-bit jump out of range"));
2268 md_number_to_chars (p, (valueT) n, size);
2271 fix_new_exp (frag_now, p - frag_now->fr_literal, size,
2272 i.imms[1], 0, reloc_type);
2273 if (i.imms[0]->X_op != O_constant)
2274 as_bad (_("can't handle non absolute segment in `%s'"),
2276 md_number_to_chars (p + size, (valueT) i.imms[0]->X_add_number, 2);
2280 /* Output normal instructions here. */
2283 /* The prefix bytes. */
2285 q < i.prefix + sizeof (i.prefix) / sizeof (i.prefix[0]);
2292 md_number_to_chars (p, (valueT) *q, 1);
2296 /* Now the opcode; be careful about word order here! */
2297 if (fits_in_unsigned_byte (i.tm.base_opcode))
2300 FRAG_APPEND_1_CHAR (i.tm.base_opcode);
2302 else if (fits_in_unsigned_word (i.tm.base_opcode))
2306 /* put out high byte first: can't use md_number_to_chars! */
2307 *p++ = (i.tm.base_opcode >> 8) & 0xff;
2308 *p = i.tm.base_opcode & 0xff;
2311 { /* opcode is either 3 or 4 bytes */
2312 if (i.tm.base_opcode & 0xff000000)
2316 *p++ = (i.tm.base_opcode >> 24) & 0xff;
2323 *p++ = (i.tm.base_opcode >> 16) & 0xff;
2324 *p++ = (i.tm.base_opcode >> 8) & 0xff;
2325 *p = (i.tm.base_opcode) & 0xff;
2328 /* Now the modrm byte and sib byte (if present). */
2329 if (i.tm.opcode_modifier & Modrm)
2333 md_number_to_chars (p,
2334 (valueT) (i.rm.regmem << 0
2338 /* If i.rm.regmem == ESP (4)
2339 && i.rm.mode != (Register mode)
2341 ==> need second modrm byte. */
2342 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING
2344 && !(i.base_reg && (i.base_reg->reg_type & Reg16) != 0))
2348 md_number_to_chars (p,
2349 (valueT) (i.sib.base << 0
2351 | i.sib.scale << 6),
2356 if (i.disp_operands)
2358 register unsigned int n;
2360 for (n = 0; n < i.operands; n++)
2364 if (i.disps[n]->X_op == O_constant)
2367 long val = (long) i.disps[n]->X_add_number;
2369 if (i.types[n] & (Disp8 | Disp16))
2374 mask = ~ (long) 0xffff;
2375 if (i.types[n] & Disp8)
2378 mask = ~ (long) 0xff;
2381 if ((val & mask) != 0 && (val & mask) != mask)
2382 as_warn (_("%ld shortened to %ld"),
2386 p = frag_more (size);
2387 md_number_to_chars (p, (valueT) val, size);
2389 else if (i.types[n] & Disp32)
2393 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
2395 TC_RELOC (i.disp_reloc[n], BFD_RELOC_32));
2398 { /* must be Disp16 */
2401 fix_new_exp (frag_now, p - frag_now->fr_literal, 2,
2403 TC_RELOC (i.disp_reloc[n], BFD_RELOC_16));
2407 } /* end displacement output */
2409 /* output immediate */
2412 register unsigned int n;
2414 for (n = 0; n < i.operands; n++)
2418 if (i.imms[n]->X_op == O_constant)
2421 long val = (long) i.imms[n]->X_add_number;
2423 if (i.types[n] & (Imm8 | Imm8S | Imm16))
2428 mask = ~ (long) 0xffff;
2429 if (i.types[n] & (Imm8 | Imm8S))
2432 mask = ~ (long) 0xff;
2434 if ((val & mask) != 0 && (val & mask) != mask)
2435 as_warn (_("%ld shortened to %ld"),
2439 p = frag_more (size);
2440 md_number_to_chars (p, (valueT) val, size);
2443 { /* not absolute_section */
2444 /* Need a 32-bit fixup (don't support 8bit
2445 non-absolute ims). Try to support other
2451 if (i.types[n] & (Imm8 | Imm8S))
2453 else if (i.types[n] & Imm16)
2458 p = frag_more (size);
2459 r_type = reloc (size, 0, i.disp_reloc[0]);
2460 #ifdef BFD_ASSEMBLER
2461 if (r_type == BFD_RELOC_32
2463 && GOT_symbol == i.imms[n]->X_add_symbol
2464 && (i.imms[n]->X_op == O_symbol
2465 || (i.imms[n]->X_op == O_add
2466 && ((symbol_get_value_expression
2467 (i.imms[n]->X_op_symbol)->X_op)
2470 r_type = BFD_RELOC_386_GOTPC;
2471 i.imms[n]->X_add_number += 3;
2474 fix_new_exp (frag_now, p - frag_now->fr_literal, size,
2475 i.imms[n], pcrel, r_type);
2479 } /* end immediate output */
2487 #endif /* DEBUG386 */
2491 static int i386_is_reg PARAMS ((char *));
2494 i386_is_reg (reg_string)
2497 register char *s = reg_string;
2499 char reg_name_given[MAX_REG_NAME_SIZE + 1];
2501 if (is_space_char (*s))
2505 while ((*p++ = register_chars[(unsigned char) *s++]) != '\0')
2506 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
2509 if (!hash_find (reg_hash, reg_name_given))
2515 static int i386_immediate PARAMS ((char *));
2518 i386_immediate (imm_start)
2521 char *save_input_line_pointer;
2525 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS)
2527 as_bad (_("Only 1 or 2 immediate operands are allowed"));
2531 exp = &im_expressions[i.imm_operands++];
2532 i.imms[this_operand] = exp;
2534 if (is_space_char (*imm_start))
2537 save_input_line_pointer = input_line_pointer;
2538 input_line_pointer = imm_start;
2543 * We can have operands of the form
2544 * <symbol>@GOTOFF+<nnn>
2545 * Take the easy way out here and copy everything
2546 * into a temporary buffer...
2550 cp = strchr (input_line_pointer, '@');
2557 /* GOT relocations are not supported in 16 bit mode */
2558 if (flag_16bit_code)
2559 as_bad (_("GOT relocations not supported in 16 bit mode"));
2561 if (GOT_symbol == NULL)
2562 GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME);
2564 if (strncmp (cp + 1, "PLT", 3) == 0)
2566 i.disp_reloc[this_operand] = BFD_RELOC_386_PLT32;
2569 else if (strncmp (cp + 1, "GOTOFF", 6) == 0)
2571 i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
2574 else if (strncmp (cp + 1, "GOT", 3) == 0)
2576 i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
2580 as_bad (_("Bad reloc specifier in expression"));
2582 /* Replace the relocation token with ' ', so that errors like
2583 foo@GOTOFF1 will be detected. */
2584 first = cp - input_line_pointer;
2585 tmpbuf = (char *) alloca (strlen(input_line_pointer));
2586 memcpy (tmpbuf, input_line_pointer, first);
2587 tmpbuf[first] = ' ';
2588 strcpy (tmpbuf + first + 1, cp + 1 + len);
2589 input_line_pointer = tmpbuf;
2594 exp_seg = expression (exp);
2597 if (*input_line_pointer)
2598 as_bad (_("Ignoring junk `%s' after expression"), input_line_pointer);
2600 input_line_pointer = save_input_line_pointer;
2602 if (exp->X_op == O_absent)
2604 /* missing or bad expr becomes absolute 0 */
2605 as_bad (_("Missing or invalid immediate expression `%s' taken as 0"),
2607 exp->X_op = O_constant;
2608 exp->X_add_number = 0;
2609 exp->X_add_symbol = (symbolS *) 0;
2610 exp->X_op_symbol = (symbolS *) 0;
2611 i.types[this_operand] |= Imm;
2613 else if (exp->X_op == O_constant)
2616 if (flag_16bit_code ^ (i.prefix[DATA_PREFIX] != 0))
2619 i.types[this_operand] |=
2620 (bigimm | smallest_imm_type ((long) exp->X_add_number));
2622 /* If a suffix is given, this operand may be shortended. */
2625 case WORD_MNEM_SUFFIX:
2626 i.types[this_operand] |= Imm16;
2628 case BYTE_MNEM_SUFFIX:
2629 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
2634 else if (exp_seg != text_section
2635 && exp_seg != data_section
2636 && exp_seg != bss_section
2637 && exp_seg != undefined_section
2638 #ifdef BFD_ASSEMBLER
2639 && !bfd_is_com_section (exp_seg)
2643 as_bad (_("Unimplemented segment type %d in operand"), exp_seg);
2649 /* This is an address. The size of the address will be
2650 determined later, depending on destination register,
2651 suffix, or the default for the section. We exclude
2652 Imm8S here so that `push $foo' and other instructions
2653 with an Imm8S form will use Imm16 or Imm32. */
2654 i.types[this_operand] |= (Imm8 | Imm16 | Imm32);
2660 static int i386_scale PARAMS ((char *));
2666 if (!isdigit (*scale))
2673 i.log2_scale_factor = 0;
2676 i.log2_scale_factor = 1;
2679 i.log2_scale_factor = 2;
2682 i.log2_scale_factor = 3;
2686 as_bad (_("expecting scale factor of 1, 2, 4, or 8: got `%s'"),
2690 if (i.log2_scale_factor != 0 && ! i.index_reg)
2692 as_warn (_("scale factor of %d without an index register"),
2693 1 << i.log2_scale_factor);
2694 #if SCALE1_WHEN_NO_INDEX
2695 i.log2_scale_factor = 0;
2701 static int i386_displacement PARAMS ((char *, char *));
2704 i386_displacement (disp_start, disp_end)
2708 register expressionS *exp;
2710 char *save_input_line_pointer;
2711 int bigdisp = Disp32;
2713 /* All of the pieces of the displacement expression are handled together. */
2714 if (intel_syntax && i.disp_operands != 0)
2717 if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
2719 i.types[this_operand] |= bigdisp;
2721 exp = &disp_expressions[i.disp_operands];
2722 i.disps[this_operand] = exp;
2723 i.disp_reloc[this_operand] = NO_RELOC;
2725 save_input_line_pointer = input_line_pointer;
2726 input_line_pointer = disp_start;
2727 END_STRING_AND_SAVE (disp_end);
2729 #ifndef GCC_ASM_O_HACK
2730 #define GCC_ASM_O_HACK 0
2733 END_STRING_AND_SAVE (disp_end + 1);
2734 if ((i.types[this_operand] & BaseIndex) != 0
2735 && displacement_string_end[-1] == '+')
2737 /* This hack is to avoid a warning when using the "o"
2738 constraint within gcc asm statements.
2741 #define _set_tssldt_desc(n,addr,limit,type) \
2742 __asm__ __volatile__ ( \
2744 "movw %w1,2+%0\n\t" \
2746 "movb %b1,4+%0\n\t" \
2747 "movb %4,5+%0\n\t" \
2748 "movb $0,6+%0\n\t" \
2749 "movb %h1,7+%0\n\t" \
2751 : "=o"(*(n)) : "q" (addr), "ri"(limit), "i"(type))
2753 This works great except that the output assembler ends
2754 up looking a bit weird if it turns out that there is
2755 no offset. You end up producing code that looks like:
2768 So here we provide the missing zero.
2771 *displacement_string_end = '0';
2777 * We can have operands of the form
2778 * <symbol>@GOTOFF+<nnn>
2779 * Take the easy way out here and copy everything
2780 * into a temporary buffer...
2784 cp = strchr (input_line_pointer, '@');
2791 /* GOT relocations are not supported in 16 bit mode */
2792 if (flag_16bit_code)
2793 as_bad (_("GOT relocations not supported in 16 bit mode"));
2795 if (GOT_symbol == NULL)
2796 GOT_symbol = symbol_find_or_make (GLOBAL_OFFSET_TABLE_NAME);
2798 if (strncmp (cp + 1, "PLT", 3) == 0)
2800 i.disp_reloc[this_operand] = BFD_RELOC_386_PLT32;
2803 else if (strncmp (cp + 1, "GOTOFF", 6) == 0)
2805 i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
2808 else if (strncmp (cp + 1, "GOT", 3) == 0)
2810 i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
2814 as_bad (_("Bad reloc specifier in expression"));
2816 /* Replace the relocation token with ' ', so that errors like
2817 foo@GOTOFF1 will be detected. */
2818 first = cp - input_line_pointer;
2819 tmpbuf = (char *) alloca (strlen(input_line_pointer));
2820 memcpy (tmpbuf, input_line_pointer, first);
2821 tmpbuf[first] = ' ';
2822 strcpy (tmpbuf + first + 1, cp + 1 + len);
2823 input_line_pointer = tmpbuf;
2828 exp_seg = expression (exp);
2830 #ifdef BFD_ASSEMBLER
2831 /* We do this to make sure that the section symbol is in
2832 the symbol table. We will ultimately change the relocation
2833 to be relative to the beginning of the section */
2834 if (i.disp_reloc[this_operand] == BFD_RELOC_386_GOTOFF)
2836 if (S_IS_LOCAL(exp->X_add_symbol)
2837 && S_GET_SEGMENT (exp->X_add_symbol) != undefined_section)
2838 section_symbol (S_GET_SEGMENT (exp->X_add_symbol));
2839 assert (exp->X_op == O_symbol);
2840 exp->X_op = O_subtract;
2841 exp->X_op_symbol = GOT_symbol;
2842 i.disp_reloc[this_operand] = BFD_RELOC_32;
2847 if (*input_line_pointer)
2848 as_bad (_("Ignoring junk `%s' after expression"),
2849 input_line_pointer);
2851 RESTORE_END_STRING (disp_end + 1);
2853 RESTORE_END_STRING (disp_end);
2854 input_line_pointer = save_input_line_pointer;
2856 if (exp->X_op == O_constant)
2858 if (fits_in_signed_byte (exp->X_add_number))
2859 i.types[this_operand] |= Disp8;
2862 else if (exp_seg != text_section
2863 && exp_seg != data_section
2864 && exp_seg != bss_section
2865 && exp_seg != undefined_section)
2867 as_bad (_ ("Unimplemented segment type %d in operand"), exp_seg);
2874 static int i386_operand_modifier PARAMS ((char **, int));
2877 i386_operand_modifier (op_string, got_a_float)
2881 if (!strncasecmp (*op_string, "BYTE PTR", 8))
2883 i.suffix = BYTE_MNEM_SUFFIX;
2888 else if (!strncasecmp (*op_string, "WORD PTR", 8))
2890 i.suffix = WORD_MNEM_SUFFIX;
2895 else if (!strncasecmp (*op_string, "DWORD PTR", 9))
2898 i.suffix = SHORT_MNEM_SUFFIX;
2900 i.suffix = DWORD_MNEM_SUFFIX;
2905 else if (!strncasecmp (*op_string, "QWORD PTR", 9))
2907 i.suffix = INTEL_DWORD_MNEM_SUFFIX;
2912 else if (!strncasecmp (*op_string, "XWORD PTR", 9))
2914 i.suffix = LONG_DOUBLE_MNEM_SUFFIX;
2919 else if (!strncasecmp (*op_string, "SHORT", 5))
2925 else if (!strncasecmp (*op_string, "OFFSET FLAT:", 12))
2931 else if (!strncasecmp (*op_string, "FLAT", 4))
2937 else return NONE_FOUND;
2940 static char * build_displacement_string PARAMS ((int, char *));
2943 build_displacement_string (initial_disp, op_string)
2947 char *temp_string = (char *) malloc (strlen (op_string) + 1);
2948 char *end_of_operand_string;
2952 temp_string[0] = '\0';
2953 tc = end_of_operand_string = strchr (op_string, '[');
2954 if ( initial_disp && !end_of_operand_string)
2956 strcpy (temp_string, op_string);
2957 return (temp_string);
2960 /* Build the whole displacement string */
2963 strncpy (temp_string, op_string, end_of_operand_string - op_string);
2964 temp_string[end_of_operand_string - op_string] = '\0';
2968 temp_disp = op_string;
2970 while (*temp_disp != '\0')
2972 int add_minus = (*temp_disp == '-');
2974 if (*temp_disp == '+' || *temp_disp == '-' || *temp_disp == '[')
2977 if (is_space_char (*temp_disp))
2980 /* Don't consider registers */
2981 if (*temp_disp != REGISTER_PREFIX
2982 && !(allow_naked_reg && i386_is_reg (temp_disp)))
2984 char *string_start = temp_disp;
2986 while (*temp_disp != ']'
2987 && *temp_disp != '+'
2988 && *temp_disp != '-'
2989 && *temp_disp != '*')
2993 strcat (temp_string, "-");
2995 strcat (temp_string, "+");
2997 strncat (temp_string, string_start, temp_disp - string_start);
2998 if (*temp_disp == '+' || *temp_disp == '-')
3002 while (*temp_disp != '\0'
3003 && *temp_disp != '+'
3004 && *temp_disp != '-')
3011 static int i386_parse_seg PARAMS ((char *));
3014 i386_parse_seg (op_string)
3017 if (is_space_char (*op_string))
3020 /* Should be one of es, cs, ss, ds fs or gs */
3021 switch (*op_string++)
3024 i.seg[i.mem_operands] = &es;
3027 i.seg[i.mem_operands] = &cs;
3030 i.seg[i.mem_operands] = &ss;
3033 i.seg[i.mem_operands] = &ds;
3036 i.seg[i.mem_operands] = &fs;
3039 i.seg[i.mem_operands] = &gs;
3042 as_bad (_("bad segment name `%s'"), op_string);
3046 if (*op_string++ != 's')
3048 as_bad (_("bad segment name `%s'"), op_string);
3052 if (is_space_char (*op_string))
3055 if (*op_string != ':')
3057 as_bad (_("bad segment name `%s'"), op_string);
3065 static int i386_intel_memory_operand PARAMS ((char *));
3068 i386_intel_memory_operand (op_string)
3072 char *end_of_operand_string;
3074 if (is_digit_char (*op_string)
3075 && strchr (op_string, '[') == 0)
3077 if (!i386_immediate (op_string))
3083 /* Look for displacement preceding open bracket */
3084 if (*op_string != '[')
3089 end_seg = strchr (op_string, ':');
3092 if (!i386_parse_seg (op_string))
3094 op_string = end_seg + 1;
3097 temp_string = build_displacement_string (true, op_string);
3098 if (!i386_displacement (temp_string, temp_string + strlen (temp_string)))
3101 end_of_operand_string = strchr (op_string, '[');
3102 if (!end_of_operand_string)
3103 end_of_operand_string = op_string + strlen (op_string);
3105 if (is_space_char (*end_of_operand_string))
3106 --end_of_operand_string;
3108 op_string = end_of_operand_string;
3111 if (*op_string == '[')
3115 /* Pick off each component and figure out where it belongs */
3117 end_of_operand_string = op_string;
3119 while (*op_string != ']')
3122 while (*end_of_operand_string != '+'
3123 && *end_of_operand_string != '-'
3124 && *end_of_operand_string != '*'
3125 && *end_of_operand_string != ']')
3126 end_of_operand_string++;
3128 if (*op_string == '+')
3130 char *temp_string = op_string + 1;
3131 if (is_space_char (*temp_string))
3133 if (*temp_string == REGISTER_PREFIX
3134 || (allow_naked_reg && i386_is_reg (temp_string)))
3138 if (*op_string == REGISTER_PREFIX
3139 || (allow_naked_reg && i386_is_reg (op_string)))
3141 const reg_entry *temp_reg;
3144 END_STRING_AND_SAVE (end_of_operand_string);
3145 temp_reg = parse_register (op_string, &end_op);
3146 RESTORE_END_STRING (end_of_operand_string);
3148 if (temp_reg == NULL)
3151 if (i.base_reg == NULL)
3152 i.base_reg = temp_reg;
3154 i.index_reg = temp_reg;
3156 i.types[this_operand] |= BaseIndex;
3159 else if (is_digit_char (*op_string) || *op_string == '+' || *op_string == '-')
3162 char *temp_string = build_displacement_string (false, op_string);
3164 if (*temp_string == '+')
3167 if (!i386_displacement (temp_string, temp_string + strlen (temp_string)))
3171 end_of_operand_string = op_string;
3172 while (*end_of_operand_string != ']'
3173 && *end_of_operand_string != '+'
3174 && *end_of_operand_string != '-'
3175 && *end_of_operand_string != '*')
3176 ++end_of_operand_string;
3178 else if (*op_string == '*')
3182 if (i.base_reg && !i.index_reg)
3184 i.index_reg = i.base_reg;
3188 if (!i386_scale (op_string))
3191 op_string = end_of_operand_string;
3192 ++end_of_operand_string;
3199 static int i386_intel_operand PARAMS ((char *, int));
3202 i386_intel_operand (operand_string, got_a_float)
3203 char *operand_string;
3206 char *op_string = operand_string;
3208 int operand_modifier = i386_operand_modifier (&op_string, got_a_float);
3209 if (is_space_char (*op_string))
3212 switch (operand_modifier)
3219 if ((i.mem_operands == 1
3220 && (current_templates->start->opcode_modifier & IsString) == 0)
3221 || i.mem_operands == 2)
3223 as_bad (_("too many memory references for `%s'"),
3224 current_templates->start->name);
3228 if (!i386_intel_memory_operand (op_string))
3237 if (!i386_immediate (op_string))
3244 /* Should be register or immediate */
3245 if (is_digit_char (*op_string)
3246 && strchr (op_string, '[') == 0)
3248 if (!i386_immediate (op_string))
3251 else if (*op_string == REGISTER_PREFIX
3253 && i386_is_reg (op_string)))
3256 register const reg_entry * r;
3259 r = parse_register (op_string, &end_op);
3263 /* Check for a segment override by searching for ':' after a
3264 segment register. */
3266 if (is_space_char (*op_string))
3268 if (*op_string == ':' && (r->reg_type & (SReg2 | SReg3)))
3273 i.seg[i.mem_operands] = &es;
3276 i.seg[i.mem_operands] = &cs;
3279 i.seg[i.mem_operands] = &ss;
3282 i.seg[i.mem_operands] = &ds;
3285 i.seg[i.mem_operands] = &fs;
3288 i.seg[i.mem_operands] = &gs;
3293 i.types[this_operand] |= r->reg_type & ~BaseIndex;
3294 i.regs[this_operand] = r;
3301 if (!i386_intel_memory_operand (op_string))
3309 /* Special case for (%dx) while doing input/output op. */
3311 && i.base_reg->reg_type == (Reg16 | InOutPortReg)
3313 && i.log2_scale_factor == 0
3314 && i.seg[i.mem_operands] == 0
3315 && (i.types[this_operand] & Disp) == 0)
3317 i.types[this_operand] = InOutPortReg;
3320 /* Make sure the memory operand we've been dealt is valid. */
3321 if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
3324 && ((i.base_reg->reg_type & (Reg16|BaseIndex))
3325 != (Reg16|BaseIndex)))
3327 && (((i.index_reg->reg_type & (Reg16|BaseIndex))
3328 != (Reg16|BaseIndex))
3330 && i.base_reg->reg_num < 6
3331 && i.index_reg->reg_num >= 6
3332 && i.log2_scale_factor == 0))))
3334 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3335 operand_string, "16");
3342 && (i.base_reg->reg_type & Reg32) == 0)
3344 && ((i.index_reg->reg_type & (Reg32|BaseIndex))
3345 != (Reg32|BaseIndex))))
3347 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3348 operand_string, "32");
3355 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
3358 static int i386_operand PARAMS ((char *));
3361 i386_operand (operand_string)
3362 char *operand_string;
3364 char *op_string = operand_string;
3366 if (is_space_char (*op_string))
3369 /* We check for an absolute prefix (differentiating,
3370 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
3371 if (*op_string == ABSOLUTE_PREFIX)
3374 if (is_space_char (*op_string))
3376 i.types[this_operand] |= JumpAbsolute;
3379 /* Check if operand is a register. */
3380 if (*op_string == REGISTER_PREFIX
3381 || (allow_naked_reg && i386_is_reg (op_string)))
3383 register const reg_entry *r;
3386 r = parse_register (op_string, &end_op);
3390 /* Check for a segment override by searching for ':' after a
3391 segment register. */
3393 if (is_space_char (*op_string))
3395 if (*op_string == ':' && (r->reg_type & (SReg2 | SReg3)))
3400 i.seg[i.mem_operands] = &es;
3403 i.seg[i.mem_operands] = &cs;
3406 i.seg[i.mem_operands] = &ss;
3409 i.seg[i.mem_operands] = &ds;
3412 i.seg[i.mem_operands] = &fs;
3415 i.seg[i.mem_operands] = &gs;
3419 /* Skip the ':' and whitespace. */
3421 if (is_space_char (*op_string))
3424 /* Pretend given string starts here. */
3425 operand_string = op_string;
3426 if (!is_digit_char (*op_string)
3427 && !is_identifier_char (*op_string)
3428 && *op_string != '('
3429 && *op_string != ABSOLUTE_PREFIX)
3431 as_bad (_("bad memory operand `%s'"), op_string);
3434 /* Handle case of %es:*foo. */
3435 if (*op_string == ABSOLUTE_PREFIX)
3438 if (is_space_char (*op_string))
3440 i.types[this_operand] |= JumpAbsolute;
3442 goto do_memory_reference;
3446 as_bad (_("Junk `%s' after register"), op_string);
3449 i.types[this_operand] |= r->reg_type & ~BaseIndex;
3450 i.regs[this_operand] = r;
3453 else if (*op_string == IMMEDIATE_PREFIX)
3454 { /* ... or an immediate */
3456 if (i.types[this_operand] & JumpAbsolute)
3458 as_bad (_("Immediate operand illegal with absolute jump"));
3461 if (!i386_immediate (op_string))
3464 else if (is_digit_char (*op_string)
3465 || is_identifier_char (*op_string)
3466 || *op_string == '(' )
3468 /* This is a memory reference of some sort. */
3469 char *end_of_operand_string;
3470 register char *base_string;
3471 int found_base_index_form;
3473 /* Start and end of displacement string expression (if found). */
3474 char *displacement_string_start = NULL;
3475 char *displacement_string_end = NULL;
3477 do_memory_reference:
3479 if ((i.mem_operands == 1
3480 && (current_templates->start->opcode_modifier & IsString) == 0)
3481 || i.mem_operands == 2)
3483 as_bad (_("too many memory references for `%s'"),
3484 current_templates->start->name);
3488 /* Check for base index form. We detect the base index form by
3489 looking for an ')' at the end of the operand, searching
3490 for the '(' matching it, and finding a REGISTER_PREFIX or ','
3492 found_base_index_form = 0;
3493 end_of_operand_string = op_string + strlen (op_string);
3495 --end_of_operand_string;
3496 if (is_space_char (*end_of_operand_string))
3497 --end_of_operand_string;
3499 base_string = end_of_operand_string;
3501 if (*base_string == ')')
3503 unsigned int parens_balanced = 1;
3504 /* We've already checked that the number of left & right ()'s are
3505 equal, so this loop will not be infinite. */
3509 if (*base_string == ')')
3511 if (*base_string == '(')
3514 while (parens_balanced);
3516 /* If there is a displacement set-up for it to be parsed later. */
3517 displacement_string_start = op_string;
3518 displacement_string_end = base_string;
3520 /* Skip past '(' and whitespace. */
3522 if (is_space_char (*base_string))
3525 if (*base_string == REGISTER_PREFIX
3526 || (allow_naked_reg && i386_is_reg (base_string))
3527 || *base_string == ',')
3528 found_base_index_form = 1;
3531 /* If we can't parse a base index register expression, we've found
3532 a pure displacement expression. We set up displacement_string_start
3533 and displacement_string_end for the code below. */
3534 if (!found_base_index_form)
3536 displacement_string_start = op_string;
3537 displacement_string_end = end_of_operand_string + 1;
3541 i.types[this_operand] |= BaseIndex;
3543 /* Find base register (if any). */
3544 if (*base_string != ',')
3548 /* Trim off the closing ')' so that parse_register won't
3550 END_STRING_AND_SAVE (end_of_operand_string);
3551 i.base_reg = parse_register (base_string, &end_op);
3552 RESTORE_END_STRING (end_of_operand_string);
3554 if (i.base_reg == NULL)
3557 base_string = end_op;
3558 if (is_space_char (*base_string))
3562 /* There may be an index reg or scale factor here. */
3563 if (*base_string == ',')
3566 if (is_space_char (*base_string))
3569 if (*base_string == REGISTER_PREFIX
3570 || (allow_naked_reg && i386_is_reg (base_string)))
3574 END_STRING_AND_SAVE (end_of_operand_string);
3575 i.index_reg = parse_register (base_string, &end_op);
3576 RESTORE_END_STRING (end_of_operand_string);
3578 if (i.index_reg == NULL)
3581 base_string = end_op;
3582 if (is_space_char (*base_string))
3584 if (*base_string == ',')
3587 if (is_space_char (*base_string))
3590 else if (*base_string != ')' )
3592 as_bad (_("expecting `,' or `)' after index register in `%s'"),
3598 /* Check for scale factor. */
3599 if (isdigit ((unsigned char) *base_string))
3601 if (!i386_scale (base_string))
3605 if (is_space_char (*base_string))
3607 if (*base_string != ')')
3609 as_bad (_("expecting `)' after scale factor in `%s'"),
3614 else if (!i.index_reg)
3616 as_bad (_("expecting index register or scale factor after `,'; got '%c'"),
3621 else if (*base_string != ')')
3623 as_bad (_("expecting `,' or `)' after base register in `%s'"),
3629 /* If there's an expression beginning the operand, parse it,
3630 assuming displacement_string_start and
3631 displacement_string_end are meaningful. */
3632 if (displacement_string_start != displacement_string_end)
3634 if (!i386_displacement (displacement_string_start,
3635 displacement_string_end))
3639 /* Special case for (%dx) while doing input/output op. */
3641 && i.base_reg->reg_type == (Reg16 | InOutPortReg)
3643 && i.log2_scale_factor == 0
3644 && i.seg[i.mem_operands] == 0
3645 && (i.types[this_operand] & Disp) == 0)
3647 i.types[this_operand] = InOutPortReg;
3650 /* Make sure the memory operand we've been dealt is valid. */
3651 if (flag_16bit_code ^ (i.prefix[ADDR_PREFIX] != 0))
3654 && ((i.base_reg->reg_type & (Reg16|BaseIndex))
3655 != (Reg16|BaseIndex)))
3657 && (((i.index_reg->reg_type & (Reg16|BaseIndex))
3658 != (Reg16|BaseIndex))
3660 && i.base_reg->reg_num < 6
3661 && i.index_reg->reg_num >= 6
3662 && i.log2_scale_factor == 0))))
3664 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3665 operand_string, "16");
3672 && (i.base_reg->reg_type & Reg32) == 0)
3674 && ((i.index_reg->reg_type & (Reg32|BaseIndex))
3675 != (Reg32|BaseIndex))))
3677 as_bad (_("`%s' is not a valid %s bit base/index expression"),
3678 operand_string, "32");
3685 { /* it's not a memory operand; argh! */
3686 as_bad (_("invalid char %s beginning operand %d `%s'"),
3687 output_invalid (*op_string),
3692 return 1; /* normal return */
3696 * md_estimate_size_before_relax()
3698 * Called just before relax().
3699 * Any symbol that is now undefined will not become defined.
3700 * Return the correct fr_subtype in the frag.
3701 * Return the initial "guess for fr_var" to caller.
3702 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
3703 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
3704 * Although it may not be explicit in the frag, pretend fr_var starts with a
3708 md_estimate_size_before_relax (fragP, segment)
3709 register fragS *fragP;
3710 register segT segment;
3712 register unsigned char *opcode;
3713 register int old_fr_fix;
3715 old_fr_fix = fragP->fr_fix;
3716 opcode = (unsigned char *) fragP->fr_opcode;
3717 /* We've already got fragP->fr_subtype right; all we have to do is
3718 check for un-relaxable symbols. */
3719 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
3721 /* symbol is undefined in this segment */
3722 int code16 = fragP->fr_subtype & CODE16;
3723 int size = code16 ? 2 : 4;
3724 int pcrel_reloc = code16 ? BFD_RELOC_16_PCREL : BFD_RELOC_32_PCREL;
3728 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
3729 opcode[0] = 0xe9; /* dword disp jmp */
3730 fragP->fr_fix += size;
3731 fix_new (fragP, old_fr_fix, size,
3733 fragP->fr_offset, 1,
3734 (GOT_symbol && /* Not quite right - we should switch on
3735 presence of @PLT, but I cannot see how
3736 to get to that from here. We should have
3737 done this in md_assemble to really
3738 get it right all of the time, but I
3739 think it does not matter that much, as
3740 this will be right most of the time. ERY*/
3741 S_GET_SEGMENT(fragP->fr_symbol) == undefined_section)
3742 ? BFD_RELOC_386_PLT32 : pcrel_reloc);
3746 /* This changes the byte-displacement jump 0x7N -->
3747 the dword-displacement jump 0x0f8N */
3748 opcode[1] = opcode[0] + 0x10;
3749 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
3750 fragP->fr_fix += 1 + size; /* we've added an opcode byte */
3751 fix_new (fragP, old_fr_fix + 1, size,
3753 fragP->fr_offset, 1,
3754 (GOT_symbol && /* Not quite right - we should switch on
3755 presence of @PLT, but I cannot see how
3756 to get to that from here. ERY */
3757 S_GET_SEGMENT(fragP->fr_symbol) == undefined_section)
3758 ? BFD_RELOC_386_PLT32 : pcrel_reloc);
3763 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
3764 } /* md_estimate_size_before_relax() */
3767 * md_convert_frag();
3769 * Called after relax() is finished.
3770 * In: Address of frag.
3771 * fr_type == rs_machine_dependent.
3772 * fr_subtype is what the address relaxed to.
3774 * Out: Any fixSs and constants are set up.
3775 * Caller will turn frag into a ".space 0".
3777 #ifndef BFD_ASSEMBLER
3779 md_convert_frag (headers, sec, fragP)
3780 object_headers *headers;
3782 register fragS *fragP;
3785 md_convert_frag (abfd, sec, fragP)
3786 bfd *abfd ATTRIBUTE_UNUSED;
3787 segT sec ATTRIBUTE_UNUSED;
3788 register fragS *fragP;
3791 register unsigned char *opcode;
3792 unsigned char *where_to_put_displacement = NULL;
3793 unsigned int target_address;
3794 unsigned int opcode_address;
3795 unsigned int extension = 0;
3796 int displacement_from_opcode_start;
3798 opcode = (unsigned char *) fragP->fr_opcode;
3800 /* Address we want to reach in file space. */
3801 target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
3802 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
3803 target_address += symbol_get_frag (fragP->fr_symbol)->fr_address;
3806 /* Address opcode resides at in file space. */
3807 opcode_address = fragP->fr_address + fragP->fr_fix;
3809 /* Displacement from opcode start to fill into instruction. */
3810 displacement_from_opcode_start = target_address - opcode_address;
3812 switch (fragP->fr_subtype)
3814 case ENCODE_RELAX_STATE (COND_JUMP, SMALL):
3815 case ENCODE_RELAX_STATE (COND_JUMP, SMALL16):
3816 case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL):
3817 case ENCODE_RELAX_STATE (UNCOND_JUMP, SMALL16):
3818 /* don't have to change opcode */
3819 extension = 1; /* 1 opcode + 1 displacement */
3820 where_to_put_displacement = &opcode[1];
3823 case ENCODE_RELAX_STATE (COND_JUMP, BIG):
3824 extension = 5; /* 2 opcode + 4 displacement */
3825 opcode[1] = opcode[0] + 0x10;
3826 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
3827 where_to_put_displacement = &opcode[2];
3830 case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG):
3831 extension = 4; /* 1 opcode + 4 displacement */
3833 where_to_put_displacement = &opcode[1];
3836 case ENCODE_RELAX_STATE (COND_JUMP, BIG16):
3837 extension = 3; /* 2 opcode + 2 displacement */
3838 opcode[1] = opcode[0] + 0x10;
3839 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
3840 where_to_put_displacement = &opcode[2];
3843 case ENCODE_RELAX_STATE (UNCOND_JUMP, BIG16):
3844 extension = 2; /* 1 opcode + 2 displacement */
3846 where_to_put_displacement = &opcode[1];
3850 BAD_CASE (fragP->fr_subtype);
3853 /* now put displacement after opcode */
3854 md_number_to_chars ((char *) where_to_put_displacement,
3855 (valueT) (displacement_from_opcode_start - extension),
3856 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
3857 fragP->fr_fix += extension;
3861 int md_short_jump_size = 2; /* size of byte displacement jmp */
3862 int md_long_jump_size = 5; /* size of dword displacement jmp */
3863 const int md_reloc_size = 8; /* Size of relocation record */
3866 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
3868 addressT from_addr, to_addr;
3869 fragS *frag ATTRIBUTE_UNUSED;
3870 symbolS *to_symbol ATTRIBUTE_UNUSED;
3874 offset = to_addr - (from_addr + 2);
3875 md_number_to_chars (ptr, (valueT) 0xeb, 1); /* opcode for byte-disp jump */
3876 md_number_to_chars (ptr + 1, (valueT) offset, 1);
3880 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
3882 addressT from_addr, to_addr;
3888 if (flag_do_long_jump)
3890 offset = to_addr - S_GET_VALUE (to_symbol);
3891 md_number_to_chars (ptr, (valueT) 0xe9, 1);/* opcode for long jmp */
3892 md_number_to_chars (ptr + 1, (valueT) offset, 4);
3893 fix_new (frag, (ptr + 1) - frag->fr_literal, 4,
3894 to_symbol, (offsetT) 0, 0, BFD_RELOC_32);
3898 offset = to_addr - (from_addr + 5);
3899 md_number_to_chars (ptr, (valueT) 0xe9, 1);
3900 md_number_to_chars (ptr + 1, (valueT) offset, 4);
3904 /* Apply a fixup (fixS) to segment data, once it has been determined
3905 by our caller that we have all the info we need to fix it up.
3907 On the 386, immediates, displacements, and data pointers are all in
3908 the same (little-endian) format, so we don't need to care about which
3912 md_apply_fix3 (fixP, valp, seg)
3913 fixS *fixP; /* The fix we're to put in. */
3914 valueT *valp; /* Pointer to the value of the bits. */
3915 segT seg; /* Segment fix is from. */
3917 register char *p = fixP->fx_where + fixP->fx_frag->fr_literal;
3918 valueT value = *valp;
3920 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
3923 switch (fixP->fx_r_type)
3929 fixP->fx_r_type = BFD_RELOC_32_PCREL;
3932 fixP->fx_r_type = BFD_RELOC_16_PCREL;
3935 fixP->fx_r_type = BFD_RELOC_8_PCREL;
3941 * This is a hack. There should be a better way to
3944 if ((fixP->fx_r_type == BFD_RELOC_32_PCREL
3945 || fixP->fx_r_type == BFD_RELOC_16_PCREL
3946 || fixP->fx_r_type == BFD_RELOC_8_PCREL)
3950 if (OUTPUT_FLAVOR == bfd_target_elf_flavour
3952 || OUTPUT_FLAVOR == bfd_target_coff_flavour
3955 value += fixP->fx_where + fixP->fx_frag->fr_address;
3957 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3958 if (OUTPUT_FLAVOR == bfd_target_elf_flavour
3959 && (S_GET_SEGMENT (fixP->fx_addsy) == seg
3960 || symbol_section_p (fixP->fx_addsy))
3961 && ! S_IS_EXTERNAL (fixP->fx_addsy)
3962 && ! S_IS_WEAK (fixP->fx_addsy)
3963 && S_IS_DEFINED (fixP->fx_addsy)
3964 && ! S_IS_COMMON (fixP->fx_addsy))
3966 /* Yes, we add the values in twice. This is because
3967 bfd_perform_relocation subtracts them out again. I think
3968 bfd_perform_relocation is broken, but I don't dare change
3970 value += fixP->fx_where + fixP->fx_frag->fr_address;
3973 #if defined (OBJ_COFF) && defined (TE_PE)
3974 /* For some reason, the PE format does not store a section
3975 address offset for a PC relative symbol. */
3976 if (S_GET_SEGMENT (fixP->fx_addsy) != seg)
3977 value += md_pcrel_from (fixP);
3981 /* Fix a few things - the dynamic linker expects certain values here,
3982 and we must not dissappoint it. */
3983 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
3984 if (OUTPUT_FLAVOR == bfd_target_elf_flavour
3986 switch (fixP->fx_r_type) {
3987 case BFD_RELOC_386_PLT32:
3988 /* Make the jump instruction point to the address of the operand. At
3989 runtime we merely add the offset to the actual PLT entry. */
3992 case BFD_RELOC_386_GOTPC:
3994 * This is tough to explain. We end up with this one if we have
3995 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
3996 * here is to obtain the absolute address of the GOT, and it is strongly
3997 * preferable from a performance point of view to avoid using a runtime
3998 * relocation for this. The actual sequence of instructions often look
4004 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
4006 * The call and pop essentially return the absolute address of
4007 * the label .L66 and store it in %ebx. The linker itself will
4008 * ultimately change the first operand of the addl so that %ebx points to
4009 * the GOT, but to keep things simple, the .o file must have this operand
4010 * set so that it generates not the absolute address of .L66, but the
4011 * absolute address of itself. This allows the linker itself simply
4012 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
4013 * added in, and the addend of the relocation is stored in the operand
4014 * field for the instruction itself.
4016 * Our job here is to fix the operand so that it would add the correct
4017 * offset so that %ebx would point to itself. The thing that is tricky is
4018 * that .-.L66 will point to the beginning of the instruction, so we need
4019 * to further modify the operand so that it will point to itself.
4020 * There are other cases where you have something like:
4022 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
4024 * and here no correction would be required. Internally in the assembler
4025 * we treat operands of this form as not being pcrel since the '.' is
4026 * explicitly mentioned, and I wonder whether it would simplify matters
4027 * to do it this way. Who knows. In earlier versions of the PIC patches,
4028 * the pcrel_adjust field was used to store the correction, but since the
4029 * expression is not pcrel, I felt it would be confusing to do it this way.
4033 case BFD_RELOC_386_GOT32:
4034 value = 0; /* Fully resolved at runtime. No addend. */
4036 case BFD_RELOC_386_GOTOFF:
4039 case BFD_RELOC_VTABLE_INHERIT:
4040 case BFD_RELOC_VTABLE_ENTRY:
4047 #endif /* defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF) */
4049 #endif /* defined (BFD_ASSEMBLER) && !defined (TE_Mach) */
4050 md_number_to_chars (p, value, fixP->fx_size);
4056 /* This is never used. */
4057 long /* Knows about the byte order in a word. */
4058 md_chars_to_number (con, nbytes)
4059 unsigned char con[]; /* Low order byte 1st. */
4060 int nbytes; /* Number of bytes in the input. */
4063 for (retval = 0, con += nbytes - 1; nbytes--; con--)
4065 retval <<= BITS_PER_CHAR;
4073 #define MAX_LITTLENUMS 6
4075 /* Turn the string pointed to by litP into a floating point constant of type
4076 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
4077 is stored in *sizeP . An error message is returned, or NULL on OK. */
4079 md_atof (type, litP, sizeP)
4085 LITTLENUM_TYPE words[MAX_LITTLENUMS];
4086 LITTLENUM_TYPE *wordP;
4108 return _("Bad call to md_atof ()");
4110 t = atof_ieee (input_line_pointer, type, words);
4112 input_line_pointer = t;
4114 *sizeP = prec * sizeof (LITTLENUM_TYPE);
4115 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
4116 the bigendian 386. */
4117 for (wordP = words + prec - 1; prec--;)
4119 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
4120 litP += sizeof (LITTLENUM_TYPE);
4125 char output_invalid_buf[8];
4127 static char * output_invalid PARAMS ((int));
4134 sprintf (output_invalid_buf, "'%c'", c);
4136 sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
4137 return output_invalid_buf;
4140 /* REG_STRING starts *before* REGISTER_PREFIX. */
4142 static const reg_entry * parse_register PARAMS ((char *, char **));
4144 static const reg_entry *
4145 parse_register (reg_string, end_op)
4149 register char *s = reg_string;
4151 char reg_name_given[MAX_REG_NAME_SIZE + 1];
4154 /* Skip possible REGISTER_PREFIX and possible whitespace. */
4155 if (*s == REGISTER_PREFIX)
4158 if (is_space_char (*s))
4162 while ((*p++ = register_chars[(unsigned char) *s++]) != '\0')
4164 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
4166 if (!allow_naked_reg)
4169 as_bad (_("bad register name `%s'"), reg_name_given);
4171 return (const reg_entry *) NULL;
4177 r = (const reg_entry *) hash_find (reg_hash, reg_name_given);
4181 if (!allow_naked_reg)
4182 as_bad (_("bad register name `%s'"), reg_name_given);
4183 return (const reg_entry *) NULL;
4190 CONST char *md_shortopts = "kmVQ:";
4192 CONST char *md_shortopts = "m";
4194 struct option md_longopts[] = {
4195 {NULL, no_argument, NULL, 0}
4197 size_t md_longopts_size = sizeof (md_longopts);
4200 md_parse_option (c, arg)
4202 char *arg ATTRIBUTE_UNUSED;
4207 flag_do_long_jump = 1;
4210 #if defined (OBJ_ELF) || defined (OBJ_MAYBE_ELF)
4211 /* -k: Ignore for FreeBSD compatibility. */
4215 /* -V: SVR4 argument to print version ID. */
4217 print_version_id ();
4220 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
4221 should be emitted or not. FIXME: Not implemented. */
4233 md_show_usage (stream)
4236 fprintf (stream, _("\
4237 -m do long jump\n"));
4240 #ifdef BFD_ASSEMBLER
4241 #ifdef OBJ_MAYBE_ELF
4242 #ifdef OBJ_MAYBE_COFF
4244 /* Pick the target format to use. */
4247 i386_target_format ()
4249 switch (OUTPUT_FLAVOR)
4251 case bfd_target_coff_flavour:
4253 case bfd_target_elf_flavour:
4254 return "elf32-i386";
4261 #endif /* OBJ_MAYBE_COFF */
4262 #endif /* OBJ_MAYBE_ELF */
4263 #endif /* BFD_ASSEMBLER */
4267 md_undefined_symbol (name)
4270 if (*name == '_' && *(name+1) == 'G'
4271 && strcmp(name, GLOBAL_OFFSET_TABLE_NAME) == 0)
4275 if (symbol_find (name))
4276 as_bad (_("GOT already in symbol table"));
4277 GOT_symbol = symbol_new (name, undefined_section,
4278 (valueT) 0, &zero_address_frag);
4285 /* Round up a section size to the appropriate boundary. */
4287 md_section_align (segment, size)
4288 segT segment ATTRIBUTE_UNUSED;
4292 #ifdef BFD_ASSEMBLER
4293 /* For a.out, force the section size to be aligned. If we don't do
4294 this, BFD will align it for us, but it will not write out the
4295 final bytes of the section. This may be a bug in BFD, but it is
4296 easier to fix it here since that is how the other a.out targets
4300 align = bfd_get_section_alignment (stdoutput, segment);
4301 size = ((size + (1 << align) - 1) & ((valueT) -1 << align));
4308 /* On the i386, PC-relative offsets are relative to the start of the
4309 next instruction. That is, the address of the offset, plus its
4310 size, since the offset is always the last part of the insn. */
4313 md_pcrel_from (fixP)
4316 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
4323 int ignore ATTRIBUTE_UNUSED;
4327 temp = get_absolute_expression ();
4328 subseg_set (bss_section, (subsegT) temp);
4329 demand_empty_rest_of_line ();
4335 #ifdef BFD_ASSEMBLER
4338 i386_validate_fix (fixp)
4341 if (fixp->fx_subsy && fixp->fx_subsy == GOT_symbol)
4343 fixp->fx_r_type = BFD_RELOC_386_GOTOFF;
4349 tc_gen_reloc (section, fixp)
4350 asection *section ATTRIBUTE_UNUSED;
4354 bfd_reloc_code_real_type code;
4356 switch (fixp->fx_r_type)
4358 case BFD_RELOC_386_PLT32:
4359 case BFD_RELOC_386_GOT32:
4360 case BFD_RELOC_386_GOTOFF:
4361 case BFD_RELOC_386_GOTPC:
4363 case BFD_RELOC_VTABLE_ENTRY:
4364 case BFD_RELOC_VTABLE_INHERIT:
4365 code = fixp->fx_r_type;
4370 switch (fixp->fx_size)
4373 as_bad (_("Can not do %d byte pc-relative relocation"),
4375 code = BFD_RELOC_32_PCREL;
4377 case 1: code = BFD_RELOC_8_PCREL; break;
4378 case 2: code = BFD_RELOC_16_PCREL; break;
4379 case 4: code = BFD_RELOC_32_PCREL; break;
4384 switch (fixp->fx_size)
4387 as_bad (_("Can not do %d byte relocation"), fixp->fx_size);
4388 code = BFD_RELOC_32;
4390 case 1: code = BFD_RELOC_8; break;
4391 case 2: code = BFD_RELOC_16; break;
4392 case 4: code = BFD_RELOC_32; break;
4398 if (code == BFD_RELOC_32
4400 && fixp->fx_addsy == GOT_symbol)
4401 code = BFD_RELOC_386_GOTPC;
4403 rel = (arelent *) xmalloc (sizeof (arelent));
4404 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
4405 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
4407 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
4408 /* HACK: Since i386 ELF uses Rel instead of Rela, encode the
4409 vtable entry to be used in the relocation's section offset. */
4410 if (fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
4411 rel->address = fixp->fx_offset;
4414 rel->addend = fixp->fx_addnumber;
4418 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
4419 if (rel->howto == NULL)
4421 as_bad_where (fixp->fx_file, fixp->fx_line,
4422 _("Cannot represent relocation type %s"),
4423 bfd_get_reloc_code_name (code));
4424 /* Set howto to a garbage value so that we can keep going. */
4425 rel->howto = bfd_reloc_type_lookup (stdoutput, BFD_RELOC_32);
4426 assert (rel->howto != NULL);
4432 #else /* ! BFD_ASSEMBLER */
4434 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
4436 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
4439 relax_addressT segment_address_in_file;
4442 * In: length of relocation (or of address) in chars: 1, 2 or 4.
4443 * Out: GNU LD relocation length code: 0, 1, or 2.
4446 static const unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2};
4449 know (fixP->fx_addsy != NULL);
4451 md_number_to_chars (where,
4452 (valueT) (fixP->fx_frag->fr_address
4453 + fixP->fx_where - segment_address_in_file),
4456 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
4457 ? S_GET_TYPE (fixP->fx_addsy)
4458 : fixP->fx_addsy->sy_number);
4460 where[6] = (r_symbolnum >> 16) & 0x0ff;
4461 where[5] = (r_symbolnum >> 8) & 0x0ff;
4462 where[4] = r_symbolnum & 0x0ff;
4463 where[7] = ((((!S_IS_DEFINED (fixP->fx_addsy)) << 3) & 0x08)
4464 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
4465 | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
4468 #endif /* OBJ_AOUT or OBJ_BOUT */
4470 #if defined (I386COFF)
4473 tc_coff_fix2rtype (fixP)
4476 if (fixP->fx_r_type == R_IMAGEBASE)
4479 return (fixP->fx_pcrel ?
4480 (fixP->fx_size == 1 ? R_PCRBYTE :
4481 fixP->fx_size == 2 ? R_PCRWORD :
4483 (fixP->fx_size == 1 ? R_RELBYTE :
4484 fixP->fx_size == 2 ? R_RELWORD :
4489 tc_coff_sizemachdep (frag)
4493 return (frag->fr_next->fr_address - frag->fr_address);
4498 #endif /* I386COFF */
4500 #endif /* ! BFD_ASSEMBLER */
4502 /* end of tc-i386.c */