1 /* i386.c -- Assemble code for the Intel 80386
2 Copyright (C) 1989, 1991, 1992, 1993 Free Software Foundation.
4 This file is part of GAS, the GNU Assembler.
6 GAS is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GAS is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GAS; see the file COPYING. If not, write to
18 the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
21 Intel 80386 machine specific gas.
22 Written by Eliot Dresselhaus (eliot@mgm.mit.edu).
23 Bugs & suggestions are completely welcome. This is free software.
24 Please help us make it better.
33 #include "opcode/i386.h"
36 #define TC_RELOC(X,Y) (Y)
39 /* 'md_assemble ()' gathers together information and puts it into a
44 /* TM holds the template for the insn were currently assembling. */
46 /* SUFFIX holds the opcode suffix (e.g. 'l' for 'movl') if given. */
48 /* Operands are coded with OPERANDS, TYPES, DISPS, IMMS, and REGS. */
50 /* OPERANDS gives the number of given operands. */
51 unsigned int operands;
53 /* REG_OPERANDS, DISP_OPERANDS, MEM_OPERANDS, IMM_OPERANDS give the number
54 of given register, displacement, memory operands and immediate
56 unsigned int reg_operands, disp_operands, mem_operands, imm_operands;
58 /* TYPES [i] is the type (see above #defines) which tells us how to
59 search through DISPS [i] & IMMS [i] & REGS [i] for the required
61 unsigned int types[MAX_OPERANDS];
63 /* Displacements (if given) for each operand. */
64 expressionS *disps[MAX_OPERANDS];
66 /* Relocation type for operand */
68 enum bfd_reloc_code_real disp_reloc[MAX_OPERANDS];
70 int disp_reloc[MAX_OPERANDS];
73 /* Immediate operands (if given) for each operand. */
74 expressionS *imms[MAX_OPERANDS];
76 /* Register operands (if given) for each operand. */
77 reg_entry *regs[MAX_OPERANDS];
79 /* BASE_REG, INDEX_REG, and LOG2_SCALE_FACTOR are used to encode
80 the base index byte below. */
83 unsigned int log2_scale_factor;
85 /* SEG gives the seg_entry of this insn. It is equal to zero unless
86 an explicit segment override is given. */
87 const seg_entry *seg; /* segment for memory operands (if given) */
89 /* PREFIX holds all the given prefix opcodes (usually null).
90 PREFIXES is the size of PREFIX. */
91 /* richfix: really unsigned? */
92 unsigned char prefix[MAX_PREFIXES];
93 unsigned int prefixes;
95 /* RM and IB are the modrm byte and the base index byte where the
96 addressing modes of this insn are encoded. */
102 typedef struct _i386_insn i386_insn;
104 /* This array holds the chars that always start a comment. If the
105 pre-processor is disabled, these aren't very useful */
106 #if defined (TE_I386AIX) || defined (OBJ_ELF)
107 const char comment_chars[] = "#/";
109 const char comment_chars[] = "#";
112 /* This array holds the chars that only start a comment at the beginning of
113 a line. If the line seems to have the form '# 123 filename'
114 .line and .file directives will appear in the pre-processed output */
115 /* Note that input_file.c hand checks for '#' at the beginning of the
116 first line of the input file. This is because the compiler outputs
117 #NO_APP at the beginning of its output. */
118 /* Also note that comments started like this one will always work if
119 '/' isn't otherwise defined. */
120 #if defined (TE_I386AIX) || defined (OBJ_ELF)
121 const char line_comment_chars[] = "";
123 const char line_comment_chars[] = "/";
125 const char line_separator_chars[] = "";
127 /* Chars that can be used to separate mant from exp in floating point nums */
128 const char EXP_CHARS[] = "eE";
130 /* Chars that mean this number is a floating point constant */
133 const char FLT_CHARS[] = "fFdDxX";
135 /* tables for lexical analysis */
136 static char opcode_chars[256];
137 static char register_chars[256];
138 static char operand_chars[256];
139 static char space_chars[256];
140 static char identifier_chars[256];
141 static char digit_chars[256];
144 #define is_opcode_char(x) (opcode_chars[(unsigned char) x])
145 #define is_operand_char(x) (operand_chars[(unsigned char) x])
146 #define is_register_char(x) (register_chars[(unsigned char) x])
147 #define is_space_char(x) (space_chars[(unsigned char) x])
148 #define is_identifier_char(x) (identifier_chars[(unsigned char) x])
149 #define is_digit_char(x) (digit_chars[(unsigned char) x])
151 /* put here all non-digit non-letter charcters that may occur in an operand */
152 static char operand_special_chars[] = "%$-+(,)*._~/<>|&^!:[@]";
154 static char *ordinal_names[] = {"first", "second", "third"}; /* for printfs */
156 /* md_assemble() always leaves the strings it's passed unaltered. To
157 effect this we maintain a stack of saved characters that we've smashed
158 with '\0's (indicating end of strings for various sub-fields of the
159 assembler instruction). */
160 static char save_stack[32];
161 static char *save_stack_p; /* stack pointer */
162 #define END_STRING_AND_SAVE(s) *save_stack_p++ = *s; *s = '\0'
163 #define RESTORE_END_STRING(s) *s = *--save_stack_p
165 /* The instruction we're assembling. */
168 /* Per instruction expressionS buffers: 2 displacements & 2 immediate max. */
169 static expressionS disp_expressions[2], im_expressions[2];
171 /* pointers to ebp & esp entries in reg_hash hash table */
172 static reg_entry *ebp, *esp;
174 static int this_operand; /* current operand we are working on */
176 static int flag_do_long_jump; /* FIXME what does this do? */
178 static int flag_16bit_code; /* 1 if we're writing 16-bit code, 0 if 32-bit */
180 /* Interface to relax_segment.
181 There are 2 relax states for 386 jump insns: one for conditional &
182 one for unconditional jumps. This is because the these two types
183 of jumps add different sizes to frags when we're figuring out what
184 sort of jump to choose to reach a given label. */
187 #define COND_JUMP 1 /* conditional jump */
188 #define UNCOND_JUMP 2 /* unconditional jump */
193 #define UNKNOWN_SIZE 3
197 #define INLINE __inline__
203 #define ENCODE_RELAX_STATE(type,size) \
204 ((relax_substateT)((type<<2) | (size)))
205 #define SIZE_FROM_RELAX_STATE(s) \
206 ( (((s) & 0x3) == BYTE ? 1 : (((s) & 0x3) == WORD ? 2 : 4)) )
208 const relax_typeS md_relax_table[] =
211 1) most positive reach of this state,
212 2) most negative reach of this state,
213 3) how many bytes this mode will add to the size of the current frag
214 4) which index into the table to try if we can't fit into this one.
221 /* For now we don't use word displacement jumps; they may be
223 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (COND_JUMP, DWORD)},
224 /* word conditionals add 3 bytes to frag:
225 2 opcode prefix; 1 displacement bytes */
226 {32767 + 2, -32768 + 2, 3, ENCODE_RELAX_STATE (COND_JUMP, DWORD)},
227 /* dword conditionals adds 4 bytes to frag:
228 1 opcode prefix; 3 displacement bytes */
232 {127 + 1, -128 + 1, 0, ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD)},
233 /* word jmp adds 2 bytes to frag:
234 1 opcode prefix; 1 displacement bytes */
235 {32767 + 2, -32768 + 2, 2, ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD)},
236 /* dword jmp adds 3 bytes to frag:
237 0 opcode prefix; 3 displacement bytes */
243 static char *output_invalid PARAMS ((int c));
244 static int i386_operand PARAMS ((char *operand_string));
245 static reg_entry *parse_register PARAMS ((char *reg_string));
247 static void s_bss PARAMS ((int));
250 symbolS *GOT_symbol; /* Pre-defined "__GLOBAL_OFFSET_TABLE" */
252 static INLINE unsigned long
253 mode_from_disp_size (t)
256 return (t & Disp8) ? 1 : (t & Disp32) ? 2 : 0;
261 /* convert opcode suffix ('b' 'w' 'l' typically) into type specifier */
263 static INLINE unsigned long
264 opcode_suffix_to_type (s)
267 return (s == BYTE_OPCODE_SUFFIX
268 ? Byte : (s == WORD_OPCODE_SUFFIX
270 } /* opcode_suffix_to_type() */
274 fits_in_signed_byte (num)
277 return (num >= -128) && (num <= 127);
278 } /* fits_in_signed_byte() */
281 fits_in_unsigned_byte (num)
284 return (num & 0xff) == num;
285 } /* fits_in_unsigned_byte() */
288 fits_in_unsigned_word (num)
291 return (num & 0xffff) == num;
292 } /* fits_in_unsigned_word() */
295 fits_in_signed_word (num)
298 return (-32768 <= num) && (num <= 32767);
299 } /* fits_in_signed_word() */
302 smallest_imm_type (num)
306 /* This code is disabled because all the Imm1 forms in the opcode table
307 are slower on the i486, and they're the versions with the implicitly
308 specified single-position displacement, which has another syntax if
309 you really want to use that form. If you really prefer to have the
310 one-byte-shorter Imm1 form despite these problems, re-enable this
313 return Imm1 | Imm8 | Imm8S | Imm16 | Imm32;
315 return (fits_in_signed_byte (num)
316 ? (Imm8S | Imm8 | Imm16 | Imm32)
317 : fits_in_unsigned_byte (num)
318 ? (Imm8 | Imm16 | Imm32)
319 : (fits_in_signed_word (num) || fits_in_unsigned_word (num))
322 } /* smallest_imm_type() */
324 void set_16bit_code_flag(new_16bit_code_flag)
325 int new_16bit_code_flag;
327 flag_16bit_code = new_16bit_code_flag;
330 const pseudo_typeS md_pseudo_table[] =
336 {"align", s_align_bytes, 0},
338 {"align", s_align_ptwo, 0},
340 {"ffloat", float_cons, 'f'},
341 {"dfloat", float_cons, 'd'},
342 {"tfloat", float_cons, 'x'},
344 {"noopt", s_ignore, 0},
345 {"optim", s_ignore, 0},
346 {"code16", set_16bit_code_flag, 1},
347 {"code32", set_16bit_code_flag, 0},
351 /* for interface with expression () */
352 extern char *input_line_pointer;
354 /* obstack for constructing various things in md_begin */
357 /* hash table for opcode lookup */
358 static struct hash_control *op_hash;
359 /* hash table for register lookup */
360 static struct hash_control *reg_hash;
361 /* hash table for prefix lookup */
362 static struct hash_control *prefix_hash;
368 const char *hash_err;
370 obstack_begin (&o, 4096);
372 /* initialize op_hash hash table */
373 op_hash = hash_new ();
376 register const template *optab;
377 register templates *core_optab;
380 optab = i386_optab; /* setup for loop */
381 prev_name = optab->name;
382 obstack_grow (&o, optab, sizeof (template));
383 core_optab = (templates *) xmalloc (sizeof (templates));
385 for (optab++; optab < i386_optab_end; optab++)
387 if (!strcmp (optab->name, prev_name))
389 /* same name as before --> append to current template list */
390 obstack_grow (&o, optab, sizeof (template));
394 /* different name --> ship out current template list;
395 add to hash table; & begin anew */
396 /* Note: end must be set before start! since obstack_next_free
397 changes upon opstack_finish */
398 core_optab->end = (template *) obstack_next_free (&o);
399 core_optab->start = (template *) obstack_finish (&o);
400 hash_err = hash_insert (op_hash, prev_name, (char *) core_optab);
404 as_fatal ("Internal Error: Can't hash %s: %s", prev_name,
407 prev_name = optab->name;
408 core_optab = (templates *) xmalloc (sizeof (templates));
409 obstack_grow (&o, optab, sizeof (template));
414 /* initialize reg_hash hash table */
415 reg_hash = hash_new ();
417 register const reg_entry *regtab;
419 for (regtab = i386_regtab; regtab < i386_regtab_end; regtab++)
421 hash_err = hash_insert (reg_hash, regtab->reg_name, (PTR) regtab);
427 esp = (reg_entry *) hash_find (reg_hash, "esp");
428 ebp = (reg_entry *) hash_find (reg_hash, "ebp");
430 /* initialize reg_hash hash table */
431 prefix_hash = hash_new ();
433 register const prefix_entry *prefixtab;
435 for (prefixtab = i386_prefixtab;
436 prefixtab < i386_prefixtab_end; prefixtab++)
438 hash_err = hash_insert (prefix_hash, prefixtab->prefix_name,
445 /* fill in lexical tables: opcode_chars, operand_chars, space_chars */
450 for (c = 0; c < 256; c++)
452 if (islower (c) || isdigit (c))
455 register_chars[c] = c;
457 else if (isupper (c))
459 opcode_chars[c] = tolower (c);
460 register_chars[c] = opcode_chars[c];
462 else if (c == PREFIX_SEPERATOR)
466 else if (c == ')' || c == '(')
468 register_chars[c] = c;
471 if (isupper (c) || islower (c) || isdigit (c))
472 operand_chars[c] = c;
474 if (isdigit (c) || c == '-')
477 if (isalpha (c) || c == '_' || c == '.' || isdigit (c))
478 identifier_chars[c] = c;
481 identifier_chars['@'] = '@';
484 if (c == ' ' || c == '\t')
488 for (p = operand_special_chars; *p != '\0'; p++)
489 operand_chars[(unsigned char) *p] = *p;
493 record_alignment (text_section, 2);
494 record_alignment (data_section, 2);
495 record_alignment (bss_section, 2);
502 /* debugging routines for md_assemble */
503 static void pi PARAMS ((char *, i386_insn *));
504 static void pte PARAMS ((template *));
505 static void pt PARAMS ((unsigned int));
506 static void pe PARAMS ((expressionS *));
507 static void ps PARAMS ((symbolS *));
514 register template *p;
517 fprintf (stdout, "%s: template ", line);
519 fprintf (stdout, " modrm: mode %x reg %x reg/mem %x",
520 x->rm.mode, x->rm.reg, x->rm.regmem);
521 fprintf (stdout, " base %x index %x scale %x\n",
522 x->bi.base, x->bi.index, x->bi.scale);
523 for (i = 0; i < x->operands; i++)
525 fprintf (stdout, " #%d: ", i + 1);
527 fprintf (stdout, "\n");
528 if (x->types[i] & Reg)
529 fprintf (stdout, "%s\n", x->regs[i]->reg_name);
530 if (x->types[i] & Imm)
532 if (x->types[i] & (Disp | Abs))
542 fprintf (stdout, " %d operands ", t->operands);
543 fprintf (stdout, "opcode %x ",
545 if (t->extension_opcode != None)
546 fprintf (stdout, "ext %x ", t->extension_opcode);
547 if (t->opcode_modifier & D)
548 fprintf (stdout, "D");
549 if (t->opcode_modifier & W)
550 fprintf (stdout, "W");
551 fprintf (stdout, "\n");
552 for (i = 0; i < t->operands; i++)
554 fprintf (stdout, " #%d type ", i + 1);
555 pt (t->operand_types[i]);
556 fprintf (stdout, "\n");
564 fprintf (stdout, " operation %d\n", e->X_op);
565 fprintf (stdout, " add_number %d (%x)\n",
566 e->X_add_number, e->X_add_number);
569 fprintf (stdout, " add_symbol ");
570 ps (e->X_add_symbol);
571 fprintf (stdout, "\n");
575 fprintf (stdout, " op_symbol ");
577 fprintf (stdout, "\n");
585 fprintf (stdout, "%s type %s%s",
587 S_IS_EXTERNAL (s) ? "EXTERNAL " : "",
588 segment_name (S_GET_SEGMENT (s)));
609 { BaseIndex, "BaseIndex" },
619 { InOutPortReg, "InOutPortReg" },
620 { ShiftCount, "ShiftCount" },
622 { Control, "control reg" },
623 { Test, "test reg" },
624 { FloatReg, "FReg" },
625 { FloatAcc, "FAcc" },
626 { JumpAbsolute, "Jump Absolute" },
634 register struct type_name *ty;
638 fprintf (stdout, "Unknown");
642 for (ty = type_names; ty->mask; ty++)
644 fprintf (stdout, "%s, ", ty->tname);
649 #endif /* DEBUG386 */
652 static bfd_reloc_code_real_type
653 reloc (size, pcrel, other)
656 bfd_reloc_code_real_type other;
658 if (other != NO_RELOC) return other;
663 case 1: return BFD_RELOC_8_PCREL;
664 case 2: return BFD_RELOC_16_PCREL;
665 case 4: return BFD_RELOC_32_PCREL;
670 case 1: return BFD_RELOC_8;
671 case 2: return BFD_RELOC_16;
672 case 4: return BFD_RELOC_32;
675 as_bad ("Can not do %d byte %srelocation", size,
676 pcrel ? "pc-relative " : "");
677 return BFD_RELOC_NONE;
680 #define reloc(SIZE,PCREL,OTHER) 0
681 #define BFD_RELOC_32 0
682 #define BFD_RELOC_32_PCREL 0
683 #define BFD_RELOC_386_PLT32 0
684 #define BFD_RELOC_386_GOT32 0
685 #define BFD_RELOC_386_GOTOFF 0
689 * Here we decide which fixups can be adjusted to make them relative to
690 * the beginning of the section instead of the symbol. Basically we need
691 * to make sure that the dynamic relocations are done correctly, so in
692 * some cases we force the original symbol to be used.
695 tc_i386_fix_adjustable(fixP)
699 /* Prevent all adjustments to global symbols. */
700 if (S_IS_EXTERN (fixP->fx_addsy))
704 /* adjust_reloc_syms doesn't know about the GOT */
705 if (fixP->fx_r_type == BFD_RELOC_386_GOTOFF
706 || fixP->fx_r_type == BFD_RELOC_386_PLT32
707 || fixP->fx_r_type == BFD_RELOC_386_GOT32)
713 /* This is the guts of the machine-dependent assembler. LINE points to a
714 machine dependent instruction. This function is supposed to emit
715 the frags/bytes it assembles to. */
721 /* Holds template once we've found it. */
724 /* Count the size of the instruction generated. */
727 /* Possible templates for current insn */
728 templates *current_templates = (templates *) 0;
732 /* Initialize globals. */
733 memset (&i, '\0', sizeof (i));
734 for (j = 0; j < MAX_OPERANDS; j++)
735 i.disp_reloc[j] = NO_RELOC;
736 memset (disp_expressions, '\0', sizeof (disp_expressions));
737 memset (im_expressions, '\0', sizeof (im_expressions));
738 save_stack_p = save_stack; /* reset stack pointer */
740 /* Fist parse an opcode & call i386_operand for the operands.
741 We assume that the scrubber has arranged it so that line[0] is the valid
742 start of a (possibly prefixed) opcode. */
746 /* 1 if operand is pending after ','. */
747 unsigned int expecting_operand = 0;
748 /* 1 if we found a prefix only acceptable with string insns. */
749 unsigned int expecting_string_instruction = 0;
750 /* Non-zero if operand parens not balenced. */
751 unsigned int paren_not_balenced;
752 char *token_start = l;
754 while (!is_space_char (*l) && *l != END_OF_INSN)
756 if (!is_opcode_char (*l))
758 as_bad ("invalid character %s in opcode", output_invalid (*l));
761 else if (*l != PREFIX_SEPERATOR)
763 *l = opcode_chars[(unsigned char) *l]; /* fold case of opcodes */
768 /* This opcode's got a prefix. */
770 prefix_entry *prefix;
772 if (l == token_start)
774 as_bad ("expecting prefix; got nothing");
777 END_STRING_AND_SAVE (l);
778 prefix = (prefix_entry *) hash_find (prefix_hash, token_start);
781 as_bad ("no such opcode prefix ('%s')", token_start);
784 RESTORE_END_STRING (l);
785 /* check for repeated prefix */
786 for (q = 0; q < i.prefixes; q++)
787 if (i.prefix[q] == prefix->prefix_code)
789 as_bad ("same prefix used twice; you don't really want this!");
792 if (i.prefixes == MAX_PREFIXES)
794 as_bad ("too many opcode prefixes");
797 i.prefix[i.prefixes++] = prefix->prefix_code;
798 if (prefix->prefix_code == REPE || prefix->prefix_code == REPNE)
799 expecting_string_instruction = 1;
800 /* skip past PREFIX_SEPERATOR and reset token_start */
804 END_STRING_AND_SAVE (l);
805 if (token_start == l)
807 as_bad ("expecting opcode; got nothing");
811 /* Lookup insn in hash; try intel & att naming conventions if appropriate;
812 that is: we only use the opcode suffix 'b' 'w' or 'l' if we need to. */
813 current_templates = (templates *) hash_find (op_hash, token_start);
814 if (!current_templates)
816 int last_index = strlen (token_start) - 1;
817 char last_char = token_start[last_index];
820 case DWORD_OPCODE_SUFFIX:
821 case WORD_OPCODE_SUFFIX:
822 case BYTE_OPCODE_SUFFIX:
823 token_start[last_index] = '\0';
824 current_templates = (templates *) hash_find (op_hash, token_start);
825 token_start[last_index] = last_char;
826 i.suffix = last_char;
828 if (!current_templates)
830 as_bad ("no such 386 instruction: `%s'", token_start);
834 RESTORE_END_STRING (l);
836 /* check for rep/repne without a string instruction */
837 if (expecting_string_instruction &&
838 !IS_STRING_INSTRUCTION (current_templates->
841 as_bad ("expecting string instruction after rep/repne");
845 /* There may be operands to parse. */
846 if (*l != END_OF_INSN &&
847 /* For string instructions, we ignore any operands if given. This
848 kludges, for example, 'rep/movsb %ds:(%esi), %es:(%edi)' where
849 the operands are always going to be the same, and are not really
850 encoded in machine code. */
851 !IS_STRING_INSTRUCTION (current_templates->
857 /* skip optional white space before operand */
858 while (!is_operand_char (*l) && *l != END_OF_INSN)
860 if (!is_space_char (*l))
862 as_bad ("invalid character %s before %s operand",
864 ordinal_names[i.operands]);
869 token_start = l; /* after white space */
870 paren_not_balenced = 0;
871 while (paren_not_balenced || *l != ',')
873 if (*l == END_OF_INSN)
875 if (paren_not_balenced)
877 as_bad ("unbalenced parenthesis in %s operand.",
878 ordinal_names[i.operands]);
882 break; /* we are done */
884 else if (!is_operand_char (*l) && !is_space_char (*l))
886 as_bad ("invalid character %s in %s operand",
888 ordinal_names[i.operands]);
892 ++paren_not_balenced;
894 --paren_not_balenced;
897 if (l != token_start)
898 { /* yes, we've read in another operand */
899 unsigned int operand_ok;
900 this_operand = i.operands++;
901 if (i.operands > MAX_OPERANDS)
903 as_bad ("spurious operands; (%d operands/instruction max)",
907 /* now parse operand adding info to 'i' as we go along */
908 END_STRING_AND_SAVE (l);
909 operand_ok = i386_operand (token_start);
910 RESTORE_END_STRING (l); /* restore old contents */
916 if (expecting_operand)
918 expecting_operand_after_comma:
919 as_bad ("expecting operand after ','; got nothing");
924 as_bad ("expecting operand before ','; got nothing");
929 /* now *l must be either ',' or END_OF_INSN */
932 if (*++l == END_OF_INSN)
933 { /* just skip it, if it's \n complain */
934 goto expecting_operand_after_comma;
936 expecting_operand = 1;
939 while (*l != END_OF_INSN); /* until we get end of insn */
943 /* Now we've parsed the opcode into a set of templates, and have the
946 Next, we find a template that matches the given insn,
947 making sure the overlap of the given operands types is consistent
948 with the template operand types. */
950 #define MATCH(overlap,given_type) \
952 (((overlap & (JumpAbsolute|BaseIndex|Mem8)) \
953 == (given_type & (JumpAbsolute|BaseIndex|Mem8))) \
954 || (overlap == InOutPortReg)))
957 /* If m0 and m1 are register matches they must be consistent
958 with the expected operand types t0 and t1.
959 That is, if both m0 & m1 are register matches
960 i.e. ( ((m0 & (Reg)) && (m1 & (Reg)) ) ?
961 then, either 1. or 2. must be true:
962 1. the expected operand type register overlap is null:
965 the given register overlap is null:
967 2. the expected operand type register overlap == the given
968 operand type overlap: (t0 & t1 & m0 & m1 & Reg).
970 #define CONSISTENT_REGISTER_MATCH(m0, m1, t0, t1) \
971 ( ((m0 & (Reg)) && (m1 & (Reg))) ? \
972 ( ((t0 & t1 & (Reg)) == 0 && (m0 & m1 & (Reg)) == 0) || \
973 ((t0 & t1) & (m0 & m1) & (Reg)) \
976 register unsigned int overlap0, overlap1;
978 unsigned int overlap2;
979 unsigned int found_reverse_match;
981 overlap0 = overlap1 = overlap2 = found_reverse_match = 0;
982 for (t = current_templates->start;
983 t < current_templates->end;
986 /* must have right number of operands */
987 if (i.operands != t->operands)
989 else if (!t->operands)
990 break; /* 0 operands always matches */
992 overlap0 = i.types[0] & t->operand_types[0];
996 if (!MATCH (overlap0, i.types[0]))
1001 overlap1 = i.types[1] & t->operand_types[1];
1002 if (!MATCH (overlap0, i.types[0]) ||
1003 !MATCH (overlap1, i.types[1]) ||
1004 !CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
1005 t->operand_types[0],
1006 t->operand_types[1]))
1009 /* check if other direction is valid ... */
1010 if (!(t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS))
1013 /* try reversing direction of operands */
1014 overlap0 = i.types[0] & t->operand_types[1];
1015 overlap1 = i.types[1] & t->operand_types[0];
1016 if (!MATCH (overlap0, i.types[0]) ||
1017 !MATCH (overlap1, i.types[1]) ||
1018 !CONSISTENT_REGISTER_MATCH (overlap0, overlap1,
1019 t->operand_types[0],
1020 t->operand_types[1]))
1022 /* does not match either direction */
1025 /* found a reverse match here -- slip through */
1026 /* found_reverse_match holds which of D or FloatD we've found */
1027 found_reverse_match = t->opcode_modifier & COMES_IN_BOTH_DIRECTIONS;
1028 } /* endif: not forward match */
1029 /* found either forward/reverse 2 operand match here */
1030 if (t->operands == 3)
1032 overlap2 = i.types[2] & t->operand_types[2];
1033 if (!MATCH (overlap2, i.types[2]) ||
1034 !CONSISTENT_REGISTER_MATCH (overlap0, overlap2,
1035 t->operand_types[0],
1036 t->operand_types[2]) ||
1037 !CONSISTENT_REGISTER_MATCH (overlap1, overlap2,
1038 t->operand_types[1],
1039 t->operand_types[2]))
1042 /* found either forward/reverse 2 or 3 operand match here:
1043 slip through to break */
1045 break; /* we've found a match; break out of loop */
1046 } /* for (t = ... */
1047 if (t == current_templates->end)
1048 { /* we found no match */
1049 as_bad ("operands given don't match any known 386 instruction");
1053 /* Copy the template we found (we may change it!). */
1055 t = &i.tm; /* alter new copy of template */
1057 /* If the matched instruction specifies an explicit opcode suffix,
1058 use it - and make sure none has already been specified. */
1059 if (t->opcode_modifier & (Data16|Data32))
1063 as_bad ("extraneous opcode suffix given");
1066 if (t->opcode_modifier & Data16)
1067 i.suffix = WORD_OPCODE_SUFFIX;
1069 i.suffix = DWORD_OPCODE_SUFFIX;
1072 /* If there's no opcode suffix we try to invent one based on register
1074 if (!i.suffix && i.reg_operands)
1076 /* We take i.suffix from the LAST register operand specified. This
1077 assumes that the last register operands is the destination register
1080 for (op = 0; op < MAX_OPERANDS; op++)
1081 if (i.types[op] & Reg)
1083 i.suffix = ((i.types[op] == Reg8) ? BYTE_OPCODE_SUFFIX :
1084 (i.types[op] == Reg16) ? WORD_OPCODE_SUFFIX :
1085 DWORD_OPCODE_SUFFIX);
1089 /* Make still unresolved immediate matches conform to size of immediate
1090 given in i.suffix. Note: overlap2 cannot be an immediate!
1092 if ((overlap0 & (Imm8 | Imm8S | Imm16 | Imm32))
1093 && overlap0 != Imm8 && overlap0 != Imm8S
1094 && overlap0 != Imm16 && overlap0 != Imm32)
1098 as_bad ("no opcode suffix given; can't determine immediate size");
1101 overlap0 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8 | Imm8S) :
1102 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
1104 if ((overlap1 & (Imm8 | Imm8S | Imm16 | Imm32))
1105 && overlap1 != Imm8 && overlap1 != Imm8S
1106 && overlap1 != Imm16 && overlap1 != Imm32)
1110 as_bad ("no opcode suffix given; can't determine immediate size");
1113 overlap1 &= (i.suffix == BYTE_OPCODE_SUFFIX ? (Imm8 | Imm8S) :
1114 (i.suffix == WORD_OPCODE_SUFFIX ? Imm16 : Imm32));
1117 i.types[0] = overlap0;
1118 i.types[1] = overlap1;
1119 i.types[2] = overlap2;
1121 if (overlap0 & ImplicitRegister)
1123 if (overlap1 & ImplicitRegister)
1125 if (overlap2 & ImplicitRegister)
1127 if (overlap0 & Imm1)
1128 i.imm_operands = 0; /* kludge for shift insns */
1130 if (found_reverse_match)
1133 save = t->operand_types[0];
1134 t->operand_types[0] = t->operand_types[1];
1135 t->operand_types[1] = save;
1138 /* Finalize opcode. First, we change the opcode based on the operand
1139 size given by i.suffix: we never have to change things for byte insns,
1140 or when no opcode suffix is need to size the operands. */
1142 if (!i.suffix && (t->opcode_modifier & W))
1144 as_bad ("no opcode suffix given and no register operands; can't size instruction");
1148 if (i.suffix && i.suffix != BYTE_OPCODE_SUFFIX)
1150 /* Select between byte and word/dword operations. */
1151 if (t->opcode_modifier & W)
1152 t->base_opcode |= W;
1153 /* Now select between word & dword operations via the
1154 operand size prefix. */
1155 if ((i.suffix == WORD_OPCODE_SUFFIX) ^ flag_16bit_code)
1157 if (i.prefixes == MAX_PREFIXES)
1159 as_bad ("%d prefixes given and 'w' opcode suffix gives too many prefixes",
1163 i.prefix[i.prefixes++] = WORD_PREFIX_OPCODE;
1167 /* For insns with operands there are more diddles to do to the opcode. */
1170 /* Default segment register this instruction will use
1171 for memory accesses. 0 means unknown.
1172 This is only for optimizing out unnecessary segment overrides. */
1173 const seg_entry *default_seg = 0;
1175 /* True if this instruction uses a memory addressing mode,
1176 and therefore may need an address-size prefix. */
1177 int uses_mem_addrmode = 0;
1180 /* If we found a reverse match we must alter the opcode direction bit
1181 found_reverse_match holds bit to set (different for int &
1184 if (found_reverse_match)
1186 t->base_opcode |= found_reverse_match;
1189 /* The imul $imm, %reg instruction is converted into
1190 imul $imm, %reg, %reg. */
1191 if (t->opcode_modifier & imulKludge)
1193 /* Pretend we saw the 3 operand case. */
1194 i.regs[2] = i.regs[1];
1198 /* Certain instructions expect the destination to be in the i.rm.reg
1199 field. This is by far the exceptional case. For these
1200 instructions, if the source operand is a register, we must reverse
1201 the i.rm.reg and i.rm.regmem fields. We accomplish this by faking
1202 that the two register operands were given in the reverse order. */
1203 if ((t->opcode_modifier & ReverseRegRegmem) && i.reg_operands == 2)
1205 unsigned int first_reg_operand = (i.types[0] & Reg) ? 0 : 1;
1206 unsigned int second_reg_operand = first_reg_operand + 1;
1207 reg_entry *tmp = i.regs[first_reg_operand];
1208 i.regs[first_reg_operand] = i.regs[second_reg_operand];
1209 i.regs[second_reg_operand] = tmp;
1212 if (t->opcode_modifier & ShortForm)
1214 /* The register or float register operand is in operand 0 or 1. */
1215 unsigned int op = (i.types[0] & (Reg | FloatReg)) ? 0 : 1;
1216 /* Register goes in low 3 bits of opcode. */
1217 t->base_opcode |= i.regs[op]->reg_num;
1219 else if (t->opcode_modifier & ShortFormW)
1221 /* Short form with 0x8 width bit. Register is always dest. operand */
1222 t->base_opcode |= i.regs[1]->reg_num;
1223 if (i.suffix == WORD_OPCODE_SUFFIX ||
1224 i.suffix == DWORD_OPCODE_SUFFIX)
1225 t->base_opcode |= 0x8;
1227 else if (t->opcode_modifier & Seg2ShortForm)
1229 if (t->base_opcode == POP_SEG_SHORT && i.regs[0]->reg_num == 1)
1231 as_bad ("you can't 'pop cs' on the 386.");
1234 t->base_opcode |= (i.regs[0]->reg_num << 3);
1236 else if (t->opcode_modifier & Seg3ShortForm)
1238 /* 'push %fs' is 0x0fa0; 'pop %fs' is 0x0fa1.
1239 'push %gs' is 0x0fa8; 'pop %fs' is 0x0fa9.
1240 So, only if i.regs[0]->reg_num == 5 (%gs) do we need
1241 to change the opcode. */
1242 if (i.regs[0]->reg_num == 5)
1243 t->base_opcode |= 0x08;
1245 else if ((t->base_opcode & ~DW) == MOV_AX_DISP32)
1247 /* This is a special non-modrm instruction
1248 that addresses memory with a 32-bit displacement mode anyway,
1249 and thus requires an address-size prefix if in 16-bit mode. */
1250 uses_mem_addrmode = 1;
1253 else if (t->opcode_modifier & Modrm)
1255 /* The opcode is completed (modulo t->extension_opcode which must
1256 be put into the modrm byte.
1257 Now, we make the modrm & index base bytes based on all the info
1260 /* i.reg_operands MUST be the number of real register operands;
1261 implicit registers do not count. */
1262 if (i.reg_operands == 2)
1264 unsigned int source, dest;
1265 source = (i.types[0] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 0 : 1;
1268 /* We must be careful to make sure that all
1269 segment/control/test/debug registers go into the i.rm.reg
1270 field (despite the whether they are source or destination
1272 if (i.regs[dest]->reg_type & (SReg2 | SReg3 | Control | Debug | Test))
1274 i.rm.reg = i.regs[dest]->reg_num;
1275 i.rm.regmem = i.regs[source]->reg_num;
1279 i.rm.reg = i.regs[source]->reg_num;
1280 i.rm.regmem = i.regs[dest]->reg_num;
1284 { /* if it's not 2 reg operands... */
1287 unsigned int fake_zero_displacement = 0;
1288 unsigned int op = (i.types[0] & Mem) ? 0 : ((i.types[1] & Mem) ? 1 : 2);
1290 /* Encode memory operand into modrm byte and base index
1293 if (i.base_reg == esp && !i.index_reg)
1295 /* <disp>(%esp) becomes two byte modrm with no index
1297 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1298 i.rm.mode = mode_from_disp_size (i.types[op]);
1299 i.bi.base = ESP_REG_NUM;
1300 i.bi.index = NO_INDEX_REGISTER;
1301 i.bi.scale = 0; /* Must be zero! */
1303 else if (i.base_reg == ebp && !i.index_reg)
1305 if (!(i.types[op] & Disp))
1307 /* Must fake a zero byte displacement. There is
1308 no direct way to code '(%ebp)' directly. */
1309 fake_zero_displacement = 1;
1310 /* fake_zero_displacement code does not set this. */
1311 i.types[op] |= Disp8;
1313 i.rm.mode = mode_from_disp_size (i.types[op]);
1314 i.rm.regmem = EBP_REG_NUM;
1316 else if (!i.base_reg && (i.types[op] & BaseIndex))
1318 /* There are three cases here.
1319 Case 1: '<32bit disp>(,1)' -- indirect absolute.
1320 (Same as cases 2 & 3 with NO index register)
1321 Case 2: <32bit disp> (,<index>) -- no base register with disp
1322 Case 3: (, <index>) --- no base register;
1323 no disp (must add 32bit 0 disp). */
1324 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1325 i.rm.mode = 0; /* 32bit mode */
1326 i.bi.base = NO_BASE_REGISTER;
1327 i.types[op] &= ~Disp;
1328 i.types[op] |= Disp32; /* Must be 32bit! */
1330 { /* case 2 or case 3 */
1331 i.bi.index = i.index_reg->reg_num;
1332 i.bi.scale = i.log2_scale_factor;
1333 if (i.disp_operands == 0)
1334 fake_zero_displacement = 1; /* case 3 */
1338 i.bi.index = NO_INDEX_REGISTER;
1342 else if (i.disp_operands && !i.base_reg && !i.index_reg)
1344 /* Operand is just <32bit disp> */
1345 i.rm.regmem = EBP_REG_NUM;
1347 i.types[op] &= ~Disp;
1348 i.types[op] |= Disp32;
1352 /* It's not a special case; rev'em up. */
1353 i.rm.regmem = i.base_reg->reg_num;
1354 i.rm.mode = mode_from_disp_size (i.types[op]);
1357 i.rm.regmem = ESCAPE_TO_TWO_BYTE_ADDRESSING;
1358 i.bi.base = i.base_reg->reg_num;
1359 i.bi.index = i.index_reg->reg_num;
1360 i.bi.scale = i.log2_scale_factor;
1361 if (i.base_reg == ebp && i.disp_operands == 0)
1363 fake_zero_displacement = 1;
1364 i.types[op] |= Disp8;
1365 i.rm.mode = mode_from_disp_size (i.types[op]);
1369 if (fake_zero_displacement)
1371 /* Fakes a zero displacement assuming that i.types[op]
1372 holds the correct displacement size. */
1373 exp = &disp_expressions[i.disp_operands++];
1375 exp->X_op = O_constant;
1376 exp->X_add_number = 0;
1377 exp->X_add_symbol = (symbolS *) 0;
1378 exp->X_op_symbol = (symbolS *) 0;
1381 /* Find the default segment for the memory operand.
1382 Used to optimize out explicit segment specifications. */
1385 unsigned int seg_index;
1387 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING)
1389 seg_index = (i.rm.mode << 3) | i.bi.base;
1390 default_seg = two_byte_segment_defaults[seg_index];
1394 seg_index = (i.rm.mode << 3) | i.rm.regmem;
1395 default_seg = one_byte_segment_defaults[seg_index];
1400 /* Fill in i.rm.reg or i.rm.regmem field with register operand
1401 (if any) based on t->extension_opcode. Again, we must be
1402 careful to make sure that segment/control/debug/test
1403 registers are coded into the i.rm.reg field. */
1407 (i.types[0] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 0 :
1408 (i.types[1] & (Reg | SReg2 | SReg3 | Control | Debug | Test)) ? 1 : 2;
1409 /* If there is an extension opcode to put here, the
1410 register number must be put into the regmem field. */
1411 if (t->extension_opcode != None)
1412 i.rm.regmem = i.regs[op]->reg_num;
1414 i.rm.reg = i.regs[op]->reg_num;
1416 /* Now, if no memory operand has set i.rm.mode = 0, 1, 2
1417 we must set it to 3 to indicate this is a register
1418 operand int the regmem field */
1419 if (!i.mem_operands)
1423 /* Fill in i.rm.reg field with extension opcode (if any). */
1424 if (t->extension_opcode != None)
1425 i.rm.reg = t->extension_opcode;
1429 uses_mem_addrmode = 1;
1432 /* GAS currently doesn't support 16-bit memory addressing modes at all,
1433 so if we're writing 16-bit code and using a memory addressing mode,
1434 always spew out an address size prefix. */
1435 if (uses_mem_addrmode && flag_16bit_code)
1437 if (i.prefixes == MAX_PREFIXES)
1439 as_bad ("%d prefixes given and address size override gives too many prefixes",
1443 i.prefix[i.prefixes++] = ADDR_PREFIX_OPCODE;
1446 /* If a segment was explicitly specified,
1447 and the specified segment is not the default,
1448 use an opcode prefix to select it.
1449 If we never figured out what the default segment is,
1450 then default_seg will be zero at this point,
1451 and the specified segment prefix will always be used. */
1452 if ((i.seg) && (i.seg != default_seg))
1454 if (i.prefixes == MAX_PREFIXES)
1456 as_bad ("%d prefixes given and %s segment override gives too many prefixes",
1457 MAX_PREFIXES, i.seg->seg_name);
1460 i.prefix[i.prefixes++] = i.seg->seg_prefix;
1465 /* Handle conversion of 'int $3' --> special int3 insn. */
1466 if (t->base_opcode == INT_OPCODE && i.imms[0]->X_add_number == 3)
1468 t->base_opcode = INT3_OPCODE;
1472 /* We are ready to output the insn. */
1477 if (t->opcode_modifier & Jump)
1479 unsigned long n = i.disps[0]->X_add_number;
1481 if (i.disps[0]->X_op == O_constant)
1483 if (fits_in_signed_byte (n))
1487 p[0] = t->base_opcode;
1491 { /* It's an absolute word/dword displacement. */
1493 /* Use only 16-bit jumps for 16-bit code,
1494 because text segments are limited to 64K anyway;
1495 use only 32-bit jumps for 32-bit code,
1496 because they're faster. */
1497 int jmp_size = flag_16bit_code ? 2 : 4;
1498 if (flag_16bit_code && !fits_in_signed_word (n))
1500 as_bad ("16-bit jump out of range");
1504 if (t->base_opcode == JUMP_PC_RELATIVE)
1506 /* unconditional jump */
1507 p = frag_more (1 + jmp_size);
1508 insn_size += 1 + jmp_size;
1510 md_number_to_chars (&p[1], (valueT) n, jmp_size);
1514 /* conditional jump */
1515 p = frag_more (2 + jmp_size);
1516 insn_size += 2 + jmp_size;
1517 p[0] = TWO_BYTE_OPCODE_ESCAPE;
1518 p[1] = t->base_opcode + 0x10;
1519 md_number_to_chars (&p[2], (valueT) n, jmp_size);
1525 if (flag_16bit_code)
1527 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE);
1531 /* It's a symbol; end frag & setup for relax.
1532 Make sure there are more than 6 chars left in the current frag;
1533 if not we'll have to start a new one. */
1534 if (obstack_room (&frags) <= 6)
1536 frag_wane (frag_now);
1541 p[0] = t->base_opcode;
1542 frag_var (rs_machine_dependent,
1543 6, /* 2 opcode/prefix + 4 displacement */
1545 ((unsigned char) *p == JUMP_PC_RELATIVE
1546 ? ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE)
1547 : ENCODE_RELAX_STATE (COND_JUMP, BYTE)),
1548 i.disps[0]->X_add_symbol,
1552 else if (t->opcode_modifier & (JumpByte | JumpDword))
1554 int size = (t->opcode_modifier & JumpByte) ? 1 : 4;
1555 unsigned long n = i.disps[0]->X_add_number;
1558 /* The jcx/jecx instruction might need a data size prefix. */
1559 for (q = i.prefix; q < i.prefix + i.prefixes; q++)
1561 if (*q == WORD_PREFIX_OPCODE)
1563 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE);
1569 if ((size == 4) && (flag_16bit_code))
1571 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE);
1575 if (fits_in_unsigned_byte (t->base_opcode))
1577 FRAG_APPEND_1_CHAR (t->base_opcode);
1582 p = frag_more (2); /* opcode can be at most two bytes */
1584 /* put out high byte first: can't use md_number_to_chars! */
1585 *p++ = (t->base_opcode >> 8) & 0xff;
1586 *p = t->base_opcode & 0xff;
1589 p = frag_more (size);
1591 if (i.disps[0]->X_op == O_constant)
1593 md_number_to_chars (p, (valueT) n, size);
1594 if (size == 1 && !fits_in_signed_byte (n))
1596 as_bad ("loop/jecx only takes byte displacement; %lu shortened to %d",
1602 fix_new_exp (frag_now, p - frag_now->fr_literal, size,
1603 i.disps[0], 1, reloc (size, 1, i.disp_reloc[0]));
1607 else if (t->opcode_modifier & JumpInterSegment)
1609 if (flag_16bit_code)
1611 FRAG_APPEND_1_CHAR (WORD_PREFIX_OPCODE);
1615 p = frag_more (1 + 2 + 4); /* 1 opcode; 2 segment; 4 offset */
1616 insn_size += 1 + 2 + 4;
1617 p[0] = t->base_opcode;
1618 if (i.imms[1]->X_op == O_constant)
1619 md_number_to_chars (p + 1, (valueT) i.imms[1]->X_add_number, 4);
1621 fix_new_exp (frag_now, p + 1 - frag_now->fr_literal, 4,
1622 i.imms[1], 0, BFD_RELOC_32);
1623 if (i.imms[0]->X_op != O_constant)
1624 as_bad ("can't handle non absolute segment in long call/jmp");
1625 md_number_to_chars (p + 5, (valueT) i.imms[0]->X_add_number, 2);
1629 /* Output normal instructions here. */
1632 /* First the prefix bytes. */
1633 for (q = i.prefix; q < i.prefix + i.prefixes; q++)
1637 md_number_to_chars (p, (valueT) *q, 1);
1640 /* Now the opcode; be careful about word order here! */
1641 if (fits_in_unsigned_byte (t->base_opcode))
1643 FRAG_APPEND_1_CHAR (t->base_opcode);
1646 else if (fits_in_unsigned_word (t->base_opcode))
1650 /* put out high byte first: can't use md_number_to_chars! */
1651 *p++ = (t->base_opcode >> 8) & 0xff;
1652 *p = t->base_opcode & 0xff;
1655 { /* opcode is either 3 or 4 bytes */
1656 if (t->base_opcode & 0xff000000)
1660 *p++ = (t->base_opcode >> 24) & 0xff;
1667 *p++ = (t->base_opcode >> 16) & 0xff;
1668 *p++ = (t->base_opcode >> 8) & 0xff;
1669 *p = (t->base_opcode) & 0xff;
1672 /* Now the modrm byte and base index byte (if present). */
1673 if (t->opcode_modifier & Modrm)
1677 /* md_number_to_chars (p, i.rm, 1); */
1678 md_number_to_chars (p,
1679 (valueT) (i.rm.regmem << 0
1683 /* If i.rm.regmem == ESP (4) && i.rm.mode != Mode 3 (Register mode)
1684 ==> need second modrm byte. */
1685 if (i.rm.regmem == ESCAPE_TO_TWO_BYTE_ADDRESSING && i.rm.mode != 3)
1689 /* md_number_to_chars (p, i.bi, 1); */
1690 md_number_to_chars (p, (valueT) (i.bi.base << 0
1697 if (i.disp_operands)
1699 register unsigned int n;
1701 for (n = 0; n < i.operands; n++)
1705 if (i.disps[n]->X_op == O_constant)
1707 if (i.types[n] & (Disp8 | Abs8))
1711 md_number_to_chars (p,
1712 (valueT) i.disps[n]->X_add_number,
1715 else if (i.types[n] & (Disp16 | Abs16))
1719 md_number_to_chars (p,
1720 (valueT) i.disps[n]->X_add_number,
1724 { /* Disp32|Abs32 */
1727 md_number_to_chars (p,
1728 (valueT) i.disps[n]->X_add_number,
1733 { /* not absolute_section */
1734 /* need a 32-bit fixup (don't support 8bit non-absolute disps) */
1737 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
1739 TC_RELOC(i.disp_reloc[n], BFD_RELOC_32));
1743 } /* end displacement output */
1745 /* output immediate */
1748 register unsigned int n;
1750 for (n = 0; n < i.operands; n++)
1754 if (i.imms[n]->X_op == O_constant)
1756 if (i.types[n] & (Imm8 | Imm8S))
1760 md_number_to_chars (p,
1761 (valueT) i.imms[n]->X_add_number,
1764 else if (i.types[n] & Imm16)
1768 md_number_to_chars (p,
1769 (valueT) i.imms[n]->X_add_number,
1776 md_number_to_chars (p,
1777 (valueT) i.imms[n]->X_add_number,
1782 { /* not absolute_section */
1783 /* Need a 32-bit fixup (don't support 8bit
1784 non-absolute ims). Try to support other
1790 if (i.types[n] & (Imm8 | Imm8S))
1792 else if (i.types[n] & Imm16)
1796 r_type = reloc (size, 0, i.disp_reloc[0]);
1797 p = frag_more (size);
1799 #ifdef BFD_ASSEMBLER
1800 if (r_type == BFD_RELOC_32
1802 && GOT_symbol == i.imms[n]->X_add_symbol
1803 && (i.imms[n]->X_op == O_symbol
1804 || (i.imms[n]->X_op == O_add
1805 && (i.imms[n]->X_op_symbol->sy_value.X_op
1808 r_type = BFD_RELOC_386_GOTPC;
1809 i.imms[n]->X_add_number += 3;
1812 fix_new_exp (frag_now, p - frag_now->fr_literal, size,
1813 i.imms[n], pcrel, r_type);
1817 } /* end immediate output */
1825 #endif /* DEBUG386 */
1829 /* Parse OPERAND_STRING into the i386_insn structure I. Returns non-zero
1833 i386_operand (operand_string)
1834 char *operand_string;
1836 register char *op_string = operand_string;
1838 /* Address of '\0' at end of operand_string. */
1839 char *end_of_operand_string = operand_string + strlen (operand_string);
1841 /* Start and end of displacement string expression (if found). */
1842 char *displacement_string_start = NULL;
1843 char *displacement_string_end = NULL;
1845 /* We check for an absolute prefix (differentiating,
1846 for example, 'jmp pc_relative_label' from 'jmp *absolute_label'. */
1847 if (*op_string == ABSOLUTE_PREFIX)
1850 i.types[this_operand] |= JumpAbsolute;
1853 /* Check if operand is a register. */
1854 if (*op_string == REGISTER_PREFIX)
1856 register reg_entry *r;
1857 if (!(r = parse_register (op_string)))
1859 as_bad ("bad register name ('%s')", op_string);
1862 /* Check for segment override, rather than segment register by
1863 searching for ':' after %<x>s where <x> = s, c, d, e, f, g. */
1864 if ((r->reg_type & (SReg2 | SReg3)) && op_string[3] == ':')
1869 i.seg = (seg_entry *) & es;
1872 i.seg = (seg_entry *) & cs;
1875 i.seg = (seg_entry *) & ss;
1878 i.seg = (seg_entry *) & ds;
1881 i.seg = (seg_entry *) & fs;
1884 i.seg = (seg_entry *) & gs;
1887 op_string += 4; /* skip % <x> s : */
1888 operand_string = op_string; /* Pretend given string starts here. */
1889 if (!is_digit_char (*op_string) && !is_identifier_char (*op_string)
1890 && *op_string != '(' && *op_string != ABSOLUTE_PREFIX)
1892 as_bad ("bad memory operand after segment override");
1895 /* Handle case of %es:*foo. */
1896 if (*op_string == ABSOLUTE_PREFIX)
1899 i.types[this_operand] |= JumpAbsolute;
1901 goto do_memory_reference;
1903 i.types[this_operand] |= r->reg_type;
1904 i.regs[this_operand] = r;
1907 else if (*op_string == IMMEDIATE_PREFIX)
1908 { /* ... or an immediate */
1909 char *save_input_line_pointer;
1913 if (i.imm_operands == MAX_IMMEDIATE_OPERANDS)
1915 as_bad ("only 1 or 2 immediate operands are allowed");
1919 exp = &im_expressions[i.imm_operands++];
1920 i.imms[this_operand] = exp;
1921 save_input_line_pointer = input_line_pointer;
1922 input_line_pointer = ++op_string; /* must advance op_string! */
1924 exp_seg = expression (exp);
1925 input_line_pointer = save_input_line_pointer;
1927 if (exp->X_op == O_absent)
1929 /* missing or bad expr becomes absolute 0 */
1930 as_bad ("missing or invalid immediate expression '%s' taken as 0",
1932 exp->X_op = O_constant;
1933 exp->X_add_number = 0;
1934 exp->X_add_symbol = (symbolS *) 0;
1935 exp->X_op_symbol = (symbolS *) 0;
1936 i.types[this_operand] |= Imm;
1938 else if (exp->X_op == O_constant)
1940 i.types[this_operand] |=
1941 smallest_imm_type ((unsigned long) exp->X_add_number);
1944 else if (exp_seg != text_section
1945 && exp_seg != data_section
1946 && exp_seg != bss_section
1947 && exp_seg != undefined_section
1948 #ifdef BFD_ASSEMBLER
1949 && ! bfd_is_com_section (exp_seg)
1954 as_bad ("Unimplemented segment type %d in parse_operand", exp_seg);
1960 /* this is an address ==> 32bit */
1961 i.types[this_operand] |= Imm32;
1963 /* shorten this type of this operand if the instruction wants
1964 * fewer bits than are present in the immediate. The bit field
1965 * code can put out 'andb $0xffffff, %al', for example. pace
1966 * also 'movw $foo,(%eax)'
1970 case WORD_OPCODE_SUFFIX:
1971 i.types[this_operand] |= Imm16;
1973 case BYTE_OPCODE_SUFFIX:
1974 i.types[this_operand] |= Imm16 | Imm8 | Imm8S;
1978 else if (is_digit_char (*op_string) || is_identifier_char (*op_string)
1979 || *op_string == '(')
1981 /* This is a memory reference of some sort. */
1982 register char *base_string;
1983 unsigned int found_base_index_form;
1985 do_memory_reference:
1986 if (i.mem_operands == MAX_MEMORY_OPERANDS)
1988 as_bad ("more than 1 memory reference in instruction");
1993 /* Determine type of memory operand from opcode_suffix;
1994 no opcode suffix implies general memory references. */
1997 case BYTE_OPCODE_SUFFIX:
1998 i.types[this_operand] |= Mem8;
2000 case WORD_OPCODE_SUFFIX:
2001 i.types[this_operand] |= Mem16;
2003 case DWORD_OPCODE_SUFFIX:
2005 i.types[this_operand] |= Mem32;
2008 /* Check for base index form. We detect the base index form by
2009 looking for an ')' at the end of the operand, searching
2010 for the '(' matching it, and finding a REGISTER_PREFIX or ','
2012 base_string = end_of_operand_string - 1;
2013 found_base_index_form = 0;
2014 if (*base_string == ')')
2016 unsigned int parens_balenced = 1;
2017 /* We've already checked that the number of left & right ()'s are
2018 equal, so this loop will not be infinite. */
2022 if (*base_string == ')')
2024 if (*base_string == '(')
2027 while (parens_balenced);
2028 base_string++; /* Skip past '('. */
2029 if (*base_string == REGISTER_PREFIX || *base_string == ',')
2030 found_base_index_form = 1;
2033 /* If we can't parse a base index register expression, we've found
2034 a pure displacement expression. We set up displacement_string_start
2035 and displacement_string_end for the code below. */
2036 if (!found_base_index_form)
2038 displacement_string_start = op_string;
2039 displacement_string_end = end_of_operand_string;
2043 char *base_reg_name, *index_reg_name, *num_string;
2046 i.types[this_operand] |= BaseIndex;
2048 /* If there is a displacement set-up for it to be parsed later. */
2049 if (base_string != op_string + 1)
2051 displacement_string_start = op_string;
2052 displacement_string_end = base_string - 1;
2055 /* Find base register (if any). */
2056 if (*base_string != ',')
2058 base_reg_name = base_string++;
2059 /* skip past register name & parse it */
2060 while (isalpha (*base_string))
2062 if (base_string == base_reg_name + 1)
2064 as_bad ("can't find base register name after '(%c'",
2068 END_STRING_AND_SAVE (base_string);
2069 if (!(i.base_reg = parse_register (base_reg_name)))
2071 as_bad ("bad base register name ('%s')", base_reg_name);
2074 RESTORE_END_STRING (base_string);
2077 /* Now check seperator; must be ',' ==> index reg
2078 OR num ==> no index reg. just scale factor
2079 OR ')' ==> end. (scale factor = 1) */
2080 if (*base_string != ',' && *base_string != ')')
2082 as_bad ("expecting ',' or ')' after base register in `%s'",
2087 /* There may index reg here; and there may be a scale factor. */
2088 if (*base_string == ',' && *(base_string + 1) == REGISTER_PREFIX)
2090 index_reg_name = ++base_string;
2091 while (isalpha (*++base_string));
2092 END_STRING_AND_SAVE (base_string);
2093 if (!(i.index_reg = parse_register (index_reg_name)))
2095 as_bad ("bad index register name ('%s')", index_reg_name);
2098 RESTORE_END_STRING (base_string);
2101 /* Check for scale factor. */
2102 if (*base_string == ',' && isdigit (*(base_string + 1)))
2104 num_string = ++base_string;
2105 while (is_digit_char (*base_string))
2107 if (base_string == num_string)
2109 as_bad ("can't find a scale factor after ','");
2112 END_STRING_AND_SAVE (base_string);
2113 /* We've got a scale factor. */
2114 if (!sscanf (num_string, "%d", &num))
2116 as_bad ("can't parse scale factor from '%s'", num_string);
2119 RESTORE_END_STRING (base_string);
2121 { /* must be 1 digit scale */
2123 i.log2_scale_factor = 0;
2126 i.log2_scale_factor = 1;
2129 i.log2_scale_factor = 2;
2132 i.log2_scale_factor = 3;
2135 as_bad ("expecting scale factor of 1, 2, 4, 8; got %d", num);
2141 if (!i.index_reg && *base_string == ',')
2143 as_bad ("expecting index register or scale factor after ','; got '%c'",
2144 *(base_string + 1));
2150 /* If there's an expression begining the operand, parse it,
2151 assuming displacement_string_start and displacement_string_end
2153 if (displacement_string_start)
2155 register expressionS *exp;
2157 char *save_input_line_pointer;
2158 exp = &disp_expressions[i.disp_operands];
2159 i.disps[this_operand] = exp;
2160 i.disp_reloc[this_operand] = NO_RELOC;
2162 save_input_line_pointer = input_line_pointer;
2163 input_line_pointer = displacement_string_start;
2164 END_STRING_AND_SAVE (displacement_string_end);
2168 * We can have operands of the form
2169 * <symbol>@GOTOFF+<nnn>
2170 * Take the easy way out here and copy everything
2171 * into a temporary buffer...
2174 if ((cp = strchr (input_line_pointer,'@')) != NULL) {
2175 char tmpbuf[BUFSIZ];
2178 GOT_symbol = symbol_find_or_make(GLOBAL_OFFSET_TABLE_NAME);
2180 if (strncmp(cp+1, "PLT", 3) == 0) {
2181 i.disp_reloc[this_operand] = BFD_RELOC_386_PLT32;
2183 strcpy(tmpbuf, input_line_pointer);
2184 strcat(tmpbuf, cp+1+3);
2186 } else if (strncmp(cp+1, "GOTOFF", 6) == 0) {
2187 i.disp_reloc[this_operand] = BFD_RELOC_386_GOTOFF;
2189 strcpy(tmpbuf, input_line_pointer);
2190 strcat(tmpbuf, cp+1+6);
2192 } else if (strncmp(cp+1, "GOT", 3) == 0) {
2193 i.disp_reloc[this_operand] = BFD_RELOC_386_GOT32;
2195 strcpy(tmpbuf, input_line_pointer);
2196 strcat(tmpbuf, cp+1+3);
2199 as_bad("Bad reloc specifier '%s' in expression", cp+1);
2200 input_line_pointer = tmpbuf;
2204 exp_seg = expression (exp);
2206 #ifdef BFD_ASSEMBLER
2207 /* We do this to make sure that the section symbol is in
2208 the symbol table. We will ultimately change the relocation
2209 to be relative to the beginning of the section */
2210 if (i.disp_reloc[this_operand] == BFD_RELOC_386_GOTOFF)
2212 if (S_IS_LOCAL(exp->X_add_symbol)
2213 && S_GET_SEGMENT (exp->X_add_symbol) != undefined_section)
2214 section_symbol(exp->X_add_symbol->bsym->section);
2215 assert (exp->X_op == O_symbol);
2216 exp->X_op = O_subtract;
2217 exp->X_op_symbol = GOT_symbol;
2218 i.disp_reloc[this_operand] = BFD_RELOC_32;
2222 if (*input_line_pointer)
2223 as_bad ("Ignoring junk '%s' after expression", input_line_pointer);
2224 RESTORE_END_STRING (displacement_string_end);
2225 input_line_pointer = save_input_line_pointer;
2226 if (exp->X_op == O_absent)
2228 /* missing expr becomes absolute 0 */
2229 as_bad ("missing or invalid displacement '%s' taken as 0",
2231 i.types[this_operand] |= (Disp | Abs);
2232 exp->X_op = O_constant;
2233 exp->X_add_number = 0;
2234 exp->X_add_symbol = (symbolS *) 0;
2235 exp->X_op_symbol = (symbolS *) 0;
2237 else if (exp->X_op == O_constant)
2239 i.types[this_operand] |= SMALLEST_DISP_TYPE (exp->X_add_number);
2241 else if (exp_seg == text_section
2242 || exp_seg == data_section
2243 || exp_seg == bss_section
2244 || exp_seg == undefined_section)
2246 i.types[this_operand] |= Disp32;
2251 i.types[this_operand] |= Disp32;
2253 goto seg_unimplemented;
2258 /* Make sure the memory operand we've been dealt is valid. */
2259 if (i.base_reg && i.index_reg &&
2260 !(i.base_reg->reg_type & i.index_reg->reg_type & Reg))
2262 as_bad ("register size mismatch in (base,index,scale) expression");
2266 * special case for (%dx) while doing input/output op
2269 (i.base_reg->reg_type == (Reg16 | InOutPortReg)) &&
2270 (i.index_reg == 0)))
2272 i.types[this_operand] |= InOutPortReg;
2275 if ((i.base_reg && (i.base_reg->reg_type & Reg32) == 0) ||
2276 (i.index_reg && (i.index_reg->reg_type & Reg32) == 0))
2278 as_bad ("base/index register must be 32 bit register");
2281 if (i.index_reg && i.index_reg == esp)
2283 as_bad ("%s may not be used as an index register", esp->reg_name);
2288 { /* it's not a memory operand; argh! */
2289 as_bad ("invalid char %s begining %s operand '%s'",
2290 output_invalid (*op_string), ordinal_names[this_operand],
2294 return 1; /* normal return */
2298 * md_estimate_size_before_relax()
2300 * Called just before relax().
2301 * Any symbol that is now undefined will not become defined.
2302 * Return the correct fr_subtype in the frag.
2303 * Return the initial "guess for fr_var" to caller.
2304 * The guess for fr_var is ACTUALLY the growth beyond fr_fix.
2305 * Whatever we do to grow fr_fix or fr_var contributes to our returned value.
2306 * Although it may not be explicit in the frag, pretend fr_var starts with a
2310 md_estimate_size_before_relax (fragP, segment)
2311 register fragS *fragP;
2312 register segT segment;
2314 register unsigned char *opcode;
2315 register int old_fr_fix;
2317 old_fr_fix = fragP->fr_fix;
2318 opcode = (unsigned char *) fragP->fr_opcode;
2319 /* We've already got fragP->fr_subtype right; all we have to do is check
2320 for un-relaxable symbols. */
2321 if (S_GET_SEGMENT (fragP->fr_symbol) != segment)
2323 /* symbol is undefined in this segment */
2326 case JUMP_PC_RELATIVE: /* make jmp (0xeb) a dword displacement jump */
2327 opcode[0] = 0xe9; /* dword disp jmp */
2329 fix_new (fragP, old_fr_fix, 4,
2331 fragP->fr_offset, 1,
2332 (GOT_symbol && /* Not quite right - we should switch on
2333 presence of @PLT, but I cannot see how
2334 to get to that from here. We should have
2335 done this in md_assemble to really
2336 get it right all of the time, but I
2337 think it does not matter that much, as
2338 this will be right most of the time. ERY*/
2339 S_GET_SEGMENT(fragP->fr_symbol) == undefined_section)?
2340 BFD_RELOC_386_PLT32 : BFD_RELOC_32_PCREL);
2344 /* This changes the byte-displacement jump 0x7N -->
2345 the dword-displacement jump 0x0f8N */
2346 opcode[1] = opcode[0] + 0x10;
2347 opcode[0] = TWO_BYTE_OPCODE_ESCAPE; /* two-byte escape */
2348 fragP->fr_fix += 1 + 4; /* we've added an opcode byte */
2349 fix_new (fragP, old_fr_fix + 1, 4,
2351 fragP->fr_offset, 1,
2352 (GOT_symbol && /* Not quite right - we should switch on
2353 presence of @PLT, but I cannot see how
2354 to get to that from here. ERY */
2355 S_GET_SEGMENT(fragP->fr_symbol) == undefined_section)?
2356 BFD_RELOC_386_PLT32 : BFD_RELOC_32_PCREL);
2361 return (fragP->fr_var + fragP->fr_fix - old_fr_fix);
2362 } /* md_estimate_size_before_relax() */
2365 * md_convert_frag();
2367 * Called after relax() is finished.
2368 * In: Address of frag.
2369 * fr_type == rs_machine_dependent.
2370 * fr_subtype is what the address relaxed to.
2372 * Out: Any fixSs and constants are set up.
2373 * Caller will turn frag into a ".space 0".
2375 #ifndef BFD_ASSEMBLER
2377 md_convert_frag (headers, fragP)
2378 object_headers *headers;
2379 register fragS *fragP;
2382 md_convert_frag (abfd, sec, fragP)
2385 register fragS *fragP;
2388 register unsigned char *opcode;
2389 unsigned char *where_to_put_displacement = NULL;
2390 unsigned int target_address;
2391 unsigned int opcode_address;
2392 unsigned int extension = 0;
2393 int displacement_from_opcode_start;
2395 opcode = (unsigned char *) fragP->fr_opcode;
2397 /* Address we want to reach in file space. */
2398 target_address = S_GET_VALUE (fragP->fr_symbol) + fragP->fr_offset;
2399 #ifdef BFD_ASSEMBLER /* not needed otherwise? */
2400 target_address += fragP->fr_symbol->sy_frag->fr_address;
2403 /* Address opcode resides at in file space. */
2404 opcode_address = fragP->fr_address + fragP->fr_fix;
2406 /* Displacement from opcode start to fill into instruction. */
2407 displacement_from_opcode_start = target_address - opcode_address;
2409 switch (fragP->fr_subtype)
2411 case ENCODE_RELAX_STATE (COND_JUMP, BYTE):
2412 case ENCODE_RELAX_STATE (UNCOND_JUMP, BYTE):
2413 /* don't have to change opcode */
2414 extension = 1; /* 1 opcode + 1 displacement */
2415 where_to_put_displacement = &opcode[1];
2418 case ENCODE_RELAX_STATE (COND_JUMP, WORD):
2419 opcode[1] = TWO_BYTE_OPCODE_ESCAPE;
2420 opcode[2] = opcode[0] + 0x10;
2421 opcode[0] = WORD_PREFIX_OPCODE;
2422 extension = 4; /* 3 opcode + 2 displacement */
2423 where_to_put_displacement = &opcode[3];
2426 case ENCODE_RELAX_STATE (UNCOND_JUMP, WORD):
2428 opcode[0] = WORD_PREFIX_OPCODE;
2429 extension = 3; /* 2 opcode + 2 displacement */
2430 where_to_put_displacement = &opcode[2];
2433 case ENCODE_RELAX_STATE (COND_JUMP, DWORD):
2434 opcode[1] = opcode[0] + 0x10;
2435 opcode[0] = TWO_BYTE_OPCODE_ESCAPE;
2436 extension = 5; /* 2 opcode + 4 displacement */
2437 where_to_put_displacement = &opcode[2];
2440 case ENCODE_RELAX_STATE (UNCOND_JUMP, DWORD):
2442 extension = 4; /* 1 opcode + 4 displacement */
2443 where_to_put_displacement = &opcode[1];
2447 BAD_CASE (fragP->fr_subtype);
2450 /* now put displacement after opcode */
2451 md_number_to_chars ((char *) where_to_put_displacement,
2452 (valueT) (displacement_from_opcode_start - extension),
2453 SIZE_FROM_RELAX_STATE (fragP->fr_subtype));
2454 fragP->fr_fix += extension;
2458 int md_short_jump_size = 2; /* size of byte displacement jmp */
2459 int md_long_jump_size = 5; /* size of dword displacement jmp */
2460 const int md_reloc_size = 8; /* Size of relocation record */
2463 md_create_short_jump (ptr, from_addr, to_addr, frag, to_symbol)
2465 addressT from_addr, to_addr;
2471 offset = to_addr - (from_addr + 2);
2472 md_number_to_chars (ptr, (valueT) 0xeb, 1); /* opcode for byte-disp jump */
2473 md_number_to_chars (ptr + 1, (valueT) offset, 1);
2477 md_create_long_jump (ptr, from_addr, to_addr, frag, to_symbol)
2479 addressT from_addr, to_addr;
2485 if (flag_do_long_jump)
2487 offset = to_addr - S_GET_VALUE (to_symbol);
2488 md_number_to_chars (ptr, (valueT) 0xe9, 1);/* opcode for long jmp */
2489 md_number_to_chars (ptr + 1, (valueT) offset, 4);
2490 fix_new (frag, (ptr + 1) - frag->fr_literal, 4,
2491 to_symbol, (offsetT) 0, 0, BFD_RELOC_32);
2495 offset = to_addr - (from_addr + 5);
2496 md_number_to_chars (ptr, (valueT) 0xe9, 1);
2497 md_number_to_chars (ptr + 1, (valueT) offset, 4);
2501 void /* Knows about order of bytes in address. */
2502 md_number_to_chars (con, value, nbytes)
2503 char con[]; /* Return 'nbytes' of chars here. */
2504 valueT value; /* The value of the bits. */
2505 int nbytes; /* Number of bytes in the output. */
2507 number_to_chars_littleendian (con, value, nbytes);
2511 /* Apply a fixup (fixS) to segment data, once it has been determined
2512 by our caller that we have all the info we need to fix it up.
2514 On the 386, immediates, displacements, and data pointers are all in
2515 the same (little-endian) format, so we don't need to care about which
2519 md_apply_fix_1 (fixP, value)
2520 fixS *fixP; /* The fix we're to put in */
2521 long value; /* The value of the bits. */
2523 register char *p = fixP->fx_where + fixP->fx_frag->fr_literal;
2525 #if defined (BFD_ASSEMBLER) && !defined (TE_Mach)
2527 * This is a hack. There should be a better way to
2530 if (fixP->fx_r_type == BFD_RELOC_32_PCREL && fixP->fx_addsy)
2532 value += fixP->fx_where + fixP->fx_frag->fr_address;
2534 if (S_GET_SEGMENT (fixP->fx_addsy) != undefined_section)
2536 /* Yes, we add the values in twice. This is because
2537 bfd_perform_relocation subtracts them out again. I think
2538 bfd_perform_relocation is broken, but I don't dare change
2540 value += fixP->fx_where + fixP->fx_frag->fr_address;
2545 /* Fix a few things - the dynamic linker expects certain values here,
2546 and we must not dissappoint it. */
2549 switch(fixP->fx_r_type) {
2550 case BFD_RELOC_386_PLT32:
2551 /* Make the jump instruction point to the address of the operand. At
2552 runtime we merely add the offset to the actual PLT entry. */
2555 case BFD_RELOC_386_GOTPC:
2557 * This is tough to explain. We end up with this one if we have
2558 * operands that look like "_GLOBAL_OFFSET_TABLE_+[.-.L284]". The goal
2559 * here is to obtain the absolute address of the GOT, and it is strongly
2560 * preferable from a performance point of view to avoid using a runtime
2561 * relocation for this. The actual sequence of instructions often look
2567 * addl $_GLOBAL_OFFSET_TABLE_+[.-.L66],%ebx
2569 * The call and pop essentially return the absolute address of
2570 * the label .L66 and store it in %ebx. The linker itself will
2571 * ultimately change the first operand of the addl so that %ebx points to
2572 * the GOT, but to keep things simple, the .o file must have this operand
2573 * set so that it generates not the absolute address of .L66, but the
2574 * absolute address of itself. This allows the linker itself simply
2575 * treat a GOTPC relocation as asking for a pcrel offset to the GOT to be
2576 * added in, and the addend of the relocation is stored in the operand
2577 * field for the instruction itself.
2579 * Our job here is to fix the operand so that it would add the correct
2580 * offset so that %ebx would point to itself. The thing that is tricky is
2581 * that .-.L66 will point to the beginning of the instruction, so we need
2582 * to further modify the operand so that it will point to itself.
2583 * There are other cases where you have something like:
2585 * .long $_GLOBAL_OFFSET_TABLE_+[.-.L66]
2587 * and here no correction would be required. Internally in the assembler
2588 * we treat operands of this form as not being pcrel since the '.' is
2589 * explicitly mentioned, and I wonder whether it would simplify matters
2590 * to do it this way. Who knows. In earlier versions of the PIC patches,
2591 * the pcrel_adjust field was used to store the correction, but since the
2592 * expression is not pcrel, I felt it would be confusing to do it this way.
2596 case BFD_RELOC_386_GOT32:
2597 value = 0; /* Fully resolved at runtime. No addend. */
2599 case BFD_RELOC_386_GOTOFF:
2608 md_number_to_chars (p, value, fixP->fx_size);
2611 #ifdef BFD_ASSEMBLER
2613 md_apply_fix (fixP, valp)
2617 md_apply_fix_1 (fixP, *valp);
2622 md_apply_fix (fixP, val)
2626 md_apply_fix_1 (fixP, val);
2631 /* This is never used. */
2632 long /* Knows about the byte order in a word. */
2633 md_chars_to_number (con, nbytes)
2634 unsigned char con[]; /* Low order byte 1st. */
2635 int nbytes; /* Number of bytes in the input. */
2638 for (retval = 0, con += nbytes - 1; nbytes--; con--)
2640 retval <<= BITS_PER_CHAR;
2648 #define MAX_LITTLENUMS 6
2650 /* Turn the string pointed to by litP into a floating point constant of type
2651 type, and emit the appropriate bytes. The number of LITTLENUMS emitted
2652 is stored in *sizeP . An error message is returned, or NULL on OK. */
2654 md_atof (type, litP, sizeP)
2660 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2661 LITTLENUM_TYPE *wordP;
2683 return "Bad call to md_atof ()";
2685 t = atof_ieee (input_line_pointer, type, words);
2687 input_line_pointer = t;
2689 *sizeP = prec * sizeof (LITTLENUM_TYPE);
2690 /* This loops outputs the LITTLENUMs in REVERSE order; in accord with
2691 the bigendian 386. */
2692 for (wordP = words + prec - 1; prec--;)
2694 md_number_to_chars (litP, (valueT) (*wordP--), sizeof (LITTLENUM_TYPE));
2695 litP += sizeof (LITTLENUM_TYPE);
2700 char output_invalid_buf[8];
2707 sprintf (output_invalid_buf, "'%c'", c);
2709 sprintf (output_invalid_buf, "(0x%x)", (unsigned) c);
2710 return output_invalid_buf;
2713 /* reg_string starts *before* REGISTER_PREFIX */
2715 parse_register (reg_string)
2718 register char *s = reg_string;
2720 char reg_name_given[MAX_REG_NAME_SIZE];
2722 s++; /* skip REGISTER_PREFIX */
2723 for (p = reg_name_given; is_register_char (*s); p++, s++)
2725 *p = register_chars[(unsigned char) *s];
2726 if (p >= reg_name_given + MAX_REG_NAME_SIZE)
2727 return (reg_entry *) 0;
2730 return (reg_entry *) hash_find (reg_hash, reg_name_given);
2734 CONST char *md_shortopts = "mVQ:";
2736 CONST char *md_shortopts = "m";
2738 struct option md_longopts[] = {
2739 {NULL, no_argument, NULL, 0}
2741 size_t md_longopts_size = sizeof(md_longopts);
2744 md_parse_option (c, arg)
2751 flag_do_long_jump = 1;
2755 /* -V: SVR4 argument to print version ID. */
2757 print_version_id ();
2760 /* -Qy, -Qn: SVR4 arguments controlling whether a .comment section
2761 should be emitted or not. FIXME: Not implemented. */
2773 md_show_usage (stream)
2777 -m do long jump\n");
2780 /* We have no need to default values of symbols. */
2784 md_undefined_symbol (name)
2787 if (*name == '_' && *(name+1) == 'G'
2788 && strcmp(name, GLOBAL_OFFSET_TABLE_NAME) == 0)
2792 if(symbol_find(name))
2793 as_bad("GOT already in symbol table");
2794 GOT_symbol = symbol_new (name, undefined_section,
2795 (valueT) 0, &zero_address_frag);
2802 /* Round up a section size to the appropriate boundary. */
2804 md_section_align (segment, size)
2808 return size; /* Byte alignment is fine */
2811 /* Exactly what point is a PC-relative offset relative TO? On the
2812 i386, they're relative to the address of the offset, plus its
2813 size. (??? Is this right? FIXME-SOON!) */
2815 md_pcrel_from (fixP)
2818 return fixP->fx_size + fixP->fx_where + fixP->fx_frag->fr_address;
2829 temp = get_absolute_expression ();
2830 subseg_set (bss_section, (subsegT) temp);
2831 demand_empty_rest_of_line ();
2837 #ifdef BFD_ASSEMBLER
2840 i386_validate_fix (fixp)
2843 if (fixp->fx_subsy && fixp->fx_subsy == GOT_symbol)
2845 fixp->fx_r_type = BFD_RELOC_386_GOTOFF;
2850 #define F(SZ,PCREL) (((SZ) << 1) + (PCREL))
2851 #define MAP(SZ,PCREL,TYPE) case F(SZ,PCREL): code = (TYPE); break
2854 tc_gen_reloc (section, fixp)
2859 bfd_reloc_code_real_type code;
2861 switch(fixp->fx_r_type)
2863 case BFD_RELOC_386_PLT32:
2864 case BFD_RELOC_386_GOT32:
2865 case BFD_RELOC_386_GOTOFF:
2866 case BFD_RELOC_386_GOTPC:
2867 code = fixp->fx_r_type;
2870 switch (F (fixp->fx_size, fixp->fx_pcrel))
2873 MAP (1, 0, BFD_RELOC_8);
2874 MAP (2, 0, BFD_RELOC_16);
2876 MAP (4, 0, BFD_RELOC_32);
2878 MAP (1, 1, BFD_RELOC_8_PCREL);
2879 MAP (2, 1, BFD_RELOC_16_PCREL);
2881 MAP (4, 1, BFD_RELOC_32_PCREL);
2883 as_bad ("Can not do %d byte %srelocation", fixp->fx_size,
2884 fixp->fx_pcrel ? "pc-relative" : "");
2890 if (code == BFD_RELOC_32
2892 && fixp->fx_addsy == GOT_symbol)
2893 code = BFD_RELOC_386_GOTPC;
2895 rel = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
2897 rel->sym_ptr_ptr = &fixp->fx_addsy->bsym;
2898 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2900 rel->addend = fixp->fx_addnumber;
2904 rel->howto = bfd_reloc_type_lookup (stdoutput, code);
2909 name = S_GET_NAME (fixp->fx_addsy);
2912 as_fatal ("Cannot generate relocation type for symbol %s, code %s",
2913 name, bfd_get_reloc_code_name (code));
2919 #else /* ! BFD_ASSEMBLER */
2921 #if (defined(OBJ_AOUT) | defined(OBJ_BOUT))
2923 tc_aout_fix_to_chars (where, fixP, segment_address_in_file)
2926 relax_addressT segment_address_in_file;
2929 * In: length of relocation (or of address) in chars: 1, 2 or 4.
2930 * Out: GNU LD relocation length code: 0, 1, or 2.
2933 static const unsigned char nbytes_r_length[] = {42, 0, 1, 42, 2};
2936 know (fixP->fx_addsy != NULL);
2938 md_number_to_chars (where,
2939 (valueT) (fixP->fx_frag->fr_address
2940 + fixP->fx_where - segment_address_in_file),
2943 r_symbolnum = (S_IS_DEFINED (fixP->fx_addsy)
2944 ? S_GET_TYPE (fixP->fx_addsy)
2945 : fixP->fx_addsy->sy_number);
2947 where[6] = (r_symbolnum >> 16) & 0x0ff;
2948 where[5] = (r_symbolnum >> 8) & 0x0ff;
2949 where[4] = r_symbolnum & 0x0ff;
2950 where[7] = ((((!S_IS_DEFINED (fixP->fx_addsy)) << 3) & 0x08)
2951 | ((nbytes_r_length[fixP->fx_size] << 1) & 0x06)
2952 | (((fixP->fx_pcrel << 0) & 0x01) & 0x0f));
2955 #endif /* OBJ_AOUT or OBJ_BOUT */
2957 #if defined (I386COFF)
2960 tc_coff_fix2rtype (fixP)
2963 return (fixP->fx_pcrel ?
2964 (fixP->fx_size == 1 ? R_PCRBYTE :
2965 fixP->fx_size == 2 ? R_PCRWORD :
2967 (fixP->fx_size == 1 ? R_RELBYTE :
2968 fixP->fx_size == 2 ? R_RELWORD :
2973 tc_coff_sizemachdep (frag)
2977 return (frag->fr_next->fr_address - frag->fr_address);
2982 #endif /* I386COFF */
2984 #endif /* BFD_ASSEMBLER? */
2986 /* end of tc-i386.c */