1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
30 #include "dwarf2dbg.h"
34 #define h8_opcodes ops
35 #include "opcode/h8300.h"
36 #include "safe-ctype.h"
42 const char comment_chars[] = ";";
43 const char line_comment_chars[] = "#";
44 const char line_separator_chars[] = "";
46 void cons PARAMS ((int));
47 void sbranch PARAMS ((int));
48 void h8300hmode PARAMS ((int));
49 void h8300smode PARAMS ((int));
50 void h8300hnmode PARAMS ((int));
51 void h8300snmode PARAMS ((int));
52 void h8300sxmode PARAMS ((int));
53 static void pint PARAMS ((int));
60 #define PSIZE (Hmode ? L_32 : L_16)
62 #define DSYMMODE (Hmode ? L_24 : L_16)
64 int bsize = L_8; /* Default branch displacement. */
72 const struct h8_opcode *opcode;
75 struct h8_instruction *h8_instructions;
79 int arg ATTRIBUTE_UNUSED;
84 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
85 as_warn (_("could not set architecture and machine"));
91 int arg ATTRIBUTE_UNUSED;
96 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
97 as_warn (_("could not set architecture and machine"));
103 int arg ATTRIBUTE_UNUSED;
109 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn))
110 as_warn (_("could not set architecture and machine"));
116 int arg ATTRIBUTE_UNUSED;
122 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn))
123 as_warn (_("could not set architecture and machine"));
129 int arg ATTRIBUTE_UNUSED;
135 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sx))
136 as_warn (_("could not set architecture and machine"));
149 int arg ATTRIBUTE_UNUSED;
151 cons (Hmode ? 4 : 2);
154 /* This table describes all the machine specific pseudo-ops the assembler
155 has to support. The fields are:
156 pseudo-op name without dot
157 function to call to execute this pseudo-op
158 Integer arg to pass to the function. */
160 const pseudo_typeS md_pseudo_table[] =
162 {"h8300h", h8300hmode, 0},
163 {"h8300hn", h8300hnmode, 0},
164 {"h8300s", h8300smode, 0},
165 {"h8300sn", h8300snmode, 0},
166 {"h8300sx", h8300sxmode, 0},
167 {"sbranch", sbranch, L_8},
168 {"lbranch", sbranch, L_16},
174 {"form", listing_psize, 0},
175 {"heading", listing_title, 0},
176 {"import", s_ignore, 0},
177 {"page", listing_eject, 0},
178 {"program", s_ignore, 0},
182 const int md_reloc_size;
184 const char EXP_CHARS[] = "eE";
186 /* Chars that mean this number is a floating point constant
189 const char FLT_CHARS[] = "rRsSfFdDxXpP";
191 static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */
193 /* This function is called once, at assembler startup time. This
194 should set up all the tables, etc. that the MD part of the assembler
200 unsigned int nopcodes;
201 struct h8_opcode *p, *p1;
202 struct h8_instruction *pi;
203 char prev_buffer[100];
207 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
208 as_warn (_("could not set architecture and machine"));
211 opcode_hash_control = hash_new ();
214 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
216 h8_instructions = (struct h8_instruction *)
217 xmalloc (nopcodes * sizeof (struct h8_instruction));
219 pi = h8_instructions;
221 /* We do a minimum amount of sorting on the opcode table; this is to
222 make it easy to describe the mova instructions without unnecessary
224 Sorting only takes place inside blocks of instructions of the form
225 X/Y, so for example mova/b, mova/w and mova/l can be intermixed. */
228 struct h8_opcode *first_skipped = 0;
230 char *src = p1->name;
235 /* Strip off any . part when inserting the opcode and only enter
236 unique codes into the hash table. */
237 dst = buffer = malloc (strlen (src) + 1);
246 cmplen = src - p1->name + 1;
253 hash_insert (opcode_hash_control, buffer, (char *) pi);
254 strcpy (prev_buffer, buffer);
257 for (p = p1; p->name; p++)
259 /* A negative TIME is used to indicate that we've added this opcode
263 if (strncmp (p->name, buffer, cmplen) != 0
264 || (p->name[cmplen] != '\0' && p->name[cmplen] != '.'
265 && p->name[cmplen - 1] != '/'))
267 if (first_skipped == 0)
271 if (strncmp (p->name, buffer, len) != 0)
273 if (first_skipped == 0)
279 pi->size = p->name[len] == '.' ? p->name[len + 1] : 0;
282 /* Find the number of operands. */
284 while (pi->noperands < 3 && p->args.nib[pi->noperands] != (op_type) E)
287 /* Find the length of the opcode in bytes. */
289 while (p->data.nib[pi->length * 2] != (op_type) E)
298 /* Add entry for the NULL vector terminator. */
322 static void clever_message PARAMS ((const struct h8_instruction *, struct h8_op *));
323 static void build_bytes PARAMS ((const struct h8_instruction *, struct h8_op *));
324 static void do_a_fix_imm PARAMS ((int, int, struct h8_op *, int));
325 static void check_operand PARAMS ((struct h8_op *, unsigned int, char *));
326 static const struct h8_instruction * get_specific PARAMS ((const struct h8_instruction *, struct h8_op *, int));
327 static char * get_operands PARAMS ((unsigned, char *, struct h8_op *));
328 static void get_operand PARAMS ((char **, struct h8_op *, int));
329 static char * skip_colonthing PARAMS ((char *, expressionS *, int *));
330 static char * parse_exp PARAMS ((char *, expressionS *));
331 static int parse_reg PARAMS ((char *, op_type *, unsigned *, int));
332 char * colonmod24 PARAMS ((struct h8_op *, char *));
334 static int constant_fits_width_p PARAMS ((struct h8_op *, unsigned int));
335 static int constant_fits_size_p PARAMS ((struct h8_op *, int, int));
339 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
348 /* Try to parse a reg name. Return the number of chars consumed. */
351 parse_reg (src, mode, reg, direction)
360 /* Cribbed from get_symbol_end. */
361 if (!is_name_beginner (*src) || *src == '\001')
364 while ((is_part_of_name (*end) && *end != '.') || *end == '\001')
368 if (len == 2 && TOLOWER (src[0]) == 's' && TOLOWER (src[1]) == 'p')
370 *mode = PSIZE | REG | direction;
375 TOLOWER (src[0]) == 'c' &&
376 TOLOWER (src[1]) == 'c' &&
377 TOLOWER (src[2]) == 'r')
384 TOLOWER (src[0]) == 'e' &&
385 TOLOWER (src[1]) == 'x' &&
386 TOLOWER (src[2]) == 'r')
393 TOLOWER (src[0]) == 'v' &&
394 TOLOWER (src[1]) == 'b' &&
395 TOLOWER (src[2]) == 'r')
402 TOLOWER (src[0]) == 's' &&
403 TOLOWER (src[1]) == 'b' &&
404 TOLOWER (src[2]) == 'r')
410 if (len == 2 && TOLOWER (src[0]) == 'f' && TOLOWER (src[1]) == 'p')
412 *mode = PSIZE | REG | direction;
416 if (len == 3 && TOLOWER (src[0]) == 'e' && TOLOWER (src[1]) == 'r' &&
417 src[2] >= '0' && src[2] <= '7')
419 *mode = L_32 | REG | direction;
422 as_warn (_("Reg not valid for H8/300"));
425 if (len == 2 && TOLOWER (src[0]) == 'e' && src[1] >= '0' && src[1] <= '7')
427 *mode = L_16 | REG | direction;
428 *reg = src[1] - '0' + 8;
430 as_warn (_("Reg not valid for H8/300"));
434 if (TOLOWER (src[0]) == 'r')
436 if (src[1] >= '0' && src[1] <= '7')
438 if (len == 3 && TOLOWER (src[2]) == 'l')
440 *mode = L_8 | REG | direction;
441 *reg = (src[1] - '0') + 8;
444 if (len == 3 && TOLOWER (src[2]) == 'h')
446 *mode = L_8 | REG | direction;
447 *reg = (src[1] - '0');
452 *mode = L_16 | REG | direction;
453 *reg = (src[1] - '0');
467 char *save = input_line_pointer;
470 input_line_pointer = s;
472 if (op->X_op == O_absent)
473 as_bad (_("missing operand"));
474 new = input_line_pointer;
475 input_line_pointer = save;
480 skip_colonthing (ptr, exp, mode)
482 expressionS *exp ATTRIBUTE_UNUSED;
489 if (ptr[0] == '8' && ! ISDIGIT (ptr[1]))
491 else if (ptr[0] == '2' && ! ISDIGIT (ptr[1]))
493 else if (ptr[0] == '3' && ! ISDIGIT (ptr[1]))
495 else if (ptr[0] == '4' && ! ISDIGIT (ptr[1]))
497 else if (ptr[0] == '5' && ! ISDIGIT (ptr[1]))
499 else if (ptr[0] == '2' && ptr[1] == '4')
501 else if (ptr[0] == '3' && ptr[1] == '2')
503 else if (ptr[0] == '1' && ptr[1] == '6')
506 as_bad (_("invalid operand size requested"));
508 while (ISDIGIT (*ptr))
514 /* The many forms of operand:
517 @Rn Register indirect
518 @(exp[:16], Rn) Register indirect with displacement
522 @aa:16 absolute 16 bit
525 #xx[:size] immediate data
526 @(exp:[8], pc) pc rel
527 @@aa[:8] memory indirect. */
535 src = skip_colonthing (src, &op->exp, &mode);
539 /* Choose a default mode. */
540 if (op->exp.X_add_number < -32768
541 || op->exp.X_add_number > 32767)
548 else if (op->exp.X_add_symbol
549 || op->exp.X_op_symbol)
560 constant_fits_width_p (operand, width)
561 struct h8_op *operand;
564 return ((operand->exp.X_add_number & ~width) == 0
565 || (operand->exp.X_add_number | width) == (unsigned)(~0));
569 constant_fits_size_p (operand, size, no_symbols)
570 struct h8_op *operand;
571 int size, no_symbols;
573 offsetT num = operand->exp.X_add_number;
575 && (operand->exp.X_add_symbol != 0 || operand->exp.X_op_symbol != 0))
580 return (num & ~3) == 0;
582 return (num & ~7) == 0;
584 return num >= 1 && num < 8;
586 return (num & ~15) == 0;
588 return num >= 1 && num < 32;
590 return (num & ~0xFF) == 0 || ((unsigned)num | 0x7F) == ~0u;
592 return (num & ~0xFF) == 0;
594 return (num & ~0xFFFF) == 0 || ((unsigned)num | 0x7FFF) == ~0u;
596 return (num & ~0xFFFF) == 0;
605 get_operand (ptr, op, direction)
617 /* Check for '(' and ')' for instructions ldm and stm. */
618 if (src[0] == '(' && src[8] == ')')
621 /* Gross. Gross. ldm and stm have a format not easily handled
622 by get_operand. We deal with it explicitly here. */
623 if (TOLOWER (src[0]) == 'e' && TOLOWER (src[1]) == 'r' &&
624 ISDIGIT (src[2]) && src[3] == '-' &&
625 TOLOWER (src[4]) == 'e' && TOLOWER (src[5]) == 'r' && ISDIGIT (src[6]))
633 as_bad (_("Invalid register list for ldm/stm\n"));
636 as_bad (_("Invalid register list for ldm/stm\n"));
639 as_bad (_("Invalid register list for ldm/stm)\n"));
641 /* Even sicker. We encode two registers into op->reg. One
642 for the low register to save, the other for the high
643 register to save; we also set the high bit in op->reg
644 so we know this is "very special". */
645 op->reg = 0x80000000 | (high << 8) | low;
654 len = parse_reg (src, &op->mode, &op->reg, direction);
660 int size = op->mode & SIZE;
665 as_warn (_("mismatch between register and suffix"));
666 op->mode = (op->mode & ~MODE) | LOWREG;
669 if (size != L_32 && size != L_16)
670 as_warn (_("mismatch between register and suffix"));
671 op->mode = (op->mode & ~MODE) | LOWREG;
672 op->mode = (op->mode & ~SIZE) | L_16;
675 op->mode = (op->mode & ~MODE) | LOWREG;
676 if (size != L_32 && size != L_8)
677 as_warn (_("mismatch between register and suffix"));
678 op->mode = (op->mode & ~MODE) | LOWREG;
679 op->mode = (op->mode & ~SIZE) | L_8;
682 as_warn ("invalid suffix after register.");
697 src = parse_exp (src, &op->exp);
699 src = skip_colonthing (src, &op->exp, &op->mode);
703 if (op->exp.X_add_number >= 0x100)
708 /* FIXME : 2? or 4? */
709 if (op->exp.X_add_number >= 0x400)
710 as_bad (_("address too high for vector table jmp/jsr"));
711 else if (op->exp.X_add_number >= 0x200)
716 op->exp.X_add_number = op->exp.X_add_number / divisor - 0x80;
724 if (*src == '-' || *src == '+')
728 len = parse_reg (src, &mode, &num, direction);
731 /* Oops, not a reg after all, must be ordinary exp. */
733 /* Must be a symbol. */
734 op->mode = ABS | PSIZE | direction;
735 *ptr = skip_colonthing (parse_exp (src, &op->exp),
736 &op->exp, &op->mode);
741 if ((mode & SIZE) != PSIZE)
742 as_bad (_("Wrong size pointer register for architecture."));
743 op->mode = c == '-' ? RDPREDEC : RDPREINC;
752 /* See if this is @(ERn.x, PC). */
753 len = parse_reg (src, &mode, &op->reg, direction);
754 if (len != 0 && (mode & MODE) == REG && src[len] == '.')
756 switch (TOLOWER (src[len + 1]))
759 mode = PCIDXB | direction;
762 mode = PCIDXW | direction;
765 mode = PCIDXL | direction;
772 && src[len + 2] == ','
773 && TOLOWER (src[len + 3]) != 'p'
774 && TOLOWER (src[len + 4]) != 'c'
775 && src[len + 5] != ')')
777 *ptr = src + len + 6;
781 /* Fall through into disp case - the grammar is somewhat
782 ambiguous, so we should try whether it's a DISP operand
783 after all ("ER3.L" might be a poorly named label...). */
788 /* Start off assuming a 16 bit offset. */
790 src = parse_exp (src, &op->exp);
792 src = colonmod24 (op, src);
797 op->mode |= ABS | direction;
804 as_bad (_("expected @(exp, reg16)"));
810 len = parse_reg (src, &mode, &op->reg, direction);
811 if (len == 0 || (mode & MODE) != REG)
813 as_bad (_("expected @(exp, reg16)"));
819 switch (TOLOWER (src[1]))
822 op->mode |= INDEXB | direction;
825 op->mode |= INDEXW | direction;
828 op->mode |= INDEXL | direction;
831 as_bad (_("expected .L, .W or .B for register in indexed addressing mode"));
837 op->mode |= DISP | direction;
838 src = skip_colonthing (src, &op->exp, &op->mode);
840 if (*src != ')' && '(')
842 as_bad (_("expected @(exp, reg16)"));
849 len = parse_reg (src, &mode, &num, direction);
854 if (*src == '+' || *src == '-')
856 if ((mode & SIZE) != PSIZE)
857 as_bad (_("Wrong size pointer register for architecture."));
858 op->mode = *src == '+' ? RSPOSTINC : RSPOSTDEC;
864 if ((mode & SIZE) != PSIZE)
865 as_bad (_("Wrong size pointer register for architecture."));
867 op->mode = direction | IND | PSIZE;
875 /* must be a symbol */
877 op->mode = ABS | direction;
878 src = parse_exp (src, &op->exp);
880 *ptr = colonmod24 (op, src);
890 src = parse_exp (src, &op->exp);
891 *ptr = skip_colonthing (src, &op->exp, &op->mode);
895 else if (strncmp (src, "mach", 4) == 0 ||
896 strncmp (src, "macl", 4) == 0 ||
897 strncmp (src, "MACH", 4) == 0 ||
898 strncmp (src, "MACL", 4) == 0)
900 op->reg = TOLOWER (src[3]) == 'l';
907 src = parse_exp (src, &op->exp);
908 /* Trailing ':' size ? */
911 if (src[1] == '1' && src[2] == '6')
913 op->mode = PCREL | L_16;
916 else if (src[1] == '8')
918 op->mode = PCREL | L_8;
922 as_bad (_("expect :8 or :16 here"));
926 int val = op->exp.X_add_number;
929 if (-128 < val && val < 127)
940 get_operands (noperands, op_end, operand)
941 unsigned int noperands;
943 struct h8_op *operand;
954 get_operand (&ptr, operand + 0, SRC);
958 get_operand (&ptr, operand + 1, DST);
964 get_operand (&ptr, operand + 0, SRC);
967 get_operand (&ptr, operand + 1, DST);
972 get_operand (&ptr, operand + 0, SRC);
975 get_operand (&ptr, operand + 1, DST);
978 get_operand (&ptr, operand + 2, OP3);
988 /* MOVA has special requirements. Rather than adding twice the amount of
989 addressing modes, we simply special case it a bit. */
991 get_mova_operands (char *op_end, struct h8_op *operand)
995 if (ptr[1] != '@' || ptr[2] != '(')
999 ptr = parse_exp (ptr, &operand[0].exp);
1000 ptr = colonmod24 (operand + 0, ptr);
1005 get_operand (&ptr, operand + 1, DST);
1013 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
1016 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
1019 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
1025 else if ((operand[1].mode & MODE) == LOWREG)
1027 switch (operand[1].mode & SIZE)
1030 operand[0].mode = (operand[0].mode & ~MODE) | INDEXB;
1033 operand[0].mode = (operand[0].mode & ~MODE) | INDEXW;
1036 operand[0].mode = (operand[0].mode & ~MODE) | INDEXL;
1045 if (*ptr++ != ')' || *ptr++ != ',')
1047 get_operand (&ptr, operand + 2, OP3);
1048 /* See if we can use the short form of MOVA. */
1049 if (((operand[1].mode & MODE) == REG || (operand[1].mode & MODE) == LOWREG)
1050 && (operand[2].mode & MODE) == REG
1051 && (operand[1].reg & 7) == (operand[2].reg & 7))
1053 operand[1].mode = operand[2].mode = 0;
1054 operand[0].reg = operand[2].reg & 7;
1059 as_bad (_("expected valid addressing mode for mova: \"@(disp, ea.sz),ERn\""));
1064 get_rtsl_operands (char *ptr, struct h8_op *operand)
1066 int mode, num, num2, len, type = 0;
1074 len = parse_reg (ptr, &mode, &num, SRC);
1075 if (len == 0 || (mode & MODE) != REG)
1077 as_bad (_("expected register"));
1085 as_bad (_("expected register list"));
1088 len = parse_reg (ptr, &mode, &num2, SRC);
1089 if (len == 0 || (mode & MODE) != REG)
1091 as_bad (_("expected register"));
1097 as_bad (_("expected closing paren"));
1100 /* CONST_xxx are used as placeholders in the opcode table. */
1102 if (num < 1 || num > 3)
1104 as_bad (_("invalid register list"));
1109 num2 = num, num = 0;
1110 operand[0].mode = RS32;
1111 operand[1].mode = RD32;
1112 operand[0].reg = num;
1113 operand[1].reg = num2;
1116 /* Passed a pointer to a list of opcodes which use different
1117 addressing modes, return the opcode which matches the opcodes
1120 static const struct h8_instruction *
1121 get_specific (instruction, operands, size)
1122 const struct h8_instruction *instruction;
1123 struct h8_op *operands;
1126 const struct h8_instruction *this_try = instruction;
1127 const struct h8_instruction *found_other = 0, *found_mismatched = 0;
1129 int this_index = instruction->idx;
1132 /* There's only one ldm/stm and it's easier to just
1133 get out quick for them. */
1134 if (OP_KIND (instruction->opcode->how) == O_LDM
1135 || OP_KIND (instruction->opcode->how) == O_STM)
1138 while (noperands < 3 && operands[noperands].mode != 0)
1141 while (this_index == instruction->idx && !found)
1146 this_try = instruction++;
1147 this_size = this_try->opcode->how & SN;
1149 if (this_try->noperands != noperands)
1151 else if (this_try->noperands > 0)
1155 for (i = 0; i < this_try->noperands && found; i++)
1157 op_type op = this_try->opcode->args.nib[i];
1158 int op_mode = op & MODE;
1159 int op_size = op & SIZE;
1160 int x = operands[i].mode;
1161 int x_mode = x & MODE;
1162 int x_size = x & SIZE;
1164 if (op_mode == LOWREG && (x_mode == REG || x_mode == LOWREG))
1166 if ((x_size == L_8 && (operands[i].reg & 8) == 0)
1167 || (x_size == L_16 && (operands[i].reg & 8) == 8))
1168 as_warn (_("can't use high part of register in operand %d"), i);
1170 if (x_size != op_size)
1173 else if (op_mode == REG)
1175 if (x_mode == LOWREG)
1181 x_size = (Hmode ? L_32 : L_16);
1183 op_size = (Hmode ? L_32 : L_16);
1185 /* The size of the reg is v important. */
1186 if (op_size != x_size)
1189 else if (op_mode & CTRL) /* control register */
1191 if (!(x_mode & CTRL))
1197 if (op_mode != CCR &&
1198 op_mode != CCR_EXR &&
1199 op_mode != CC_EX_VB_SB)
1203 if (op_mode != EXR &&
1204 op_mode != CCR_EXR &&
1205 op_mode != CC_EX_VB_SB)
1209 if (op_mode != MACH &&
1214 if (op_mode != MACL &&
1219 if (op_mode != VBR &&
1220 op_mode != VBR_SBR &&
1221 op_mode != CC_EX_VB_SB)
1225 if (op_mode != SBR &&
1226 op_mode != VBR_SBR &&
1227 op_mode != CC_EX_VB_SB)
1232 else if ((op & ABSJMP) && (x_mode == ABS || x_mode == PCREL))
1234 operands[i].mode &= ~MODE;
1235 operands[i].mode |= ABSJMP;
1236 /* But it may not be 24 bits long. */
1237 if (x_mode == ABS && !Hmode)
1239 operands[i].mode &= ~SIZE;
1240 operands[i].mode |= L_16;
1242 if ((operands[i].mode & SIZE) == L_32
1243 && (op_mode & SIZE) != L_32)
1246 else if (x_mode == IMM && op_mode != IMM)
1248 offsetT num = operands[i].exp.X_add_number;
1249 if (op_mode == KBIT || op_mode == DBIT)
1250 /* This is ok if the immediate value is sensible. */;
1251 else if (op_mode == CONST_2)
1253 else if (op_mode == CONST_4)
1255 else if (op_mode == CONST_8)
1257 else if (op_mode == CONST_16)
1262 else if (op_mode == PCREL && op_mode == x_mode)
1264 /* movsd only comes in PCREL16 flavour:
1265 If x_size is L_8, promote it. */
1266 if (OP_KIND (this_try->opcode->how) == O_MOVSD)
1270 /* The size of the displacement is important. */
1271 if (op_size != x_size)
1274 else if ((op_mode == DISP || op_mode == IMM || op_mode == ABS
1275 || op_mode == INDEXB || op_mode == INDEXW
1276 || op_mode == INDEXL)
1277 && op_mode == x_mode)
1279 /* Promote a L_24 to L_32 if it makes us match. */
1280 if (x_size == L_24 && op_size == L_32)
1287 /* Promote an L8 to L_16 if it makes us match. */
1288 if ((op_mode == ABS || op_mode == DISP) && x_size == L_8)
1290 if (op_size == L_16)
1295 if (((x_size == L_16 && op_size == L_16U)
1296 || (x_size == L_3 && op_size == L_3NZ))
1297 /* We're deliberately more permissive for ABS modes. */
1299 || constant_fits_size_p (operands + i, op_size,
1303 if (x_size != 0 && op_size != x_size)
1305 else if (x_size == 0
1306 && ! constant_fits_size_p (operands + i, op_size,
1310 else if (op_mode != x_mode)
1318 if ((this_try->opcode->available == AV_H8SX && ! SXmode)
1319 || (this_try->opcode->available == AV_H8H && ! Hmode))
1320 found = 0, found_other = this_try;
1321 else if (this_size != size && (this_size != SN && size != SN))
1322 found_mismatched = this_try, found = 0;
1330 as_warn (_("Opcode `%s' with these operand types not available in %s mode"),
1331 found_other->opcode->name,
1332 (! Hmode && ! Smode ? "H8/300"
1337 else if (found_mismatched)
1339 as_warn (_("mismatch between opcode size and operand size"));
1340 return found_mismatched;
1346 check_operand (operand, width, string)
1347 struct h8_op *operand;
1351 if (operand->exp.X_add_symbol == 0
1352 && operand->exp.X_op_symbol == 0)
1354 /* No symbol involved, let's look at offset, it's dangerous if
1355 any of the high bits are not 0 or ff's, find out by oring or
1356 anding with the width and seeing if the answer is 0 or all
1359 if (! constant_fits_width_p (operand, width))
1362 && (operand->exp.X_add_number & 0xff00) == 0xff00)
1364 /* Just ignore this one - which happens when trying to
1365 fit a 16 bit address truncated into an 8 bit address
1366 of something like bset. */
1368 else if (strcmp (string, "@") == 0
1370 && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
1372 /* Just ignore this one - which happens when trying to
1373 fit a 24 bit address truncated into a 16 bit address
1374 of something like mov.w. */
1378 as_warn (_("operand %s0x%lx out of range."), string,
1379 (unsigned long) operand->exp.X_add_number);
1385 /* RELAXMODE has one of 3 values:
1387 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
1389 1 Output a relaxable 24bit absolute mov.w address relocation
1390 (may relax into a 16bit absolute address).
1392 2 Output a relaxable 16/24 absolute mov.b address relocation
1393 (may relax into an 8bit absolute address). */
1396 do_a_fix_imm (offset, nibble, operand, relaxmode)
1398 struct h8_op *operand;
1404 char *bytes = frag_now->fr_literal + offset;
1406 char *t = ((operand->mode & MODE) == IMM) ? "#" : "@";
1408 if (operand->exp.X_add_symbol == 0)
1410 switch (operand->mode & SIZE)
1413 check_operand (operand, 0x3, t);
1414 bytes[0] |= (operand->exp.X_add_number & 3) << (nibble ? 0 : 4);
1418 check_operand (operand, 0x7, t);
1419 bytes[0] |= (operand->exp.X_add_number & 7) << (nibble ? 0 : 4);
1422 check_operand (operand, 0xF, t);
1423 bytes[0] |= (operand->exp.X_add_number & 15) << (nibble ? 0 : 4);
1426 check_operand (operand, 0x1F, t);
1427 bytes[0] |= operand->exp.X_add_number & 31;
1431 check_operand (operand, 0xff, t);
1432 bytes[0] |= operand->exp.X_add_number;
1436 check_operand (operand, 0xffff, t);
1437 bytes[0] |= operand->exp.X_add_number >> 8;
1438 bytes[1] |= operand->exp.X_add_number >> 0;
1441 check_operand (operand, 0xffffff, t);
1442 bytes[0] |= operand->exp.X_add_number >> 16;
1443 bytes[1] |= operand->exp.X_add_number >> 8;
1444 bytes[2] |= operand->exp.X_add_number >> 0;
1448 /* This should be done with bfd. */
1449 bytes[0] |= operand->exp.X_add_number >> 24;
1450 bytes[1] |= operand->exp.X_add_number >> 16;
1451 bytes[2] |= operand->exp.X_add_number >> 8;
1452 bytes[3] |= operand->exp.X_add_number >> 0;
1455 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
1456 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
1463 switch (operand->mode & SIZE)
1468 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
1471 else if (relaxmode == 1)
1477 as_bad (_("Can't work out size of operand.\n"));
1486 operand->exp.X_add_number =
1487 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1488 operand->exp.X_add_number |= (bytes[0] << 8) | bytes[1];
1494 operand->exp.X_add_number =
1495 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1496 operand->exp.X_add_number |= bytes[0];
1499 fix_new_exp (frag_now,
1508 /* Now we know what sort of opcodes it is, let's build the bytes. */
1511 build_bytes (this_try, operand)
1512 const struct h8_instruction *this_try;
1513 struct h8_op *operand;
1516 char *output = frag_more (this_try->length);
1517 op_type *nibble_ptr = this_try->opcode->data.nib;
1519 unsigned int nibble_count = 0;
1523 char asnibbles[100];
1524 char *p = asnibbles;
1527 if (!(this_try->opcode->available == AV_H8 || Hmode))
1528 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1529 this_try->opcode->name);
1531 while (*nibble_ptr != (op_type) E)
1538 d = (c & OP3) == OP3 ? 2 : (c & DST) == DST ? 1 : 0;
1546 if (c2 == REG || c2 == LOWREG
1547 || c2 == IND || c2 == PREINC || c2 == PREDEC
1548 || c2 == POSTINC || c2 == POSTDEC)
1550 nib = operand[d].reg;
1555 else if (c & CTRL) /* Control reg operand. */
1556 nib = operand[d].reg;
1558 else if ((c & DISPREG) == (DISPREG))
1560 nib = operand[d].reg;
1564 operand[d].mode = c;
1565 op_at[d] = nibble_count;
1568 else if (c2 == IMM || c2 == PCREL || c2 == ABS
1569 || (c & ABSJMP) || c2 == DISP)
1571 operand[d].mode = c;
1572 op_at[d] = nibble_count;
1575 else if ((c & IGNORE) || (c & DATA))
1578 else if (c2 == DBIT)
1580 switch (operand[0].exp.X_add_number)
1589 as_bad (_("Need #1 or #2 here"));
1592 else if (c2 == KBIT)
1594 switch (operand[0].exp.X_add_number)
1604 as_warn (_("#4 not valid on H8/300."));
1609 as_bad (_("Need #1 or #2 here"));
1612 /* Stop it making a fix. */
1613 operand[0].mode = 0;
1617 operand[d].mode |= MEMRELAX;
1633 if (operand[0].mode == MACREG)
1634 /* stmac has mac[hl] as the first operand. */
1635 nib = 2 + operand[0].reg;
1637 /* ldmac has mac[hl] as the second operand. */
1638 nib = 2 + operand[1].reg;
1646 /* Disgusting. Why, oh why didn't someone ask us for advice
1647 on the assembler format. */
1648 if (OP_KIND (this_try->opcode->how) == O_LDM)
1650 high = (operand[1].reg >> 8) & 0xf;
1651 low = (operand[1].reg) & 0xf;
1652 asnibbles[2] = high - low;
1653 asnibbles[7] = high;
1655 else if (OP_KIND (this_try->opcode->how) == O_STM)
1657 high = (operand[0].reg >> 8) & 0xf;
1658 low = (operand[0].reg) & 0xf;
1659 asnibbles[2] = high - low;
1663 for (i = 0; i < this_try->length; i++)
1664 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1666 /* Note if this is a movb instruction -- there's a special relaxation
1667 which only applies to them. */
1668 if (this_try->opcode->how == O (O_MOV, SB))
1671 /* Output any fixes. */
1672 for (i = 0; i < this_try->noperands; i++)
1674 int x = operand[i].mode;
1675 int x_mode = x & MODE;
1677 if (x_mode == IMM || x_mode == DISP)
1678 do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
1679 op_at[i] & 1, operand + i, (x & MEMRELAX) != 0);
1681 else if (x_mode == ABS)
1682 do_a_fix_imm (output - frag_now->fr_literal + op_at[i] / 2,
1683 op_at[i] & 1, operand + i,
1684 (x & MEMRELAX) ? movb + 1 : 0);
1686 else if (x_mode == PCREL)
1688 int size16 = (x & SIZE) == L_16;
1689 int size = size16 ? 2 : 1;
1690 int type = size16 ? R_PCRWORD : R_PCRBYTE;
1693 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1695 if (operand[i].exp.X_add_number & 1)
1696 as_warn (_("branch operand has odd offset (%lx)\n"),
1697 (unsigned long) operand->exp.X_add_number);
1699 /* The COFF port has always been off by one, changing it
1700 now would be an incompatible change, so we leave it as-is.
1702 We don't want to do this for ELF as we want to be
1703 compatible with the proposed ELF format from Hitachi. */
1704 operand[i].exp.X_add_number -= 1;
1708 operand[i].exp.X_add_number =
1709 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1713 operand[i].exp.X_add_number =
1714 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1719 operand[i].exp.X_add_number |= output[op_at[i] / 2];
1721 fixP = fix_new_exp (frag_now,
1722 output - frag_now->fr_literal + op_at[i] / 2,
1727 fixP->fx_signed = 1;
1729 else if (x_mode == MEMIND)
1731 check_operand (operand + i, 0xff, "@@");
1732 fix_new_exp (frag_now,
1733 output - frag_now->fr_literal + 1,
1739 else if (x_mode == VECIND)
1741 check_operand (operand + i, 0x7f, "@@");
1742 /* FIXME: approximating the effect of "B31" here...
1743 This is very hackish, and ought to be done a better way. */
1744 operand[i].exp.X_add_number |= 0x80;
1745 fix_new_exp (frag_now,
1746 output - frag_now->fr_literal + 1,
1752 else if (x & ABSJMP)
1755 bfd_reloc_code_real_type reloc_type = R_JMPL1;
1758 /* To be compatible with the proposed H8 ELF format, we
1759 want the relocation's offset to point to the first byte
1760 that will be modified, not to the start of the instruction. */
1762 if ((operand->mode & SIZE) == L_32)
1765 reloc_type = R_RELLONG;
1771 /* This jmp may be a jump or a branch. */
1773 check_operand (operand + i,
1774 SXmode ? 0xffffffff : Hmode ? 0xffffff : 0xffff,
1777 if (operand[i].exp.X_add_number & 1)
1778 as_warn (_("branch operand has odd offset (%lx)\n"),
1779 (unsigned long) operand->exp.X_add_number);
1782 operand[i].exp.X_add_number =
1783 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1784 fix_new_exp (frag_now,
1785 output - frag_now->fr_literal + where,
1794 /* Try to give an intelligent error message for common and simple to
1798 clever_message (instruction, operand)
1799 const struct h8_instruction *instruction;
1800 struct h8_op *operand;
1802 /* Find out if there was more than one possible opcode. */
1804 if ((instruction + 1)->idx != instruction->idx)
1808 /* Only one opcode of this flavour, try to guess which operand
1810 for (argn = 0; argn < instruction->noperands; argn++)
1812 switch (instruction->opcode->args.nib[argn])
1815 if (operand[argn].mode != RD16)
1817 as_bad (_("destination operand must be 16 bit register"));
1824 if (operand[argn].mode != RS8)
1826 as_bad (_("source operand must be 8 bit register"));
1832 if (operand[argn].mode != ABS16DST)
1834 as_bad (_("destination operand must be 16bit absolute address"));
1839 if (operand[argn].mode != RD8)
1841 as_bad (_("destination operand must be 8 bit register"));
1847 if (operand[argn].mode != ABS16SRC)
1849 as_bad (_("source operand must be 16bit absolute address"));
1857 as_bad (_("invalid operands"));
1860 /* This is the guts of the machine-dependent assembler. STR points to
1861 a machine dependent instruction. This function is supposed to emit
1862 the frags/bytes it assembles. */
1870 struct h8_op operand[3];
1871 const struct h8_instruction *instruction;
1872 const struct h8_instruction *prev_instruction;
1878 /* Drop leading whitespace. */
1882 /* Find the op code end. */
1883 for (op_start = op_end = str;
1884 *op_end != 0 && *op_end != ' ';
1896 if (op_end == op_start)
1898 as_bad (_("can't find opcode "));
1904 instruction = (const struct h8_instruction *)
1905 hash_find (opcode_hash_control, op_start);
1907 if (instruction == NULL)
1909 as_bad (_("unknown opcode"));
1913 /* We used to set input_line_pointer to the result of get_operands,
1914 but that is wrong. Our caller assumes we don't change it. */
1916 operand[0].mode = 0;
1917 operand[1].mode = 0;
1918 operand[2].mode = 0;
1920 if (OP_KIND (instruction->opcode->how) == O_MOVAB
1921 || OP_KIND (instruction->opcode->how) == O_MOVAW
1922 || OP_KIND (instruction->opcode->how) == O_MOVAL)
1923 get_mova_operands (op_end, operand);
1924 else if (OP_KIND (instruction->opcode->how) == O_RTEL
1925 || OP_KIND (instruction->opcode->how) == O_RTSL)
1926 get_rtsl_operands (op_end, operand);
1928 get_operands (instruction->noperands, op_end, operand);
1931 prev_instruction = instruction;
1951 instruction = get_specific (instruction, operand, size);
1953 if (instruction == 0)
1955 /* Couldn't find an opcode which matched the operands. */
1956 char *where = frag_more (2);
1960 clever_message (prev_instruction, operand);
1965 /* This is the earliest point at which we can do this:
1966 any DISP2 operands need to be fixed-up according to
1967 the size of the operation. */
1968 /* MOVA is a whole different set of rules... */
1969 if (OP_KIND (instruction->opcode->how) == O_MOVAB ||
1970 OP_KIND (instruction->opcode->how) == O_MOVAW ||
1971 OP_KIND (instruction->opcode->how) == O_MOVAL)
1973 if ((operand[1].mode & MODE) == DISP &&
1974 (operand[1].mode & SIZE) == L_2)
1975 switch (operand[0].mode & MODE) {
1980 if (operand[1].exp.X_add_number % 2)
1981 as_warn (_("operand/size mis-match"));
1982 operand[1].exp.X_add_number /= 2;
1985 if (operand[1].exp.X_add_number % 4)
1986 as_warn (_("operand/size mis-match"));
1987 operand[1].exp.X_add_number /= 4;
1993 for (i = 0; i < instruction->noperands; i++)
1994 if ((operand[i].mode & MODE) == DISP &&
1995 (operand[i].mode & SIZE) == L_2)
2002 if (operand[i].exp.X_add_number % 2)
2003 as_warn (_("operand/size mis-match"));
2004 operand[i].exp.X_add_number /= 2;
2007 if (operand[i].exp.X_add_number % 4)
2008 as_warn (_("operand/size mis-match"));
2009 operand[i].exp.X_add_number /= 4;
2014 build_bytes (instruction, operand);
2016 #ifdef BFD_ASSEMBLER
2017 dwarf2_emit_insn (instruction->length);
2021 #ifndef BFD_ASSEMBLER
2023 tc_crawl_symbol_chain (headers)
2024 object_headers *headers ATTRIBUTE_UNUSED;
2026 printf (_("call to tc_crawl_symbol_chain \n"));
2031 md_undefined_symbol (name)
2032 char *name ATTRIBUTE_UNUSED;
2037 #ifndef BFD_ASSEMBLER
2039 tc_headers_hook (headers)
2040 object_headers *headers ATTRIBUTE_UNUSED;
2042 printf (_("call to tc_headers_hook \n"));
2046 /* Various routines to kill one day */
2047 /* Equal to MAX_PRECISION in atof-ieee.c */
2048 #define MAX_LITTLENUMS 6
2050 /* Turn a string in input_line_pointer into a floating point constant
2051 of type TYPE, and store the appropriate bytes in *LITP. The number
2052 of LITTLENUMS emitted is stored in *SIZEP. An error message is
2053 returned, or NULL on OK. */
2056 md_atof (type, litP, sizeP)
2062 LITTLENUM_TYPE words[MAX_LITTLENUMS];
2063 LITTLENUM_TYPE *wordP;
2094 return _("Bad call to MD_ATOF()");
2096 t = atof_ieee (input_line_pointer, type, words);
2098 input_line_pointer = t;
2100 *sizeP = prec * sizeof (LITTLENUM_TYPE);
2101 for (wordP = words; prec--;)
2103 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
2104 litP += sizeof (LITTLENUM_TYPE);
2109 const char *md_shortopts = "";
2110 struct option md_longopts[] = {
2111 {NULL, no_argument, NULL, 0}
2114 size_t md_longopts_size = sizeof (md_longopts);
2117 md_parse_option (c, arg)
2118 int c ATTRIBUTE_UNUSED;
2119 char *arg ATTRIBUTE_UNUSED;
2125 md_show_usage (stream)
2126 FILE *stream ATTRIBUTE_UNUSED;
2130 void tc_aout_fix_to_chars PARAMS ((void));
2133 tc_aout_fix_to_chars ()
2135 printf (_("call to tc_aout_fix_to_chars \n"));
2140 md_convert_frag (headers, seg, fragP)
2141 #ifdef BFD_ASSEMBLER
2142 bfd *headers ATTRIBUTE_UNUSED;
2144 object_headers *headers ATTRIBUTE_UNUSED;
2146 segT seg ATTRIBUTE_UNUSED;
2147 fragS *fragP ATTRIBUTE_UNUSED;
2149 printf (_("call to md_convert_frag \n"));
2153 #ifdef BFD_ASSEMBLER
2155 md_section_align (segment, size)
2159 int align = bfd_get_section_alignment (stdoutput, segment);
2160 return ((size + (1 << align) - 1) & (-1 << align));
2164 md_section_align (seg, size)
2168 return ((size + (1 << section_alignment[(int) seg]) - 1)
2169 & (-1 << section_alignment[(int) seg]));
2175 md_apply_fix3 (fixP, valP, seg)
2178 segT seg ATTRIBUTE_UNUSED;
2180 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
2183 switch (fixP->fx_size)
2189 *buf++ = (val >> 8);
2193 *buf++ = (val >> 24);
2194 *buf++ = (val >> 16);
2195 *buf++ = (val >> 8);
2202 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
2207 md_estimate_size_before_relax (fragP, segment_type)
2208 register fragS *fragP ATTRIBUTE_UNUSED;
2209 register segT segment_type ATTRIBUTE_UNUSED;
2211 printf (_("call tomd_estimate_size_before_relax \n"));
2215 /* Put number into target byte order. */
2217 md_number_to_chars (ptr, use, nbytes)
2222 number_to_chars_bigendian (ptr, use, nbytes);
2226 md_pcrel_from (fixP)
2227 fixS *fixP ATTRIBUTE_UNUSED;
2232 #ifndef BFD_ASSEMBLER
2234 tc_reloc_mangle (fix_ptr, intr, base)
2236 struct internal_reloc *intr;
2240 symbolS *symbol_ptr;
2242 symbol_ptr = fix_ptr->fx_addsy;
2244 /* If this relocation is attached to a symbol then it's ok
2246 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
2248 /* cons likes to create reloc32's whatever the size of the reloc..
2250 switch (fix_ptr->fx_size)
2253 intr->r_type = R_RELLONG;
2256 intr->r_type = R_RELWORD;
2259 intr->r_type = R_RELBYTE;
2267 intr->r_type = fix_ptr->fx_r_type;
2270 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
2271 intr->r_offset = fix_ptr->fx_offset;
2275 if (symbol_ptr->sy_number != -1)
2276 intr->r_symndx = symbol_ptr->sy_number;
2281 /* This case arises when a reference is made to `.'. */
2282 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
2284 intr->r_symndx = -1;
2287 intr->r_symndx = segsym->sy_number;
2288 intr->r_offset += S_GET_VALUE (symbol_ptr);
2293 intr->r_symndx = -1;
2295 #else /* BFD_ASSEMBLER */
2297 tc_gen_reloc (section, fixp)
2298 asection *section ATTRIBUTE_UNUSED;
2302 bfd_reloc_code_real_type r_type;
2304 if (fixp->fx_addsy && fixp->fx_subsy)
2306 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
2307 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
2309 as_bad_where (fixp->fx_file, fixp->fx_line,
2310 "Difference of symbols in different sections is not supported");
2315 rel = (arelent *) xmalloc (sizeof (arelent));
2316 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
2317 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
2318 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
2319 rel->addend = fixp->fx_offset;
2321 r_type = fixp->fx_r_type;
2325 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
2328 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
2329 if (rel->howto == NULL)
2331 as_bad_where (fixp->fx_file, fixp->fx_line,
2332 _("Cannot represent relocation type %s"),
2333 bfd_get_reloc_code_name (r_type));