1 /* tc-h8300.c -- Assemble code for the Renesas H8/300
2 Copyright 1991, 1992, 1993, 1994, 1995, 1996, 1997, 1998, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to the Free
19 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 /* Written By Steve Chamberlain <sac@cygnus.com>. */
30 #include "dwarf2dbg.h"
34 #define h8_opcodes ops
35 #include "opcode/h8300.h"
36 #include "safe-ctype.h"
42 const char comment_chars[] = ";";
43 const char line_comment_chars[] = "#";
44 const char line_separator_chars[] = "";
46 void cons PARAMS ((int));
47 void sbranch PARAMS ((int));
48 void h8300hmode PARAMS ((int));
49 void h8300smode PARAMS ((int));
50 void h8300hnmode PARAMS ((int));
51 void h8300snmode PARAMS ((int));
52 static void pint PARAMS ((int));
58 #define PSIZE (Hmode ? L_32 : L_16)
60 #define DSYMMODE (Hmode ? L_24 : L_16)
62 int bsize = L_8; /* Default branch displacement. */
70 const struct h8_opcode *opcode;
73 struct h8_instruction *h8_instructions;
77 int arg ATTRIBUTE_UNUSED;
82 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300h))
83 as_warn (_("could not set architecture and machine"));
89 int arg ATTRIBUTE_UNUSED;
94 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300s))
95 as_warn (_("could not set architecture and machine"));
101 int arg ATTRIBUTE_UNUSED;
107 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300hn))
108 as_warn (_("could not set architecture and machine"));
114 int arg ATTRIBUTE_UNUSED;
120 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300sn))
121 as_warn (_("could not set architecture and machine"));
134 int arg ATTRIBUTE_UNUSED;
136 cons (Hmode ? 4 : 2);
139 /* This table describes all the machine specific pseudo-ops the assembler
140 has to support. The fields are:
141 pseudo-op name without dot
142 function to call to execute this pseudo-op
143 Integer arg to pass to the function. */
145 const pseudo_typeS md_pseudo_table[] =
147 {"h8300h", h8300hmode, 0},
148 {"h8300hn", h8300hnmode, 0},
149 {"h8300s", h8300smode, 0},
150 {"h8300sn", h8300snmode, 0},
151 {"sbranch", sbranch, L_8},
152 {"lbranch", sbranch, L_16},
155 {"file", (void (*) PARAMS ((int))) dwarf2_directive_file, 0 },
156 {"loc", dwarf2_directive_loc, 0 },
163 {"form", listing_psize, 0},
164 {"heading", listing_title, 0},
165 {"import", s_ignore, 0},
166 {"page", listing_eject, 0},
167 {"program", s_ignore, 0},
171 const int md_reloc_size;
173 const char EXP_CHARS[] = "eE";
175 /* Chars that mean this number is a floating point constant
178 const char FLT_CHARS[] = "rRsSfFdDxXpP";
180 static struct hash_control *opcode_hash_control; /* Opcode mnemonics. */
182 /* This function is called once, at assembler startup time. This
183 should set up all the tables, etc. that the MD part of the assembler
189 unsigned int nopcodes;
190 const struct h8_opcode *p;
191 struct h8_instruction *pi;
192 char prev_buffer[100];
196 if (!bfd_set_arch_mach (stdoutput, bfd_arch_h8300, bfd_mach_h8300))
197 as_warn (_("could not set architecture and machine"));
200 opcode_hash_control = hash_new ();
203 nopcodes = sizeof (h8_opcodes) / sizeof (struct h8_opcode);
205 h8_instructions = (struct h8_instruction *)
206 xmalloc (nopcodes * sizeof (struct h8_instruction));
208 for (p = h8_opcodes, pi = h8_instructions; p->name; p++, pi++)
210 /* Strip off any . part when inserting the opcode and only enter
211 unique codes into the hash table. */
213 unsigned int len = strlen (src);
214 char *dst = malloc (len + 1);
229 if (strcmp (buffer, prev_buffer))
231 hash_insert (opcode_hash_control, buffer, (char *) pi);
232 strcpy (prev_buffer, buffer);
237 /* Find the number of operands. */
239 while (p->args.nib[pi->noperands] != E)
242 /* Find the length of the opcode in bytes. */
244 while (p->data.nib[pi->length * 2] != E)
250 /* Add entry for the NULL vector terminator. */
268 int opsize; /* Set when a register size is seen. */
277 static void clever_message PARAMS ((const struct h8_instruction *, struct h8_op *));
278 static void build_bytes PARAMS ((const struct h8_instruction *, struct h8_op *));
279 static void do_a_fix_imm PARAMS ((int, struct h8_op *, int));
280 static void check_operand PARAMS ((struct h8_op *, unsigned int, char *));
281 static const struct h8_instruction * get_specific PARAMS ((const struct h8_instruction *, struct h8_op *, int));
282 static char * get_operands PARAMS ((unsigned, char *, struct h8_op *));
283 static void get_operand PARAMS ((char **, struct h8_op *, unsigned, int));
284 static char * skip_colonthing PARAMS ((char *, expressionS *, int *));
285 static char * parse_exp PARAMS ((char *, expressionS *));
286 static int parse_reg PARAMS ((char *, op_type *, unsigned *, int));
287 char * colonmod24 PARAMS ((struct h8_op *, char *));
291 WREG r0,r1,r2,r3,r4,r5,r6,r7,fp,sp
300 /* Try to parse a reg name. Return the number of chars consumed. */
303 parse_reg (src, mode, reg, direction)
312 /* Cribbed from get_symbol_end. */
313 if (!is_name_beginner (*src) || *src == '\001')
316 while (is_part_of_name (*end) || *end == '\001')
320 if (len == 2 && src[0] == 's' && src[1] == 'p')
322 *mode = PSIZE | REG | direction;
326 if (len == 3 && src[0] == 'c' && src[1] == 'c' && src[2] == 'r')
332 if (len == 3 && src[0] == 'e' && src[1] == 'x' && src[2] == 'r')
338 if (len == 2 && src[0] == 'f' && src[1] == 'p')
340 *mode = PSIZE | REG | direction;
344 if (len == 3 && src[0] == 'e' && src[1] == 'r'
345 && src[2] >= '0' && src[2] <= '7')
347 *mode = L_32 | REG | direction;
350 as_warn (_("Reg not valid for H8/300"));
353 if (len == 2 && src[0] == 'e' && src[1] >= '0' && src[1] <= '7')
355 *mode = L_16 | REG | direction;
356 *reg = src[1] - '0' + 8;
358 as_warn (_("Reg not valid for H8/300"));
364 if (src[1] >= '0' && src[1] <= '7')
366 if (len == 3 && src[2] == 'l')
368 *mode = L_8 | REG | direction;
369 *reg = (src[1] - '0') + 8;
372 if (len == 3 && src[2] == 'h')
374 *mode = L_8 | REG | direction;
375 *reg = (src[1] - '0');
380 *mode = L_16 | REG | direction;
381 *reg = (src[1] - '0');
395 char *save = input_line_pointer;
398 input_line_pointer = s;
400 if (op->X_op == O_absent)
401 as_bad (_("missing operand"));
402 new = input_line_pointer;
403 input_line_pointer = save;
408 skip_colonthing (ptr, exp, mode)
410 expressionS *exp ATTRIBUTE_UNUSED;
420 /* ff fill any 8 bit quantity. */
421 /* exp->X_add_number -= 0x100; */
430 else if (*ptr == '3')
434 else if (*ptr == '1')
438 while (ISDIGIT (*ptr))
445 /* The many forms of operand:
448 @Rn Register indirect
449 @(exp[:16], Rn) Register indirect with displacement
453 @aa:16 absolute 16 bit
456 #xx[:size] immediate data
457 @(exp:[8], pc) pc rel
458 @@aa[:8] memory indirect. */
466 src = skip_colonthing (src, &op->exp, &mode);
470 /* Choose a default mode. */
471 if (op->exp.X_add_number < -32768
472 || op->exp.X_add_number > 32767)
479 else if (op->exp.X_add_symbol
480 || op->exp.X_op_symbol)
491 get_operand (ptr, op, dst, direction)
494 unsigned int dst ATTRIBUTE_UNUSED;
504 /* Check for '(' and ')' for instructions ldm and stm. */
505 if (src[0] == '(' && src[8] == ')')
508 /* Gross. Gross. ldm and stm have a format not easily handled
509 by get_operand. We deal with it explicitly here. */
510 if (src[0] == 'e' && src[1] == 'r' && ISDIGIT (src[2])
511 && src[3] == '-' && src[4] == 'e' && src[5] == 'r' && ISDIGIT (src[6]))
519 as_bad (_("Invalid register list for ldm/stm\n"));
522 as_bad (_("Invalid register list for ldm/stm\n"));
525 as_bad (_("Invalid register list for ldm/stm\n"));
529 as_bad (_("Invalid register list for ldm/stm\n"));
531 /* Even sicker. We encode two registers into op->reg. One
532 for the low register to save, the other for the high
533 register to save; we also set the high bit in op->reg
534 so we know this is "very special". */
535 op->reg = 0x80000000 | (high << 8) | low;
544 len = parse_reg (src, &op->mode, &op->reg, direction);
557 src = parse_exp (src, &op->exp);
559 src = skip_colonthing (src, &op->exp, &op->mode);
570 len = parse_reg (src, &mode, &num, direction);
573 /* Oops, not a reg after all, must be ordinary exp. */
575 /* Must be a symbol. */
576 op->mode = ABS | PSIZE | direction;
577 *ptr = skip_colonthing (parse_exp (src, &op->exp),
578 &op->exp, &op->mode);
583 if ((mode & SIZE) != PSIZE)
584 as_bad (_("Wrong size pointer register for architecture."));
595 /* Start off assuming a 16 bit offset. */
597 src = parse_exp (src, &op->exp);
599 src = colonmod24 (op, src);
604 op->mode |= ABS | direction;
611 as_bad (_("expected @(exp, reg16)"));
617 len = parse_reg (src, &mode, &op->reg, direction);
618 if (len == 0 || !(mode & REG))
620 as_bad (_("expected @(exp, reg16)"));
623 op->mode |= DISP | direction;
626 src = skip_colonthing (src, &op->exp, &op->mode);
628 if (*src != ')' && '(')
630 as_bad (_("expected @(exp, reg16)"));
637 len = parse_reg (src, &mode, &num, direction);
645 if ((mode & SIZE) != PSIZE)
646 as_bad (_("Wrong size pointer register for architecture."));
652 if ((mode & SIZE) != PSIZE)
653 as_bad (_("Wrong size pointer register for architecture."));
655 op->mode = direction | IND | PSIZE;
663 /* must be a symbol */
665 op->mode = ABS | direction;
666 src = parse_exp (src, &op->exp);
668 *ptr = colonmod24 (op, src);
678 src = parse_exp (src, &op->exp);
679 *ptr = skip_colonthing (src, &op->exp, &op->mode);
683 else if (strncmp (src, "mach", 4) == 0
684 || strncmp (src, "macl", 4) == 0)
686 op->reg = src[3] == 'l';
693 src = parse_exp (src, &op->exp);
694 /* Trailing ':' size ? */
697 if (src[1] == '1' && src[2] == '6')
699 op->mode = PCREL | L_16;
702 else if (src[1] == '8')
704 op->mode = PCREL | L_8;
708 as_bad (_("expect :8 or :16 here"));
711 op->mode = PCREL | bsize;
718 get_operands (noperands, op_end, operand)
719 unsigned int noperands;
721 struct h8_op *operand;
734 get_operand (&ptr, operand + 0, 0, SRC);
738 get_operand (&ptr, operand + 1, 1, DST);
748 get_operand (&ptr, operand + 0, 0, SRC);
751 get_operand (&ptr, operand + 1, 1, DST);
761 /* Passed a pointer to a list of opcodes which use different
762 addressing modes, return the opcode which matches the opcodes
765 static const struct h8_instruction *
766 get_specific (instruction, operands, size)
767 const struct h8_instruction *instruction;
768 struct h8_op *operands;
771 const struct h8_instruction *this_try = instruction;
773 int this_index = instruction->idx;
775 /* There's only one ldm/stm and it's easier to just
776 get out quick for them. */
777 if (strcmp (instruction->opcode->name, "stm.l") == 0
778 || strcmp (instruction->opcode->name, "ldm.l") == 0)
781 while (this_index == instruction->idx && !found)
785 this_try = instruction++;
786 if (this_try->noperands == 0)
790 this_size = this_try->opcode->how & SN;
791 if (this_size != size && (this_size != SB || size != SN))
798 for (i = 0; i < this_try->noperands && found; i++)
800 op_type op = this_try->opcode->args.nib[i];
801 int x = operands[i].mode;
803 if ((op & (DISP | REG)) == (DISP | REG)
804 && ((x & (DISP | REG)) == (DISP | REG)))
806 dispreg = operands[i].reg;
814 x = (x & ~L_P) | (Hmode ? L_32 : L_16);
816 op = (op & ~L_P) | (Hmode ? L_32 : L_16);
820 /* The size of the reg is v important. */
821 if ((op & SIZE) != (x & SIZE))
824 else if ((op & ABSJMP) && (x & ABS))
826 operands[i].mode &= ~ABS;
827 operands[i].mode |= ABSJMP;
828 /* But it may not be 24 bits long. */
831 operands[i].mode &= ~SIZE;
832 operands[i].mode |= L_16;
835 else if ((op & (KBIT | DBIT)) && (x & IMM))
837 /* This is ok if the immediate value is sensible. */
841 /* The size of the displacement is important. */
842 if ((op & SIZE) != (x & SIZE))
845 else if ((op & (DISP | IMM | ABS))
846 && (op & (DISP | IMM | ABS)) == (x & (DISP | IMM | ABS)))
848 /* Promote a L_24 to L_32 if it makes us match. */
849 if ((x & L_24) && (op & L_32))
854 /* Promote an L8 to L_16 if it makes us match. */
855 if (op & ABS && op & L_8 && op & DISP)
860 else if ((x & SIZE) != 0
861 && ((op & SIZE) != (x & SIZE)))
864 else if ((op & MACREG) != (x & MACREG))
868 else if ((op & MODE) != (x & MODE))
882 check_operand (operand, width, string)
883 struct h8_op *operand;
887 if (operand->exp.X_add_symbol == 0
888 && operand->exp.X_op_symbol == 0)
890 /* No symbol involved, let's look at offset, it's dangerous if
891 any of the high bits are not 0 or ff's, find out by oring or
892 anding with the width and seeing if the answer is 0 or all
895 if ((operand->exp.X_add_number & ~width) != 0 &&
896 (operand->exp.X_add_number | width) != (unsigned)(~0))
899 && (operand->exp.X_add_number & 0xff00) == 0xff00)
901 /* Just ignore this one - which happens when trying to
902 fit a 16 bit address truncated into an 8 bit address
903 of something like bset. */
905 else if (strcmp (string, "@") == 0
907 && (operand->exp.X_add_number & 0xff8000) == 0xff8000)
909 /* Just ignore this one - which happens when trying to
910 fit a 24 bit address truncated into a 16 bit address
911 of something like mov.w. */
915 as_warn (_("operand %s0x%lx out of range."), string,
916 (unsigned long) operand->exp.X_add_number);
922 /* RELAXMODE has one of 3 values:
924 0 Output a "normal" reloc, no relaxing possible for this insn/reloc
926 1 Output a relaxable 24bit absolute mov.w address relocation
927 (may relax into a 16bit absolute address).
929 2 Output a relaxable 16/24 absolute mov.b address relocation
930 (may relax into an 8bit absolute address). */
933 do_a_fix_imm (offset, operand, relaxmode)
935 struct h8_op *operand;
942 char *t = operand->mode & IMM ? "#" : "@";
944 if (operand->exp.X_add_symbol == 0)
946 char *bytes = frag_now->fr_literal + offset;
947 switch (operand->mode & SIZE)
950 check_operand (operand, 0x3, t);
951 bytes[0] |= (operand->exp.X_add_number) << 4;
954 check_operand (operand, 0x7, t);
955 bytes[0] |= (operand->exp.X_add_number) << 4;
958 check_operand (operand, 0xff, t);
959 bytes[0] = operand->exp.X_add_number;
962 check_operand (operand, 0xffff, t);
963 bytes[0] = operand->exp.X_add_number >> 8;
964 bytes[1] = operand->exp.X_add_number >> 0;
967 check_operand (operand, 0xffffff, t);
968 bytes[0] = operand->exp.X_add_number >> 16;
969 bytes[1] = operand->exp.X_add_number >> 8;
970 bytes[2] = operand->exp.X_add_number >> 0;
974 /* This should be done with bfd. */
975 bytes[0] = operand->exp.X_add_number >> 24;
976 bytes[1] = operand->exp.X_add_number >> 16;
977 bytes[2] = operand->exp.X_add_number >> 8;
978 bytes[3] = operand->exp.X_add_number >> 0;
981 idx = (relaxmode == 2) ? R_MOV24B1 : R_MOVL1;
982 fix_new_exp (frag_now, offset, 4, &operand->exp, 0, idx);
989 switch (operand->mode & SIZE)
994 where = (operand->mode & SIZE) == L_24 ? -1 : 0;
997 else if (relaxmode == 1)
1003 as_bad (_("Can't work out size of operand.\n"));
1011 operand->exp.X_add_number =
1012 ((operand->exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1018 operand->exp.X_add_number =
1019 ((operand->exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1022 fix_new_exp (frag_now,
1031 /* Now we know what sort of opcodes it is, let's build the bytes. */
1034 build_bytes (this_try, operand)
1035 const struct h8_instruction *this_try;
1036 struct h8_op *operand;
1039 char *output = frag_more (this_try->length);
1040 op_type *nibble_ptr = this_try->opcode->data.nib;
1042 unsigned int nibble_count = 0;
1048 char *p = asnibbles;
1050 if (!(this_try->opcode->inbase || Hmode))
1051 as_warn (_("Opcode `%s' with these operand types not available in H8/300 mode"),
1052 this_try->opcode->name);
1054 while (*nibble_ptr != E)
1059 d = (c & (DST | SRC_IN_DST)) != 0;
1065 if (c & (REG | IND | INC | DEC))
1066 nib = operand[d].reg;
1068 else if ((c & DISPREG) == (DISPREG))
1073 operand[d].mode = c;
1074 absat = nibble_count / 2;
1077 else if (c & (IMM | PCREL | ABS | ABSJMP | DISP))
1079 operand[d].mode = c;
1080 immat = nibble_count / 2;
1083 else if (c & IGNORE)
1088 switch (operand[0].exp.X_add_number)
1097 as_bad (_("Need #1 or #2 here"));
1102 switch (operand[0].exp.X_add_number)
1112 as_warn (_("#4 not valid on H8/300."));
1117 as_bad (_("Need #1 or #2 here"));
1120 /* Stop it making a fix. */
1121 operand[0].mode = 0;
1125 operand[d].mode |= MEMRELAX;
1132 if (operand[0].mode == MACREG)
1133 /* stmac has mac[hl] as the first operand. */
1134 nib = 2 + operand[0].reg;
1136 /* ldmac has mac[hl] as the second operand. */
1137 nib = 2 + operand[1].reg;
1145 /* Disgusting. Why, oh why didn't someone ask us for advice
1146 on the assembler format. */
1147 if (strcmp (this_try->opcode->name, "stm.l") == 0
1148 || strcmp (this_try->opcode->name, "ldm.l") == 0)
1151 high = (operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg >> 8) & 0xf;
1152 low = operand[this_try->opcode->name[0] == 'l' ? 1 : 0].reg & 0xf;
1154 asnibbles[2] = high - low;
1155 asnibbles[7] = (this_try->opcode->name[0] == 'l') ? high : low;
1158 for (i = 0; i < this_try->length; i++)
1159 output[i] = (asnibbles[i * 2] << 4) | asnibbles[i * 2 + 1];
1161 /* Note if this is a movb instruction -- there's a special relaxation
1162 which only applies to them. */
1163 if (strcmp (this_try->opcode->name, "mov.b") == 0)
1166 /* Output any fixes. */
1167 for (i = 0; i < 2; i++)
1169 int x = operand[i].mode;
1171 if (x & (IMM | DISP))
1172 do_a_fix_imm (output - frag_now->fr_literal + immat,
1173 operand + i, (x & MEMRELAX) != 0);
1176 do_a_fix_imm (output - frag_now->fr_literal + absat,
1177 operand + i, (x & MEMRELAX) ? movb + 1 : 0);
1181 int size16 = x & (L_16);
1182 int where = size16 ? 2 : 1;
1183 int size = size16 ? 2 : 1;
1184 int type = size16 ? R_PCRWORD : R_PCRBYTE;
1187 check_operand (operand + i, size16 ? 0x7fff : 0x7f, "@");
1189 if (operand[i].exp.X_add_number & 1)
1190 as_warn (_("branch operand has odd offset (%lx)\n"),
1191 (unsigned long) operand->exp.X_add_number);
1193 /* The COFF port has always been off by one, changing it
1194 now would be an incompatible change, so we leave it as-is.
1196 We don't want to do this for ELF as we want to be
1197 compatible with the proposed ELF format from Hitachi. */
1198 operand[i].exp.X_add_number -= 1;
1200 operand[i].exp.X_add_number =
1201 ((operand[i].exp.X_add_number & 0xff) ^ 0x80) - 0x80;
1203 fixP = fix_new_exp (frag_now,
1204 output - frag_now->fr_literal + where,
1209 fixP->fx_signed = 1;
1211 else if (x & MEMIND)
1213 check_operand (operand + i, 0xff, "@@");
1214 fix_new_exp (frag_now,
1215 output - frag_now->fr_literal + 1,
1221 else if (x & ABSJMP)
1226 /* To be compatible with the proposed H8 ELF format, we
1227 want the relocation's offset to point to the first byte
1228 that will be modified, not to the start of the instruction. */
1232 /* This jmp may be a jump or a branch. */
1234 check_operand (operand + i, Hmode ? 0xffffff : 0xffff, "@");
1236 if (operand[i].exp.X_add_number & 1)
1237 as_warn (_("branch operand has odd offset (%lx)\n"),
1238 (unsigned long) operand->exp.X_add_number);
1241 operand[i].exp.X_add_number =
1242 ((operand[i].exp.X_add_number & 0xffff) ^ 0x8000) - 0x8000;
1243 fix_new_exp (frag_now,
1244 output - frag_now->fr_literal + where,
1253 /* Try to give an intelligent error message for common and simple to
1257 clever_message (instruction, operand)
1258 const struct h8_instruction *instruction;
1259 struct h8_op *operand;
1261 /* Find out if there was more than one possible opcode. */
1263 if ((instruction + 1)->idx != instruction->idx)
1267 /* Only one opcode of this flavour, try to guess which operand
1269 for (argn = 0; argn < instruction->noperands; argn++)
1271 switch (instruction->opcode->args.nib[argn])
1274 if (operand[argn].mode != RD16)
1276 as_bad (_("destination operand must be 16 bit register"));
1283 if (operand[argn].mode != RS8)
1285 as_bad (_("source operand must be 8 bit register"));
1291 if (operand[argn].mode != ABS16DST)
1293 as_bad (_("destination operand must be 16bit absolute address"));
1298 if (operand[argn].mode != RD8)
1300 as_bad (_("destination operand must be 8 bit register"));
1306 if (operand[argn].mode != ABS16SRC)
1308 as_bad (_("source operand must be 16bit absolute address"));
1316 as_bad (_("invalid operands"));
1319 /* This is the guts of the machine-dependent assembler. STR points to
1320 a machine dependent instruction. This function is supposed to emit
1321 the frags/bytes it assembles. */
1329 struct h8_op operand[2];
1330 const struct h8_instruction *instruction;
1331 const struct h8_instruction *prev_instruction;
1337 /* Drop leading whitespace. */
1341 /* Find the op code end. */
1342 for (op_start = op_end = str;
1343 *op_end != 0 && *op_end != ' ';
1355 if (op_end == op_start)
1357 as_bad (_("can't find opcode "));
1363 instruction = (const struct h8_instruction *)
1364 hash_find (opcode_hash_control, op_start);
1366 if (instruction == NULL)
1368 as_bad (_("unknown opcode"));
1372 /* We used to set input_line_pointer to the result of get_operands,
1373 but that is wrong. Our caller assumes we don't change it. */
1375 (void) get_operands (instruction->noperands, op_end, operand);
1377 prev_instruction = instruction;
1397 instruction = get_specific (instruction, operand, size);
1399 if (instruction == 0)
1401 /* Couldn't find an opcode which matched the operands. */
1402 char *where = frag_more (2);
1406 clever_message (prev_instruction, operand);
1410 if (instruction->size && dot)
1412 if (instruction->size != *dot)
1414 as_warn (_("mismatch between opcode size and operand size"));
1418 build_bytes (instruction, operand);
1420 #ifdef BFD_ASSEMBLER
1421 dwarf2_emit_insn (instruction->length);
1425 #ifndef BFD_ASSEMBLER
1427 tc_crawl_symbol_chain (headers)
1428 object_headers *headers ATTRIBUTE_UNUSED;
1430 printf (_("call to tc_crawl_symbol_chain \n"));
1435 md_undefined_symbol (name)
1436 char *name ATTRIBUTE_UNUSED;
1441 #ifndef BFD_ASSEMBLER
1443 tc_headers_hook (headers)
1444 object_headers *headers ATTRIBUTE_UNUSED;
1446 printf (_("call to tc_headers_hook \n"));
1450 /* Various routines to kill one day */
1451 /* Equal to MAX_PRECISION in atof-ieee.c */
1452 #define MAX_LITTLENUMS 6
1454 /* Turn a string in input_line_pointer into a floating point constant
1455 of type TYPE, and store the appropriate bytes in *LITP. The number
1456 of LITTLENUMS emitted is stored in *SIZEP. An error message is
1457 returned, or NULL on OK. */
1460 md_atof (type, litP, sizeP)
1466 LITTLENUM_TYPE words[MAX_LITTLENUMS];
1467 LITTLENUM_TYPE *wordP;
1498 return _("Bad call to MD_ATOF()");
1500 t = atof_ieee (input_line_pointer, type, words);
1502 input_line_pointer = t;
1504 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1505 for (wordP = words; prec--;)
1507 md_number_to_chars (litP, (long) (*wordP++), sizeof (LITTLENUM_TYPE));
1508 litP += sizeof (LITTLENUM_TYPE);
1513 const char *md_shortopts = "";
1514 struct option md_longopts[] = {
1515 {NULL, no_argument, NULL, 0}
1518 size_t md_longopts_size = sizeof (md_longopts);
1521 md_parse_option (c, arg)
1522 int c ATTRIBUTE_UNUSED;
1523 char *arg ATTRIBUTE_UNUSED;
1529 md_show_usage (stream)
1530 FILE *stream ATTRIBUTE_UNUSED;
1534 void tc_aout_fix_to_chars PARAMS ((void));
1537 tc_aout_fix_to_chars ()
1539 printf (_("call to tc_aout_fix_to_chars \n"));
1544 md_convert_frag (headers, seg, fragP)
1545 #ifdef BFD_ASSEMBLER
1546 bfd *headers ATTRIBUTE_UNUSED;
1548 object_headers *headers ATTRIBUTE_UNUSED;
1550 segT seg ATTRIBUTE_UNUSED;
1551 fragS *fragP ATTRIBUTE_UNUSED;
1553 printf (_("call to md_convert_frag \n"));
1557 #ifdef BFD_ASSEMBLER
1559 md_section_align (segment, size)
1563 int align = bfd_get_section_alignment (stdoutput, segment);
1564 return ((size + (1 << align) - 1) & (-1 << align));
1568 md_section_align (seg, size)
1572 return ((size + (1 << section_alignment[(int) seg]) - 1)
1573 & (-1 << section_alignment[(int) seg]));
1579 md_apply_fix3 (fixP, valP, seg)
1582 segT seg ATTRIBUTE_UNUSED;
1584 char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
1587 switch (fixP->fx_size)
1593 *buf++ = (val >> 8);
1597 *buf++ = (val >> 24);
1598 *buf++ = (val >> 16);
1599 *buf++ = (val >> 8);
1606 if (fixP->fx_addsy == NULL && fixP->fx_pcrel == 0)
1611 md_estimate_size_before_relax (fragP, segment_type)
1612 register fragS *fragP ATTRIBUTE_UNUSED;
1613 register segT segment_type ATTRIBUTE_UNUSED;
1615 printf (_("call tomd_estimate_size_before_relax \n"));
1619 /* Put number into target byte order. */
1621 md_number_to_chars (ptr, use, nbytes)
1626 number_to_chars_bigendian (ptr, use, nbytes);
1630 md_pcrel_from (fixP)
1631 fixS *fixP ATTRIBUTE_UNUSED;
1636 #ifndef BFD_ASSEMBLER
1638 tc_reloc_mangle (fix_ptr, intr, base)
1640 struct internal_reloc *intr;
1644 symbolS *symbol_ptr;
1646 symbol_ptr = fix_ptr->fx_addsy;
1648 /* If this relocation is attached to a symbol then it's ok
1650 if (fix_ptr->fx_r_type == TC_CONS_RELOC)
1652 /* cons likes to create reloc32's whatever the size of the reloc..
1654 switch (fix_ptr->fx_size)
1657 intr->r_type = R_RELLONG;
1660 intr->r_type = R_RELWORD;
1663 intr->r_type = R_RELBYTE;
1671 intr->r_type = fix_ptr->fx_r_type;
1674 intr->r_vaddr = fix_ptr->fx_frag->fr_address + fix_ptr->fx_where + base;
1675 intr->r_offset = fix_ptr->fx_offset;
1679 if (symbol_ptr->sy_number != -1)
1680 intr->r_symndx = symbol_ptr->sy_number;
1685 /* This case arises when a reference is made to `.'. */
1686 segsym = seg_info (S_GET_SEGMENT (symbol_ptr))->dot;
1688 intr->r_symndx = -1;
1691 intr->r_symndx = segsym->sy_number;
1692 intr->r_offset += S_GET_VALUE (symbol_ptr);
1697 intr->r_symndx = -1;
1699 #else /* BFD_ASSEMBLER */
1701 tc_gen_reloc (section, fixp)
1702 asection *section ATTRIBUTE_UNUSED;
1706 bfd_reloc_code_real_type r_type;
1708 if (fixp->fx_addsy && fixp->fx_subsy)
1710 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1711 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1713 as_bad_where (fixp->fx_file, fixp->fx_line,
1714 "Difference of symbols in different sections is not supported");
1719 rel = (arelent *) xmalloc (sizeof (arelent));
1720 rel->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1721 *rel->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1722 rel->address = fixp->fx_frag->fr_address + fixp->fx_where;
1723 rel->addend = fixp->fx_offset;
1725 r_type = fixp->fx_r_type;
1729 fprintf (stderr, "%s\n", bfd_get_reloc_code_name (r_type));
1732 rel->howto = bfd_reloc_type_lookup (stdoutput, r_type);
1733 if (rel->howto == NULL)
1735 as_bad_where (fixp->fx_file, fixp->fx_line,
1736 _("Cannot represent relocation type %s"),
1737 bfd_get_reloc_code_name (r_type));