1 /* tc-d10v.c -- Assembler code for the Mitsubishi D10V
3 Copyright (C) 1996 Free Software Foundation.
5 This file is part of GAS, the GNU Assembler.
7 GAS is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GAS is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GAS; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
26 #include "opcode/d10v.h"
29 const char comment_chars[] = "#;";
30 const char line_comment_chars[] = "#";
31 const char line_separator_chars[] = "";
32 const char *md_shortopts = "";
33 const char EXP_CHARS[] = "eE";
34 const char FLT_CHARS[] = "dD";
38 #define MAX_INSN_FIXUPS (5)
42 bfd_reloc_code_real_type reloc;
45 typedef struct _fixups
48 struct d10v_fixup fix[MAX_INSN_FIXUPS];
52 static Fixups FixUps[2];
53 static Fixups *fixups;
56 static int reg_name_search PARAMS ((char *name));
57 static int register_name PARAMS ((expressionS *expressionP));
58 static int postfix PARAMS ((char *p));
59 static bfd_reloc_code_real_type get_reloc PARAMS ((struct d10v_operand *op));
60 static int get_operands PARAMS ((expressionS exp[]));
61 static unsigned long build_insn PARAMS ((struct d10v_opcode *opcode, expressionS *opers));
62 static void write_long PARAMS ((struct d10v_opcode *opcode, unsigned long insn, Fixups *fx));
63 static void write_1_short PARAMS ((struct d10v_opcode *opcode, unsigned long insn, Fixups *fx));
64 static int write_2_short PARAMS ((struct d10v_opcode *opcode1, unsigned long insn1,
65 struct d10v_opcode *opcode2, unsigned long insn2, int exec_type, Fixups *fx));
66 static unsigned long do_assemble PARAMS ((char *str, struct d10v_opcode **opcode));
67 static unsigned long d10v_insert_operand PARAMS (( unsigned long insn, int op_type,
68 offsetT value, int left));
71 struct option md_longopts[] = {
72 {NULL, no_argument, NULL, 0}
74 size_t md_longopts_size = sizeof(md_longopts);
76 /* The target specific pseudo-ops which we support. */
77 const pseudo_typeS md_pseudo_table[] =
82 /* Opcode hash table. */
83 static struct hash_control *d10v_hash;
85 /* reg_name_search does a binary search of the pre_defined_registers
86 array to see if "name" is a valid regiter name. Returns the register
87 number from the array on success, or -1 on failure. */
90 reg_name_search (name)
93 int middle, low, high;
97 high = reg_name_cnt() - 1;
101 middle = (low + high) / 2;
102 cmp = strcasecmp (name, pre_defined_registers[middle].name);
108 return pre_defined_registers[middle].value;
114 /* register_name() checks the string at input_line_pointer
115 to see if it is a valid register name */
118 register_name (expressionP)
119 expressionS *expressionP;
122 char c, *p = input_line_pointer;
124 while (*p && *p!='\n' && *p!='\r' && *p !=',' && *p!=' ' && *p!=')')
131 /* look to see if it's in the register table */
132 reg_number = reg_name_search (input_line_pointer);
135 expressionP->X_op = O_register;
136 /* temporarily store a pointer to the string here */
137 expressionP->X_op_symbol = (struct symbol *)input_line_pointer;
138 expressionP->X_add_number = reg_number;
139 input_line_pointer = p;
148 md_show_usage (stream)
151 fprintf(stream, "D10V options:\n\
156 md_parse_option (c, arg)
164 md_undefined_symbol (name)
171 md_atof (type, litp, sizep)
180 md_convert_frag (abfd, sec, fragP)
185 printf ("call to md_convert_frag \n");
190 md_section_align (seg, addr)
194 int align = bfd_get_section_alignment (stdoutput, seg);
195 return ((addr + (1 << align) - 1) & (-1 << align));
202 char *prev_name = "";
203 struct d10v_opcode *opcode;
204 d10v_hash = hash_new();
206 /* Insert unique names into hash table. The D10v instruction set
207 has many identical opcode names that have different opcodes based
208 on the operands. This hash table then provides a quick index to
209 the first opcode with a particular name in the opcode table. */
211 for (opcode = (struct d10v_opcode *)d10v_opcodes; opcode->name; opcode++)
213 if (strcmp (prev_name, opcode->name))
215 prev_name = (char *)opcode->name;
216 hash_insert (d10v_hash, opcode->name, (char *) opcode);
221 FixUps[0].next = &FixUps[1];
222 FixUps[1].next = &FixUps[0];
226 /* this function removes the postincrement or postdecrement
227 operator ( '+' or '-' ) from an expression */
229 static int postfix (p)
232 while (*p != '-' && *p != '+')
234 if (*p==0 || *p=='\n' || *p=='\r')
254 static bfd_reloc_code_real_type
256 struct d10v_operand *op;
260 /* printf("get_reloc: bits=%d address=%d\n",bits,op->flags & OPERAND_ADDR); */
264 if (op->flags & OPERAND_ADDR)
267 return (BFD_RELOC_D10V_10_PCREL_R);
269 return (BFD_RELOC_D10V_18_PCREL);
272 return (BFD_RELOC_16);
275 /* get_operands parses a string of operands and returns
276 an array of expressions */
282 char *p = input_line_pointer;
288 while (*p == ' ' || *p == '\t' || *p == ',')
290 if (*p==0 || *p=='\n' || *p=='\r')
296 exp[numops].X_op = O_absent;
300 exp[numops].X_add_number = OPERAND_ATPAR;
305 exp[numops].X_add_number = OPERAND_ATMINUS;
309 exp[numops].X_add_number = OPERAND_ATSIGN;
318 /* just skip the trailing paren */
323 input_line_pointer = p;
326 /* check to see if it might be a register name */
327 if (!register_name (&exp[numops]))
329 /* parse as an expression */
330 expression (&exp[numops]);
333 if (exp[numops].X_op == O_illegal)
334 as_bad ("illegal operand");
335 else if (exp[numops].X_op == O_absent)
336 as_bad ("missing operand");
339 p = input_line_pointer;
344 case -1: /* postdecrement mode */
345 exp[numops].X_op = O_absent;
346 exp[numops++].X_add_number = OPERAND_MINUS;
348 case 1: /* postincrement mode */
349 exp[numops].X_op = O_absent;
350 exp[numops++].X_add_number = OPERAND_PLUS;
354 exp[numops].X_op = 0;
359 d10v_insert_operand (insn, op_type, value, left)
367 shift = d10v_operands[op_type].shift;
371 bits = d10v_operands[op_type].bits;
372 /* truncate to the proper number of bits */
373 /* FIXME: overflow checking here? */
374 value &= 0x7FFFFFFF >> (31 - bits);
375 insn |= (value << shift);
381 /* build_insn takes a pointer to the opcode entry in the opcode table
382 and the array of operand expressions and returns the instruction */
385 build_insn (opcode, opers)
386 struct d10v_opcode *opcode;
389 int i, bits, shift, flags;
392 insn = opcode->opcode;
394 for (i=0;opcode->operands[i];i++)
396 flags = d10v_operands[opcode->operands[i]].flags;
397 bits = d10v_operands[opcode->operands[i]].bits;
398 shift = d10v_operands[opcode->operands[i]].shift;
399 number = opers[i].X_add_number;
401 if (flags & OPERAND_REG)
403 number &= REGISTER_MASK;
404 if (opcode->format == LONG_L)
408 if (opers[i].X_op != O_register && opers[i].X_op != O_constant)
410 /* now create a fixup */
413 printf("need a fixup: ");
414 print_expr_1(stdout,&opers[i]);
418 if (fixups->fc >= MAX_INSN_FIXUPS)
419 as_fatal ("too many fixups");
420 fixups->fix[fixups->fc].exp = opers[i];
422 /* put the operand number here for now. We can look up
423 the reloc type and/or fixup the instruction in md_apply_fix() */
424 fixups->fix[fixups->fc].reloc = opcode->operands[i];
428 /* truncate to the proper number of bits */
429 /* FIXME: overflow checking here? */
430 number &= 0x7FFFFFFF >> (31 - bits);
431 insn = insn | (number << shift);
436 /* write out a long form instruction */
438 write_long (opcode, insn, fx)
439 struct d10v_opcode *opcode;
444 char *f = frag_more(4);
447 /* printf("INSN: %08x\n",insn); */
448 number_to_chars_bigendian (f, insn, 4);
450 for (i=0; i < fx->fc; i++)
452 if (get_reloc((struct d10v_operand *)&d10v_operands[fx->fix[i].reloc]))
455 printf("fix_new_exp: where:%x size:4\n ",f - frag_now->fr_literal);
456 print_expr_1(stdout,&(fx->fix[i].exp));
460 fix_new_exp (frag_now,
461 f - frag_now->fr_literal,
472 /* write out a short form instruction by itself */
474 write_1_short (opcode, insn, fx)
475 struct d10v_opcode *opcode;
479 char *f = frag_more(4);
482 insn |= FM00 | (NOP << 15);
483 /* printf("INSN: %08x\n",insn); */
484 number_to_chars_bigendian (f, insn, 4);
485 for (i=0; i < fx->fc; i++)
487 if (get_reloc((struct d10v_operand *)&d10v_operands[fx->fix[i].reloc]))
490 printf("fix_new_exp: where:%x size:4\n ",f - frag_now->fr_literal);
491 print_expr_1(stdout,&(fx->fix[i].exp));
495 fix_new_exp (frag_now,
496 f - frag_now->fr_literal,
506 /* write out a short form instruction if possible */
507 /* return number of instructions not written out */
509 write_2_short (opcode1, insn1, opcode2, insn2, exec_type, fx)
510 struct d10v_opcode *opcode1, *opcode2;
511 unsigned long insn1, insn2;
519 if(opcode1->exec_type == BRANCH_LINK)
521 /* subroutines must be called from 32-bit boundaries */
522 /* so the return address will be correct */
523 write_1_short (opcode1, insn1, fx->next);
530 if (opcode1->unit == IU)
532 /* reverse sequential */
533 insn = FM10 | (insn2 << 15) | insn1;
537 insn = FM01 | (insn1 << 15) | insn2;
541 case 1: /* parallel */
542 insn = FM00 | (insn1 << 15) | insn2;
545 case 2: /* sequential */
546 insn = FM01 | (insn1 << 15) | insn2;
549 case 3: /* reverse sequential */
550 insn = FM10 | (insn1 << 15) | insn2;
553 as_fatal("unknown execution type passed to write_2_short()");
556 /* printf("INSN: %08x\n",insn); */
558 number_to_chars_bigendian (f, insn, 4);
562 bfd_reloc_code_real_type reloc;
563 for (i=0; i < fx->fc; i++)
565 reloc = get_reloc((struct d10v_operand *)&d10v_operands[fx->fix[i].reloc]);
568 if ( (reloc == BFD_RELOC_D10V_10_PCREL_R) && (j == 0) )
569 fx->fix[i].reloc |= 1024;
572 printf("fix_new_exp: where:%x reloc:%d\n ",f - frag_now->fr_literal,fx->fix[i].reloc);
573 print_expr_1(stdout,&(fx->fix[i].exp));
576 fix_new_exp (frag_now,
577 f - frag_now->fr_literal,
592 /* This is the main entry point for the machine-dependent assembler. str points to a
593 machine-dependent instruction. This function is supposed to emit the frags/bytes
594 it assembles to. For the D10V, it mostly handles the special VLIW parsing and packing
595 and leaves the difficult stuff to do_assemble().
598 static unsigned long prev_insn;
599 static struct d10v_opcode *prev_opcode = 0;
600 static subsegT prev_subseg;
601 static segT prev_seg;
607 struct d10v_opcode *opcode;
612 /* printf("md_assemble: str=%s\n",str); */
614 /* look for the special multiple instruction seperators */
615 str2 = strstr (str, "||");
620 str2 = strstr (str, "->");
625 str2 = strstr (str, "<-");
632 /* str2 points to the seperator, if one */
637 /* if two instructions are present and we already have one saved
638 then first write it out */
640 write_1_short (prev_opcode, prev_insn, fixups->next);
642 /* assemble first instruction and save it */
643 prev_insn = do_assemble (str, &prev_opcode);
644 fixups = fixups->next;
648 insn = do_assemble (str, &opcode);
650 /* if this is a long instruction, write it and any previous short instruction */
651 if (opcode->format & LONG_OPCODE)
654 as_fatal("Unable to mix instructions as specified");
657 write_1_short (prev_opcode, prev_insn, fixups->next);
660 write_long (opcode, insn, fixups);
665 if (prev_opcode && (write_2_short (prev_opcode, prev_insn, opcode, insn, t, fixups) == 0))
667 /* no instructions saved */
673 as_fatal("Unable to mix instructions as specified");
674 /* save off last instruction so it may be packed on next pass */
675 prev_opcode = opcode;
678 prev_subseg = now_subseg;
679 fixups = fixups->next;
685 do_assemble (str, opcode)
687 struct d10v_opcode **opcode;
689 struct d10v_opcode *next_opcode;
690 unsigned char *op_start, *save;
691 unsigned char *op_end;
693 int nlen = 0, i, match, numops;
694 expressionS myops[6];
697 /* printf("do_assemble: str=%s\n",str); */
699 /* Drop leading whitespace */
703 /* find the opcode end */
704 for (op_start = op_end = (unsigned char *) (str);
707 && !is_end_of_line[*op_end] && *op_end != ' ';
710 name[nlen] = op_start[nlen];
716 as_bad ("can't find opcode ");
718 /* find the first opcode with the proper name */
719 *opcode = (struct d10v_opcode *)hash_find (d10v_hash, name);
722 as_bad ("unknown opcode");
726 save = input_line_pointer;
727 input_line_pointer = op_end;
729 /* get all the operands and save them as expressions */
730 numops = get_operands (myops);
732 /* now search the opcode table table for one with operands */
733 /* that match what we've got */
737 for (i = 0; (*opcode)->operands[i]; i++)
739 int flags = d10v_operands[(*opcode)->operands[i]].flags;
741 if (myops[i].X_op==0)
747 if (flags & OPERAND_REG)
749 if ((myops[i].X_op != O_register) ||
750 ((flags & OPERAND_ACC) != (myops[i].X_add_number & OPERAND_ACC)) ||
751 ((flags & OPERAND_FLAG) != (myops[i].X_add_number & OPERAND_FLAG)) ||
752 ((flags & OPERAND_CONTROL) != (myops[i].X_add_number & OPERAND_CONTROL)))
759 if (((flags & OPERAND_MINUS) && ((myops[i].X_op != O_absent) || (myops[i].X_add_number != OPERAND_MINUS))) ||
760 ((flags & OPERAND_PLUS) && ((myops[i].X_op != O_absent) || (myops[i].X_add_number != OPERAND_PLUS))) ||
761 ((flags & OPERAND_ATMINUS) && ((myops[i].X_op != O_absent) || (myops[i].X_add_number != OPERAND_ATMINUS))) ||
762 ((flags & OPERAND_ATPAR) && ((myops[i].X_op != O_absent) || (myops[i].X_add_number != OPERAND_ATPAR))) ||
763 ((flags & OPERAND_ATSIGN) && ((myops[i].X_op != O_absent) || (myops[i].X_add_number != OPERAND_ATSIGN))))
770 /* we're only done if the operands matched AND there
771 are no more to check */
772 if (match && myops[i].X_op==0)
775 next_opcode = (*opcode)+1;
776 if (next_opcode->opcode == 0)
778 if (strcmp(next_opcode->name, (*opcode)->name))
780 (*opcode) = next_opcode;
785 as_bad ("bad opcode or operands");
789 /* Check that all registers that are required to be even are. */
790 /* Also, if any operands were marked as registers, but were really symbols */
792 for (i=0; (*opcode)->operands[i]; i++)
794 if ((d10v_operands[(*opcode)->operands[i]].flags & OPERAND_EVEN) &&
795 (myops[i].X_add_number & 1))
796 as_fatal("Register number must be EVEN");
797 if (myops[i].X_op == O_register)
799 if (!(d10v_operands[(*opcode)->operands[i]].flags & OPERAND_REG))
801 myops[i].X_op = O_symbol;
802 myops[i].X_add_symbol = symbol_find_or_make ((char *)myops[i].X_op_symbol);
803 myops[i].X_add_number = 0;
804 myops[i].X_op_symbol = NULL;
805 /* FIXME create a fixup */
810 input_line_pointer = save;
812 /* at this point, we have "opcode" pointing to the opcode entry in the
813 d10v opcode table, with myops filled out with the operands. */
814 insn = build_insn ((*opcode), myops);
815 /* printf("sub-insn = %lx\n",insn); */
821 /* if while processing a fixup, a reloc really needs to be created */
822 /* then it is done here */
825 tc_gen_reloc (seg, fixp)
830 reloc = (arelent *) bfd_alloc_by_size_t (stdoutput, sizeof (arelent));
831 reloc->sym_ptr_ptr = &fixp->fx_addsy->bsym;
832 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
833 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
834 if (reloc->howto == (reloc_howto_type *) NULL)
836 as_bad_where (fixp->fx_file, fixp->fx_line,
837 "reloc %d not supported by object file format", (int)fixp->fx_r_type);
840 reloc->addend = fixp->fx_addnumber;
841 /* printf("tc_gen_reloc: addr=%x addend=%x\n", reloc->address, reloc->addend); */
846 md_estimate_size_before_relax (fragp, seg)
855 md_pcrel_from_section (fixp, sec)
860 /* return fixp->fx_frag->fr_address + fixp->fx_where; */
864 md_apply_fix3 (fixp, valuep, seg)
875 if (fixp->fx_addsy == (symbolS *) NULL)
880 else if (fixp->fx_pcrel)
884 value = fixp->fx_offset;
885 if (fixp->fx_subsy != (symbolS *) NULL)
887 if (S_GET_SEGMENT (fixp->fx_subsy) == absolute_section)
888 value -= S_GET_VALUE (fixp->fx_subsy);
891 /* We don't actually support subtracting a symbol. */
892 as_bad_where (fixp->fx_file, fixp->fx_line,
893 "expression too complex");
898 /* printf("md_apply_fix: value=0x%x type=%d\n", value, fixp->fx_r_type); */
900 op_type = fixp->fx_r_type;
904 fixp->fx_r_type = BFD_RELOC_D10V_10_PCREL_L;
908 fixp->fx_r_type = get_reloc((struct d10v_operand *)&d10v_operands[op_type]);
910 /* Fetch the instruction, insert the fully resolved operand
911 value, and stuff the instruction back again. */
912 where = fixp->fx_frag->fr_literal + fixp->fx_where;
913 insn = bfd_getb32 ((unsigned char *) where);
914 /* printf(" insn=%x value=%x\n",insn,value); */
916 insn = d10v_insert_operand (insn, op_type, (offsetT) value, left);
918 /* printf(" new insn=%x\n",insn); */
920 bfd_putb32 ((bfd_vma) insn, (unsigned char *) where);
925 fixp->fx_addnumber = value;
930 /* d10v_cleanup() is called after the assembler has finished parsing the input
931 file or after a label is defined. Because the D10V assembler sometimes saves short
932 instructions to see if it can package them with the next instruction, there may
933 be a short instruction that still needs written. */
944 subseg_set (prev_seg, prev_subseg);
945 write_1_short (prev_opcode, prev_insn, fixups);
946 subseg_set (seg, subseg);