1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009,
4 2010 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
33 int insn_size; /* In words. */
35 unsigned int bin_opcode;
38 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
39 {#NAME, CONSTR, OPCODE, SIZE, ISA, BIN},
41 struct avr_opcodes_s avr_opcodes[] =
43 #include "opcode/avr.h"
44 {NULL, NULL, NULL, 0, 0, 0}
47 const char comment_chars[] = ";";
48 const char line_comment_chars[] = "#";
49 const char line_separator_chars[] = "$";
51 const char *md_shortopts = "m:";
59 /* XXX - devices that don't seem to exist (renamed, replaced with larger
60 ones, or planned but never produced), left here for compatibility. */
62 static struct mcu_type_s mcu_types[] =
64 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
65 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
66 but set to AVR_ISA_AVR25 for some following version
67 of GCC (from 4.3) for backward compatibility. */
68 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
69 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
70 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
71 but set to AVR_ISA_AVR3_ALL for some following version
72 of GCC (from 4.3) for backward compatibility. */
73 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
74 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
75 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
76 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
77 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
78 but set to AVR_ISA_AVR51 for some following version
79 of GCC (from 4.3) for backward compatibility. */
80 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
81 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
82 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
83 {"avrxmega1", AVR_ISA_XMEGA, bfd_mach_avrxmega1},
84 {"avrxmega2", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
85 {"avrxmega3", AVR_ISA_XMEGA, bfd_mach_avrxmega3},
86 {"avrxmega4", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
87 {"avrxmega5", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
88 {"avrxmega6", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
89 {"avrxmega7", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
90 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
91 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
92 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
93 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
94 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
95 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
96 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
98 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
100 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
101 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
102 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
103 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
104 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
105 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
106 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
107 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
116 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"attiny84a", AVR_ISA_AVR25, bfd_mach_avr25},
118 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
119 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
120 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
121 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
122 {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
123 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
124 {"attiny461a", AVR_ISA_AVR25, bfd_mach_avr25},
125 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
126 {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
127 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
128 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
129 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
130 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
131 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
132 {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25},
133 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
134 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
135 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
136 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
137 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
138 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
139 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
140 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
141 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
142 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
143 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
144 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
145 {"atmega48a", AVR_ISA_AVR4, bfd_mach_avr4},
146 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
147 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
148 {"atmega88a", AVR_ISA_AVR4, bfd_mach_avr4},
149 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
150 {"atmega88pa", AVR_ISA_AVR4, bfd_mach_avr4},
151 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
152 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
153 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
154 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
155 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
156 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
157 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
158 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
159 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
160 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega16a", AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
163 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
165 {"atmega164a", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
168 {"atmega165a", AVR_ISA_AVR5, bfd_mach_avr5},
169 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
170 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"atmega168a", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega169a", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
176 {"atmega169pa",AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
178 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega324a", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega324pa",AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega325a", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega3250a",AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega328", AVR_ISA_AVR5, bfd_mach_avr5},
189 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
191 {"atmega329a", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
193 {"atmega329pa",AVR_ISA_AVR5, bfd_mach_avr5},
194 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
195 {"atmega3290a",AVR_ISA_AVR5, bfd_mach_avr5},
196 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
197 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
198 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
199 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
200 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
201 {"atmega644a", AVR_ISA_AVR5, bfd_mach_avr5},
202 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
203 {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
204 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
205 {"atmega645a", AVR_ISA_AVR5, bfd_mach_avr5},
206 {"atmega645p", AVR_ISA_AVR5, bfd_mach_avr5},
207 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
208 {"atmega649a", AVR_ISA_AVR5, bfd_mach_avr5},
209 {"atmega649p", AVR_ISA_AVR5, bfd_mach_avr5},
210 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
211 {"atmega6450a",AVR_ISA_AVR5, bfd_mach_avr5},
212 {"atmega6450p",AVR_ISA_AVR5, bfd_mach_avr5},
213 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
214 {"atmega6490a",AVR_ISA_AVR5, bfd_mach_avr5},
215 {"atmega6490p",AVR_ISA_AVR5, bfd_mach_avr5},
216 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
217 {"atmega16hva2",AVR_ISA_AVR5, bfd_mach_avr5},
218 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
219 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
220 {"atmega64hve",AVR_ISA_AVR5, bfd_mach_avr5},
221 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
222 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
223 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
224 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
225 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
226 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
227 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
228 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
229 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
230 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
231 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
232 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
233 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
234 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
235 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
236 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
237 {"m3000", AVR_ISA_AVR5, bfd_mach_avr5},
238 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
239 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
240 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
241 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
242 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
243 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
244 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
245 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
246 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
247 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
248 {"atxmega16a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
249 {"atxmega16d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
250 {"atxmega16x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
251 {"atxmega32a4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
252 {"atxmega32d4", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
253 {"atxmega32x1", AVR_ISA_XMEGA, bfd_mach_avrxmega2},
254 {"atxmega64a3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
255 {"atxmega64d3", AVR_ISA_XMEGA, bfd_mach_avrxmega4},
256 {"atxmega64a1", AVR_ISA_XMEGA, bfd_mach_avrxmega5},
257 {"atxmega64a1u",AVR_ISA_XMEGA, bfd_mach_avrxmega5},
258 {"atxmega128a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
259 {"atxmega128b1", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
260 {"atxmega128d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
261 {"atxmega192a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
262 {"atxmega192d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
263 {"atxmega256a3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
264 {"atxmega256a3b",AVR_ISA_XMEGA, bfd_mach_avrxmega6},
265 {"atxmega256a3bu",AVR_ISA_XMEGA,bfd_mach_avrxmega6},
266 {"atxmega256d3", AVR_ISA_XMEGA, bfd_mach_avrxmega6},
267 {"atxmega128a1", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
268 {"atxmega128a1u", AVR_ISA_XMEGA, bfd_mach_avrxmega7},
272 /* Current MCU type. */
273 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
274 static struct mcu_type_s * avr_mcu = & default_mcu;
276 /* AVR target-specific switches. */
279 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
280 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
281 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
284 static struct avr_opt_s avr_opt = { 0, 0, 0 };
286 const char EXP_CHARS[] = "eE";
287 const char FLT_CHARS[] = "dD";
289 static void avr_set_arch (int);
291 /* The target specific pseudo-ops which we support. */
292 const pseudo_typeS md_pseudo_table[] =
294 {"arch", avr_set_arch, 0},
298 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
300 #define EXP_MOD_NAME(i) exp_mod[i].name
301 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
302 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
303 #define HAVE_PM_P(i) exp_mod[i].have_pm
308 bfd_reloc_code_real_type reloc;
309 bfd_reloc_code_real_type neg_reloc;
313 static struct exp_mod_s exp_mod[] =
315 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
316 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
317 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
318 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
319 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
320 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
321 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
322 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
325 /* A union used to store indicies into the exp_mod[] array
326 in a hash table which expects void * data types. */
333 /* Opcode hash table. */
334 static struct hash_control *avr_hash;
336 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
337 static struct hash_control *avr_mod_hash;
339 #define OPTION_MMCU 'm'
342 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
347 struct option md_longopts[] =
349 { "mmcu", required_argument, NULL, OPTION_MMCU },
350 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
351 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
352 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
353 { NULL, no_argument, NULL, 0 }
356 size_t md_longopts_size = sizeof (md_longopts);
358 /* Display nicely formatted list of known MCU names. */
361 show_mcu_list (FILE *stream)
365 fprintf (stream, _("Known MCU names:"));
368 for (i = 0; mcu_types[i].name; i++)
370 int len = strlen (mcu_types[i].name);
375 fprintf (stream, " %s", mcu_types[i].name);
378 fprintf (stream, "\n %s", mcu_types[i].name);
383 fprintf (stream, "\n");
389 while (*s == ' ' || *s == '\t')
394 /* Extract one word from FROM and copy it to TO. */
397 extract_word (char *from, char *to, int limit)
402 /* Drop leading whitespace. */
403 from = skip_space (from);
406 /* Find the op code end. */
407 for (op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
409 to[size++] = *op_end++;
410 if (size + 1 >= limit)
419 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
420 asection *seg ATTRIBUTE_UNUSED)
427 md_show_usage (FILE *stream)
430 _("AVR Assembler options:\n"
431 " -mmcu=[avr-name] select microcontroller variant\n"
432 " [avr-name] can be:\n"
433 " avr1 - classic AVR core without data RAM\n"
434 " avr2 - classic AVR core with up to 8K program memory\n"
435 " avr25 - classic AVR core with up to 8K program memory\n"
436 " plus the MOVW instruction\n"
437 " avr3 - classic AVR core with up to 64K program memory\n"
438 " avr31 - classic AVR core with up to 128K program memory\n"
439 " avr35 - classic AVR core with up to 64K program memory\n"
440 " plus the MOVW instruction\n"
441 " avr4 - enhanced AVR core with up to 8K program memory\n"
442 " avr5 - enhanced AVR core with up to 64K program memory\n"
443 " avr51 - enhanced AVR core with up to 128K program memory\n"
444 " avr6 - enhanced AVR core with up to 256K program memory\n"
445 " avrxmega3 - XMEGA, > 8K, <= 64K FLASH, > 64K RAM\n"
446 " avrxmega4 - XMEGA, > 64K, <= 128K FLASH, <= 64K RAM\n"
447 " avrxmega5 - XMEGA, > 64K, <= 128K FLASH, > 64K RAM\n"
448 " avrxmega6 - XMEGA, > 128K, <= 256K FLASH, <= 64K RAM\n"
449 " avrxmega7 - XMEGA, > 128K, <= 256K FLASH, > 64K RAM\n"
450 " or immediate microcontroller name.\n"));
452 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
453 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
454 " (default for avr4, avr5)\n"
455 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
456 " (default for avr3, avr5)\n"));
457 show_mcu_list (stream);
461 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
465 input_line_pointer = extract_word (input_line_pointer, str, 20);
466 md_parse_option (OPTION_MMCU, str);
467 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
471 md_parse_option (int c, char *arg)
478 char *s = alloca (strlen (arg) + 1);
485 *t = TOLOWER (*arg1++);
489 for (i = 0; mcu_types[i].name; ++i)
490 if (strcmp (mcu_types[i].name, s) == 0)
493 if (!mcu_types[i].name)
495 show_mcu_list (stderr);
496 as_fatal (_("unknown MCU: %s\n"), arg);
499 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
500 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
501 as .arch ... in the asm output at the same time. */
502 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
503 avr_mcu = &mcu_types[i];
505 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
506 avr_mcu->name, mcu_types[i].name);
509 case OPTION_ALL_OPCODES:
510 avr_opt.all_opcodes = 1;
512 case OPTION_NO_SKIP_BUG:
513 avr_opt.no_skip_bug = 1;
524 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
530 md_atof (int type, char *litP, int *sizeP)
532 return ieee_md_atof (type, litP, sizeP, FALSE);
536 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
537 asection *sec ATTRIBUTE_UNUSED,
538 fragS *fragP ATTRIBUTE_UNUSED)
547 struct avr_opcodes_s *opcode;
549 avr_hash = hash_new ();
551 /* Insert unique names into hash table. This hash table then provides a
552 quick index to the first opcode with a particular name in the opcode
554 for (opcode = avr_opcodes; opcode->name; opcode++)
555 hash_insert (avr_hash, opcode->name, (char *) opcode);
557 avr_mod_hash = hash_new ();
559 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
564 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
567 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
570 /* Resolve STR as a constant expression and return the result.
571 If result greater than MAX then error. */
574 avr_get_constant (char *str, int max)
578 str = skip_space (str);
579 input_line_pointer = str;
582 if (ex.X_op != O_constant)
583 as_bad (_("constant value required"));
585 if (ex.X_add_number > max || ex.X_add_number < 0)
586 as_bad (_("number must be positive and less than %d"), max + 1);
588 return ex.X_add_number;
591 /* Parse for ldd/std offset. */
594 avr_offset_expression (expressionS *exp)
596 char *str = input_line_pointer;
601 str = extract_word (str, op, sizeof (op));
603 input_line_pointer = tmp;
606 /* Warn about expressions that fail to use lo8 (). */
607 if (exp->X_op == O_constant)
609 int x = exp->X_add_number;
611 if (x < -255 || x > 255)
612 as_warn (_("constant out of 8-bit range: %d"), x);
616 /* Parse ordinary expression. */
619 parse_exp (char *s, expressionS *op)
621 input_line_pointer = s;
623 if (op->X_op == O_absent)
624 as_bad (_("missing operand"));
625 return input_line_pointer;
628 /* Parse special expressions (needed for LDI command):
633 where xx is: hh, hi, lo. */
635 static bfd_reloc_code_real_type
636 avr_ldi_expression (expressionS *exp)
638 char *str = input_line_pointer;
642 int linker_stubs_should_be_generated = 0;
646 str = extract_word (str, op, sizeof (op));
652 m.ptr = hash_find (avr_mod_hash, op);
660 str = skip_space (str);
664 bfd_reloc_code_real_type reloc_to_return;
669 if (strncmp ("pm(", str, 3) == 0
670 || strncmp ("gs(",str,3) == 0
671 || strncmp ("-(gs(",str,5) == 0
672 || strncmp ("-(pm(", str, 5) == 0)
680 as_bad (_("illegal expression"));
682 if (str[0] == 'g' || str[2] == 'g')
683 linker_stubs_should_be_generated = 1;
695 if (*str == '-' && *(str + 1) == '(')
702 input_line_pointer = str;
707 if (*input_line_pointer != ')')
709 as_bad (_("`)' required"));
712 input_line_pointer++;
717 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
718 if (linker_stubs_should_be_generated)
720 switch (reloc_to_return)
722 case BFD_RELOC_AVR_LO8_LDI_PM:
723 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
725 case BFD_RELOC_AVR_HI8_LDI_PM:
726 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
730 /* PR 5523: Do not generate a warning here,
731 legitimate code can trigger this case. */
735 return reloc_to_return;
740 input_line_pointer = tmp;
743 /* Warn about expressions that fail to use lo8 (). */
744 if (exp->X_op == O_constant)
746 int x = exp->X_add_number;
748 if (x < -255 || x > 255)
749 as_warn (_("constant out of 8-bit range: %d"), x);
752 return BFD_RELOC_AVR_LDI;
755 /* Parse one instruction operand.
756 Return operand bitmask. Also fixups can be generated. */
759 avr_operand (struct avr_opcodes_s *opcode,
765 unsigned int op_mask = 0;
766 char *str = skip_space (*line);
770 /* Any register operand. */
776 if (*str == 'r' || *str == 'R')
780 str = extract_word (str, r_name, sizeof (r_name));
782 if (ISDIGIT (r_name[1]))
784 if (r_name[2] == '\0')
785 op_mask = r_name[1] - '0';
786 else if (r_name[1] != '0'
787 && ISDIGIT (r_name[2])
788 && r_name[3] == '\0')
789 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
794 op_mask = avr_get_constant (str, 31);
795 str = input_line_pointer;
803 if (op_mask < 16 || op_mask > 23)
804 as_bad (_("register r16-r23 required"));
810 as_bad (_("register number above 15 required"));
816 as_bad (_("even register number required"));
821 if ((op_mask & 1) || op_mask < 24)
822 as_bad (_("register r24, r26, r28 or r30 required"));
823 op_mask = (op_mask - 24) >> 1;
828 as_bad (_("register name or number from 0 to 31 required"));
837 str = skip_space (str + 1);
846 as_bad (_("pointer register (X, Y or Z) required"));
848 str = skip_space (str + 1);
853 as_bad (_("cannot both predecrement and postincrement"));
857 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
858 registers, no predecrement, no postincrement. */
859 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
860 && !(avr_mcu->isa & AVR_ISA_SRAM))
861 as_bad (_("addressing mode not supported"));
867 as_bad (_("can't predecrement"));
869 if (! (*str == 'z' || *str == 'Z'))
870 as_bad (_("pointer register Z required"));
872 str = skip_space (str + 1);
878 for (s = opcode->opcode; *s; ++s)
881 op_mask |= (1 << (15 - (s - opcode->opcode)));
885 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
886 if (!avr_opt.all_opcodes
887 && (op_mask & 0x0001)
888 && !(avr_mcu->isa & AVR_ISA_MOVW))
889 as_bad (_("postincrement not supported"));
894 char c = TOLOWER (*str++);
899 as_bad (_("pointer register (Y or Z) required"));
900 str = skip_space (str);
903 input_line_pointer = str;
904 avr_offset_expression (& op_expr);
905 str = input_line_pointer;
906 fix_new_exp (frag_now, where, 3,
907 &op_expr, FALSE, BFD_RELOC_AVR_6);
913 str = parse_exp (str, &op_expr);
914 fix_new_exp (frag_now, where, opcode->insn_size * 2,
915 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
919 str = parse_exp (str, &op_expr);
920 fix_new_exp (frag_now, where, opcode->insn_size * 2,
921 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
925 str = parse_exp (str, &op_expr);
926 fix_new_exp (frag_now, where, opcode->insn_size * 2,
927 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
931 str = parse_exp (str, &op_expr);
932 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
933 &op_expr, FALSE, BFD_RELOC_16);
938 bfd_reloc_code_real_type r_type;
940 input_line_pointer = str;
941 r_type = avr_ldi_expression (&op_expr);
942 str = input_line_pointer;
943 fix_new_exp (frag_now, where, 3,
944 &op_expr, FALSE, r_type);
952 x = ~avr_get_constant (str, 255);
953 str = input_line_pointer;
954 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
959 input_line_pointer = str;
960 avr_offset_expression (& op_expr);
961 str = input_line_pointer;
962 fix_new_exp (frag_now, where, 3,
963 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
971 x = avr_get_constant (str, 7);
972 str = input_line_pointer;
983 x = avr_get_constant (str, 63);
984 str = input_line_pointer;
985 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
993 x = avr_get_constant (str, 31);
994 str = input_line_pointer;
1003 x = avr_get_constant (str, 15);
1004 str = input_line_pointer;
1005 op_mask |= (x << 4);
1013 as_bad (_("unknown constraint `%c'"), *op);
1020 /* Parse instruction operands.
1021 Return binary opcode. */
1024 avr_operands (struct avr_opcodes_s *opcode, char **line)
1026 char *op = opcode->constraints;
1027 unsigned int bin = opcode->bin_opcode;
1028 char *frag = frag_more (opcode->insn_size * 2);
1030 int where = frag - frag_now->fr_literal;
1031 static unsigned int prev = 0; /* Previous opcode. */
1033 /* Opcode have operands. */
1036 unsigned int reg1 = 0;
1037 unsigned int reg2 = 0;
1038 int reg1_present = 0;
1039 int reg2_present = 0;
1041 /* Parse first operand. */
1042 if (REGISTER_P (*op))
1044 reg1 = avr_operand (opcode, where, op, &str);
1047 /* Parse second operand. */
1060 if (REGISTER_P (*op))
1063 str = skip_space (str);
1065 as_bad (_("`,' required"));
1066 str = skip_space (str);
1068 reg2 = avr_operand (opcode, where, op, &str);
1071 if (reg1_present && reg2_present)
1072 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1073 else if (reg2_present)
1081 /* Detect undefined combinations (like ld r31,Z+). */
1082 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1083 as_warn (_("undefined combination of operands"));
1085 if (opcode->insn_size == 2)
1087 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1088 (AVR core bug, fixed in the newer devices). */
1089 if (!(avr_opt.no_skip_bug ||
1090 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1091 && AVR_SKIP_P (prev))
1092 as_warn (_("skipping two-word instruction"));
1094 bfd_putl32 ((bfd_vma) bin, frag);
1097 bfd_putl16 ((bfd_vma) bin, frag);
1104 /* GAS will call this function for each section at the end of the assembly,
1105 to permit the CPU backend to adjust the alignment of a section. */
1108 md_section_align (asection *seg, valueT addr)
1110 int align = bfd_get_section_alignment (stdoutput, seg);
1111 return ((addr + (1 << align) - 1) & (-1 << align));
1114 /* If you define this macro, it should return the offset between the
1115 address of a PC relative fixup and the position from which the PC
1116 relative adjustment should be made. On many processors, the base
1117 of a PC relative instruction is the next instruction, so this
1118 macro would return the length of an instruction. */
1121 md_pcrel_from_section (fixS *fixp, segT sec)
1123 if (fixp->fx_addsy != (symbolS *) NULL
1124 && (!S_IS_DEFINED (fixp->fx_addsy)
1125 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1128 return fixp->fx_frag->fr_address + fixp->fx_where;
1131 /* GAS will call this for each fixup. It should store the correct
1132 value in the object file. */
1135 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1137 unsigned char *where;
1141 if (fixP->fx_addsy == (symbolS *) NULL)
1144 else if (fixP->fx_pcrel)
1146 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1148 if (s == seg || s == absolute_section)
1150 value += S_GET_VALUE (fixP->fx_addsy);
1155 /* We don't actually support subtracting a symbol. */
1156 if (fixP->fx_subsy != (symbolS *) NULL)
1157 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1159 switch (fixP->fx_r_type)
1162 fixP->fx_no_overflow = 1;
1164 case BFD_RELOC_AVR_7_PCREL:
1165 case BFD_RELOC_AVR_13_PCREL:
1168 case BFD_RELOC_AVR_CALL:
1174 /* Fetch the instruction, insert the fully resolved operand
1175 value, and stuff the instruction back again. */
1176 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1177 insn = bfd_getl16 (where);
1179 switch (fixP->fx_r_type)
1181 case BFD_RELOC_AVR_7_PCREL:
1183 as_bad_where (fixP->fx_file, fixP->fx_line,
1184 _("odd address operand: %ld"), value);
1186 /* Instruction addresses are always right-shifted by 1. */
1188 --value; /* Correct PC. */
1190 if (value < -64 || value > 63)
1191 as_bad_where (fixP->fx_file, fixP->fx_line,
1192 _("operand out of range: %ld"), value);
1193 value = (value << 3) & 0x3f8;
1194 bfd_putl16 ((bfd_vma) (value | insn), where);
1197 case BFD_RELOC_AVR_13_PCREL:
1199 as_bad_where (fixP->fx_file, fixP->fx_line,
1200 _("odd address operand: %ld"), value);
1202 /* Instruction addresses are always right-shifted by 1. */
1204 --value; /* Correct PC. */
1206 if (value < -2048 || value > 2047)
1208 /* No wrap for devices with >8K of program memory. */
1209 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1210 as_bad_where (fixP->fx_file, fixP->fx_line,
1211 _("operand out of range: %ld"), value);
1215 bfd_putl16 ((bfd_vma) (value | insn), where);
1219 bfd_putl16 ((bfd_vma) value, where);
1223 bfd_putl16 ((bfd_vma) value, where);
1227 if (value > 255 || value < -128)
1228 as_warn_where (fixP->fx_file, fixP->fx_line,
1229 _("operand out of range: %ld"), value);
1233 case BFD_RELOC_AVR_16_PM:
1234 bfd_putl16 ((bfd_vma) (value >> 1), where);
1237 case BFD_RELOC_AVR_LDI:
1239 as_bad_where (fixP->fx_file, fixP->fx_line,
1240 _("operand out of range: %ld"), value);
1241 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1244 case BFD_RELOC_AVR_6:
1245 if ((value > 63) || (value < 0))
1246 as_bad_where (fixP->fx_file, fixP->fx_line,
1247 _("operand out of range: %ld"), value);
1248 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1251 case BFD_RELOC_AVR_6_ADIW:
1252 if ((value > 63) || (value < 0))
1253 as_bad_where (fixP->fx_file, fixP->fx_line,
1254 _("operand out of range: %ld"), value);
1255 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1258 case BFD_RELOC_AVR_LO8_LDI:
1259 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1262 case BFD_RELOC_AVR_HI8_LDI:
1263 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1266 case BFD_RELOC_AVR_MS8_LDI:
1267 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1270 case BFD_RELOC_AVR_HH8_LDI:
1271 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1274 case BFD_RELOC_AVR_LO8_LDI_NEG:
1275 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1278 case BFD_RELOC_AVR_HI8_LDI_NEG:
1279 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1282 case BFD_RELOC_AVR_MS8_LDI_NEG:
1283 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1286 case BFD_RELOC_AVR_HH8_LDI_NEG:
1287 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1290 case BFD_RELOC_AVR_LO8_LDI_PM:
1291 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1294 case BFD_RELOC_AVR_HI8_LDI_PM:
1295 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1298 case BFD_RELOC_AVR_HH8_LDI_PM:
1299 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1302 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1303 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1306 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1307 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1310 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1311 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1314 case BFD_RELOC_AVR_CALL:
1318 x = bfd_getl16 (where);
1320 as_bad_where (fixP->fx_file, fixP->fx_line,
1321 _("odd address operand: %ld"), value);
1323 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1324 bfd_putl16 ((bfd_vma) x, where);
1325 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1330 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1331 fixP->fx_line, fixP->fx_r_type);
1337 switch ((int) fixP->fx_r_type)
1339 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1340 case -BFD_RELOC_AVR_HI8_LDI:
1341 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1342 case -BFD_RELOC_AVR_LO8_LDI:
1343 as_bad_where (fixP->fx_file, fixP->fx_line,
1344 _("only constant expression allowed"));
1353 /* GAS will call this to generate a reloc, passing the resulting reloc
1354 to `bfd_install_relocation'. This currently works poorly, as
1355 `bfd_install_relocation' often does the wrong thing, and instances of
1356 `tc_gen_reloc' have been written to work around the problems, which
1357 in turns makes it difficult to fix `bfd_install_relocation'. */
1359 /* If while processing a fixup, a reloc really needs to be created
1360 then it is done here. */
1363 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1368 if (fixp->fx_addsy && fixp->fx_subsy)
1372 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1373 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1375 as_bad_where (fixp->fx_file, fixp->fx_line,
1376 "Difference of symbols in different sections is not supported");
1380 /* We are dealing with two symbols defined in the same section.
1381 Let us fix-up them here. */
1382 value += S_GET_VALUE (fixp->fx_addsy);
1383 value -= S_GET_VALUE (fixp->fx_subsy);
1385 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1386 only takes it's second operands for the fixup value. */
1387 fixp->fx_addsy = NULL;
1388 fixp->fx_subsy = NULL;
1389 md_apply_fix (fixp, (valueT *) &value, NULL);
1394 reloc = xmalloc (sizeof (arelent));
1396 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1397 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1399 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1400 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1401 if (reloc->howto == (reloc_howto_type *) NULL)
1403 as_bad_where (fixp->fx_file, fixp->fx_line,
1404 _("reloc %d not supported by object file format"),
1405 (int) fixp->fx_r_type);
1409 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1410 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1411 reloc->address = fixp->fx_offset;
1413 reloc->addend = fixp->fx_offset;
1419 md_assemble (char *str)
1421 struct avr_opcodes_s *opcode;
1424 str = skip_space (extract_word (str, op, sizeof (op)));
1427 as_bad (_("can't find opcode "));
1429 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1433 as_bad (_("unknown opcode `%s'"), op);
1437 /* Special case for opcodes with optional operands (lpm, elpm) -
1438 version with operands exists in avr_opcodes[] in the next entry. */
1440 if (*str && *opcode->constraints == '?')
1443 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1444 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1446 dwarf2_emit_insn (0);
1448 /* We used to set input_line_pointer to the result of get_operands,
1449 but that is wrong. Our caller assumes we don't change it. */
1451 char *t = input_line_pointer;
1453 avr_operands (opcode, &str);
1454 if (*skip_space (str))
1455 as_bad (_("garbage at end of line"));
1456 input_line_pointer = t;
1460 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1461 `avr_cons_fix_new'. */
1462 static int exp_mod_pm = 0;
1464 /* Parse special CONS expression: pm (expression)
1465 or alternatively: gs (expression).
1466 These are used for addressing program memory.
1467 Relocation: BFD_RELOC_AVR_16_PM. */
1470 avr_parse_cons_expression (expressionS *exp, int nbytes)
1476 tmp = input_line_pointer = skip_space (input_line_pointer);
1480 char *pm_name1 = "pm";
1481 char *pm_name2 = "gs";
1482 int len = strlen (pm_name1);
1483 /* len must be the same for both pm identifiers. */
1485 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1486 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1488 input_line_pointer = skip_space (input_line_pointer + len);
1490 if (*input_line_pointer == '(')
1492 input_line_pointer = skip_space (input_line_pointer + 1);
1496 if (*input_line_pointer == ')')
1497 ++input_line_pointer;
1500 as_bad (_("`)' required"));
1507 input_line_pointer = tmp;
1515 avr_cons_fix_new (fragS *frag,
1520 if (exp_mod_pm == 0)
1523 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_8);
1524 else if (nbytes == 2)
1525 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1526 else if (nbytes == 4)
1527 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1529 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1534 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1536 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);