1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008, 2009
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size; /* In words. */
34 unsigned int bin_opcode;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes[] =
42 #include "opcode/avr.h"
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
50 const char *md_shortopts = "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility. */
61 static struct mcu_type_s mcu_types[] =
63 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
64 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
65 but set to AVR_ISA_AVR25 for some following version
66 of GCC (from 4.3) for backward compatibility. */
67 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
68 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
69 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
70 but set to AVR_ISA_AVR3_ALL for some following version
71 of GCC (from 4.3) for backward compatibility. */
72 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
73 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
74 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
75 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
76 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
77 but set to AVR_ISA_AVR51 for some following version
78 of GCC (from 4.3) for backward compatibility. */
79 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
80 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
81 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
82 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
83 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
84 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
85 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
86 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
87 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
88 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
89 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
90 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
91 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
92 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
93 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
94 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
95 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
96 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
100 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
101 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
102 {"attiny2313a",AVR_ISA_AVR25, bfd_mach_avr25},
103 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
104 {"attiny24a", AVR_ISA_AVR25, bfd_mach_avr25},
105 {"attiny4313", AVR_ISA_AVR25, bfd_mach_avr25},
106 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
107 {"attiny44a", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny261a", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
116 {"attiny861a", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
118 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
119 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
120 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
121 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
122 {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25},
123 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
124 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
125 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
126 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
127 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
128 {"attiny327", AVR_ISA_AVR35, bfd_mach_avr35},
129 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
130 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
131 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
132 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
133 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
134 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
135 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
136 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
137 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
138 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
139 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
140 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
141 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
142 {"atmega4hvd", AVR_ISA_AVR4, bfd_mach_avr4},
143 {"atmega8hvd", AVR_ISA_AVR4, bfd_mach_avr4},
144 {"atmega8c1", AVR_ISA_AVR4, bfd_mach_avr4},
145 {"atmega8m1", AVR_ISA_AVR4, bfd_mach_avr4},
146 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
147 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
148 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
149 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
150 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
151 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
152 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
153 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
154 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
155 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
156 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
157 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
158 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
159 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
160 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
163 {"atmega16c1", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
165 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
168 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
169 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
170 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
171 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
176 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
178 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega644pa",AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
189 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
190 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
191 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
193 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
194 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
195 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
196 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
197 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
198 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
199 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
200 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
201 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
202 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
203 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
204 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
205 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
206 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
207 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
208 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
209 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
210 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
211 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
212 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
213 {"m3000f", AVR_ISA_AVR51, bfd_mach_avr51},
214 {"m3000s", AVR_ISA_AVR51, bfd_mach_avr51},
215 {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51},
216 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
217 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
221 /* Current MCU type. */
222 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
223 static struct mcu_type_s * avr_mcu = & default_mcu;
225 /* AVR target-specific switches. */
228 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
229 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
230 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
233 static struct avr_opt_s avr_opt = { 0, 0, 0 };
235 const char EXP_CHARS[] = "eE";
236 const char FLT_CHARS[] = "dD";
238 static void avr_set_arch (int);
240 /* The target specific pseudo-ops which we support. */
241 const pseudo_typeS md_pseudo_table[] =
243 {"arch", avr_set_arch, 0},
244 {"file", (void (*) (int)) dwarf2_directive_file, 0},
245 {"loc", dwarf2_directive_loc, 0},
246 {"loc_mark_labels", dwarf2_directive_loc_mark_labels, 0},
250 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
252 #define EXP_MOD_NAME(i) exp_mod[i].name
253 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
254 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
255 #define HAVE_PM_P(i) exp_mod[i].have_pm
260 bfd_reloc_code_real_type reloc;
261 bfd_reloc_code_real_type neg_reloc;
265 static struct exp_mod_s exp_mod[] =
267 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
268 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
269 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
270 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
271 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
272 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
273 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
274 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
277 /* A union used to store indicies into the exp_mod[] array
278 in a hash table which expects void * data types. */
285 /* Opcode hash table. */
286 static struct hash_control *avr_hash;
288 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
289 static struct hash_control *avr_mod_hash;
291 #define OPTION_MMCU 'm'
294 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
299 struct option md_longopts[] =
301 { "mmcu", required_argument, NULL, OPTION_MMCU },
302 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
303 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
304 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
305 { NULL, no_argument, NULL, 0 }
308 size_t md_longopts_size = sizeof (md_longopts);
310 /* Display nicely formatted list of known MCU names. */
313 show_mcu_list (FILE *stream)
317 fprintf (stream, _("Known MCU names:"));
320 for (i = 0; mcu_types[i].name; i++)
322 int len = strlen (mcu_types[i].name);
327 fprintf (stream, " %s", mcu_types[i].name);
330 fprintf (stream, "\n %s", mcu_types[i].name);
335 fprintf (stream, "\n");
341 while (*s == ' ' || *s == '\t')
346 /* Extract one word from FROM and copy it to TO. */
349 extract_word (char *from, char *to, int limit)
355 /* Drop leading whitespace. */
356 from = skip_space (from);
359 /* Find the op code end. */
360 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
362 to[size++] = *op_end++;
363 if (size + 1 >= limit)
372 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
373 asection *seg ATTRIBUTE_UNUSED)
380 md_show_usage (FILE *stream)
384 " -mmcu=[avr-name] select microcontroller variant\n"
385 " [avr-name] can be:\n"
386 " avr1 - classic AVR core without data RAM\n"
387 " avr2 - classic AVR core with up to 8K program memory\n"
388 " avr25 - classic AVR core with up to 8K program memory\n"
389 " plus the MOVW instruction\n"
390 " avr3 - classic AVR core with up to 64K program memory\n"
391 " avr31 - classic AVR core with up to 128K program memory\n"
392 " avr35 - classic AVR core with up to 64K program memory\n"
393 " plus the MOVW instruction\n"
394 " avr4 - enhanced AVR core with up to 8K program memory\n"
395 " avr5 - enhanced AVR core with up to 64K program memory\n"
396 " avr51 - enhanced AVR core with up to 128K program memory\n"
397 " avr6 - enhanced AVR core with up to 256K program memory\n"
398 " or immediate microcontroller name.\n"));
400 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
401 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
402 " (default for avr4, avr5)\n"
403 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
404 " (default for avr3, avr5)\n"));
405 show_mcu_list (stream);
409 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
413 input_line_pointer = extract_word (input_line_pointer, str, 20);
414 md_parse_option (OPTION_MMCU, str);
415 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
419 md_parse_option (int c, char *arg)
426 char *s = alloca (strlen (arg) + 1);
433 *t = TOLOWER (*arg1++);
437 for (i = 0; mcu_types[i].name; ++i)
438 if (strcmp (mcu_types[i].name, s) == 0)
441 if (!mcu_types[i].name)
443 show_mcu_list (stderr);
444 as_fatal (_("unknown MCU: %s\n"), arg);
447 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
448 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
449 as .arch ... in the asm output at the same time. */
450 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
451 avr_mcu = &mcu_types[i];
453 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
454 avr_mcu->name, mcu_types[i].name);
457 case OPTION_ALL_OPCODES:
458 avr_opt.all_opcodes = 1;
460 case OPTION_NO_SKIP_BUG:
461 avr_opt.no_skip_bug = 1;
472 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
478 md_atof (int type, char *litP, int *sizeP)
480 return ieee_md_atof (type, litP, sizeP, FALSE);
484 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
485 asection *sec ATTRIBUTE_UNUSED,
486 fragS *fragP ATTRIBUTE_UNUSED)
495 struct avr_opcodes_s *opcode;
497 avr_hash = hash_new ();
499 /* Insert unique names into hash table. This hash table then provides a
500 quick index to the first opcode with a particular name in the opcode
502 for (opcode = avr_opcodes; opcode->name; opcode++)
503 hash_insert (avr_hash, opcode->name, (char *) opcode);
505 avr_mod_hash = hash_new ();
507 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
512 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
515 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
518 /* Resolve STR as a constant expression and return the result.
519 If result greater than MAX then error. */
522 avr_get_constant (char *str, int max)
526 str = skip_space (str);
527 input_line_pointer = str;
530 if (ex.X_op != O_constant)
531 as_bad (_("constant value required"));
533 if (ex.X_add_number > max || ex.X_add_number < 0)
534 as_bad (_("number must be positive and less than %d"), max + 1);
536 return ex.X_add_number;
539 /* Parse for ldd/std offset. */
542 avr_offset_expression (expressionS *exp)
544 char *str = input_line_pointer;
549 str = extract_word (str, op, sizeof (op));
551 input_line_pointer = tmp;
554 /* Warn about expressions that fail to use lo8 (). */
555 if (exp->X_op == O_constant)
557 int x = exp->X_add_number;
559 if (x < -255 || x > 255)
560 as_warn (_("constant out of 8-bit range: %d"), x);
564 /* Parse ordinary expression. */
567 parse_exp (char *s, expressionS *op)
569 input_line_pointer = s;
571 if (op->X_op == O_absent)
572 as_bad (_("missing operand"));
573 return input_line_pointer;
576 /* Parse special expressions (needed for LDI command):
581 where xx is: hh, hi, lo. */
583 static bfd_reloc_code_real_type
584 avr_ldi_expression (expressionS *exp)
586 char *str = input_line_pointer;
590 int linker_stubs_should_be_generated = 0;
594 str = extract_word (str, op, sizeof (op));
600 m.ptr = hash_find (avr_mod_hash, op);
608 str = skip_space (str);
612 bfd_reloc_code_real_type reloc_to_return;
617 if (strncmp ("pm(", str, 3) == 0
618 || strncmp ("gs(",str,3) == 0
619 || strncmp ("-(gs(",str,5) == 0
620 || strncmp ("-(pm(", str, 5) == 0)
628 as_bad (_("illegal expression"));
630 if (str[0] == 'g' || str[2] == 'g')
631 linker_stubs_should_be_generated = 1;
643 if (*str == '-' && *(str + 1) == '(')
650 input_line_pointer = str;
655 if (*input_line_pointer != ')')
657 as_bad (_("`)' required"));
660 input_line_pointer++;
665 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
666 if (linker_stubs_should_be_generated)
668 switch (reloc_to_return)
670 case BFD_RELOC_AVR_LO8_LDI_PM:
671 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
673 case BFD_RELOC_AVR_HI8_LDI_PM:
674 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
678 /* PR 5523: Do not generate a warning here,
679 legitimate code can trigger this case. */
683 return reloc_to_return;
688 input_line_pointer = tmp;
691 /* Warn about expressions that fail to use lo8 (). */
692 if (exp->X_op == O_constant)
694 int x = exp->X_add_number;
696 if (x < -255 || x > 255)
697 as_warn (_("constant out of 8-bit range: %d"), x);
700 return BFD_RELOC_AVR_LDI;
703 /* Parse one instruction operand.
704 Return operand bitmask. Also fixups can be generated. */
707 avr_operand (struct avr_opcodes_s *opcode,
713 unsigned int op_mask = 0;
714 char *str = skip_space (*line);
718 /* Any register operand. */
724 if (*str == 'r' || *str == 'R')
728 str = extract_word (str, r_name, sizeof (r_name));
730 if (ISDIGIT (r_name[1]))
732 if (r_name[2] == '\0')
733 op_mask = r_name[1] - '0';
734 else if (r_name[1] != '0'
735 && ISDIGIT (r_name[2])
736 && r_name[3] == '\0')
737 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
742 op_mask = avr_get_constant (str, 31);
743 str = input_line_pointer;
751 if (op_mask < 16 || op_mask > 23)
752 as_bad (_("register r16-r23 required"));
758 as_bad (_("register number above 15 required"));
764 as_bad (_("even register number required"));
769 if ((op_mask & 1) || op_mask < 24)
770 as_bad (_("register r24, r26, r28 or r30 required"));
771 op_mask = (op_mask - 24) >> 1;
776 as_bad (_("register name or number from 0 to 31 required"));
785 str = skip_space (str + 1);
794 as_bad (_("pointer register (X, Y or Z) required"));
796 str = skip_space (str + 1);
801 as_bad (_("cannot both predecrement and postincrement"));
805 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
806 registers, no predecrement, no postincrement. */
807 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
808 && !(avr_mcu->isa & AVR_ISA_SRAM))
809 as_bad (_("addressing mode not supported"));
815 as_bad (_("can't predecrement"));
817 if (! (*str == 'z' || *str == 'Z'))
818 as_bad (_("pointer register Z required"));
820 str = skip_space (str + 1);
828 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
829 if (!avr_opt.all_opcodes
830 && (op_mask & 0x0001)
831 && !(avr_mcu->isa & AVR_ISA_MOVW))
832 as_bad (_("postincrement not supported"));
837 char c = TOLOWER (*str++);
842 as_bad (_("pointer register (Y or Z) required"));
843 str = skip_space (str);
846 input_line_pointer = str;
847 avr_offset_expression (& op_expr);
848 str = input_line_pointer;
849 fix_new_exp (frag_now, where, 3,
850 &op_expr, FALSE, BFD_RELOC_AVR_6);
856 str = parse_exp (str, &op_expr);
857 fix_new_exp (frag_now, where, opcode->insn_size * 2,
858 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
862 str = parse_exp (str, &op_expr);
863 fix_new_exp (frag_now, where, opcode->insn_size * 2,
864 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
868 str = parse_exp (str, &op_expr);
869 fix_new_exp (frag_now, where, opcode->insn_size * 2,
870 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
874 str = parse_exp (str, &op_expr);
875 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
876 &op_expr, FALSE, BFD_RELOC_16);
881 bfd_reloc_code_real_type r_type;
883 input_line_pointer = str;
884 r_type = avr_ldi_expression (&op_expr);
885 str = input_line_pointer;
886 fix_new_exp (frag_now, where, 3,
887 &op_expr, FALSE, r_type);
895 x = ~avr_get_constant (str, 255);
896 str = input_line_pointer;
897 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
902 input_line_pointer = str;
903 avr_offset_expression (& op_expr);
904 str = input_line_pointer;
905 fix_new_exp (frag_now, where, 3,
906 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
914 x = avr_get_constant (str, 7);
915 str = input_line_pointer;
926 x = avr_get_constant (str, 63);
927 str = input_line_pointer;
928 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
936 x = avr_get_constant (str, 31);
937 str = input_line_pointer;
946 as_bad (_("unknown constraint `%c'"), *op);
953 /* Parse instruction operands.
954 Return binary opcode. */
957 avr_operands (struct avr_opcodes_s *opcode, char **line)
959 char *op = opcode->constraints;
960 unsigned int bin = opcode->bin_opcode;
961 char *frag = frag_more (opcode->insn_size * 2);
963 int where = frag - frag_now->fr_literal;
964 static unsigned int prev = 0; /* Previous opcode. */
966 /* Opcode have operands. */
969 unsigned int reg1 = 0;
970 unsigned int reg2 = 0;
971 int reg1_present = 0;
972 int reg2_present = 0;
974 /* Parse first operand. */
975 if (REGISTER_P (*op))
977 reg1 = avr_operand (opcode, where, op, &str);
980 /* Parse second operand. */
993 if (REGISTER_P (*op))
996 str = skip_space (str);
998 as_bad (_("`,' required"));
999 str = skip_space (str);
1001 reg2 = avr_operand (opcode, where, op, &str);
1004 if (reg1_present && reg2_present)
1005 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
1006 else if (reg2_present)
1014 /* Detect undefined combinations (like ld r31,Z+). */
1015 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1016 as_warn (_("undefined combination of operands"));
1018 if (opcode->insn_size == 2)
1020 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1021 (AVR core bug, fixed in the newer devices). */
1022 if (!(avr_opt.no_skip_bug ||
1023 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1024 && AVR_SKIP_P (prev))
1025 as_warn (_("skipping two-word instruction"));
1027 bfd_putl32 ((bfd_vma) bin, frag);
1030 bfd_putl16 ((bfd_vma) bin, frag);
1037 /* GAS will call this function for each section at the end of the assembly,
1038 to permit the CPU backend to adjust the alignment of a section. */
1041 md_section_align (asection *seg, valueT addr)
1043 int align = bfd_get_section_alignment (stdoutput, seg);
1044 return ((addr + (1 << align) - 1) & (-1 << align));
1047 /* If you define this macro, it should return the offset between the
1048 address of a PC relative fixup and the position from which the PC
1049 relative adjustment should be made. On many processors, the base
1050 of a PC relative instruction is the next instruction, so this
1051 macro would return the length of an instruction. */
1054 md_pcrel_from_section (fixS *fixp, segT sec)
1056 if (fixp->fx_addsy != (symbolS *) NULL
1057 && (!S_IS_DEFINED (fixp->fx_addsy)
1058 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1061 return fixp->fx_frag->fr_address + fixp->fx_where;
1064 /* GAS will call this for each fixup. It should store the correct
1065 value in the object file. */
1068 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1070 unsigned char *where;
1074 if (fixP->fx_addsy == (symbolS *) NULL)
1077 else if (fixP->fx_pcrel)
1079 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1081 if (s == seg || s == absolute_section)
1083 value += S_GET_VALUE (fixP->fx_addsy);
1088 /* We don't actually support subtracting a symbol. */
1089 if (fixP->fx_subsy != (symbolS *) NULL)
1090 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1092 switch (fixP->fx_r_type)
1095 fixP->fx_no_overflow = 1;
1097 case BFD_RELOC_AVR_7_PCREL:
1098 case BFD_RELOC_AVR_13_PCREL:
1101 case BFD_RELOC_AVR_CALL:
1107 /* Fetch the instruction, insert the fully resolved operand
1108 value, and stuff the instruction back again. */
1109 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1110 insn = bfd_getl16 (where);
1112 switch (fixP->fx_r_type)
1114 case BFD_RELOC_AVR_7_PCREL:
1116 as_bad_where (fixP->fx_file, fixP->fx_line,
1117 _("odd address operand: %ld"), value);
1119 /* Instruction addresses are always right-shifted by 1. */
1121 --value; /* Correct PC. */
1123 if (value < -64 || value > 63)
1124 as_bad_where (fixP->fx_file, fixP->fx_line,
1125 _("operand out of range: %ld"), value);
1126 value = (value << 3) & 0x3f8;
1127 bfd_putl16 ((bfd_vma) (value | insn), where);
1130 case BFD_RELOC_AVR_13_PCREL:
1132 as_bad_where (fixP->fx_file, fixP->fx_line,
1133 _("odd address operand: %ld"), value);
1135 /* Instruction addresses are always right-shifted by 1. */
1137 --value; /* Correct PC. */
1139 if (value < -2048 || value > 2047)
1141 /* No wrap for devices with >8K of program memory. */
1142 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1143 as_bad_where (fixP->fx_file, fixP->fx_line,
1144 _("operand out of range: %ld"), value);
1148 bfd_putl16 ((bfd_vma) (value | insn), where);
1152 bfd_putl16 ((bfd_vma) value, where);
1156 bfd_putl16 ((bfd_vma) value, where);
1159 case BFD_RELOC_AVR_16_PM:
1160 bfd_putl16 ((bfd_vma) (value >> 1), where);
1163 case BFD_RELOC_AVR_LDI:
1165 as_bad_where (fixP->fx_file, fixP->fx_line,
1166 _("operand out of range: %ld"), value);
1167 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1170 case BFD_RELOC_AVR_6:
1171 if ((value > 63) || (value < 0))
1172 as_bad_where (fixP->fx_file, fixP->fx_line,
1173 _("operand out of range: %ld"), value);
1174 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1177 case BFD_RELOC_AVR_6_ADIW:
1178 if ((value > 63) || (value < 0))
1179 as_bad_where (fixP->fx_file, fixP->fx_line,
1180 _("operand out of range: %ld"), value);
1181 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1184 case BFD_RELOC_AVR_LO8_LDI:
1185 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1188 case BFD_RELOC_AVR_HI8_LDI:
1189 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1192 case BFD_RELOC_AVR_MS8_LDI:
1193 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1196 case BFD_RELOC_AVR_HH8_LDI:
1197 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1200 case BFD_RELOC_AVR_LO8_LDI_NEG:
1201 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1204 case BFD_RELOC_AVR_HI8_LDI_NEG:
1205 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1208 case BFD_RELOC_AVR_MS8_LDI_NEG:
1209 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1212 case BFD_RELOC_AVR_HH8_LDI_NEG:
1213 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1216 case BFD_RELOC_AVR_LO8_LDI_PM:
1217 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1220 case BFD_RELOC_AVR_HI8_LDI_PM:
1221 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1224 case BFD_RELOC_AVR_HH8_LDI_PM:
1225 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1228 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1229 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1232 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1233 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1236 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1237 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1240 case BFD_RELOC_AVR_CALL:
1244 x = bfd_getl16 (where);
1246 as_bad_where (fixP->fx_file, fixP->fx_line,
1247 _("odd address operand: %ld"), value);
1249 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1250 bfd_putl16 ((bfd_vma) x, where);
1251 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1256 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1257 fixP->fx_line, fixP->fx_r_type);
1263 switch ((int) fixP->fx_r_type)
1265 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1266 case -BFD_RELOC_AVR_HI8_LDI:
1267 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1268 case -BFD_RELOC_AVR_LO8_LDI:
1269 as_bad_where (fixP->fx_file, fixP->fx_line,
1270 _("only constant expression allowed"));
1279 /* GAS will call this to generate a reloc, passing the resulting reloc
1280 to `bfd_install_relocation'. This currently works poorly, as
1281 `bfd_install_relocation' often does the wrong thing, and instances of
1282 `tc_gen_reloc' have been written to work around the problems, which
1283 in turns makes it difficult to fix `bfd_install_relocation'. */
1285 /* If while processing a fixup, a reloc really needs to be created
1286 then it is done here. */
1289 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1294 if (fixp->fx_addsy && fixp->fx_subsy)
1298 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1299 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1301 as_bad_where (fixp->fx_file, fixp->fx_line,
1302 "Difference of symbols in different sections is not supported");
1306 /* We are dealing with two symbols defined in the same section.
1307 Let us fix-up them here. */
1308 value += S_GET_VALUE (fixp->fx_addsy);
1309 value -= S_GET_VALUE (fixp->fx_subsy);
1311 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1312 only takes it's second operands for the fixup value. */
1313 fixp->fx_addsy = NULL;
1314 fixp->fx_subsy = NULL;
1315 md_apply_fix (fixp, (valueT *) &value, NULL);
1320 reloc = xmalloc (sizeof (arelent));
1322 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1323 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1325 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1326 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1327 if (reloc->howto == (reloc_howto_type *) NULL)
1329 as_bad_where (fixp->fx_file, fixp->fx_line,
1330 _("reloc %d not supported by object file format"),
1331 (int) fixp->fx_r_type);
1335 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1336 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1337 reloc->address = fixp->fx_offset;
1339 reloc->addend = fixp->fx_offset;
1345 md_assemble (char *str)
1347 struct avr_opcodes_s *opcode;
1350 str = skip_space (extract_word (str, op, sizeof (op)));
1353 as_bad (_("can't find opcode "));
1355 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1359 as_bad (_("unknown opcode `%s'"), op);
1363 /* Special case for opcodes with optional operands (lpm, elpm) -
1364 version with operands exists in avr_opcodes[] in the next entry. */
1366 if (*str && *opcode->constraints == '?')
1369 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1370 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1372 dwarf2_emit_insn (0);
1374 /* We used to set input_line_pointer to the result of get_operands,
1375 but that is wrong. Our caller assumes we don't change it. */
1377 char *t = input_line_pointer;
1379 avr_operands (opcode, &str);
1380 if (*skip_space (str))
1381 as_bad (_("garbage at end of line"));
1382 input_line_pointer = t;
1386 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1387 `avr_cons_fix_new'. */
1388 static int exp_mod_pm = 0;
1390 /* Parse special CONS expression: pm (expression)
1391 or alternatively: gs (expression).
1392 These are used for addressing program memory.
1393 Relocation: BFD_RELOC_AVR_16_PM. */
1396 avr_parse_cons_expression (expressionS *exp, int nbytes)
1402 tmp = input_line_pointer = skip_space (input_line_pointer);
1406 char *pm_name1 = "pm";
1407 char *pm_name2 = "gs";
1408 int len = strlen (pm_name1);
1409 /* len must be the same for both pm identifiers. */
1411 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1412 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1414 input_line_pointer = skip_space (input_line_pointer + len);
1416 if (*input_line_pointer == '(')
1418 input_line_pointer = skip_space (input_line_pointer + 1);
1422 if (*input_line_pointer == ')')
1423 ++input_line_pointer;
1426 as_bad (_("`)' required"));
1433 input_line_pointer = tmp;
1441 avr_cons_fix_new (fragS *frag,
1446 if (exp_mod_pm == 0)
1449 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1450 else if (nbytes == 4)
1451 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1453 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1458 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1460 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);