1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size; /* In words. */
34 unsigned int bin_opcode;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes[] =
42 #include "opcode/avr.h"
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
50 const char *md_shortopts = "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility. */
61 static struct mcu_type_s mcu_types[] =
63 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
64 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
65 but set to AVR_ISA_AVR25 for some following version
66 of GCC (from 4.3) for backward compatibility. */
67 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
68 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
69 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
70 but set to AVR_ISA_AVR3_ALL for some following version
71 of GCC (from 4.3) for backward compatibility. */
72 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
73 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
74 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
75 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
76 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
77 but set to AVR_ISA_AVR51 for some following version
78 of GCC (from 4.3) for backward compatibility. */
79 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
80 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
81 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
82 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
83 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
84 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
85 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
86 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
87 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
88 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
89 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
90 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
91 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
92 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
93 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
94 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
95 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
96 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
100 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
101 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
102 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
103 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
104 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
105 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
106 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
107 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
116 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
117 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
118 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
119 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
120 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
121 {"attiny327", AVR_ISA_AVR35, bfd_mach_avr35},
122 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
123 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
124 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
125 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
126 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
127 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
128 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
129 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
130 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
131 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
132 {"atmega4hvd", AVR_ISA_AVR4, bfd_mach_avr4},
133 {"atmega8hvd", AVR_ISA_AVR4, bfd_mach_avr4},
134 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
135 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
136 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
137 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
138 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
139 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
140 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
141 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
142 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
143 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
144 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
145 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
146 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
147 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
148 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
149 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
150 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
151 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
152 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
153 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
154 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
155 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
156 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
157 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
158 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
159 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
160 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
163 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
165 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
168 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
169 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
170 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
175 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
176 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
177 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
178 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
179 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
180 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
181 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
182 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
187 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
188 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
189 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
191 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
192 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
193 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
194 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
195 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
196 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
197 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
198 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
199 {"m3000f", AVR_ISA_AVR51, bfd_mach_avr51},
200 {"m3000s", AVR_ISA_AVR51, bfd_mach_avr51},
201 {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51},
202 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
203 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
207 /* Current MCU type. */
208 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
209 static struct mcu_type_s * avr_mcu = & default_mcu;
211 /* AVR target-specific switches. */
214 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
215 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
216 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
219 static struct avr_opt_s avr_opt = { 0, 0, 0 };
221 const char EXP_CHARS[] = "eE";
222 const char FLT_CHARS[] = "dD";
224 static void avr_set_arch (int);
226 /* The target specific pseudo-ops which we support. */
227 const pseudo_typeS md_pseudo_table[] =
229 {"arch", avr_set_arch, 0},
233 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
235 #define EXP_MOD_NAME(i) exp_mod[i].name
236 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
237 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
238 #define HAVE_PM_P(i) exp_mod[i].have_pm
243 bfd_reloc_code_real_type reloc;
244 bfd_reloc_code_real_type neg_reloc;
248 static struct exp_mod_s exp_mod[] =
250 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
251 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
252 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
253 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
254 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
255 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
256 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
257 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
260 /* A union used to store indicies into the exp_mod[] array
261 in a hash table which expects void * data types. */
268 /* Opcode hash table. */
269 static struct hash_control *avr_hash;
271 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
272 static struct hash_control *avr_mod_hash;
274 #define OPTION_MMCU 'm'
277 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
282 struct option md_longopts[] =
284 { "mmcu", required_argument, NULL, OPTION_MMCU },
285 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
286 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
287 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
288 { NULL, no_argument, NULL, 0 }
291 size_t md_longopts_size = sizeof (md_longopts);
293 /* Display nicely formatted list of known MCU names. */
296 show_mcu_list (FILE *stream)
300 fprintf (stream, _("Known MCU names:"));
303 for (i = 0; mcu_types[i].name; i++)
305 int len = strlen (mcu_types[i].name);
310 fprintf (stream, " %s", mcu_types[i].name);
313 fprintf (stream, "\n %s", mcu_types[i].name);
318 fprintf (stream, "\n");
324 while (*s == ' ' || *s == '\t')
329 /* Extract one word from FROM and copy it to TO. */
332 extract_word (char *from, char *to, int limit)
338 /* Drop leading whitespace. */
339 from = skip_space (from);
342 /* Find the op code end. */
343 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
345 to[size++] = *op_end++;
346 if (size + 1 >= limit)
355 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
356 asection *seg ATTRIBUTE_UNUSED)
363 md_show_usage (FILE *stream)
367 " -mmcu=[avr-name] select microcontroller variant\n"
368 " [avr-name] can be:\n"
369 " avr1 - classic AVR core without data RAM\n"
370 " avr2 - classic AVR core with up to 8K program memory\n"
371 " avr25 - classic AVR core with up to 8K program memory\n"
372 " plus the MOVW instruction\n"
373 " avr3 - classic AVR core with up to 64K program memory\n"
374 " avr31 - classic AVR core with up to 128K program memory\n"
375 " avr35 - classic AVR core with up to 64K program memory\n"
376 " plus the MOVW instruction\n"
377 " avr4 - enhanced AVR core with up to 8K program memory\n"
378 " avr5 - enhanced AVR core with up to 64K program memory\n"
379 " avr51 - enhanced AVR core with up to 128K program memory\n"
380 " avr6 - enhanced AVR core with up to 256K program memory\n"
381 " or immediate microcontroller name.\n"));
383 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
384 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
385 " (default for avr4, avr5)\n"
386 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
387 " (default for avr3, avr5)\n"));
388 show_mcu_list (stream);
392 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
396 input_line_pointer = extract_word (input_line_pointer, str, 20);
397 md_parse_option (OPTION_MMCU, str);
398 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
402 md_parse_option (int c, char *arg)
409 char *s = alloca (strlen (arg) + 1);
416 *t = TOLOWER (*arg1++);
420 for (i = 0; mcu_types[i].name; ++i)
421 if (strcmp (mcu_types[i].name, s) == 0)
424 if (!mcu_types[i].name)
426 show_mcu_list (stderr);
427 as_fatal (_("unknown MCU: %s\n"), arg);
430 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
431 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
432 as .arch ... in the asm output at the same time. */
433 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
434 avr_mcu = &mcu_types[i];
436 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
437 avr_mcu->name, mcu_types[i].name);
440 case OPTION_ALL_OPCODES:
441 avr_opt.all_opcodes = 1;
443 case OPTION_NO_SKIP_BUG:
444 avr_opt.no_skip_bug = 1;
455 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
461 md_atof (int type, char *litP, int *sizeP)
463 return ieee_md_atof (type, litP, sizeP, FALSE);
467 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
468 asection *sec ATTRIBUTE_UNUSED,
469 fragS *fragP ATTRIBUTE_UNUSED)
478 struct avr_opcodes_s *opcode;
480 avr_hash = hash_new ();
482 /* Insert unique names into hash table. This hash table then provides a
483 quick index to the first opcode with a particular name in the opcode
485 for (opcode = avr_opcodes; opcode->name; opcode++)
486 hash_insert (avr_hash, opcode->name, (char *) opcode);
488 avr_mod_hash = hash_new ();
490 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
495 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
498 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
501 /* Resolve STR as a constant expression and return the result.
502 If result greater than MAX then error. */
505 avr_get_constant (char *str, int max)
509 str = skip_space (str);
510 input_line_pointer = str;
513 if (ex.X_op != O_constant)
514 as_bad (_("constant value required"));
516 if (ex.X_add_number > max || ex.X_add_number < 0)
517 as_bad (_("number must be positive and less than %d"), max + 1);
519 return ex.X_add_number;
522 /* Parse for ldd/std offset. */
525 avr_offset_expression (expressionS *exp)
527 char *str = input_line_pointer;
532 str = extract_word (str, op, sizeof (op));
534 input_line_pointer = tmp;
537 /* Warn about expressions that fail to use lo8 (). */
538 if (exp->X_op == O_constant)
540 int x = exp->X_add_number;
542 if (x < -255 || x > 255)
543 as_warn (_("constant out of 8-bit range: %d"), x);
547 /* Parse ordinary expression. */
550 parse_exp (char *s, expressionS *op)
552 input_line_pointer = s;
554 if (op->X_op == O_absent)
555 as_bad (_("missing operand"));
556 return input_line_pointer;
559 /* Parse special expressions (needed for LDI command):
564 where xx is: hh, hi, lo. */
566 static bfd_reloc_code_real_type
567 avr_ldi_expression (expressionS *exp)
569 char *str = input_line_pointer;
573 int linker_stubs_should_be_generated = 0;
577 str = extract_word (str, op, sizeof (op));
583 m.ptr = hash_find (avr_mod_hash, op);
591 str = skip_space (str);
595 bfd_reloc_code_real_type reloc_to_return;
600 if (strncmp ("pm(", str, 3) == 0
601 || strncmp ("gs(",str,3) == 0
602 || strncmp ("-(gs(",str,5) == 0
603 || strncmp ("-(pm(", str, 5) == 0)
611 as_bad (_("illegal expression"));
613 if (str[0] == 'g' || str[2] == 'g')
614 linker_stubs_should_be_generated = 1;
626 if (*str == '-' && *(str + 1) == '(')
633 input_line_pointer = str;
638 if (*input_line_pointer != ')')
640 as_bad (_("`)' required"));
643 input_line_pointer++;
648 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
649 if (linker_stubs_should_be_generated)
651 switch (reloc_to_return)
653 case BFD_RELOC_AVR_LO8_LDI_PM:
654 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
656 case BFD_RELOC_AVR_HI8_LDI_PM:
657 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
661 /* PR 5523: Do not generate a warning here,
662 legitimate code can trigger this case. */
666 return reloc_to_return;
671 input_line_pointer = tmp;
674 /* Warn about expressions that fail to use lo8 (). */
675 if (exp->X_op == O_constant)
677 int x = exp->X_add_number;
679 if (x < -255 || x > 255)
680 as_warn (_("constant out of 8-bit range: %d"), x);
683 return BFD_RELOC_AVR_LDI;
686 /* Parse one instruction operand.
687 Return operand bitmask. Also fixups can be generated. */
690 avr_operand (struct avr_opcodes_s *opcode,
696 unsigned int op_mask = 0;
697 char *str = skip_space (*line);
701 /* Any register operand. */
707 if (*str == 'r' || *str == 'R')
711 str = extract_word (str, r_name, sizeof (r_name));
713 if (ISDIGIT (r_name[1]))
715 if (r_name[2] == '\0')
716 op_mask = r_name[1] - '0';
717 else if (r_name[1] != '0'
718 && ISDIGIT (r_name[2])
719 && r_name[3] == '\0')
720 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
725 op_mask = avr_get_constant (str, 31);
726 str = input_line_pointer;
734 if (op_mask < 16 || op_mask > 23)
735 as_bad (_("register r16-r23 required"));
741 as_bad (_("register number above 15 required"));
747 as_bad (_("even register number required"));
752 if ((op_mask & 1) || op_mask < 24)
753 as_bad (_("register r24, r26, r28 or r30 required"));
754 op_mask = (op_mask - 24) >> 1;
759 as_bad (_("register name or number from 0 to 31 required"));
768 str = skip_space (str + 1);
777 as_bad (_("pointer register (X, Y or Z) required"));
779 str = skip_space (str + 1);
784 as_bad (_("cannot both predecrement and postincrement"));
788 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
789 registers, no predecrement, no postincrement. */
790 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
791 && !(avr_mcu->isa & AVR_ISA_SRAM))
792 as_bad (_("addressing mode not supported"));
798 as_bad (_("can't predecrement"));
800 if (! (*str == 'z' || *str == 'Z'))
801 as_bad (_("pointer register Z required"));
803 str = skip_space (str + 1);
811 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
812 if (!avr_opt.all_opcodes
813 && (op_mask & 0x0001)
814 && !(avr_mcu->isa & AVR_ISA_MOVW))
815 as_bad (_("postincrement not supported"));
820 char c = TOLOWER (*str++);
825 as_bad (_("pointer register (Y or Z) required"));
826 str = skip_space (str);
829 input_line_pointer = str;
830 avr_offset_expression (& op_expr);
831 str = input_line_pointer;
832 fix_new_exp (frag_now, where, 3,
833 &op_expr, FALSE, BFD_RELOC_AVR_6);
839 str = parse_exp (str, &op_expr);
840 fix_new_exp (frag_now, where, opcode->insn_size * 2,
841 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
845 str = parse_exp (str, &op_expr);
846 fix_new_exp (frag_now, where, opcode->insn_size * 2,
847 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
851 str = parse_exp (str, &op_expr);
852 fix_new_exp (frag_now, where, opcode->insn_size * 2,
853 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
857 str = parse_exp (str, &op_expr);
858 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
859 &op_expr, FALSE, BFD_RELOC_16);
864 bfd_reloc_code_real_type r_type;
866 input_line_pointer = str;
867 r_type = avr_ldi_expression (&op_expr);
868 str = input_line_pointer;
869 fix_new_exp (frag_now, where, 3,
870 &op_expr, FALSE, r_type);
878 x = ~avr_get_constant (str, 255);
879 str = input_line_pointer;
880 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
885 input_line_pointer = str;
886 avr_offset_expression (& op_expr);
887 str = input_line_pointer;
888 fix_new_exp (frag_now, where, 3,
889 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
897 x = avr_get_constant (str, 7);
898 str = input_line_pointer;
909 x = avr_get_constant (str, 63);
910 str = input_line_pointer;
911 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
919 x = avr_get_constant (str, 31);
920 str = input_line_pointer;
929 as_bad (_("unknown constraint `%c'"), *op);
936 /* Parse instruction operands.
937 Return binary opcode. */
940 avr_operands (struct avr_opcodes_s *opcode, char **line)
942 char *op = opcode->constraints;
943 unsigned int bin = opcode->bin_opcode;
944 char *frag = frag_more (opcode->insn_size * 2);
946 int where = frag - frag_now->fr_literal;
947 static unsigned int prev = 0; /* Previous opcode. */
949 /* Opcode have operands. */
952 unsigned int reg1 = 0;
953 unsigned int reg2 = 0;
954 int reg1_present = 0;
955 int reg2_present = 0;
957 /* Parse first operand. */
958 if (REGISTER_P (*op))
960 reg1 = avr_operand (opcode, where, op, &str);
963 /* Parse second operand. */
976 if (REGISTER_P (*op))
979 str = skip_space (str);
981 as_bad (_("`,' required"));
982 str = skip_space (str);
984 reg2 = avr_operand (opcode, where, op, &str);
987 if (reg1_present && reg2_present)
988 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
989 else if (reg2_present)
997 /* Detect undefined combinations (like ld r31,Z+). */
998 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
999 as_warn (_("undefined combination of operands"));
1001 if (opcode->insn_size == 2)
1003 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1004 (AVR core bug, fixed in the newer devices). */
1005 if (!(avr_opt.no_skip_bug ||
1006 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1007 && AVR_SKIP_P (prev))
1008 as_warn (_("skipping two-word instruction"));
1010 bfd_putl32 ((bfd_vma) bin, frag);
1013 bfd_putl16 ((bfd_vma) bin, frag);
1020 /* GAS will call this function for each section at the end of the assembly,
1021 to permit the CPU backend to adjust the alignment of a section. */
1024 md_section_align (asection *seg, valueT addr)
1026 int align = bfd_get_section_alignment (stdoutput, seg);
1027 return ((addr + (1 << align) - 1) & (-1 << align));
1030 /* If you define this macro, it should return the offset between the
1031 address of a PC relative fixup and the position from which the PC
1032 relative adjustment should be made. On many processors, the base
1033 of a PC relative instruction is the next instruction, so this
1034 macro would return the length of an instruction. */
1037 md_pcrel_from_section (fixS *fixp, segT sec)
1039 if (fixp->fx_addsy != (symbolS *) NULL
1040 && (!S_IS_DEFINED (fixp->fx_addsy)
1041 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1044 return fixp->fx_frag->fr_address + fixp->fx_where;
1047 /* GAS will call this for each fixup. It should store the correct
1048 value in the object file. */
1051 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1053 unsigned char *where;
1057 if (fixP->fx_addsy == (symbolS *) NULL)
1060 else if (fixP->fx_pcrel)
1062 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1064 if (s == seg || s == absolute_section)
1066 value += S_GET_VALUE (fixP->fx_addsy);
1071 /* We don't actually support subtracting a symbol. */
1072 if (fixP->fx_subsy != (symbolS *) NULL)
1073 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1075 switch (fixP->fx_r_type)
1078 fixP->fx_no_overflow = 1;
1080 case BFD_RELOC_AVR_7_PCREL:
1081 case BFD_RELOC_AVR_13_PCREL:
1084 case BFD_RELOC_AVR_CALL:
1090 /* Fetch the instruction, insert the fully resolved operand
1091 value, and stuff the instruction back again. */
1092 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1093 insn = bfd_getl16 (where);
1095 switch (fixP->fx_r_type)
1097 case BFD_RELOC_AVR_7_PCREL:
1099 as_bad_where (fixP->fx_file, fixP->fx_line,
1100 _("odd address operand: %ld"), value);
1102 /* Instruction addresses are always right-shifted by 1. */
1104 --value; /* Correct PC. */
1106 if (value < -64 || value > 63)
1107 as_bad_where (fixP->fx_file, fixP->fx_line,
1108 _("operand out of range: %ld"), value);
1109 value = (value << 3) & 0x3f8;
1110 bfd_putl16 ((bfd_vma) (value | insn), where);
1113 case BFD_RELOC_AVR_13_PCREL:
1115 as_bad_where (fixP->fx_file, fixP->fx_line,
1116 _("odd address operand: %ld"), value);
1118 /* Instruction addresses are always right-shifted by 1. */
1120 --value; /* Correct PC. */
1122 if (value < -2048 || value > 2047)
1124 /* No wrap for devices with >8K of program memory. */
1125 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1126 as_bad_where (fixP->fx_file, fixP->fx_line,
1127 _("operand out of range: %ld"), value);
1131 bfd_putl16 ((bfd_vma) (value | insn), where);
1135 bfd_putl16 ((bfd_vma) value, where);
1139 bfd_putl16 ((bfd_vma) value, where);
1142 case BFD_RELOC_AVR_16_PM:
1143 bfd_putl16 ((bfd_vma) (value >> 1), where);
1146 case BFD_RELOC_AVR_LDI:
1148 as_bad_where (fixP->fx_file, fixP->fx_line,
1149 _("operand out of range: %ld"), value);
1150 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1153 case BFD_RELOC_AVR_6:
1154 if ((value > 63) || (value < 0))
1155 as_bad_where (fixP->fx_file, fixP->fx_line,
1156 _("operand out of range: %ld"), value);
1157 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1160 case BFD_RELOC_AVR_6_ADIW:
1161 if ((value > 63) || (value < 0))
1162 as_bad_where (fixP->fx_file, fixP->fx_line,
1163 _("operand out of range: %ld"), value);
1164 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1167 case BFD_RELOC_AVR_LO8_LDI:
1168 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1171 case BFD_RELOC_AVR_HI8_LDI:
1172 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1175 case BFD_RELOC_AVR_MS8_LDI:
1176 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1179 case BFD_RELOC_AVR_HH8_LDI:
1180 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1183 case BFD_RELOC_AVR_LO8_LDI_NEG:
1184 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1187 case BFD_RELOC_AVR_HI8_LDI_NEG:
1188 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1191 case BFD_RELOC_AVR_MS8_LDI_NEG:
1192 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1195 case BFD_RELOC_AVR_HH8_LDI_NEG:
1196 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1199 case BFD_RELOC_AVR_LO8_LDI_PM:
1200 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1203 case BFD_RELOC_AVR_HI8_LDI_PM:
1204 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1207 case BFD_RELOC_AVR_HH8_LDI_PM:
1208 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1211 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1212 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1215 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1216 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1219 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1220 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1223 case BFD_RELOC_AVR_CALL:
1227 x = bfd_getl16 (where);
1229 as_bad_where (fixP->fx_file, fixP->fx_line,
1230 _("odd address operand: %ld"), value);
1232 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1233 bfd_putl16 ((bfd_vma) x, where);
1234 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1239 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1240 fixP->fx_line, fixP->fx_r_type);
1246 switch (fixP->fx_r_type)
1248 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1249 case -BFD_RELOC_AVR_HI8_LDI:
1250 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1251 case -BFD_RELOC_AVR_LO8_LDI:
1252 as_bad_where (fixP->fx_file, fixP->fx_line,
1253 _("only constant expression allowed"));
1262 /* GAS will call this to generate a reloc, passing the resulting reloc
1263 to `bfd_install_relocation'. This currently works poorly, as
1264 `bfd_install_relocation' often does the wrong thing, and instances of
1265 `tc_gen_reloc' have been written to work around the problems, which
1266 in turns makes it difficult to fix `bfd_install_relocation'. */
1268 /* If while processing a fixup, a reloc really needs to be created
1269 then it is done here. */
1272 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1277 if (fixp->fx_addsy && fixp->fx_subsy)
1281 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1282 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1284 as_bad_where (fixp->fx_file, fixp->fx_line,
1285 "Difference of symbols in different sections is not supported");
1289 /* We are dealing with two symbols defined in the same section.
1290 Let us fix-up them here. */
1291 value += S_GET_VALUE (fixp->fx_addsy);
1292 value -= S_GET_VALUE (fixp->fx_subsy);
1294 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1295 only takes it's second operands for the fixup value. */
1296 fixp->fx_addsy = NULL;
1297 fixp->fx_subsy = NULL;
1298 md_apply_fix (fixp, (valueT *) &value, NULL);
1303 reloc = xmalloc (sizeof (arelent));
1305 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1306 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1308 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1309 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1310 if (reloc->howto == (reloc_howto_type *) NULL)
1312 as_bad_where (fixp->fx_file, fixp->fx_line,
1313 _("reloc %d not supported by object file format"),
1314 (int) fixp->fx_r_type);
1318 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1319 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1320 reloc->address = fixp->fx_offset;
1322 reloc->addend = fixp->fx_offset;
1328 md_assemble (char *str)
1330 struct avr_opcodes_s *opcode;
1333 str = skip_space (extract_word (str, op, sizeof (op)));
1336 as_bad (_("can't find opcode "));
1338 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1342 as_bad (_("unknown opcode `%s'"), op);
1346 /* Special case for opcodes with optional operands (lpm, elpm) -
1347 version with operands exists in avr_opcodes[] in the next entry. */
1349 if (*str && *opcode->constraints == '?')
1352 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1353 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1355 /* We used to set input_line_pointer to the result of get_operands,
1356 but that is wrong. Our caller assumes we don't change it. */
1358 char *t = input_line_pointer;
1360 avr_operands (opcode, &str);
1361 if (*skip_space (str))
1362 as_bad (_("garbage at end of line"));
1363 input_line_pointer = t;
1367 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1368 `avr_cons_fix_new'. */
1369 static int exp_mod_pm = 0;
1371 /* Parse special CONS expression: pm (expression)
1372 or alternatively: gs (expression).
1373 These are used for addressing program memory.
1374 Relocation: BFD_RELOC_AVR_16_PM. */
1377 avr_parse_cons_expression (expressionS *exp, int nbytes)
1383 tmp = input_line_pointer = skip_space (input_line_pointer);
1387 char *pm_name1 = "pm";
1388 char *pm_name2 = "gs";
1389 int len = strlen (pm_name1);
1390 /* len must be the same for both pm identifiers. */
1392 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1393 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1395 input_line_pointer = skip_space (input_line_pointer + len);
1397 if (*input_line_pointer == '(')
1399 input_line_pointer = skip_space (input_line_pointer + 1);
1403 if (*input_line_pointer == ')')
1404 ++input_line_pointer;
1407 as_bad (_("`)' required"));
1414 input_line_pointer = tmp;
1422 avr_cons_fix_new (fragS *frag,
1427 if (exp_mod_pm == 0)
1430 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1431 else if (nbytes == 4)
1432 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1434 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1439 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1441 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);