1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size; /* In words. */
34 unsigned int bin_opcode;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes[] =
42 #include "opcode/avr.h"
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
50 const char *md_shortopts = "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility. */
61 static struct mcu_type_s mcu_types[] =
63 {"avr1", AVR_ISA_AVR1, bfd_mach_avr1},
64 /* TODO: insruction set for avr2 architecture should be AVR_ISA_AVR2,
65 but set to AVR_ISA_AVR25 for some following version
66 of GCC (from 4.3) for backward compatibility. */
67 {"avr2", AVR_ISA_AVR25, bfd_mach_avr2},
68 {"avr25", AVR_ISA_AVR25, bfd_mach_avr25},
69 /* TODO: insruction set for avr3 architecture should be AVR_ISA_AVR3,
70 but set to AVR_ISA_AVR3_ALL for some following version
71 of GCC (from 4.3) for backward compatibility. */
72 {"avr3", AVR_ISA_AVR3_ALL, bfd_mach_avr3},
73 {"avr31", AVR_ISA_AVR31, bfd_mach_avr31},
74 {"avr35", AVR_ISA_AVR35, bfd_mach_avr35},
75 {"avr4", AVR_ISA_AVR4, bfd_mach_avr4},
76 /* TODO: insruction set for avr5 architecture should be AVR_ISA_AVR5,
77 but set to AVR_ISA_AVR51 for some following version
78 of GCC (from 4.3) for backward compatibility. */
79 {"avr5", AVR_ISA_AVR51, bfd_mach_avr5},
80 {"avr51", AVR_ISA_AVR51, bfd_mach_avr51},
81 {"avr6", AVR_ISA_AVR6, bfd_mach_avr6},
82 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
83 {"attiny11", AVR_ISA_AVR1, bfd_mach_avr1},
84 {"attiny12", AVR_ISA_AVR1, bfd_mach_avr1},
85 {"attiny15", AVR_ISA_AVR1, bfd_mach_avr1},
86 {"attiny28", AVR_ISA_AVR1, bfd_mach_avr1},
87 {"at90s2313", AVR_ISA_AVR2, bfd_mach_avr2},
88 {"at90s2323", AVR_ISA_AVR2, bfd_mach_avr2},
89 {"at90s2333", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 4433 */
90 {"at90s2343", AVR_ISA_AVR2, bfd_mach_avr2},
91 {"attiny22", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 2343 */
92 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
93 {"at90s4414", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8515 */
94 {"at90s4433", AVR_ISA_AVR2, bfd_mach_avr2},
95 {"at90s4434", AVR_ISA_AVR2, bfd_mach_avr2}, /* XXX -> 8535 */
96 {"at90s8515", AVR_ISA_AVR2, bfd_mach_avr2},
97 {"at90c8534", AVR_ISA_AVR2, bfd_mach_avr2},
98 {"at90s8535", AVR_ISA_AVR2, bfd_mach_avr2},
99 {"attiny13", AVR_ISA_AVR25, bfd_mach_avr25},
100 {"attiny13a", AVR_ISA_AVR25, bfd_mach_avr25},
101 {"attiny2313", AVR_ISA_AVR25, bfd_mach_avr25},
102 {"attiny24", AVR_ISA_AVR25, bfd_mach_avr25},
103 {"attiny44", AVR_ISA_AVR25, bfd_mach_avr25},
104 {"attiny84", AVR_ISA_AVR25, bfd_mach_avr25},
105 {"attiny25", AVR_ISA_AVR25, bfd_mach_avr25},
106 {"attiny45", AVR_ISA_AVR25, bfd_mach_avr25},
107 {"attiny85", AVR_ISA_AVR25, bfd_mach_avr25},
108 {"attiny261", AVR_ISA_AVR25, bfd_mach_avr25},
109 {"attiny461", AVR_ISA_AVR25, bfd_mach_avr25},
110 {"attiny861", AVR_ISA_AVR25, bfd_mach_avr25},
111 {"attiny87", AVR_ISA_AVR25, bfd_mach_avr25},
112 {"attiny43u", AVR_ISA_AVR25, bfd_mach_avr25},
113 {"attiny48", AVR_ISA_AVR25, bfd_mach_avr25},
114 {"attiny88", AVR_ISA_AVR25, bfd_mach_avr25},
115 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr25},
116 {"ata6289", AVR_ISA_AVR25, bfd_mach_avr25},
117 {"at43usb355", AVR_ISA_AVR3, bfd_mach_avr3},
118 {"at76c711", AVR_ISA_AVR3, bfd_mach_avr3},
119 {"atmega103", AVR_ISA_AVR31, bfd_mach_avr31},
120 {"at43usb320", AVR_ISA_AVR31, bfd_mach_avr31},
121 {"attiny167", AVR_ISA_AVR35, bfd_mach_avr35},
122 {"attiny327", AVR_ISA_AVR35, bfd_mach_avr35},
123 {"at90usb82", AVR_ISA_AVR35, bfd_mach_avr35},
124 {"at90usb162", AVR_ISA_AVR35, bfd_mach_avr35},
125 {"atmega8u2", AVR_ISA_AVR35, bfd_mach_avr35},
126 {"atmega16u2", AVR_ISA_AVR35, bfd_mach_avr35},
127 {"atmega32u2", AVR_ISA_AVR35, bfd_mach_avr35},
128 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
129 {"atmega48", AVR_ISA_AVR4, bfd_mach_avr4},
130 {"atmega48p", AVR_ISA_AVR4, bfd_mach_avr4},
131 {"atmega88", AVR_ISA_AVR4, bfd_mach_avr4},
132 {"atmega88p", AVR_ISA_AVR4, bfd_mach_avr4},
133 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
134 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
135 {"atmega8hva", AVR_ISA_AVR4, bfd_mach_avr4},
136 {"atmega4hvd", AVR_ISA_AVR4, bfd_mach_avr4},
137 {"atmega8hvd", AVR_ISA_AVR4, bfd_mach_avr4},
138 {"at90pwm1", AVR_ISA_AVR4, bfd_mach_avr4},
139 {"at90pwm2", AVR_ISA_AVR4, bfd_mach_avr4},
140 {"at90pwm2b", AVR_ISA_AVR4, bfd_mach_avr4},
141 {"at90pwm3", AVR_ISA_AVR4, bfd_mach_avr4},
142 {"at90pwm3b", AVR_ISA_AVR4, bfd_mach_avr4},
143 {"at90pwm81", AVR_ISA_AVR4, bfd_mach_avr4},
144 {"atmega16", AVR_ISA_AVR5, bfd_mach_avr5},
145 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
146 {"atmega162", AVR_ISA_AVR5, bfd_mach_avr5},
147 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
148 {"atmega164p", AVR_ISA_AVR5, bfd_mach_avr5},
149 {"atmega165", AVR_ISA_AVR5, bfd_mach_avr5},
150 {"atmega165p", AVR_ISA_AVR5, bfd_mach_avr5},
151 {"atmega168", AVR_ISA_AVR5, bfd_mach_avr5},
152 {"atmega168p", AVR_ISA_AVR5, bfd_mach_avr5},
153 {"atmega169", AVR_ISA_AVR5, bfd_mach_avr5},
154 {"atmega169p", AVR_ISA_AVR5, bfd_mach_avr5},
155 {"atmega32", AVR_ISA_AVR5, bfd_mach_avr5},
156 {"atmega323", AVR_ISA_AVR5, bfd_mach_avr5},
157 {"atmega324p", AVR_ISA_AVR5, bfd_mach_avr5},
158 {"atmega325", AVR_ISA_AVR5, bfd_mach_avr5},
159 {"atmega325p", AVR_ISA_AVR5, bfd_mach_avr5},
160 {"atmega3250", AVR_ISA_AVR5, bfd_mach_avr5},
161 {"atmega3250p",AVR_ISA_AVR5, bfd_mach_avr5},
162 {"atmega328p", AVR_ISA_AVR5, bfd_mach_avr5},
163 {"atmega329", AVR_ISA_AVR5, bfd_mach_avr5},
164 {"atmega329p", AVR_ISA_AVR5, bfd_mach_avr5},
165 {"atmega3290", AVR_ISA_AVR5, bfd_mach_avr5},
166 {"atmega3290p",AVR_ISA_AVR5, bfd_mach_avr5},
167 {"atmega406", AVR_ISA_AVR5, bfd_mach_avr5},
168 {"atmega64", AVR_ISA_AVR5, bfd_mach_avr5},
169 {"atmega640", AVR_ISA_AVR5, bfd_mach_avr5},
170 {"atmega644", AVR_ISA_AVR5, bfd_mach_avr5},
171 {"atmega644p", AVR_ISA_AVR5, bfd_mach_avr5},
172 {"atmega645", AVR_ISA_AVR5, bfd_mach_avr5},
173 {"atmega649", AVR_ISA_AVR5, bfd_mach_avr5},
174 {"atmega6450", AVR_ISA_AVR5, bfd_mach_avr5},
175 {"atmega6490", AVR_ISA_AVR5, bfd_mach_avr5},
176 {"atmega16hva",AVR_ISA_AVR5, bfd_mach_avr5},
177 {"atmega16hvb",AVR_ISA_AVR5, bfd_mach_avr5},
178 {"atmega32hvb",AVR_ISA_AVR5, bfd_mach_avr5},
179 {"at90can32" , AVR_ISA_AVR5, bfd_mach_avr5},
180 {"at90can64" , AVR_ISA_AVR5, bfd_mach_avr5},
181 {"at90pwm216", AVR_ISA_AVR5, bfd_mach_avr5},
182 {"at90pwm316", AVR_ISA_AVR5, bfd_mach_avr5},
183 {"atmega32c1", AVR_ISA_AVR5, bfd_mach_avr5},
184 {"atmega64c1", AVR_ISA_AVR5, bfd_mach_avr5},
185 {"atmega16m1", AVR_ISA_AVR5, bfd_mach_avr5},
186 {"atmega32m1", AVR_ISA_AVR5, bfd_mach_avr5},
187 {"atmega64m1", AVR_ISA_AVR5, bfd_mach_avr5},
188 {"atmega16u4", AVR_ISA_AVR5, bfd_mach_avr5},
189 {"atmega32u4", AVR_ISA_AVR5, bfd_mach_avr5},
190 {"atmega32u6", AVR_ISA_AVR5, bfd_mach_avr5},
191 {"at90usb646", AVR_ISA_AVR5, bfd_mach_avr5},
192 {"at90usb647", AVR_ISA_AVR5, bfd_mach_avr5},
193 {"at90scr100", AVR_ISA_AVR5, bfd_mach_avr5},
194 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
195 {"atmega128", AVR_ISA_AVR51, bfd_mach_avr51},
196 {"atmega1280", AVR_ISA_AVR51, bfd_mach_avr51},
197 {"atmega1281", AVR_ISA_AVR51, bfd_mach_avr51},
198 {"atmega1284p",AVR_ISA_AVR51, bfd_mach_avr51},
199 {"atmega128rfa1",AVR_ISA_AVR51, bfd_mach_avr51},
200 {"at90can128", AVR_ISA_AVR51, bfd_mach_avr51},
201 {"at90usb1286",AVR_ISA_AVR51, bfd_mach_avr51},
202 {"at90usb1287",AVR_ISA_AVR51, bfd_mach_avr51},
203 {"m3000f", AVR_ISA_AVR51, bfd_mach_avr51},
204 {"m3000s", AVR_ISA_AVR51, bfd_mach_avr51},
205 {"m3001b", AVR_ISA_AVR51, bfd_mach_avr51},
206 {"atmega2560", AVR_ISA_AVR6, bfd_mach_avr6},
207 {"atmega2561", AVR_ISA_AVR6, bfd_mach_avr6},
211 /* Current MCU type. */
212 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_AVR2, bfd_mach_avr2};
213 static struct mcu_type_s * avr_mcu = & default_mcu;
215 /* AVR target-specific switches. */
218 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
219 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
220 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
223 static struct avr_opt_s avr_opt = { 0, 0, 0 };
225 const char EXP_CHARS[] = "eE";
226 const char FLT_CHARS[] = "dD";
228 static void avr_set_arch (int);
230 /* The target specific pseudo-ops which we support. */
231 const pseudo_typeS md_pseudo_table[] =
233 {"arch", avr_set_arch, 0},
237 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
239 #define EXP_MOD_NAME(i) exp_mod[i].name
240 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
241 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
242 #define HAVE_PM_P(i) exp_mod[i].have_pm
247 bfd_reloc_code_real_type reloc;
248 bfd_reloc_code_real_type neg_reloc;
252 static struct exp_mod_s exp_mod[] =
254 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
255 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
256 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
257 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
258 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
259 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
260 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
261 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
264 /* A union used to store indicies into the exp_mod[] array
265 in a hash table which expects void * data types. */
272 /* Opcode hash table. */
273 static struct hash_control *avr_hash;
275 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
276 static struct hash_control *avr_mod_hash;
278 #define OPTION_MMCU 'm'
281 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
286 struct option md_longopts[] =
288 { "mmcu", required_argument, NULL, OPTION_MMCU },
289 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
290 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
291 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
292 { NULL, no_argument, NULL, 0 }
295 size_t md_longopts_size = sizeof (md_longopts);
297 /* Display nicely formatted list of known MCU names. */
300 show_mcu_list (FILE *stream)
304 fprintf (stream, _("Known MCU names:"));
307 for (i = 0; mcu_types[i].name; i++)
309 int len = strlen (mcu_types[i].name);
314 fprintf (stream, " %s", mcu_types[i].name);
317 fprintf (stream, "\n %s", mcu_types[i].name);
322 fprintf (stream, "\n");
328 while (*s == ' ' || *s == '\t')
333 /* Extract one word from FROM and copy it to TO. */
336 extract_word (char *from, char *to, int limit)
342 /* Drop leading whitespace. */
343 from = skip_space (from);
346 /* Find the op code end. */
347 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
349 to[size++] = *op_end++;
350 if (size + 1 >= limit)
359 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
360 asection *seg ATTRIBUTE_UNUSED)
367 md_show_usage (FILE *stream)
371 " -mmcu=[avr-name] select microcontroller variant\n"
372 " [avr-name] can be:\n"
373 " avr1 - classic AVR core without data RAM\n"
374 " avr2 - classic AVR core with up to 8K program memory\n"
375 " avr25 - classic AVR core with up to 8K program memory\n"
376 " plus the MOVW instruction\n"
377 " avr3 - classic AVR core with up to 64K program memory\n"
378 " avr31 - classic AVR core with up to 128K program memory\n"
379 " avr35 - classic AVR core with up to 64K program memory\n"
380 " plus the MOVW instruction\n"
381 " avr4 - enhanced AVR core with up to 8K program memory\n"
382 " avr5 - enhanced AVR core with up to 64K program memory\n"
383 " avr51 - enhanced AVR core with up to 128K program memory\n"
384 " avr6 - enhanced AVR core with up to 256K program memory\n"
385 " or immediate microcontroller name.\n"));
387 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
388 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
389 " (default for avr4, avr5)\n"
390 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
391 " (default for avr3, avr5)\n"));
392 show_mcu_list (stream);
396 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
400 input_line_pointer = extract_word (input_line_pointer, str, 20);
401 md_parse_option (OPTION_MMCU, str);
402 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
406 md_parse_option (int c, char *arg)
413 char *s = alloca (strlen (arg) + 1);
420 *t = TOLOWER (*arg1++);
424 for (i = 0; mcu_types[i].name; ++i)
425 if (strcmp (mcu_types[i].name, s) == 0)
428 if (!mcu_types[i].name)
430 show_mcu_list (stderr);
431 as_fatal (_("unknown MCU: %s\n"), arg);
434 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
435 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
436 as .arch ... in the asm output at the same time. */
437 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
438 avr_mcu = &mcu_types[i];
440 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
441 avr_mcu->name, mcu_types[i].name);
444 case OPTION_ALL_OPCODES:
445 avr_opt.all_opcodes = 1;
447 case OPTION_NO_SKIP_BUG:
448 avr_opt.no_skip_bug = 1;
459 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
465 md_atof (int type, char *litP, int *sizeP)
467 return ieee_md_atof (type, litP, sizeP, FALSE);
471 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
472 asection *sec ATTRIBUTE_UNUSED,
473 fragS *fragP ATTRIBUTE_UNUSED)
482 struct avr_opcodes_s *opcode;
484 avr_hash = hash_new ();
486 /* Insert unique names into hash table. This hash table then provides a
487 quick index to the first opcode with a particular name in the opcode
489 for (opcode = avr_opcodes; opcode->name; opcode++)
490 hash_insert (avr_hash, opcode->name, (char *) opcode);
492 avr_mod_hash = hash_new ();
494 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
499 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
502 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
505 /* Resolve STR as a constant expression and return the result.
506 If result greater than MAX then error. */
509 avr_get_constant (char *str, int max)
513 str = skip_space (str);
514 input_line_pointer = str;
517 if (ex.X_op != O_constant)
518 as_bad (_("constant value required"));
520 if (ex.X_add_number > max || ex.X_add_number < 0)
521 as_bad (_("number must be positive and less than %d"), max + 1);
523 return ex.X_add_number;
526 /* Parse for ldd/std offset. */
529 avr_offset_expression (expressionS *exp)
531 char *str = input_line_pointer;
536 str = extract_word (str, op, sizeof (op));
538 input_line_pointer = tmp;
541 /* Warn about expressions that fail to use lo8 (). */
542 if (exp->X_op == O_constant)
544 int x = exp->X_add_number;
546 if (x < -255 || x > 255)
547 as_warn (_("constant out of 8-bit range: %d"), x);
551 /* Parse ordinary expression. */
554 parse_exp (char *s, expressionS *op)
556 input_line_pointer = s;
558 if (op->X_op == O_absent)
559 as_bad (_("missing operand"));
560 return input_line_pointer;
563 /* Parse special expressions (needed for LDI command):
568 where xx is: hh, hi, lo. */
570 static bfd_reloc_code_real_type
571 avr_ldi_expression (expressionS *exp)
573 char *str = input_line_pointer;
577 int linker_stubs_should_be_generated = 0;
581 str = extract_word (str, op, sizeof (op));
587 m.ptr = hash_find (avr_mod_hash, op);
595 str = skip_space (str);
599 bfd_reloc_code_real_type reloc_to_return;
604 if (strncmp ("pm(", str, 3) == 0
605 || strncmp ("gs(",str,3) == 0
606 || strncmp ("-(gs(",str,5) == 0
607 || strncmp ("-(pm(", str, 5) == 0)
615 as_bad (_("illegal expression"));
617 if (str[0] == 'g' || str[2] == 'g')
618 linker_stubs_should_be_generated = 1;
630 if (*str == '-' && *(str + 1) == '(')
637 input_line_pointer = str;
642 if (*input_line_pointer != ')')
644 as_bad (_("`)' required"));
647 input_line_pointer++;
652 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
653 if (linker_stubs_should_be_generated)
655 switch (reloc_to_return)
657 case BFD_RELOC_AVR_LO8_LDI_PM:
658 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
660 case BFD_RELOC_AVR_HI8_LDI_PM:
661 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
665 /* PR 5523: Do not generate a warning here,
666 legitimate code can trigger this case. */
670 return reloc_to_return;
675 input_line_pointer = tmp;
678 /* Warn about expressions that fail to use lo8 (). */
679 if (exp->X_op == O_constant)
681 int x = exp->X_add_number;
683 if (x < -255 || x > 255)
684 as_warn (_("constant out of 8-bit range: %d"), x);
687 return BFD_RELOC_AVR_LDI;
690 /* Parse one instruction operand.
691 Return operand bitmask. Also fixups can be generated. */
694 avr_operand (struct avr_opcodes_s *opcode,
700 unsigned int op_mask = 0;
701 char *str = skip_space (*line);
705 /* Any register operand. */
711 if (*str == 'r' || *str == 'R')
715 str = extract_word (str, r_name, sizeof (r_name));
717 if (ISDIGIT (r_name[1]))
719 if (r_name[2] == '\0')
720 op_mask = r_name[1] - '0';
721 else if (r_name[1] != '0'
722 && ISDIGIT (r_name[2])
723 && r_name[3] == '\0')
724 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
729 op_mask = avr_get_constant (str, 31);
730 str = input_line_pointer;
738 if (op_mask < 16 || op_mask > 23)
739 as_bad (_("register r16-r23 required"));
745 as_bad (_("register number above 15 required"));
751 as_bad (_("even register number required"));
756 if ((op_mask & 1) || op_mask < 24)
757 as_bad (_("register r24, r26, r28 or r30 required"));
758 op_mask = (op_mask - 24) >> 1;
763 as_bad (_("register name or number from 0 to 31 required"));
772 str = skip_space (str + 1);
781 as_bad (_("pointer register (X, Y or Z) required"));
783 str = skip_space (str + 1);
788 as_bad (_("cannot both predecrement and postincrement"));
792 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
793 registers, no predecrement, no postincrement. */
794 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
795 && !(avr_mcu->isa & AVR_ISA_SRAM))
796 as_bad (_("addressing mode not supported"));
802 as_bad (_("can't predecrement"));
804 if (! (*str == 'z' || *str == 'Z'))
805 as_bad (_("pointer register Z required"));
807 str = skip_space (str + 1);
815 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
816 if (!avr_opt.all_opcodes
817 && (op_mask & 0x0001)
818 && !(avr_mcu->isa & AVR_ISA_MOVW))
819 as_bad (_("postincrement not supported"));
824 char c = TOLOWER (*str++);
829 as_bad (_("pointer register (Y or Z) required"));
830 str = skip_space (str);
833 input_line_pointer = str;
834 avr_offset_expression (& op_expr);
835 str = input_line_pointer;
836 fix_new_exp (frag_now, where, 3,
837 &op_expr, FALSE, BFD_RELOC_AVR_6);
843 str = parse_exp (str, &op_expr);
844 fix_new_exp (frag_now, where, opcode->insn_size * 2,
845 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
849 str = parse_exp (str, &op_expr);
850 fix_new_exp (frag_now, where, opcode->insn_size * 2,
851 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
855 str = parse_exp (str, &op_expr);
856 fix_new_exp (frag_now, where, opcode->insn_size * 2,
857 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
861 str = parse_exp (str, &op_expr);
862 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
863 &op_expr, FALSE, BFD_RELOC_16);
868 bfd_reloc_code_real_type r_type;
870 input_line_pointer = str;
871 r_type = avr_ldi_expression (&op_expr);
872 str = input_line_pointer;
873 fix_new_exp (frag_now, where, 3,
874 &op_expr, FALSE, r_type);
882 x = ~avr_get_constant (str, 255);
883 str = input_line_pointer;
884 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
889 input_line_pointer = str;
890 avr_offset_expression (& op_expr);
891 str = input_line_pointer;
892 fix_new_exp (frag_now, where, 3,
893 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
901 x = avr_get_constant (str, 7);
902 str = input_line_pointer;
913 x = avr_get_constant (str, 63);
914 str = input_line_pointer;
915 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
923 x = avr_get_constant (str, 31);
924 str = input_line_pointer;
933 as_bad (_("unknown constraint `%c'"), *op);
940 /* Parse instruction operands.
941 Return binary opcode. */
944 avr_operands (struct avr_opcodes_s *opcode, char **line)
946 char *op = opcode->constraints;
947 unsigned int bin = opcode->bin_opcode;
948 char *frag = frag_more (opcode->insn_size * 2);
950 int where = frag - frag_now->fr_literal;
951 static unsigned int prev = 0; /* Previous opcode. */
953 /* Opcode have operands. */
956 unsigned int reg1 = 0;
957 unsigned int reg2 = 0;
958 int reg1_present = 0;
959 int reg2_present = 0;
961 /* Parse first operand. */
962 if (REGISTER_P (*op))
964 reg1 = avr_operand (opcode, where, op, &str);
967 /* Parse second operand. */
980 if (REGISTER_P (*op))
983 str = skip_space (str);
985 as_bad (_("`,' required"));
986 str = skip_space (str);
988 reg2 = avr_operand (opcode, where, op, &str);
991 if (reg1_present && reg2_present)
992 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
993 else if (reg2_present)
1001 /* Detect undefined combinations (like ld r31,Z+). */
1002 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
1003 as_warn (_("undefined combination of operands"));
1005 if (opcode->insn_size == 2)
1007 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
1008 (AVR core bug, fixed in the newer devices). */
1009 if (!(avr_opt.no_skip_bug ||
1010 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
1011 && AVR_SKIP_P (prev))
1012 as_warn (_("skipping two-word instruction"));
1014 bfd_putl32 ((bfd_vma) bin, frag);
1017 bfd_putl16 ((bfd_vma) bin, frag);
1024 /* GAS will call this function for each section at the end of the assembly,
1025 to permit the CPU backend to adjust the alignment of a section. */
1028 md_section_align (asection *seg, valueT addr)
1030 int align = bfd_get_section_alignment (stdoutput, seg);
1031 return ((addr + (1 << align) - 1) & (-1 << align));
1034 /* If you define this macro, it should return the offset between the
1035 address of a PC relative fixup and the position from which the PC
1036 relative adjustment should be made. On many processors, the base
1037 of a PC relative instruction is the next instruction, so this
1038 macro would return the length of an instruction. */
1041 md_pcrel_from_section (fixS *fixp, segT sec)
1043 if (fixp->fx_addsy != (symbolS *) NULL
1044 && (!S_IS_DEFINED (fixp->fx_addsy)
1045 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1048 return fixp->fx_frag->fr_address + fixp->fx_where;
1051 /* GAS will call this for each fixup. It should store the correct
1052 value in the object file. */
1055 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1057 unsigned char *where;
1061 if (fixP->fx_addsy == (symbolS *) NULL)
1064 else if (fixP->fx_pcrel)
1066 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1068 if (s == seg || s == absolute_section)
1070 value += S_GET_VALUE (fixP->fx_addsy);
1075 /* We don't actually support subtracting a symbol. */
1076 if (fixP->fx_subsy != (symbolS *) NULL)
1077 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1079 switch (fixP->fx_r_type)
1082 fixP->fx_no_overflow = 1;
1084 case BFD_RELOC_AVR_7_PCREL:
1085 case BFD_RELOC_AVR_13_PCREL:
1088 case BFD_RELOC_AVR_CALL:
1094 /* Fetch the instruction, insert the fully resolved operand
1095 value, and stuff the instruction back again. */
1096 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1097 insn = bfd_getl16 (where);
1099 switch (fixP->fx_r_type)
1101 case BFD_RELOC_AVR_7_PCREL:
1103 as_bad_where (fixP->fx_file, fixP->fx_line,
1104 _("odd address operand: %ld"), value);
1106 /* Instruction addresses are always right-shifted by 1. */
1108 --value; /* Correct PC. */
1110 if (value < -64 || value > 63)
1111 as_bad_where (fixP->fx_file, fixP->fx_line,
1112 _("operand out of range: %ld"), value);
1113 value = (value << 3) & 0x3f8;
1114 bfd_putl16 ((bfd_vma) (value | insn), where);
1117 case BFD_RELOC_AVR_13_PCREL:
1119 as_bad_where (fixP->fx_file, fixP->fx_line,
1120 _("odd address operand: %ld"), value);
1122 /* Instruction addresses are always right-shifted by 1. */
1124 --value; /* Correct PC. */
1126 if (value < -2048 || value > 2047)
1128 /* No wrap for devices with >8K of program memory. */
1129 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1130 as_bad_where (fixP->fx_file, fixP->fx_line,
1131 _("operand out of range: %ld"), value);
1135 bfd_putl16 ((bfd_vma) (value | insn), where);
1139 bfd_putl16 ((bfd_vma) value, where);
1143 bfd_putl16 ((bfd_vma) value, where);
1146 case BFD_RELOC_AVR_16_PM:
1147 bfd_putl16 ((bfd_vma) (value >> 1), where);
1150 case BFD_RELOC_AVR_LDI:
1152 as_bad_where (fixP->fx_file, fixP->fx_line,
1153 _("operand out of range: %ld"), value);
1154 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1157 case BFD_RELOC_AVR_6:
1158 if ((value > 63) || (value < 0))
1159 as_bad_where (fixP->fx_file, fixP->fx_line,
1160 _("operand out of range: %ld"), value);
1161 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1164 case BFD_RELOC_AVR_6_ADIW:
1165 if ((value > 63) || (value < 0))
1166 as_bad_where (fixP->fx_file, fixP->fx_line,
1167 _("operand out of range: %ld"), value);
1168 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1171 case BFD_RELOC_AVR_LO8_LDI:
1172 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1175 case BFD_RELOC_AVR_HI8_LDI:
1176 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1179 case BFD_RELOC_AVR_MS8_LDI:
1180 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1183 case BFD_RELOC_AVR_HH8_LDI:
1184 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1187 case BFD_RELOC_AVR_LO8_LDI_NEG:
1188 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1191 case BFD_RELOC_AVR_HI8_LDI_NEG:
1192 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1195 case BFD_RELOC_AVR_MS8_LDI_NEG:
1196 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1199 case BFD_RELOC_AVR_HH8_LDI_NEG:
1200 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1203 case BFD_RELOC_AVR_LO8_LDI_PM:
1204 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1207 case BFD_RELOC_AVR_HI8_LDI_PM:
1208 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1211 case BFD_RELOC_AVR_HH8_LDI_PM:
1212 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1215 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1216 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1219 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1220 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1223 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1224 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1227 case BFD_RELOC_AVR_CALL:
1231 x = bfd_getl16 (where);
1233 as_bad_where (fixP->fx_file, fixP->fx_line,
1234 _("odd address operand: %ld"), value);
1236 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1237 bfd_putl16 ((bfd_vma) x, where);
1238 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1243 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1244 fixP->fx_line, fixP->fx_r_type);
1250 switch ((int) fixP->fx_r_type)
1252 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1253 case -BFD_RELOC_AVR_HI8_LDI:
1254 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1255 case -BFD_RELOC_AVR_LO8_LDI:
1256 as_bad_where (fixP->fx_file, fixP->fx_line,
1257 _("only constant expression allowed"));
1266 /* GAS will call this to generate a reloc, passing the resulting reloc
1267 to `bfd_install_relocation'. This currently works poorly, as
1268 `bfd_install_relocation' often does the wrong thing, and instances of
1269 `tc_gen_reloc' have been written to work around the problems, which
1270 in turns makes it difficult to fix `bfd_install_relocation'. */
1272 /* If while processing a fixup, a reloc really needs to be created
1273 then it is done here. */
1276 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1281 if (fixp->fx_addsy && fixp->fx_subsy)
1285 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1286 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1288 as_bad_where (fixp->fx_file, fixp->fx_line,
1289 "Difference of symbols in different sections is not supported");
1293 /* We are dealing with two symbols defined in the same section.
1294 Let us fix-up them here. */
1295 value += S_GET_VALUE (fixp->fx_addsy);
1296 value -= S_GET_VALUE (fixp->fx_subsy);
1298 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1299 only takes it's second operands for the fixup value. */
1300 fixp->fx_addsy = NULL;
1301 fixp->fx_subsy = NULL;
1302 md_apply_fix (fixp, (valueT *) &value, NULL);
1307 reloc = xmalloc (sizeof (arelent));
1309 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1310 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1312 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1313 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1314 if (reloc->howto == (reloc_howto_type *) NULL)
1316 as_bad_where (fixp->fx_file, fixp->fx_line,
1317 _("reloc %d not supported by object file format"),
1318 (int) fixp->fx_r_type);
1322 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1323 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1324 reloc->address = fixp->fx_offset;
1326 reloc->addend = fixp->fx_offset;
1332 md_assemble (char *str)
1334 struct avr_opcodes_s *opcode;
1337 str = skip_space (extract_word (str, op, sizeof (op)));
1340 as_bad (_("can't find opcode "));
1342 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1346 as_bad (_("unknown opcode `%s'"), op);
1350 /* Special case for opcodes with optional operands (lpm, elpm) -
1351 version with operands exists in avr_opcodes[] in the next entry. */
1353 if (*str && *opcode->constraints == '?')
1356 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1357 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1359 /* We used to set input_line_pointer to the result of get_operands,
1360 but that is wrong. Our caller assumes we don't change it. */
1362 char *t = input_line_pointer;
1364 avr_operands (opcode, &str);
1365 if (*skip_space (str))
1366 as_bad (_("garbage at end of line"));
1367 input_line_pointer = t;
1371 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1372 `avr_cons_fix_new'. */
1373 static int exp_mod_pm = 0;
1375 /* Parse special CONS expression: pm (expression)
1376 or alternatively: gs (expression).
1377 These are used for addressing program memory.
1378 Relocation: BFD_RELOC_AVR_16_PM. */
1381 avr_parse_cons_expression (expressionS *exp, int nbytes)
1387 tmp = input_line_pointer = skip_space (input_line_pointer);
1391 char *pm_name1 = "pm";
1392 char *pm_name2 = "gs";
1393 int len = strlen (pm_name1);
1394 /* len must be the same for both pm identifiers. */
1396 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1397 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1399 input_line_pointer = skip_space (input_line_pointer + len);
1401 if (*input_line_pointer == '(')
1403 input_line_pointer = skip_space (input_line_pointer + 1);
1407 if (*input_line_pointer == ')')
1408 ++input_line_pointer;
1411 as_bad (_("`)' required"));
1418 input_line_pointer = tmp;
1426 avr_cons_fix_new (fragS *frag,
1431 if (exp_mod_pm == 0)
1434 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1435 else if (nbytes == 4)
1436 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1438 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1443 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1445 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);