1 /* tc-avr.c -- Assembler code for the ATMEL AVR
3 Copyright 1999, 2000, 2001, 2002, 2004, 2005, 2006, 2007, 2008
4 Free Software Foundation, Inc.
5 Contributed by Denis Chertykov <denisc@overta.ru>
7 This file is part of GAS, the GNU Assembler.
9 GAS is free software; you can redistribute it and/or modify
10 it under the terms of the GNU General Public License as published by
11 the Free Software Foundation; either version 3, or (at your option)
14 GAS is distributed in the hope that it will be useful,
15 but WITHOUT ANY WARRANTY; without even the implied warranty of
16 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 GNU General Public License for more details.
19 You should have received a copy of the GNU General Public License
20 along with GAS; see the file COPYING. If not, write to
21 the Free Software Foundation, 51 Franklin Street - Fifth Floor,
22 Boston, MA 02110-1301, USA. */
25 #include "safe-ctype.h"
32 int insn_size; /* In words. */
34 unsigned int bin_opcode;
37 #define AVR_INSN(NAME, CONSTR, OPCODE, SIZE, ISA, BIN) \
38 {#NAME, CONSTR, SIZE, ISA, BIN},
40 struct avr_opcodes_s avr_opcodes[] =
42 #include "opcode/avr.h"
46 const char comment_chars[] = ";";
47 const char line_comment_chars[] = "#";
48 const char line_separator_chars[] = "$";
50 const char *md_shortopts = "m:";
58 /* XXX - devices that don't seem to exist (renamed, replaced with larger
59 ones, or planned but never produced), left here for compatibility.
60 TODO: hide them in show_mcu_list output? */
62 static struct mcu_type_s mcu_types[] =
64 {"avr1", AVR_ISA_TINY1, bfd_mach_avr1},
65 {"avr2", AVR_ISA_TINY2, bfd_mach_avr2},
66 {"avr3", AVR_ISA_AVR3, bfd_mach_avr3},
67 {"avr4", AVR_ISA_M8, bfd_mach_avr4},
68 {"avr5", AVR_ISA_ALL, bfd_mach_avr5},
69 {"avr6", AVR_ISA_ALL, bfd_mach_avr6},
70 {"at90s1200", AVR_ISA_1200, bfd_mach_avr1},
71 {"attiny11", AVR_ISA_TINY1, bfd_mach_avr1},
72 {"attiny12", AVR_ISA_TINY1, bfd_mach_avr1},
73 {"attiny15", AVR_ISA_TINY1, bfd_mach_avr1},
74 {"attiny28", AVR_ISA_TINY1, bfd_mach_avr1},
75 {"at90s2313", AVR_ISA_2xxx, bfd_mach_avr2},
76 {"at90s2323", AVR_ISA_2xxx, bfd_mach_avr2},
77 {"at90s2333", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 4433 */
78 {"at90s2343", AVR_ISA_2xxx, bfd_mach_avr2},
79 {"attiny22", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 2343 */
80 {"attiny26", AVR_ISA_2xxe, bfd_mach_avr2},
81 {"at90s4433", AVR_ISA_2xxx, bfd_mach_avr2},
82 {"at90s4414", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8515 */
83 {"at90s4434", AVR_ISA_2xxx, bfd_mach_avr2}, /* XXX -> 8535 */
84 {"at90s8515", AVR_ISA_2xxx, bfd_mach_avr2},
85 {"at90s8535", AVR_ISA_2xxx, bfd_mach_avr2},
86 {"at90c8534", AVR_ISA_2xxx, bfd_mach_avr2},
87 {"at86rf401", AVR_ISA_RF401, bfd_mach_avr2},
88 {"attiny13", AVR_ISA_TINY2, bfd_mach_avr2},
89 {"attiny2313", AVR_ISA_TINY2, bfd_mach_avr2},
90 {"attiny261", AVR_ISA_TINY2, bfd_mach_avr2},
91 {"attiny461", AVR_ISA_TINY2, bfd_mach_avr2},
92 {"attiny861", AVR_ISA_TINY2, bfd_mach_avr2},
93 {"attiny24", AVR_ISA_TINY2, bfd_mach_avr2},
94 {"attiny44", AVR_ISA_TINY2, bfd_mach_avr2},
95 {"attiny84", AVR_ISA_TINY2, bfd_mach_avr2},
96 {"attiny25", AVR_ISA_TINY2, bfd_mach_avr2},
97 {"attiny45", AVR_ISA_TINY2, bfd_mach_avr2},
98 {"attiny85", AVR_ISA_TINY2, bfd_mach_avr2},
99 {"attiny43u", AVR_ISA_TINY2, bfd_mach_avr2},
100 {"attiny48", AVR_ISA_TINY2, bfd_mach_avr2},
101 {"attiny88", AVR_ISA_TINY2, bfd_mach_avr2},
102 {"atmega103", AVR_ISA_M103, bfd_mach_avr3},
103 {"at43usb320", AVR_ISA_M103, bfd_mach_avr3},
104 {"at43usb355", AVR_ISA_M603, bfd_mach_avr3},
105 {"at76c711", AVR_ISA_M603, bfd_mach_avr3},
106 {"at90usb82", AVR_ISA_USB162, bfd_mach_avr3},
107 {"at90usb162", AVR_ISA_USB162, bfd_mach_avr3},
108 {"attiny167", AVR_ISA_TINY3, bfd_mach_avr3},
109 {"atmega48", AVR_ISA_PWMx, bfd_mach_avr4},
110 {"atmega48p", AVR_ISA_PWMx, bfd_mach_avr4},
111 {"atmega8", AVR_ISA_M8, bfd_mach_avr4},
112 {"atmega88", AVR_ISA_PWMx, bfd_mach_avr4},
113 {"atmega88p", AVR_ISA_PWMx, bfd_mach_avr4},
114 {"atmega8515", AVR_ISA_M8, bfd_mach_avr4},
115 {"atmega8535", AVR_ISA_M8, bfd_mach_avr4},
116 {"atmega8hva", AVR_ISA_PWMx, bfd_mach_avr4},
117 {"at90pwm1", AVR_ISA_PWMx, bfd_mach_avr4},
118 {"at90pwm2", AVR_ISA_PWMx, bfd_mach_avr4},
119 {"at90pwm2b", AVR_ISA_PWMx, bfd_mach_avr4},
120 {"at90pwm3", AVR_ISA_PWMx, bfd_mach_avr4},
121 {"at90pwm3b", AVR_ISA_PWMx, bfd_mach_avr4},
122 {"atmega16", AVR_ISA_M323, bfd_mach_avr5},
123 {"atmega161", AVR_ISA_M161, bfd_mach_avr5},
124 {"atmega162", AVR_ISA_M323, bfd_mach_avr5},
125 {"atmega163", AVR_ISA_M161, bfd_mach_avr5},
126 {"atmega164p", AVR_ISA_M323, bfd_mach_avr5},
127 {"atmega165", AVR_ISA_M323, bfd_mach_avr5},
128 {"atmega165p", AVR_ISA_M323, bfd_mach_avr5},
129 {"atmega168", AVR_ISA_M323, bfd_mach_avr5},
130 {"atmega168p", AVR_ISA_M323, bfd_mach_avr5},
131 {"atmega169", AVR_ISA_M323, bfd_mach_avr5},
132 {"atmega169p", AVR_ISA_M323, bfd_mach_avr5},
133 {"atmega32", AVR_ISA_M323, bfd_mach_avr5},
134 {"atmega323", AVR_ISA_M323, bfd_mach_avr5},
135 {"atmega324p", AVR_ISA_M323, bfd_mach_avr5},
136 {"atmega325", AVR_ISA_M323, bfd_mach_avr5},
137 {"atmega325p", AVR_ISA_M323, bfd_mach_avr5},
138 {"atmega328p", AVR_ISA_M323, bfd_mach_avr5},
139 {"atmega329", AVR_ISA_M323, bfd_mach_avr5},
140 {"atmega329p", AVR_ISA_M323, bfd_mach_avr5},
141 {"atmega3250", AVR_ISA_M323, bfd_mach_avr5},
142 {"atmega3250p",AVR_ISA_M323, bfd_mach_avr5},
143 {"atmega3290", AVR_ISA_M323, bfd_mach_avr5},
144 {"atmega3290p",AVR_ISA_M323, bfd_mach_avr5},
145 {"atmega32hvb",AVR_ISA_M323, bfd_mach_avr5},
146 {"atmega406", AVR_ISA_M323, bfd_mach_avr5},
147 {"atmega64", AVR_ISA_M323, bfd_mach_avr5},
148 {"atmega640", AVR_ISA_M323, bfd_mach_avr5},
149 {"atmega644", AVR_ISA_M323, bfd_mach_avr5},
150 {"atmega644p", AVR_ISA_M323, bfd_mach_avr5},
151 {"atmega128", AVR_ISA_M128, bfd_mach_avr5},
152 {"atmega1280", AVR_ISA_M128, bfd_mach_avr5},
153 {"atmega1281", AVR_ISA_M128, bfd_mach_avr5},
154 {"atmega1284p",AVR_ISA_M128, bfd_mach_avr5},
155 {"atmega645", AVR_ISA_M323, bfd_mach_avr5},
156 {"atmega649", AVR_ISA_M323, bfd_mach_avr5},
157 {"atmega6450", AVR_ISA_M323, bfd_mach_avr5},
158 {"atmega6490", AVR_ISA_M323, bfd_mach_avr5},
159 {"atmega16hva",AVR_ISA_M323, bfd_mach_avr5},
160 {"at90can32" , AVR_ISA_M323, bfd_mach_avr5},
161 {"at90can64" , AVR_ISA_M323, bfd_mach_avr5},
162 {"at90can128", AVR_ISA_M128, bfd_mach_avr5},
163 {"at90pwm216", AVR_ISA_M323, bfd_mach_avr5},
164 {"at90pwm316", AVR_ISA_M323, bfd_mach_avr5},
165 {"atmega32c1", AVR_ISA_M323, bfd_mach_avr5},
166 {"atmega32m1", AVR_ISA_M323, bfd_mach_avr5},
167 {"atmega32u4", AVR_ISA_M323, bfd_mach_avr5},
168 {"at90usb646", AVR_ISA_M323, bfd_mach_avr5},
169 {"at90usb647", AVR_ISA_M323, bfd_mach_avr5},
170 {"at90usb1286",AVR_ISA_M128, bfd_mach_avr5},
171 {"at90usb1287",AVR_ISA_M128, bfd_mach_avr5},
172 {"at94k", AVR_ISA_94K, bfd_mach_avr5},
173 {"atmega2560", AVR_ISA_ALL, bfd_mach_avr6},
174 {"atmega2561", AVR_ISA_ALL, bfd_mach_avr6},
178 /* Current MCU type. */
179 static struct mcu_type_s default_mcu = {"avr2", AVR_ISA_2xxx,bfd_mach_avr2};
180 static struct mcu_type_s * avr_mcu = & default_mcu;
182 /* AVR target-specific switches. */
185 int all_opcodes; /* -mall-opcodes: accept all known AVR opcodes. */
186 int no_skip_bug; /* -mno-skip-bug: no warnings for skipping 2-word insns. */
187 int no_wrap; /* -mno-wrap: reject rjmp/rcall with 8K wrap-around. */
190 static struct avr_opt_s avr_opt = { 0, 0, 0 };
192 const char EXP_CHARS[] = "eE";
193 const char FLT_CHARS[] = "dD";
195 static void avr_set_arch (int);
197 /* The target specific pseudo-ops which we support. */
198 const pseudo_typeS md_pseudo_table[] =
200 {"arch", avr_set_arch, 0},
204 #define LDI_IMMEDIATE(x) (((x) & 0xf) | (((x) << 4) & 0xf00))
206 #define EXP_MOD_NAME(i) exp_mod[i].name
207 #define EXP_MOD_RELOC(i) exp_mod[i].reloc
208 #define EXP_MOD_NEG_RELOC(i) exp_mod[i].neg_reloc
209 #define HAVE_PM_P(i) exp_mod[i].have_pm
214 bfd_reloc_code_real_type reloc;
215 bfd_reloc_code_real_type neg_reloc;
219 static struct exp_mod_s exp_mod[] =
221 {"hh8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 1},
222 {"pm_hh8", BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM_NEG, 0},
223 {"hi8", BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI_NEG, 1},
224 {"pm_hi8", BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM_NEG, 0},
225 {"lo8", BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI_NEG, 1},
226 {"pm_lo8", BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM_NEG, 0},
227 {"hlo8", BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI_NEG, 0},
228 {"hhi8", BFD_RELOC_AVR_MS8_LDI, BFD_RELOC_AVR_MS8_LDI_NEG, 0},
231 /* A union used to store indicies into the exp_mod[] array
232 in a hash table which expects void * data types. */
239 /* Opcode hash table. */
240 static struct hash_control *avr_hash;
242 /* Reloc modifiers hash control (hh8,hi8,lo8,pm_xx). */
243 static struct hash_control *avr_mod_hash;
245 #define OPTION_MMCU 'm'
248 OPTION_ALL_OPCODES = OPTION_MD_BASE + 1,
253 struct option md_longopts[] =
255 { "mmcu", required_argument, NULL, OPTION_MMCU },
256 { "mall-opcodes", no_argument, NULL, OPTION_ALL_OPCODES },
257 { "mno-skip-bug", no_argument, NULL, OPTION_NO_SKIP_BUG },
258 { "mno-wrap", no_argument, NULL, OPTION_NO_WRAP },
259 { NULL, no_argument, NULL, 0 }
262 size_t md_longopts_size = sizeof (md_longopts);
264 /* Display nicely formatted list of known MCU names. */
267 show_mcu_list (FILE *stream)
271 fprintf (stream, _("Known MCU names:"));
274 for (i = 0; mcu_types[i].name; i++)
276 int len = strlen (mcu_types[i].name);
281 fprintf (stream, " %s", mcu_types[i].name);
284 fprintf (stream, "\n %s", mcu_types[i].name);
289 fprintf (stream, "\n");
295 while (*s == ' ' || *s == '\t')
300 /* Extract one word from FROM and copy it to TO. */
303 extract_word (char *from, char *to, int limit)
309 /* Drop leading whitespace. */
310 from = skip_space (from);
313 /* Find the op code end. */
314 for (op_start = op_end = from; *op_end != 0 && is_part_of_name (*op_end);)
316 to[size++] = *op_end++;
317 if (size + 1 >= limit)
326 md_estimate_size_before_relax (fragS *fragp ATTRIBUTE_UNUSED,
327 asection *seg ATTRIBUTE_UNUSED)
334 md_show_usage (FILE *stream)
338 " -mmcu=[avr-name] select microcontroller variant\n"
339 " [avr-name] can be:\n"
340 " avr1 - AT90S1200, ATtiny1x, ATtiny28\n"
341 " avr2 - AT90S2xxx, AT90S4xxx, AT90S8xxx, ATtiny22\n"
342 " avr3 - ATmega103\n"
343 " avr4 - ATmega8, ATmega88\n"
344 " avr5 - ATmega161, ATmega163, ATmega32, AT94K\n"
345 " or immediate microcontroller name.\n"));
347 _(" -mall-opcodes accept all AVR opcodes, even if not supported by MCU\n"
348 " -mno-skip-bug disable warnings for skipping two-word instructions\n"
349 " (default for avr4, avr5)\n"
350 " -mno-wrap reject rjmp/rcall instructions with 8K wrap-around\n"
351 " (default for avr3, avr5)\n"));
352 show_mcu_list (stream);
356 avr_set_arch (int dummy ATTRIBUTE_UNUSED)
360 input_line_pointer = extract_word (input_line_pointer, str, 20);
361 md_parse_option (OPTION_MMCU, str);
362 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
366 md_parse_option (int c, char *arg)
373 char *s = alloca (strlen (arg) + 1);
380 *t = TOLOWER (*arg1++);
384 for (i = 0; mcu_types[i].name; ++i)
385 if (strcmp (mcu_types[i].name, s) == 0)
388 if (!mcu_types[i].name)
390 show_mcu_list (stderr);
391 as_fatal (_("unknown MCU: %s\n"), arg);
394 /* It is OK to redefine mcu type within the same avr[1-5] bfd machine
395 type - this for allows passing -mmcu=... via gcc ASM_SPEC as well
396 as .arch ... in the asm output at the same time. */
397 if (avr_mcu == &default_mcu || avr_mcu->mach == mcu_types[i].mach)
398 avr_mcu = &mcu_types[i];
400 as_fatal (_("redefinition of mcu type `%s' to `%s'"),
401 avr_mcu->name, mcu_types[i].name);
404 case OPTION_ALL_OPCODES:
405 avr_opt.all_opcodes = 1;
407 case OPTION_NO_SKIP_BUG:
408 avr_opt.no_skip_bug = 1;
419 md_undefined_symbol (char *name ATTRIBUTE_UNUSED)
425 md_atof (int type, char *litP, int *sizeP)
427 return ieee_md_atof (type, litP, sizeP, FALSE);
431 md_convert_frag (bfd *abfd ATTRIBUTE_UNUSED,
432 asection *sec ATTRIBUTE_UNUSED,
433 fragS *fragP ATTRIBUTE_UNUSED)
442 struct avr_opcodes_s *opcode;
444 avr_hash = hash_new ();
446 /* Insert unique names into hash table. This hash table then provides a
447 quick index to the first opcode with a particular name in the opcode
449 for (opcode = avr_opcodes; opcode->name; opcode++)
450 hash_insert (avr_hash, opcode->name, (char *) opcode);
452 avr_mod_hash = hash_new ();
454 for (i = 0; i < ARRAY_SIZE (exp_mod); ++i)
459 hash_insert (avr_mod_hash, EXP_MOD_NAME (i), m.ptr);
462 bfd_set_arch_mach (stdoutput, TARGET_ARCH, avr_mcu->mach);
465 /* Resolve STR as a constant expression and return the result.
466 If result greater than MAX then error. */
469 avr_get_constant (char *str, int max)
473 str = skip_space (str);
474 input_line_pointer = str;
477 if (ex.X_op != O_constant)
478 as_bad (_("constant value required"));
480 if (ex.X_add_number > max || ex.X_add_number < 0)
481 as_bad (_("number must be positive and less than %d"), max + 1);
483 return ex.X_add_number;
486 /* Parse for ldd/std offset. */
489 avr_offset_expression (expressionS *exp)
491 char *str = input_line_pointer;
496 str = extract_word (str, op, sizeof (op));
498 input_line_pointer = tmp;
501 /* Warn about expressions that fail to use lo8 (). */
502 if (exp->X_op == O_constant)
504 int x = exp->X_add_number;
506 if (x < -255 || x > 255)
507 as_warn (_("constant out of 8-bit range: %d"), x);
511 /* Parse ordinary expression. */
514 parse_exp (char *s, expressionS *op)
516 input_line_pointer = s;
518 if (op->X_op == O_absent)
519 as_bad (_("missing operand"));
520 return input_line_pointer;
523 /* Parse special expressions (needed for LDI command):
528 where xx is: hh, hi, lo. */
530 static bfd_reloc_code_real_type
531 avr_ldi_expression (expressionS *exp)
533 char *str = input_line_pointer;
537 int linker_stubs_should_be_generated = 0;
541 str = extract_word (str, op, sizeof (op));
547 m.ptr = hash_find (avr_mod_hash, op);
555 str = skip_space (str);
559 bfd_reloc_code_real_type reloc_to_return;
564 if (strncmp ("pm(", str, 3) == 0
565 || strncmp ("gs(",str,3) == 0
566 || strncmp ("-(gs(",str,5) == 0
567 || strncmp ("-(pm(", str, 5) == 0)
575 as_bad (_("illegal expression"));
577 if (str[0] == 'g' || str[2] == 'g')
578 linker_stubs_should_be_generated = 1;
590 if (*str == '-' && *(str + 1) == '(')
597 input_line_pointer = str;
602 if (*input_line_pointer != ')')
604 as_bad (_("`)' required"));
607 input_line_pointer++;
612 neg_p ? EXP_MOD_NEG_RELOC (mod) : EXP_MOD_RELOC (mod);
613 if (linker_stubs_should_be_generated)
615 switch (reloc_to_return)
617 case BFD_RELOC_AVR_LO8_LDI_PM:
618 reloc_to_return = BFD_RELOC_AVR_LO8_LDI_GS;
620 case BFD_RELOC_AVR_HI8_LDI_PM:
621 reloc_to_return = BFD_RELOC_AVR_HI8_LDI_GS;
625 /* PR 5523: Do not generate a warning here,
626 legitimate code can trigger this case. */
630 return reloc_to_return;
635 input_line_pointer = tmp;
638 /* Warn about expressions that fail to use lo8 (). */
639 if (exp->X_op == O_constant)
641 int x = exp->X_add_number;
643 if (x < -255 || x > 255)
644 as_warn (_("constant out of 8-bit range: %d"), x);
647 return BFD_RELOC_AVR_LDI;
650 /* Parse one instruction operand.
651 Return operand bitmask. Also fixups can be generated. */
654 avr_operand (struct avr_opcodes_s *opcode,
660 unsigned int op_mask = 0;
661 char *str = skip_space (*line);
665 /* Any register operand. */
671 if (*str == 'r' || *str == 'R')
675 str = extract_word (str, r_name, sizeof (r_name));
677 if (ISDIGIT (r_name[1]))
679 if (r_name[2] == '\0')
680 op_mask = r_name[1] - '0';
681 else if (r_name[1] != '0'
682 && ISDIGIT (r_name[2])
683 && r_name[3] == '\0')
684 op_mask = (r_name[1] - '0') * 10 + r_name[2] - '0';
689 op_mask = avr_get_constant (str, 31);
690 str = input_line_pointer;
698 if (op_mask < 16 || op_mask > 23)
699 as_bad (_("register r16-r23 required"));
705 as_bad (_("register number above 15 required"));
711 as_bad (_("even register number required"));
716 if ((op_mask & 1) || op_mask < 24)
717 as_bad (_("register r24, r26, r28 or r30 required"));
718 op_mask = (op_mask - 24) >> 1;
723 as_bad (_("register name or number from 0 to 31 required"));
732 str = skip_space (str + 1);
741 as_bad (_("pointer register (X, Y or Z) required"));
743 str = skip_space (str + 1);
748 as_bad (_("cannot both predecrement and postincrement"));
752 /* avr1 can do "ld r,Z" and "st Z,r" but no other pointer
753 registers, no predecrement, no postincrement. */
754 if (!avr_opt.all_opcodes && (op_mask & 0x100F)
755 && !(avr_mcu->isa & AVR_ISA_SRAM))
756 as_bad (_("addressing mode not supported"));
762 as_bad (_("can't predecrement"));
764 if (! (*str == 'z' || *str == 'Z'))
765 as_bad (_("pointer register Z required"));
767 str = skip_space (str + 1);
775 /* attiny26 can do "lpm" and "lpm r,Z" but not "lpm r,Z+". */
776 if (!avr_opt.all_opcodes
777 && (op_mask & 0x0001)
778 && !(avr_mcu->isa & AVR_ISA_MOVW))
779 as_bad (_("postincrement not supported"));
784 char c = TOLOWER (*str++);
789 as_bad (_("pointer register (Y or Z) required"));
790 str = skip_space (str);
793 input_line_pointer = str;
794 avr_offset_expression (& op_expr);
795 str = input_line_pointer;
796 fix_new_exp (frag_now, where, 3,
797 &op_expr, FALSE, BFD_RELOC_AVR_6);
803 str = parse_exp (str, &op_expr);
804 fix_new_exp (frag_now, where, opcode->insn_size * 2,
805 &op_expr, FALSE, BFD_RELOC_AVR_CALL);
809 str = parse_exp (str, &op_expr);
810 fix_new_exp (frag_now, where, opcode->insn_size * 2,
811 &op_expr, TRUE, BFD_RELOC_AVR_13_PCREL);
815 str = parse_exp (str, &op_expr);
816 fix_new_exp (frag_now, where, opcode->insn_size * 2,
817 &op_expr, TRUE, BFD_RELOC_AVR_7_PCREL);
821 str = parse_exp (str, &op_expr);
822 fix_new_exp (frag_now, where + 2, opcode->insn_size * 2,
823 &op_expr, FALSE, BFD_RELOC_16);
828 bfd_reloc_code_real_type r_type;
830 input_line_pointer = str;
831 r_type = avr_ldi_expression (&op_expr);
832 str = input_line_pointer;
833 fix_new_exp (frag_now, where, 3,
834 &op_expr, FALSE, r_type);
842 x = ~avr_get_constant (str, 255);
843 str = input_line_pointer;
844 op_mask |= (x & 0xf) | ((x << 4) & 0xf00);
849 input_line_pointer = str;
850 avr_offset_expression (& op_expr);
851 str = input_line_pointer;
852 fix_new_exp (frag_now, where, 3,
853 & op_expr, FALSE, BFD_RELOC_AVR_6_ADIW);
861 x = avr_get_constant (str, 7);
862 str = input_line_pointer;
873 x = avr_get_constant (str, 63);
874 str = input_line_pointer;
875 op_mask |= (x & 0xf) | ((x & 0x30) << 5);
883 x = avr_get_constant (str, 31);
884 str = input_line_pointer;
893 as_bad (_("unknown constraint `%c'"), *op);
900 /* Parse instruction operands.
901 Return binary opcode. */
904 avr_operands (struct avr_opcodes_s *opcode, char **line)
906 char *op = opcode->constraints;
907 unsigned int bin = opcode->bin_opcode;
908 char *frag = frag_more (opcode->insn_size * 2);
910 int where = frag - frag_now->fr_literal;
911 static unsigned int prev = 0; /* Previous opcode. */
913 /* Opcode have operands. */
916 unsigned int reg1 = 0;
917 unsigned int reg2 = 0;
918 int reg1_present = 0;
919 int reg2_present = 0;
921 /* Parse first operand. */
922 if (REGISTER_P (*op))
924 reg1 = avr_operand (opcode, where, op, &str);
927 /* Parse second operand. */
940 if (REGISTER_P (*op))
943 str = skip_space (str);
945 as_bad (_("`,' required"));
946 str = skip_space (str);
948 reg2 = avr_operand (opcode, where, op, &str);
951 if (reg1_present && reg2_present)
952 reg2 = (reg2 & 0xf) | ((reg2 << 5) & 0x200);
953 else if (reg2_present)
961 /* Detect undefined combinations (like ld r31,Z+). */
962 if (!avr_opt.all_opcodes && AVR_UNDEF_P (bin))
963 as_warn (_("undefined combination of operands"));
965 if (opcode->insn_size == 2)
967 /* Warn if the previous opcode was cpse/sbic/sbis/sbrc/sbrs
968 (AVR core bug, fixed in the newer devices). */
969 if (!(avr_opt.no_skip_bug ||
970 (avr_mcu->isa & (AVR_ISA_MUL | AVR_ISA_MOVW)))
971 && AVR_SKIP_P (prev))
972 as_warn (_("skipping two-word instruction"));
974 bfd_putl32 ((bfd_vma) bin, frag);
977 bfd_putl16 ((bfd_vma) bin, frag);
984 /* GAS will call this function for each section at the end of the assembly,
985 to permit the CPU backend to adjust the alignment of a section. */
988 md_section_align (asection *seg, valueT addr)
990 int align = bfd_get_section_alignment (stdoutput, seg);
991 return ((addr + (1 << align) - 1) & (-1 << align));
994 /* If you define this macro, it should return the offset between the
995 address of a PC relative fixup and the position from which the PC
996 relative adjustment should be made. On many processors, the base
997 of a PC relative instruction is the next instruction, so this
998 macro would return the length of an instruction. */
1001 md_pcrel_from_section (fixS *fixp, segT sec)
1003 if (fixp->fx_addsy != (symbolS *) NULL
1004 && (!S_IS_DEFINED (fixp->fx_addsy)
1005 || (S_GET_SEGMENT (fixp->fx_addsy) != sec)))
1008 return fixp->fx_frag->fr_address + fixp->fx_where;
1011 /* GAS will call this for each fixup. It should store the correct
1012 value in the object file. */
1015 md_apply_fix (fixS *fixP, valueT * valP, segT seg)
1017 unsigned char *where;
1021 if (fixP->fx_addsy == (symbolS *) NULL)
1024 else if (fixP->fx_pcrel)
1026 segT s = S_GET_SEGMENT (fixP->fx_addsy);
1028 if (s == seg || s == absolute_section)
1030 value += S_GET_VALUE (fixP->fx_addsy);
1035 /* We don't actually support subtracting a symbol. */
1036 if (fixP->fx_subsy != (symbolS *) NULL)
1037 as_bad_where (fixP->fx_file, fixP->fx_line, _("expression too complex"));
1039 switch (fixP->fx_r_type)
1042 fixP->fx_no_overflow = 1;
1044 case BFD_RELOC_AVR_7_PCREL:
1045 case BFD_RELOC_AVR_13_PCREL:
1048 case BFD_RELOC_AVR_CALL:
1054 /* Fetch the instruction, insert the fully resolved operand
1055 value, and stuff the instruction back again. */
1056 where = (unsigned char *) fixP->fx_frag->fr_literal + fixP->fx_where;
1057 insn = bfd_getl16 (where);
1059 switch (fixP->fx_r_type)
1061 case BFD_RELOC_AVR_7_PCREL:
1063 as_bad_where (fixP->fx_file, fixP->fx_line,
1064 _("odd address operand: %ld"), value);
1066 /* Instruction addresses are always right-shifted by 1. */
1068 --value; /* Correct PC. */
1070 if (value < -64 || value > 63)
1071 as_bad_where (fixP->fx_file, fixP->fx_line,
1072 _("operand out of range: %ld"), value);
1073 value = (value << 3) & 0x3f8;
1074 bfd_putl16 ((bfd_vma) (value | insn), where);
1077 case BFD_RELOC_AVR_13_PCREL:
1079 as_bad_where (fixP->fx_file, fixP->fx_line,
1080 _("odd address operand: %ld"), value);
1082 /* Instruction addresses are always right-shifted by 1. */
1084 --value; /* Correct PC. */
1086 if (value < -2048 || value > 2047)
1088 /* No wrap for devices with >8K of program memory. */
1089 if ((avr_mcu->isa & AVR_ISA_MEGA) || avr_opt.no_wrap)
1090 as_bad_where (fixP->fx_file, fixP->fx_line,
1091 _("operand out of range: %ld"), value);
1095 bfd_putl16 ((bfd_vma) (value | insn), where);
1099 bfd_putl16 ((bfd_vma) value, where);
1103 bfd_putl16 ((bfd_vma) value, where);
1106 case BFD_RELOC_AVR_16_PM:
1107 bfd_putl16 ((bfd_vma) (value >> 1), where);
1110 case BFD_RELOC_AVR_LDI:
1112 as_bad_where (fixP->fx_file, fixP->fx_line,
1113 _("operand out of range: %ld"), value);
1114 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1117 case BFD_RELOC_AVR_6:
1118 if ((value > 63) || (value < 0))
1119 as_bad_where (fixP->fx_file, fixP->fx_line,
1120 _("operand out of range: %ld"), value);
1121 bfd_putl16 ((bfd_vma) insn | ((value & 7) | ((value & (3 << 3)) << 7) | ((value & (1 << 5)) << 8)), where);
1124 case BFD_RELOC_AVR_6_ADIW:
1125 if ((value > 63) || (value < 0))
1126 as_bad_where (fixP->fx_file, fixP->fx_line,
1127 _("operand out of range: %ld"), value);
1128 bfd_putl16 ((bfd_vma) insn | (value & 0xf) | ((value & 0x30) << 2), where);
1131 case BFD_RELOC_AVR_LO8_LDI:
1132 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value), where);
1135 case BFD_RELOC_AVR_HI8_LDI:
1136 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 8), where);
1139 case BFD_RELOC_AVR_MS8_LDI:
1140 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 24), where);
1143 case BFD_RELOC_AVR_HH8_LDI:
1144 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 16), where);
1147 case BFD_RELOC_AVR_LO8_LDI_NEG:
1148 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value), where);
1151 case BFD_RELOC_AVR_HI8_LDI_NEG:
1152 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 8), where);
1155 case BFD_RELOC_AVR_MS8_LDI_NEG:
1156 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 24), where);
1159 case BFD_RELOC_AVR_HH8_LDI_NEG:
1160 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 16), where);
1163 case BFD_RELOC_AVR_LO8_LDI_PM:
1164 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 1), where);
1167 case BFD_RELOC_AVR_HI8_LDI_PM:
1168 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 9), where);
1171 case BFD_RELOC_AVR_HH8_LDI_PM:
1172 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (value >> 17), where);
1175 case BFD_RELOC_AVR_LO8_LDI_PM_NEG:
1176 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 1), where);
1179 case BFD_RELOC_AVR_HI8_LDI_PM_NEG:
1180 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 9), where);
1183 case BFD_RELOC_AVR_HH8_LDI_PM_NEG:
1184 bfd_putl16 ((bfd_vma) insn | LDI_IMMEDIATE (-value >> 17), where);
1187 case BFD_RELOC_AVR_CALL:
1191 x = bfd_getl16 (where);
1193 as_bad_where (fixP->fx_file, fixP->fx_line,
1194 _("odd address operand: %ld"), value);
1196 x |= ((value & 0x10000) | ((value << 3) & 0x1f00000)) >> 16;
1197 bfd_putl16 ((bfd_vma) x, where);
1198 bfd_putl16 ((bfd_vma) (value & 0xffff), where + 2);
1203 as_fatal (_("line %d: unknown relocation type: 0x%x"),
1204 fixP->fx_line, fixP->fx_r_type);
1210 switch (fixP->fx_r_type)
1212 case -BFD_RELOC_AVR_HI8_LDI_NEG:
1213 case -BFD_RELOC_AVR_HI8_LDI:
1214 case -BFD_RELOC_AVR_LO8_LDI_NEG:
1215 case -BFD_RELOC_AVR_LO8_LDI:
1216 as_bad_where (fixP->fx_file, fixP->fx_line,
1217 _("only constant expression allowed"));
1226 /* GAS will call this to generate a reloc, passing the resulting reloc
1227 to `bfd_install_relocation'. This currently works poorly, as
1228 `bfd_install_relocation' often does the wrong thing, and instances of
1229 `tc_gen_reloc' have been written to work around the problems, which
1230 in turns makes it difficult to fix `bfd_install_relocation'. */
1232 /* If while processing a fixup, a reloc really needs to be created
1233 then it is done here. */
1236 tc_gen_reloc (asection *seg ATTRIBUTE_UNUSED,
1241 if (fixp->fx_addsy && fixp->fx_subsy)
1245 if ((S_GET_SEGMENT (fixp->fx_addsy) != S_GET_SEGMENT (fixp->fx_subsy))
1246 || S_GET_SEGMENT (fixp->fx_addsy) == undefined_section)
1248 as_bad_where (fixp->fx_file, fixp->fx_line,
1249 "Difference of symbols in different sections is not supported");
1253 /* We are dealing with two symbols defined in the same section.
1254 Let us fix-up them here. */
1255 value += S_GET_VALUE (fixp->fx_addsy);
1256 value -= S_GET_VALUE (fixp->fx_subsy);
1258 /* When fx_addsy and fx_subsy both are zero, md_apply_fix
1259 only takes it's second operands for the fixup value. */
1260 fixp->fx_addsy = NULL;
1261 fixp->fx_subsy = NULL;
1262 md_apply_fix (fixp, (valueT *) &value, NULL);
1267 reloc = xmalloc (sizeof (arelent));
1269 reloc->sym_ptr_ptr = xmalloc (sizeof (asymbol *));
1270 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1272 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1273 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1274 if (reloc->howto == (reloc_howto_type *) NULL)
1276 as_bad_where (fixp->fx_file, fixp->fx_line,
1277 _("reloc %d not supported by object file format"),
1278 (int) fixp->fx_r_type);
1282 if (fixp->fx_r_type == BFD_RELOC_VTABLE_INHERIT
1283 || fixp->fx_r_type == BFD_RELOC_VTABLE_ENTRY)
1284 reloc->address = fixp->fx_offset;
1286 reloc->addend = fixp->fx_offset;
1292 md_assemble (char *str)
1294 struct avr_opcodes_s *opcode;
1297 str = skip_space (extract_word (str, op, sizeof (op)));
1300 as_bad (_("can't find opcode "));
1302 opcode = (struct avr_opcodes_s *) hash_find (avr_hash, op);
1306 as_bad (_("unknown opcode `%s'"), op);
1310 /* Special case for opcodes with optional operands (lpm, elpm) -
1311 version with operands exists in avr_opcodes[] in the next entry. */
1313 if (*str && *opcode->constraints == '?')
1316 if (!avr_opt.all_opcodes && (opcode->isa & avr_mcu->isa) != opcode->isa)
1317 as_bad (_("illegal opcode %s for mcu %s"), opcode->name, avr_mcu->name);
1319 /* We used to set input_line_pointer to the result of get_operands,
1320 but that is wrong. Our caller assumes we don't change it. */
1322 char *t = input_line_pointer;
1324 avr_operands (opcode, &str);
1325 if (*skip_space (str))
1326 as_bad (_("garbage at end of line"));
1327 input_line_pointer = t;
1331 /* Flag to pass `pm' mode between `avr_parse_cons_expression' and
1332 `avr_cons_fix_new'. */
1333 static int exp_mod_pm = 0;
1335 /* Parse special CONS expression: pm (expression)
1336 or alternatively: gs (expression).
1337 These are used for addressing program memory.
1338 Relocation: BFD_RELOC_AVR_16_PM. */
1341 avr_parse_cons_expression (expressionS *exp, int nbytes)
1347 tmp = input_line_pointer = skip_space (input_line_pointer);
1351 char *pm_name1 = "pm";
1352 char *pm_name2 = "gs";
1353 int len = strlen (pm_name1);
1354 /* len must be the same for both pm identifiers. */
1356 if (strncasecmp (input_line_pointer, pm_name1, len) == 0
1357 || strncasecmp (input_line_pointer, pm_name2, len) == 0)
1359 input_line_pointer = skip_space (input_line_pointer + len);
1361 if (*input_line_pointer == '(')
1363 input_line_pointer = skip_space (input_line_pointer + 1);
1367 if (*input_line_pointer == ')')
1368 ++input_line_pointer;
1371 as_bad (_("`)' required"));
1378 input_line_pointer = tmp;
1386 avr_cons_fix_new (fragS *frag,
1391 if (exp_mod_pm == 0)
1394 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_16);
1395 else if (nbytes == 4)
1396 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_32);
1398 as_bad (_("illegal %srelocation size: %d"), "", nbytes);
1403 fix_new_exp (frag, where, nbytes, exp, FALSE, BFD_RELOC_AVR_16_PM);
1405 as_bad (_("illegal %srelocation size: %d"), "`pm' ", nbytes);