1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Carnegie Mellon University, 1993.
5 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
6 Modified by Ken Raeburn for gas-2.x and ECOFF support.
7 Modified by Richard Henderson for ELF support.
8 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10 This file is part of GAS, the GNU Assembler.
12 GAS is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GAS is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GAS; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 * Mach Operating System
29 * Copyright (c) 1993 Carnegie Mellon University
30 * All Rights Reserved.
32 * Permission to use, copy, modify and distribute this software and its
33 * documentation is hereby granted, provided that both the copyright
34 * notice and this permission notice appear in all copies of the
35 * software, derivative works or modified versions, and any portions
36 * thereof, and that both notices appear in supporting documentation.
38 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 * Carnegie Mellon requests users of this software to return to
44 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 * School of Computer Science
46 * Carnegie Mellon University
47 * Pittsburgh PA 15213-3890
49 * any improvements or extensions that they make and grant Carnegie the
50 * rights to redistribute these changes.
55 #include "struc-symbol.h"
58 #include "opcode/alpha.h"
61 #include "elf/alpha.h"
62 #include "dwarf2dbg.h"
65 #include "safe-ctype.h"
69 #define TOKENIZE_ERROR -1
70 #define TOKENIZE_ERROR_REPORT -2
72 #define MAX_INSN_FIXUPS 2
73 #define MAX_INSN_ARGS 5
78 bfd_reloc_code_real_type reloc;
85 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
103 void (*emit) PARAMS ((const expressionS *, int, const PTR));
105 enum alpha_macro_arg argsets[16];
108 /* Extra expression types. */
110 #define O_pregister O_md1 /* O_register, in parentheses */
111 #define O_cpregister O_md2 /* + a leading comma */
113 /* The alpha_reloc_op table below depends on the ordering of these. */
114 #define O_literal O_md3 /* !literal relocation */
115 #define O_lituse_addr O_md4 /* !lituse_addr relocation */
116 #define O_lituse_base O_md5 /* !lituse_base relocation */
117 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
118 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
119 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation */
120 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation */
121 #define O_gpdisp O_md10 /* !gpdisp relocation */
122 #define O_gprelhigh O_md11 /* !gprelhigh relocation */
123 #define O_gprellow O_md12 /* !gprellow relocation */
124 #define O_gprel O_md13 /* !gprel relocation */
125 #define O_samegp O_md14 /* !samegp relocation */
126 #define O_tlsgd O_md15 /* !tlsgd relocation */
127 #define O_tlsldm O_md16 /* !tlsldm relocation */
128 #define O_gotdtprel O_md17 /* !gotdtprel relocation */
129 #define O_dtprelhi O_md18 /* !dtprelhi relocation */
130 #define O_dtprello O_md19 /* !dtprello relocation */
131 #define O_dtprel O_md20 /* !dtprel relocation */
132 #define O_gottprel O_md21 /* !gottprel relocation */
133 #define O_tprelhi O_md22 /* !tprelhi relocation */
134 #define O_tprello O_md23 /* !tprello relocation */
135 #define O_tprel O_md24 /* !tprel relocation */
137 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
138 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
139 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
140 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
141 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
142 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
144 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
146 /* Macros for extracting the type and number of encoded register tokens. */
148 #define is_ir_num(x) (((x) & 32) == 0)
149 #define is_fpr_num(x) (((x) & 32) != 0)
150 #define regno(x) ((x) & 31)
152 /* Something odd inherited from the old assembler. */
154 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
155 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
157 /* Predicates for 16- and 32-bit ranges */
158 /* XXX: The non-shift version appears to trigger a compiler bug when
159 cross-assembling from x86 w/ gcc 2.7.2. */
162 #define range_signed_16(x) \
163 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
164 #define range_signed_32(x) \
165 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
167 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
168 (offsetT) (x) <= (offsetT) 0x7FFF)
169 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
170 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
173 /* Macros for sign extending from 16- and 32-bits. */
174 /* XXX: The cast macros will work on all the systems that I care about,
175 but really a predicate should be found to use the non-cast forms. */
178 #define sign_extend_16(x) ((short) (x))
179 #define sign_extend_32(x) ((int) (x))
181 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
182 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
183 ^ 0x80000000) - 0x80000000)
186 /* Macros to build tokens. */
188 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
189 (t).X_op = O_register, \
190 (t).X_add_number = (r))
191 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
192 (t).X_op = O_pregister, \
193 (t).X_add_number = (r))
194 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
195 (t).X_op = O_cpregister, \
196 (t).X_add_number = (r))
197 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
198 (t).X_op = O_register, \
199 (t).X_add_number = (r) + 32)
200 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
201 (t).X_op = O_symbol, \
202 (t).X_add_symbol = (s), \
203 (t).X_add_number = (a))
204 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
205 (t).X_op = O_constant, \
206 (t).X_add_number = (n))
208 /* Prototypes for all local functions. */
210 static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
211 static void alpha_adjust_relocs PARAMS ((bfd *, asection *, PTR));
213 static int tokenize_arguments PARAMS ((char *, expressionS *, int));
214 static const struct alpha_opcode *find_opcode_match
215 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
216 static const struct alpha_macro *find_macro_match
217 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
218 static unsigned insert_operand
219 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
220 static void assemble_insn
221 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
222 struct alpha_insn *, bfd_reloc_code_real_type));
223 static void emit_insn PARAMS ((struct alpha_insn *));
224 static void assemble_tokens_to_insn
225 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
226 static void assemble_tokens
227 PARAMS ((const char *, const expressionS *, int, int));
229 static long load_expression
230 PARAMS ((int, const expressionS *, int *, expressionS *));
232 static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
233 static void emit_division PARAMS ((const expressionS *, int, const PTR));
234 static void emit_lda PARAMS ((const expressionS *, int, const PTR));
235 static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
236 static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
237 static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
238 static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
239 static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
240 static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
241 static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
242 static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
243 static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
244 static void emit_stX PARAMS ((const expressionS *, int, const PTR));
245 static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
246 static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
247 static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
249 static void s_alpha_text PARAMS ((int));
250 static void s_alpha_data PARAMS ((int));
252 static void s_alpha_comm PARAMS ((int));
253 static void s_alpha_rdata PARAMS ((int));
256 static void s_alpha_sdata PARAMS ((int));
259 static void s_alpha_section PARAMS ((int));
260 static void s_alpha_ent PARAMS ((int));
261 static void s_alpha_end PARAMS ((int));
262 static void s_alpha_mask PARAMS ((int));
263 static void s_alpha_frame PARAMS ((int));
264 static void s_alpha_prologue PARAMS ((int));
265 static void s_alpha_file PARAMS ((int));
266 static void s_alpha_loc PARAMS ((int));
267 static void s_alpha_stab PARAMS ((int));
268 static void s_alpha_coff_wrapper PARAMS ((int));
271 static void s_alpha_section PARAMS ((int));
273 static void s_alpha_gprel32 PARAMS ((int));
274 static void s_alpha_float_cons PARAMS ((int));
275 static void s_alpha_proc PARAMS ((int));
276 static void s_alpha_set PARAMS ((int));
277 static void s_alpha_base PARAMS ((int));
278 static void s_alpha_align PARAMS ((int));
279 static void s_alpha_stringer PARAMS ((int));
280 static void s_alpha_space PARAMS ((int));
281 static void s_alpha_ucons PARAMS ((int));
282 static void s_alpha_arch PARAMS ((int));
284 static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
286 static void select_gp_value PARAMS ((void));
288 static void alpha_align PARAMS ((int, char *, symbolS *, int));
290 /* Generic assembler global variables which must be defined by all
293 /* Characters which always start a comment. */
294 const char comment_chars[] = "#";
296 /* Characters which start a comment at the beginning of a line. */
297 const char line_comment_chars[] = "#";
299 /* Characters which may be used to separate multiple commands on a
301 const char line_separator_chars[] = ";";
303 /* Characters which are used to indicate an exponent in a floating
305 const char EXP_CHARS[] = "eE";
307 /* Characters which mean that a number is a floating point constant,
310 const char FLT_CHARS[] = "dD";
312 /* XXX: Do all of these really get used on the alpha?? */
313 char FLT_CHARS[] = "rRsSfFdDxXpP";
317 const char *md_shortopts = "Fm:g+1h:HG:";
319 const char *md_shortopts = "Fm:gG:";
322 struct option md_longopts[] =
324 #define OPTION_32ADDR (OPTION_MD_BASE)
325 { "32addr", no_argument, NULL, OPTION_32ADDR },
326 #define OPTION_RELAX (OPTION_32ADDR + 1)
327 { "relax", no_argument, NULL, OPTION_RELAX },
329 #define OPTION_MDEBUG (OPTION_RELAX + 1)
330 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
331 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
332 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
334 { NULL, no_argument, NULL, 0 }
337 size_t md_longopts_size = sizeof (md_longopts);
341 #define AXP_REG_R16 16
342 #define AXP_REG_R17 17
344 #define AXP_REG_T9 22
346 #define AXP_REG_T10 23
348 #define AXP_REG_T11 24
350 #define AXP_REG_T12 25
351 #define AXP_REG_AI 25
353 #define AXP_REG_FP 29
356 #define AXP_REG_GP AXP_REG_PV
357 #endif /* OBJ_EVAX */
359 /* The cpu for which we are generating code. */
360 static unsigned alpha_target = AXP_OPCODE_BASE;
361 static const char *alpha_target_name = "<all>";
363 /* The hash table of instruction opcodes. */
364 static struct hash_control *alpha_opcode_hash;
366 /* The hash table of macro opcodes. */
367 static struct hash_control *alpha_macro_hash;
370 /* The $gp relocation symbol. */
371 static symbolS *alpha_gp_symbol;
373 /* XXX: what is this, and why is it exported? */
374 valueT alpha_gp_value;
377 /* The current $gp register. */
378 static int alpha_gp_register = AXP_REG_GP;
380 /* A table of the register symbols. */
381 static symbolS *alpha_register_table[64];
383 /* Constant sections, or sections of constants. */
385 static segT alpha_lita_section;
388 static segT alpha_link_section;
389 static segT alpha_ctors_section;
390 static segT alpha_dtors_section;
392 static segT alpha_lit8_section;
394 /* Symbols referring to said sections. */
396 static symbolS *alpha_lita_symbol;
399 static symbolS *alpha_link_symbol;
400 static symbolS *alpha_ctors_symbol;
401 static symbolS *alpha_dtors_symbol;
403 static symbolS *alpha_lit8_symbol;
405 /* Literal for .litX+0x8000 within .lita. */
407 static offsetT alpha_lit8_literal;
411 /* The active .ent symbol. */
412 static symbolS *alpha_cur_ent_sym;
415 /* Is the assembler not allowed to use $at? */
416 static int alpha_noat_on = 0;
418 /* Are macros enabled? */
419 static int alpha_macros_on = 1;
421 /* Are floats disabled? */
422 static int alpha_nofloats_on = 0;
424 /* Are addresses 32 bit? */
425 static int alpha_addr32_on = 0;
427 /* Symbol labelling the current insn. When the Alpha gas sees
430 and the section happens to not be on an eight byte boundary, it
431 will align both the symbol and the .quad to an eight byte boundary. */
432 static symbolS *alpha_insn_label;
434 /* Whether we should automatically align data generation pseudo-ops.
435 .align 0 will turn this off. */
436 static int alpha_auto_align_on = 1;
438 /* The known current alignment of the current section. */
439 static int alpha_current_align;
441 /* These are exported to ECOFF code. */
442 unsigned long alpha_gprmask, alpha_fprmask;
444 /* Whether the debugging option was seen. */
445 static int alpha_debug;
448 /* Whether we are emitting an mdebug section. */
449 int alpha_flag_mdebug = -1;
452 /* Don't fully resolve relocations, allowing code movement in the linker. */
453 static int alpha_flag_relax;
455 /* What value to give to bfd_set_gp_size. */
456 static int g_switch_value = 8;
459 /* Collect information about current procedure here. */
461 symbolS *symbol; /* proc pdesc symbol */
463 int framereg; /* register for frame pointer */
464 int framesize; /* size of frame */
474 static int alpha_flag_hash_long_names = 0; /* -+ */
475 static int alpha_flag_show_after_trunc = 0; /* -H */
477 /* If the -+ switch is given, then a hash is appended to any name that is
478 longer than 64 characters, else longer symbol names are truncated. */
483 /* A table to map the spelling of a relocation operand into an appropriate
484 bfd_reloc_code_real_type type. The table is assumed to be ordered such
485 that op-O_literal indexes into it. */
487 #define ALPHA_RELOC_TABLE(op) \
488 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
490 : (int) (op) - (int) O_literal) ])
492 #define DEF(NAME, RELOC, REQ, ALLOW) \
493 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
495 static const struct alpha_reloc_op_tag
497 const char *name; /* string to lookup */
498 size_t length; /* size of the string */
499 operatorT op; /* which operator to use */
500 bfd_reloc_code_real_type reloc; /* relocation before frob */
501 unsigned int require_seq : 1; /* require a sequence number */
502 unsigned int allow_seq : 1; /* allow a sequence number */
506 DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
507 DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
508 DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
509 DEF(lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
510 DEF(lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
511 DEF(lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
512 DEF(lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
513 DEF(gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
514 DEF(gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
515 DEF(gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
516 DEF(gprel, BFD_RELOC_GPREL16, 0, 0),
517 DEF(samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
518 DEF(tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
519 DEF(tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
520 DEF(gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
521 DEF(dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
522 DEF(dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
523 DEF(dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
524 DEF(gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
525 DEF(tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
526 DEF(tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
527 DEF(tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
532 static const int alpha_num_reloc_op
533 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
534 #endif /* RELOC_OP_P */
536 /* Maximum # digits needed to hold the largest sequence # */
537 #define ALPHA_RELOC_DIGITS 25
539 /* Structure to hold explict sequence information. */
540 struct alpha_reloc_tag
542 fixS *master; /* the literal reloc */
543 fixS *slaves; /* head of linked list of lituses */
544 segT segment; /* segment relocs are in or undefined_section*/
545 long sequence; /* sequence # */
546 unsigned n_master; /* # of literals */
547 unsigned n_slaves; /* # of lituses */
548 unsigned saw_tlsgd : 1; /* true if ... */
549 unsigned saw_tlsldm : 1;
550 unsigned saw_lu_tlsgd : 1;
551 unsigned saw_lu_tlsldm : 1;
552 unsigned multi_section_p : 1; /* true if more than one section was used */
553 char string[1]; /* printable form of sequence to hash with */
556 /* Hash table to link up literals with the appropriate lituse */
557 static struct hash_control *alpha_literal_hash;
559 /* Sequence numbers for internal use by macros. */
560 static long next_sequence_num = -1;
562 /* A table of CPU names and opcode sets. */
564 static const struct cpu_type
571 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
572 This supports usage under DU 4.0b that does ".arch ev4", and
573 usage in MILO that does -m21064. Probably something more
574 specific like -m21064-pal should be used, but oh well. */
576 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
577 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
578 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
579 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
580 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
581 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
582 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
584 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
585 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
586 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
587 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
588 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
589 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
591 { "ev4", AXP_OPCODE_BASE },
592 { "ev45", AXP_OPCODE_BASE },
593 { "lca45", AXP_OPCODE_BASE },
594 { "ev5", AXP_OPCODE_BASE },
595 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
596 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
597 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
598 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
599 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
601 { "all", AXP_OPCODE_BASE },
605 /* The macro table */
607 static const struct alpha_macro alpha_macros[] =
609 /* Load/Store macros */
610 { "lda", emit_lda, NULL,
611 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
612 { "ldah", emit_ldah, NULL,
613 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
615 { "ldl", emit_ir_load, "ldl",
616 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
617 { "ldl_l", emit_ir_load, "ldl_l",
618 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
619 { "ldq", emit_ir_load, "ldq",
620 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
621 { "ldq_l", emit_ir_load, "ldq_l",
622 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
623 { "ldq_u", emit_ir_load, "ldq_u",
624 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
625 { "ldf", emit_loadstore, "ldf",
626 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
627 { "ldg", emit_loadstore, "ldg",
628 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
629 { "lds", emit_loadstore, "lds",
630 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
631 { "ldt", emit_loadstore, "ldt",
632 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
634 { "ldb", emit_ldX, (PTR) 0,
635 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
636 { "ldbu", emit_ldXu, (PTR) 0,
637 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
638 { "ldw", emit_ldX, (PTR) 1,
639 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
640 { "ldwu", emit_ldXu, (PTR) 1,
641 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
643 { "uldw", emit_uldX, (PTR) 1,
644 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
645 { "uldwu", emit_uldXu, (PTR) 1,
646 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
647 { "uldl", emit_uldX, (PTR) 2,
648 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
649 { "uldlu", emit_uldXu, (PTR) 2,
650 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
651 { "uldq", emit_uldXu, (PTR) 3,
652 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
654 { "ldgp", emit_ldgp, NULL,
655 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
657 { "ldi", emit_lda, NULL,
658 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
659 { "ldil", emit_ldil, NULL,
660 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
661 { "ldiq", emit_lda, NULL,
662 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
664 { "ldif" emit_ldiq, NULL,
665 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
666 { "ldid" emit_ldiq, NULL,
667 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
668 { "ldig" emit_ldiq, NULL,
669 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
670 { "ldis" emit_ldiq, NULL,
671 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
672 { "ldit" emit_ldiq, NULL,
673 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
676 { "stl", emit_loadstore, "stl",
677 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
678 { "stl_c", emit_loadstore, "stl_c",
679 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
680 { "stq", emit_loadstore, "stq",
681 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
682 { "stq_c", emit_loadstore, "stq_c",
683 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
684 { "stq_u", emit_loadstore, "stq_u",
685 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
686 { "stf", emit_loadstore, "stf",
687 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
688 { "stg", emit_loadstore, "stg",
689 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
690 { "sts", emit_loadstore, "sts",
691 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
692 { "stt", emit_loadstore, "stt",
693 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
695 { "stb", emit_stX, (PTR) 0,
696 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
697 { "stw", emit_stX, (PTR) 1,
698 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
699 { "ustw", emit_ustX, (PTR) 1,
700 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
701 { "ustl", emit_ustX, (PTR) 2,
702 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
703 { "ustq", emit_ustX, (PTR) 3,
704 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
706 /* Arithmetic macros */
708 { "absl" emit_absl, 1, { IR } },
709 { "absl" emit_absl, 2, { IR, IR } },
710 { "absl" emit_absl, 2, { EXP, IR } },
711 { "absq" emit_absq, 1, { IR } },
712 { "absq" emit_absq, 2, { IR, IR } },
713 { "absq" emit_absq, 2, { EXP, IR } },
716 { "sextb", emit_sextX, (PTR) 0,
717 { MACRO_IR, MACRO_IR, MACRO_EOA,
719 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
720 { "sextw", emit_sextX, (PTR) 1,
721 { MACRO_IR, MACRO_IR, MACRO_EOA,
723 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
725 { "divl", emit_division, "__divl",
726 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
727 MACRO_IR, MACRO_IR, MACRO_EOA,
728 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
729 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
730 { "divlu", emit_division, "__divlu",
731 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
732 MACRO_IR, MACRO_IR, MACRO_EOA,
733 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
734 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
735 { "divq", emit_division, "__divq",
736 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
737 MACRO_IR, MACRO_IR, MACRO_EOA,
738 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
739 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
740 { "divqu", emit_division, "__divqu",
741 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
742 MACRO_IR, MACRO_IR, MACRO_EOA,
743 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
744 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
745 { "reml", emit_division, "__reml",
746 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
747 MACRO_IR, MACRO_IR, MACRO_EOA,
748 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
749 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
750 { "remlu", emit_division, "__remlu",
751 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
752 MACRO_IR, MACRO_IR, MACRO_EOA,
753 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
754 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
755 { "remq", emit_division, "__remq",
756 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
757 MACRO_IR, MACRO_IR, MACRO_EOA,
758 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
759 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
760 { "remqu", emit_division, "__remqu",
761 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
762 MACRO_IR, MACRO_IR, MACRO_EOA,
763 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
764 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
766 { "jsr", emit_jsrjmp, "jsr",
767 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
768 MACRO_PIR, MACRO_EOA,
769 MACRO_IR, MACRO_EXP, MACRO_EOA,
770 MACRO_EXP, MACRO_EOA } },
771 { "jmp", emit_jsrjmp, "jmp",
772 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
773 MACRO_PIR, MACRO_EOA,
774 MACRO_IR, MACRO_EXP, MACRO_EOA,
775 MACRO_EXP, MACRO_EOA } },
776 { "ret", emit_retjcr, "ret",
777 { MACRO_IR, MACRO_EXP, MACRO_EOA,
779 MACRO_PIR, MACRO_EXP, MACRO_EOA,
780 MACRO_PIR, MACRO_EOA,
781 MACRO_EXP, MACRO_EOA,
783 { "jcr", emit_retjcr, "jcr",
784 { MACRO_IR, MACRO_EXP, MACRO_EOA,
786 MACRO_PIR, MACRO_EXP, MACRO_EOA,
787 MACRO_PIR, MACRO_EOA,
788 MACRO_EXP, MACRO_EOA,
790 { "jsr_coroutine", emit_retjcr, "jcr",
791 { MACRO_IR, MACRO_EXP, MACRO_EOA,
793 MACRO_PIR, MACRO_EXP, MACRO_EOA,
794 MACRO_PIR, MACRO_EOA,
795 MACRO_EXP, MACRO_EOA,
799 static const unsigned int alpha_num_macros
800 = sizeof (alpha_macros) / sizeof (*alpha_macros);
802 /* Public interface functions */
804 /* This function is called once, at assembler startup time. It sets
805 up all the tables, etc. that the MD part of the assembler will
806 need, that can be determined before arguments are parsed. */
813 /* Verify that X_op field is wide enough. */
817 assert (e.X_op == O_max);
820 /* Create the opcode hash table. */
821 alpha_opcode_hash = hash_new ();
822 for (i = 0; i < alpha_num_opcodes;)
824 const char *name, *retval, *slash;
826 name = alpha_opcodes[i].name;
827 retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
829 as_fatal (_("internal error: can't hash opcode `%s': %s"),
832 /* Some opcodes include modifiers of various sorts with a "/mod"
833 syntax, like the architecture manual suggests. However, for
834 use with gcc at least, we also need access to those same opcodes
837 if ((slash = strchr (name, '/')) != NULL)
839 char *p = xmalloc (strlen (name));
840 memcpy (p, name, slash - name);
841 strcpy (p + (slash - name), slash + 1);
843 (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
844 /* Ignore failures -- the opcode table does duplicate some
845 variants in different forms, like "hw_stq" and "hw_st/q". */
848 while (++i < alpha_num_opcodes
849 && (alpha_opcodes[i].name == name
850 || !strcmp (alpha_opcodes[i].name, name)))
854 /* Create the macro hash table. */
855 alpha_macro_hash = hash_new ();
856 for (i = 0; i < alpha_num_macros;)
858 const char *name, *retval;
860 name = alpha_macros[i].name;
861 retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
863 as_fatal (_("internal error: can't hash macro `%s': %s"),
866 while (++i < alpha_num_macros
867 && (alpha_macros[i].name == name
868 || !strcmp (alpha_macros[i].name, name)))
872 /* Construct symbols for each of the registers. */
873 for (i = 0; i < 32; ++i)
877 sprintf (name, "$%d", i);
878 alpha_register_table[i] = symbol_create (name, reg_section, i,
885 sprintf (name, "$f%d", i - 32);
886 alpha_register_table[i] = symbol_create (name, reg_section, i,
890 /* Create the special symbols and sections we'll be using. */
892 /* So .sbss will get used for tiny objects. */
893 bfd_set_gp_size (stdoutput, g_switch_value);
896 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
898 /* For handling the GP, create a symbol that won't be output in the
899 symbol table. We'll edit it out of relocs later. */
900 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
905 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
911 segT sec = subseg_new (".mdebug", (subsegT) 0);
912 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
913 bfd_set_section_alignment (stdoutput, sec, 3);
917 /* Create literal lookup hash table. */
918 alpha_literal_hash = hash_new ();
920 subseg_set (text_section, 0);
923 /* The public interface to the instruction assembler. */
929 char opname[32]; /* Current maximum is 13. */
930 expressionS tok[MAX_INSN_ARGS];
934 /* Split off the opcode. */
935 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
936 trunclen = (opnamelen < sizeof (opname) - 1
938 : sizeof (opname) - 1);
939 memcpy (opname, str, trunclen);
940 opname[trunclen] = '\0';
942 /* Tokenize the rest of the line. */
943 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
945 if (ntok != TOKENIZE_ERROR_REPORT)
946 as_bad (_("syntax error"));
952 assemble_tokens (opname, tok, ntok, alpha_macros_on);
955 /* Round up a section's size to the appropriate boundary. */
958 md_section_align (seg, size)
962 int align = bfd_get_section_alignment (stdoutput, seg);
963 valueT mask = ((valueT) 1 << align) - 1;
965 return (size + mask) & ~mask;
968 /* Turn a string in input_line_pointer into a floating point constant
969 of type TYPE, and store the appropriate bytes in *LITP. The number
970 of LITTLENUMS emitted is stored in *SIZEP. An error message is
971 returned, or NULL on OK. */
973 /* Equal to MAX_PRECISION in atof-ieee.c. */
974 #define MAX_LITTLENUMS 6
976 extern char *vax_md_atof PARAMS ((int, char *, int *));
979 md_atof (type, litP, sizeP)
985 LITTLENUM_TYPE words[MAX_LITTLENUMS];
986 LITTLENUM_TYPE *wordP;
993 /* VAX md_atof doesn't like "G" for some reason. */
997 return vax_md_atof (type, litP, sizeP);
1020 return _("Bad call to MD_ATOF()");
1022 t = atof_ieee (input_line_pointer, type, words);
1024 input_line_pointer = t;
1025 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1027 for (wordP = words + prec - 1; prec--;)
1029 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
1030 litP += sizeof (LITTLENUM_TYPE);
1036 /* Take care of the target-specific command-line options. */
1039 md_parse_option (c, arg)
1046 alpha_nofloats_on = 1;
1050 alpha_addr32_on = 1;
1058 g_switch_value = atoi (arg);
1063 const struct cpu_type *p;
1064 for (p = cpu_types; p->name; ++p)
1065 if (strcmp (arg, p->name) == 0)
1067 alpha_target_name = p->name, alpha_target = p->flags;
1070 as_warn (_("Unknown CPU identifier `%s'"), arg);
1076 case '+': /* For g++. Hash any name > 63 chars long. */
1077 alpha_flag_hash_long_names = 1;
1080 case 'H': /* Show new symbol after hash truncation */
1081 alpha_flag_show_after_trunc = 1;
1084 case 'h': /* for gnu-c/vax compatibility. */
1089 alpha_flag_relax = 1;
1094 alpha_flag_mdebug = 1;
1096 case OPTION_NO_MDEBUG:
1097 alpha_flag_mdebug = 0;
1108 /* Print a description of the command-line options that we accept. */
1111 md_show_usage (stream)
1116 -32addr treat addresses as 32-bit values\n\
1117 -F lack floating point instructions support\n\
1118 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
1119 specify variant of Alpha architecture\n\
1120 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
1121 these variants include PALcode opcodes\n"),
1126 -+ hash encode (don't truncate) names longer than 64 characters\n\
1127 -H show new symbol after hash truncation\n"),
1132 /* Decide from what point a pc-relative relocation is relative to,
1133 relative to the pc-relative fixup. Er, relatively speaking. */
1136 md_pcrel_from (fixP)
1139 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1140 switch (fixP->fx_r_type)
1142 case BFD_RELOC_ALPHA_GPDISP:
1143 case BFD_RELOC_ALPHA_GPDISP_HI16:
1144 case BFD_RELOC_ALPHA_GPDISP_LO16:
1147 return fixP->fx_size + addr;
1151 /* Attempt to simplify or even eliminate a fixup. The return value is
1152 ignored; perhaps it was once meaningful, but now it is historical.
1153 To indicate that a fixup has been eliminated, set fixP->fx_done.
1155 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1156 internally into the GPDISP reloc used externally. We had to do
1157 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1158 the distance to the "lda" instruction for setting the addend to
1162 md_apply_fix3 (fixP, valP, seg)
1167 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1168 valueT value = * valP;
1169 unsigned image, size;
1171 switch (fixP->fx_r_type)
1173 /* The GPDISP relocations are processed internally with a symbol
1174 referring to the current function's section; we need to drop
1175 in a value which, when added to the address of the start of
1176 the function, gives the desired GP. */
1177 case BFD_RELOC_ALPHA_GPDISP_HI16:
1179 fixS *next = fixP->fx_next;
1181 /* With user-specified !gpdisp relocations, we can be missing
1182 the matching LO16 reloc. We will have already issued an
1185 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1186 - fixP->fx_frag->fr_address - fixP->fx_where);
1188 value = (value - sign_extend_16 (value)) >> 16;
1191 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1195 case BFD_RELOC_ALPHA_GPDISP_LO16:
1196 value = sign_extend_16 (value);
1197 fixP->fx_offset = 0;
1203 fixP->fx_addsy = section_symbol (seg);
1204 md_number_to_chars (fixpos, value, 2);
1209 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1214 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1219 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1222 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1224 md_number_to_chars (fixpos, value, size);
1230 case BFD_RELOC_GPREL32:
1231 assert (fixP->fx_subsy == alpha_gp_symbol);
1233 /* FIXME: inherited this obliviousness of `value' -- why? */
1234 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1237 case BFD_RELOC_GPREL32:
1239 case BFD_RELOC_GPREL16:
1240 case BFD_RELOC_ALPHA_GPREL_HI16:
1241 case BFD_RELOC_ALPHA_GPREL_LO16:
1244 case BFD_RELOC_23_PCREL_S2:
1245 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1247 image = bfd_getl32 (fixpos);
1248 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1253 case BFD_RELOC_ALPHA_HINT:
1254 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1256 image = bfd_getl32 (fixpos);
1257 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1263 case BFD_RELOC_ALPHA_BRSGP:
1264 case BFD_RELOC_ALPHA_TLSGD:
1265 case BFD_RELOC_ALPHA_TLSLDM:
1266 case BFD_RELOC_ALPHA_GOTDTPREL16:
1267 case BFD_RELOC_ALPHA_DTPREL_HI16:
1268 case BFD_RELOC_ALPHA_DTPREL_LO16:
1269 case BFD_RELOC_ALPHA_DTPREL16:
1270 case BFD_RELOC_ALPHA_GOTTPREL16:
1271 case BFD_RELOC_ALPHA_TPREL_HI16:
1272 case BFD_RELOC_ALPHA_TPREL_LO16:
1273 case BFD_RELOC_ALPHA_TPREL16:
1278 case BFD_RELOC_ALPHA_LITERAL:
1279 md_number_to_chars (fixpos, value, 2);
1282 case BFD_RELOC_ALPHA_ELF_LITERAL:
1283 case BFD_RELOC_ALPHA_LITUSE:
1284 case BFD_RELOC_ALPHA_LINKAGE:
1285 case BFD_RELOC_ALPHA_CODEADDR:
1288 case BFD_RELOC_VTABLE_INHERIT:
1289 case BFD_RELOC_VTABLE_ENTRY:
1294 const struct alpha_operand *operand;
1296 if ((int) fixP->fx_r_type >= 0)
1297 as_fatal (_("unhandled relocation type %s"),
1298 bfd_get_reloc_code_name (fixP->fx_r_type));
1300 assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
1301 operand = &alpha_operands[-(int) fixP->fx_r_type];
1303 /* The rest of these fixups only exist internally during symbol
1304 resolution and have no representation in the object file.
1305 Therefore they must be completely resolved as constants. */
1307 if (fixP->fx_addsy != 0
1308 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
1309 as_bad_where (fixP->fx_file, fixP->fx_line,
1310 _("non-absolute expression in constant field"));
1312 image = bfd_getl32 (fixpos);
1313 image = insert_operand (image, operand, (offsetT) value,
1314 fixP->fx_file, fixP->fx_line);
1319 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1323 as_warn_where (fixP->fx_file, fixP->fx_line,
1324 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
1329 md_number_to_chars (fixpos, image, 4);
1335 /* Look for a register name in the given symbol. */
1338 md_undefined_symbol (name)
1343 int is_float = 0, num;
1348 if (name[1] == 'p' && name[2] == '\0')
1349 return alpha_register_table[AXP_REG_FP];
1354 if (!ISDIGIT (*++name))
1358 case '0': case '1': case '2': case '3': case '4':
1359 case '5': case '6': case '7': case '8': case '9':
1360 if (name[1] == '\0')
1361 num = name[0] - '0';
1362 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
1364 num = (name[0] - '0') * 10 + name[1] - '0';
1371 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
1372 as_warn (_("Used $at without \".set noat\""));
1373 return alpha_register_table[num + is_float];
1376 if (name[1] == 't' && name[2] == '\0')
1379 as_warn (_("Used $at without \".set noat\""));
1380 return alpha_register_table[AXP_REG_AT];
1385 if (name[1] == 'p' && name[2] == '\0')
1386 return alpha_register_table[alpha_gp_register];
1390 if (name[1] == 'p' && name[2] == '\0')
1391 return alpha_register_table[AXP_REG_SP];
1399 /* @@@ Magic ECOFF bits. */
1402 alpha_frob_ecoff_data ()
1405 /* $zero and $f31 are read-only */
1406 alpha_gprmask &= ~1;
1407 alpha_fprmask &= ~1;
1411 /* Hook to remember a recently defined label so that the auto-align
1412 code can adjust the symbol after we know what alignment will be
1416 alpha_define_label (sym)
1419 alpha_insn_label = sym;
1422 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
1423 let it get resolved at assembly time. */
1427 alpha_validate_fix (f)
1433 if (f->fx_r_type != BFD_RELOC_ALPHA_BRSGP)
1436 if (! S_IS_DEFINED (f->fx_addsy))
1439 switch (S_GET_OTHER (f->fx_addsy) & STO_ALPHA_STD_GPLOAD)
1441 case STO_ALPHA_NOPV:
1443 case STO_ALPHA_STD_GPLOAD:
1447 if (S_IS_LOCAL (f->fx_addsy))
1450 name = S_GET_NAME (f->fx_addsy);
1451 as_bad_where (f->fx_file, f->fx_line,
1452 _("!samegp reloc against symbol without .prologue: %s"),
1457 if (! (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy)))
1459 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
1460 f->fx_offset += offset;
1465 /* Return true if we must always emit a reloc for a type and false if
1466 there is some hope of resolving it at assembly time. */
1469 alpha_force_relocation (f)
1472 if (alpha_flag_relax)
1475 switch (f->fx_r_type)
1477 case BFD_RELOC_ALPHA_GPDISP_HI16:
1478 case BFD_RELOC_ALPHA_GPDISP_LO16:
1479 case BFD_RELOC_ALPHA_GPDISP:
1480 case BFD_RELOC_ALPHA_LITERAL:
1481 case BFD_RELOC_ALPHA_ELF_LITERAL:
1482 case BFD_RELOC_ALPHA_LITUSE:
1483 case BFD_RELOC_GPREL16:
1484 case BFD_RELOC_GPREL32:
1485 case BFD_RELOC_ALPHA_GPREL_HI16:
1486 case BFD_RELOC_ALPHA_GPREL_LO16:
1487 case BFD_RELOC_ALPHA_LINKAGE:
1488 case BFD_RELOC_ALPHA_CODEADDR:
1489 case BFD_RELOC_ALPHA_BRSGP:
1490 case BFD_RELOC_VTABLE_INHERIT:
1491 case BFD_RELOC_VTABLE_ENTRY:
1492 case BFD_RELOC_ALPHA_TLSGD:
1493 case BFD_RELOC_ALPHA_TLSLDM:
1494 case BFD_RELOC_ALPHA_GOTDTPREL16:
1495 case BFD_RELOC_ALPHA_DTPREL_HI16:
1496 case BFD_RELOC_ALPHA_DTPREL_LO16:
1497 case BFD_RELOC_ALPHA_DTPREL16:
1498 case BFD_RELOC_ALPHA_GOTTPREL16:
1499 case BFD_RELOC_ALPHA_TPREL_HI16:
1500 case BFD_RELOC_ALPHA_TPREL_LO16:
1501 case BFD_RELOC_ALPHA_TPREL16:
1504 case BFD_RELOC_23_PCREL_S2:
1505 case BFD_RELOC_ALPHA_HINT:
1512 return S_FORCE_RELOC (f->fx_addsy);
1515 /* Return true if we can partially resolve a relocation now. */
1518 alpha_fix_adjustable (f)
1521 /* Are there any relocation types for which we must generate a reloc
1522 but we can adjust the values contained within it? */
1523 switch (f->fx_r_type)
1525 case BFD_RELOC_ALPHA_GPDISP_HI16:
1526 case BFD_RELOC_ALPHA_GPDISP_LO16:
1527 case BFD_RELOC_ALPHA_GPDISP:
1528 case BFD_RELOC_ALPHA_BRSGP:
1531 case BFD_RELOC_ALPHA_LITERAL:
1532 case BFD_RELOC_ALPHA_ELF_LITERAL:
1533 case BFD_RELOC_ALPHA_LITUSE:
1534 case BFD_RELOC_ALPHA_LINKAGE:
1535 case BFD_RELOC_ALPHA_CODEADDR:
1538 case BFD_RELOC_VTABLE_ENTRY:
1539 case BFD_RELOC_VTABLE_INHERIT:
1542 case BFD_RELOC_GPREL16:
1543 case BFD_RELOC_GPREL32:
1544 case BFD_RELOC_ALPHA_GPREL_HI16:
1545 case BFD_RELOC_ALPHA_GPREL_LO16:
1546 case BFD_RELOC_23_PCREL_S2:
1549 case BFD_RELOC_ALPHA_HINT:
1552 case BFD_RELOC_ALPHA_TLSGD:
1553 case BFD_RELOC_ALPHA_TLSLDM:
1554 case BFD_RELOC_ALPHA_GOTDTPREL16:
1555 case BFD_RELOC_ALPHA_DTPREL_HI16:
1556 case BFD_RELOC_ALPHA_DTPREL_LO16:
1557 case BFD_RELOC_ALPHA_DTPREL16:
1558 case BFD_RELOC_ALPHA_GOTTPREL16:
1559 case BFD_RELOC_ALPHA_TPREL_HI16:
1560 case BFD_RELOC_ALPHA_TPREL_LO16:
1561 case BFD_RELOC_ALPHA_TPREL16:
1562 /* ??? No idea why we can't return a reference to .tbss+10, but
1563 we're preventing this in the other assemblers. Follow for now. */
1572 /* Generate the BFD reloc to be stuck in the object file from the
1573 fixup used internally in the assembler. */
1576 tc_gen_reloc (sec, fixp)
1577 asection *sec ATTRIBUTE_UNUSED;
1582 reloc = (arelent *) xmalloc (sizeof (arelent));
1583 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1584 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1585 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1587 /* Make sure none of our internal relocations make it this far.
1588 They'd better have been fully resolved by this point. */
1589 assert ((int) fixp->fx_r_type > 0);
1591 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1592 if (reloc->howto == NULL)
1594 as_bad_where (fixp->fx_file, fixp->fx_line,
1595 _("cannot represent `%s' relocation in object file"),
1596 bfd_get_reloc_code_name (fixp->fx_r_type));
1600 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1602 as_fatal (_("internal error? cannot generate `%s' relocation"),
1603 bfd_get_reloc_code_name (fixp->fx_r_type));
1605 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1608 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1610 /* Fake out bfd_perform_relocation. sigh. */
1611 reloc->addend = -alpha_gp_value;
1616 reloc->addend = fixp->fx_offset;
1618 /* Ohhh, this is ugly. The problem is that if this is a local global
1619 symbol, the relocation will entirely be performed at link time, not
1620 at assembly time. bfd_perform_reloc doesn't know about this sort
1621 of thing, and as a result we need to fake it out here. */
1622 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
1623 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
1624 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
1625 && !S_IS_COMMON (fixp->fx_addsy))
1626 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
1633 /* Parse a register name off of the input_line and return a register
1634 number. Gets md_undefined_symbol above to do the register name
1637 Only called as a part of processing the ECOFF .frame directive. */
1640 tc_get_register (frame)
1641 int frame ATTRIBUTE_UNUSED;
1643 int framereg = AXP_REG_SP;
1646 if (*input_line_pointer == '$')
1648 char *s = input_line_pointer;
1649 char c = get_symbol_end ();
1650 symbolS *sym = md_undefined_symbol (s);
1652 *strchr (s, '\0') = c;
1653 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1656 as_warn (_("frame reg expected, using $%d."), framereg);
1659 note_gpreg (framereg);
1663 /* This is called before the symbol table is processed. In order to
1664 work with gcc when using mips-tfile, we must keep all local labels.
1665 However, in other cases, we want to discard them. If we were
1666 called with -g, but we didn't see any debugging information, it may
1667 mean that gcc is smuggling debugging information through to
1668 mips-tfile, in which case we must generate all local labels. */
1673 alpha_frob_file_before_adjust ()
1675 if (alpha_debug != 0
1676 && ! ecoff_debugging_seen)
1677 flag_keep_locals = 1;
1680 #endif /* OBJ_ECOFF */
1682 static struct alpha_reloc_tag *
1683 get_alpha_reloc_tag (sequence)
1686 char buffer[ALPHA_RELOC_DIGITS];
1687 struct alpha_reloc_tag *info;
1689 sprintf (buffer, "!%ld", sequence);
1691 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
1694 size_t len = strlen (buffer);
1697 info = (struct alpha_reloc_tag *)
1698 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
1700 info->segment = now_seg;
1701 info->sequence = sequence;
1702 strcpy (info->string, buffer);
1703 errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
1711 /* Before the relocations are written, reorder them, so that user
1712 supplied !lituse relocations follow the appropriate !literal
1713 relocations, and similarly for !gpdisp relocations. */
1718 if (alpha_literal_hash)
1719 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
1723 alpha_adjust_relocs (abfd, sec, ptr)
1724 bfd *abfd ATTRIBUTE_UNUSED;
1726 PTR ptr ATTRIBUTE_UNUSED;
1728 segment_info_type *seginfo = seg_info (sec);
1734 /* If seginfo is NULL, we did not create this section; don't do
1735 anything with it. By using a pointer to a pointer, we can update
1736 the links in place. */
1737 if (seginfo == NULL)
1740 /* If there are no relocations, skip the section. */
1741 if (! seginfo->fix_root)
1744 /* First rebuild the fixup chain without the expicit lituse and
1745 gpdisp_lo16 relocs. */
1746 prevP = &seginfo->fix_root;
1747 for (fixp = seginfo->fix_root; fixp; fixp = next)
1749 next = fixp->fx_next;
1750 fixp->fx_next = (fixS *) 0;
1752 switch (fixp->fx_r_type)
1754 case BFD_RELOC_ALPHA_LITUSE:
1755 if (fixp->tc_fix_data.info->n_master == 0)
1756 as_bad_where (fixp->fx_file, fixp->fx_line,
1757 _("No !literal!%ld was found"),
1758 fixp->tc_fix_data.info->sequence);
1760 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
1762 if (! fixp->tc_fix_data.info->saw_tlsgd)
1763 as_bad_where (fixp->fx_file, fixp->fx_line,
1764 _("No !tlsgd!%ld was found"),
1765 fixp->tc_fix_data.info->sequence);
1767 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
1769 if (! fixp->tc_fix_data.info->saw_tlsldm)
1770 as_bad_where (fixp->fx_file, fixp->fx_line,
1771 _("No !tlsldm!%ld was found"),
1772 fixp->tc_fix_data.info->sequence);
1777 case BFD_RELOC_ALPHA_GPDISP_LO16:
1778 if (fixp->tc_fix_data.info->n_master == 0)
1779 as_bad_where (fixp->fx_file, fixp->fx_line,
1780 _("No ldah !gpdisp!%ld was found"),
1781 fixp->tc_fix_data.info->sequence);
1784 case BFD_RELOC_ALPHA_ELF_LITERAL:
1785 if (fixp->tc_fix_data.info
1786 && (fixp->tc_fix_data.info->saw_tlsgd
1787 || fixp->tc_fix_data.info->saw_tlsldm))
1793 prevP = &fixp->fx_next;
1798 /* Go back and re-chain dependent relocations. They are currently
1799 linked through the next_reloc field in reverse order, so as we
1800 go through the next_reloc chain, we effectively reverse the chain
1803 Except if there is more than one !literal for a given sequence
1804 number. In that case, the programmer and/or compiler is not sure
1805 how control flows from literal to lituse, and we can't be sure to
1806 get the relaxation correct.
1808 ??? Well, actually we could, if there are enough lituses such that
1809 we can make each literal have at least one of each lituse type
1810 present. Not implemented.
1812 Also suppress the optimization if the !literals/!lituses are spread
1813 in different segments. This can happen with "intersting" uses of
1814 inline assembly; examples are present in the Linux kernel semaphores. */
1816 for (fixp = seginfo->fix_root; fixp; fixp = next)
1818 next = fixp->fx_next;
1819 switch (fixp->fx_r_type)
1821 case BFD_RELOC_ALPHA_TLSGD:
1822 case BFD_RELOC_ALPHA_TLSLDM:
1823 if (!fixp->tc_fix_data.info)
1825 if (fixp->tc_fix_data.info->n_master == 0)
1827 else if (fixp->tc_fix_data.info->n_master > 1)
1829 as_bad_where (fixp->fx_file, fixp->fx_line,
1830 _("too many !literal!%ld for %s"),
1831 fixp->tc_fix_data.info->sequence,
1832 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
1833 ? "!tlsgd" : "!tlsldm"));
1837 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
1838 fixp->fx_next = fixp->tc_fix_data.info->master;
1839 fixp = fixp->fx_next;
1842 case BFD_RELOC_ALPHA_ELF_LITERAL:
1843 if (fixp->tc_fix_data.info
1844 && fixp->tc_fix_data.info->n_master == 1
1845 && ! fixp->tc_fix_data.info->multi_section_p)
1847 for (slave = fixp->tc_fix_data.info->slaves;
1848 slave != (fixS *) 0;
1849 slave = slave->tc_fix_data.next_reloc)
1851 slave->fx_next = fixp->fx_next;
1852 fixp->fx_next = slave;
1857 case BFD_RELOC_ALPHA_GPDISP_HI16:
1858 if (fixp->tc_fix_data.info->n_slaves == 0)
1859 as_bad_where (fixp->fx_file, fixp->fx_line,
1860 _("No lda !gpdisp!%ld was found"),
1861 fixp->tc_fix_data.info->sequence);
1864 slave = fixp->tc_fix_data.info->slaves;
1865 slave->fx_next = next;
1866 fixp->fx_next = slave;
1878 debug_exp (tok, ntok)
1884 fprintf (stderr, "debug_exp: %d tokens", ntok);
1885 for (i = 0; i < ntok; i++)
1887 expressionS *t = &tok[i];
1892 default: name = "unknown"; break;
1893 case O_illegal: name = "O_illegal"; break;
1894 case O_absent: name = "O_absent"; break;
1895 case O_constant: name = "O_constant"; break;
1896 case O_symbol: name = "O_symbol"; break;
1897 case O_symbol_rva: name = "O_symbol_rva"; break;
1898 case O_register: name = "O_register"; break;
1899 case O_big: name = "O_big"; break;
1900 case O_uminus: name = "O_uminus"; break;
1901 case O_bit_not: name = "O_bit_not"; break;
1902 case O_logical_not: name = "O_logical_not"; break;
1903 case O_multiply: name = "O_multiply"; break;
1904 case O_divide: name = "O_divide"; break;
1905 case O_modulus: name = "O_modulus"; break;
1906 case O_left_shift: name = "O_left_shift"; break;
1907 case O_right_shift: name = "O_right_shift"; break;
1908 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
1909 case O_bit_or_not: name = "O_bit_or_not"; break;
1910 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
1911 case O_bit_and: name = "O_bit_and"; break;
1912 case O_add: name = "O_add"; break;
1913 case O_subtract: name = "O_subtract"; break;
1914 case O_eq: name = "O_eq"; break;
1915 case O_ne: name = "O_ne"; break;
1916 case O_lt: name = "O_lt"; break;
1917 case O_le: name = "O_le"; break;
1918 case O_ge: name = "O_ge"; break;
1919 case O_gt: name = "O_gt"; break;
1920 case O_logical_and: name = "O_logical_and"; break;
1921 case O_logical_or: name = "O_logical_or"; break;
1922 case O_index: name = "O_index"; break;
1923 case O_pregister: name = "O_pregister"; break;
1924 case O_cpregister: name = "O_cpregister"; break;
1925 case O_literal: name = "O_literal"; break;
1926 case O_lituse_addr: name = "O_lituse_addr"; break;
1927 case O_lituse_base: name = "O_lituse_base"; break;
1928 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
1929 case O_lituse_jsr: name = "O_lituse_jsr"; break;
1930 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
1931 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
1932 case O_gpdisp: name = "O_gpdisp"; break;
1933 case O_gprelhigh: name = "O_gprelhigh"; break;
1934 case O_gprellow: name = "O_gprellow"; break;
1935 case O_gprel: name = "O_gprel"; break;
1936 case O_samegp: name = "O_samegp"; break;
1937 case O_tlsgd: name = "O_tlsgd"; break;
1938 case O_tlsldm: name = "O_tlsldm"; break;
1939 case O_gotdtprel: name = "O_gotdtprel"; break;
1940 case O_dtprelhi: name = "O_dtprelhi"; break;
1941 case O_dtprello: name = "O_dtprello"; break;
1942 case O_dtprel: name = "O_dtprel"; break;
1943 case O_gottprel: name = "O_gottprel"; break;
1944 case O_tprelhi: name = "O_tprelhi"; break;
1945 case O_tprello: name = "O_tprello"; break;
1946 case O_tprel: name = "O_tprel"; break;
1949 fprintf (stderr, ", %s(%s, %s, %d)", name,
1950 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
1951 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
1952 (int) t->X_add_number);
1954 fprintf (stderr, "\n");
1959 /* Parse the arguments to an opcode. */
1962 tokenize_arguments (str, tok, ntok)
1967 expressionS *end_tok = tok + ntok;
1968 char *old_input_line_pointer;
1969 int saw_comma = 0, saw_arg = 0;
1971 expressionS *orig_tok = tok;
1975 const struct alpha_reloc_op_tag *r;
1978 int reloc_found_p = 0;
1981 memset (tok, 0, sizeof (*tok) * ntok);
1983 /* Save and restore input_line_pointer around this function. */
1984 old_input_line_pointer = input_line_pointer;
1985 input_line_pointer = str;
1988 /* ??? Wrest control of ! away from the regular expression parser. */
1989 is_end_of_line[(unsigned char) '!'] = 1;
1992 while (tok < end_tok && *input_line_pointer)
1995 switch (*input_line_pointer)
2002 /* A relocation operand can be placed after the normal operand on an
2003 assembly language statement, and has the following form:
2004 !relocation_type!sequence_number. */
2007 /* Only support one relocation op per insn. */
2008 as_bad (_("More than one relocation op per insn"));
2015 ++input_line_pointer;
2017 p = input_line_pointer;
2018 c = get_symbol_end ();
2020 /* Parse !relocation_type. */
2021 len = input_line_pointer - p;
2024 as_bad (_("No relocation operand"));
2028 r = &alpha_reloc_op[0];
2029 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
2030 if (len == r->length && memcmp (p, r->name, len) == 0)
2034 as_bad (_("Unknown relocation operand: !%s"), p);
2038 *input_line_pointer = c;
2040 if (*input_line_pointer != '!')
2044 as_bad (_("no sequence number after !%s"), p);
2048 tok->X_add_number = 0;
2054 as_bad (_("!%s does not use a sequence number"), p);
2058 input_line_pointer++;
2060 /* Parse !sequence_number. */
2062 if (tok->X_op != O_constant || tok->X_add_number <= 0)
2064 as_bad (_("Bad sequence number: !%s!%s"),
2065 r->name, input_line_pointer);
2074 #endif /* RELOC_OP_P */
2077 ++input_line_pointer;
2078 if (saw_comma || !saw_arg)
2085 char *hold = input_line_pointer++;
2087 /* First try for parenthesized register ... */
2089 if (*input_line_pointer == ')' && tok->X_op == O_register)
2091 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
2094 ++input_line_pointer;
2099 /* ... then fall through to plain expression. */
2100 input_line_pointer = hold;
2104 if (saw_arg && !saw_comma)
2108 if (tok->X_op == O_illegal || tok->X_op == O_absent)
2121 input_line_pointer = old_input_line_pointer;
2124 debug_exp (orig_tok, ntok - (end_tok - tok));
2127 is_end_of_line[(unsigned char) '!'] = 0;
2130 return ntok - (end_tok - tok);
2134 is_end_of_line[(unsigned char) '!'] = 0;
2136 input_line_pointer = old_input_line_pointer;
2137 return TOKENIZE_ERROR;
2141 is_end_of_line[(unsigned char) '!'] = 0;
2143 input_line_pointer = old_input_line_pointer;
2144 return TOKENIZE_ERROR_REPORT;
2147 /* Search forward through all variants of an opcode looking for a
2150 static const struct alpha_opcode *
2151 find_opcode_match (first_opcode, tok, pntok, pcpumatch)
2152 const struct alpha_opcode *first_opcode;
2153 const expressionS *tok;
2157 const struct alpha_opcode *opcode = first_opcode;
2159 int got_cpu_match = 0;
2163 const unsigned char *opidx;
2166 /* Don't match opcodes that don't exist on this architecture. */
2167 if (!(opcode->flags & alpha_target))
2172 for (opidx = opcode->operands; *opidx; ++opidx)
2174 const struct alpha_operand *operand = &alpha_operands[*opidx];
2176 /* Only take input from real operands. */
2177 if (operand->flags & AXP_OPERAND_FAKE)
2180 /* When we expect input, make sure we have it. */
2183 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
2188 /* Match operand type with expression type. */
2189 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
2191 case AXP_OPERAND_IR:
2192 if (tok[tokidx].X_op != O_register
2193 || !is_ir_num (tok[tokidx].X_add_number))
2196 case AXP_OPERAND_FPR:
2197 if (tok[tokidx].X_op != O_register
2198 || !is_fpr_num (tok[tokidx].X_add_number))
2201 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
2202 if (tok[tokidx].X_op != O_pregister
2203 || !is_ir_num (tok[tokidx].X_add_number))
2206 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
2207 if (tok[tokidx].X_op != O_cpregister
2208 || !is_ir_num (tok[tokidx].X_add_number))
2212 case AXP_OPERAND_RELATIVE:
2213 case AXP_OPERAND_SIGNED:
2214 case AXP_OPERAND_UNSIGNED:
2215 switch (tok[tokidx].X_op)
2230 /* Everything else should have been fake. */
2236 /* Possible match -- did we use all of our input? */
2245 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
2246 && !strcmp (opcode->name, first_opcode->name));
2249 *pcpumatch = got_cpu_match;
2254 /* Search forward through all variants of a macro looking for a syntax
2257 static const struct alpha_macro *
2258 find_macro_match (first_macro, tok, pntok)
2259 const struct alpha_macro *first_macro;
2260 const expressionS *tok;
2263 const struct alpha_macro *macro = first_macro;
2268 const enum alpha_macro_arg *arg = macro->argsets;
2282 /* Index register. */
2284 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2285 || !is_ir_num (tok[tokidx].X_add_number))
2290 /* Parenthesized index register. */
2292 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
2293 || !is_ir_num (tok[tokidx].X_add_number))
2298 /* Optional parenthesized index register. */
2300 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
2301 && is_ir_num (tok[tokidx].X_add_number))
2305 /* Leading comma with a parenthesized index register. */
2307 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
2308 || !is_ir_num (tok[tokidx].X_add_number))
2313 /* Floating point register. */
2315 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2316 || !is_fpr_num (tok[tokidx].X_add_number))
2321 /* Normal expression. */
2325 switch (tok[tokidx].X_op)
2334 case O_lituse_bytoff:
2350 while (*arg != MACRO_EOA)
2358 while (++macro - alpha_macros < (int) alpha_num_macros
2359 && !strcmp (macro->name, first_macro->name));
2364 /* Insert an operand value into an instruction. */
2367 insert_operand (insn, operand, val, file, line)
2369 const struct alpha_operand *operand;
2374 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
2378 if (operand->flags & AXP_OPERAND_SIGNED)
2380 max = (1 << (operand->bits - 1)) - 1;
2381 min = -(1 << (operand->bits - 1));
2385 max = (1 << operand->bits) - 1;
2389 if (val < min || val > max)
2392 _("operand out of range (%s not between %d and %d)");
2393 char buf[sizeof (val) * 3 + 2];
2395 sprint_value (buf, val);
2397 as_warn_where (file, line, err, buf, min, max);
2399 as_warn (err, buf, min, max);
2403 if (operand->insert)
2405 const char *errmsg = NULL;
2407 insn = (*operand->insert) (insn, val, &errmsg);
2412 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2417 /* Turn an opcode description and a set of arguments into
2418 an instruction and a fixup. */
2421 assemble_insn (opcode, tok, ntok, insn, reloc)
2422 const struct alpha_opcode *opcode;
2423 const expressionS *tok;
2425 struct alpha_insn *insn;
2426 bfd_reloc_code_real_type reloc;
2428 const struct alpha_operand *reloc_operand = NULL;
2429 const expressionS *reloc_exp = NULL;
2430 const unsigned char *argidx;
2434 memset (insn, 0, sizeof (*insn));
2435 image = opcode->opcode;
2437 for (argidx = opcode->operands; *argidx; ++argidx)
2439 const struct alpha_operand *operand = &alpha_operands[*argidx];
2440 const expressionS *t = (const expressionS *) 0;
2442 if (operand->flags & AXP_OPERAND_FAKE)
2444 /* fake operands take no value and generate no fixup */
2445 image = insert_operand (image, operand, 0, NULL, 0);
2451 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2453 case AXP_OPERAND_DEFAULT_FIRST:
2456 case AXP_OPERAND_DEFAULT_SECOND:
2459 case AXP_OPERAND_DEFAULT_ZERO:
2461 static expressionS zero_exp;
2463 zero_exp.X_op = O_constant;
2464 zero_exp.X_unsigned = 1;
2479 image = insert_operand (image, operand, regno (t->X_add_number),
2484 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
2485 assert (reloc_operand == NULL);
2486 reloc_operand = operand;
2491 /* This is only 0 for fields that should contain registers,
2492 which means this pattern shouldn't have matched. */
2493 if (operand->default_reloc == 0)
2496 /* There is one special case for which an insn receives two
2497 relocations, and thus the user-supplied reloc does not
2498 override the operand reloc. */
2499 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2501 struct alpha_fixup *fixup;
2503 if (insn->nfixups >= MAX_INSN_FIXUPS)
2504 as_fatal (_("too many fixups"));
2506 fixup = &insn->fixups[insn->nfixups++];
2508 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2512 if (reloc == BFD_RELOC_UNUSED)
2513 reloc = operand->default_reloc;
2515 assert (reloc_operand == NULL);
2516 reloc_operand = operand;
2523 if (reloc != BFD_RELOC_UNUSED)
2525 struct alpha_fixup *fixup;
2527 if (insn->nfixups >= MAX_INSN_FIXUPS)
2528 as_fatal (_("too many fixups"));
2530 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2531 relocation tag for both ldah and lda with gpdisp. Choose the
2532 correct internal relocation based on the opcode. */
2533 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2535 if (strcmp (opcode->name, "ldah") == 0)
2536 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2537 else if (strcmp (opcode->name, "lda") == 0)
2538 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2540 as_bad (_("invalid relocation for instruction"));
2543 /* If this is a real relocation (as opposed to a lituse hint), then
2544 the relocation width should match the operand width. */
2545 else if (reloc < BFD_RELOC_UNUSED)
2547 reloc_howto_type *reloc_howto
2548 = bfd_reloc_type_lookup (stdoutput, reloc);
2549 if (reloc_howto->bitsize != reloc_operand->bits)
2551 as_bad (_("invalid relocation for field"));
2556 fixup = &insn->fixups[insn->nfixups++];
2558 fixup->exp = *reloc_exp;
2560 fixup->exp.X_op = O_absent;
2561 fixup->reloc = reloc;
2567 /* Actually output an instruction with its fixup. */
2571 struct alpha_insn *insn;
2576 /* Take care of alignment duties. */
2577 if (alpha_auto_align_on && alpha_current_align < 2)
2578 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
2579 if (alpha_current_align > 2)
2580 alpha_current_align = 2;
2581 alpha_insn_label = NULL;
2583 /* Write out the instruction. */
2585 md_number_to_chars (f, insn->insn, 4);
2588 dwarf2_emit_insn (4);
2591 /* Apply the fixups in order. */
2592 for (i = 0; i < insn->nfixups; ++i)
2594 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
2595 struct alpha_fixup *fixup = &insn->fixups[i];
2596 struct alpha_reloc_tag *info = NULL;
2600 /* Some fixups are only used internally and so have no howto. */
2601 if ((int) fixup->reloc < 0)
2603 operand = &alpha_operands[-(int) fixup->reloc];
2605 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
2607 else if (fixup->reloc > BFD_RELOC_UNUSED
2608 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
2609 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
2616 reloc_howto_type *reloc_howto
2617 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
2618 assert (reloc_howto);
2620 size = bfd_get_reloc_size (reloc_howto);
2621 assert (size >= 1 && size <= 4);
2623 pcrel = reloc_howto->pc_relative;
2626 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
2627 &fixup->exp, pcrel, fixup->reloc);
2629 /* Turn off complaints that the addend is too large for some fixups,
2630 and copy in the sequence number for the explicit relocations. */
2631 switch (fixup->reloc)
2633 case BFD_RELOC_ALPHA_HINT:
2634 case BFD_RELOC_GPREL32:
2635 case BFD_RELOC_GPREL16:
2636 case BFD_RELOC_ALPHA_GPREL_HI16:
2637 case BFD_RELOC_ALPHA_GPREL_LO16:
2638 case BFD_RELOC_ALPHA_GOTDTPREL16:
2639 case BFD_RELOC_ALPHA_DTPREL_HI16:
2640 case BFD_RELOC_ALPHA_DTPREL_LO16:
2641 case BFD_RELOC_ALPHA_DTPREL16:
2642 case BFD_RELOC_ALPHA_GOTTPREL16:
2643 case BFD_RELOC_ALPHA_TPREL_HI16:
2644 case BFD_RELOC_ALPHA_TPREL_LO16:
2645 case BFD_RELOC_ALPHA_TPREL16:
2646 fixP->fx_no_overflow = 1;
2649 case BFD_RELOC_ALPHA_GPDISP_HI16:
2650 fixP->fx_no_overflow = 1;
2651 fixP->fx_addsy = section_symbol (now_seg);
2652 fixP->fx_offset = 0;
2654 info = get_alpha_reloc_tag (insn->sequence);
2655 if (++info->n_master > 1)
2656 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
2657 if (info->segment != now_seg)
2658 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2660 fixP->tc_fix_data.info = info;
2663 case BFD_RELOC_ALPHA_GPDISP_LO16:
2664 fixP->fx_no_overflow = 1;
2666 info = get_alpha_reloc_tag (insn->sequence);
2667 if (++info->n_slaves > 1)
2668 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
2669 if (info->segment != now_seg)
2670 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2672 fixP->tc_fix_data.info = info;
2673 info->slaves = fixP;
2676 case BFD_RELOC_ALPHA_LITERAL:
2677 case BFD_RELOC_ALPHA_ELF_LITERAL:
2678 fixP->fx_no_overflow = 1;
2680 if (insn->sequence == 0)
2682 info = get_alpha_reloc_tag (insn->sequence);
2683 info->master = fixP;
2685 if (info->segment != now_seg)
2686 info->multi_section_p = 1;
2687 fixP->tc_fix_data.info = info;
2691 case DUMMY_RELOC_LITUSE_ADDR:
2692 fixP->fx_offset = LITUSE_ALPHA_ADDR;
2694 case DUMMY_RELOC_LITUSE_BASE:
2695 fixP->fx_offset = LITUSE_ALPHA_BASE;
2697 case DUMMY_RELOC_LITUSE_BYTOFF:
2698 fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
2700 case DUMMY_RELOC_LITUSE_JSR:
2701 fixP->fx_offset = LITUSE_ALPHA_JSR;
2703 case DUMMY_RELOC_LITUSE_TLSGD:
2704 fixP->fx_offset = LITUSE_ALPHA_TLSGD;
2706 case DUMMY_RELOC_LITUSE_TLSLDM:
2707 fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
2710 fixP->fx_addsy = section_symbol (now_seg);
2711 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
2713 info = get_alpha_reloc_tag (insn->sequence);
2714 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
2715 info->saw_lu_tlsgd = 1;
2716 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
2717 info->saw_lu_tlsldm = 1;
2718 if (++info->n_slaves > 1)
2720 if (info->saw_lu_tlsgd)
2721 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
2723 else if (info->saw_lu_tlsldm)
2724 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
2727 fixP->tc_fix_data.info = info;
2728 fixP->tc_fix_data.next_reloc = info->slaves;
2729 info->slaves = fixP;
2730 if (info->segment != now_seg)
2731 info->multi_section_p = 1;
2734 case BFD_RELOC_ALPHA_TLSGD:
2735 fixP->fx_no_overflow = 1;
2737 if (insn->sequence == 0)
2739 info = get_alpha_reloc_tag (insn->sequence);
2740 if (info->saw_tlsgd)
2741 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
2742 else if (info->saw_tlsldm)
2743 as_bad (_("sequence number in use for !tlsldm!%ld"),
2746 info->saw_tlsgd = 1;
2747 fixP->tc_fix_data.info = info;
2750 case BFD_RELOC_ALPHA_TLSLDM:
2751 fixP->fx_no_overflow = 1;
2753 if (insn->sequence == 0)
2755 info = get_alpha_reloc_tag (insn->sequence);
2756 if (info->saw_tlsldm)
2757 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
2758 else if (info->saw_tlsgd)
2759 as_bad (_("sequence number in use for !tlsgd!%ld"),
2762 info->saw_tlsldm = 1;
2763 fixP->tc_fix_data.info = info;
2767 if ((int) fixup->reloc < 0)
2769 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
2770 fixP->fx_no_overflow = 1;
2777 /* Given an opcode name and a pre-tokenized set of arguments, assemble
2778 the insn, but do not emit it.
2780 Note that this implies no macros allowed, since we can't store more
2781 than one insn in an insn structure. */
2784 assemble_tokens_to_insn (opname, tok, ntok, insn)
2786 const expressionS *tok;
2788 struct alpha_insn *insn;
2790 const struct alpha_opcode *opcode;
2792 /* search opcodes */
2793 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2797 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2800 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
2804 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2806 as_bad (_("opcode `%s' not supported for target %s"), opname,
2810 as_bad (_("unknown opcode `%s'"), opname);
2813 /* Given an opcode name and a pre-tokenized set of arguments, take the
2814 opcode all the way through emission. */
2817 assemble_tokens (opname, tok, ntok, local_macros_on)
2819 const expressionS *tok;
2821 int local_macros_on;
2823 int found_something = 0;
2824 const struct alpha_opcode *opcode;
2825 const struct alpha_macro *macro;
2827 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2830 /* If a user-specified relocation is present, this is not a macro. */
2831 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
2833 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
2838 if (local_macros_on)
2840 macro = ((const struct alpha_macro *)
2841 hash_find (alpha_macro_hash, opname));
2844 found_something = 1;
2845 macro = find_macro_match (macro, tok, &ntok);
2848 (*macro->emit) (tok, ntok, macro->arg);
2854 /* Search opcodes. */
2855 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2858 found_something = 1;
2859 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2862 struct alpha_insn insn;
2863 assemble_insn (opcode, tok, ntok, &insn, reloc);
2865 /* Copy the sequence number for the reloc from the reloc token. */
2866 if (reloc != BFD_RELOC_UNUSED)
2867 insn.sequence = tok[ntok].X_add_number;
2874 if (found_something)
2877 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2879 as_bad (_("opcode `%s' not supported for target %s"), opname,
2883 as_bad (_("unknown opcode `%s'"), opname);
2886 /* Some instruction sets indexed by lg(size). */
2887 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2888 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2889 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2890 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2891 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2892 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2893 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2894 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2895 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2897 /* Implement the ldgp macro. */
2900 emit_ldgp (tok, ntok, unused)
2901 const expressionS *tok;
2902 int ntok ATTRIBUTE_UNUSED;
2903 const PTR unused ATTRIBUTE_UNUSED;
2908 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2909 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2910 with appropriate constants and relocations. */
2911 struct alpha_insn insn;
2912 expressionS newtok[3];
2916 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2917 ecoff_set_gp_prolog_size (0);
2921 set_tok_const (newtok[1], 0);
2924 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2929 if (addend.X_op != O_constant)
2930 as_bad (_("can not resolve expression"));
2931 addend.X_op = O_symbol;
2932 addend.X_add_symbol = alpha_gp_symbol;
2936 insn.fixups[0].exp = addend;
2937 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2938 insn.sequence = next_sequence_num;
2942 set_tok_preg (newtok[2], tok[0].X_add_number);
2944 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2947 addend.X_add_number += 4;
2951 insn.fixups[0].exp = addend;
2952 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2953 insn.sequence = next_sequence_num--;
2956 #endif /* OBJ_ECOFF || OBJ_ELF */
2961 /* Add symbol+addend to link pool.
2962 Return offset from basesym to entry in link pool.
2964 Add new fixup only if offset isn't 16bit. */
2967 add_to_link_pool (basesym, sym, addend)
2972 segT current_section = now_seg;
2973 int current_subsec = now_subseg;
2975 bfd_reloc_code_real_type reloc_type;
2977 segment_info_type *seginfo = seg_info (alpha_link_section);
2980 offset = - *symbol_get_obj (basesym);
2982 /* @@ This assumes all entries in a given section will be of the same
2983 size... Probably correct, but unwise to rely on. */
2984 /* This must always be called with the same subsegment. */
2986 if (seginfo->frchainP)
2987 for (fixp = seginfo->frchainP->fix_root;
2988 fixp != (fixS *) NULL;
2989 fixp = fixp->fx_next, offset += 8)
2991 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2993 if (range_signed_16 (offset))
3000 /* Not found in 16bit signed range. */
3002 subseg_set (alpha_link_section, 0);
3006 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
3009 subseg_set (current_section, current_subsec);
3010 seginfo->literal_pool_size += 8;
3014 #endif /* OBJ_EVAX */
3016 /* Load a (partial) expression into a target register.
3018 If poffset is not null, after the call it will either contain
3019 O_constant 0, or a 16-bit offset appropriate for any MEM format
3020 instruction. In addition, pbasereg will be modified to point to
3021 the base register to use in that MEM format instruction.
3023 In any case, *pbasereg should contain a base register to add to the
3024 expression. This will normally be either AXP_REG_ZERO or
3025 alpha_gp_register. Symbol addresses will always be loaded via $gp,
3026 so "foo($0)" is interpreted as adding the address of foo to $0;
3027 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
3028 but this is what OSF/1 does.
3030 If explicit relocations of the form !literal!<number> are allowed,
3031 and used, then explict_reloc with be an expression pointer.
3033 Finally, the return value is nonzero if the calling macro may emit
3034 a LITUSE reloc if otherwise appropriate; the return value is the
3035 sequence number to use. */
3038 load_expression (targreg, exp, pbasereg, poffset)
3040 const expressionS *exp;
3042 expressionS *poffset;
3044 long emit_lituse = 0;
3045 offsetT addend = exp->X_add_number;
3046 int basereg = *pbasereg;
3047 struct alpha_insn insn;
3048 expressionS newtok[3];
3057 /* Attempt to reduce .lit load by splitting the offset from
3058 its symbol when possible, but don't create a situation in
3060 if (!range_signed_32 (addend) &&
3061 (alpha_noat_on || targreg == AXP_REG_AT))
3063 lit = add_to_literal_pool (exp->X_add_symbol, addend,
3064 alpha_lita_section, 8);
3069 lit = add_to_literal_pool (exp->X_add_symbol, 0,
3070 alpha_lita_section, 8);
3074 as_fatal (_("overflow in literal (.lita) table"));
3076 /* emit "ldq r, lit(gp)" */
3078 if (basereg != alpha_gp_register && targreg == basereg)
3081 as_bad (_("macro requires $at register while noat in effect"));
3082 if (targreg == AXP_REG_AT)
3083 as_bad (_("macro requires $at while $at in use"));
3085 set_tok_reg (newtok[0], AXP_REG_AT);
3088 set_tok_reg (newtok[0], targreg);
3089 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
3090 set_tok_preg (newtok[2], alpha_gp_register);
3092 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3094 assert (insn.nfixups == 1);
3095 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3096 insn.sequence = emit_lituse = next_sequence_num--;
3097 #endif /* OBJ_ECOFF */
3099 /* emit "ldq r, gotoff(gp)" */
3101 if (basereg != alpha_gp_register && targreg == basereg)
3104 as_bad (_("macro requires $at register while noat in effect"));
3105 if (targreg == AXP_REG_AT)
3106 as_bad (_("macro requires $at while $at in use"));
3108 set_tok_reg (newtok[0], AXP_REG_AT);
3111 set_tok_reg (newtok[0], targreg);
3113 /* XXX: Disable this .got minimizing optimization so that we can get
3114 better instruction offset knowledge in the compiler. This happens
3115 very infrequently anyway. */
3117 || (!range_signed_32 (addend)
3118 && (alpha_noat_on || targreg == AXP_REG_AT)))
3125 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
3128 set_tok_preg (newtok[2], alpha_gp_register);
3130 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3132 assert (insn.nfixups == 1);
3133 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3134 insn.sequence = emit_lituse = next_sequence_num--;
3135 #endif /* OBJ_ELF */
3139 /* Find symbol or symbol pointer in link section. */
3141 if (exp->X_add_symbol == alpha_evax_proc.symbol)
3143 if (range_signed_16 (addend))
3145 set_tok_reg (newtok[0], targreg);
3146 set_tok_const (newtok[1], addend);
3147 set_tok_preg (newtok[2], basereg);
3148 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3153 set_tok_reg (newtok[0], targreg);
3154 set_tok_const (newtok[1], 0);
3155 set_tok_preg (newtok[2], basereg);
3156 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3161 if (!range_signed_32 (addend))
3163 link = add_to_link_pool (alpha_evax_proc.symbol,
3164 exp->X_add_symbol, addend);
3169 link = add_to_link_pool (alpha_evax_proc.symbol,
3170 exp->X_add_symbol, 0);
3172 set_tok_reg (newtok[0], targreg);
3173 set_tok_const (newtok[1], link);
3174 set_tok_preg (newtok[2], basereg);
3175 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3177 #endif /* OBJ_EVAX */
3182 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
3184 /* emit "addq r, base, r" */
3186 set_tok_reg (newtok[1], basereg);
3187 set_tok_reg (newtok[2], targreg);
3188 assemble_tokens ("addq", newtok, 3, 0);
3200 /* Assume that this difference expression will be resolved to an
3201 absolute value and that that value will fit in 16 bits. */
3203 set_tok_reg (newtok[0], targreg);
3205 set_tok_preg (newtok[2], basereg);
3206 assemble_tokens ("lda", newtok, 3, 0);
3209 set_tok_const (*poffset, 0);
3213 if (exp->X_add_number > 0)
3214 as_bad (_("bignum invalid; zero assumed"));
3216 as_bad (_("floating point number invalid; zero assumed"));
3221 as_bad (_("can't handle expression"));
3226 if (!range_signed_32 (addend))
3229 long seq_num = next_sequence_num--;
3231 /* For 64-bit addends, just put it in the literal pool. */
3234 /* emit "ldq targreg, lit(basereg)" */
3235 lit = add_to_link_pool (alpha_evax_proc.symbol,
3236 section_symbol (absolute_section), addend);
3237 set_tok_reg (newtok[0], targreg);
3238 set_tok_const (newtok[1], lit);
3239 set_tok_preg (newtok[2], alpha_gp_register);
3240 assemble_tokens ("ldq", newtok, 3, 0);
3243 if (alpha_lit8_section == NULL)
3245 create_literal_section (".lit8",
3246 &alpha_lit8_section,
3247 &alpha_lit8_symbol);
3250 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
3251 alpha_lita_section, 8);
3252 if (alpha_lit8_literal >= 0x8000)
3253 as_fatal (_("overflow in literal (.lita) table"));
3257 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
3259 as_fatal (_("overflow in literal (.lit8) table"));
3261 /* emit "lda litreg, .lit8+0x8000" */
3263 if (targreg == basereg)
3266 as_bad (_("macro requires $at register while noat in effect"));
3267 if (targreg == AXP_REG_AT)
3268 as_bad (_("macro requires $at while $at in use"));
3270 set_tok_reg (newtok[0], AXP_REG_AT);
3273 set_tok_reg (newtok[0], targreg);
3275 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
3278 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
3280 set_tok_preg (newtok[2], alpha_gp_register);
3282 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3284 assert (insn.nfixups == 1);
3286 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3289 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3291 insn.sequence = seq_num;
3295 /* emit "ldq litreg, lit(litreg)" */
3297 set_tok_const (newtok[1], lit);
3298 set_tok_preg (newtok[2], newtok[0].X_add_number);
3300 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3302 assert (insn.nfixups < MAX_INSN_FIXUPS);
3303 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3304 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3306 insn.sequence = seq_num;
3311 /* emit "addq litreg, base, target" */
3313 if (basereg != AXP_REG_ZERO)
3315 set_tok_reg (newtok[1], basereg);
3316 set_tok_reg (newtok[2], targreg);
3317 assemble_tokens ("addq", newtok, 3, 0);
3319 #endif /* !OBJ_EVAX */
3322 set_tok_const (*poffset, 0);
3323 *pbasereg = targreg;
3327 offsetT low, high, extra, tmp;
3329 /* for 32-bit operands, break up the addend */
3331 low = sign_extend_16 (addend);
3333 high = sign_extend_16 (tmp >> 16);
3335 if (tmp - (high << 16))
3339 high = sign_extend_16 (tmp >> 16);
3344 set_tok_reg (newtok[0], targreg);
3345 set_tok_preg (newtok[2], basereg);
3349 /* emit "ldah r, extra(r) */
3350 set_tok_const (newtok[1], extra);
3351 assemble_tokens ("ldah", newtok, 3, 0);
3352 set_tok_preg (newtok[2], basereg = targreg);
3357 /* emit "ldah r, high(r) */
3358 set_tok_const (newtok[1], high);
3359 assemble_tokens ("ldah", newtok, 3, 0);
3361 set_tok_preg (newtok[2], basereg);
3364 if ((low && !poffset) || (!poffset && basereg != targreg))
3366 /* emit "lda r, low(base)" */
3367 set_tok_const (newtok[1], low);
3368 assemble_tokens ("lda", newtok, 3, 0);
3374 set_tok_const (*poffset, low);
3375 *pbasereg = basereg;
3381 /* The lda macro differs from the lda instruction in that it handles
3382 most simple expressions, particualrly symbol address loads and
3386 emit_lda (tok, ntok, unused)
3387 const expressionS *tok;
3389 const PTR unused ATTRIBUTE_UNUSED;
3394 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3396 basereg = tok[2].X_add_number;
3398 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
3401 /* The ldah macro differs from the ldah instruction in that it has $31
3402 as an implied base register. */
3405 emit_ldah (tok, ntok, unused)
3406 const expressionS *tok;
3407 int ntok ATTRIBUTE_UNUSED;
3408 const PTR unused ATTRIBUTE_UNUSED;
3410 expressionS newtok[3];
3414 set_tok_preg (newtok[2], AXP_REG_ZERO);
3416 assemble_tokens ("ldah", newtok, 3, 0);
3419 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
3420 etc. They differ from the real instructions in that they do simple
3421 expressions like the lda macro. */
3424 emit_ir_load (tok, ntok, opname)
3425 const expressionS *tok;
3431 expressionS newtok[3];
3432 struct alpha_insn insn;
3435 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3437 basereg = tok[2].X_add_number;
3439 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
3443 set_tok_preg (newtok[2], basereg);
3445 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3449 assert (insn.nfixups < MAX_INSN_FIXUPS);
3450 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3451 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3453 insn.sequence = lituse;
3459 /* Handle fp register loads, and both integer and fp register stores.
3460 Again, we handle simple expressions. */
3463 emit_loadstore (tok, ntok, opname)
3464 const expressionS *tok;
3470 expressionS newtok[3];
3471 struct alpha_insn insn;
3474 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3476 basereg = tok[2].X_add_number;
3478 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
3481 as_bad (_("macro requires $at register while noat in effect"));
3483 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
3492 set_tok_preg (newtok[2], basereg);
3494 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3498 assert (insn.nfixups < MAX_INSN_FIXUPS);
3499 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3500 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3502 insn.sequence = lituse;
3508 /* Load a half-word or byte as an unsigned value. */
3511 emit_ldXu (tok, ntok, vlgsize)
3512 const expressionS *tok;
3516 if (alpha_target & AXP_OPCODE_BWX)
3517 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
3520 expressionS newtok[3];
3521 struct alpha_insn insn;
3526 as_bad (_("macro requires $at register while noat in effect"));
3529 basereg = (tok[1].X_op == O_constant
3530 ? AXP_REG_ZERO : alpha_gp_register);
3532 basereg = tok[2].X_add_number;
3534 /* emit "lda $at, exp" */
3536 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3538 /* emit "ldq_u targ, 0($at)" */
3541 set_tok_const (newtok[1], 0);
3542 set_tok_preg (newtok[2], basereg);
3543 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3547 assert (insn.nfixups < MAX_INSN_FIXUPS);
3548 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3549 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3551 insn.sequence = lituse;
3556 /* emit "extXl targ, $at, targ" */
3558 set_tok_reg (newtok[1], basereg);
3559 newtok[2] = newtok[0];
3560 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
3564 assert (insn.nfixups < MAX_INSN_FIXUPS);
3565 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3566 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3568 insn.sequence = lituse;
3575 /* Load a half-word or byte as a signed value. */
3578 emit_ldX (tok, ntok, vlgsize)
3579 const expressionS *tok;
3583 emit_ldXu (tok, ntok, vlgsize);
3584 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3587 /* Load an integral value from an unaligned address as an unsigned
3591 emit_uldXu (tok, ntok, vlgsize)
3592 const expressionS *tok;
3596 long lgsize = (long) vlgsize;
3597 expressionS newtok[3];
3600 as_bad (_("macro requires $at register while noat in effect"));
3602 /* emit "lda $at, exp" */
3604 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3605 newtok[0].X_add_number = AXP_REG_AT;
3606 assemble_tokens ("lda", newtok, ntok, 1);
3608 /* emit "ldq_u $t9, 0($at)" */
3610 set_tok_reg (newtok[0], AXP_REG_T9);
3611 set_tok_const (newtok[1], 0);
3612 set_tok_preg (newtok[2], AXP_REG_AT);
3613 assemble_tokens ("ldq_u", newtok, 3, 1);
3615 /* emit "ldq_u $t10, size-1($at)" */
3617 set_tok_reg (newtok[0], AXP_REG_T10);
3618 set_tok_const (newtok[1], (1 << lgsize) - 1);
3619 assemble_tokens ("ldq_u", newtok, 3, 1);
3621 /* emit "extXl $t9, $at, $t9" */
3623 set_tok_reg (newtok[0], AXP_REG_T9);
3624 set_tok_reg (newtok[1], AXP_REG_AT);
3625 set_tok_reg (newtok[2], AXP_REG_T9);
3626 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
3628 /* emit "extXh $t10, $at, $t10" */
3630 set_tok_reg (newtok[0], AXP_REG_T10);
3631 set_tok_reg (newtok[2], AXP_REG_T10);
3632 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
3634 /* emit "or $t9, $t10, targ" */
3636 set_tok_reg (newtok[0], AXP_REG_T9);
3637 set_tok_reg (newtok[1], AXP_REG_T10);
3639 assemble_tokens ("or", newtok, 3, 1);
3642 /* Load an integral value from an unaligned address as a signed value.
3643 Note that quads should get funneled to the unsigned load since we
3644 don't have to do the sign extension. */
3647 emit_uldX (tok, ntok, vlgsize)
3648 const expressionS *tok;
3652 emit_uldXu (tok, ntok, vlgsize);
3653 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3656 /* Implement the ldil macro. */
3659 emit_ldil (tok, ntok, unused)
3660 const expressionS *tok;
3662 const PTR unused ATTRIBUTE_UNUSED;
3664 expressionS newtok[2];
3666 memcpy (newtok, tok, sizeof (newtok));
3667 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
3669 assemble_tokens ("lda", newtok, ntok, 1);
3672 /* Store a half-word or byte. */
3675 emit_stX (tok, ntok, vlgsize)
3676 const expressionS *tok;
3680 int lgsize = (int) (long) vlgsize;
3682 if (alpha_target & AXP_OPCODE_BWX)
3683 emit_loadstore (tok, ntok, stX_op[lgsize]);
3686 expressionS newtok[3];
3687 struct alpha_insn insn;
3692 as_bad (_("macro requires $at register while noat in effect"));
3695 basereg = (tok[1].X_op == O_constant
3696 ? AXP_REG_ZERO : alpha_gp_register);
3698 basereg = tok[2].X_add_number;
3700 /* emit "lda $at, exp" */
3702 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3704 /* emit "ldq_u $t9, 0($at)" */
3706 set_tok_reg (newtok[0], AXP_REG_T9);
3707 set_tok_const (newtok[1], 0);
3708 set_tok_preg (newtok[2], basereg);
3709 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3713 assert (insn.nfixups < MAX_INSN_FIXUPS);
3714 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3715 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3717 insn.sequence = lituse;
3722 /* emit "insXl src, $at, $t10" */
3725 set_tok_reg (newtok[1], basereg);
3726 set_tok_reg (newtok[2], AXP_REG_T10);
3727 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
3731 assert (insn.nfixups < MAX_INSN_FIXUPS);
3732 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3733 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3735 insn.sequence = lituse;
3740 /* emit "mskXl $t9, $at, $t9" */
3742 set_tok_reg (newtok[0], AXP_REG_T9);
3743 newtok[2] = newtok[0];
3744 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
3748 assert (insn.nfixups < MAX_INSN_FIXUPS);
3749 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3750 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3752 insn.sequence = lituse;
3757 /* emit "or $t9, $t10, $t9" */
3759 set_tok_reg (newtok[1], AXP_REG_T10);
3760 assemble_tokens ("or", newtok, 3, 1);
3762 /* emit "stq_u $t9, 0($at) */
3764 set_tok_const(newtok[1], 0);
3765 set_tok_preg (newtok[2], AXP_REG_AT);
3766 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
3770 assert (insn.nfixups < MAX_INSN_FIXUPS);
3771 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3772 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3774 insn.sequence = lituse;
3781 /* Store an integer to an unaligned address. */
3784 emit_ustX (tok, ntok, vlgsize)
3785 const expressionS *tok;
3789 int lgsize = (int) (long) vlgsize;
3790 expressionS newtok[3];
3792 /* emit "lda $at, exp" */
3794 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3795 newtok[0].X_add_number = AXP_REG_AT;
3796 assemble_tokens ("lda", newtok, ntok, 1);
3798 /* emit "ldq_u $9, 0($at)" */
3800 set_tok_reg (newtok[0], AXP_REG_T9);
3801 set_tok_const (newtok[1], 0);
3802 set_tok_preg (newtok[2], AXP_REG_AT);
3803 assemble_tokens ("ldq_u", newtok, 3, 1);
3805 /* emit "ldq_u $10, size-1($at)" */
3807 set_tok_reg (newtok[0], AXP_REG_T10);
3808 set_tok_const (newtok[1], (1 << lgsize) - 1);
3809 assemble_tokens ("ldq_u", newtok, 3, 1);
3811 /* emit "insXl src, $at, $t11" */
3814 set_tok_reg (newtok[1], AXP_REG_AT);
3815 set_tok_reg (newtok[2], AXP_REG_T11);
3816 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
3818 /* emit "insXh src, $at, $t12" */
3820 set_tok_reg (newtok[2], AXP_REG_T12);
3821 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
3823 /* emit "mskXl $t9, $at, $t9" */
3825 set_tok_reg (newtok[0], AXP_REG_T9);
3826 newtok[2] = newtok[0];
3827 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
3829 /* emit "mskXh $t10, $at, $t10" */
3831 set_tok_reg (newtok[0], AXP_REG_T10);
3832 newtok[2] = newtok[0];
3833 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
3835 /* emit "or $t9, $t11, $t9" */
3837 set_tok_reg (newtok[0], AXP_REG_T9);
3838 set_tok_reg (newtok[1], AXP_REG_T11);
3839 newtok[2] = newtok[0];
3840 assemble_tokens ("or", newtok, 3, 1);
3842 /* emit "or $t10, $t12, $t10" */
3844 set_tok_reg (newtok[0], AXP_REG_T10);
3845 set_tok_reg (newtok[1], AXP_REG_T12);
3846 newtok[2] = newtok[0];
3847 assemble_tokens ("or", newtok, 3, 1);
3849 /* emit "stq_u $t9, 0($at)" */
3851 set_tok_reg (newtok[0], AXP_REG_T9);
3852 set_tok_const (newtok[1], 0);
3853 set_tok_preg (newtok[2], AXP_REG_AT);
3854 assemble_tokens ("stq_u", newtok, 3, 1);
3856 /* emit "stq_u $t10, size-1($at)" */
3858 set_tok_reg (newtok[0], AXP_REG_T10);
3859 set_tok_const (newtok[1], (1 << lgsize) - 1);
3860 assemble_tokens ("stq_u", newtok, 3, 1);
3863 /* Sign extend a half-word or byte. The 32-bit sign extend is
3864 implemented as "addl $31, $r, $t" in the opcode table. */
3867 emit_sextX (tok, ntok, vlgsize)
3868 const expressionS *tok;
3872 long lgsize = (long) vlgsize;
3874 if (alpha_target & AXP_OPCODE_BWX)
3875 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3878 int bitshift = 64 - 8 * (1 << lgsize);
3879 expressionS newtok[3];
3881 /* emit "sll src,bits,dst" */
3884 set_tok_const (newtok[1], bitshift);
3885 newtok[2] = tok[ntok - 1];
3886 assemble_tokens ("sll", newtok, 3, 1);
3888 /* emit "sra dst,bits,dst" */
3890 newtok[0] = newtok[2];
3891 assemble_tokens ("sra", newtok, 3, 1);
3895 /* Implement the division and modulus macros. */
3899 /* Make register usage like in normal procedure call.
3900 Don't clobber PV and RA. */
3903 emit_division (tok, ntok, symname)
3904 const expressionS *tok;
3908 /* DIVISION and MODULUS. Yech.
3913 mov x,R16 # if x != R16
3914 mov y,R17 # if y != R17
3919 with appropriate optimizations if R0,R16,R17 are the registers
3920 specified by the compiler. */
3924 expressionS newtok[3];
3926 xr = regno (tok[0].X_add_number);
3927 yr = regno (tok[1].X_add_number);
3932 rr = regno (tok[2].X_add_number);
3934 /* Move the operands into the right place. */
3935 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3937 /* They are in exactly the wrong order -- swap through AT. */
3940 as_bad (_("macro requires $at register while noat in effect"));
3942 set_tok_reg (newtok[0], AXP_REG_R16);
3943 set_tok_reg (newtok[1], AXP_REG_AT);
3944 assemble_tokens ("mov", newtok, 2, 1);
3946 set_tok_reg (newtok[0], AXP_REG_R17);
3947 set_tok_reg (newtok[1], AXP_REG_R16);
3948 assemble_tokens ("mov", newtok, 2, 1);
3950 set_tok_reg (newtok[0], AXP_REG_AT);
3951 set_tok_reg (newtok[1], AXP_REG_R17);
3952 assemble_tokens ("mov", newtok, 2, 1);
3956 if (yr == AXP_REG_R16)
3958 set_tok_reg (newtok[0], AXP_REG_R16);
3959 set_tok_reg (newtok[1], AXP_REG_R17);
3960 assemble_tokens ("mov", newtok, 2, 1);
3963 if (xr != AXP_REG_R16)
3965 set_tok_reg (newtok[0], xr);
3966 set_tok_reg (newtok[1], AXP_REG_R16);
3967 assemble_tokens ("mov", newtok, 2, 1);
3970 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3972 set_tok_reg (newtok[0], yr);
3973 set_tok_reg (newtok[1], AXP_REG_R17);
3974 assemble_tokens ("mov", newtok, 2, 1);
3978 sym = symbol_find_or_make ((const char *) symname);
3980 set_tok_reg (newtok[0], AXP_REG_AT);
3981 set_tok_sym (newtok[1], sym, 0);
3982 assemble_tokens ("lda", newtok, 2, 1);
3984 /* Call the division routine. */
3985 set_tok_reg (newtok[0], AXP_REG_AT);
3986 set_tok_cpreg (newtok[1], AXP_REG_AT);
3987 set_tok_const (newtok[2], 0);
3988 assemble_tokens ("jsr", newtok, 3, 1);
3990 /* Move the result to the right place. */
3991 if (rr != AXP_REG_R0)
3993 set_tok_reg (newtok[0], AXP_REG_R0);
3994 set_tok_reg (newtok[1], rr);
3995 assemble_tokens ("mov", newtok, 2, 1);
3999 #else /* !OBJ_EVAX */
4002 emit_division (tok, ntok, symname)
4003 const expressionS *tok;
4007 /* DIVISION and MODULUS. Yech.
4017 with appropriate optimizations if t10,t11,t12 are the registers
4018 specified by the compiler. */
4022 expressionS newtok[3];
4024 xr = regno (tok[0].X_add_number);
4025 yr = regno (tok[1].X_add_number);
4030 rr = regno (tok[2].X_add_number);
4032 sym = symbol_find_or_make ((const char *) symname);
4034 /* Move the operands into the right place. */
4035 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
4037 /* They are in exactly the wrong order -- swap through AT. */
4039 as_bad (_("macro requires $at register while noat in effect"));
4041 set_tok_reg (newtok[0], AXP_REG_T10);
4042 set_tok_reg (newtok[1], AXP_REG_AT);
4043 assemble_tokens ("mov", newtok, 2, 1);
4045 set_tok_reg (newtok[0], AXP_REG_T11);
4046 set_tok_reg (newtok[1], AXP_REG_T10);
4047 assemble_tokens ("mov", newtok, 2, 1);
4049 set_tok_reg (newtok[0], AXP_REG_AT);
4050 set_tok_reg (newtok[1], AXP_REG_T11);
4051 assemble_tokens ("mov", newtok, 2, 1);
4055 if (yr == AXP_REG_T10)
4057 set_tok_reg (newtok[0], AXP_REG_T10);
4058 set_tok_reg (newtok[1], AXP_REG_T11);
4059 assemble_tokens ("mov", newtok, 2, 1);
4062 if (xr != AXP_REG_T10)
4064 set_tok_reg (newtok[0], xr);
4065 set_tok_reg (newtok[1], AXP_REG_T10);
4066 assemble_tokens ("mov", newtok, 2, 1);
4069 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
4071 set_tok_reg (newtok[0], yr);
4072 set_tok_reg (newtok[1], AXP_REG_T11);
4073 assemble_tokens ("mov", newtok, 2, 1);
4077 /* Call the division routine. */
4078 set_tok_reg (newtok[0], AXP_REG_T9);
4079 set_tok_sym (newtok[1], sym, 0);
4080 assemble_tokens ("jsr", newtok, 2, 1);
4082 /* Reload the GP register. */
4086 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
4087 set_tok_reg (newtok[0], alpha_gp_register);
4088 set_tok_const (newtok[1], 0);
4089 set_tok_preg (newtok[2], AXP_REG_T9);
4090 assemble_tokens ("ldgp", newtok, 3, 1);
4093 /* Move the result to the right place. */
4094 if (rr != AXP_REG_T12)
4096 set_tok_reg (newtok[0], AXP_REG_T12);
4097 set_tok_reg (newtok[1], rr);
4098 assemble_tokens ("mov", newtok, 2, 1);
4102 #endif /* !OBJ_EVAX */
4104 /* The jsr and jmp macros differ from their instruction counterparts
4105 in that they can load the target address and default most
4109 emit_jsrjmp (tok, ntok, vopname)
4110 const expressionS *tok;
4114 const char *opname = (const char *) vopname;
4115 struct alpha_insn insn;
4116 expressionS newtok[3];
4120 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4121 r = regno (tok[tokidx++].X_add_number);
4123 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
4125 set_tok_reg (newtok[0], r);
4127 if (tokidx < ntok &&
4128 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4129 r = regno (tok[tokidx++].X_add_number);
4131 /* keep register if jsr $n.<sym> */
4135 int basereg = alpha_gp_register;
4136 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
4140 set_tok_cpreg (newtok[1], r);
4143 /* FIXME: Add hint relocs to BFD for evax. */
4146 newtok[2] = tok[tokidx];
4149 set_tok_const (newtok[2], 0);
4151 assemble_tokens_to_insn (opname, newtok, 3, &insn);
4155 assert (insn.nfixups < MAX_INSN_FIXUPS);
4156 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
4157 insn.fixups[insn.nfixups].exp.X_op = O_absent;
4159 insn.sequence = lituse;
4165 /* The ret and jcr instructions differ from their instruction
4166 counterparts in that everything can be defaulted. */
4169 emit_retjcr (tok, ntok, vopname)
4170 const expressionS *tok;
4174 const char *opname = (const char *) vopname;
4175 expressionS newtok[3];
4178 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4179 r = regno (tok[tokidx++].X_add_number);
4183 set_tok_reg (newtok[0], r);
4185 if (tokidx < ntok &&
4186 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4187 r = regno (tok[tokidx++].X_add_number);
4191 set_tok_cpreg (newtok[1], r);
4194 newtok[2] = tok[tokidx];
4196 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
4198 assemble_tokens (opname, newtok, 3, 0);
4201 /* Assembler directives. */
4203 /* Handle the .text pseudo-op. This is like the usual one, but it
4204 clears alpha_insn_label and restores auto alignment. */
4216 alpha_insn_label = NULL;
4217 alpha_auto_align_on = 1;
4218 alpha_current_align = 0;
4221 /* Handle the .data pseudo-op. This is like the usual one, but it
4222 clears alpha_insn_label and restores auto alignment. */
4233 alpha_insn_label = NULL;
4234 alpha_auto_align_on = 1;
4235 alpha_current_align = 0;
4238 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
4240 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
4241 openVMS constructs a section for every common symbol. */
4244 s_alpha_comm (ignore)
4245 int ignore ATTRIBUTE_UNUSED;
4247 register char *name;
4251 register symbolS *symbolP;
4254 segT current_section = now_seg;
4255 int current_subsec = now_subseg;
4259 name = input_line_pointer;
4260 c = get_symbol_end ();
4262 /* just after name is now '\0' */
4263 p = input_line_pointer;
4268 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
4269 if (*input_line_pointer == ',')
4271 input_line_pointer++;
4274 if ((temp = get_absolute_expression ()) < 0)
4276 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4277 ignore_rest_of_line ();
4282 symbolP = symbol_find_or_make (name);
4285 /* Make a section for the common symbol. */
4286 new_seg = subseg_new (xstrdup (name), 0);
4292 /* alignment might follow */
4293 if (*input_line_pointer == ',')
4297 input_line_pointer++;
4298 align = get_absolute_expression ();
4299 bfd_set_section_alignment (stdoutput, new_seg, align);
4303 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4305 as_bad (_("Ignoring attempt to re-define symbol"));
4306 ignore_rest_of_line ();
4311 if (bfd_section_size (stdoutput, new_seg) > 0)
4313 if (bfd_section_size (stdoutput, new_seg) != temp)
4314 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4315 S_GET_NAME (symbolP),
4316 (long) bfd_section_size (stdoutput, new_seg),
4320 if (S_GET_VALUE (symbolP))
4322 if (S_GET_VALUE (symbolP) != (valueT) temp)
4323 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4324 S_GET_NAME (symbolP),
4325 (long) S_GET_VALUE (symbolP),
4332 subseg_set (new_seg, 0);
4333 p = frag_more (temp);
4334 new_seg->flags |= SEC_IS_COMMON;
4335 if (! S_IS_DEFINED (symbolP))
4336 S_SET_SEGMENT (symbolP, new_seg);
4338 S_SET_VALUE (symbolP, (valueT) temp);
4340 S_SET_EXTERNAL (symbolP);
4344 subseg_set (current_section, current_subsec);
4347 know (symbol_get_frag (symbolP) == &zero_address_frag);
4349 demand_empty_rest_of_line ();
4352 #endif /* ! OBJ_ELF */
4356 /* Handle the .rdata pseudo-op. This is like the usual one, but it
4357 clears alpha_insn_label and restores auto alignment. */
4360 s_alpha_rdata (ignore)
4361 int ignore ATTRIBUTE_UNUSED;
4365 temp = get_absolute_expression ();
4366 subseg_new (".rdata", 0);
4367 demand_empty_rest_of_line ();
4368 alpha_insn_label = NULL;
4369 alpha_auto_align_on = 1;
4370 alpha_current_align = 0;
4377 /* Handle the .sdata pseudo-op. This is like the usual one, but it
4378 clears alpha_insn_label and restores auto alignment. */
4381 s_alpha_sdata (ignore)
4382 int ignore ATTRIBUTE_UNUSED;
4386 temp = get_absolute_expression ();
4387 subseg_new (".sdata", 0);
4388 demand_empty_rest_of_line ();
4389 alpha_insn_label = NULL;
4390 alpha_auto_align_on = 1;
4391 alpha_current_align = 0;
4397 /* Handle the .section pseudo-op. This is like the usual one, but it
4398 clears alpha_insn_label and restores auto alignment. */
4401 s_alpha_section (ignore)
4402 int ignore ATTRIBUTE_UNUSED;
4404 obj_elf_section (ignore);
4406 alpha_insn_label = NULL;
4407 alpha_auto_align_on = 1;
4408 alpha_current_align = 0;
4413 int dummy ATTRIBUTE_UNUSED;
4415 if (ECOFF_DEBUGGING)
4416 ecoff_directive_ent (0);
4419 char *name, name_end;
4420 name = input_line_pointer;
4421 name_end = get_symbol_end ();
4423 if (! is_name_beginner (*name))
4425 as_warn (_(".ent directive has no name"));
4426 *input_line_pointer = name_end;
4432 if (alpha_cur_ent_sym)
4433 as_warn (_("nested .ent directives"));
4435 sym = symbol_find_or_make (name);
4436 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4437 alpha_cur_ent_sym = sym;
4439 /* The .ent directive is sometimes followed by a number. Not sure
4440 what it really means, but ignore it. */
4441 *input_line_pointer = name_end;
4443 if (*input_line_pointer == ',')
4445 input_line_pointer++;
4448 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
4449 (void) get_absolute_expression ();
4451 demand_empty_rest_of_line ();
4457 int dummy ATTRIBUTE_UNUSED;
4459 if (ECOFF_DEBUGGING)
4460 ecoff_directive_end (0);
4463 char *name, name_end;
4464 name = input_line_pointer;
4465 name_end = get_symbol_end ();
4467 if (! is_name_beginner (*name))
4469 as_warn (_(".end directive has no name"));
4470 *input_line_pointer = name_end;
4476 sym = symbol_find (name);
4477 if (sym != alpha_cur_ent_sym)
4478 as_warn (_(".end directive names different symbol than .ent"));
4480 /* Create an expression to calculate the size of the function. */
4483 symbol_get_obj (sym)->size =
4484 (expressionS *) xmalloc (sizeof (expressionS));
4485 symbol_get_obj (sym)->size->X_op = O_subtract;
4486 symbol_get_obj (sym)->size->X_add_symbol
4487 = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
4488 symbol_get_obj (sym)->size->X_op_symbol = sym;
4489 symbol_get_obj (sym)->size->X_add_number = 0;
4492 alpha_cur_ent_sym = NULL;
4494 *input_line_pointer = name_end;
4496 demand_empty_rest_of_line ();
4504 if (ECOFF_DEBUGGING)
4507 ecoff_directive_fmask (0);
4509 ecoff_directive_mask (0);
4512 discard_rest_of_line ();
4516 s_alpha_frame (dummy)
4517 int dummy ATTRIBUTE_UNUSED;
4519 if (ECOFF_DEBUGGING)
4520 ecoff_directive_frame (0);
4522 discard_rest_of_line ();
4526 s_alpha_prologue (ignore)
4527 int ignore ATTRIBUTE_UNUSED;
4532 arg = get_absolute_expression ();
4533 demand_empty_rest_of_line ();
4535 if (ECOFF_DEBUGGING)
4536 sym = ecoff_get_cur_proc_sym ();
4538 sym = alpha_cur_ent_sym;
4543 case 0: /* No PV required. */
4544 S_SET_OTHER (sym, STO_ALPHA_NOPV
4545 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4547 case 1: /* Std GP load. */
4548 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
4549 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4551 case 2: /* Non-std use of PV. */
4555 as_bad (_("Invalid argument %d to .prologue."), arg);
4560 static char *first_file_directive;
4563 s_alpha_file (ignore)
4564 int ignore ATTRIBUTE_UNUSED;
4566 /* Save the first .file directive we see, so that we can change our
4567 minds about whether ecoff debugging should or shouldn't be enabled. */
4568 if (alpha_flag_mdebug < 0 && ! first_file_directive)
4570 char *start = input_line_pointer;
4573 discard_rest_of_line ();
4575 len = input_line_pointer - start;
4576 first_file_directive = xmalloc (len + 1);
4577 memcpy (first_file_directive, start, len);
4578 first_file_directive[len] = '\0';
4580 input_line_pointer = start;
4583 if (ECOFF_DEBUGGING)
4584 ecoff_directive_file (0);
4586 dwarf2_directive_file (0);
4590 s_alpha_loc (ignore)
4591 int ignore ATTRIBUTE_UNUSED;
4593 if (ECOFF_DEBUGGING)
4594 ecoff_directive_loc (0);
4596 dwarf2_directive_loc (0);
4603 /* If we've been undecided about mdebug, make up our minds in favour. */
4604 if (alpha_flag_mdebug < 0)
4606 segT sec = subseg_new (".mdebug", 0);
4607 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
4608 bfd_set_section_alignment (stdoutput, sec, 3);
4610 ecoff_read_begin_hook ();
4612 if (first_file_directive)
4614 char *save_ilp = input_line_pointer;
4615 input_line_pointer = first_file_directive;
4616 ecoff_directive_file (0);
4617 input_line_pointer = save_ilp;
4618 free (first_file_directive);
4621 alpha_flag_mdebug = 1;
4627 s_alpha_coff_wrapper (which)
4630 static void (* const fns[]) PARAMS ((int)) = {
4631 ecoff_directive_begin,
4632 ecoff_directive_bend,
4633 ecoff_directive_def,
4634 ecoff_directive_dim,
4635 ecoff_directive_endef,
4636 ecoff_directive_scl,
4637 ecoff_directive_tag,
4638 ecoff_directive_val,
4641 assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
4643 if (ECOFF_DEBUGGING)
4647 as_bad (_("ECOFF debugging is disabled."));
4648 ignore_rest_of_line ();
4651 #endif /* OBJ_ELF */
4655 /* Handle the section specific pseudo-op. */
4658 s_alpha_section (secid)
4662 #define EVAX_SECTION_COUNT 5
4663 static char *section_name[EVAX_SECTION_COUNT + 1] =
4664 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4666 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
4668 as_fatal (_("Unknown section directive"));
4669 demand_empty_rest_of_line ();
4672 temp = get_absolute_expression ();
4673 subseg_new (section_name[secid], 0);
4674 demand_empty_rest_of_line ();
4675 alpha_insn_label = NULL;
4676 alpha_auto_align_on = 1;
4677 alpha_current_align = 0;
4680 /* Parse .ent directives. */
4683 s_alpha_ent (ignore)
4684 int ignore ATTRIBUTE_UNUSED;
4687 expressionS symexpr;
4689 alpha_evax_proc.pdsckind = 0;
4690 alpha_evax_proc.framereg = -1;
4691 alpha_evax_proc.framesize = 0;
4692 alpha_evax_proc.rsa_offset = 0;
4693 alpha_evax_proc.ra_save = AXP_REG_RA;
4694 alpha_evax_proc.fp_save = -1;
4695 alpha_evax_proc.imask = 0;
4696 alpha_evax_proc.fmask = 0;
4697 alpha_evax_proc.prologue = 0;
4698 alpha_evax_proc.type = 0;
4700 expression (&symexpr);
4702 if (symexpr.X_op != O_symbol)
4704 as_fatal (_(".ent directive has no symbol"));
4705 demand_empty_rest_of_line ();
4709 symbol = make_expr_symbol (&symexpr);
4710 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
4711 alpha_evax_proc.symbol = symbol;
4713 demand_empty_rest_of_line ();
4717 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4720 s_alpha_frame (ignore)
4721 int ignore ATTRIBUTE_UNUSED;
4725 alpha_evax_proc.framereg = tc_get_register (1);
4728 if (*input_line_pointer++ != ','
4729 || get_absolute_expression_and_terminator (&val) != ',')
4731 as_warn (_("Bad .frame directive 1./2. param"));
4732 --input_line_pointer;
4733 demand_empty_rest_of_line ();
4737 alpha_evax_proc.framesize = val;
4739 (void) tc_get_register (1);
4741 if (*input_line_pointer++ != ',')
4743 as_warn (_("Bad .frame directive 3./4. param"));
4744 --input_line_pointer;
4745 demand_empty_rest_of_line ();
4748 alpha_evax_proc.rsa_offset = get_absolute_expression ();
4754 s_alpha_pdesc (ignore)
4755 int ignore ATTRIBUTE_UNUSED;
4764 segment_info_type *seginfo = seg_info (alpha_link_section);
4766 if (now_seg != alpha_link_section)
4768 as_bad (_(".pdesc directive not in link (.link) section"));
4769 demand_empty_rest_of_line ();
4773 if ((alpha_evax_proc.symbol == 0)
4774 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
4776 as_fatal (_(".pdesc has no matching .ent"));
4777 demand_empty_rest_of_line ();
4781 *symbol_get_obj (alpha_evax_proc.symbol) =
4782 (valueT) seginfo->literal_pool_size;
4785 if (exp.X_op != O_symbol)
4787 as_warn (_(".pdesc directive has no entry symbol"));
4788 demand_empty_rest_of_line ();
4792 entry_sym = make_expr_symbol (&exp);
4793 /* Save bfd symbol of proc desc in function symbol. */
4794 symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
4795 = symbol_get_bfdsym (entry_sym);
4798 if (*input_line_pointer++ != ',')
4800 as_warn (_("No comma after .pdesc <entryname>"));
4801 demand_empty_rest_of_line ();
4806 name = input_line_pointer;
4807 name_end = get_symbol_end ();
4809 if (strncmp (name, "stack", 5) == 0)
4811 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
4813 else if (strncmp (name, "reg", 3) == 0)
4815 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
4817 else if (strncmp (name, "null", 4) == 0)
4819 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
4823 as_fatal (_("unknown procedure kind"));
4824 demand_empty_rest_of_line ();
4828 *input_line_pointer = name_end;
4829 demand_empty_rest_of_line ();
4831 #ifdef md_flush_pending_output
4832 md_flush_pending_output ();
4835 frag_align (3, 0, 0);
4837 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4839 seginfo->literal_pool_size += 16;
4841 *p = alpha_evax_proc.pdsckind
4842 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
4843 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
4845 switch (alpha_evax_proc.pdsckind)
4847 case PDSC_S_K_KIND_NULL:
4851 case PDSC_S_K_KIND_FP_REGISTER:
4852 *(p + 2) = alpha_evax_proc.fp_save;
4853 *(p + 3) = alpha_evax_proc.ra_save;
4855 case PDSC_S_K_KIND_FP_STACK:
4856 md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
4858 default: /* impossible */
4863 *(p + 5) = alpha_evax_proc.type & 0x0f;
4865 /* Signature offset. */
4866 md_number_to_chars (p + 6, (valueT) 0, 2);
4868 fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
4870 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
4873 /* Add dummy fix to make add_to_link_pool work. */
4875 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4877 seginfo->literal_pool_size += 8;
4879 /* pdesc+16: Size. */
4880 md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
4882 md_number_to_chars (p + 4, (valueT) 0, 2);
4885 md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
4887 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
4890 /* Add dummy fix to make add_to_link_pool work. */
4892 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4894 seginfo->literal_pool_size += 8;
4896 /* pdesc+24: register masks. */
4898 md_number_to_chars (p, alpha_evax_proc.imask, 4);
4899 md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
4904 /* Support for crash debug on vms. */
4907 s_alpha_name (ignore)
4908 int ignore ATTRIBUTE_UNUSED;
4912 segment_info_type *seginfo = seg_info (alpha_link_section);
4914 if (now_seg != alpha_link_section)
4916 as_bad (_(".name directive not in link (.link) section"));
4917 demand_empty_rest_of_line ();
4922 if (exp.X_op != O_symbol)
4924 as_warn (_(".name directive has no symbol"));
4925 demand_empty_rest_of_line ();
4929 demand_empty_rest_of_line ();
4931 #ifdef md_flush_pending_output
4932 md_flush_pending_output ();
4935 frag_align (3, 0, 0);
4937 seginfo->literal_pool_size += 8;
4939 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
4945 s_alpha_linkage (ignore)
4946 int ignore ATTRIBUTE_UNUSED;
4951 #ifdef md_flush_pending_output
4952 md_flush_pending_output ();
4956 if (exp.X_op != O_symbol)
4958 as_fatal (_("No symbol after .linkage"));
4962 p = frag_more (LKP_S_K_SIZE);
4963 memset (p, 0, LKP_S_K_SIZE);
4964 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
4965 BFD_RELOC_ALPHA_LINKAGE);
4967 demand_empty_rest_of_line ();
4973 s_alpha_code_address (ignore)
4974 int ignore ATTRIBUTE_UNUSED;
4979 #ifdef md_flush_pending_output
4980 md_flush_pending_output ();
4984 if (exp.X_op != O_symbol)
4986 as_fatal (_("No symbol after .code_address"));
4992 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4993 BFD_RELOC_ALPHA_CODEADDR);
4995 demand_empty_rest_of_line ();
5001 s_alpha_fp_save (ignore)
5002 int ignore ATTRIBUTE_UNUSED;
5005 alpha_evax_proc.fp_save = tc_get_register (1);
5007 demand_empty_rest_of_line ();
5012 s_alpha_mask (ignore)
5013 int ignore ATTRIBUTE_UNUSED;
5017 if (get_absolute_expression_and_terminator (&val) != ',')
5019 as_warn (_("Bad .mask directive"));
5020 --input_line_pointer;
5024 alpha_evax_proc.imask = val;
5025 (void) get_absolute_expression ();
5027 demand_empty_rest_of_line ();
5033 s_alpha_fmask (ignore)
5034 int ignore ATTRIBUTE_UNUSED;
5038 if (get_absolute_expression_and_terminator (&val) != ',')
5040 as_warn (_("Bad .fmask directive"));
5041 --input_line_pointer;
5045 alpha_evax_proc.fmask = val;
5046 (void) get_absolute_expression ();
5048 demand_empty_rest_of_line ();
5054 s_alpha_end (ignore)
5055 int ignore ATTRIBUTE_UNUSED;
5059 c = get_symbol_end ();
5060 *input_line_pointer = c;
5061 demand_empty_rest_of_line ();
5062 alpha_evax_proc.symbol = 0;
5068 s_alpha_file (ignore)
5069 int ignore ATTRIBUTE_UNUSED;
5073 static char case_hack[32];
5075 extern char *demand_copy_string PARAMS ((int *lenP));
5077 sprintf (case_hack, "<CASE:%01d%01d>",
5078 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
5080 s = symbol_find_or_make (case_hack);
5081 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5083 get_absolute_expression ();
5084 s = symbol_find_or_make (demand_copy_string (&length));
5085 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5086 demand_empty_rest_of_line ();
5090 #endif /* OBJ_EVAX */
5092 /* Handle the .gprel32 pseudo op. */
5095 s_alpha_gprel32 (ignore)
5096 int ignore ATTRIBUTE_UNUSED;
5108 e.X_add_symbol = section_symbol (absolute_section);
5121 e.X_add_symbol = section_symbol (absolute_section);
5124 e.X_op = O_subtract;
5125 e.X_op_symbol = alpha_gp_symbol;
5133 if (alpha_auto_align_on && alpha_current_align < 2)
5134 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
5135 if (alpha_current_align > 2)
5136 alpha_current_align = 2;
5137 alpha_insn_label = NULL;
5141 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
5142 &e, 0, BFD_RELOC_GPREL32);
5145 /* Handle floating point allocation pseudo-ops. This is like the
5146 generic vresion, but it makes sure the current label, if any, is
5147 correctly aligned. */
5150 s_alpha_float_cons (type)
5177 if (alpha_auto_align_on && alpha_current_align < log_size)
5178 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5179 if (alpha_current_align > log_size)
5180 alpha_current_align = log_size;
5181 alpha_insn_label = NULL;
5186 /* Handle the .proc pseudo op. We don't really do much with it except
5190 s_alpha_proc (is_static)
5191 int is_static ATTRIBUTE_UNUSED;
5199 /* Takes ".proc name,nargs" */
5201 name = input_line_pointer;
5202 c = get_symbol_end ();
5203 p = input_line_pointer;
5204 symbolP = symbol_find_or_make (name);
5207 if (*input_line_pointer != ',')
5210 as_warn (_("Expected comma after name \"%s\""), name);
5213 ignore_rest_of_line ();
5217 input_line_pointer++;
5218 temp = get_absolute_expression ();
5220 /* *symbol_get_obj (symbolP) = (signed char) temp; */
5221 as_warn (_("unhandled: .proc %s,%d"), name, temp);
5222 demand_empty_rest_of_line ();
5225 /* Handle the .set pseudo op. This is used to turn on and off most of
5226 the assembler features. */
5230 int x ATTRIBUTE_UNUSED;
5236 name = input_line_pointer;
5237 ch = get_symbol_end ();
5240 if (s[0] == 'n' && s[1] == 'o')
5245 if (!strcmp ("reorder", s))
5247 else if (!strcmp ("at", s))
5248 alpha_noat_on = !yesno;
5249 else if (!strcmp ("macro", s))
5250 alpha_macros_on = yesno;
5251 else if (!strcmp ("move", s))
5253 else if (!strcmp ("volatile", s))
5256 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
5258 *input_line_pointer = ch;
5259 demand_empty_rest_of_line ();
5262 /* Handle the .base pseudo op. This changes the assembler's notion of
5263 the $gp register. */
5266 s_alpha_base (ignore)
5267 int ignore ATTRIBUTE_UNUSED;
5270 if (first_32bit_quadrant)
5272 /* not fatal, but it might not work in the end */
5273 as_warn (_("File overrides no-base-register option."));
5274 first_32bit_quadrant = 0;
5279 if (*input_line_pointer == '$')
5281 input_line_pointer++;
5282 if (*input_line_pointer == 'r')
5283 input_line_pointer++;
5286 alpha_gp_register = get_absolute_expression ();
5287 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5289 alpha_gp_register = AXP_REG_GP;
5290 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5293 demand_empty_rest_of_line ();
5296 /* Handle the .align pseudo-op. This aligns to a power of two. It
5297 also adjusts any current instruction label. We treat this the same
5298 way the MIPS port does: .align 0 turns off auto alignment. */
5301 s_alpha_align (ignore)
5302 int ignore ATTRIBUTE_UNUSED;
5306 long max_alignment = 15;
5308 align = get_absolute_expression ();
5309 if (align > max_alignment)
5311 align = max_alignment;
5312 as_bad (_("Alignment too large: %d. assumed"), align);
5316 as_warn (_("Alignment negative: 0 assumed"));
5320 if (*input_line_pointer == ',')
5322 input_line_pointer++;
5323 fill = get_absolute_expression ();
5331 alpha_auto_align_on = 1;
5332 alpha_align (align, pfill, alpha_insn_label, 1);
5336 alpha_auto_align_on = 0;
5339 demand_empty_rest_of_line ();
5342 /* Hook the normal string processor to reset known alignment. */
5345 s_alpha_stringer (terminate)
5348 alpha_current_align = 0;
5349 alpha_insn_label = NULL;
5350 stringer (terminate);
5353 /* Hook the normal space processing to reset known alignment. */
5356 s_alpha_space (ignore)
5359 alpha_current_align = 0;
5360 alpha_insn_label = NULL;
5364 /* Hook into cons for auto-alignment. */
5367 alpha_cons_align (size)
5373 while ((size >>= 1) != 0)
5376 if (alpha_auto_align_on && alpha_current_align < log_size)
5377 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5378 if (alpha_current_align > log_size)
5379 alpha_current_align = log_size;
5380 alpha_insn_label = NULL;
5383 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5384 pseudos. We just turn off auto-alignment and call down to cons. */
5387 s_alpha_ucons (bytes)
5390 int hold = alpha_auto_align_on;
5391 alpha_auto_align_on = 0;
5393 alpha_auto_align_on = hold;
5396 /* Switch the working cpu type. */
5399 s_alpha_arch (ignored)
5400 int ignored ATTRIBUTE_UNUSED;
5403 const struct cpu_type *p;
5406 name = input_line_pointer;
5407 ch = get_symbol_end ();
5409 for (p = cpu_types; p->name; ++p)
5410 if (strcmp (name, p->name) == 0)
5412 alpha_target_name = p->name, alpha_target = p->flags;
5415 as_warn ("Unknown CPU identifier `%s'", name);
5418 *input_line_pointer = ch;
5419 demand_empty_rest_of_line ();
5423 /* print token expression with alpha specific extension. */
5426 alpha_print_token (f, exp)
5428 const expressionS *exp;
5438 expressionS nexp = *exp;
5439 nexp.X_op = O_register;
5440 print_expr (f, &nexp);
5445 print_expr (f, exp);
5452 /* The target specific pseudo-ops which we support. */
5454 const pseudo_typeS md_pseudo_table[] = {
5456 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
5457 {"rdata", s_alpha_rdata, 0},
5459 {"text", s_alpha_text, 0},
5460 {"data", s_alpha_data, 0},
5462 {"sdata", s_alpha_sdata, 0},
5465 {"section", s_alpha_section, 0},
5466 {"section.s", s_alpha_section, 0},
5467 {"sect", s_alpha_section, 0},
5468 {"sect.s", s_alpha_section, 0},
5471 { "pdesc", s_alpha_pdesc, 0},
5472 { "name", s_alpha_name, 0},
5473 { "linkage", s_alpha_linkage, 0},
5474 { "code_address", s_alpha_code_address, 0},
5475 { "ent", s_alpha_ent, 0},
5476 { "frame", s_alpha_frame, 0},
5477 { "fp_save", s_alpha_fp_save, 0},
5478 { "mask", s_alpha_mask, 0},
5479 { "fmask", s_alpha_fmask, 0},
5480 { "end", s_alpha_end, 0},
5481 { "file", s_alpha_file, 0},
5482 { "rdata", s_alpha_section, 1},
5483 { "comm", s_alpha_comm, 0},
5484 { "link", s_alpha_section, 3},
5485 { "ctors", s_alpha_section, 4},
5486 { "dtors", s_alpha_section, 5},
5489 /* Frame related pseudos. */
5490 {"ent", s_alpha_ent, 0},
5491 {"end", s_alpha_end, 0},
5492 {"mask", s_alpha_mask, 0},
5493 {"fmask", s_alpha_mask, 1},
5494 {"frame", s_alpha_frame, 0},
5495 {"prologue", s_alpha_prologue, 0},
5496 {"file", s_alpha_file, 5},
5497 {"loc", s_alpha_loc, 9},
5498 {"stabs", s_alpha_stab, 's'},
5499 {"stabn", s_alpha_stab, 'n'},
5500 /* COFF debugging related pseudos. */
5501 {"begin", s_alpha_coff_wrapper, 0},
5502 {"bend", s_alpha_coff_wrapper, 1},
5503 {"def", s_alpha_coff_wrapper, 2},
5504 {"dim", s_alpha_coff_wrapper, 3},
5505 {"endef", s_alpha_coff_wrapper, 4},
5506 {"scl", s_alpha_coff_wrapper, 5},
5507 {"tag", s_alpha_coff_wrapper, 6},
5508 {"val", s_alpha_coff_wrapper, 7},
5510 {"prologue", s_ignore, 0},
5512 {"gprel32", s_alpha_gprel32, 0},
5513 {"t_floating", s_alpha_float_cons, 'd'},
5514 {"s_floating", s_alpha_float_cons, 'f'},
5515 {"f_floating", s_alpha_float_cons, 'F'},
5516 {"g_floating", s_alpha_float_cons, 'G'},
5517 {"d_floating", s_alpha_float_cons, 'D'},
5519 {"proc", s_alpha_proc, 0},
5520 {"aproc", s_alpha_proc, 1},
5521 {"set", s_alpha_set, 0},
5522 {"reguse", s_ignore, 0},
5523 {"livereg", s_ignore, 0},
5524 {"base", s_alpha_base, 0}, /*??*/
5525 {"option", s_ignore, 0},
5526 {"aent", s_ignore, 0},
5527 {"ugen", s_ignore, 0},
5528 {"eflag", s_ignore, 0},
5530 {"align", s_alpha_align, 0},
5531 {"double", s_alpha_float_cons, 'd'},
5532 {"float", s_alpha_float_cons, 'f'},
5533 {"single", s_alpha_float_cons, 'f'},
5534 {"ascii", s_alpha_stringer, 0},
5535 {"asciz", s_alpha_stringer, 1},
5536 {"string", s_alpha_stringer, 1},
5537 {"space", s_alpha_space, 0},
5538 {"skip", s_alpha_space, 0},
5539 {"zero", s_alpha_space, 0},
5541 /* Unaligned data pseudos. */
5542 {"uword", s_alpha_ucons, 2},
5543 {"ulong", s_alpha_ucons, 4},
5544 {"uquad", s_alpha_ucons, 8},
5547 /* Dwarf wants these versions of unaligned. */
5548 {"2byte", s_alpha_ucons, 2},
5549 {"4byte", s_alpha_ucons, 4},
5550 {"8byte", s_alpha_ucons, 8},
5553 /* We don't do any optimizing, so we can safely ignore these. */
5554 {"noalias", s_ignore, 0},
5555 {"alias", s_ignore, 0},
5557 {"arch", s_alpha_arch, 0},
5562 /* Build a BFD section with its flags set appropriately for the .lita,
5563 .lit8, or .lit4 sections. */
5566 create_literal_section (name, secp, symp)
5571 segT current_section = now_seg;
5572 int current_subsec = now_subseg;
5575 *secp = new_sec = subseg_new (name, 0);
5576 subseg_set (current_section, current_subsec);
5577 bfd_set_section_alignment (stdoutput, new_sec, 4);
5578 bfd_set_section_flags (stdoutput, new_sec,
5579 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
5582 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
5587 /* @@@ GP selection voodoo. All of this seems overly complicated and
5588 unnecessary; which is the primary reason it's for ECOFF only. */
5589 static inline void maybe_set_gp PARAMS ((asection *));
5598 vma = bfd_get_section_vma (foo, sec);
5599 if (vma && vma < alpha_gp_value)
5600 alpha_gp_value = vma;
5606 assert (alpha_gp_value == 0);
5608 /* Get minus-one in whatever width... */
5612 /* Select the smallest VMA of these existing sections. */
5613 maybe_set_gp (alpha_lita_section);
5615 /* These were disabled before -- should we use them? */
5616 maybe_set_gp (sdata);
5617 maybe_set_gp (lit8_sec);
5618 maybe_set_gp (lit4_sec);
5621 /* @@ Will a simple 0x8000 work here? If not, why not? */
5622 #define GP_ADJUSTMENT (0x8000 - 0x10)
5624 alpha_gp_value += GP_ADJUSTMENT;
5626 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5629 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5632 #endif /* OBJ_ECOFF */
5635 /* Map 's' to SHF_ALPHA_GPREL. */
5638 alpha_elf_section_letter (letter, ptr_msg)
5643 return SHF_ALPHA_GPREL;
5645 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
5649 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5652 alpha_elf_section_flags (flags, attr, type)
5654 int attr, type ATTRIBUTE_UNUSED;
5656 if (attr & SHF_ALPHA_GPREL)
5657 flags |= SEC_SMALL_DATA;
5660 #endif /* OBJ_ELF */
5662 /* Called internally to handle all alignment needs. This takes care
5663 of eliding calls to frag_align if'n the cached current alignment
5664 says we've already got it, as well as taking care of the auto-align
5665 feature wrt labels. */
5668 alpha_align (n, pfill, label, force)
5672 int force ATTRIBUTE_UNUSED;
5674 if (alpha_current_align >= n)
5679 if (subseg_text_p (now_seg))
5680 frag_align_code (n, 0);
5682 frag_align (n, 0, 0);
5685 frag_align (n, *pfill, 0);
5687 alpha_current_align = n;
5689 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
5691 symbol_set_frag (label, frag_now);
5692 S_SET_VALUE (label, (valueT) frag_now_fix ());
5695 record_alignment (now_seg, n);
5697 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
5698 in a reloc for the linker to see. */
5701 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5702 of an rs_align_code fragment. */
5705 alpha_handle_align (fragp)
5708 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5709 static char const nopunop[8] = {
5710 0x1f, 0x04, 0xff, 0x47,
5711 0x00, 0x00, 0xfe, 0x2f
5717 if (fragp->fr_type != rs_align_code)
5720 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5721 p = fragp->fr_literal + fragp->fr_fix;
5734 memcpy (p, unop, 4);
5740 memcpy (p, nopunop, 8);
5742 fragp->fr_fix += fix;
5746 /* The Alpha has support for some VAX floating point types, as well as for
5747 IEEE floating point. We consider IEEE to be the primary floating point
5748 format, and sneak in the VAX floating point support here. */
5749 #define md_atof vax_md_atof
5750 #include "config/atof-vax.c"