1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
4 Contributed by Carnegie Mellon University, 1993.
5 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
6 Modified by Ken Raeburn for gas-2.x and ECOFF support.
7 Modified by Richard Henderson for ELF support.
8 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10 This file is part of GAS, the GNU Assembler.
12 GAS is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GAS is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GAS; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 * Mach Operating System
29 * Copyright (c) 1993 Carnegie Mellon University
30 * All Rights Reserved.
32 * Permission to use, copy, modify and distribute this software and its
33 * documentation is hereby granted, provided that both the copyright
34 * notice and this permission notice appear in all copies of the
35 * software, derivative works or modified versions, and any portions
36 * thereof, and that both notices appear in supporting documentation.
38 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 * Carnegie Mellon requests users of this software to return to
44 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 * School of Computer Science
46 * Carnegie Mellon University
47 * Pittsburgh PA 15213-3890
49 * any improvements or extensions that they make and grant Carnegie the
50 * rights to redistribute these changes.
55 #include "struc-symbol.h"
58 #include "opcode/alpha.h"
61 #include "elf/alpha.h"
62 #include "dwarf2dbg.h"
65 #include "safe-ctype.h"
69 #define TOKENIZE_ERROR -1
70 #define TOKENIZE_ERROR_REPORT -2
72 #define MAX_INSN_FIXUPS 2
73 #define MAX_INSN_ARGS 5
77 bfd_reloc_code_real_type reloc;
83 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
87 enum alpha_macro_arg {
99 void (*emit) PARAMS ((const expressionS *, int, const PTR));
101 enum alpha_macro_arg argsets[16];
104 /* Extra expression types. */
106 #define O_pregister O_md1 /* O_register, in parentheses */
107 #define O_cpregister O_md2 /* + a leading comma */
109 /* Note, the alpha_reloc_op table below depends on the ordering
110 of O_literal .. O_gpre16. */
111 #define O_literal O_md3 /* !literal relocation */
112 #define O_lituse_addr O_md4 /* !lituse_addr relocation */
113 #define O_lituse_base O_md5 /* !lituse_base relocation */
114 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
115 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
116 #define O_gpdisp O_md8 /* !gpdisp relocation */
117 #define O_gprelhigh O_md9 /* !gprelhigh relocation */
118 #define O_gprellow O_md10 /* !gprellow relocation */
119 #define O_gprel O_md11 /* !gprel relocation */
120 #define O_samegp O_md12 /* !samegp relocation */
122 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
123 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
124 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
125 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
127 #define LITUSE_ADDR 0
128 #define LITUSE_BASE 1
129 #define LITUSE_BYTOFF 2
132 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_samegp)
134 /* Macros for extracting the type and number of encoded register tokens */
136 #define is_ir_num(x) (((x) & 32) == 0)
137 #define is_fpr_num(x) (((x) & 32) != 0)
138 #define regno(x) ((x) & 31)
140 /* Something odd inherited from the old assembler */
142 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
143 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
145 /* Predicates for 16- and 32-bit ranges */
146 /* XXX: The non-shift version appears to trigger a compiler bug when
147 cross-assembling from x86 w/ gcc 2.7.2. */
150 #define range_signed_16(x) \
151 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
152 #define range_signed_32(x) \
153 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
155 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
156 (offsetT) (x) <= (offsetT) 0x7FFF)
157 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
158 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
161 /* Macros for sign extending from 16- and 32-bits. */
162 /* XXX: The cast macros will work on all the systems that I care about,
163 but really a predicate should be found to use the non-cast forms. */
166 #define sign_extend_16(x) ((short) (x))
167 #define sign_extend_32(x) ((int) (x))
169 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
170 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
171 ^ 0x80000000) - 0x80000000)
174 /* Macros to build tokens */
176 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
177 (t).X_op = O_register, \
178 (t).X_add_number = (r))
179 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
180 (t).X_op = O_pregister, \
181 (t).X_add_number = (r))
182 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
183 (t).X_op = O_cpregister, \
184 (t).X_add_number = (r))
185 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
186 (t).X_op = O_register, \
187 (t).X_add_number = (r) + 32)
188 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
189 (t).X_op = O_symbol, \
190 (t).X_add_symbol = (s), \
191 (t).X_add_number = (a))
192 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
193 (t).X_op = O_constant, \
194 (t).X_add_number = (n))
196 /* Prototypes for all local functions */
198 static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
199 static void alpha_adjust_symtab_relocs PARAMS ((bfd *, asection *, PTR));
201 static int tokenize_arguments PARAMS ((char *, expressionS *, int));
202 static const struct alpha_opcode *find_opcode_match
203 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
204 static const struct alpha_macro *find_macro_match
205 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
206 static unsigned insert_operand
207 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
208 static void assemble_insn
209 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
210 struct alpha_insn *, bfd_reloc_code_real_type));
211 static void emit_insn PARAMS ((struct alpha_insn *));
212 static void assemble_tokens_to_insn
213 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
214 static void assemble_tokens
215 PARAMS ((const char *, const expressionS *, int, int));
217 static long load_expression
218 PARAMS ((int, const expressionS *, int *, expressionS *));
220 static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
221 static void emit_division PARAMS ((const expressionS *, int, const PTR));
222 static void emit_lda PARAMS ((const expressionS *, int, const PTR));
223 static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
224 static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
225 static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
226 static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
227 static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
228 static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
229 static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
230 static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
231 static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
232 static void emit_stX PARAMS ((const expressionS *, int, const PTR));
233 static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
234 static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
235 static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
237 static void s_alpha_text PARAMS ((int));
238 static void s_alpha_data PARAMS ((int));
240 static void s_alpha_comm PARAMS ((int));
241 static void s_alpha_rdata PARAMS ((int));
244 static void s_alpha_sdata PARAMS ((int));
247 static void s_alpha_section PARAMS ((int));
248 static void s_alpha_ent PARAMS ((int));
249 static void s_alpha_end PARAMS ((int));
250 static void s_alpha_mask PARAMS ((int));
251 static void s_alpha_frame PARAMS ((int));
252 static void s_alpha_prologue PARAMS ((int));
253 static void s_alpha_file PARAMS ((int));
254 static void s_alpha_loc PARAMS ((int));
255 static void s_alpha_stab PARAMS ((int));
256 static void s_alpha_coff_wrapper PARAMS ((int));
259 static void s_alpha_section PARAMS ((int));
261 static void s_alpha_gprel32 PARAMS ((int));
262 static void s_alpha_float_cons PARAMS ((int));
263 static void s_alpha_proc PARAMS ((int));
264 static void s_alpha_set PARAMS ((int));
265 static void s_alpha_base PARAMS ((int));
266 static void s_alpha_align PARAMS ((int));
267 static void s_alpha_stringer PARAMS ((int));
268 static void s_alpha_space PARAMS ((int));
269 static void s_alpha_ucons PARAMS ((int));
270 static void s_alpha_arch PARAMS ((int));
272 static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
274 static void select_gp_value PARAMS ((void));
276 static void alpha_align PARAMS ((int, char *, symbolS *, int));
278 /* Generic assembler global variables which must be defined by all
281 /* Characters which always start a comment. */
282 const char comment_chars[] = "#";
284 /* Characters which start a comment at the beginning of a line. */
285 const char line_comment_chars[] = "#";
287 /* Characters which may be used to separate multiple commands on a
289 const char line_separator_chars[] = ";";
291 /* Characters which are used to indicate an exponent in a floating
293 const char EXP_CHARS[] = "eE";
295 /* Characters which mean that a number is a floating point constant,
298 const char FLT_CHARS[] = "dD";
300 /* XXX: Do all of these really get used on the alpha?? */
301 char FLT_CHARS[] = "rRsSfFdDxXpP";
305 const char *md_shortopts = "Fm:g+1h:HG:";
307 const char *md_shortopts = "Fm:gG:";
310 struct option md_longopts[] = {
311 #define OPTION_32ADDR (OPTION_MD_BASE)
312 { "32addr", no_argument, NULL, OPTION_32ADDR },
313 #define OPTION_RELAX (OPTION_32ADDR + 1)
314 { "relax", no_argument, NULL, OPTION_RELAX },
316 #define OPTION_MDEBUG (OPTION_RELAX + 1)
317 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
318 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
319 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
321 { NULL, no_argument, NULL, 0 }
324 size_t md_longopts_size = sizeof (md_longopts);
328 #define AXP_REG_R16 16
329 #define AXP_REG_R17 17
331 #define AXP_REG_T9 22
333 #define AXP_REG_T10 23
335 #define AXP_REG_T11 24
337 #define AXP_REG_T12 25
338 #define AXP_REG_AI 25
340 #define AXP_REG_FP 29
343 #define AXP_REG_GP AXP_REG_PV
344 #endif /* OBJ_EVAX */
346 /* The cpu for which we are generating code */
347 static unsigned alpha_target = AXP_OPCODE_BASE;
348 static const char *alpha_target_name = "<all>";
350 /* The hash table of instruction opcodes */
351 static struct hash_control *alpha_opcode_hash;
353 /* The hash table of macro opcodes */
354 static struct hash_control *alpha_macro_hash;
357 /* The $gp relocation symbol */
358 static symbolS *alpha_gp_symbol;
360 /* XXX: what is this, and why is it exported? */
361 valueT alpha_gp_value;
364 /* The current $gp register */
365 static int alpha_gp_register = AXP_REG_GP;
367 /* A table of the register symbols */
368 static symbolS *alpha_register_table[64];
370 /* Constant sections, or sections of constants */
372 static segT alpha_lita_section;
373 static segT alpha_lit4_section;
376 static segT alpha_link_section;
377 static segT alpha_ctors_section;
378 static segT alpha_dtors_section;
380 static segT alpha_lit8_section;
382 /* Symbols referring to said sections. */
384 static symbolS *alpha_lita_symbol;
385 static symbolS *alpha_lit4_symbol;
388 static symbolS *alpha_link_symbol;
389 static symbolS *alpha_ctors_symbol;
390 static symbolS *alpha_dtors_symbol;
392 static symbolS *alpha_lit8_symbol;
394 /* Literal for .litX+0x8000 within .lita */
396 static offsetT alpha_lit4_literal;
397 static offsetT alpha_lit8_literal;
401 /* The active .ent symbol. */
402 static symbolS *alpha_cur_ent_sym;
405 /* Is the assembler not allowed to use $at? */
406 static int alpha_noat_on = 0;
408 /* Are macros enabled? */
409 static int alpha_macros_on = 1;
411 /* Are floats disabled? */
412 static int alpha_nofloats_on = 0;
414 /* Are addresses 32 bit? */
415 static int alpha_addr32_on = 0;
417 /* Symbol labelling the current insn. When the Alpha gas sees
420 and the section happens to not be on an eight byte boundary, it
421 will align both the symbol and the .quad to an eight byte boundary. */
422 static symbolS *alpha_insn_label;
424 /* Whether we should automatically align data generation pseudo-ops.
425 .align 0 will turn this off. */
426 static int alpha_auto_align_on = 1;
428 /* The known current alignment of the current section. */
429 static int alpha_current_align;
431 /* These are exported to ECOFF code. */
432 unsigned long alpha_gprmask, alpha_fprmask;
434 /* Whether the debugging option was seen. */
435 static int alpha_debug;
438 /* Whether we are emitting an mdebug section. */
439 int alpha_flag_mdebug = -1;
442 /* Don't fully resolve relocations, allowing code movement in the linker. */
443 static int alpha_flag_relax;
445 /* What value to give to bfd_set_gp_size. */
446 static int g_switch_value = 8;
449 /* Collect information about current procedure here. */
451 symbolS *symbol; /* proc pdesc symbol */
453 int framereg; /* register for frame pointer */
454 int framesize; /* size of frame */
464 static int alpha_flag_hash_long_names = 0; /* -+ */
465 static int alpha_flag_show_after_trunc = 0; /* -H */
467 /* If the -+ switch is given, then a hash is appended to any name that is
468 * longer than 64 characters, else longer symbol names are truncated.
474 /* A table to map the spelling of a relocation operand into an appropriate
475 bfd_reloc_code_real_type type. The table is assumed to be ordered such
476 that op-O_literal indexes into it. */
478 #define ALPHA_RELOC_TABLE(op) \
479 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
481 : (int) (op) - (int) O_literal) ])
483 #define DEF(NAME, RELOC, REQ, ALLOW) \
484 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
486 static const struct alpha_reloc_op_tag {
487 const char *name; /* string to lookup */
488 size_t length; /* size of the string */
489 operatorT op; /* which operator to use */
490 bfd_reloc_code_real_type reloc; /* relocation before frob */
491 unsigned int require_seq : 1; /* require a sequence number */
492 unsigned int allow_seq : 1; /* allow a sequence number */
493 } alpha_reloc_op[] = {
494 DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
495 DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
496 DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
497 DEF(lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
498 DEF(lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
499 DEF(gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
500 DEF(gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
501 DEF(gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
502 DEF(gprel, BFD_RELOC_GPREL16, 0, 0),
503 DEF(samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0)
508 static const int alpha_num_reloc_op
509 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
510 #endif /* RELOC_OP_P */
512 /* Maximum # digits needed to hold the largest sequence # */
513 #define ALPHA_RELOC_DIGITS 25
515 /* Structure to hold explict sequence information. */
516 struct alpha_reloc_tag
518 fixS *slaves; /* head of linked list of !literals */
519 segT segment; /* segment relocs are in or undefined_section*/
520 long sequence; /* sequence # */
521 unsigned n_master; /* # of literals */
522 unsigned n_slaves; /* # of lituses */
523 char multi_section_p; /* True if more than one section was used */
524 char string[1]; /* printable form of sequence to hash with */
527 /* Hash table to link up literals with the appropriate lituse */
528 static struct hash_control *alpha_literal_hash;
530 /* Sequence numbers for internal use by macros. */
531 static long next_sequence_num = -1;
533 /* A table of CPU names and opcode sets. */
535 static const struct cpu_type {
539 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
540 This supports usage under DU 4.0b that does ".arch ev4", and
541 usage in MILO that does -m21064. Probably something more
542 specific like -m21064-pal should be used, but oh well. */
544 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
545 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
546 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
547 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
548 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
549 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
550 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
552 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
553 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
555 { "ev4", AXP_OPCODE_BASE },
556 { "ev45", AXP_OPCODE_BASE },
557 { "lca45", AXP_OPCODE_BASE },
558 { "ev5", AXP_OPCODE_BASE },
559 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
560 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
561 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
563 { "all", AXP_OPCODE_BASE },
567 /* The macro table */
569 static const struct alpha_macro alpha_macros[] = {
570 /* Load/Store macros */
571 { "lda", emit_lda, NULL,
572 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
573 { "ldah", emit_ldah, NULL,
574 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
576 { "ldl", emit_ir_load, "ldl",
577 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
578 { "ldl_l", emit_ir_load, "ldl_l",
579 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
580 { "ldq", emit_ir_load, "ldq",
581 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
582 { "ldq_l", emit_ir_load, "ldq_l",
583 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
584 { "ldq_u", emit_ir_load, "ldq_u",
585 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
586 { "ldf", emit_loadstore, "ldf",
587 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
588 { "ldg", emit_loadstore, "ldg",
589 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
590 { "lds", emit_loadstore, "lds",
591 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
592 { "ldt", emit_loadstore, "ldt",
593 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
595 { "ldb", emit_ldX, (PTR) 0,
596 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
597 { "ldbu", emit_ldXu, (PTR) 0,
598 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
599 { "ldw", emit_ldX, (PTR) 1,
600 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
601 { "ldwu", emit_ldXu, (PTR) 1,
602 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
604 { "uldw", emit_uldX, (PTR) 1,
605 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
606 { "uldwu", emit_uldXu, (PTR) 1,
607 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
608 { "uldl", emit_uldX, (PTR) 2,
609 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
610 { "uldlu", emit_uldXu, (PTR) 2,
611 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
612 { "uldq", emit_uldXu, (PTR) 3,
613 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
615 { "ldgp", emit_ldgp, NULL,
616 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
618 { "ldi", emit_lda, NULL,
619 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
620 { "ldil", emit_ldil, NULL,
621 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
622 { "ldiq", emit_lda, NULL,
623 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
625 { "ldif" emit_ldiq, NULL,
626 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
627 { "ldid" emit_ldiq, NULL,
628 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
629 { "ldig" emit_ldiq, NULL,
630 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
631 { "ldis" emit_ldiq, NULL,
632 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
633 { "ldit" emit_ldiq, NULL,
634 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
637 { "stl", emit_loadstore, "stl",
638 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
639 { "stl_c", emit_loadstore, "stl_c",
640 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
641 { "stq", emit_loadstore, "stq",
642 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
643 { "stq_c", emit_loadstore, "stq_c",
644 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
645 { "stq_u", emit_loadstore, "stq_u",
646 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
647 { "stf", emit_loadstore, "stf",
648 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
649 { "stg", emit_loadstore, "stg",
650 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
651 { "sts", emit_loadstore, "sts",
652 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
653 { "stt", emit_loadstore, "stt",
654 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
656 { "stb", emit_stX, (PTR) 0,
657 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
658 { "stw", emit_stX, (PTR) 1,
659 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
660 { "ustw", emit_ustX, (PTR) 1,
661 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
662 { "ustl", emit_ustX, (PTR) 2,
663 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
664 { "ustq", emit_ustX, (PTR) 3,
665 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
667 /* Arithmetic macros */
669 { "absl" emit_absl, 1, { IR } },
670 { "absl" emit_absl, 2, { IR, IR } },
671 { "absl" emit_absl, 2, { EXP, IR } },
672 { "absq" emit_absq, 1, { IR } },
673 { "absq" emit_absq, 2, { IR, IR } },
674 { "absq" emit_absq, 2, { EXP, IR } },
677 { "sextb", emit_sextX, (PTR) 0,
678 { MACRO_IR, MACRO_IR, MACRO_EOA,
680 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
681 { "sextw", emit_sextX, (PTR) 1,
682 { MACRO_IR, MACRO_IR, MACRO_EOA,
684 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
686 { "divl", emit_division, "__divl",
687 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
688 MACRO_IR, MACRO_IR, MACRO_EOA,
689 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
690 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
691 { "divlu", emit_division, "__divlu",
692 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
693 MACRO_IR, MACRO_IR, MACRO_EOA,
694 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
695 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
696 { "divq", emit_division, "__divq",
697 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
698 MACRO_IR, MACRO_IR, MACRO_EOA,
699 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
700 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
701 { "divqu", emit_division, "__divqu",
702 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
703 MACRO_IR, MACRO_IR, MACRO_EOA,
704 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
705 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
706 { "reml", emit_division, "__reml",
707 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
708 MACRO_IR, MACRO_IR, MACRO_EOA,
709 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
710 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
711 { "remlu", emit_division, "__remlu",
712 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
713 MACRO_IR, MACRO_IR, MACRO_EOA,
714 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
715 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
716 { "remq", emit_division, "__remq",
717 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
718 MACRO_IR, MACRO_IR, MACRO_EOA,
719 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
720 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
721 { "remqu", emit_division, "__remqu",
722 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
723 MACRO_IR, MACRO_IR, MACRO_EOA,
724 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
725 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
727 { "jsr", emit_jsrjmp, "jsr",
728 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
729 MACRO_PIR, MACRO_EOA,
730 MACRO_IR, MACRO_EXP, MACRO_EOA,
731 MACRO_EXP, MACRO_EOA } },
732 { "jmp", emit_jsrjmp, "jmp",
733 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
734 MACRO_PIR, MACRO_EOA,
735 MACRO_IR, MACRO_EXP, MACRO_EOA,
736 MACRO_EXP, MACRO_EOA } },
737 { "ret", emit_retjcr, "ret",
738 { MACRO_IR, MACRO_EXP, MACRO_EOA,
740 MACRO_PIR, MACRO_EXP, MACRO_EOA,
741 MACRO_PIR, MACRO_EOA,
742 MACRO_EXP, MACRO_EOA,
744 { "jcr", emit_retjcr, "jcr",
745 { MACRO_IR, MACRO_EXP, MACRO_EOA,
747 MACRO_PIR, MACRO_EXP, MACRO_EOA,
748 MACRO_PIR, MACRO_EOA,
749 MACRO_EXP, MACRO_EOA,
751 { "jsr_coroutine", emit_retjcr, "jcr",
752 { MACRO_IR, MACRO_EXP, MACRO_EOA,
754 MACRO_PIR, MACRO_EXP, MACRO_EOA,
755 MACRO_PIR, MACRO_EOA,
756 MACRO_EXP, MACRO_EOA,
760 static const unsigned int alpha_num_macros
761 = sizeof (alpha_macros) / sizeof (*alpha_macros);
763 /* Public interface functions */
765 /* This function is called once, at assembler startup time. It sets
766 up all the tables, etc. that the MD part of the assembler will
767 need, that can be determined before arguments are parsed. */
774 /* Verify that X_op field is wide enough. */
778 assert (e.X_op == O_max);
781 /* Create the opcode hash table */
783 alpha_opcode_hash = hash_new ();
784 for (i = 0; i < alpha_num_opcodes;)
786 const char *name, *retval, *slash;
788 name = alpha_opcodes[i].name;
789 retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
791 as_fatal (_("internal error: can't hash opcode `%s': %s"),
794 /* Some opcodes include modifiers of various sorts with a "/mod"
795 syntax, like the architecture manual suggests. However, for
796 use with gcc at least, we also need access to those same opcodes
799 if ((slash = strchr (name, '/')) != NULL)
801 char *p = xmalloc (strlen (name));
802 memcpy (p, name, slash - name);
803 strcpy (p + (slash - name), slash + 1);
805 (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
806 /* Ignore failures -- the opcode table does duplicate some
807 variants in different forms, like "hw_stq" and "hw_st/q". */
810 while (++i < alpha_num_opcodes
811 && (alpha_opcodes[i].name == name
812 || !strcmp (alpha_opcodes[i].name, name)))
816 /* Create the macro hash table */
818 alpha_macro_hash = hash_new ();
819 for (i = 0; i < alpha_num_macros;)
821 const char *name, *retval;
823 name = alpha_macros[i].name;
824 retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
826 as_fatal (_("internal error: can't hash macro `%s': %s"),
829 while (++i < alpha_num_macros
830 && (alpha_macros[i].name == name
831 || !strcmp (alpha_macros[i].name, name)))
835 /* Construct symbols for each of the registers */
837 for (i = 0; i < 32; ++i)
840 sprintf (name, "$%d", i);
841 alpha_register_table[i] = symbol_create (name, reg_section, i,
847 sprintf (name, "$f%d", i - 32);
848 alpha_register_table[i] = symbol_create (name, reg_section, i,
852 /* Create the special symbols and sections we'll be using */
854 /* So .sbss will get used for tiny objects. */
855 bfd_set_gp_size (stdoutput, g_switch_value);
858 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
860 /* For handling the GP, create a symbol that won't be output in the
861 symbol table. We'll edit it out of relocs later. */
862 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
867 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
873 segT sec = subseg_new (".mdebug", (subsegT) 0);
874 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
875 bfd_set_section_alignment (stdoutput, sec, 3);
879 /* Create literal lookup hash table. */
880 alpha_literal_hash = hash_new ();
882 subseg_set (text_section, 0);
885 /* The public interface to the instruction assembler. */
891 char opname[32]; /* current maximum is 13 */
892 expressionS tok[MAX_INSN_ARGS];
896 /* split off the opcode */
897 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
898 trunclen = (opnamelen < sizeof (opname) - 1
900 : sizeof (opname) - 1);
901 memcpy (opname, str, trunclen);
902 opname[trunclen] = '\0';
904 /* tokenize the rest of the line */
905 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
907 if (ntok != TOKENIZE_ERROR_REPORT)
908 as_bad (_("syntax error"));
914 assemble_tokens (opname, tok, ntok, alpha_macros_on);
917 /* Round up a section's size to the appropriate boundary. */
920 md_section_align (seg, size)
924 int align = bfd_get_section_alignment (stdoutput, seg);
925 valueT mask = ((valueT) 1 << align) - 1;
927 return (size + mask) & ~mask;
930 /* Turn a string in input_line_pointer into a floating point constant
931 of type TYPE, and store the appropriate bytes in *LITP. The number
932 of LITTLENUMS emitted is stored in *SIZEP. An error message is
933 returned, or NULL on OK. */
935 /* Equal to MAX_PRECISION in atof-ieee.c */
936 #define MAX_LITTLENUMS 6
938 extern char *vax_md_atof PARAMS ((int, char *, int *));
941 md_atof (type, litP, sizeP)
947 LITTLENUM_TYPE words[MAX_LITTLENUMS];
948 LITTLENUM_TYPE *wordP;
955 /* VAX md_atof doesn't like "G" for some reason. */
959 return vax_md_atof (type, litP, sizeP);
982 return _("Bad call to MD_ATOF()");
984 t = atof_ieee (input_line_pointer, type, words);
986 input_line_pointer = t;
987 *sizeP = prec * sizeof (LITTLENUM_TYPE);
989 for (wordP = words + prec - 1; prec--;)
991 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
992 litP += sizeof (LITTLENUM_TYPE);
998 /* Take care of the target-specific command-line options. */
1001 md_parse_option (c, arg)
1008 alpha_nofloats_on = 1;
1012 alpha_addr32_on = 1;
1020 g_switch_value = atoi (arg);
1025 const struct cpu_type *p;
1026 for (p = cpu_types; p->name; ++p)
1027 if (strcmp (arg, p->name) == 0)
1029 alpha_target_name = p->name, alpha_target = p->flags;
1032 as_warn (_("Unknown CPU identifier `%s'"), arg);
1038 case '+': /* For g++. Hash any name > 63 chars long. */
1039 alpha_flag_hash_long_names = 1;
1042 case 'H': /* Show new symbol after hash truncation */
1043 alpha_flag_show_after_trunc = 1;
1046 case 'h': /* for gnu-c/vax compatibility. */
1051 alpha_flag_relax = 1;
1056 alpha_flag_mdebug = 1;
1058 case OPTION_NO_MDEBUG:
1059 alpha_flag_mdebug = 0;
1070 /* Print a description of the command-line options that we accept. */
1073 md_show_usage (stream)
1078 -32addr treat addresses as 32-bit values\n\
1079 -F lack floating point instructions support\n\
1080 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mall\n\
1081 specify variant of Alpha architecture\n\
1082 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264\n\
1083 these variants include PALcode opcodes\n"),
1088 -+ hash encode (don't truncate) names longer than 64 characters\n\
1089 -H show new symbol after hash truncation\n"),
1094 /* Decide from what point a pc-relative relocation is relative to,
1095 relative to the pc-relative fixup. Er, relatively speaking. */
1098 md_pcrel_from (fixP)
1101 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1102 switch (fixP->fx_r_type)
1104 case BFD_RELOC_ALPHA_GPDISP:
1105 case BFD_RELOC_ALPHA_GPDISP_HI16:
1106 case BFD_RELOC_ALPHA_GPDISP_LO16:
1109 return fixP->fx_size + addr;
1113 /* Attempt to simplify or even eliminate a fixup. The return value is
1114 ignored; perhaps it was once meaningful, but now it is historical.
1115 To indicate that a fixup has been eliminated, set fixP->fx_done.
1117 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1118 internally into the GPDISP reloc used externally. We had to do
1119 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1120 the distance to the "lda" instruction for setting the addend to
1124 md_apply_fix3 (fixP, valP, seg)
1129 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1130 valueT value = * valP;
1131 unsigned image, size;
1133 switch (fixP->fx_r_type)
1135 /* The GPDISP relocations are processed internally with a symbol
1136 referring to the current function; we need to drop in a value
1137 which, when added to the address of the start of the function,
1138 gives the desired GP. */
1139 case BFD_RELOC_ALPHA_GPDISP_HI16:
1141 fixS *next = fixP->fx_next;
1143 /* With user-specified !gpdisp relocations, we can be missing
1144 the matching LO16 reloc. We will have already issued an
1147 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1148 - fixP->fx_frag->fr_address - fixP->fx_where);
1150 value = (value - sign_extend_16 (value)) >> 16;
1153 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1157 case BFD_RELOC_ALPHA_GPDISP_LO16:
1158 value = sign_extend_16 (value);
1159 fixP->fx_offset = 0;
1165 fixP->fx_addsy = section_symbol (seg);
1166 md_number_to_chars (fixpos, value, 2);
1171 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1176 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1181 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1184 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1186 md_number_to_chars (fixpos, value, size);
1192 case BFD_RELOC_GPREL32:
1193 assert (fixP->fx_subsy == alpha_gp_symbol);
1195 /* FIXME: inherited this obliviousness of `value' -- why? */
1196 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1199 case BFD_RELOC_GPREL32:
1201 case BFD_RELOC_GPREL16:
1202 case BFD_RELOC_ALPHA_GPREL_HI16:
1203 case BFD_RELOC_ALPHA_GPREL_LO16:
1206 case BFD_RELOC_23_PCREL_S2:
1207 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1209 image = bfd_getl32 (fixpos);
1210 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1215 case BFD_RELOC_ALPHA_HINT:
1216 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1218 image = bfd_getl32 (fixpos);
1219 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1225 case BFD_RELOC_ALPHA_BRSGP:
1230 case BFD_RELOC_ALPHA_LITERAL:
1231 md_number_to_chars (fixpos, value, 2);
1234 case BFD_RELOC_ALPHA_ELF_LITERAL:
1235 case BFD_RELOC_ALPHA_LITUSE:
1236 case BFD_RELOC_ALPHA_LINKAGE:
1237 case BFD_RELOC_ALPHA_CODEADDR:
1240 case BFD_RELOC_VTABLE_INHERIT:
1241 case BFD_RELOC_VTABLE_ENTRY:
1246 const struct alpha_operand *operand;
1248 if ((int) fixP->fx_r_type >= 0)
1249 as_fatal (_("unhandled relocation type %s"),
1250 bfd_get_reloc_code_name (fixP->fx_r_type));
1252 assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
1253 operand = &alpha_operands[-(int) fixP->fx_r_type];
1255 /* The rest of these fixups only exist internally during symbol
1256 resolution and have no representation in the object file.
1257 Therefore they must be completely resolved as constants. */
1259 if (fixP->fx_addsy != 0
1260 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
1261 as_bad_where (fixP->fx_file, fixP->fx_line,
1262 _("non-absolute expression in constant field"));
1264 image = bfd_getl32 (fixpos);
1265 image = insert_operand (image, operand, (offsetT) value,
1266 fixP->fx_file, fixP->fx_line);
1271 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1275 as_warn_where (fixP->fx_file, fixP->fx_line,
1276 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
1281 md_number_to_chars (fixpos, image, 4);
1287 /* Look for a register name in the given symbol. */
1290 md_undefined_symbol (name)
1295 int is_float = 0, num;
1300 if (name[1] == 'p' && name[2] == '\0')
1301 return alpha_register_table[AXP_REG_FP];
1306 if (!ISDIGIT (*++name))
1310 case '0': case '1': case '2': case '3': case '4':
1311 case '5': case '6': case '7': case '8': case '9':
1312 if (name[1] == '\0')
1313 num = name[0] - '0';
1314 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
1316 num = (name[0] - '0') * 10 + name[1] - '0';
1323 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
1324 as_warn (_("Used $at without \".set noat\""));
1325 return alpha_register_table[num + is_float];
1328 if (name[1] == 't' && name[2] == '\0')
1331 as_warn (_("Used $at without \".set noat\""));
1332 return alpha_register_table[AXP_REG_AT];
1337 if (name[1] == 'p' && name[2] == '\0')
1338 return alpha_register_table[alpha_gp_register];
1342 if (name[1] == 'p' && name[2] == '\0')
1343 return alpha_register_table[AXP_REG_SP];
1351 /* @@@ Magic ECOFF bits. */
1354 alpha_frob_ecoff_data ()
1357 /* $zero and $f31 are read-only */
1358 alpha_gprmask &= ~1;
1359 alpha_fprmask &= ~1;
1363 /* Hook to remember a recently defined label so that the auto-align
1364 code can adjust the symbol after we know what alignment will be
1368 alpha_define_label (sym)
1371 alpha_insn_label = sym;
1374 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
1375 let it get resolved at assembly time. */
1378 alpha_validate_fix (f)
1385 if (f->fx_r_type != BFD_RELOC_ALPHA_BRSGP)
1388 if (! S_IS_DEFINED (f->fx_addsy))
1391 switch (S_GET_OTHER (f->fx_addsy) & STO_ALPHA_STD_GPLOAD)
1393 case STO_ALPHA_NOPV:
1395 case STO_ALPHA_STD_GPLOAD:
1399 if (S_IS_LOCAL (f->fx_addsy))
1402 name = S_GET_NAME (f->fx_addsy);
1403 as_bad_where (f->fx_file, f->fx_line,
1404 _("!samegp reloc against symbol without .prologue: %s"),
1409 if (! (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy)))
1411 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
1412 f->fx_offset += offset;
1417 /* Return true if we must always emit a reloc for a type and false if
1418 there is some hope of resolving it at assembly time. */
1421 alpha_force_relocation (f)
1424 if (alpha_flag_relax)
1427 switch (f->fx_r_type)
1429 case BFD_RELOC_ALPHA_GPDISP_HI16:
1430 case BFD_RELOC_ALPHA_GPDISP_LO16:
1431 case BFD_RELOC_ALPHA_GPDISP:
1432 case BFD_RELOC_ALPHA_LITERAL:
1433 case BFD_RELOC_ALPHA_ELF_LITERAL:
1434 case BFD_RELOC_ALPHA_LITUSE:
1435 case BFD_RELOC_GPREL16:
1436 case BFD_RELOC_GPREL32:
1437 case BFD_RELOC_ALPHA_GPREL_HI16:
1438 case BFD_RELOC_ALPHA_GPREL_LO16:
1439 case BFD_RELOC_ALPHA_LINKAGE:
1440 case BFD_RELOC_ALPHA_CODEADDR:
1441 case BFD_RELOC_ALPHA_BRSGP:
1442 case BFD_RELOC_VTABLE_INHERIT:
1443 case BFD_RELOC_VTABLE_ENTRY:
1446 case BFD_RELOC_23_PCREL_S2:
1449 case BFD_RELOC_ALPHA_HINT:
1457 /* Return true if we can partially resolve a relocation now. */
1460 alpha_fix_adjustable (f)
1464 /* Prevent all adjustments to global symbols */
1465 if (S_IS_EXTERN (f->fx_addsy) || S_IS_WEAK (f->fx_addsy))
1469 /* Are there any relocation types for which we must generate a reloc
1470 but we can adjust the values contained within it? */
1471 switch (f->fx_r_type)
1473 case BFD_RELOC_ALPHA_GPDISP_HI16:
1474 case BFD_RELOC_ALPHA_GPDISP_LO16:
1475 case BFD_RELOC_ALPHA_GPDISP:
1476 case BFD_RELOC_ALPHA_BRSGP:
1479 case BFD_RELOC_ALPHA_LITERAL:
1480 case BFD_RELOC_ALPHA_ELF_LITERAL:
1481 case BFD_RELOC_ALPHA_LITUSE:
1482 case BFD_RELOC_ALPHA_LINKAGE:
1483 case BFD_RELOC_ALPHA_CODEADDR:
1486 case BFD_RELOC_VTABLE_ENTRY:
1487 case BFD_RELOC_VTABLE_INHERIT:
1490 case BFD_RELOC_GPREL16:
1491 case BFD_RELOC_GPREL32:
1492 case BFD_RELOC_ALPHA_GPREL_HI16:
1493 case BFD_RELOC_ALPHA_GPREL_LO16:
1494 case BFD_RELOC_23_PCREL_S2:
1497 case BFD_RELOC_ALPHA_HINT:
1506 /* Generate the BFD reloc to be stuck in the object file from the
1507 fixup used internally in the assembler. */
1510 tc_gen_reloc (sec, fixp)
1511 asection *sec ATTRIBUTE_UNUSED;
1516 reloc = (arelent *) xmalloc (sizeof (arelent));
1517 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1518 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1519 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1521 /* Make sure none of our internal relocations make it this far.
1522 They'd better have been fully resolved by this point. */
1523 assert ((int) fixp->fx_r_type > 0);
1525 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1526 if (reloc->howto == NULL)
1528 as_bad_where (fixp->fx_file, fixp->fx_line,
1529 _("cannot represent `%s' relocation in object file"),
1530 bfd_get_reloc_code_name (fixp->fx_r_type));
1534 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1536 as_fatal (_("internal error? cannot generate `%s' relocation"),
1537 bfd_get_reloc_code_name (fixp->fx_r_type));
1539 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1542 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1544 /* fake out bfd_perform_relocation. sigh */
1545 reloc->addend = -alpha_gp_value;
1550 reloc->addend = fixp->fx_offset;
1553 * Ohhh, this is ugly. The problem is that if this is a local global
1554 * symbol, the relocation will entirely be performed at link time, not
1555 * at assembly time. bfd_perform_reloc doesn't know about this sort
1556 * of thing, and as a result we need to fake it out here.
1558 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
1559 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE))
1560 && !S_IS_COMMON (fixp->fx_addsy))
1561 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
1568 /* Parse a register name off of the input_line and return a register
1569 number. Gets md_undefined_symbol above to do the register name
1572 Only called as a part of processing the ECOFF .frame directive. */
1575 tc_get_register (frame)
1576 int frame ATTRIBUTE_UNUSED;
1578 int framereg = AXP_REG_SP;
1581 if (*input_line_pointer == '$')
1583 char *s = input_line_pointer;
1584 char c = get_symbol_end ();
1585 symbolS *sym = md_undefined_symbol (s);
1587 *strchr (s, '\0') = c;
1588 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1591 as_warn (_("frame reg expected, using $%d."), framereg);
1594 note_gpreg (framereg);
1598 /* This is called before the symbol table is processed. In order to
1599 work with gcc when using mips-tfile, we must keep all local labels.
1600 However, in other cases, we want to discard them. If we were
1601 called with -g, but we didn't see any debugging information, it may
1602 mean that gcc is smuggling debugging information through to
1603 mips-tfile, in which case we must generate all local labels. */
1608 alpha_frob_file_before_adjust ()
1610 if (alpha_debug != 0
1611 && ! ecoff_debugging_seen)
1612 flag_keep_locals = 1;
1615 #endif /* OBJ_ECOFF */
1617 static struct alpha_reloc_tag *
1618 get_alpha_reloc_tag (sequence)
1621 char buffer[ALPHA_RELOC_DIGITS];
1622 struct alpha_reloc_tag *info;
1624 sprintf (buffer, "!%ld", sequence);
1626 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
1629 size_t len = strlen (buffer);
1632 info = (struct alpha_reloc_tag *)
1633 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
1635 info->segment = now_seg;
1636 info->sequence = sequence;
1637 strcpy (info->string, buffer);
1638 errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
1646 /* Before the relocations are written, reorder them, so that user
1647 supplied !lituse relocations follow the appropriate !literal
1648 relocations, and similarly for !gpdisp relocations. */
1651 alpha_adjust_symtab ()
1653 if (alpha_literal_hash)
1654 bfd_map_over_sections (stdoutput, alpha_adjust_symtab_relocs, NULL);
1658 alpha_adjust_symtab_relocs (abfd, sec, ptr)
1659 bfd *abfd ATTRIBUTE_UNUSED;
1661 PTR ptr ATTRIBUTE_UNUSED;
1663 segment_info_type *seginfo = seg_info (sec);
1668 unsigned long n_slaves = 0;
1670 /* If seginfo is NULL, we did not create this section; don't do
1671 anything with it. By using a pointer to a pointer, we can update
1672 the links in place. */
1673 if (seginfo == NULL)
1676 /* If there are no relocations, skip the section. */
1677 if (! seginfo->fix_root)
1680 /* First rebuild the fixup chain without the expicit lituse and
1681 gpdisp_lo16 relocs. */
1682 prevP = &seginfo->fix_root;
1683 for (fixp = seginfo->fix_root; fixp; fixp = next)
1685 next = fixp->fx_next;
1686 fixp->fx_next = (fixS *) 0;
1688 switch (fixp->fx_r_type)
1690 case BFD_RELOC_ALPHA_LITUSE:
1692 if (fixp->tc_fix_data.info->n_master == 0)
1693 as_bad_where (fixp->fx_file, fixp->fx_line,
1694 _("No !literal!%ld was found"),
1695 fixp->tc_fix_data.info->sequence);
1698 case BFD_RELOC_ALPHA_GPDISP_LO16:
1700 if (fixp->tc_fix_data.info->n_master == 0)
1701 as_bad_where (fixp->fx_file, fixp->fx_line,
1702 _("No ldah !gpdisp!%ld was found"),
1703 fixp->tc_fix_data.info->sequence);
1708 prevP = &fixp->fx_next;
1713 /* If there were any dependent relocations, go and add them back to
1714 the chain. They are linked through the next_reloc field in
1715 reverse order, so as we go through the next_reloc chain, we
1716 effectively reverse the chain once again.
1718 Except if there is more than one !literal for a given sequence
1719 number. In that case, the programmer and/or compiler is not sure
1720 how control flows from literal to lituse, and we can't be sure to
1721 get the relaxation correct.
1723 ??? Well, actually we could, if there are enough lituses such that
1724 we can make each literal have at least one of each lituse type
1725 present. Not implemented.
1727 Also suppress the optimization if the !literals/!lituses are spread
1728 in different segments. This can happen with "intersting" uses of
1729 inline assembly; examples are present in the Linux kernel semaphores. */
1731 for (fixp = seginfo->fix_root; fixp; fixp = next)
1733 next = fixp->fx_next;
1734 switch (fixp->fx_r_type)
1736 case BFD_RELOC_ALPHA_ELF_LITERAL:
1737 if (fixp->tc_fix_data.info->n_master == 1
1738 && ! fixp->tc_fix_data.info->multi_section_p)
1740 for (slave = fixp->tc_fix_data.info->slaves;
1741 slave != (fixS *) 0;
1742 slave = slave->tc_fix_data.next_reloc)
1744 slave->fx_next = fixp->fx_next;
1745 fixp->fx_next = slave;
1750 case BFD_RELOC_ALPHA_GPDISP_HI16:
1751 if (fixp->tc_fix_data.info->n_slaves == 0)
1752 as_bad_where (fixp->fx_file, fixp->fx_line,
1753 _("No lda !gpdisp!%ld was found"),
1754 fixp->tc_fix_data.info->sequence);
1757 slave = fixp->tc_fix_data.info->slaves;
1758 slave->fx_next = next;
1759 fixp->fx_next = slave;
1771 debug_exp (tok, ntok)
1777 fprintf (stderr, "debug_exp: %d tokens", ntok);
1778 for (i = 0; i < ntok; i++)
1780 expressionS *t = &tok[i];
1784 default: name = "unknown"; break;
1785 case O_illegal: name = "O_illegal"; break;
1786 case O_absent: name = "O_absent"; break;
1787 case O_constant: name = "O_constant"; break;
1788 case O_symbol: name = "O_symbol"; break;
1789 case O_symbol_rva: name = "O_symbol_rva"; break;
1790 case O_register: name = "O_register"; break;
1791 case O_big: name = "O_big"; break;
1792 case O_uminus: name = "O_uminus"; break;
1793 case O_bit_not: name = "O_bit_not"; break;
1794 case O_logical_not: name = "O_logical_not"; break;
1795 case O_multiply: name = "O_multiply"; break;
1796 case O_divide: name = "O_divide"; break;
1797 case O_modulus: name = "O_modulus"; break;
1798 case O_left_shift: name = "O_left_shift"; break;
1799 case O_right_shift: name = "O_right_shift"; break;
1800 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
1801 case O_bit_or_not: name = "O_bit_or_not"; break;
1802 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
1803 case O_bit_and: name = "O_bit_and"; break;
1804 case O_add: name = "O_add"; break;
1805 case O_subtract: name = "O_subtract"; break;
1806 case O_eq: name = "O_eq"; break;
1807 case O_ne: name = "O_ne"; break;
1808 case O_lt: name = "O_lt"; break;
1809 case O_le: name = "O_le"; break;
1810 case O_ge: name = "O_ge"; break;
1811 case O_gt: name = "O_gt"; break;
1812 case O_logical_and: name = "O_logical_and"; break;
1813 case O_logical_or: name = "O_logical_or"; break;
1814 case O_index: name = "O_index"; break;
1815 case O_pregister: name = "O_pregister"; break;
1816 case O_cpregister: name = "O_cpregister"; break;
1817 case O_literal: name = "O_literal"; break;
1818 case O_lituse_addr: name = "O_lituse_addr"; break;
1819 case O_lituse_base: name = "O_lituse_base"; break;
1820 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
1821 case O_lituse_jsr: name = "O_lituse_jsr"; break;
1822 case O_gpdisp: name = "O_gpdisp"; break;
1823 case O_gprelhigh: name = "O_gprelhigh"; break;
1824 case O_gprellow: name = "O_gprellow"; break;
1825 case O_gprel: name = "O_gprel"; break;
1826 case O_samegp: name = "O_samegp"; break;
1827 case O_md13: name = "O_md13"; break;
1828 case O_md14: name = "O_md14"; break;
1829 case O_md15: name = "O_md15"; break;
1830 case O_md16: name = "O_md16"; break;
1833 fprintf (stderr, ", %s(%s, %s, %d)", name,
1834 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
1835 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
1836 (int) t->X_add_number);
1838 fprintf (stderr, "\n");
1843 /* Parse the arguments to an opcode. */
1846 tokenize_arguments (str, tok, ntok)
1851 expressionS *end_tok = tok + ntok;
1852 char *old_input_line_pointer;
1853 int saw_comma = 0, saw_arg = 0;
1855 expressionS *orig_tok = tok;
1858 const struct alpha_reloc_op_tag *r;
1861 int reloc_found_p = 0;
1863 memset (tok, 0, sizeof (*tok) * ntok);
1865 /* Save and restore input_line_pointer around this function */
1866 old_input_line_pointer = input_line_pointer;
1867 input_line_pointer = str;
1870 /* ??? Wrest control of ! away from the regular expression parser. */
1871 is_end_of_line[(unsigned char) '!'] = 1;
1874 while (tok < end_tok && *input_line_pointer)
1877 switch (*input_line_pointer)
1884 /* A relocation operand can be placed after the normal operand on an
1885 assembly language statement, and has the following form:
1886 !relocation_type!sequence_number. */
1888 { /* only support one relocation op per insn */
1889 as_bad (_("More than one relocation op per insn"));
1896 ++input_line_pointer;
1898 p = input_line_pointer;
1899 c = get_symbol_end ();
1901 /* Parse !relocation_type */
1902 len = input_line_pointer - p;
1905 as_bad (_("No relocation operand"));
1909 r = &alpha_reloc_op[0];
1910 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
1911 if (len == r->length && memcmp (p, r->name, len) == 0)
1915 as_bad (_("Unknown relocation operand: !%s"), p);
1919 *input_line_pointer = c;
1921 if (*input_line_pointer != '!')
1925 as_bad (_("no sequence number after !%s"), p);
1929 tok->X_add_number = 0;
1935 as_bad (_("!%s does not use a sequence number"), p);
1939 input_line_pointer++;
1941 /* Parse !sequence_number */
1943 if (tok->X_op != O_constant || tok->X_add_number <= 0)
1945 as_bad (_("Bad sequence number: !%s!%s"),
1946 r->name, input_line_pointer);
1955 #endif /* RELOC_OP_P */
1958 ++input_line_pointer;
1959 if (saw_comma || !saw_arg)
1966 char *hold = input_line_pointer++;
1968 /* First try for parenthesized register ... */
1970 if (*input_line_pointer == ')' && tok->X_op == O_register)
1972 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
1975 ++input_line_pointer;
1980 /* ... then fall through to plain expression */
1981 input_line_pointer = hold;
1985 if (saw_arg && !saw_comma)
1989 if (tok->X_op == O_illegal || tok->X_op == O_absent)
2002 input_line_pointer = old_input_line_pointer;
2005 debug_exp (orig_tok, ntok - (end_tok - tok));
2008 is_end_of_line[(unsigned char) '!'] = 0;
2011 return ntok - (end_tok - tok);
2015 is_end_of_line[(unsigned char) '!'] = 0;
2017 input_line_pointer = old_input_line_pointer;
2018 return TOKENIZE_ERROR;
2022 is_end_of_line[(unsigned char) '!'] = 0;
2024 input_line_pointer = old_input_line_pointer;
2025 return TOKENIZE_ERROR_REPORT;
2028 /* Search forward through all variants of an opcode looking for a
2031 static const struct alpha_opcode *
2032 find_opcode_match (first_opcode, tok, pntok, pcpumatch)
2033 const struct alpha_opcode *first_opcode;
2034 const expressionS *tok;
2038 const struct alpha_opcode *opcode = first_opcode;
2040 int got_cpu_match = 0;
2044 const unsigned char *opidx;
2047 /* Don't match opcodes that don't exist on this architecture */
2048 if (!(opcode->flags & alpha_target))
2053 for (opidx = opcode->operands; *opidx; ++opidx)
2055 const struct alpha_operand *operand = &alpha_operands[*opidx];
2057 /* only take input from real operands */
2058 if (operand->flags & AXP_OPERAND_FAKE)
2061 /* when we expect input, make sure we have it */
2064 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
2069 /* match operand type with expression type */
2070 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
2072 case AXP_OPERAND_IR:
2073 if (tok[tokidx].X_op != O_register
2074 || !is_ir_num (tok[tokidx].X_add_number))
2077 case AXP_OPERAND_FPR:
2078 if (tok[tokidx].X_op != O_register
2079 || !is_fpr_num (tok[tokidx].X_add_number))
2082 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
2083 if (tok[tokidx].X_op != O_pregister
2084 || !is_ir_num (tok[tokidx].X_add_number))
2087 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
2088 if (tok[tokidx].X_op != O_cpregister
2089 || !is_ir_num (tok[tokidx].X_add_number))
2093 case AXP_OPERAND_RELATIVE:
2094 case AXP_OPERAND_SIGNED:
2095 case AXP_OPERAND_UNSIGNED:
2096 switch (tok[tokidx].X_op)
2111 /* everything else should have been fake */
2117 /* possible match -- did we use all of our input? */
2126 while (++opcode - alpha_opcodes < alpha_num_opcodes
2127 && !strcmp (opcode->name, first_opcode->name));
2130 *pcpumatch = got_cpu_match;
2135 /* Search forward through all variants of a macro looking for a syntax
2138 static const struct alpha_macro *
2139 find_macro_match (first_macro, tok, pntok)
2140 const struct alpha_macro *first_macro;
2141 const expressionS *tok;
2144 const struct alpha_macro *macro = first_macro;
2149 const enum alpha_macro_arg *arg = macro->argsets;
2163 /* index register */
2165 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2166 || !is_ir_num (tok[tokidx].X_add_number))
2171 /* parenthesized index register */
2173 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
2174 || !is_ir_num (tok[tokidx].X_add_number))
2179 /* optional parenthesized index register */
2181 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
2182 && is_ir_num (tok[tokidx].X_add_number))
2186 /* leading comma with a parenthesized index register */
2188 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
2189 || !is_ir_num (tok[tokidx].X_add_number))
2194 /* floating point register */
2196 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2197 || !is_fpr_num (tok[tokidx].X_add_number))
2202 /* normal expression */
2206 switch (tok[tokidx].X_op)
2215 case O_lituse_bytoff:
2231 while (*arg != MACRO_EOA)
2239 while (++macro - alpha_macros < alpha_num_macros
2240 && !strcmp (macro->name, first_macro->name));
2245 /* Insert an operand value into an instruction. */
2248 insert_operand (insn, operand, val, file, line)
2250 const struct alpha_operand *operand;
2255 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
2259 if (operand->flags & AXP_OPERAND_SIGNED)
2261 max = (1 << (operand->bits - 1)) - 1;
2262 min = -(1 << (operand->bits - 1));
2266 max = (1 << operand->bits) - 1;
2270 if (val < min || val > max)
2273 _("operand out of range (%s not between %d and %d)");
2274 char buf[sizeof (val) * 3 + 2];
2276 sprint_value (buf, val);
2278 as_warn_where (file, line, err, buf, min, max);
2280 as_warn (err, buf, min, max);
2284 if (operand->insert)
2286 const char *errmsg = NULL;
2288 insn = (*operand->insert) (insn, val, &errmsg);
2293 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2299 * Turn an opcode description and a set of arguments into
2300 * an instruction and a fixup.
2304 assemble_insn (opcode, tok, ntok, insn, reloc)
2305 const struct alpha_opcode *opcode;
2306 const expressionS *tok;
2308 struct alpha_insn *insn;
2309 bfd_reloc_code_real_type reloc;
2311 const struct alpha_operand *reloc_operand = NULL;
2312 const expressionS *reloc_exp = NULL;
2313 const unsigned char *argidx;
2317 memset (insn, 0, sizeof (*insn));
2318 image = opcode->opcode;
2320 for (argidx = opcode->operands; *argidx; ++argidx)
2322 const struct alpha_operand *operand = &alpha_operands[*argidx];
2323 const expressionS *t = (const expressionS *) 0;
2325 if (operand->flags & AXP_OPERAND_FAKE)
2327 /* fake operands take no value and generate no fixup */
2328 image = insert_operand (image, operand, 0, NULL, 0);
2334 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2336 case AXP_OPERAND_DEFAULT_FIRST:
2339 case AXP_OPERAND_DEFAULT_SECOND:
2342 case AXP_OPERAND_DEFAULT_ZERO:
2344 static expressionS zero_exp;
2346 zero_exp.X_op = O_constant;
2347 zero_exp.X_unsigned = 1;
2362 image = insert_operand (image, operand, regno (t->X_add_number),
2367 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
2368 assert (reloc_operand == NULL);
2369 reloc_operand = operand;
2374 /* This is only 0 for fields that should contain registers,
2375 which means this pattern shouldn't have matched. */
2376 if (operand->default_reloc == 0)
2379 /* There is one special case for which an insn receives two
2380 relocations, and thus the user-supplied reloc does not
2381 override the operand reloc. */
2382 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2384 struct alpha_fixup *fixup;
2386 if (insn->nfixups >= MAX_INSN_FIXUPS)
2387 as_fatal (_("too many fixups"));
2389 fixup = &insn->fixups[insn->nfixups++];
2391 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2395 if (reloc == BFD_RELOC_UNUSED)
2396 reloc = operand->default_reloc;
2398 assert (reloc_operand == NULL);
2399 reloc_operand = operand;
2406 if (reloc != BFD_RELOC_UNUSED)
2408 struct alpha_fixup *fixup;
2410 if (insn->nfixups >= MAX_INSN_FIXUPS)
2411 as_fatal (_("too many fixups"));
2413 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2414 relocation tag for both ldah and lda with gpdisp. Choose the
2415 correct internal relocation based on the opcode. */
2416 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2418 if (strcmp (opcode->name, "ldah") == 0)
2419 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2420 else if (strcmp (opcode->name, "lda") == 0)
2421 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2423 as_bad (_("invalid relocation for instruction"));
2426 /* If this is a real relocation (as opposed to a lituse hint), then
2427 the relocation width should match the operand width. */
2428 else if (reloc < BFD_RELOC_UNUSED)
2430 reloc_howto_type *reloc_howto
2431 = bfd_reloc_type_lookup (stdoutput, reloc);
2432 if (reloc_howto->bitsize != reloc_operand->bits)
2434 as_bad (_("invalid relocation for field"));
2439 fixup = &insn->fixups[insn->nfixups++];
2441 fixup->exp = *reloc_exp;
2443 fixup->exp.X_op = O_absent;
2444 fixup->reloc = reloc;
2451 * Actually output an instruction with its fixup.
2456 struct alpha_insn *insn;
2461 /* Take care of alignment duties. */
2462 if (alpha_auto_align_on && alpha_current_align < 2)
2463 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
2464 if (alpha_current_align > 2)
2465 alpha_current_align = 2;
2466 alpha_insn_label = NULL;
2468 /* Write out the instruction. */
2470 md_number_to_chars (f, insn->insn, 4);
2473 dwarf2_emit_insn (4);
2476 /* Apply the fixups in order */
2477 for (i = 0; i < insn->nfixups; ++i)
2479 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
2480 struct alpha_fixup *fixup = &insn->fixups[i];
2481 struct alpha_reloc_tag *info;
2485 /* Some fixups are only used internally and so have no howto */
2486 if ((int) fixup->reloc < 0)
2488 operand = &alpha_operands[-(int) fixup->reloc];
2490 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
2492 else if (fixup->reloc > BFD_RELOC_UNUSED
2493 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
2494 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
2501 reloc_howto_type *reloc_howto
2502 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
2503 assert (reloc_howto);
2505 size = bfd_get_reloc_size (reloc_howto);
2506 assert (size >= 1 && size <= 4);
2508 pcrel = reloc_howto->pc_relative;
2511 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
2512 &fixup->exp, pcrel, fixup->reloc);
2514 /* Turn off complaints that the addend is too large for some fixups,
2515 and copy in the sequence number for the explicit relocations. */
2516 switch (fixup->reloc)
2518 case BFD_RELOC_ALPHA_HINT:
2519 case BFD_RELOC_GPREL32:
2520 case BFD_RELOC_GPREL16:
2521 case BFD_RELOC_ALPHA_GPREL_HI16:
2522 case BFD_RELOC_ALPHA_GPREL_LO16:
2523 fixP->fx_no_overflow = 1;
2526 case BFD_RELOC_ALPHA_GPDISP_HI16:
2527 fixP->fx_no_overflow = 1;
2528 fixP->fx_addsy = section_symbol (now_seg);
2529 fixP->fx_offset = 0;
2531 info = get_alpha_reloc_tag (insn->sequence);
2532 if (++info->n_master > 1)
2533 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
2534 if (info->segment != now_seg)
2535 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2537 fixP->tc_fix_data.info = info;
2540 case BFD_RELOC_ALPHA_GPDISP_LO16:
2541 fixP->fx_no_overflow = 1;
2543 info = get_alpha_reloc_tag (insn->sequence);
2544 if (++info->n_slaves > 1)
2545 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
2546 if (info->segment != now_seg)
2547 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2549 fixP->tc_fix_data.info = info;
2550 info->slaves = fixP;
2553 case BFD_RELOC_ALPHA_LITERAL:
2554 case BFD_RELOC_ALPHA_ELF_LITERAL:
2555 fixP->fx_no_overflow = 1;
2557 info = get_alpha_reloc_tag (insn->sequence);
2559 if (info->segment != now_seg)
2560 info->multi_section_p = 1;
2561 fixP->tc_fix_data.info = info;
2564 case DUMMY_RELOC_LITUSE_ADDR:
2565 fixP->fx_offset = LITUSE_ADDR;
2567 case DUMMY_RELOC_LITUSE_BASE:
2568 fixP->fx_offset = LITUSE_BASE;
2570 case DUMMY_RELOC_LITUSE_BYTOFF:
2571 fixP->fx_offset = LITUSE_BYTOFF;
2573 case DUMMY_RELOC_LITUSE_JSR:
2574 fixP->fx_offset = LITUSE_JSR;
2576 fixP->fx_addsy = section_symbol (now_seg);
2577 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
2579 info = get_alpha_reloc_tag (insn->sequence);
2581 fixP->tc_fix_data.info = info;
2582 fixP->tc_fix_data.next_reloc = info->slaves;
2583 info->slaves = fixP;
2584 if (info->segment != now_seg)
2585 info->multi_section_p = 1;
2589 if ((int) fixup->reloc < 0)
2591 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
2592 fixP->fx_no_overflow = 1;
2599 /* Given an opcode name and a pre-tokenized set of arguments, assemble
2600 the insn, but do not emit it.
2602 Note that this implies no macros allowed, since we can't store more
2603 than one insn in an insn structure. */
2606 assemble_tokens_to_insn (opname, tok, ntok, insn)
2608 const expressionS *tok;
2610 struct alpha_insn *insn;
2612 const struct alpha_opcode *opcode;
2614 /* search opcodes */
2615 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2619 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2622 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
2626 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2628 as_bad (_("opcode `%s' not supported for target %s"), opname,
2632 as_bad (_("unknown opcode `%s'"), opname);
2635 /* Given an opcode name and a pre-tokenized set of arguments, take the
2636 opcode all the way through emission. */
2639 assemble_tokens (opname, tok, ntok, local_macros_on)
2641 const expressionS *tok;
2643 int local_macros_on;
2645 int found_something = 0;
2646 const struct alpha_opcode *opcode;
2647 const struct alpha_macro *macro;
2649 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2651 /* If a user-specified relocation is present, this is not a macro. */
2652 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
2654 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
2657 else if (local_macros_on)
2659 macro = ((const struct alpha_macro *)
2660 hash_find (alpha_macro_hash, opname));
2663 found_something = 1;
2664 macro = find_macro_match (macro, tok, &ntok);
2667 (*macro->emit) (tok, ntok, macro->arg);
2673 /* search opcodes */
2674 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2677 found_something = 1;
2678 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2681 struct alpha_insn insn;
2682 assemble_insn (opcode, tok, ntok, &insn, reloc);
2684 /* Copy the sequence number for the reloc from the reloc token. */
2685 if (reloc != BFD_RELOC_UNUSED)
2686 insn.sequence = tok[ntok].X_add_number;
2693 if (found_something)
2696 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2698 as_bad (_("opcode `%s' not supported for target %s"), opname,
2702 as_bad (_("unknown opcode `%s'"), opname);
2705 /* Some instruction sets indexed by lg(size) */
2706 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2707 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2708 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2709 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2710 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2711 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2712 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2713 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2714 static const char * const ldX_op[] = { "ldb", "ldw", "ldll", "ldq" };
2715 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2717 /* Implement the ldgp macro. */
2720 emit_ldgp (tok, ntok, unused)
2721 const expressionS *tok;
2722 int ntok ATTRIBUTE_UNUSED;
2723 const PTR unused ATTRIBUTE_UNUSED;
2728 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2729 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2730 with appropriate constants and relocations. */
2731 struct alpha_insn insn;
2732 expressionS newtok[3];
2736 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2737 ecoff_set_gp_prolog_size (0);
2741 set_tok_const (newtok[1], 0);
2744 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2749 if (addend.X_op != O_constant)
2750 as_bad (_("can not resolve expression"));
2751 addend.X_op = O_symbol;
2752 addend.X_add_symbol = alpha_gp_symbol;
2756 insn.fixups[0].exp = addend;
2757 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2758 insn.sequence = next_sequence_num;
2762 set_tok_preg (newtok[2], tok[0].X_add_number);
2764 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2767 addend.X_add_number += 4;
2771 insn.fixups[0].exp = addend;
2772 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2773 insn.sequence = next_sequence_num--;
2776 #endif /* OBJ_ECOFF || OBJ_ELF */
2781 /* Add symbol+addend to link pool.
2782 Return offset from basesym to entry in link pool.
2784 Add new fixup only if offset isn't 16bit. */
2787 add_to_link_pool (basesym, sym, addend)
2792 segT current_section = now_seg;
2793 int current_subsec = now_subseg;
2795 bfd_reloc_code_real_type reloc_type;
2797 segment_info_type *seginfo = seg_info (alpha_link_section);
2800 offset = - *symbol_get_obj (basesym);
2802 /* @@ This assumes all entries in a given section will be of the same
2803 size... Probably correct, but unwise to rely on. */
2804 /* This must always be called with the same subsegment. */
2806 if (seginfo->frchainP)
2807 for (fixp = seginfo->frchainP->fix_root;
2808 fixp != (fixS *) NULL;
2809 fixp = fixp->fx_next, offset += 8)
2811 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2813 if (range_signed_16 (offset))
2820 /* Not found in 16bit signed range. */
2822 subseg_set (alpha_link_section, 0);
2826 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
2829 subseg_set (current_section, current_subsec);
2830 seginfo->literal_pool_size += 8;
2834 #endif /* OBJ_EVAX */
2836 /* Load a (partial) expression into a target register.
2838 If poffset is not null, after the call it will either contain
2839 O_constant 0, or a 16-bit offset appropriate for any MEM format
2840 instruction. In addition, pbasereg will be modified to point to
2841 the base register to use in that MEM format instruction.
2843 In any case, *pbasereg should contain a base register to add to the
2844 expression. This will normally be either AXP_REG_ZERO or
2845 alpha_gp_register. Symbol addresses will always be loaded via $gp,
2846 so "foo($0)" is interpreted as adding the address of foo to $0;
2847 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
2848 but this is what OSF/1 does.
2850 If explicit relocations of the form !literal!<number> are allowed,
2851 and used, then explict_reloc with be an expression pointer.
2853 Finally, the return value is nonzero if the calling macro may emit
2854 a LITUSE reloc if otherwise appropriate; the return value is the
2855 sequence number to use. */
2858 load_expression (targreg, exp, pbasereg, poffset)
2860 const expressionS *exp;
2862 expressionS *poffset;
2864 long emit_lituse = 0;
2865 offsetT addend = exp->X_add_number;
2866 int basereg = *pbasereg;
2867 struct alpha_insn insn;
2868 expressionS newtok[3];
2877 /* attempt to reduce .lit load by splitting the offset from
2878 its symbol when possible, but don't create a situation in
2880 if (!range_signed_32 (addend) &&
2881 (alpha_noat_on || targreg == AXP_REG_AT))
2883 lit = add_to_literal_pool (exp->X_add_symbol, addend,
2884 alpha_lita_section, 8);
2889 lit = add_to_literal_pool (exp->X_add_symbol, 0,
2890 alpha_lita_section, 8);
2894 as_fatal (_("overflow in literal (.lita) table"));
2896 /* emit "ldq r, lit(gp)" */
2898 if (basereg != alpha_gp_register && targreg == basereg)
2901 as_bad (_("macro requires $at register while noat in effect"));
2902 if (targreg == AXP_REG_AT)
2903 as_bad (_("macro requires $at while $at in use"));
2905 set_tok_reg (newtok[0], AXP_REG_AT);
2908 set_tok_reg (newtok[0], targreg);
2909 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
2910 set_tok_preg (newtok[2], alpha_gp_register);
2912 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2914 assert (insn.nfixups == 1);
2915 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
2916 insn.sequence = emit_lituse = next_sequence_num--;
2917 #endif /* OBJ_ECOFF */
2919 /* emit "ldq r, gotoff(gp)" */
2921 if (basereg != alpha_gp_register && targreg == basereg)
2924 as_bad (_("macro requires $at register while noat in effect"));
2925 if (targreg == AXP_REG_AT)
2926 as_bad (_("macro requires $at while $at in use"));
2928 set_tok_reg (newtok[0], AXP_REG_AT);
2931 set_tok_reg (newtok[0], targreg);
2933 /* XXX: Disable this .got minimizing optimization so that we can get
2934 better instruction offset knowledge in the compiler. This happens
2935 very infrequently anyway. */
2937 || (!range_signed_32 (addend)
2938 && (alpha_noat_on || targreg == AXP_REG_AT)))
2945 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
2948 set_tok_preg (newtok[2], alpha_gp_register);
2950 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2952 assert (insn.nfixups == 1);
2953 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
2954 insn.sequence = emit_lituse = next_sequence_num--;
2955 #endif /* OBJ_ELF */
2959 /* Find symbol or symbol pointer in link section. */
2961 if (exp->X_add_symbol == alpha_evax_proc.symbol)
2963 if (range_signed_16 (addend))
2965 set_tok_reg (newtok[0], targreg);
2966 set_tok_const (newtok[1], addend);
2967 set_tok_preg (newtok[2], basereg);
2968 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2973 set_tok_reg (newtok[0], targreg);
2974 set_tok_const (newtok[1], 0);
2975 set_tok_preg (newtok[2], basereg);
2976 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2981 if (!range_signed_32 (addend))
2983 link = add_to_link_pool (alpha_evax_proc.symbol,
2984 exp->X_add_symbol, addend);
2989 link = add_to_link_pool (alpha_evax_proc.symbol,
2990 exp->X_add_symbol, 0);
2992 set_tok_reg (newtok[0], targreg);
2993 set_tok_const (newtok[1], link);
2994 set_tok_preg (newtok[2], basereg);
2995 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
2997 #endif /* OBJ_EVAX */
3002 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
3004 /* emit "addq r, base, r" */
3006 set_tok_reg (newtok[1], basereg);
3007 set_tok_reg (newtok[2], targreg);
3008 assemble_tokens ("addq", newtok, 3, 0);
3020 /* Assume that this difference expression will be resolved to an
3021 absolute value and that that value will fit in 16 bits. */
3023 set_tok_reg (newtok[0], targreg);
3025 set_tok_preg (newtok[2], basereg);
3026 assemble_tokens ("lda", newtok, 3, 0);
3029 set_tok_const (*poffset, 0);
3033 if (exp->X_add_number > 0)
3034 as_bad (_("bignum invalid; zero assumed"));
3036 as_bad (_("floating point number invalid; zero assumed"));
3041 as_bad (_("can't handle expression"));
3046 if (!range_signed_32 (addend))
3049 long seq_num = next_sequence_num--;
3051 /* For 64-bit addends, just put it in the literal pool. */
3054 /* emit "ldq targreg, lit(basereg)" */
3055 lit = add_to_link_pool (alpha_evax_proc.symbol,
3056 section_symbol (absolute_section), addend);
3057 set_tok_reg (newtok[0], targreg);
3058 set_tok_const (newtok[1], lit);
3059 set_tok_preg (newtok[2], alpha_gp_register);
3060 assemble_tokens ("ldq", newtok, 3, 0);
3063 if (alpha_lit8_section == NULL)
3065 create_literal_section (".lit8",
3066 &alpha_lit8_section,
3067 &alpha_lit8_symbol);
3070 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
3071 alpha_lita_section, 8);
3072 if (alpha_lit8_literal >= 0x8000)
3073 as_fatal (_("overflow in literal (.lita) table"));
3077 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
3079 as_fatal (_("overflow in literal (.lit8) table"));
3081 /* emit "lda litreg, .lit8+0x8000" */
3083 if (targreg == basereg)
3086 as_bad (_("macro requires $at register while noat in effect"));
3087 if (targreg == AXP_REG_AT)
3088 as_bad (_("macro requires $at while $at in use"));
3090 set_tok_reg (newtok[0], AXP_REG_AT);
3093 set_tok_reg (newtok[0], targreg);
3095 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
3098 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
3100 set_tok_preg (newtok[2], alpha_gp_register);
3102 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3104 assert (insn.nfixups == 1);
3106 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3109 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3111 insn.sequence = seq_num;
3115 /* emit "ldq litreg, lit(litreg)" */
3117 set_tok_const (newtok[1], lit);
3118 set_tok_preg (newtok[2], newtok[0].X_add_number);
3120 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3122 assert (insn.nfixups < MAX_INSN_FIXUPS);
3123 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3124 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3126 insn.sequence = seq_num;
3131 /* emit "addq litreg, base, target" */
3133 if (basereg != AXP_REG_ZERO)
3135 set_tok_reg (newtok[1], basereg);
3136 set_tok_reg (newtok[2], targreg);
3137 assemble_tokens ("addq", newtok, 3, 0);
3139 #endif /* !OBJ_EVAX */
3142 set_tok_const (*poffset, 0);
3143 *pbasereg = targreg;
3147 offsetT low, high, extra, tmp;
3149 /* for 32-bit operands, break up the addend */
3151 low = sign_extend_16 (addend);
3153 high = sign_extend_16 (tmp >> 16);
3155 if (tmp - (high << 16))
3159 high = sign_extend_16 (tmp >> 16);
3164 set_tok_reg (newtok[0], targreg);
3165 set_tok_preg (newtok[2], basereg);
3169 /* emit "ldah r, extra(r) */
3170 set_tok_const (newtok[1], extra);
3171 assemble_tokens ("ldah", newtok, 3, 0);
3172 set_tok_preg (newtok[2], basereg = targreg);
3177 /* emit "ldah r, high(r) */
3178 set_tok_const (newtok[1], high);
3179 assemble_tokens ("ldah", newtok, 3, 0);
3181 set_tok_preg (newtok[2], basereg);
3184 if ((low && !poffset) || (!poffset && basereg != targreg))
3186 /* emit "lda r, low(base)" */
3187 set_tok_const (newtok[1], low);
3188 assemble_tokens ("lda", newtok, 3, 0);
3194 set_tok_const (*poffset, low);
3195 *pbasereg = basereg;
3201 /* The lda macro differs from the lda instruction in that it handles
3202 most simple expressions, particualrly symbol address loads and
3206 emit_lda (tok, ntok, unused)
3207 const expressionS *tok;
3209 const PTR unused ATTRIBUTE_UNUSED;
3214 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3216 basereg = tok[2].X_add_number;
3218 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
3221 /* The ldah macro differs from the ldah instruction in that it has $31
3222 as an implied base register. */
3225 emit_ldah (tok, ntok, unused)
3226 const expressionS *tok;
3227 int ntok ATTRIBUTE_UNUSED;
3228 const PTR unused ATTRIBUTE_UNUSED;
3230 expressionS newtok[3];
3234 set_tok_preg (newtok[2], AXP_REG_ZERO);
3236 assemble_tokens ("ldah", newtok, 3, 0);
3239 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
3240 etc. They differ from the real instructions in that they do simple
3241 expressions like the lda macro. */
3244 emit_ir_load (tok, ntok, opname)
3245 const expressionS *tok;
3251 expressionS newtok[3];
3252 struct alpha_insn insn;
3255 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3257 basereg = tok[2].X_add_number;
3259 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
3263 set_tok_preg (newtok[2], basereg);
3265 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3269 assert (insn.nfixups < MAX_INSN_FIXUPS);
3270 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3271 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3273 insn.sequence = lituse;
3279 /* Handle fp register loads, and both integer and fp register stores.
3280 Again, we handle simple expressions. */
3283 emit_loadstore (tok, ntok, opname)
3284 const expressionS *tok;
3290 expressionS newtok[3];
3291 struct alpha_insn insn;
3294 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3296 basereg = tok[2].X_add_number;
3298 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
3301 as_bad (_("macro requires $at register while noat in effect"));
3303 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
3312 set_tok_preg (newtok[2], basereg);
3314 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3318 assert (insn.nfixups < MAX_INSN_FIXUPS);
3319 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3320 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3322 insn.sequence = lituse;
3328 /* Load a half-word or byte as an unsigned value. */
3331 emit_ldXu (tok, ntok, vlgsize)
3332 const expressionS *tok;
3336 if (alpha_target & AXP_OPCODE_BWX)
3337 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
3340 expressionS newtok[3];
3341 struct alpha_insn insn;
3346 as_bad (_("macro requires $at register while noat in effect"));
3349 basereg = (tok[1].X_op == O_constant
3350 ? AXP_REG_ZERO : alpha_gp_register);
3352 basereg = tok[2].X_add_number;
3354 /* emit "lda $at, exp" */
3356 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3358 /* emit "ldq_u targ, 0($at)" */
3361 set_tok_const (newtok[1], 0);
3362 set_tok_preg (newtok[2], basereg);
3363 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3367 assert (insn.nfixups < MAX_INSN_FIXUPS);
3368 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3369 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3371 insn.sequence = lituse;
3376 /* emit "extXl targ, $at, targ" */
3378 set_tok_reg (newtok[1], basereg);
3379 newtok[2] = newtok[0];
3380 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
3384 assert (insn.nfixups < MAX_INSN_FIXUPS);
3385 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3386 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3388 insn.sequence = lituse;
3395 /* Load a half-word or byte as a signed value. */
3398 emit_ldX (tok, ntok, vlgsize)
3399 const expressionS *tok;
3403 emit_ldXu (tok, ntok, vlgsize);
3404 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3407 /* Load an integral value from an unaligned address as an unsigned
3411 emit_uldXu (tok, ntok, vlgsize)
3412 const expressionS *tok;
3416 long lgsize = (long) vlgsize;
3417 expressionS newtok[3];
3420 as_bad (_("macro requires $at register while noat in effect"));
3422 /* emit "lda $at, exp" */
3424 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3425 newtok[0].X_add_number = AXP_REG_AT;
3426 assemble_tokens ("lda", newtok, ntok, 1);
3428 /* emit "ldq_u $t9, 0($at)" */
3430 set_tok_reg (newtok[0], AXP_REG_T9);
3431 set_tok_const (newtok[1], 0);
3432 set_tok_preg (newtok[2], AXP_REG_AT);
3433 assemble_tokens ("ldq_u", newtok, 3, 1);
3435 /* emit "ldq_u $t10, size-1($at)" */
3437 set_tok_reg (newtok[0], AXP_REG_T10);
3438 set_tok_const (newtok[1], (1 << lgsize) - 1);
3439 assemble_tokens ("ldq_u", newtok, 3, 1);
3441 /* emit "extXl $t9, $at, $t9" */
3443 set_tok_reg (newtok[0], AXP_REG_T9);
3444 set_tok_reg (newtok[1], AXP_REG_AT);
3445 set_tok_reg (newtok[2], AXP_REG_T9);
3446 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
3448 /* emit "extXh $t10, $at, $t10" */
3450 set_tok_reg (newtok[0], AXP_REG_T10);
3451 set_tok_reg (newtok[2], AXP_REG_T10);
3452 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
3454 /* emit "or $t9, $t10, targ" */
3456 set_tok_reg (newtok[0], AXP_REG_T9);
3457 set_tok_reg (newtok[1], AXP_REG_T10);
3459 assemble_tokens ("or", newtok, 3, 1);
3462 /* Load an integral value from an unaligned address as a signed value.
3463 Note that quads should get funneled to the unsigned load since we
3464 don't have to do the sign extension. */
3467 emit_uldX (tok, ntok, vlgsize)
3468 const expressionS *tok;
3472 emit_uldXu (tok, ntok, vlgsize);
3473 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3476 /* Implement the ldil macro. */
3479 emit_ldil (tok, ntok, unused)
3480 const expressionS *tok;
3482 const PTR unused ATTRIBUTE_UNUSED;
3484 expressionS newtok[2];
3486 memcpy (newtok, tok, sizeof (newtok));
3487 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
3489 assemble_tokens ("lda", newtok, ntok, 1);
3492 /* Store a half-word or byte. */
3495 emit_stX (tok, ntok, vlgsize)
3496 const expressionS *tok;
3500 int lgsize = (int) (long) vlgsize;
3502 if (alpha_target & AXP_OPCODE_BWX)
3503 emit_loadstore (tok, ntok, stX_op[lgsize]);
3506 expressionS newtok[3];
3507 struct alpha_insn insn;
3512 as_bad (_("macro requires $at register while noat in effect"));
3515 basereg = (tok[1].X_op == O_constant
3516 ? AXP_REG_ZERO : alpha_gp_register);
3518 basereg = tok[2].X_add_number;
3520 /* emit "lda $at, exp" */
3522 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3524 /* emit "ldq_u $t9, 0($at)" */
3526 set_tok_reg (newtok[0], AXP_REG_T9);
3527 set_tok_const (newtok[1], 0);
3528 set_tok_preg (newtok[2], basereg);
3529 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3533 assert (insn.nfixups < MAX_INSN_FIXUPS);
3534 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3535 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3537 insn.sequence = lituse;
3542 /* emit "insXl src, $at, $t10" */
3545 set_tok_reg (newtok[1], basereg);
3546 set_tok_reg (newtok[2], AXP_REG_T10);
3547 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
3551 assert (insn.nfixups < MAX_INSN_FIXUPS);
3552 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3553 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3555 insn.sequence = lituse;
3560 /* emit "mskXl $t9, $at, $t9" */
3562 set_tok_reg (newtok[0], AXP_REG_T9);
3563 newtok[2] = newtok[0];
3564 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
3568 assert (insn.nfixups < MAX_INSN_FIXUPS);
3569 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3570 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3572 insn.sequence = lituse;
3577 /* emit "or $t9, $t10, $t9" */
3579 set_tok_reg (newtok[1], AXP_REG_T10);
3580 assemble_tokens ("or", newtok, 3, 1);
3582 /* emit "stq_u $t9, 0($at) */
3584 set_tok_const(newtok[1], 0);
3585 set_tok_preg (newtok[2], AXP_REG_AT);
3586 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
3590 assert (insn.nfixups < MAX_INSN_FIXUPS);
3591 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3592 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3594 insn.sequence = lituse;
3601 /* Store an integer to an unaligned address. */
3604 emit_ustX (tok, ntok, vlgsize)
3605 const expressionS *tok;
3609 int lgsize = (int) (long) vlgsize;
3610 expressionS newtok[3];
3612 /* emit "lda $at, exp" */
3614 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3615 newtok[0].X_add_number = AXP_REG_AT;
3616 assemble_tokens ("lda", newtok, ntok, 1);
3618 /* emit "ldq_u $9, 0($at)" */
3620 set_tok_reg (newtok[0], AXP_REG_T9);
3621 set_tok_const (newtok[1], 0);
3622 set_tok_preg (newtok[2], AXP_REG_AT);
3623 assemble_tokens ("ldq_u", newtok, 3, 1);
3625 /* emit "ldq_u $10, size-1($at)" */
3627 set_tok_reg (newtok[0], AXP_REG_T10);
3628 set_tok_const (newtok[1], (1 << lgsize) - 1);
3629 assemble_tokens ("ldq_u", newtok, 3, 1);
3631 /* emit "insXl src, $at, $t11" */
3634 set_tok_reg (newtok[1], AXP_REG_AT);
3635 set_tok_reg (newtok[2], AXP_REG_T11);
3636 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
3638 /* emit "insXh src, $at, $t12" */
3640 set_tok_reg (newtok[2], AXP_REG_T12);
3641 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
3643 /* emit "mskXl $t9, $at, $t9" */
3645 set_tok_reg (newtok[0], AXP_REG_T9);
3646 newtok[2] = newtok[0];
3647 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
3649 /* emit "mskXh $t10, $at, $t10" */
3651 set_tok_reg (newtok[0], AXP_REG_T10);
3652 newtok[2] = newtok[0];
3653 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
3655 /* emit "or $t9, $t11, $t9" */
3657 set_tok_reg (newtok[0], AXP_REG_T9);
3658 set_tok_reg (newtok[1], AXP_REG_T11);
3659 newtok[2] = newtok[0];
3660 assemble_tokens ("or", newtok, 3, 1);
3662 /* emit "or $t10, $t12, $t10" */
3664 set_tok_reg (newtok[0], AXP_REG_T10);
3665 set_tok_reg (newtok[1], AXP_REG_T12);
3666 newtok[2] = newtok[0];
3667 assemble_tokens ("or", newtok, 3, 1);
3669 /* emit "stq_u $t9, 0($at)" */
3671 set_tok_reg (newtok[0], AXP_REG_T9);
3672 set_tok_const (newtok[1], 0);
3673 set_tok_preg (newtok[2], AXP_REG_AT);
3674 assemble_tokens ("stq_u", newtok, 3, 1);
3676 /* emit "stq_u $t10, size-1($at)" */
3678 set_tok_reg (newtok[0], AXP_REG_T10);
3679 set_tok_const (newtok[1], (1 << lgsize) - 1);
3680 assemble_tokens ("stq_u", newtok, 3, 1);
3683 /* Sign extend a half-word or byte. The 32-bit sign extend is
3684 implemented as "addl $31, $r, $t" in the opcode table. */
3687 emit_sextX (tok, ntok, vlgsize)
3688 const expressionS *tok;
3692 long lgsize = (long) vlgsize;
3694 if (alpha_target & AXP_OPCODE_BWX)
3695 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3698 int bitshift = 64 - 8 * (1 << lgsize);
3699 expressionS newtok[3];
3701 /* emit "sll src,bits,dst" */
3704 set_tok_const (newtok[1], bitshift);
3705 newtok[2] = tok[ntok - 1];
3706 assemble_tokens ("sll", newtok, 3, 1);
3708 /* emit "sra dst,bits,dst" */
3710 newtok[0] = newtok[2];
3711 assemble_tokens ("sra", newtok, 3, 1);
3715 /* Implement the division and modulus macros. */
3719 /* Make register usage like in normal procedure call.
3720 Don't clobber PV and RA. */
3723 emit_division (tok, ntok, symname)
3724 const expressionS *tok;
3728 /* DIVISION and MODULUS. Yech.
3733 * mov x,R16 # if x != R16
3734 * mov y,R17 # if y != R17
3739 * with appropriate optimizations if R0,R16,R17 are the registers
3740 * specified by the compiler.
3745 expressionS newtok[3];
3747 xr = regno (tok[0].X_add_number);
3748 yr = regno (tok[1].X_add_number);
3753 rr = regno (tok[2].X_add_number);
3755 /* Move the operands into the right place */
3756 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3758 /* They are in exactly the wrong order -- swap through AT */
3761 as_bad (_("macro requires $at register while noat in effect"));
3763 set_tok_reg (newtok[0], AXP_REG_R16);
3764 set_tok_reg (newtok[1], AXP_REG_AT);
3765 assemble_tokens ("mov", newtok, 2, 1);
3767 set_tok_reg (newtok[0], AXP_REG_R17);
3768 set_tok_reg (newtok[1], AXP_REG_R16);
3769 assemble_tokens ("mov", newtok, 2, 1);
3771 set_tok_reg (newtok[0], AXP_REG_AT);
3772 set_tok_reg (newtok[1], AXP_REG_R17);
3773 assemble_tokens ("mov", newtok, 2, 1);
3777 if (yr == AXP_REG_R16)
3779 set_tok_reg (newtok[0], AXP_REG_R16);
3780 set_tok_reg (newtok[1], AXP_REG_R17);
3781 assemble_tokens ("mov", newtok, 2, 1);
3784 if (xr != AXP_REG_R16)
3786 set_tok_reg (newtok[0], xr);
3787 set_tok_reg (newtok[1], AXP_REG_R16);
3788 assemble_tokens ("mov", newtok, 2, 1);
3791 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3793 set_tok_reg (newtok[0], yr);
3794 set_tok_reg (newtok[1], AXP_REG_R17);
3795 assemble_tokens ("mov", newtok, 2, 1);
3799 sym = symbol_find_or_make ((const char *) symname);
3801 set_tok_reg (newtok[0], AXP_REG_AT);
3802 set_tok_sym (newtok[1], sym, 0);
3803 assemble_tokens ("lda", newtok, 2, 1);
3805 /* Call the division routine */
3806 set_tok_reg (newtok[0], AXP_REG_AT);
3807 set_tok_cpreg (newtok[1], AXP_REG_AT);
3808 set_tok_const (newtok[2], 0);
3809 assemble_tokens ("jsr", newtok, 3, 1);
3811 /* Move the result to the right place */
3812 if (rr != AXP_REG_R0)
3814 set_tok_reg (newtok[0], AXP_REG_R0);
3815 set_tok_reg (newtok[1], rr);
3816 assemble_tokens ("mov", newtok, 2, 1);
3820 #else /* !OBJ_EVAX */
3823 emit_division (tok, ntok, symname)
3824 const expressionS *tok;
3828 /* DIVISION and MODULUS. Yech.
3838 * with appropriate optimizations if t10,t11,t12 are the registers
3839 * specified by the compiler.
3844 expressionS newtok[3];
3846 xr = regno (tok[0].X_add_number);
3847 yr = regno (tok[1].X_add_number);
3852 rr = regno (tok[2].X_add_number);
3854 sym = symbol_find_or_make ((const char *) symname);
3856 /* Move the operands into the right place */
3857 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
3859 /* They are in exactly the wrong order -- swap through AT */
3862 as_bad (_("macro requires $at register while noat in effect"));
3864 set_tok_reg (newtok[0], AXP_REG_T10);
3865 set_tok_reg (newtok[1], AXP_REG_AT);
3866 assemble_tokens ("mov", newtok, 2, 1);
3868 set_tok_reg (newtok[0], AXP_REG_T11);
3869 set_tok_reg (newtok[1], AXP_REG_T10);
3870 assemble_tokens ("mov", newtok, 2, 1);
3872 set_tok_reg (newtok[0], AXP_REG_AT);
3873 set_tok_reg (newtok[1], AXP_REG_T11);
3874 assemble_tokens ("mov", newtok, 2, 1);
3878 if (yr == AXP_REG_T10)
3880 set_tok_reg (newtok[0], AXP_REG_T10);
3881 set_tok_reg (newtok[1], AXP_REG_T11);
3882 assemble_tokens ("mov", newtok, 2, 1);
3885 if (xr != AXP_REG_T10)
3887 set_tok_reg (newtok[0], xr);
3888 set_tok_reg (newtok[1], AXP_REG_T10);
3889 assemble_tokens ("mov", newtok, 2, 1);
3892 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
3894 set_tok_reg (newtok[0], yr);
3895 set_tok_reg (newtok[1], AXP_REG_T11);
3896 assemble_tokens ("mov", newtok, 2, 1);
3900 /* Call the division routine */
3901 set_tok_reg (newtok[0], AXP_REG_T9);
3902 set_tok_sym (newtok[1], sym, 0);
3903 assemble_tokens ("jsr", newtok, 2, 1);
3905 /* Reload the GP register */
3909 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
3910 set_tok_reg (newtok[0], alpha_gp_register);
3911 set_tok_const (newtok[1], 0);
3912 set_tok_preg (newtok[2], AXP_REG_T9);
3913 assemble_tokens ("ldgp", newtok, 3, 1);
3916 /* Move the result to the right place */
3917 if (rr != AXP_REG_T12)
3919 set_tok_reg (newtok[0], AXP_REG_T12);
3920 set_tok_reg (newtok[1], rr);
3921 assemble_tokens ("mov", newtok, 2, 1);
3925 #endif /* !OBJ_EVAX */
3927 /* The jsr and jmp macros differ from their instruction counterparts
3928 in that they can load the target address and default most
3932 emit_jsrjmp (tok, ntok, vopname)
3933 const expressionS *tok;
3937 const char *opname = (const char *) vopname;
3938 struct alpha_insn insn;
3939 expressionS newtok[3];
3943 if (tokidx < ntok && tok[tokidx].X_op == O_register)
3944 r = regno (tok[tokidx++].X_add_number);
3946 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
3948 set_tok_reg (newtok[0], r);
3950 if (tokidx < ntok &&
3951 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
3952 r = regno (tok[tokidx++].X_add_number);
3954 /* keep register if jsr $n.<sym> */
3958 int basereg = alpha_gp_register;
3959 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
3963 set_tok_cpreg (newtok[1], r);
3966 /* FIXME: Add hint relocs to BFD for evax. */
3969 newtok[2] = tok[tokidx];
3972 set_tok_const (newtok[2], 0);
3974 assemble_tokens_to_insn (opname, newtok, 3, &insn);
3978 assert (insn.nfixups < MAX_INSN_FIXUPS);
3979 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
3980 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3982 insn.sequence = lituse;
3988 /* The ret and jcr instructions differ from their instruction
3989 counterparts in that everything can be defaulted. */
3992 emit_retjcr (tok, ntok, vopname)
3993 const expressionS *tok;
3997 const char *opname = (const char *) vopname;
3998 expressionS newtok[3];
4001 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4002 r = regno (tok[tokidx++].X_add_number);
4006 set_tok_reg (newtok[0], r);
4008 if (tokidx < ntok &&
4009 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4010 r = regno (tok[tokidx++].X_add_number);
4014 set_tok_cpreg (newtok[1], r);
4017 newtok[2] = tok[tokidx];
4019 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
4021 assemble_tokens (opname, newtok, 3, 0);
4024 /* Assembler directives */
4026 /* Handle the .text pseudo-op. This is like the usual one, but it
4027 clears alpha_insn_label and restores auto alignment. */
4035 alpha_insn_label = NULL;
4036 alpha_auto_align_on = 1;
4037 alpha_current_align = 0;
4040 /* Handle the .data pseudo-op. This is like the usual one, but it
4041 clears alpha_insn_label and restores auto alignment. */
4048 alpha_insn_label = NULL;
4049 alpha_auto_align_on = 1;
4050 alpha_current_align = 0;
4053 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
4055 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
4056 openVMS constructs a section for every common symbol. */
4059 s_alpha_comm (ignore)
4062 register char *name;
4066 register symbolS *symbolP;
4069 segT current_section = now_seg;
4070 int current_subsec = now_subseg;
4074 name = input_line_pointer;
4075 c = get_symbol_end ();
4077 /* just after name is now '\0' */
4078 p = input_line_pointer;
4083 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
4084 if (*input_line_pointer == ',')
4086 input_line_pointer++;
4089 if ((temp = get_absolute_expression ()) < 0)
4091 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4092 ignore_rest_of_line ();
4097 symbolP = symbol_find_or_make (name);
4100 /* Make a section for the common symbol. */
4101 new_seg = subseg_new (xstrdup (name), 0);
4107 /* alignment might follow */
4108 if (*input_line_pointer == ',')
4112 input_line_pointer++;
4113 align = get_absolute_expression ();
4114 bfd_set_section_alignment (stdoutput, new_seg, align);
4118 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4120 as_bad (_("Ignoring attempt to re-define symbol"));
4121 ignore_rest_of_line ();
4126 if (bfd_section_size (stdoutput, new_seg) > 0)
4128 if (bfd_section_size (stdoutput, new_seg) != temp)
4129 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4130 S_GET_NAME (symbolP),
4131 (long) bfd_section_size (stdoutput, new_seg),
4135 if (S_GET_VALUE (symbolP))
4137 if (S_GET_VALUE (symbolP) != (valueT) temp)
4138 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4139 S_GET_NAME (symbolP),
4140 (long) S_GET_VALUE (symbolP),
4147 subseg_set (new_seg, 0);
4148 p = frag_more (temp);
4149 new_seg->flags |= SEC_IS_COMMON;
4150 if (! S_IS_DEFINED (symbolP))
4151 S_SET_SEGMENT (symbolP, new_seg);
4153 S_SET_VALUE (symbolP, (valueT) temp);
4155 S_SET_EXTERNAL (symbolP);
4159 subseg_set (current_section, current_subsec);
4162 know (symbol_get_frag (symbolP) == &zero_address_frag);
4164 demand_empty_rest_of_line ();
4167 #endif /* ! OBJ_ELF */
4171 /* Handle the .rdata pseudo-op. This is like the usual one, but it
4172 clears alpha_insn_label and restores auto alignment. */
4175 s_alpha_rdata (ignore)
4180 temp = get_absolute_expression ();
4181 subseg_new (".rdata", 0);
4182 demand_empty_rest_of_line ();
4183 alpha_insn_label = NULL;
4184 alpha_auto_align_on = 1;
4185 alpha_current_align = 0;
4192 /* Handle the .sdata pseudo-op. This is like the usual one, but it
4193 clears alpha_insn_label and restores auto alignment. */
4196 s_alpha_sdata (ignore)
4201 temp = get_absolute_expression ();
4202 subseg_new (".sdata", 0);
4203 demand_empty_rest_of_line ();
4204 alpha_insn_label = NULL;
4205 alpha_auto_align_on = 1;
4206 alpha_current_align = 0;
4212 /* Handle the .section pseudo-op. This is like the usual one, but it
4213 clears alpha_insn_label and restores auto alignment. */
4216 s_alpha_section (ignore)
4219 obj_elf_section (ignore);
4221 alpha_insn_label = NULL;
4222 alpha_auto_align_on = 1;
4223 alpha_current_align = 0;
4228 int dummy ATTRIBUTE_UNUSED;
4230 if (ECOFF_DEBUGGING)
4231 ecoff_directive_ent (0);
4234 char *name, name_end;
4235 name = input_line_pointer;
4236 name_end = get_symbol_end ();
4238 if (! is_name_beginner (*name))
4240 as_warn (_(".ent directive has no name"));
4241 *input_line_pointer = name_end;
4247 if (alpha_cur_ent_sym)
4248 as_warn (_("nested .ent directives"));
4250 sym = symbol_find_or_make (name);
4251 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4252 alpha_cur_ent_sym = sym;
4254 /* The .ent directive is sometimes followed by a number. Not sure
4255 what it really means, but ignore it. */
4256 *input_line_pointer = name_end;
4258 if (*input_line_pointer == ',')
4260 input_line_pointer++;
4263 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
4264 (void) get_absolute_expression ();
4266 demand_empty_rest_of_line ();
4272 int dummy ATTRIBUTE_UNUSED;
4274 if (ECOFF_DEBUGGING)
4275 ecoff_directive_end (0);
4278 char *name, name_end;
4279 name = input_line_pointer;
4280 name_end = get_symbol_end ();
4282 if (! is_name_beginner (*name))
4284 as_warn (_(".end directive has no name"));
4285 *input_line_pointer = name_end;
4291 sym = symbol_find (name);
4292 if (sym != alpha_cur_ent_sym)
4293 as_warn (_(".end directive names different symbol than .ent"));
4295 /* Create an expression to calculate the size of the function. */
4298 symbol_get_obj (sym)->size =
4299 (expressionS *) xmalloc (sizeof (expressionS));
4300 symbol_get_obj (sym)->size->X_op = O_subtract;
4301 symbol_get_obj (sym)->size->X_add_symbol
4302 = symbol_new ("L0\001", now_seg, frag_now_fix (), frag_now);
4303 symbol_get_obj (sym)->size->X_op_symbol = sym;
4304 symbol_get_obj (sym)->size->X_add_number = 0;
4307 alpha_cur_ent_sym = NULL;
4309 *input_line_pointer = name_end;
4311 demand_empty_rest_of_line ();
4319 if (ECOFF_DEBUGGING)
4322 ecoff_directive_fmask (0);
4324 ecoff_directive_mask (0);
4327 discard_rest_of_line ();
4331 s_alpha_frame (dummy)
4332 int dummy ATTRIBUTE_UNUSED;
4334 if (ECOFF_DEBUGGING)
4335 ecoff_directive_frame (0);
4337 discard_rest_of_line ();
4341 s_alpha_prologue (ignore)
4342 int ignore ATTRIBUTE_UNUSED;
4347 arg = get_absolute_expression ();
4348 demand_empty_rest_of_line ();
4350 if (ECOFF_DEBUGGING)
4351 sym = ecoff_get_cur_proc_sym ();
4353 sym = alpha_cur_ent_sym;
4358 case 0: /* No PV required. */
4359 S_SET_OTHER (sym, STO_ALPHA_NOPV
4360 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4362 case 1: /* Std GP load. */
4363 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
4364 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4366 case 2: /* Non-std use of PV. */
4370 as_bad (_("Invalid argument %d to .prologue."), arg);
4375 static char *first_file_directive;
4378 s_alpha_file (ignore)
4379 int ignore ATTRIBUTE_UNUSED;
4381 /* Save the first .file directive we see, so that we can change our
4382 minds about whether ecoff debugging should or shouldn't be enabled. */
4383 if (alpha_flag_mdebug < 0 && ! first_file_directive)
4385 char *start = input_line_pointer;
4388 discard_rest_of_line ();
4390 len = input_line_pointer - start;
4391 first_file_directive = xmalloc (len + 1);
4392 memcpy (first_file_directive, start, len);
4393 first_file_directive[len] = '\0';
4395 input_line_pointer = start;
4398 if (ECOFF_DEBUGGING)
4399 ecoff_directive_file (0);
4401 dwarf2_directive_file (0);
4405 s_alpha_loc (ignore)
4406 int ignore ATTRIBUTE_UNUSED;
4408 if (ECOFF_DEBUGGING)
4409 ecoff_directive_loc (0);
4411 dwarf2_directive_loc (0);
4418 /* If we've been undecided about mdebug, make up our minds in favour. */
4419 if (alpha_flag_mdebug < 0)
4421 segT sec = subseg_new (".mdebug", 0);
4422 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
4423 bfd_set_section_alignment (stdoutput, sec, 3);
4425 ecoff_read_begin_hook ();
4427 if (first_file_directive)
4429 char *save_ilp = input_line_pointer;
4430 input_line_pointer = first_file_directive;
4431 ecoff_directive_file (0);
4432 input_line_pointer = save_ilp;
4433 free (first_file_directive);
4436 alpha_flag_mdebug = 1;
4442 s_alpha_coff_wrapper (which)
4445 static void (* const fns[]) PARAMS ((int)) = {
4446 ecoff_directive_begin,
4447 ecoff_directive_bend,
4448 ecoff_directive_def,
4449 ecoff_directive_dim,
4450 ecoff_directive_endef,
4451 ecoff_directive_scl,
4452 ecoff_directive_tag,
4453 ecoff_directive_val,
4456 assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
4458 if (ECOFF_DEBUGGING)
4462 as_bad (_("ECOFF debugging is disabled."));
4463 ignore_rest_of_line ();
4466 #endif /* OBJ_ELF */
4470 /* Handle the section specific pseudo-op. */
4473 s_alpha_section (secid)
4477 #define EVAX_SECTION_COUNT 5
4478 static char *section_name[EVAX_SECTION_COUNT + 1] =
4479 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4481 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
4483 as_fatal (_("Unknown section directive"));
4484 demand_empty_rest_of_line ();
4487 temp = get_absolute_expression ();
4488 subseg_new (section_name[secid], 0);
4489 demand_empty_rest_of_line ();
4490 alpha_insn_label = NULL;
4491 alpha_auto_align_on = 1;
4492 alpha_current_align = 0;
4495 /* Parse .ent directives. */
4498 s_alpha_ent (ignore)
4502 expressionS symexpr;
4504 alpha_evax_proc.pdsckind = 0;
4505 alpha_evax_proc.framereg = -1;
4506 alpha_evax_proc.framesize = 0;
4507 alpha_evax_proc.rsa_offset = 0;
4508 alpha_evax_proc.ra_save = AXP_REG_RA;
4509 alpha_evax_proc.fp_save = -1;
4510 alpha_evax_proc.imask = 0;
4511 alpha_evax_proc.fmask = 0;
4512 alpha_evax_proc.prologue = 0;
4513 alpha_evax_proc.type = 0;
4515 expression (&symexpr);
4517 if (symexpr.X_op != O_symbol)
4519 as_fatal (_(".ent directive has no symbol"));
4520 demand_empty_rest_of_line ();
4524 symbol = make_expr_symbol (&symexpr);
4525 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
4526 alpha_evax_proc.symbol = symbol;
4528 demand_empty_rest_of_line ();
4532 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4535 s_alpha_frame (ignore)
4540 alpha_evax_proc.framereg = tc_get_register (1);
4543 if (*input_line_pointer++ != ','
4544 || get_absolute_expression_and_terminator (&val) != ',')
4546 as_warn (_("Bad .frame directive 1./2. param"));
4547 --input_line_pointer;
4548 demand_empty_rest_of_line ();
4552 alpha_evax_proc.framesize = val;
4554 (void) tc_get_register (1);
4556 if (*input_line_pointer++ != ',')
4558 as_warn (_("Bad .frame directive 3./4. param"));
4559 --input_line_pointer;
4560 demand_empty_rest_of_line ();
4563 alpha_evax_proc.rsa_offset = get_absolute_expression ();
4569 s_alpha_pdesc (ignore)
4579 segment_info_type *seginfo = seg_info (alpha_link_section);
4581 if (now_seg != alpha_link_section)
4583 as_bad (_(".pdesc directive not in link (.link) section"));
4584 demand_empty_rest_of_line ();
4588 if ((alpha_evax_proc.symbol == 0)
4589 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
4591 as_fatal (_(".pdesc has no matching .ent"));
4592 demand_empty_rest_of_line ();
4596 *symbol_get_obj (alpha_evax_proc.symbol) =
4597 (valueT) seginfo->literal_pool_size;
4600 if (exp.X_op != O_symbol)
4602 as_warn (_(".pdesc directive has no entry symbol"));
4603 demand_empty_rest_of_line ();
4607 entry_sym = make_expr_symbol (&exp);
4608 /* Save bfd symbol of proc desc in function symbol. */
4609 symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
4610 = symbol_get_bfdsym (entry_sym);
4613 if (*input_line_pointer++ != ',')
4615 as_warn (_("No comma after .pdesc <entryname>"));
4616 demand_empty_rest_of_line ();
4621 name = input_line_pointer;
4622 name_end = get_symbol_end ();
4624 if (strncmp (name, "stack", 5) == 0)
4626 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
4628 else if (strncmp (name, "reg", 3) == 0)
4630 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
4632 else if (strncmp (name, "null", 4) == 0)
4634 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
4638 as_fatal (_("unknown procedure kind"));
4639 demand_empty_rest_of_line ();
4643 *input_line_pointer = name_end;
4644 demand_empty_rest_of_line ();
4646 #ifdef md_flush_pending_output
4647 md_flush_pending_output ();
4650 frag_align (3, 0, 0);
4652 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4654 seginfo->literal_pool_size += 16;
4656 *p = alpha_evax_proc.pdsckind
4657 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
4658 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
4660 switch (alpha_evax_proc.pdsckind)
4662 case PDSC_S_K_KIND_NULL:
4666 case PDSC_S_K_KIND_FP_REGISTER:
4667 *(p + 2) = alpha_evax_proc.fp_save;
4668 *(p + 3) = alpha_evax_proc.ra_save;
4670 case PDSC_S_K_KIND_FP_STACK:
4671 md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
4673 default: /* impossible */
4678 *(p + 5) = alpha_evax_proc.type & 0x0f;
4680 /* Signature offset. */
4681 md_number_to_chars (p + 6, (valueT) 0, 2);
4683 fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
4685 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
4688 /* Add dummy fix to make add_to_link_pool work. */
4690 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4692 seginfo->literal_pool_size += 8;
4694 /* pdesc+16: Size. */
4695 md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
4697 md_number_to_chars (p + 4, (valueT) 0, 2);
4700 md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
4702 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
4705 /* Add dummy fix to make add_to_link_pool work. */
4707 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
4709 seginfo->literal_pool_size += 8;
4711 /* pdesc+24: register masks. */
4713 md_number_to_chars (p, alpha_evax_proc.imask, 4);
4714 md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
4719 /* Support for crash debug on vms. */
4722 s_alpha_name (ignore)
4727 segment_info_type *seginfo = seg_info (alpha_link_section);
4729 if (now_seg != alpha_link_section)
4731 as_bad (_(".name directive not in link (.link) section"));
4732 demand_empty_rest_of_line ();
4737 if (exp.X_op != O_symbol)
4739 as_warn (_(".name directive has no symbol"));
4740 demand_empty_rest_of_line ();
4744 demand_empty_rest_of_line ();
4746 #ifdef md_flush_pending_output
4747 md_flush_pending_output ();
4750 frag_align (3, 0, 0);
4752 seginfo->literal_pool_size += 8;
4754 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
4760 s_alpha_linkage (ignore)
4766 #ifdef md_flush_pending_output
4767 md_flush_pending_output ();
4771 if (exp.X_op != O_symbol)
4773 as_fatal (_("No symbol after .linkage"));
4777 p = frag_more (LKP_S_K_SIZE);
4778 memset (p, 0, LKP_S_K_SIZE);
4779 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
4780 BFD_RELOC_ALPHA_LINKAGE);
4782 demand_empty_rest_of_line ();
4788 s_alpha_code_address (ignore)
4794 #ifdef md_flush_pending_output
4795 md_flush_pending_output ();
4799 if (exp.X_op != O_symbol)
4801 as_fatal (_("No symbol after .code_address"));
4807 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
4808 BFD_RELOC_ALPHA_CODEADDR);
4810 demand_empty_rest_of_line ();
4816 s_alpha_fp_save (ignore)
4820 alpha_evax_proc.fp_save = tc_get_register (1);
4822 demand_empty_rest_of_line ();
4827 s_alpha_mask (ignore)
4832 if (get_absolute_expression_and_terminator (&val) != ',')
4834 as_warn (_("Bad .mask directive"));
4835 --input_line_pointer;
4839 alpha_evax_proc.imask = val;
4840 (void) get_absolute_expression ();
4842 demand_empty_rest_of_line ();
4848 s_alpha_fmask (ignore)
4853 if (get_absolute_expression_and_terminator (&val) != ',')
4855 as_warn (_("Bad .fmask directive"));
4856 --input_line_pointer;
4860 alpha_evax_proc.fmask = val;
4861 (void) get_absolute_expression ();
4863 demand_empty_rest_of_line ();
4869 s_alpha_end (ignore)
4874 c = get_symbol_end ();
4875 *input_line_pointer = c;
4876 demand_empty_rest_of_line ();
4877 alpha_evax_proc.symbol = 0;
4883 s_alpha_file (ignore)
4888 static char case_hack[32];
4890 extern char *demand_copy_string PARAMS ((int *lenP));
4892 sprintf (case_hack, "<CASE:%01d%01d>",
4893 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
4895 s = symbol_find_or_make (case_hack);
4896 symbol_get_bfdsym (s)->flags |= BSF_FILE;
4898 get_absolute_expression ();
4899 s = symbol_find_or_make (demand_copy_string (&length));
4900 symbol_get_bfdsym (s)->flags |= BSF_FILE;
4901 demand_empty_rest_of_line ();
4905 #endif /* OBJ_EVAX */
4907 /* Handle the .gprel32 pseudo op. */
4910 s_alpha_gprel32 (ignore)
4911 int ignore ATTRIBUTE_UNUSED;
4923 e.X_add_symbol = section_symbol (absolute_section);
4936 e.X_add_symbol = section_symbol (absolute_section);
4939 e.X_op = O_subtract;
4940 e.X_op_symbol = alpha_gp_symbol;
4948 if (alpha_auto_align_on && alpha_current_align < 2)
4949 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
4950 if (alpha_current_align > 2)
4951 alpha_current_align = 2;
4952 alpha_insn_label = NULL;
4956 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
4957 &e, 0, BFD_RELOC_GPREL32);
4960 /* Handle floating point allocation pseudo-ops. This is like the
4961 generic vresion, but it makes sure the current label, if any, is
4962 correctly aligned. */
4965 s_alpha_float_cons (type)
4992 if (alpha_auto_align_on && alpha_current_align < log_size)
4993 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
4994 if (alpha_current_align > log_size)
4995 alpha_current_align = log_size;
4996 alpha_insn_label = NULL;
5001 /* Handle the .proc pseudo op. We don't really do much with it except
5005 s_alpha_proc (is_static)
5006 int is_static ATTRIBUTE_UNUSED;
5014 /* Takes ".proc name,nargs" */
5016 name = input_line_pointer;
5017 c = get_symbol_end ();
5018 p = input_line_pointer;
5019 symbolP = symbol_find_or_make (name);
5022 if (*input_line_pointer != ',')
5025 as_warn (_("Expected comma after name \"%s\""), name);
5028 ignore_rest_of_line ();
5032 input_line_pointer++;
5033 temp = get_absolute_expression ();
5035 /* *symbol_get_obj (symbolP) = (signed char) temp; */
5036 as_warn (_("unhandled: .proc %s,%d"), name, temp);
5037 demand_empty_rest_of_line ();
5040 /* Handle the .set pseudo op. This is used to turn on and off most of
5041 the assembler features. */
5045 int x ATTRIBUTE_UNUSED;
5051 name = input_line_pointer;
5052 ch = get_symbol_end ();
5055 if (s[0] == 'n' && s[1] == 'o')
5060 if (!strcmp ("reorder", s))
5062 else if (!strcmp ("at", s))
5063 alpha_noat_on = !yesno;
5064 else if (!strcmp ("macro", s))
5065 alpha_macros_on = yesno;
5066 else if (!strcmp ("move", s))
5068 else if (!strcmp ("volatile", s))
5071 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
5073 *input_line_pointer = ch;
5074 demand_empty_rest_of_line ();
5077 /* Handle the .base pseudo op. This changes the assembler's notion of
5078 the $gp register. */
5081 s_alpha_base (ignore)
5082 int ignore ATTRIBUTE_UNUSED;
5085 if (first_32bit_quadrant)
5087 /* not fatal, but it might not work in the end */
5088 as_warn (_("File overrides no-base-register option."));
5089 first_32bit_quadrant = 0;
5094 if (*input_line_pointer == '$')
5096 input_line_pointer++;
5097 if (*input_line_pointer == 'r')
5098 input_line_pointer++;
5101 alpha_gp_register = get_absolute_expression ();
5102 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5104 alpha_gp_register = AXP_REG_GP;
5105 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5108 demand_empty_rest_of_line ();
5111 /* Handle the .align pseudo-op. This aligns to a power of two. It
5112 also adjusts any current instruction label. We treat this the same
5113 way the MIPS port does: .align 0 turns off auto alignment. */
5116 s_alpha_align (ignore)
5117 int ignore ATTRIBUTE_UNUSED;
5121 long max_alignment = 15;
5123 align = get_absolute_expression ();
5124 if (align > max_alignment)
5126 align = max_alignment;
5127 as_bad (_("Alignment too large: %d. assumed"), align);
5131 as_warn (_("Alignment negative: 0 assumed"));
5135 if (*input_line_pointer == ',')
5137 input_line_pointer++;
5138 fill = get_absolute_expression ();
5146 alpha_auto_align_on = 1;
5147 alpha_align (align, pfill, alpha_insn_label, 1);
5151 alpha_auto_align_on = 0;
5154 demand_empty_rest_of_line ();
5157 /* Hook the normal string processor to reset known alignment. */
5160 s_alpha_stringer (terminate)
5163 alpha_current_align = 0;
5164 alpha_insn_label = NULL;
5165 stringer (terminate);
5168 /* Hook the normal space processing to reset known alignment. */
5171 s_alpha_space (ignore)
5174 alpha_current_align = 0;
5175 alpha_insn_label = NULL;
5179 /* Hook into cons for auto-alignment. */
5182 alpha_cons_align (size)
5188 while ((size >>= 1) != 0)
5191 if (alpha_auto_align_on && alpha_current_align < log_size)
5192 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5193 if (alpha_current_align > log_size)
5194 alpha_current_align = log_size;
5195 alpha_insn_label = NULL;
5198 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5199 pseudos. We just turn off auto-alignment and call down to cons. */
5202 s_alpha_ucons (bytes)
5205 int hold = alpha_auto_align_on;
5206 alpha_auto_align_on = 0;
5208 alpha_auto_align_on = hold;
5211 /* Switch the working cpu type. */
5214 s_alpha_arch (ignored)
5215 int ignored ATTRIBUTE_UNUSED;
5218 const struct cpu_type *p;
5221 name = input_line_pointer;
5222 ch = get_symbol_end ();
5224 for (p = cpu_types; p->name; ++p)
5225 if (strcmp (name, p->name) == 0)
5227 alpha_target_name = p->name, alpha_target = p->flags;
5230 as_warn ("Unknown CPU identifier `%s'", name);
5233 *input_line_pointer = ch;
5234 demand_empty_rest_of_line ();
5238 /* print token expression with alpha specific extension. */
5241 alpha_print_token (f, exp)
5243 const expressionS *exp;
5253 expressionS nexp = *exp;
5254 nexp.X_op = O_register;
5255 print_expr (f, &nexp);
5260 print_expr (f, exp);
5267 /* The target specific pseudo-ops which we support. */
5269 const pseudo_typeS md_pseudo_table[] = {
5271 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
5272 {"rdata", s_alpha_rdata, 0},
5274 {"text", s_alpha_text, 0},
5275 {"data", s_alpha_data, 0},
5277 {"sdata", s_alpha_sdata, 0},
5280 {"section", s_alpha_section, 0},
5281 {"section.s", s_alpha_section, 0},
5282 {"sect", s_alpha_section, 0},
5283 {"sect.s", s_alpha_section, 0},
5286 { "pdesc", s_alpha_pdesc, 0},
5287 { "name", s_alpha_name, 0},
5288 { "linkage", s_alpha_linkage, 0},
5289 { "code_address", s_alpha_code_address, 0},
5290 { "ent", s_alpha_ent, 0},
5291 { "frame", s_alpha_frame, 0},
5292 { "fp_save", s_alpha_fp_save, 0},
5293 { "mask", s_alpha_mask, 0},
5294 { "fmask", s_alpha_fmask, 0},
5295 { "end", s_alpha_end, 0},
5296 { "file", s_alpha_file, 0},
5297 { "rdata", s_alpha_section, 1},
5298 { "comm", s_alpha_comm, 0},
5299 { "link", s_alpha_section, 3},
5300 { "ctors", s_alpha_section, 4},
5301 { "dtors", s_alpha_section, 5},
5304 /* Frame related pseudos. */
5305 {"ent", s_alpha_ent, 0},
5306 {"end", s_alpha_end, 0},
5307 {"mask", s_alpha_mask, 0},
5308 {"fmask", s_alpha_mask, 1},
5309 {"frame", s_alpha_frame, 0},
5310 {"prologue", s_alpha_prologue, 0},
5311 {"file", s_alpha_file, 5},
5312 {"loc", s_alpha_loc, 9},
5313 {"stabs", s_alpha_stab, 's'},
5314 {"stabn", s_alpha_stab, 'n'},
5315 /* COFF debugging related pseudos. */
5316 {"begin", s_alpha_coff_wrapper, 0},
5317 {"bend", s_alpha_coff_wrapper, 1},
5318 {"def", s_alpha_coff_wrapper, 2},
5319 {"dim", s_alpha_coff_wrapper, 3},
5320 {"endef", s_alpha_coff_wrapper, 4},
5321 {"scl", s_alpha_coff_wrapper, 5},
5322 {"tag", s_alpha_coff_wrapper, 6},
5323 {"val", s_alpha_coff_wrapper, 7},
5325 {"prologue", s_ignore, 0},
5327 {"gprel32", s_alpha_gprel32, 0},
5328 {"t_floating", s_alpha_float_cons, 'd'},
5329 {"s_floating", s_alpha_float_cons, 'f'},
5330 {"f_floating", s_alpha_float_cons, 'F'},
5331 {"g_floating", s_alpha_float_cons, 'G'},
5332 {"d_floating", s_alpha_float_cons, 'D'},
5334 {"proc", s_alpha_proc, 0},
5335 {"aproc", s_alpha_proc, 1},
5336 {"set", s_alpha_set, 0},
5337 {"reguse", s_ignore, 0},
5338 {"livereg", s_ignore, 0},
5339 {"base", s_alpha_base, 0}, /*??*/
5340 {"option", s_ignore, 0},
5341 {"aent", s_ignore, 0},
5342 {"ugen", s_ignore, 0},
5343 {"eflag", s_ignore, 0},
5345 {"align", s_alpha_align, 0},
5346 {"double", s_alpha_float_cons, 'd'},
5347 {"float", s_alpha_float_cons, 'f'},
5348 {"single", s_alpha_float_cons, 'f'},
5349 {"ascii", s_alpha_stringer, 0},
5350 {"asciz", s_alpha_stringer, 1},
5351 {"string", s_alpha_stringer, 1},
5352 {"space", s_alpha_space, 0},
5353 {"skip", s_alpha_space, 0},
5354 {"zero", s_alpha_space, 0},
5356 /* Unaligned data pseudos. */
5357 {"uword", s_alpha_ucons, 2},
5358 {"ulong", s_alpha_ucons, 4},
5359 {"uquad", s_alpha_ucons, 8},
5362 /* Dwarf wants these versions of unaligned. */
5363 {"2byte", s_alpha_ucons, 2},
5364 {"4byte", s_alpha_ucons, 4},
5365 {"8byte", s_alpha_ucons, 8},
5368 /* We don't do any optimizing, so we can safely ignore these. */
5369 {"noalias", s_ignore, 0},
5370 {"alias", s_ignore, 0},
5372 {"arch", s_alpha_arch, 0},
5377 /* Build a BFD section with its flags set appropriately for the .lita,
5378 .lit8, or .lit4 sections. */
5381 create_literal_section (name, secp, symp)
5386 segT current_section = now_seg;
5387 int current_subsec = now_subseg;
5390 *secp = new_sec = subseg_new (name, 0);
5391 subseg_set (current_section, current_subsec);
5392 bfd_set_section_alignment (stdoutput, new_sec, 4);
5393 bfd_set_section_flags (stdoutput, new_sec,
5394 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
5397 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
5402 /* @@@ GP selection voodoo. All of this seems overly complicated and
5403 unnecessary; which is the primary reason it's for ECOFF only. */
5412 vma = bfd_get_section_vma (foo, sec);
5413 if (vma && vma < alpha_gp_value)
5414 alpha_gp_value = vma;
5420 assert (alpha_gp_value == 0);
5422 /* Get minus-one in whatever width... */
5426 /* Select the smallest VMA of these existing sections. */
5427 maybe_set_gp (alpha_lita_section);
5429 /* These were disabled before -- should we use them? */
5430 maybe_set_gp (sdata);
5431 maybe_set_gp (lit8_sec);
5432 maybe_set_gp (lit4_sec);
5435 /* @@ Will a simple 0x8000 work here? If not, why not? */
5436 #define GP_ADJUSTMENT (0x8000 - 0x10)
5438 alpha_gp_value += GP_ADJUSTMENT;
5440 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5443 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5446 #endif /* OBJ_ECOFF */
5449 /* Map 's' to SHF_ALPHA_GPREL. */
5452 alpha_elf_section_letter (letter, ptr_msg)
5457 return SHF_ALPHA_GPREL;
5459 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S in string");
5463 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5466 alpha_elf_section_flags (flags, attr, type)
5468 int attr, type ATTRIBUTE_UNUSED;
5470 if (attr & SHF_ALPHA_GPREL)
5471 flags |= SEC_SMALL_DATA;
5474 #endif /* OBJ_ELF */
5476 /* Called internally to handle all alignment needs. This takes care
5477 of eliding calls to frag_align if'n the cached current alignment
5478 says we've already got it, as well as taking care of the auto-align
5479 feature wrt labels. */
5482 alpha_align (n, pfill, label, force)
5486 int force ATTRIBUTE_UNUSED;
5488 if (alpha_current_align >= n)
5493 if (subseg_text_p (now_seg))
5494 frag_align_code (n, 0);
5496 frag_align (n, 0, 0);
5499 frag_align (n, *pfill, 0);
5501 alpha_current_align = n;
5503 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
5505 symbol_set_frag (label, frag_now);
5506 S_SET_VALUE (label, (valueT) frag_now_fix ());
5509 record_alignment (now_seg, n);
5511 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
5512 in a reloc for the linker to see. */
5515 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5516 of an rs_align_code fragment. */
5519 alpha_handle_align (fragp)
5522 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5523 static char const nopunop[8] = {
5524 0x1f, 0x04, 0xff, 0x47,
5525 0x00, 0x00, 0xfe, 0x2f
5531 if (fragp->fr_type != rs_align_code)
5534 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5535 p = fragp->fr_literal + fragp->fr_fix;
5548 memcpy (p, unop, 4);
5554 memcpy (p, nopunop, 8);
5556 fragp->fr_fix += fix;
5560 /* The Alpha has support for some VAX floating point types, as well as for
5561 IEEE floating point. We consider IEEE to be the primary floating point
5562 format, and sneak in the VAX floating point support here. */
5563 #define md_atof vax_md_atof
5564 #include "config/atof-vax.c"