1 /* tc-alpha.c - Processor-specific code for the DEC Alpha AXP CPU.
2 Copyright 1989, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003 Free Software Foundation, Inc.
4 Contributed by Carnegie Mellon University, 1993.
5 Written by Alessandro Forin, based on earlier gas-1.38 target CPU files.
6 Modified by Ken Raeburn for gas-2.x and ECOFF support.
7 Modified by Richard Henderson for ELF support.
8 Modified by Klaus K"ampf for EVAX (OpenVMS/Alpha) support.
10 This file is part of GAS, the GNU Assembler.
12 GAS is free software; you can redistribute it and/or modify
13 it under the terms of the GNU General Public License as published by
14 the Free Software Foundation; either version 2, or (at your option)
17 GAS is distributed in the hope that it will be useful,
18 but WITHOUT ANY WARRANTY; without even the implied warranty of
19 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 GNU General Public License for more details.
22 You should have received a copy of the GNU General Public License
23 along with GAS; see the file COPYING. If not, write to the Free
24 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
28 * Mach Operating System
29 * Copyright (c) 1993 Carnegie Mellon University
30 * All Rights Reserved.
32 * Permission to use, copy, modify and distribute this software and its
33 * documentation is hereby granted, provided that both the copyright
34 * notice and this permission notice appear in all copies of the
35 * software, derivative works or modified versions, and any portions
36 * thereof, and that both notices appear in supporting documentation.
38 * CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS
39 * CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND FOR
40 * ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
42 * Carnegie Mellon requests users of this software to return to
44 * Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
45 * School of Computer Science
46 * Carnegie Mellon University
47 * Pittsburgh PA 15213-3890
49 * any improvements or extensions that they make and grant Carnegie the
50 * rights to redistribute these changes.
55 #include "struc-symbol.h"
58 #include "opcode/alpha.h"
61 #include "elf/alpha.h"
62 #include "dwarf2dbg.h"
63 #include "dw2gencfi.h"
66 #include "safe-ctype.h"
70 #define TOKENIZE_ERROR -1
71 #define TOKENIZE_ERROR_REPORT -2
73 #define MAX_INSN_FIXUPS 2
74 #define MAX_INSN_ARGS 5
79 bfd_reloc_code_real_type reloc;
86 struct alpha_fixup fixups[MAX_INSN_FIXUPS];
104 void (*emit) PARAMS ((const expressionS *, int, const PTR));
106 enum alpha_macro_arg argsets[16];
109 /* Extra expression types. */
111 #define O_pregister O_md1 /* O_register, in parentheses */
112 #define O_cpregister O_md2 /* + a leading comma */
114 /* The alpha_reloc_op table below depends on the ordering of these. */
115 #define O_literal O_md3 /* !literal relocation */
116 #define O_lituse_addr O_md4 /* !lituse_addr relocation */
117 #define O_lituse_base O_md5 /* !lituse_base relocation */
118 #define O_lituse_bytoff O_md6 /* !lituse_bytoff relocation */
119 #define O_lituse_jsr O_md7 /* !lituse_jsr relocation */
120 #define O_lituse_tlsgd O_md8 /* !lituse_tlsgd relocation */
121 #define O_lituse_tlsldm O_md9 /* !lituse_tlsldm relocation */
122 #define O_gpdisp O_md10 /* !gpdisp relocation */
123 #define O_gprelhigh O_md11 /* !gprelhigh relocation */
124 #define O_gprellow O_md12 /* !gprellow relocation */
125 #define O_gprel O_md13 /* !gprel relocation */
126 #define O_samegp O_md14 /* !samegp relocation */
127 #define O_tlsgd O_md15 /* !tlsgd relocation */
128 #define O_tlsldm O_md16 /* !tlsldm relocation */
129 #define O_gotdtprel O_md17 /* !gotdtprel relocation */
130 #define O_dtprelhi O_md18 /* !dtprelhi relocation */
131 #define O_dtprello O_md19 /* !dtprello relocation */
132 #define O_dtprel O_md20 /* !dtprel relocation */
133 #define O_gottprel O_md21 /* !gottprel relocation */
134 #define O_tprelhi O_md22 /* !tprelhi relocation */
135 #define O_tprello O_md23 /* !tprello relocation */
136 #define O_tprel O_md24 /* !tprel relocation */
138 #define DUMMY_RELOC_LITUSE_ADDR (BFD_RELOC_UNUSED + 1)
139 #define DUMMY_RELOC_LITUSE_BASE (BFD_RELOC_UNUSED + 2)
140 #define DUMMY_RELOC_LITUSE_BYTOFF (BFD_RELOC_UNUSED + 3)
141 #define DUMMY_RELOC_LITUSE_JSR (BFD_RELOC_UNUSED + 4)
142 #define DUMMY_RELOC_LITUSE_TLSGD (BFD_RELOC_UNUSED + 5)
143 #define DUMMY_RELOC_LITUSE_TLSLDM (BFD_RELOC_UNUSED + 6)
145 #define USER_RELOC_P(R) ((R) >= O_literal && (R) <= O_tprel)
147 /* Macros for extracting the type and number of encoded register tokens. */
149 #define is_ir_num(x) (((x) & 32) == 0)
150 #define is_fpr_num(x) (((x) & 32) != 0)
151 #define regno(x) ((x) & 31)
153 /* Something odd inherited from the old assembler. */
155 #define note_gpreg(R) (alpha_gprmask |= (1 << (R)))
156 #define note_fpreg(R) (alpha_fprmask |= (1 << (R)))
158 /* Predicates for 16- and 32-bit ranges */
159 /* XXX: The non-shift version appears to trigger a compiler bug when
160 cross-assembling from x86 w/ gcc 2.7.2. */
163 #define range_signed_16(x) \
164 (((offsetT) (x) >> 15) == 0 || ((offsetT) (x) >> 15) == -1)
165 #define range_signed_32(x) \
166 (((offsetT) (x) >> 31) == 0 || ((offsetT) (x) >> 31) == -1)
168 #define range_signed_16(x) ((offsetT) (x) >= -(offsetT) 0x8000 && \
169 (offsetT) (x) <= (offsetT) 0x7FFF)
170 #define range_signed_32(x) ((offsetT) (x) >= -(offsetT) 0x80000000 && \
171 (offsetT) (x) <= (offsetT) 0x7FFFFFFF)
174 /* Macros for sign extending from 16- and 32-bits. */
175 /* XXX: The cast macros will work on all the systems that I care about,
176 but really a predicate should be found to use the non-cast forms. */
179 #define sign_extend_16(x) ((short) (x))
180 #define sign_extend_32(x) ((int) (x))
182 #define sign_extend_16(x) ((offsetT) (((x) & 0xFFFF) ^ 0x8000) - 0x8000)
183 #define sign_extend_32(x) ((offsetT) (((x) & 0xFFFFFFFF) \
184 ^ 0x80000000) - 0x80000000)
187 /* Macros to build tokens. */
189 #define set_tok_reg(t, r) (memset (&(t), 0, sizeof (t)), \
190 (t).X_op = O_register, \
191 (t).X_add_number = (r))
192 #define set_tok_preg(t, r) (memset (&(t), 0, sizeof (t)), \
193 (t).X_op = O_pregister, \
194 (t).X_add_number = (r))
195 #define set_tok_cpreg(t, r) (memset (&(t), 0, sizeof (t)), \
196 (t).X_op = O_cpregister, \
197 (t).X_add_number = (r))
198 #define set_tok_freg(t, r) (memset (&(t), 0, sizeof (t)), \
199 (t).X_op = O_register, \
200 (t).X_add_number = (r) + 32)
201 #define set_tok_sym(t, s, a) (memset (&(t), 0, sizeof (t)), \
202 (t).X_op = O_symbol, \
203 (t).X_add_symbol = (s), \
204 (t).X_add_number = (a))
205 #define set_tok_const(t, n) (memset (&(t), 0, sizeof (t)), \
206 (t).X_op = O_constant, \
207 (t).X_add_number = (n))
209 /* Prototypes for all local functions. */
211 static struct alpha_reloc_tag *get_alpha_reloc_tag PARAMS ((long));
212 static void alpha_adjust_relocs PARAMS ((bfd *, asection *, PTR));
214 static int tokenize_arguments PARAMS ((char *, expressionS *, int));
215 static const struct alpha_opcode *find_opcode_match
216 PARAMS ((const struct alpha_opcode *, const expressionS *, int *, int *));
217 static const struct alpha_macro *find_macro_match
218 PARAMS ((const struct alpha_macro *, const expressionS *, int *));
219 static unsigned insert_operand
220 PARAMS ((unsigned, const struct alpha_operand *, offsetT, char *, unsigned));
221 static void assemble_insn
222 PARAMS ((const struct alpha_opcode *, const expressionS *, int,
223 struct alpha_insn *, bfd_reloc_code_real_type));
224 static void emit_insn PARAMS ((struct alpha_insn *));
225 static void assemble_tokens_to_insn
226 PARAMS ((const char *, const expressionS *, int, struct alpha_insn *));
227 static void assemble_tokens
228 PARAMS ((const char *, const expressionS *, int, int));
230 static long load_expression
231 PARAMS ((int, const expressionS *, int *, expressionS *));
233 static void emit_ldgp PARAMS ((const expressionS *, int, const PTR));
234 static void emit_division PARAMS ((const expressionS *, int, const PTR));
235 static void emit_lda PARAMS ((const expressionS *, int, const PTR));
236 static void emit_ldah PARAMS ((const expressionS *, int, const PTR));
237 static void emit_ir_load PARAMS ((const expressionS *, int, const PTR));
238 static void emit_loadstore PARAMS ((const expressionS *, int, const PTR));
239 static void emit_jsrjmp PARAMS ((const expressionS *, int, const PTR));
240 static void emit_ldX PARAMS ((const expressionS *, int, const PTR));
241 static void emit_ldXu PARAMS ((const expressionS *, int, const PTR));
242 static void emit_uldX PARAMS ((const expressionS *, int, const PTR));
243 static void emit_uldXu PARAMS ((const expressionS *, int, const PTR));
244 static void emit_ldil PARAMS ((const expressionS *, int, const PTR));
245 static void emit_stX PARAMS ((const expressionS *, int, const PTR));
246 static void emit_ustX PARAMS ((const expressionS *, int, const PTR));
247 static void emit_sextX PARAMS ((const expressionS *, int, const PTR));
248 static void emit_retjcr PARAMS ((const expressionS *, int, const PTR));
250 static void s_alpha_text PARAMS ((int));
251 static void s_alpha_data PARAMS ((int));
253 static void s_alpha_comm PARAMS ((int));
254 static void s_alpha_rdata PARAMS ((int));
257 static void s_alpha_sdata PARAMS ((int));
260 static void s_alpha_section PARAMS ((int));
261 static void s_alpha_ent PARAMS ((int));
262 static void s_alpha_end PARAMS ((int));
263 static void s_alpha_mask PARAMS ((int));
264 static void s_alpha_frame PARAMS ((int));
265 static void s_alpha_prologue PARAMS ((int));
266 static void s_alpha_file PARAMS ((int));
267 static void s_alpha_loc PARAMS ((int));
268 static void s_alpha_stab PARAMS ((int));
269 static void s_alpha_coff_wrapper PARAMS ((int));
270 static void s_alpha_usepv PARAMS ((int));
273 static void s_alpha_section PARAMS ((int));
275 static void s_alpha_gprel32 PARAMS ((int));
276 static void s_alpha_float_cons PARAMS ((int));
277 static void s_alpha_proc PARAMS ((int));
278 static void s_alpha_set PARAMS ((int));
279 static void s_alpha_base PARAMS ((int));
280 static void s_alpha_align PARAMS ((int));
281 static void s_alpha_stringer PARAMS ((int));
282 static void s_alpha_space PARAMS ((int));
283 static void s_alpha_ucons PARAMS ((int));
284 static void s_alpha_arch PARAMS ((int));
286 static void create_literal_section PARAMS ((const char *, segT *, symbolS **));
288 static void select_gp_value PARAMS ((void));
290 static void alpha_align PARAMS ((int, char *, symbolS *, int));
292 /* Generic assembler global variables which must be defined by all
295 /* Characters which always start a comment. */
296 const char comment_chars[] = "#";
298 /* Characters which start a comment at the beginning of a line. */
299 const char line_comment_chars[] = "#";
301 /* Characters which may be used to separate multiple commands on a
303 const char line_separator_chars[] = ";";
305 /* Characters which are used to indicate an exponent in a floating
307 const char EXP_CHARS[] = "eE";
309 /* Characters which mean that a number is a floating point constant,
312 const char FLT_CHARS[] = "dD";
314 /* XXX: Do all of these really get used on the alpha?? */
315 char FLT_CHARS[] = "rRsSfFdDxXpP";
319 const char *md_shortopts = "Fm:g+1h:HG:";
321 const char *md_shortopts = "Fm:gG:";
324 struct option md_longopts[] =
326 #define OPTION_32ADDR (OPTION_MD_BASE)
327 { "32addr", no_argument, NULL, OPTION_32ADDR },
328 #define OPTION_RELAX (OPTION_32ADDR + 1)
329 { "relax", no_argument, NULL, OPTION_RELAX },
331 #define OPTION_MDEBUG (OPTION_RELAX + 1)
332 #define OPTION_NO_MDEBUG (OPTION_MDEBUG + 1)
333 { "mdebug", no_argument, NULL, OPTION_MDEBUG },
334 { "no-mdebug", no_argument, NULL, OPTION_NO_MDEBUG },
336 { NULL, no_argument, NULL, 0 }
339 size_t md_longopts_size = sizeof (md_longopts);
343 #define AXP_REG_R16 16
344 #define AXP_REG_R17 17
346 #define AXP_REG_T9 22
348 #define AXP_REG_T10 23
350 #define AXP_REG_T11 24
352 #define AXP_REG_T12 25
353 #define AXP_REG_AI 25
355 #define AXP_REG_FP 29
358 #define AXP_REG_GP AXP_REG_PV
359 #endif /* OBJ_EVAX */
361 /* The cpu for which we are generating code. */
362 static unsigned alpha_target = AXP_OPCODE_BASE;
363 static const char *alpha_target_name = "<all>";
365 /* The hash table of instruction opcodes. */
366 static struct hash_control *alpha_opcode_hash;
368 /* The hash table of macro opcodes. */
369 static struct hash_control *alpha_macro_hash;
372 /* The $gp relocation symbol. */
373 static symbolS *alpha_gp_symbol;
375 /* XXX: what is this, and why is it exported? */
376 valueT alpha_gp_value;
379 /* The current $gp register. */
380 static int alpha_gp_register = AXP_REG_GP;
382 /* A table of the register symbols. */
383 static symbolS *alpha_register_table[64];
385 /* Constant sections, or sections of constants. */
387 static segT alpha_lita_section;
390 static segT alpha_link_section;
391 static segT alpha_ctors_section;
392 static segT alpha_dtors_section;
394 static segT alpha_lit8_section;
396 /* Symbols referring to said sections. */
398 static symbolS *alpha_lita_symbol;
401 static symbolS *alpha_link_symbol;
402 static symbolS *alpha_ctors_symbol;
403 static symbolS *alpha_dtors_symbol;
405 static symbolS *alpha_lit8_symbol;
407 /* Literal for .litX+0x8000 within .lita. */
409 static offsetT alpha_lit8_literal;
412 /* Is the assembler not allowed to use $at? */
413 static int alpha_noat_on = 0;
415 /* Are macros enabled? */
416 static int alpha_macros_on = 1;
418 /* Are floats disabled? */
419 static int alpha_nofloats_on = 0;
421 /* Are addresses 32 bit? */
422 static int alpha_addr32_on = 0;
424 /* Symbol labelling the current insn. When the Alpha gas sees
427 and the section happens to not be on an eight byte boundary, it
428 will align both the symbol and the .quad to an eight byte boundary. */
429 static symbolS *alpha_insn_label;
431 /* Whether we should automatically align data generation pseudo-ops.
432 .align 0 will turn this off. */
433 static int alpha_auto_align_on = 1;
435 /* The known current alignment of the current section. */
436 static int alpha_current_align;
438 /* These are exported to ECOFF code. */
439 unsigned long alpha_gprmask, alpha_fprmask;
441 /* Whether the debugging option was seen. */
442 static int alpha_debug;
445 /* Whether we are emitting an mdebug section. */
446 int alpha_flag_mdebug = -1;
449 /* Don't fully resolve relocations, allowing code movement in the linker. */
450 static int alpha_flag_relax;
452 /* What value to give to bfd_set_gp_size. */
453 static int g_switch_value = 8;
456 /* Collect information about current procedure here. */
458 symbolS *symbol; /* proc pdesc symbol */
460 int framereg; /* register for frame pointer */
461 int framesize; /* size of frame */
471 static int alpha_flag_hash_long_names = 0; /* -+ */
472 static int alpha_flag_show_after_trunc = 0; /* -H */
474 /* If the -+ switch is given, then a hash is appended to any name that is
475 longer than 64 characters, else longer symbol names are truncated. */
480 /* A table to map the spelling of a relocation operand into an appropriate
481 bfd_reloc_code_real_type type. The table is assumed to be ordered such
482 that op-O_literal indexes into it. */
484 #define ALPHA_RELOC_TABLE(op) \
485 (&alpha_reloc_op[ ((!USER_RELOC_P (op)) \
487 : (int) (op) - (int) O_literal) ])
489 #define DEF(NAME, RELOC, REQ, ALLOW) \
490 { #NAME, sizeof(#NAME)-1, O_##NAME, RELOC, REQ, ALLOW}
492 static const struct alpha_reloc_op_tag
494 const char *name; /* string to lookup */
495 size_t length; /* size of the string */
496 operatorT op; /* which operator to use */
497 bfd_reloc_code_real_type reloc; /* relocation before frob */
498 unsigned int require_seq : 1; /* require a sequence number */
499 unsigned int allow_seq : 1; /* allow a sequence number */
503 DEF(literal, BFD_RELOC_ALPHA_ELF_LITERAL, 0, 1),
504 DEF(lituse_addr, DUMMY_RELOC_LITUSE_ADDR, 1, 1),
505 DEF(lituse_base, DUMMY_RELOC_LITUSE_BASE, 1, 1),
506 DEF(lituse_bytoff, DUMMY_RELOC_LITUSE_BYTOFF, 1, 1),
507 DEF(lituse_jsr, DUMMY_RELOC_LITUSE_JSR, 1, 1),
508 DEF(lituse_tlsgd, DUMMY_RELOC_LITUSE_TLSGD, 1, 1),
509 DEF(lituse_tlsldm, DUMMY_RELOC_LITUSE_TLSLDM, 1, 1),
510 DEF(gpdisp, BFD_RELOC_ALPHA_GPDISP, 1, 1),
511 DEF(gprelhigh, BFD_RELOC_ALPHA_GPREL_HI16, 0, 0),
512 DEF(gprellow, BFD_RELOC_ALPHA_GPREL_LO16, 0, 0),
513 DEF(gprel, BFD_RELOC_GPREL16, 0, 0),
514 DEF(samegp, BFD_RELOC_ALPHA_BRSGP, 0, 0),
515 DEF(tlsgd, BFD_RELOC_ALPHA_TLSGD, 0, 1),
516 DEF(tlsldm, BFD_RELOC_ALPHA_TLSLDM, 0, 1),
517 DEF(gotdtprel, BFD_RELOC_ALPHA_GOTDTPREL16, 0, 0),
518 DEF(dtprelhi, BFD_RELOC_ALPHA_DTPREL_HI16, 0, 0),
519 DEF(dtprello, BFD_RELOC_ALPHA_DTPREL_LO16, 0, 0),
520 DEF(dtprel, BFD_RELOC_ALPHA_DTPREL16, 0, 0),
521 DEF(gottprel, BFD_RELOC_ALPHA_GOTTPREL16, 0, 0),
522 DEF(tprelhi, BFD_RELOC_ALPHA_TPREL_HI16, 0, 0),
523 DEF(tprello, BFD_RELOC_ALPHA_TPREL_LO16, 0, 0),
524 DEF(tprel, BFD_RELOC_ALPHA_TPREL16, 0, 0),
529 static const int alpha_num_reloc_op
530 = sizeof (alpha_reloc_op) / sizeof (*alpha_reloc_op);
531 #endif /* RELOC_OP_P */
533 /* Maximum # digits needed to hold the largest sequence # */
534 #define ALPHA_RELOC_DIGITS 25
536 /* Structure to hold explicit sequence information. */
537 struct alpha_reloc_tag
539 fixS *master; /* the literal reloc */
540 fixS *slaves; /* head of linked list of lituses */
541 segT segment; /* segment relocs are in or undefined_section*/
542 long sequence; /* sequence # */
543 unsigned n_master; /* # of literals */
544 unsigned n_slaves; /* # of lituses */
545 unsigned saw_tlsgd : 1; /* true if ... */
546 unsigned saw_tlsldm : 1;
547 unsigned saw_lu_tlsgd : 1;
548 unsigned saw_lu_tlsldm : 1;
549 unsigned multi_section_p : 1; /* true if more than one section was used */
550 char string[1]; /* printable form of sequence to hash with */
553 /* Hash table to link up literals with the appropriate lituse */
554 static struct hash_control *alpha_literal_hash;
556 /* Sequence numbers for internal use by macros. */
557 static long next_sequence_num = -1;
559 /* A table of CPU names and opcode sets. */
561 static const struct cpu_type
568 /* Ad hoc convention: cpu number gets palcode, process code doesn't.
569 This supports usage under DU 4.0b that does ".arch ev4", and
570 usage in MILO that does -m21064. Probably something more
571 specific like -m21064-pal should be used, but oh well. */
573 { "21064", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
574 { "21064a", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
575 { "21066", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
576 { "21068", AXP_OPCODE_BASE|AXP_OPCODE_EV4 },
577 { "21164", AXP_OPCODE_BASE|AXP_OPCODE_EV5 },
578 { "21164a", AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX },
579 { "21164pc", (AXP_OPCODE_BASE|AXP_OPCODE_EV5|AXP_OPCODE_BWX
581 { "21264", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
582 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
583 { "21264a", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
584 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
585 { "21264b", (AXP_OPCODE_BASE|AXP_OPCODE_EV6|AXP_OPCODE_BWX
586 |AXP_OPCODE_MAX|AXP_OPCODE_CIX) },
588 { "ev4", AXP_OPCODE_BASE },
589 { "ev45", AXP_OPCODE_BASE },
590 { "lca45", AXP_OPCODE_BASE },
591 { "ev5", AXP_OPCODE_BASE },
592 { "ev56", AXP_OPCODE_BASE|AXP_OPCODE_BWX },
593 { "pca56", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX },
594 { "ev6", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
595 { "ev67", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
596 { "ev68", AXP_OPCODE_BASE|AXP_OPCODE_BWX|AXP_OPCODE_MAX|AXP_OPCODE_CIX },
598 { "all", AXP_OPCODE_BASE },
602 /* The macro table */
604 static const struct alpha_macro alpha_macros[] =
606 /* Load/Store macros */
607 { "lda", emit_lda, NULL,
608 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
609 { "ldah", emit_ldah, NULL,
610 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
612 { "ldl", emit_ir_load, "ldl",
613 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
614 { "ldl_l", emit_ir_load, "ldl_l",
615 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
616 { "ldq", emit_ir_load, "ldq",
617 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
618 { "ldq_l", emit_ir_load, "ldq_l",
619 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
620 { "ldq_u", emit_ir_load, "ldq_u",
621 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
622 { "ldf", emit_loadstore, "ldf",
623 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
624 { "ldg", emit_loadstore, "ldg",
625 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
626 { "lds", emit_loadstore, "lds",
627 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
628 { "ldt", emit_loadstore, "ldt",
629 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
631 { "ldb", emit_ldX, (PTR) 0,
632 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
633 { "ldbu", emit_ldXu, (PTR) 0,
634 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
635 { "ldw", emit_ldX, (PTR) 1,
636 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
637 { "ldwu", emit_ldXu, (PTR) 1,
638 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
640 { "uldw", emit_uldX, (PTR) 1,
641 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
642 { "uldwu", emit_uldXu, (PTR) 1,
643 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
644 { "uldl", emit_uldX, (PTR) 2,
645 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
646 { "uldlu", emit_uldXu, (PTR) 2,
647 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
648 { "uldq", emit_uldXu, (PTR) 3,
649 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
651 { "ldgp", emit_ldgp, NULL,
652 { MACRO_IR, MACRO_EXP, MACRO_PIR, MACRO_EOA } },
654 { "ldi", emit_lda, NULL,
655 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
656 { "ldil", emit_ldil, NULL,
657 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
658 { "ldiq", emit_lda, NULL,
659 { MACRO_IR, MACRO_EXP, MACRO_EOA } },
661 { "ldif" emit_ldiq, NULL,
662 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
663 { "ldid" emit_ldiq, NULL,
664 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
665 { "ldig" emit_ldiq, NULL,
666 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
667 { "ldis" emit_ldiq, NULL,
668 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
669 { "ldit" emit_ldiq, NULL,
670 { MACRO_FPR, MACRO_EXP, MACRO_EOA } },
673 { "stl", emit_loadstore, "stl",
674 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
675 { "stl_c", emit_loadstore, "stl_c",
676 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
677 { "stq", emit_loadstore, "stq",
678 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
679 { "stq_c", emit_loadstore, "stq_c",
680 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
681 { "stq_u", emit_loadstore, "stq_u",
682 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
683 { "stf", emit_loadstore, "stf",
684 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
685 { "stg", emit_loadstore, "stg",
686 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
687 { "sts", emit_loadstore, "sts",
688 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
689 { "stt", emit_loadstore, "stt",
690 { MACRO_FPR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
692 { "stb", emit_stX, (PTR) 0,
693 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
694 { "stw", emit_stX, (PTR) 1,
695 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
696 { "ustw", emit_ustX, (PTR) 1,
697 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
698 { "ustl", emit_ustX, (PTR) 2,
699 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
700 { "ustq", emit_ustX, (PTR) 3,
701 { MACRO_IR, MACRO_EXP, MACRO_OPIR, MACRO_EOA } },
703 /* Arithmetic macros */
705 { "absl" emit_absl, 1, { IR } },
706 { "absl" emit_absl, 2, { IR, IR } },
707 { "absl" emit_absl, 2, { EXP, IR } },
708 { "absq" emit_absq, 1, { IR } },
709 { "absq" emit_absq, 2, { IR, IR } },
710 { "absq" emit_absq, 2, { EXP, IR } },
713 { "sextb", emit_sextX, (PTR) 0,
714 { MACRO_IR, MACRO_IR, MACRO_EOA,
716 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
717 { "sextw", emit_sextX, (PTR) 1,
718 { MACRO_IR, MACRO_IR, MACRO_EOA,
720 /* MACRO_EXP, MACRO_IR, MACRO_EOA */ } },
722 { "divl", emit_division, "__divl",
723 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
724 MACRO_IR, MACRO_IR, MACRO_EOA,
725 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
726 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
727 { "divlu", emit_division, "__divlu",
728 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
729 MACRO_IR, MACRO_IR, MACRO_EOA,
730 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
731 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
732 { "divq", emit_division, "__divq",
733 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
734 MACRO_IR, MACRO_IR, MACRO_EOA,
735 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
736 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
737 { "divqu", emit_division, "__divqu",
738 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
739 MACRO_IR, MACRO_IR, MACRO_EOA,
740 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
741 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
742 { "reml", emit_division, "__reml",
743 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
744 MACRO_IR, MACRO_IR, MACRO_EOA,
745 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
746 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
747 { "remlu", emit_division, "__remlu",
748 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
749 MACRO_IR, MACRO_IR, MACRO_EOA,
750 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
751 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
752 { "remq", emit_division, "__remq",
753 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
754 MACRO_IR, MACRO_IR, MACRO_EOA,
755 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
756 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
757 { "remqu", emit_division, "__remqu",
758 { MACRO_IR, MACRO_IR, MACRO_IR, MACRO_EOA,
759 MACRO_IR, MACRO_IR, MACRO_EOA,
760 /* MACRO_IR, MACRO_EXP, MACRO_IR, MACRO_EOA,
761 MACRO_IR, MACRO_EXP, MACRO_EOA */ } },
763 { "jsr", emit_jsrjmp, "jsr",
764 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
765 MACRO_PIR, MACRO_EOA,
766 MACRO_IR, MACRO_EXP, MACRO_EOA,
767 MACRO_EXP, MACRO_EOA } },
768 { "jmp", emit_jsrjmp, "jmp",
769 { MACRO_PIR, MACRO_EXP, MACRO_EOA,
770 MACRO_PIR, MACRO_EOA,
771 MACRO_IR, MACRO_EXP, MACRO_EOA,
772 MACRO_EXP, MACRO_EOA } },
773 { "ret", emit_retjcr, "ret",
774 { MACRO_IR, MACRO_EXP, MACRO_EOA,
776 MACRO_PIR, MACRO_EXP, MACRO_EOA,
777 MACRO_PIR, MACRO_EOA,
778 MACRO_EXP, MACRO_EOA,
780 { "jcr", emit_retjcr, "jcr",
781 { MACRO_IR, MACRO_EXP, MACRO_EOA,
783 MACRO_PIR, MACRO_EXP, MACRO_EOA,
784 MACRO_PIR, MACRO_EOA,
785 MACRO_EXP, MACRO_EOA,
787 { "jsr_coroutine", emit_retjcr, "jcr",
788 { MACRO_IR, MACRO_EXP, MACRO_EOA,
790 MACRO_PIR, MACRO_EXP, MACRO_EOA,
791 MACRO_PIR, MACRO_EOA,
792 MACRO_EXP, MACRO_EOA,
796 static const unsigned int alpha_num_macros
797 = sizeof (alpha_macros) / sizeof (*alpha_macros);
799 /* Public interface functions */
801 /* This function is called once, at assembler startup time. It sets
802 up all the tables, etc. that the MD part of the assembler will
803 need, that can be determined before arguments are parsed. */
810 /* Verify that X_op field is wide enough. */
814 assert (e.X_op == O_max);
817 /* Create the opcode hash table. */
818 alpha_opcode_hash = hash_new ();
819 for (i = 0; i < alpha_num_opcodes;)
821 const char *name, *retval, *slash;
823 name = alpha_opcodes[i].name;
824 retval = hash_insert (alpha_opcode_hash, name, (PTR) &alpha_opcodes[i]);
826 as_fatal (_("internal error: can't hash opcode `%s': %s"),
829 /* Some opcodes include modifiers of various sorts with a "/mod"
830 syntax, like the architecture manual suggests. However, for
831 use with gcc at least, we also need access to those same opcodes
834 if ((slash = strchr (name, '/')) != NULL)
836 char *p = xmalloc (strlen (name));
837 memcpy (p, name, slash - name);
838 strcpy (p + (slash - name), slash + 1);
840 (void) hash_insert (alpha_opcode_hash, p, (PTR) &alpha_opcodes[i]);
841 /* Ignore failures -- the opcode table does duplicate some
842 variants in different forms, like "hw_stq" and "hw_st/q". */
845 while (++i < alpha_num_opcodes
846 && (alpha_opcodes[i].name == name
847 || !strcmp (alpha_opcodes[i].name, name)))
851 /* Create the macro hash table. */
852 alpha_macro_hash = hash_new ();
853 for (i = 0; i < alpha_num_macros;)
855 const char *name, *retval;
857 name = alpha_macros[i].name;
858 retval = hash_insert (alpha_macro_hash, name, (PTR) &alpha_macros[i]);
860 as_fatal (_("internal error: can't hash macro `%s': %s"),
863 while (++i < alpha_num_macros
864 && (alpha_macros[i].name == name
865 || !strcmp (alpha_macros[i].name, name)))
869 /* Construct symbols for each of the registers. */
870 for (i = 0; i < 32; ++i)
874 sprintf (name, "$%d", i);
875 alpha_register_table[i] = symbol_create (name, reg_section, i,
882 sprintf (name, "$f%d", i - 32);
883 alpha_register_table[i] = symbol_create (name, reg_section, i,
887 /* Create the special symbols and sections we'll be using. */
889 /* So .sbss will get used for tiny objects. */
890 bfd_set_gp_size (stdoutput, g_switch_value);
893 create_literal_section (".lita", &alpha_lita_section, &alpha_lita_symbol);
895 /* For handling the GP, create a symbol that won't be output in the
896 symbol table. We'll edit it out of relocs later. */
897 alpha_gp_symbol = symbol_create ("<GP value>", alpha_lita_section, 0x8000,
902 create_literal_section (".link", &alpha_link_section, &alpha_link_symbol);
908 segT sec = subseg_new (".mdebug", (subsegT) 0);
909 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
910 bfd_set_section_alignment (stdoutput, sec, 3);
914 /* Create literal lookup hash table. */
915 alpha_literal_hash = hash_new ();
917 subseg_set (text_section, 0);
920 /* The public interface to the instruction assembler. */
926 char opname[32]; /* Current maximum is 13. */
927 expressionS tok[MAX_INSN_ARGS];
931 /* Split off the opcode. */
932 opnamelen = strspn (str, "abcdefghijklmnopqrstuvwxyz_/46819");
933 trunclen = (opnamelen < sizeof (opname) - 1
935 : sizeof (opname) - 1);
936 memcpy (opname, str, trunclen);
937 opname[trunclen] = '\0';
939 /* Tokenize the rest of the line. */
940 if ((ntok = tokenize_arguments (str + opnamelen, tok, MAX_INSN_ARGS)) < 0)
942 if (ntok != TOKENIZE_ERROR_REPORT)
943 as_bad (_("syntax error"));
949 assemble_tokens (opname, tok, ntok, alpha_macros_on);
952 /* Round up a section's size to the appropriate boundary. */
955 md_section_align (seg, size)
959 int align = bfd_get_section_alignment (stdoutput, seg);
960 valueT mask = ((valueT) 1 << align) - 1;
962 return (size + mask) & ~mask;
965 /* Turn a string in input_line_pointer into a floating point constant
966 of type TYPE, and store the appropriate bytes in *LITP. The number
967 of LITTLENUMS emitted is stored in *SIZEP. An error message is
968 returned, or NULL on OK. */
970 /* Equal to MAX_PRECISION in atof-ieee.c. */
971 #define MAX_LITTLENUMS 6
973 extern char *vax_md_atof PARAMS ((int, char *, int *));
976 md_atof (type, litP, sizeP)
982 LITTLENUM_TYPE words[MAX_LITTLENUMS];
983 LITTLENUM_TYPE *wordP;
990 /* VAX md_atof doesn't like "G" for some reason. */
994 return vax_md_atof (type, litP, sizeP);
1017 return _("Bad call to MD_ATOF()");
1019 t = atof_ieee (input_line_pointer, type, words);
1021 input_line_pointer = t;
1022 *sizeP = prec * sizeof (LITTLENUM_TYPE);
1024 for (wordP = words + prec - 1; prec--;)
1026 md_number_to_chars (litP, (long) (*wordP--), sizeof (LITTLENUM_TYPE));
1027 litP += sizeof (LITTLENUM_TYPE);
1033 /* Take care of the target-specific command-line options. */
1036 md_parse_option (c, arg)
1043 alpha_nofloats_on = 1;
1047 alpha_addr32_on = 1;
1055 g_switch_value = atoi (arg);
1060 const struct cpu_type *p;
1061 for (p = cpu_types; p->name; ++p)
1062 if (strcmp (arg, p->name) == 0)
1064 alpha_target_name = p->name, alpha_target = p->flags;
1067 as_warn (_("Unknown CPU identifier `%s'"), arg);
1073 case '+': /* For g++. Hash any name > 63 chars long. */
1074 alpha_flag_hash_long_names = 1;
1077 case 'H': /* Show new symbol after hash truncation */
1078 alpha_flag_show_after_trunc = 1;
1081 case 'h': /* for gnu-c/vax compatibility. */
1086 alpha_flag_relax = 1;
1091 alpha_flag_mdebug = 1;
1093 case OPTION_NO_MDEBUG:
1094 alpha_flag_mdebug = 0;
1105 /* Print a description of the command-line options that we accept. */
1108 md_show_usage (stream)
1113 -32addr treat addresses as 32-bit values\n\
1114 -F lack floating point instructions support\n\
1115 -mev4 | -mev45 | -mev5 | -mev56 | -mpca56 | -mev6 | -mev67 | -mev68 | -mall\n\
1116 specify variant of Alpha architecture\n\
1117 -m21064 | -m21066 | -m21164 | -m21164a | -m21164pc | -m21264 | -m21264a | -m21264b\n\
1118 these variants include PALcode opcodes\n"),
1123 -+ hash encode (don't truncate) names longer than 64 characters\n\
1124 -H show new symbol after hash truncation\n"),
1129 /* Decide from what point a pc-relative relocation is relative to,
1130 relative to the pc-relative fixup. Er, relatively speaking. */
1133 md_pcrel_from (fixP)
1136 valueT addr = fixP->fx_where + fixP->fx_frag->fr_address;
1137 switch (fixP->fx_r_type)
1139 case BFD_RELOC_23_PCREL_S2:
1140 case BFD_RELOC_ALPHA_HINT:
1141 case BFD_RELOC_ALPHA_BRSGP:
1148 /* Attempt to simplify or even eliminate a fixup. The return value is
1149 ignored; perhaps it was once meaningful, but now it is historical.
1150 To indicate that a fixup has been eliminated, set fixP->fx_done.
1152 For ELF, here it is that we transform the GPDISP_HI16 reloc we used
1153 internally into the GPDISP reloc used externally. We had to do
1154 this so that we'd have the GPDISP_LO16 reloc as a tag to compute
1155 the distance to the "lda" instruction for setting the addend to
1159 md_apply_fix3 (fixP, valP, seg)
1164 char * const fixpos = fixP->fx_frag->fr_literal + fixP->fx_where;
1165 valueT value = * valP;
1166 unsigned image, size;
1168 switch (fixP->fx_r_type)
1170 /* The GPDISP relocations are processed internally with a symbol
1171 referring to the current function's section; we need to drop
1172 in a value which, when added to the address of the start of
1173 the function, gives the desired GP. */
1174 case BFD_RELOC_ALPHA_GPDISP_HI16:
1176 fixS *next = fixP->fx_next;
1178 /* With user-specified !gpdisp relocations, we can be missing
1179 the matching LO16 reloc. We will have already issued an
1182 fixP->fx_offset = (next->fx_frag->fr_address + next->fx_where
1183 - fixP->fx_frag->fr_address - fixP->fx_where);
1185 value = (value - sign_extend_16 (value)) >> 16;
1188 fixP->fx_r_type = BFD_RELOC_ALPHA_GPDISP;
1192 case BFD_RELOC_ALPHA_GPDISP_LO16:
1193 value = sign_extend_16 (value);
1194 fixP->fx_offset = 0;
1200 fixP->fx_addsy = section_symbol (seg);
1201 md_number_to_chars (fixpos, value, 2);
1206 fixP->fx_r_type = BFD_RELOC_16_PCREL;
1211 fixP->fx_r_type = BFD_RELOC_32_PCREL;
1216 fixP->fx_r_type = BFD_RELOC_64_PCREL;
1219 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1221 md_number_to_chars (fixpos, value, size);
1227 case BFD_RELOC_GPREL32:
1228 assert (fixP->fx_subsy == alpha_gp_symbol);
1230 /* FIXME: inherited this obliviousness of `value' -- why? */
1231 md_number_to_chars (fixpos, -alpha_gp_value, 4);
1234 case BFD_RELOC_GPREL32:
1236 case BFD_RELOC_GPREL16:
1237 case BFD_RELOC_ALPHA_GPREL_HI16:
1238 case BFD_RELOC_ALPHA_GPREL_LO16:
1241 case BFD_RELOC_23_PCREL_S2:
1242 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1244 image = bfd_getl32 (fixpos);
1245 image = (image & ~0x1FFFFF) | ((value >> 2) & 0x1FFFFF);
1250 case BFD_RELOC_ALPHA_HINT:
1251 if (fixP->fx_pcrel == 0 && fixP->fx_addsy == 0)
1253 image = bfd_getl32 (fixpos);
1254 image = (image & ~0x3FFF) | ((value >> 2) & 0x3FFF);
1260 case BFD_RELOC_ALPHA_BRSGP:
1263 case BFD_RELOC_ALPHA_TLSGD:
1264 case BFD_RELOC_ALPHA_TLSLDM:
1265 case BFD_RELOC_ALPHA_GOTDTPREL16:
1266 case BFD_RELOC_ALPHA_DTPREL_HI16:
1267 case BFD_RELOC_ALPHA_DTPREL_LO16:
1268 case BFD_RELOC_ALPHA_DTPREL16:
1269 case BFD_RELOC_ALPHA_GOTTPREL16:
1270 case BFD_RELOC_ALPHA_TPREL_HI16:
1271 case BFD_RELOC_ALPHA_TPREL_LO16:
1272 case BFD_RELOC_ALPHA_TPREL16:
1274 S_SET_THREAD_LOCAL (fixP->fx_addsy);
1279 case BFD_RELOC_ALPHA_LITERAL:
1280 md_number_to_chars (fixpos, value, 2);
1283 case BFD_RELOC_ALPHA_ELF_LITERAL:
1284 case BFD_RELOC_ALPHA_LITUSE:
1285 case BFD_RELOC_ALPHA_LINKAGE:
1286 case BFD_RELOC_ALPHA_CODEADDR:
1289 case BFD_RELOC_VTABLE_INHERIT:
1290 case BFD_RELOC_VTABLE_ENTRY:
1295 const struct alpha_operand *operand;
1297 if ((int) fixP->fx_r_type >= 0)
1298 as_fatal (_("unhandled relocation type %s"),
1299 bfd_get_reloc_code_name (fixP->fx_r_type));
1301 assert (-(int) fixP->fx_r_type < (int) alpha_num_operands);
1302 operand = &alpha_operands[-(int) fixP->fx_r_type];
1304 /* The rest of these fixups only exist internally during symbol
1305 resolution and have no representation in the object file.
1306 Therefore they must be completely resolved as constants. */
1308 if (fixP->fx_addsy != 0
1309 && S_GET_SEGMENT (fixP->fx_addsy) != absolute_section)
1310 as_bad_where (fixP->fx_file, fixP->fx_line,
1311 _("non-absolute expression in constant field"));
1313 image = bfd_getl32 (fixpos);
1314 image = insert_operand (image, operand, (offsetT) value,
1315 fixP->fx_file, fixP->fx_line);
1320 if (fixP->fx_addsy != 0 || fixP->fx_pcrel != 0)
1324 as_warn_where (fixP->fx_file, fixP->fx_line,
1325 _("type %d reloc done?\n"), (int) fixP->fx_r_type);
1330 md_number_to_chars (fixpos, image, 4);
1336 /* Look for a register name in the given symbol. */
1339 md_undefined_symbol (name)
1344 int is_float = 0, num;
1349 if (name[1] == 'p' && name[2] == '\0')
1350 return alpha_register_table[AXP_REG_FP];
1355 if (!ISDIGIT (*++name))
1359 case '0': case '1': case '2': case '3': case '4':
1360 case '5': case '6': case '7': case '8': case '9':
1361 if (name[1] == '\0')
1362 num = name[0] - '0';
1363 else if (name[0] != '0' && ISDIGIT (name[1]) && name[2] == '\0')
1365 num = (name[0] - '0') * 10 + name[1] - '0';
1372 if (!alpha_noat_on && (num + is_float) == AXP_REG_AT)
1373 as_warn (_("Used $at without \".set noat\""));
1374 return alpha_register_table[num + is_float];
1377 if (name[1] == 't' && name[2] == '\0')
1380 as_warn (_("Used $at without \".set noat\""));
1381 return alpha_register_table[AXP_REG_AT];
1386 if (name[1] == 'p' && name[2] == '\0')
1387 return alpha_register_table[alpha_gp_register];
1391 if (name[1] == 'p' && name[2] == '\0')
1392 return alpha_register_table[AXP_REG_SP];
1400 /* @@@ Magic ECOFF bits. */
1403 alpha_frob_ecoff_data ()
1406 /* $zero and $f31 are read-only */
1407 alpha_gprmask &= ~1;
1408 alpha_fprmask &= ~1;
1412 /* Hook to remember a recently defined label so that the auto-align
1413 code can adjust the symbol after we know what alignment will be
1417 alpha_define_label (sym)
1420 alpha_insn_label = sym;
1423 /* Return true if we must always emit a reloc for a type and false if
1424 there is some hope of resolving it at assembly time. */
1427 alpha_force_relocation (f)
1430 if (alpha_flag_relax)
1433 switch (f->fx_r_type)
1435 case BFD_RELOC_ALPHA_GPDISP_HI16:
1436 case BFD_RELOC_ALPHA_GPDISP_LO16:
1437 case BFD_RELOC_ALPHA_GPDISP:
1438 case BFD_RELOC_ALPHA_LITERAL:
1439 case BFD_RELOC_ALPHA_ELF_LITERAL:
1440 case BFD_RELOC_ALPHA_LITUSE:
1441 case BFD_RELOC_GPREL16:
1442 case BFD_RELOC_GPREL32:
1443 case BFD_RELOC_ALPHA_GPREL_HI16:
1444 case BFD_RELOC_ALPHA_GPREL_LO16:
1445 case BFD_RELOC_ALPHA_LINKAGE:
1446 case BFD_RELOC_ALPHA_CODEADDR:
1447 case BFD_RELOC_ALPHA_BRSGP:
1448 case BFD_RELOC_ALPHA_TLSGD:
1449 case BFD_RELOC_ALPHA_TLSLDM:
1450 case BFD_RELOC_ALPHA_GOTDTPREL16:
1451 case BFD_RELOC_ALPHA_DTPREL_HI16:
1452 case BFD_RELOC_ALPHA_DTPREL_LO16:
1453 case BFD_RELOC_ALPHA_DTPREL16:
1454 case BFD_RELOC_ALPHA_GOTTPREL16:
1455 case BFD_RELOC_ALPHA_TPREL_HI16:
1456 case BFD_RELOC_ALPHA_TPREL_LO16:
1457 case BFD_RELOC_ALPHA_TPREL16:
1464 return generic_force_reloc (f);
1467 /* Return true if we can partially resolve a relocation now. */
1470 alpha_fix_adjustable (f)
1473 /* Are there any relocation types for which we must generate a reloc
1474 but we can adjust the values contained within it? */
1475 switch (f->fx_r_type)
1477 case BFD_RELOC_ALPHA_GPDISP_HI16:
1478 case BFD_RELOC_ALPHA_GPDISP_LO16:
1479 case BFD_RELOC_ALPHA_GPDISP:
1482 case BFD_RELOC_ALPHA_LITERAL:
1483 case BFD_RELOC_ALPHA_ELF_LITERAL:
1484 case BFD_RELOC_ALPHA_LITUSE:
1485 case BFD_RELOC_ALPHA_LINKAGE:
1486 case BFD_RELOC_ALPHA_CODEADDR:
1489 case BFD_RELOC_VTABLE_ENTRY:
1490 case BFD_RELOC_VTABLE_INHERIT:
1493 case BFD_RELOC_GPREL16:
1494 case BFD_RELOC_GPREL32:
1495 case BFD_RELOC_ALPHA_GPREL_HI16:
1496 case BFD_RELOC_ALPHA_GPREL_LO16:
1497 case BFD_RELOC_23_PCREL_S2:
1500 case BFD_RELOC_ALPHA_HINT:
1503 case BFD_RELOC_ALPHA_TLSGD:
1504 case BFD_RELOC_ALPHA_TLSLDM:
1505 case BFD_RELOC_ALPHA_GOTDTPREL16:
1506 case BFD_RELOC_ALPHA_DTPREL_HI16:
1507 case BFD_RELOC_ALPHA_DTPREL_LO16:
1508 case BFD_RELOC_ALPHA_DTPREL16:
1509 case BFD_RELOC_ALPHA_GOTTPREL16:
1510 case BFD_RELOC_ALPHA_TPREL_HI16:
1511 case BFD_RELOC_ALPHA_TPREL_LO16:
1512 case BFD_RELOC_ALPHA_TPREL16:
1513 /* ??? No idea why we can't return a reference to .tbss+10, but
1514 we're preventing this in the other assemblers. Follow for now. */
1518 case BFD_RELOC_ALPHA_BRSGP:
1519 /* If we have a BRSGP reloc to a local symbol, adjust it to BRADDR and
1520 let it get resolved at assembly time. */
1522 symbolS *sym = f->fx_addsy;
1526 if (generic_force_reloc (f))
1529 switch (S_GET_OTHER (sym) & STO_ALPHA_STD_GPLOAD)
1531 case STO_ALPHA_NOPV:
1533 case STO_ALPHA_STD_GPLOAD:
1537 if (S_IS_LOCAL (sym))
1540 name = S_GET_NAME (sym);
1541 as_bad_where (f->fx_file, f->fx_line,
1542 _("!samegp reloc against symbol without .prologue: %s"),
1546 f->fx_r_type = BFD_RELOC_23_PCREL_S2;
1547 f->fx_offset += offset;
1558 /* Generate the BFD reloc to be stuck in the object file from the
1559 fixup used internally in the assembler. */
1562 tc_gen_reloc (sec, fixp)
1563 asection *sec ATTRIBUTE_UNUSED;
1568 reloc = (arelent *) xmalloc (sizeof (arelent));
1569 reloc->sym_ptr_ptr = (asymbol **) xmalloc (sizeof (asymbol *));
1570 *reloc->sym_ptr_ptr = symbol_get_bfdsym (fixp->fx_addsy);
1571 reloc->address = fixp->fx_frag->fr_address + fixp->fx_where;
1573 /* Make sure none of our internal relocations make it this far.
1574 They'd better have been fully resolved by this point. */
1575 assert ((int) fixp->fx_r_type > 0);
1577 reloc->howto = bfd_reloc_type_lookup (stdoutput, fixp->fx_r_type);
1578 if (reloc->howto == NULL)
1580 as_bad_where (fixp->fx_file, fixp->fx_line,
1581 _("cannot represent `%s' relocation in object file"),
1582 bfd_get_reloc_code_name (fixp->fx_r_type));
1586 if (!fixp->fx_pcrel != !reloc->howto->pc_relative)
1588 as_fatal (_("internal error? cannot generate `%s' relocation"),
1589 bfd_get_reloc_code_name (fixp->fx_r_type));
1591 assert (!fixp->fx_pcrel == !reloc->howto->pc_relative);
1594 if (fixp->fx_r_type == BFD_RELOC_ALPHA_LITERAL)
1596 /* Fake out bfd_perform_relocation. sigh. */
1597 reloc->addend = -alpha_gp_value;
1602 reloc->addend = fixp->fx_offset;
1604 /* Ohhh, this is ugly. The problem is that if this is a local global
1605 symbol, the relocation will entirely be performed at link time, not
1606 at assembly time. bfd_perform_reloc doesn't know about this sort
1607 of thing, and as a result we need to fake it out here. */
1608 if ((S_IS_EXTERN (fixp->fx_addsy) || S_IS_WEAK (fixp->fx_addsy)
1609 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_MERGE)
1610 || (S_GET_SEGMENT (fixp->fx_addsy)->flags & SEC_THREAD_LOCAL))
1611 && !S_IS_COMMON (fixp->fx_addsy))
1612 reloc->addend -= symbol_get_bfdsym (fixp->fx_addsy)->value;
1619 /* Parse a register name off of the input_line and return a register
1620 number. Gets md_undefined_symbol above to do the register name
1623 Only called as a part of processing the ECOFF .frame directive. */
1626 tc_get_register (frame)
1627 int frame ATTRIBUTE_UNUSED;
1629 int framereg = AXP_REG_SP;
1632 if (*input_line_pointer == '$')
1634 char *s = input_line_pointer;
1635 char c = get_symbol_end ();
1636 symbolS *sym = md_undefined_symbol (s);
1638 *strchr (s, '\0') = c;
1639 if (sym && (framereg = S_GET_VALUE (sym)) <= 31)
1642 as_warn (_("frame reg expected, using $%d."), framereg);
1645 note_gpreg (framereg);
1649 /* This is called before the symbol table is processed. In order to
1650 work with gcc when using mips-tfile, we must keep all local labels.
1651 However, in other cases, we want to discard them. If we were
1652 called with -g, but we didn't see any debugging information, it may
1653 mean that gcc is smuggling debugging information through to
1654 mips-tfile, in which case we must generate all local labels. */
1659 alpha_frob_file_before_adjust ()
1661 if (alpha_debug != 0
1662 && ! ecoff_debugging_seen)
1663 flag_keep_locals = 1;
1666 #endif /* OBJ_ECOFF */
1668 static struct alpha_reloc_tag *
1669 get_alpha_reloc_tag (sequence)
1672 char buffer[ALPHA_RELOC_DIGITS];
1673 struct alpha_reloc_tag *info;
1675 sprintf (buffer, "!%ld", sequence);
1677 info = (struct alpha_reloc_tag *) hash_find (alpha_literal_hash, buffer);
1680 size_t len = strlen (buffer);
1683 info = (struct alpha_reloc_tag *)
1684 xcalloc (sizeof (struct alpha_reloc_tag) + len, 1);
1686 info->segment = now_seg;
1687 info->sequence = sequence;
1688 strcpy (info->string, buffer);
1689 errmsg = hash_insert (alpha_literal_hash, info->string, (PTR) info);
1697 /* Before the relocations are written, reorder them, so that user
1698 supplied !lituse relocations follow the appropriate !literal
1699 relocations, and similarly for !gpdisp relocations. */
1704 if (alpha_literal_hash)
1705 bfd_map_over_sections (stdoutput, alpha_adjust_relocs, NULL);
1709 alpha_adjust_relocs (abfd, sec, ptr)
1710 bfd *abfd ATTRIBUTE_UNUSED;
1712 PTR ptr ATTRIBUTE_UNUSED;
1714 segment_info_type *seginfo = seg_info (sec);
1720 /* If seginfo is NULL, we did not create this section; don't do
1721 anything with it. By using a pointer to a pointer, we can update
1722 the links in place. */
1723 if (seginfo == NULL)
1726 /* If there are no relocations, skip the section. */
1727 if (! seginfo->fix_root)
1730 /* First rebuild the fixup chain without the explicit lituse and
1731 gpdisp_lo16 relocs. */
1732 prevP = &seginfo->fix_root;
1733 for (fixp = seginfo->fix_root; fixp; fixp = next)
1735 next = fixp->fx_next;
1736 fixp->fx_next = (fixS *) 0;
1738 switch (fixp->fx_r_type)
1740 case BFD_RELOC_ALPHA_LITUSE:
1741 if (fixp->tc_fix_data.info->n_master == 0)
1742 as_bad_where (fixp->fx_file, fixp->fx_line,
1743 _("No !literal!%ld was found"),
1744 fixp->tc_fix_data.info->sequence);
1746 if (fixp->fx_offset == LITUSE_ALPHA_TLSGD)
1748 if (! fixp->tc_fix_data.info->saw_tlsgd)
1749 as_bad_where (fixp->fx_file, fixp->fx_line,
1750 _("No !tlsgd!%ld was found"),
1751 fixp->tc_fix_data.info->sequence);
1753 else if (fixp->fx_offset == LITUSE_ALPHA_TLSLDM)
1755 if (! fixp->tc_fix_data.info->saw_tlsldm)
1756 as_bad_where (fixp->fx_file, fixp->fx_line,
1757 _("No !tlsldm!%ld was found"),
1758 fixp->tc_fix_data.info->sequence);
1763 case BFD_RELOC_ALPHA_GPDISP_LO16:
1764 if (fixp->tc_fix_data.info->n_master == 0)
1765 as_bad_where (fixp->fx_file, fixp->fx_line,
1766 _("No ldah !gpdisp!%ld was found"),
1767 fixp->tc_fix_data.info->sequence);
1770 case BFD_RELOC_ALPHA_ELF_LITERAL:
1771 if (fixp->tc_fix_data.info
1772 && (fixp->tc_fix_data.info->saw_tlsgd
1773 || fixp->tc_fix_data.info->saw_tlsldm))
1779 prevP = &fixp->fx_next;
1784 /* Go back and re-chain dependent relocations. They are currently
1785 linked through the next_reloc field in reverse order, so as we
1786 go through the next_reloc chain, we effectively reverse the chain
1789 Except if there is more than one !literal for a given sequence
1790 number. In that case, the programmer and/or compiler is not sure
1791 how control flows from literal to lituse, and we can't be sure to
1792 get the relaxation correct.
1794 ??? Well, actually we could, if there are enough lituses such that
1795 we can make each literal have at least one of each lituse type
1796 present. Not implemented.
1798 Also suppress the optimization if the !literals/!lituses are spread
1799 in different segments. This can happen with "intersting" uses of
1800 inline assembly; examples are present in the Linux kernel semaphores. */
1802 for (fixp = seginfo->fix_root; fixp; fixp = next)
1804 next = fixp->fx_next;
1805 switch (fixp->fx_r_type)
1807 case BFD_RELOC_ALPHA_TLSGD:
1808 case BFD_RELOC_ALPHA_TLSLDM:
1809 if (!fixp->tc_fix_data.info)
1811 if (fixp->tc_fix_data.info->n_master == 0)
1813 else if (fixp->tc_fix_data.info->n_master > 1)
1815 as_bad_where (fixp->fx_file, fixp->fx_line,
1816 _("too many !literal!%ld for %s"),
1817 fixp->tc_fix_data.info->sequence,
1818 (fixp->fx_r_type == BFD_RELOC_ALPHA_TLSGD
1819 ? "!tlsgd" : "!tlsldm"));
1823 fixp->tc_fix_data.info->master->fx_next = fixp->fx_next;
1824 fixp->fx_next = fixp->tc_fix_data.info->master;
1825 fixp = fixp->fx_next;
1828 case BFD_RELOC_ALPHA_ELF_LITERAL:
1829 if (fixp->tc_fix_data.info
1830 && fixp->tc_fix_data.info->n_master == 1
1831 && ! fixp->tc_fix_data.info->multi_section_p)
1833 for (slave = fixp->tc_fix_data.info->slaves;
1834 slave != (fixS *) 0;
1835 slave = slave->tc_fix_data.next_reloc)
1837 slave->fx_next = fixp->fx_next;
1838 fixp->fx_next = slave;
1843 case BFD_RELOC_ALPHA_GPDISP_HI16:
1844 if (fixp->tc_fix_data.info->n_slaves == 0)
1845 as_bad_where (fixp->fx_file, fixp->fx_line,
1846 _("No lda !gpdisp!%ld was found"),
1847 fixp->tc_fix_data.info->sequence);
1850 slave = fixp->tc_fix_data.info->slaves;
1851 slave->fx_next = next;
1852 fixp->fx_next = slave;
1864 debug_exp (tok, ntok)
1870 fprintf (stderr, "debug_exp: %d tokens", ntok);
1871 for (i = 0; i < ntok; i++)
1873 expressionS *t = &tok[i];
1878 default: name = "unknown"; break;
1879 case O_illegal: name = "O_illegal"; break;
1880 case O_absent: name = "O_absent"; break;
1881 case O_constant: name = "O_constant"; break;
1882 case O_symbol: name = "O_symbol"; break;
1883 case O_symbol_rva: name = "O_symbol_rva"; break;
1884 case O_register: name = "O_register"; break;
1885 case O_big: name = "O_big"; break;
1886 case O_uminus: name = "O_uminus"; break;
1887 case O_bit_not: name = "O_bit_not"; break;
1888 case O_logical_not: name = "O_logical_not"; break;
1889 case O_multiply: name = "O_multiply"; break;
1890 case O_divide: name = "O_divide"; break;
1891 case O_modulus: name = "O_modulus"; break;
1892 case O_left_shift: name = "O_left_shift"; break;
1893 case O_right_shift: name = "O_right_shift"; break;
1894 case O_bit_inclusive_or: name = "O_bit_inclusive_or"; break;
1895 case O_bit_or_not: name = "O_bit_or_not"; break;
1896 case O_bit_exclusive_or: name = "O_bit_exclusive_or"; break;
1897 case O_bit_and: name = "O_bit_and"; break;
1898 case O_add: name = "O_add"; break;
1899 case O_subtract: name = "O_subtract"; break;
1900 case O_eq: name = "O_eq"; break;
1901 case O_ne: name = "O_ne"; break;
1902 case O_lt: name = "O_lt"; break;
1903 case O_le: name = "O_le"; break;
1904 case O_ge: name = "O_ge"; break;
1905 case O_gt: name = "O_gt"; break;
1906 case O_logical_and: name = "O_logical_and"; break;
1907 case O_logical_or: name = "O_logical_or"; break;
1908 case O_index: name = "O_index"; break;
1909 case O_pregister: name = "O_pregister"; break;
1910 case O_cpregister: name = "O_cpregister"; break;
1911 case O_literal: name = "O_literal"; break;
1912 case O_lituse_addr: name = "O_lituse_addr"; break;
1913 case O_lituse_base: name = "O_lituse_base"; break;
1914 case O_lituse_bytoff: name = "O_lituse_bytoff"; break;
1915 case O_lituse_jsr: name = "O_lituse_jsr"; break;
1916 case O_lituse_tlsgd: name = "O_lituse_tlsgd"; break;
1917 case O_lituse_tlsldm: name = "O_lituse_tlsldm"; break;
1918 case O_gpdisp: name = "O_gpdisp"; break;
1919 case O_gprelhigh: name = "O_gprelhigh"; break;
1920 case O_gprellow: name = "O_gprellow"; break;
1921 case O_gprel: name = "O_gprel"; break;
1922 case O_samegp: name = "O_samegp"; break;
1923 case O_tlsgd: name = "O_tlsgd"; break;
1924 case O_tlsldm: name = "O_tlsldm"; break;
1925 case O_gotdtprel: name = "O_gotdtprel"; break;
1926 case O_dtprelhi: name = "O_dtprelhi"; break;
1927 case O_dtprello: name = "O_dtprello"; break;
1928 case O_dtprel: name = "O_dtprel"; break;
1929 case O_gottprel: name = "O_gottprel"; break;
1930 case O_tprelhi: name = "O_tprelhi"; break;
1931 case O_tprello: name = "O_tprello"; break;
1932 case O_tprel: name = "O_tprel"; break;
1935 fprintf (stderr, ", %s(%s, %s, %d)", name,
1936 (t->X_add_symbol) ? S_GET_NAME (t->X_add_symbol) : "--",
1937 (t->X_op_symbol) ? S_GET_NAME (t->X_op_symbol) : "--",
1938 (int) t->X_add_number);
1940 fprintf (stderr, "\n");
1945 /* Parse the arguments to an opcode. */
1948 tokenize_arguments (str, tok, ntok)
1953 expressionS *end_tok = tok + ntok;
1954 char *old_input_line_pointer;
1955 int saw_comma = 0, saw_arg = 0;
1957 expressionS *orig_tok = tok;
1961 const struct alpha_reloc_op_tag *r;
1964 int reloc_found_p = 0;
1967 memset (tok, 0, sizeof (*tok) * ntok);
1969 /* Save and restore input_line_pointer around this function. */
1970 old_input_line_pointer = input_line_pointer;
1971 input_line_pointer = str;
1974 /* ??? Wrest control of ! away from the regular expression parser. */
1975 is_end_of_line[(unsigned char) '!'] = 1;
1978 while (tok < end_tok && *input_line_pointer)
1981 switch (*input_line_pointer)
1988 /* A relocation operand can be placed after the normal operand on an
1989 assembly language statement, and has the following form:
1990 !relocation_type!sequence_number. */
1993 /* Only support one relocation op per insn. */
1994 as_bad (_("More than one relocation op per insn"));
2001 ++input_line_pointer;
2003 p = input_line_pointer;
2004 c = get_symbol_end ();
2006 /* Parse !relocation_type. */
2007 len = input_line_pointer - p;
2010 as_bad (_("No relocation operand"));
2014 r = &alpha_reloc_op[0];
2015 for (i = alpha_num_reloc_op - 1; i >= 0; i--, r++)
2016 if (len == r->length && memcmp (p, r->name, len) == 0)
2020 as_bad (_("Unknown relocation operand: !%s"), p);
2024 *input_line_pointer = c;
2026 if (*input_line_pointer != '!')
2030 as_bad (_("no sequence number after !%s"), p);
2034 tok->X_add_number = 0;
2040 as_bad (_("!%s does not use a sequence number"), p);
2044 input_line_pointer++;
2046 /* Parse !sequence_number. */
2048 if (tok->X_op != O_constant || tok->X_add_number <= 0)
2050 as_bad (_("Bad sequence number: !%s!%s"),
2051 r->name, input_line_pointer);
2060 #endif /* RELOC_OP_P */
2063 ++input_line_pointer;
2064 if (saw_comma || !saw_arg)
2071 char *hold = input_line_pointer++;
2073 /* First try for parenthesized register ... */
2075 if (*input_line_pointer == ')' && tok->X_op == O_register)
2077 tok->X_op = (saw_comma ? O_cpregister : O_pregister);
2080 ++input_line_pointer;
2085 /* ... then fall through to plain expression. */
2086 input_line_pointer = hold;
2090 if (saw_arg && !saw_comma)
2094 if (tok->X_op == O_illegal || tok->X_op == O_absent)
2107 input_line_pointer = old_input_line_pointer;
2110 debug_exp (orig_tok, ntok - (end_tok - tok));
2113 is_end_of_line[(unsigned char) '!'] = 0;
2116 return ntok - (end_tok - tok);
2120 is_end_of_line[(unsigned char) '!'] = 0;
2122 input_line_pointer = old_input_line_pointer;
2123 return TOKENIZE_ERROR;
2127 is_end_of_line[(unsigned char) '!'] = 0;
2129 input_line_pointer = old_input_line_pointer;
2130 return TOKENIZE_ERROR_REPORT;
2133 /* Search forward through all variants of an opcode looking for a
2136 static const struct alpha_opcode *
2137 find_opcode_match (first_opcode, tok, pntok, pcpumatch)
2138 const struct alpha_opcode *first_opcode;
2139 const expressionS *tok;
2143 const struct alpha_opcode *opcode = first_opcode;
2145 int got_cpu_match = 0;
2149 const unsigned char *opidx;
2152 /* Don't match opcodes that don't exist on this architecture. */
2153 if (!(opcode->flags & alpha_target))
2158 for (opidx = opcode->operands; *opidx; ++opidx)
2160 const struct alpha_operand *operand = &alpha_operands[*opidx];
2162 /* Only take input from real operands. */
2163 if (operand->flags & AXP_OPERAND_FAKE)
2166 /* When we expect input, make sure we have it. */
2169 if ((operand->flags & AXP_OPERAND_OPTIONAL_MASK) == 0)
2174 /* Match operand type with expression type. */
2175 switch (operand->flags & AXP_OPERAND_TYPECHECK_MASK)
2177 case AXP_OPERAND_IR:
2178 if (tok[tokidx].X_op != O_register
2179 || !is_ir_num (tok[tokidx].X_add_number))
2182 case AXP_OPERAND_FPR:
2183 if (tok[tokidx].X_op != O_register
2184 || !is_fpr_num (tok[tokidx].X_add_number))
2187 case AXP_OPERAND_IR | AXP_OPERAND_PARENS:
2188 if (tok[tokidx].X_op != O_pregister
2189 || !is_ir_num (tok[tokidx].X_add_number))
2192 case AXP_OPERAND_IR | AXP_OPERAND_PARENS | AXP_OPERAND_COMMA:
2193 if (tok[tokidx].X_op != O_cpregister
2194 || !is_ir_num (tok[tokidx].X_add_number))
2198 case AXP_OPERAND_RELATIVE:
2199 case AXP_OPERAND_SIGNED:
2200 case AXP_OPERAND_UNSIGNED:
2201 switch (tok[tokidx].X_op)
2216 /* Everything else should have been fake. */
2222 /* Possible match -- did we use all of our input? */
2231 while (++opcode - alpha_opcodes < (int) alpha_num_opcodes
2232 && !strcmp (opcode->name, first_opcode->name));
2235 *pcpumatch = got_cpu_match;
2240 /* Search forward through all variants of a macro looking for a syntax
2243 static const struct alpha_macro *
2244 find_macro_match (first_macro, tok, pntok)
2245 const struct alpha_macro *first_macro;
2246 const expressionS *tok;
2249 const struct alpha_macro *macro = first_macro;
2254 const enum alpha_macro_arg *arg = macro->argsets;
2268 /* Index register. */
2270 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2271 || !is_ir_num (tok[tokidx].X_add_number))
2276 /* Parenthesized index register. */
2278 if (tokidx >= ntok || tok[tokidx].X_op != O_pregister
2279 || !is_ir_num (tok[tokidx].X_add_number))
2284 /* Optional parenthesized index register. */
2286 if (tokidx < ntok && tok[tokidx].X_op == O_pregister
2287 && is_ir_num (tok[tokidx].X_add_number))
2291 /* Leading comma with a parenthesized index register. */
2293 if (tokidx >= ntok || tok[tokidx].X_op != O_cpregister
2294 || !is_ir_num (tok[tokidx].X_add_number))
2299 /* Floating point register. */
2301 if (tokidx >= ntok || tok[tokidx].X_op != O_register
2302 || !is_fpr_num (tok[tokidx].X_add_number))
2307 /* Normal expression. */
2311 switch (tok[tokidx].X_op)
2320 case O_lituse_bytoff:
2336 while (*arg != MACRO_EOA)
2344 while (++macro - alpha_macros < (int) alpha_num_macros
2345 && !strcmp (macro->name, first_macro->name));
2350 /* Insert an operand value into an instruction. */
2353 insert_operand (insn, operand, val, file, line)
2355 const struct alpha_operand *operand;
2360 if (operand->bits != 32 && !(operand->flags & AXP_OPERAND_NOOVERFLOW))
2364 if (operand->flags & AXP_OPERAND_SIGNED)
2366 max = (1 << (operand->bits - 1)) - 1;
2367 min = -(1 << (operand->bits - 1));
2371 max = (1 << operand->bits) - 1;
2375 if (val < min || val > max)
2378 _("operand out of range (%s not between %d and %d)");
2379 char buf[sizeof (val) * 3 + 2];
2381 sprint_value (buf, val);
2383 as_warn_where (file, line, err, buf, min, max);
2385 as_warn (err, buf, min, max);
2389 if (operand->insert)
2391 const char *errmsg = NULL;
2393 insn = (*operand->insert) (insn, val, &errmsg);
2398 insn |= ((val & ((1 << operand->bits) - 1)) << operand->shift);
2403 /* Turn an opcode description and a set of arguments into
2404 an instruction and a fixup. */
2407 assemble_insn (opcode, tok, ntok, insn, reloc)
2408 const struct alpha_opcode *opcode;
2409 const expressionS *tok;
2411 struct alpha_insn *insn;
2412 bfd_reloc_code_real_type reloc;
2414 const struct alpha_operand *reloc_operand = NULL;
2415 const expressionS *reloc_exp = NULL;
2416 const unsigned char *argidx;
2420 memset (insn, 0, sizeof (*insn));
2421 image = opcode->opcode;
2423 for (argidx = opcode->operands; *argidx; ++argidx)
2425 const struct alpha_operand *operand = &alpha_operands[*argidx];
2426 const expressionS *t = (const expressionS *) 0;
2428 if (operand->flags & AXP_OPERAND_FAKE)
2430 /* fake operands take no value and generate no fixup */
2431 image = insert_operand (image, operand, 0, NULL, 0);
2437 switch (operand->flags & AXP_OPERAND_OPTIONAL_MASK)
2439 case AXP_OPERAND_DEFAULT_FIRST:
2442 case AXP_OPERAND_DEFAULT_SECOND:
2445 case AXP_OPERAND_DEFAULT_ZERO:
2447 static expressionS zero_exp;
2449 zero_exp.X_op = O_constant;
2450 zero_exp.X_unsigned = 1;
2465 image = insert_operand (image, operand, regno (t->X_add_number),
2470 image = insert_operand (image, operand, t->X_add_number, NULL, 0);
2471 assert (reloc_operand == NULL);
2472 reloc_operand = operand;
2477 /* This is only 0 for fields that should contain registers,
2478 which means this pattern shouldn't have matched. */
2479 if (operand->default_reloc == 0)
2482 /* There is one special case for which an insn receives two
2483 relocations, and thus the user-supplied reloc does not
2484 override the operand reloc. */
2485 if (operand->default_reloc == BFD_RELOC_ALPHA_HINT)
2487 struct alpha_fixup *fixup;
2489 if (insn->nfixups >= MAX_INSN_FIXUPS)
2490 as_fatal (_("too many fixups"));
2492 fixup = &insn->fixups[insn->nfixups++];
2494 fixup->reloc = BFD_RELOC_ALPHA_HINT;
2498 if (reloc == BFD_RELOC_UNUSED)
2499 reloc = operand->default_reloc;
2501 assert (reloc_operand == NULL);
2502 reloc_operand = operand;
2509 if (reloc != BFD_RELOC_UNUSED)
2511 struct alpha_fixup *fixup;
2513 if (insn->nfixups >= MAX_INSN_FIXUPS)
2514 as_fatal (_("too many fixups"));
2516 /* ??? My but this is hacky. But the OSF/1 assembler uses the same
2517 relocation tag for both ldah and lda with gpdisp. Choose the
2518 correct internal relocation based on the opcode. */
2519 if (reloc == BFD_RELOC_ALPHA_GPDISP)
2521 if (strcmp (opcode->name, "ldah") == 0)
2522 reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2523 else if (strcmp (opcode->name, "lda") == 0)
2524 reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2526 as_bad (_("invalid relocation for instruction"));
2529 /* If this is a real relocation (as opposed to a lituse hint), then
2530 the relocation width should match the operand width. */
2531 else if (reloc < BFD_RELOC_UNUSED)
2533 reloc_howto_type *reloc_howto
2534 = bfd_reloc_type_lookup (stdoutput, reloc);
2535 if (reloc_howto->bitsize != reloc_operand->bits)
2537 as_bad (_("invalid relocation for field"));
2542 fixup = &insn->fixups[insn->nfixups++];
2544 fixup->exp = *reloc_exp;
2546 fixup->exp.X_op = O_absent;
2547 fixup->reloc = reloc;
2553 /* Actually output an instruction with its fixup. */
2557 struct alpha_insn *insn;
2562 /* Take care of alignment duties. */
2563 if (alpha_auto_align_on && alpha_current_align < 2)
2564 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
2565 if (alpha_current_align > 2)
2566 alpha_current_align = 2;
2567 alpha_insn_label = NULL;
2569 /* Write out the instruction. */
2571 md_number_to_chars (f, insn->insn, 4);
2574 dwarf2_emit_insn (4);
2577 /* Apply the fixups in order. */
2578 for (i = 0; i < insn->nfixups; ++i)
2580 const struct alpha_operand *operand = (const struct alpha_operand *) 0;
2581 struct alpha_fixup *fixup = &insn->fixups[i];
2582 struct alpha_reloc_tag *info = NULL;
2586 /* Some fixups are only used internally and so have no howto. */
2587 if ((int) fixup->reloc < 0)
2589 operand = &alpha_operands[-(int) fixup->reloc];
2591 pcrel = ((operand->flags & AXP_OPERAND_RELATIVE) != 0);
2593 else if (fixup->reloc > BFD_RELOC_UNUSED
2594 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_HI16
2595 || fixup->reloc == BFD_RELOC_ALPHA_GPDISP_LO16)
2602 reloc_howto_type *reloc_howto
2603 = bfd_reloc_type_lookup (stdoutput, fixup->reloc);
2604 assert (reloc_howto);
2606 size = bfd_get_reloc_size (reloc_howto);
2607 assert (size >= 1 && size <= 4);
2609 pcrel = reloc_howto->pc_relative;
2612 fixP = fix_new_exp (frag_now, f - frag_now->fr_literal, size,
2613 &fixup->exp, pcrel, fixup->reloc);
2615 /* Turn off complaints that the addend is too large for some fixups,
2616 and copy in the sequence number for the explicit relocations. */
2617 switch (fixup->reloc)
2619 case BFD_RELOC_ALPHA_HINT:
2620 case BFD_RELOC_GPREL32:
2621 case BFD_RELOC_GPREL16:
2622 case BFD_RELOC_ALPHA_GPREL_HI16:
2623 case BFD_RELOC_ALPHA_GPREL_LO16:
2624 case BFD_RELOC_ALPHA_GOTDTPREL16:
2625 case BFD_RELOC_ALPHA_DTPREL_HI16:
2626 case BFD_RELOC_ALPHA_DTPREL_LO16:
2627 case BFD_RELOC_ALPHA_DTPREL16:
2628 case BFD_RELOC_ALPHA_GOTTPREL16:
2629 case BFD_RELOC_ALPHA_TPREL_HI16:
2630 case BFD_RELOC_ALPHA_TPREL_LO16:
2631 case BFD_RELOC_ALPHA_TPREL16:
2632 fixP->fx_no_overflow = 1;
2635 case BFD_RELOC_ALPHA_GPDISP_HI16:
2636 fixP->fx_no_overflow = 1;
2637 fixP->fx_addsy = section_symbol (now_seg);
2638 fixP->fx_offset = 0;
2640 info = get_alpha_reloc_tag (insn->sequence);
2641 if (++info->n_master > 1)
2642 as_bad (_("too many ldah insns for !gpdisp!%ld"), insn->sequence);
2643 if (info->segment != now_seg)
2644 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2646 fixP->tc_fix_data.info = info;
2649 case BFD_RELOC_ALPHA_GPDISP_LO16:
2650 fixP->fx_no_overflow = 1;
2652 info = get_alpha_reloc_tag (insn->sequence);
2653 if (++info->n_slaves > 1)
2654 as_bad (_("too many lda insns for !gpdisp!%ld"), insn->sequence);
2655 if (info->segment != now_seg)
2656 as_bad (_("both insns for !gpdisp!%ld must be in the same section"),
2658 fixP->tc_fix_data.info = info;
2659 info->slaves = fixP;
2662 case BFD_RELOC_ALPHA_LITERAL:
2663 case BFD_RELOC_ALPHA_ELF_LITERAL:
2664 fixP->fx_no_overflow = 1;
2666 if (insn->sequence == 0)
2668 info = get_alpha_reloc_tag (insn->sequence);
2669 info->master = fixP;
2671 if (info->segment != now_seg)
2672 info->multi_section_p = 1;
2673 fixP->tc_fix_data.info = info;
2677 case DUMMY_RELOC_LITUSE_ADDR:
2678 fixP->fx_offset = LITUSE_ALPHA_ADDR;
2680 case DUMMY_RELOC_LITUSE_BASE:
2681 fixP->fx_offset = LITUSE_ALPHA_BASE;
2683 case DUMMY_RELOC_LITUSE_BYTOFF:
2684 fixP->fx_offset = LITUSE_ALPHA_BYTOFF;
2686 case DUMMY_RELOC_LITUSE_JSR:
2687 fixP->fx_offset = LITUSE_ALPHA_JSR;
2689 case DUMMY_RELOC_LITUSE_TLSGD:
2690 fixP->fx_offset = LITUSE_ALPHA_TLSGD;
2692 case DUMMY_RELOC_LITUSE_TLSLDM:
2693 fixP->fx_offset = LITUSE_ALPHA_TLSLDM;
2696 fixP->fx_addsy = section_symbol (now_seg);
2697 fixP->fx_r_type = BFD_RELOC_ALPHA_LITUSE;
2699 info = get_alpha_reloc_tag (insn->sequence);
2700 if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSGD)
2701 info->saw_lu_tlsgd = 1;
2702 else if (fixup->reloc == DUMMY_RELOC_LITUSE_TLSLDM)
2703 info->saw_lu_tlsldm = 1;
2704 if (++info->n_slaves > 1)
2706 if (info->saw_lu_tlsgd)
2707 as_bad (_("too many lituse insns for !lituse_tlsgd!%ld"),
2709 else if (info->saw_lu_tlsldm)
2710 as_bad (_("too many lituse insns for !lituse_tlsldm!%ld"),
2713 fixP->tc_fix_data.info = info;
2714 fixP->tc_fix_data.next_reloc = info->slaves;
2715 info->slaves = fixP;
2716 if (info->segment != now_seg)
2717 info->multi_section_p = 1;
2720 case BFD_RELOC_ALPHA_TLSGD:
2721 fixP->fx_no_overflow = 1;
2723 if (insn->sequence == 0)
2725 info = get_alpha_reloc_tag (insn->sequence);
2726 if (info->saw_tlsgd)
2727 as_bad (_("duplicate !tlsgd!%ld"), insn->sequence);
2728 else if (info->saw_tlsldm)
2729 as_bad (_("sequence number in use for !tlsldm!%ld"),
2732 info->saw_tlsgd = 1;
2733 fixP->tc_fix_data.info = info;
2736 case BFD_RELOC_ALPHA_TLSLDM:
2737 fixP->fx_no_overflow = 1;
2739 if (insn->sequence == 0)
2741 info = get_alpha_reloc_tag (insn->sequence);
2742 if (info->saw_tlsldm)
2743 as_bad (_("duplicate !tlsldm!%ld"), insn->sequence);
2744 else if (info->saw_tlsgd)
2745 as_bad (_("sequence number in use for !tlsgd!%ld"),
2748 info->saw_tlsldm = 1;
2749 fixP->tc_fix_data.info = info;
2753 if ((int) fixup->reloc < 0)
2755 if (operand->flags & AXP_OPERAND_NOOVERFLOW)
2756 fixP->fx_no_overflow = 1;
2763 /* Given an opcode name and a pre-tokenized set of arguments, assemble
2764 the insn, but do not emit it.
2766 Note that this implies no macros allowed, since we can't store more
2767 than one insn in an insn structure. */
2770 assemble_tokens_to_insn (opname, tok, ntok, insn)
2772 const expressionS *tok;
2774 struct alpha_insn *insn;
2776 const struct alpha_opcode *opcode;
2778 /* search opcodes */
2779 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2783 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2786 assemble_insn (opcode, tok, ntok, insn, BFD_RELOC_UNUSED);
2790 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2792 as_bad (_("opcode `%s' not supported for target %s"), opname,
2796 as_bad (_("unknown opcode `%s'"), opname);
2799 /* Given an opcode name and a pre-tokenized set of arguments, take the
2800 opcode all the way through emission. */
2803 assemble_tokens (opname, tok, ntok, local_macros_on)
2805 const expressionS *tok;
2807 int local_macros_on;
2809 int found_something = 0;
2810 const struct alpha_opcode *opcode;
2811 const struct alpha_macro *macro;
2813 bfd_reloc_code_real_type reloc = BFD_RELOC_UNUSED;
2816 /* If a user-specified relocation is present, this is not a macro. */
2817 if (ntok && USER_RELOC_P (tok[ntok - 1].X_op))
2819 reloc = ALPHA_RELOC_TABLE (tok[ntok - 1].X_op)->reloc;
2824 if (local_macros_on)
2826 macro = ((const struct alpha_macro *)
2827 hash_find (alpha_macro_hash, opname));
2830 found_something = 1;
2831 macro = find_macro_match (macro, tok, &ntok);
2834 (*macro->emit) (tok, ntok, macro->arg);
2840 /* Search opcodes. */
2841 opcode = (const struct alpha_opcode *) hash_find (alpha_opcode_hash, opname);
2844 found_something = 1;
2845 opcode = find_opcode_match (opcode, tok, &ntok, &cpumatch);
2848 struct alpha_insn insn;
2849 assemble_insn (opcode, tok, ntok, &insn, reloc);
2851 /* Copy the sequence number for the reloc from the reloc token. */
2852 if (reloc != BFD_RELOC_UNUSED)
2853 insn.sequence = tok[ntok].X_add_number;
2860 if (found_something)
2863 as_bad (_("inappropriate arguments for opcode `%s'"), opname);
2865 as_bad (_("opcode `%s' not supported for target %s"), opname,
2869 as_bad (_("unknown opcode `%s'"), opname);
2872 /* Some instruction sets indexed by lg(size). */
2873 static const char * const sextX_op[] = { "sextb", "sextw", "sextl", NULL };
2874 static const char * const insXl_op[] = { "insbl", "inswl", "insll", "insql" };
2875 static const char * const insXh_op[] = { NULL, "inswh", "inslh", "insqh" };
2876 static const char * const extXl_op[] = { "extbl", "extwl", "extll", "extql" };
2877 static const char * const extXh_op[] = { NULL, "extwh", "extlh", "extqh" };
2878 static const char * const mskXl_op[] = { "mskbl", "mskwl", "mskll", "mskql" };
2879 static const char * const mskXh_op[] = { NULL, "mskwh", "msklh", "mskqh" };
2880 static const char * const stX_op[] = { "stb", "stw", "stl", "stq" };
2881 static const char * const ldXu_op[] = { "ldbu", "ldwu", NULL, NULL };
2883 /* Implement the ldgp macro. */
2886 emit_ldgp (tok, ntok, unused)
2887 const expressionS *tok;
2888 int ntok ATTRIBUTE_UNUSED;
2889 const PTR unused ATTRIBUTE_UNUSED;
2894 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
2895 /* from "ldgp r1,n(r2)", generate "ldah r1,X(R2); lda r1,Y(r1)"
2896 with appropriate constants and relocations. */
2897 struct alpha_insn insn;
2898 expressionS newtok[3];
2902 if (regno (tok[2].X_add_number) == AXP_REG_PV)
2903 ecoff_set_gp_prolog_size (0);
2907 set_tok_const (newtok[1], 0);
2910 assemble_tokens_to_insn ("ldah", newtok, 3, &insn);
2915 if (addend.X_op != O_constant)
2916 as_bad (_("can not resolve expression"));
2917 addend.X_op = O_symbol;
2918 addend.X_add_symbol = alpha_gp_symbol;
2922 insn.fixups[0].exp = addend;
2923 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_HI16;
2924 insn.sequence = next_sequence_num;
2928 set_tok_preg (newtok[2], tok[0].X_add_number);
2930 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
2933 addend.X_add_number += 4;
2937 insn.fixups[0].exp = addend;
2938 insn.fixups[0].reloc = BFD_RELOC_ALPHA_GPDISP_LO16;
2939 insn.sequence = next_sequence_num--;
2942 #endif /* OBJ_ECOFF || OBJ_ELF */
2947 /* Add symbol+addend to link pool.
2948 Return offset from basesym to entry in link pool.
2950 Add new fixup only if offset isn't 16bit. */
2953 add_to_link_pool (basesym, sym, addend)
2958 segT current_section = now_seg;
2959 int current_subsec = now_subseg;
2961 bfd_reloc_code_real_type reloc_type;
2963 segment_info_type *seginfo = seg_info (alpha_link_section);
2966 offset = - *symbol_get_obj (basesym);
2968 /* @@ This assumes all entries in a given section will be of the same
2969 size... Probably correct, but unwise to rely on. */
2970 /* This must always be called with the same subsegment. */
2972 if (seginfo->frchainP)
2973 for (fixp = seginfo->frchainP->fix_root;
2974 fixp != (fixS *) NULL;
2975 fixp = fixp->fx_next, offset += 8)
2977 if (fixp->fx_addsy == sym && fixp->fx_offset == addend)
2979 if (range_signed_16 (offset))
2986 /* Not found in 16bit signed range. */
2988 subseg_set (alpha_link_section, 0);
2992 fix_new (frag_now, p - frag_now->fr_literal, 8, sym, addend, 0,
2995 subseg_set (current_section, current_subsec);
2996 seginfo->literal_pool_size += 8;
3000 #endif /* OBJ_EVAX */
3002 /* Load a (partial) expression into a target register.
3004 If poffset is not null, after the call it will either contain
3005 O_constant 0, or a 16-bit offset appropriate for any MEM format
3006 instruction. In addition, pbasereg will be modified to point to
3007 the base register to use in that MEM format instruction.
3009 In any case, *pbasereg should contain a base register to add to the
3010 expression. This will normally be either AXP_REG_ZERO or
3011 alpha_gp_register. Symbol addresses will always be loaded via $gp,
3012 so "foo($0)" is interpreted as adding the address of foo to $0;
3013 i.e. "ldq $targ, LIT($gp); addq $targ, $0, $targ". Odd, perhaps,
3014 but this is what OSF/1 does.
3016 If explicit relocations of the form !literal!<number> are allowed,
3017 and used, then explicit_reloc with be an expression pointer.
3019 Finally, the return value is nonzero if the calling macro may emit
3020 a LITUSE reloc if otherwise appropriate; the return value is the
3021 sequence number to use. */
3024 load_expression (targreg, exp, pbasereg, poffset)
3026 const expressionS *exp;
3028 expressionS *poffset;
3030 long emit_lituse = 0;
3031 offsetT addend = exp->X_add_number;
3032 int basereg = *pbasereg;
3033 struct alpha_insn insn;
3034 expressionS newtok[3];
3043 /* Attempt to reduce .lit load by splitting the offset from
3044 its symbol when possible, but don't create a situation in
3046 if (!range_signed_32 (addend) &&
3047 (alpha_noat_on || targreg == AXP_REG_AT))
3049 lit = add_to_literal_pool (exp->X_add_symbol, addend,
3050 alpha_lita_section, 8);
3055 lit = add_to_literal_pool (exp->X_add_symbol, 0,
3056 alpha_lita_section, 8);
3060 as_fatal (_("overflow in literal (.lita) table"));
3062 /* emit "ldq r, lit(gp)" */
3064 if (basereg != alpha_gp_register && targreg == basereg)
3067 as_bad (_("macro requires $at register while noat in effect"));
3068 if (targreg == AXP_REG_AT)
3069 as_bad (_("macro requires $at while $at in use"));
3071 set_tok_reg (newtok[0], AXP_REG_AT);
3074 set_tok_reg (newtok[0], targreg);
3075 set_tok_sym (newtok[1], alpha_lita_symbol, lit);
3076 set_tok_preg (newtok[2], alpha_gp_register);
3078 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3080 assert (insn.nfixups == 1);
3081 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3082 insn.sequence = emit_lituse = next_sequence_num--;
3083 #endif /* OBJ_ECOFF */
3085 /* emit "ldq r, gotoff(gp)" */
3087 if (basereg != alpha_gp_register && targreg == basereg)
3090 as_bad (_("macro requires $at register while noat in effect"));
3091 if (targreg == AXP_REG_AT)
3092 as_bad (_("macro requires $at while $at in use"));
3094 set_tok_reg (newtok[0], AXP_REG_AT);
3097 set_tok_reg (newtok[0], targreg);
3099 /* XXX: Disable this .got minimizing optimization so that we can get
3100 better instruction offset knowledge in the compiler. This happens
3101 very infrequently anyway. */
3103 || (!range_signed_32 (addend)
3104 && (alpha_noat_on || targreg == AXP_REG_AT)))
3111 set_tok_sym (newtok[1], exp->X_add_symbol, 0);
3114 set_tok_preg (newtok[2], alpha_gp_register);
3116 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3118 assert (insn.nfixups == 1);
3119 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3120 insn.sequence = emit_lituse = next_sequence_num--;
3121 #endif /* OBJ_ELF */
3125 /* Find symbol or symbol pointer in link section. */
3127 if (exp->X_add_symbol == alpha_evax_proc.symbol)
3129 if (range_signed_16 (addend))
3131 set_tok_reg (newtok[0], targreg);
3132 set_tok_const (newtok[1], addend);
3133 set_tok_preg (newtok[2], basereg);
3134 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3139 set_tok_reg (newtok[0], targreg);
3140 set_tok_const (newtok[1], 0);
3141 set_tok_preg (newtok[2], basereg);
3142 assemble_tokens_to_insn ("lda", newtok, 3, &insn);
3147 if (!range_signed_32 (addend))
3149 link = add_to_link_pool (alpha_evax_proc.symbol,
3150 exp->X_add_symbol, addend);
3155 link = add_to_link_pool (alpha_evax_proc.symbol,
3156 exp->X_add_symbol, 0);
3158 set_tok_reg (newtok[0], targreg);
3159 set_tok_const (newtok[1], link);
3160 set_tok_preg (newtok[2], basereg);
3161 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3163 #endif /* OBJ_EVAX */
3168 if (basereg != alpha_gp_register && basereg != AXP_REG_ZERO)
3170 /* emit "addq r, base, r" */
3172 set_tok_reg (newtok[1], basereg);
3173 set_tok_reg (newtok[2], targreg);
3174 assemble_tokens ("addq", newtok, 3, 0);
3186 /* Assume that this difference expression will be resolved to an
3187 absolute value and that that value will fit in 16 bits. */
3189 set_tok_reg (newtok[0], targreg);
3191 set_tok_preg (newtok[2], basereg);
3192 assemble_tokens ("lda", newtok, 3, 0);
3195 set_tok_const (*poffset, 0);
3199 if (exp->X_add_number > 0)
3200 as_bad (_("bignum invalid; zero assumed"));
3202 as_bad (_("floating point number invalid; zero assumed"));
3207 as_bad (_("can't handle expression"));
3212 if (!range_signed_32 (addend))
3215 long seq_num = next_sequence_num--;
3217 /* For 64-bit addends, just put it in the literal pool. */
3220 /* emit "ldq targreg, lit(basereg)" */
3221 lit = add_to_link_pool (alpha_evax_proc.symbol,
3222 section_symbol (absolute_section), addend);
3223 set_tok_reg (newtok[0], targreg);
3224 set_tok_const (newtok[1], lit);
3225 set_tok_preg (newtok[2], alpha_gp_register);
3226 assemble_tokens ("ldq", newtok, 3, 0);
3229 if (alpha_lit8_section == NULL)
3231 create_literal_section (".lit8",
3232 &alpha_lit8_section,
3233 &alpha_lit8_symbol);
3236 alpha_lit8_literal = add_to_literal_pool (alpha_lit8_symbol, 0x8000,
3237 alpha_lita_section, 8);
3238 if (alpha_lit8_literal >= 0x8000)
3239 as_fatal (_("overflow in literal (.lita) table"));
3243 lit = add_to_literal_pool (NULL, addend, alpha_lit8_section, 8) - 0x8000;
3245 as_fatal (_("overflow in literal (.lit8) table"));
3247 /* emit "lda litreg, .lit8+0x8000" */
3249 if (targreg == basereg)
3252 as_bad (_("macro requires $at register while noat in effect"));
3253 if (targreg == AXP_REG_AT)
3254 as_bad (_("macro requires $at while $at in use"));
3256 set_tok_reg (newtok[0], AXP_REG_AT);
3259 set_tok_reg (newtok[0], targreg);
3261 set_tok_sym (newtok[1], alpha_lita_symbol, alpha_lit8_literal);
3264 set_tok_sym (newtok[1], alpha_lit8_symbol, 0x8000);
3266 set_tok_preg (newtok[2], alpha_gp_register);
3268 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3270 assert (insn.nfixups == 1);
3272 insn.fixups[0].reloc = BFD_RELOC_ALPHA_LITERAL;
3275 insn.fixups[0].reloc = BFD_RELOC_ALPHA_ELF_LITERAL;
3277 insn.sequence = seq_num;
3281 /* emit "ldq litreg, lit(litreg)" */
3283 set_tok_const (newtok[1], lit);
3284 set_tok_preg (newtok[2], newtok[0].X_add_number);
3286 assemble_tokens_to_insn ("ldq", newtok, 3, &insn);
3288 assert (insn.nfixups < MAX_INSN_FIXUPS);
3289 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3290 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3292 insn.sequence = seq_num;
3297 /* emit "addq litreg, base, target" */
3299 if (basereg != AXP_REG_ZERO)
3301 set_tok_reg (newtok[1], basereg);
3302 set_tok_reg (newtok[2], targreg);
3303 assemble_tokens ("addq", newtok, 3, 0);
3305 #endif /* !OBJ_EVAX */
3308 set_tok_const (*poffset, 0);
3309 *pbasereg = targreg;
3313 offsetT low, high, extra, tmp;
3315 /* for 32-bit operands, break up the addend */
3317 low = sign_extend_16 (addend);
3319 high = sign_extend_16 (tmp >> 16);
3321 if (tmp - (high << 16))
3325 high = sign_extend_16 (tmp >> 16);
3330 set_tok_reg (newtok[0], targreg);
3331 set_tok_preg (newtok[2], basereg);
3335 /* emit "ldah r, extra(r) */
3336 set_tok_const (newtok[1], extra);
3337 assemble_tokens ("ldah", newtok, 3, 0);
3338 set_tok_preg (newtok[2], basereg = targreg);
3343 /* emit "ldah r, high(r) */
3344 set_tok_const (newtok[1], high);
3345 assemble_tokens ("ldah", newtok, 3, 0);
3347 set_tok_preg (newtok[2], basereg);
3350 if ((low && !poffset) || (!poffset && basereg != targreg))
3352 /* emit "lda r, low(base)" */
3353 set_tok_const (newtok[1], low);
3354 assemble_tokens ("lda", newtok, 3, 0);
3360 set_tok_const (*poffset, low);
3361 *pbasereg = basereg;
3367 /* The lda macro differs from the lda instruction in that it handles
3368 most simple expressions, particularly symbol address loads and
3372 emit_lda (tok, ntok, unused)
3373 const expressionS *tok;
3375 const PTR unused ATTRIBUTE_UNUSED;
3380 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3382 basereg = tok[2].X_add_number;
3384 (void) load_expression (tok[0].X_add_number, &tok[1], &basereg, NULL);
3387 /* The ldah macro differs from the ldah instruction in that it has $31
3388 as an implied base register. */
3391 emit_ldah (tok, ntok, unused)
3392 const expressionS *tok;
3393 int ntok ATTRIBUTE_UNUSED;
3394 const PTR unused ATTRIBUTE_UNUSED;
3396 expressionS newtok[3];
3400 set_tok_preg (newtok[2], AXP_REG_ZERO);
3402 assemble_tokens ("ldah", newtok, 3, 0);
3405 /* Handle all "simple" integer register loads -- ldq, ldq_l, ldq_u,
3406 etc. They differ from the real instructions in that they do simple
3407 expressions like the lda macro. */
3410 emit_ir_load (tok, ntok, opname)
3411 const expressionS *tok;
3417 expressionS newtok[3];
3418 struct alpha_insn insn;
3421 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3423 basereg = tok[2].X_add_number;
3425 lituse = load_expression (tok[0].X_add_number, &tok[1], &basereg,
3429 set_tok_preg (newtok[2], basereg);
3431 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3435 assert (insn.nfixups < MAX_INSN_FIXUPS);
3436 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3437 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3439 insn.sequence = lituse;
3445 /* Handle fp register loads, and both integer and fp register stores.
3446 Again, we handle simple expressions. */
3449 emit_loadstore (tok, ntok, opname)
3450 const expressionS *tok;
3456 expressionS newtok[3];
3457 struct alpha_insn insn;
3460 basereg = (tok[1].X_op == O_constant ? AXP_REG_ZERO : alpha_gp_register);
3462 basereg = tok[2].X_add_number;
3464 if (tok[1].X_op != O_constant || !range_signed_16 (tok[1].X_add_number))
3467 as_bad (_("macro requires $at register while noat in effect"));
3469 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, &newtok[1]);
3478 set_tok_preg (newtok[2], basereg);
3480 assemble_tokens_to_insn ((const char *) opname, newtok, 3, &insn);
3484 assert (insn.nfixups < MAX_INSN_FIXUPS);
3485 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3486 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3488 insn.sequence = lituse;
3494 /* Load a half-word or byte as an unsigned value. */
3497 emit_ldXu (tok, ntok, vlgsize)
3498 const expressionS *tok;
3502 if (alpha_target & AXP_OPCODE_BWX)
3503 emit_ir_load (tok, ntok, ldXu_op[(long) vlgsize]);
3506 expressionS newtok[3];
3507 struct alpha_insn insn;
3512 as_bad (_("macro requires $at register while noat in effect"));
3515 basereg = (tok[1].X_op == O_constant
3516 ? AXP_REG_ZERO : alpha_gp_register);
3518 basereg = tok[2].X_add_number;
3520 /* emit "lda $at, exp" */
3522 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3524 /* emit "ldq_u targ, 0($at)" */
3527 set_tok_const (newtok[1], 0);
3528 set_tok_preg (newtok[2], basereg);
3529 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3533 assert (insn.nfixups < MAX_INSN_FIXUPS);
3534 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3535 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3537 insn.sequence = lituse;
3542 /* emit "extXl targ, $at, targ" */
3544 set_tok_reg (newtok[1], basereg);
3545 newtok[2] = newtok[0];
3546 assemble_tokens_to_insn (extXl_op[(long) vlgsize], newtok, 3, &insn);
3550 assert (insn.nfixups < MAX_INSN_FIXUPS);
3551 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3552 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3554 insn.sequence = lituse;
3561 /* Load a half-word or byte as a signed value. */
3564 emit_ldX (tok, ntok, vlgsize)
3565 const expressionS *tok;
3569 emit_ldXu (tok, ntok, vlgsize);
3570 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3573 /* Load an integral value from an unaligned address as an unsigned
3577 emit_uldXu (tok, ntok, vlgsize)
3578 const expressionS *tok;
3582 long lgsize = (long) vlgsize;
3583 expressionS newtok[3];
3586 as_bad (_("macro requires $at register while noat in effect"));
3588 /* emit "lda $at, exp" */
3590 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3591 newtok[0].X_add_number = AXP_REG_AT;
3592 assemble_tokens ("lda", newtok, ntok, 1);
3594 /* emit "ldq_u $t9, 0($at)" */
3596 set_tok_reg (newtok[0], AXP_REG_T9);
3597 set_tok_const (newtok[1], 0);
3598 set_tok_preg (newtok[2], AXP_REG_AT);
3599 assemble_tokens ("ldq_u", newtok, 3, 1);
3601 /* emit "ldq_u $t10, size-1($at)" */
3603 set_tok_reg (newtok[0], AXP_REG_T10);
3604 set_tok_const (newtok[1], (1 << lgsize) - 1);
3605 assemble_tokens ("ldq_u", newtok, 3, 1);
3607 /* emit "extXl $t9, $at, $t9" */
3609 set_tok_reg (newtok[0], AXP_REG_T9);
3610 set_tok_reg (newtok[1], AXP_REG_AT);
3611 set_tok_reg (newtok[2], AXP_REG_T9);
3612 assemble_tokens (extXl_op[lgsize], newtok, 3, 1);
3614 /* emit "extXh $t10, $at, $t10" */
3616 set_tok_reg (newtok[0], AXP_REG_T10);
3617 set_tok_reg (newtok[2], AXP_REG_T10);
3618 assemble_tokens (extXh_op[lgsize], newtok, 3, 1);
3620 /* emit "or $t9, $t10, targ" */
3622 set_tok_reg (newtok[0], AXP_REG_T9);
3623 set_tok_reg (newtok[1], AXP_REG_T10);
3625 assemble_tokens ("or", newtok, 3, 1);
3628 /* Load an integral value from an unaligned address as a signed value.
3629 Note that quads should get funneled to the unsigned load since we
3630 don't have to do the sign extension. */
3633 emit_uldX (tok, ntok, vlgsize)
3634 const expressionS *tok;
3638 emit_uldXu (tok, ntok, vlgsize);
3639 assemble_tokens (sextX_op[(long) vlgsize], tok, 1, 1);
3642 /* Implement the ldil macro. */
3645 emit_ldil (tok, ntok, unused)
3646 const expressionS *tok;
3648 const PTR unused ATTRIBUTE_UNUSED;
3650 expressionS newtok[2];
3652 memcpy (newtok, tok, sizeof (newtok));
3653 newtok[1].X_add_number = sign_extend_32 (tok[1].X_add_number);
3655 assemble_tokens ("lda", newtok, ntok, 1);
3658 /* Store a half-word or byte. */
3661 emit_stX (tok, ntok, vlgsize)
3662 const expressionS *tok;
3666 int lgsize = (int) (long) vlgsize;
3668 if (alpha_target & AXP_OPCODE_BWX)
3669 emit_loadstore (tok, ntok, stX_op[lgsize]);
3672 expressionS newtok[3];
3673 struct alpha_insn insn;
3678 as_bad (_("macro requires $at register while noat in effect"));
3681 basereg = (tok[1].X_op == O_constant
3682 ? AXP_REG_ZERO : alpha_gp_register);
3684 basereg = tok[2].X_add_number;
3686 /* emit "lda $at, exp" */
3688 lituse = load_expression (AXP_REG_AT, &tok[1], &basereg, NULL);
3690 /* emit "ldq_u $t9, 0($at)" */
3692 set_tok_reg (newtok[0], AXP_REG_T9);
3693 set_tok_const (newtok[1], 0);
3694 set_tok_preg (newtok[2], basereg);
3695 assemble_tokens_to_insn ("ldq_u", newtok, 3, &insn);
3699 assert (insn.nfixups < MAX_INSN_FIXUPS);
3700 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3701 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3703 insn.sequence = lituse;
3708 /* emit "insXl src, $at, $t10" */
3711 set_tok_reg (newtok[1], basereg);
3712 set_tok_reg (newtok[2], AXP_REG_T10);
3713 assemble_tokens_to_insn (insXl_op[lgsize], newtok, 3, &insn);
3717 assert (insn.nfixups < MAX_INSN_FIXUPS);
3718 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3719 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3721 insn.sequence = lituse;
3726 /* emit "mskXl $t9, $at, $t9" */
3728 set_tok_reg (newtok[0], AXP_REG_T9);
3729 newtok[2] = newtok[0];
3730 assemble_tokens_to_insn (mskXl_op[lgsize], newtok, 3, &insn);
3734 assert (insn.nfixups < MAX_INSN_FIXUPS);
3735 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BYTOFF;
3736 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3738 insn.sequence = lituse;
3743 /* emit "or $t9, $t10, $t9" */
3745 set_tok_reg (newtok[1], AXP_REG_T10);
3746 assemble_tokens ("or", newtok, 3, 1);
3748 /* emit "stq_u $t9, 0($at) */
3750 set_tok_const(newtok[1], 0);
3751 set_tok_preg (newtok[2], AXP_REG_AT);
3752 assemble_tokens_to_insn ("stq_u", newtok, 3, &insn);
3756 assert (insn.nfixups < MAX_INSN_FIXUPS);
3757 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_BASE;
3758 insn.fixups[insn.nfixups].exp.X_op = O_absent;
3760 insn.sequence = lituse;
3767 /* Store an integer to an unaligned address. */
3770 emit_ustX (tok, ntok, vlgsize)
3771 const expressionS *tok;
3775 int lgsize = (int) (long) vlgsize;
3776 expressionS newtok[3];
3778 /* emit "lda $at, exp" */
3780 memcpy (newtok, tok, sizeof (expressionS) * ntok);
3781 newtok[0].X_add_number = AXP_REG_AT;
3782 assemble_tokens ("lda", newtok, ntok, 1);
3784 /* emit "ldq_u $9, 0($at)" */
3786 set_tok_reg (newtok[0], AXP_REG_T9);
3787 set_tok_const (newtok[1], 0);
3788 set_tok_preg (newtok[2], AXP_REG_AT);
3789 assemble_tokens ("ldq_u", newtok, 3, 1);
3791 /* emit "ldq_u $10, size-1($at)" */
3793 set_tok_reg (newtok[0], AXP_REG_T10);
3794 set_tok_const (newtok[1], (1 << lgsize) - 1);
3795 assemble_tokens ("ldq_u", newtok, 3, 1);
3797 /* emit "insXl src, $at, $t11" */
3800 set_tok_reg (newtok[1], AXP_REG_AT);
3801 set_tok_reg (newtok[2], AXP_REG_T11);
3802 assemble_tokens (insXl_op[lgsize], newtok, 3, 1);
3804 /* emit "insXh src, $at, $t12" */
3806 set_tok_reg (newtok[2], AXP_REG_T12);
3807 assemble_tokens (insXh_op[lgsize], newtok, 3, 1);
3809 /* emit "mskXl $t9, $at, $t9" */
3811 set_tok_reg (newtok[0], AXP_REG_T9);
3812 newtok[2] = newtok[0];
3813 assemble_tokens (mskXl_op[lgsize], newtok, 3, 1);
3815 /* emit "mskXh $t10, $at, $t10" */
3817 set_tok_reg (newtok[0], AXP_REG_T10);
3818 newtok[2] = newtok[0];
3819 assemble_tokens (mskXh_op[lgsize], newtok, 3, 1);
3821 /* emit "or $t9, $t11, $t9" */
3823 set_tok_reg (newtok[0], AXP_REG_T9);
3824 set_tok_reg (newtok[1], AXP_REG_T11);
3825 newtok[2] = newtok[0];
3826 assemble_tokens ("or", newtok, 3, 1);
3828 /* emit "or $t10, $t12, $t10" */
3830 set_tok_reg (newtok[0], AXP_REG_T10);
3831 set_tok_reg (newtok[1], AXP_REG_T12);
3832 newtok[2] = newtok[0];
3833 assemble_tokens ("or", newtok, 3, 1);
3835 /* emit "stq_u $t9, 0($at)" */
3837 set_tok_reg (newtok[0], AXP_REG_T9);
3838 set_tok_const (newtok[1], 0);
3839 set_tok_preg (newtok[2], AXP_REG_AT);
3840 assemble_tokens ("stq_u", newtok, 3, 1);
3842 /* emit "stq_u $t10, size-1($at)" */
3844 set_tok_reg (newtok[0], AXP_REG_T10);
3845 set_tok_const (newtok[1], (1 << lgsize) - 1);
3846 assemble_tokens ("stq_u", newtok, 3, 1);
3849 /* Sign extend a half-word or byte. The 32-bit sign extend is
3850 implemented as "addl $31, $r, $t" in the opcode table. */
3853 emit_sextX (tok, ntok, vlgsize)
3854 const expressionS *tok;
3858 long lgsize = (long) vlgsize;
3860 if (alpha_target & AXP_OPCODE_BWX)
3861 assemble_tokens (sextX_op[lgsize], tok, ntok, 0);
3864 int bitshift = 64 - 8 * (1 << lgsize);
3865 expressionS newtok[3];
3867 /* emit "sll src,bits,dst" */
3870 set_tok_const (newtok[1], bitshift);
3871 newtok[2] = tok[ntok - 1];
3872 assemble_tokens ("sll", newtok, 3, 1);
3874 /* emit "sra dst,bits,dst" */
3876 newtok[0] = newtok[2];
3877 assemble_tokens ("sra", newtok, 3, 1);
3881 /* Implement the division and modulus macros. */
3885 /* Make register usage like in normal procedure call.
3886 Don't clobber PV and RA. */
3889 emit_division (tok, ntok, symname)
3890 const expressionS *tok;
3894 /* DIVISION and MODULUS. Yech.
3899 mov x,R16 # if x != R16
3900 mov y,R17 # if y != R17
3905 with appropriate optimizations if R0,R16,R17 are the registers
3906 specified by the compiler. */
3910 expressionS newtok[3];
3912 xr = regno (tok[0].X_add_number);
3913 yr = regno (tok[1].X_add_number);
3918 rr = regno (tok[2].X_add_number);
3920 /* Move the operands into the right place. */
3921 if (yr == AXP_REG_R16 && xr == AXP_REG_R17)
3923 /* They are in exactly the wrong order -- swap through AT. */
3926 as_bad (_("macro requires $at register while noat in effect"));
3928 set_tok_reg (newtok[0], AXP_REG_R16);
3929 set_tok_reg (newtok[1], AXP_REG_AT);
3930 assemble_tokens ("mov", newtok, 2, 1);
3932 set_tok_reg (newtok[0], AXP_REG_R17);
3933 set_tok_reg (newtok[1], AXP_REG_R16);
3934 assemble_tokens ("mov", newtok, 2, 1);
3936 set_tok_reg (newtok[0], AXP_REG_AT);
3937 set_tok_reg (newtok[1], AXP_REG_R17);
3938 assemble_tokens ("mov", newtok, 2, 1);
3942 if (yr == AXP_REG_R16)
3944 set_tok_reg (newtok[0], AXP_REG_R16);
3945 set_tok_reg (newtok[1], AXP_REG_R17);
3946 assemble_tokens ("mov", newtok, 2, 1);
3949 if (xr != AXP_REG_R16)
3951 set_tok_reg (newtok[0], xr);
3952 set_tok_reg (newtok[1], AXP_REG_R16);
3953 assemble_tokens ("mov", newtok, 2, 1);
3956 if (yr != AXP_REG_R16 && yr != AXP_REG_R17)
3958 set_tok_reg (newtok[0], yr);
3959 set_tok_reg (newtok[1], AXP_REG_R17);
3960 assemble_tokens ("mov", newtok, 2, 1);
3964 sym = symbol_find_or_make ((const char *) symname);
3966 set_tok_reg (newtok[0], AXP_REG_AT);
3967 set_tok_sym (newtok[1], sym, 0);
3968 assemble_tokens ("lda", newtok, 2, 1);
3970 /* Call the division routine. */
3971 set_tok_reg (newtok[0], AXP_REG_AT);
3972 set_tok_cpreg (newtok[1], AXP_REG_AT);
3973 set_tok_const (newtok[2], 0);
3974 assemble_tokens ("jsr", newtok, 3, 1);
3976 /* Move the result to the right place. */
3977 if (rr != AXP_REG_R0)
3979 set_tok_reg (newtok[0], AXP_REG_R0);
3980 set_tok_reg (newtok[1], rr);
3981 assemble_tokens ("mov", newtok, 2, 1);
3985 #else /* !OBJ_EVAX */
3988 emit_division (tok, ntok, symname)
3989 const expressionS *tok;
3993 /* DIVISION and MODULUS. Yech.
4003 with appropriate optimizations if t10,t11,t12 are the registers
4004 specified by the compiler. */
4008 expressionS newtok[3];
4010 xr = regno (tok[0].X_add_number);
4011 yr = regno (tok[1].X_add_number);
4016 rr = regno (tok[2].X_add_number);
4018 sym = symbol_find_or_make ((const char *) symname);
4020 /* Move the operands into the right place. */
4021 if (yr == AXP_REG_T10 && xr == AXP_REG_T11)
4023 /* They are in exactly the wrong order -- swap through AT. */
4025 as_bad (_("macro requires $at register while noat in effect"));
4027 set_tok_reg (newtok[0], AXP_REG_T10);
4028 set_tok_reg (newtok[1], AXP_REG_AT);
4029 assemble_tokens ("mov", newtok, 2, 1);
4031 set_tok_reg (newtok[0], AXP_REG_T11);
4032 set_tok_reg (newtok[1], AXP_REG_T10);
4033 assemble_tokens ("mov", newtok, 2, 1);
4035 set_tok_reg (newtok[0], AXP_REG_AT);
4036 set_tok_reg (newtok[1], AXP_REG_T11);
4037 assemble_tokens ("mov", newtok, 2, 1);
4041 if (yr == AXP_REG_T10)
4043 set_tok_reg (newtok[0], AXP_REG_T10);
4044 set_tok_reg (newtok[1], AXP_REG_T11);
4045 assemble_tokens ("mov", newtok, 2, 1);
4048 if (xr != AXP_REG_T10)
4050 set_tok_reg (newtok[0], xr);
4051 set_tok_reg (newtok[1], AXP_REG_T10);
4052 assemble_tokens ("mov", newtok, 2, 1);
4055 if (yr != AXP_REG_T10 && yr != AXP_REG_T11)
4057 set_tok_reg (newtok[0], yr);
4058 set_tok_reg (newtok[1], AXP_REG_T11);
4059 assemble_tokens ("mov", newtok, 2, 1);
4063 /* Call the division routine. */
4064 set_tok_reg (newtok[0], AXP_REG_T9);
4065 set_tok_sym (newtok[1], sym, 0);
4066 assemble_tokens ("jsr", newtok, 2, 1);
4068 /* Reload the GP register. */
4072 #if defined(OBJ_ECOFF) || defined(OBJ_ELF)
4073 set_tok_reg (newtok[0], alpha_gp_register);
4074 set_tok_const (newtok[1], 0);
4075 set_tok_preg (newtok[2], AXP_REG_T9);
4076 assemble_tokens ("ldgp", newtok, 3, 1);
4079 /* Move the result to the right place. */
4080 if (rr != AXP_REG_T12)
4082 set_tok_reg (newtok[0], AXP_REG_T12);
4083 set_tok_reg (newtok[1], rr);
4084 assemble_tokens ("mov", newtok, 2, 1);
4088 #endif /* !OBJ_EVAX */
4090 /* The jsr and jmp macros differ from their instruction counterparts
4091 in that they can load the target address and default most
4095 emit_jsrjmp (tok, ntok, vopname)
4096 const expressionS *tok;
4100 const char *opname = (const char *) vopname;
4101 struct alpha_insn insn;
4102 expressionS newtok[3];
4106 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4107 r = regno (tok[tokidx++].X_add_number);
4109 r = strcmp (opname, "jmp") == 0 ? AXP_REG_ZERO : AXP_REG_RA;
4111 set_tok_reg (newtok[0], r);
4113 if (tokidx < ntok &&
4114 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4115 r = regno (tok[tokidx++].X_add_number);
4117 /* keep register if jsr $n.<sym> */
4121 int basereg = alpha_gp_register;
4122 lituse = load_expression (r = AXP_REG_PV, &tok[tokidx], &basereg, NULL);
4126 set_tok_cpreg (newtok[1], r);
4129 /* FIXME: Add hint relocs to BFD for evax. */
4132 newtok[2] = tok[tokidx];
4135 set_tok_const (newtok[2], 0);
4137 assemble_tokens_to_insn (opname, newtok, 3, &insn);
4141 assert (insn.nfixups < MAX_INSN_FIXUPS);
4142 insn.fixups[insn.nfixups].reloc = DUMMY_RELOC_LITUSE_JSR;
4143 insn.fixups[insn.nfixups].exp.X_op = O_absent;
4145 insn.sequence = lituse;
4151 /* The ret and jcr instructions differ from their instruction
4152 counterparts in that everything can be defaulted. */
4155 emit_retjcr (tok, ntok, vopname)
4156 const expressionS *tok;
4160 const char *opname = (const char *) vopname;
4161 expressionS newtok[3];
4164 if (tokidx < ntok && tok[tokidx].X_op == O_register)
4165 r = regno (tok[tokidx++].X_add_number);
4169 set_tok_reg (newtok[0], r);
4171 if (tokidx < ntok &&
4172 (tok[tokidx].X_op == O_pregister || tok[tokidx].X_op == O_cpregister))
4173 r = regno (tok[tokidx++].X_add_number);
4177 set_tok_cpreg (newtok[1], r);
4180 newtok[2] = tok[tokidx];
4182 set_tok_const (newtok[2], strcmp (opname, "ret") == 0);
4184 assemble_tokens (opname, newtok, 3, 0);
4187 /* Assembler directives. */
4189 /* Handle the .text pseudo-op. This is like the usual one, but it
4190 clears alpha_insn_label and restores auto alignment. */
4202 alpha_insn_label = NULL;
4203 alpha_auto_align_on = 1;
4204 alpha_current_align = 0;
4207 /* Handle the .data pseudo-op. This is like the usual one, but it
4208 clears alpha_insn_label and restores auto alignment. */
4219 alpha_insn_label = NULL;
4220 alpha_auto_align_on = 1;
4221 alpha_current_align = 0;
4224 #if defined (OBJ_ECOFF) || defined (OBJ_EVAX)
4226 /* Handle the OSF/1 and openVMS .comm pseudo quirks.
4227 openVMS constructs a section for every common symbol. */
4230 s_alpha_comm (ignore)
4231 int ignore ATTRIBUTE_UNUSED;
4233 register char *name;
4237 register symbolS *symbolP;
4240 segT current_section = now_seg;
4241 int current_subsec = now_subseg;
4245 name = input_line_pointer;
4246 c = get_symbol_end ();
4248 /* just after name is now '\0' */
4249 p = input_line_pointer;
4254 /* Alpha OSF/1 compiler doesn't provide the comma, gcc does. */
4255 if (*input_line_pointer == ',')
4257 input_line_pointer++;
4260 if ((temp = get_absolute_expression ()) < 0)
4262 as_warn (_(".COMMon length (%ld.) <0! Ignored."), (long) temp);
4263 ignore_rest_of_line ();
4268 symbolP = symbol_find_or_make (name);
4271 /* Make a section for the common symbol. */
4272 new_seg = subseg_new (xstrdup (name), 0);
4278 /* alignment might follow */
4279 if (*input_line_pointer == ',')
4283 input_line_pointer++;
4284 align = get_absolute_expression ();
4285 bfd_set_section_alignment (stdoutput, new_seg, align);
4289 if (S_IS_DEFINED (symbolP) && ! S_IS_COMMON (symbolP))
4291 as_bad (_("Ignoring attempt to re-define symbol"));
4292 ignore_rest_of_line ();
4297 if (bfd_section_size (stdoutput, new_seg) > 0)
4299 if (bfd_section_size (stdoutput, new_seg) != temp)
4300 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4301 S_GET_NAME (symbolP),
4302 (long) bfd_section_size (stdoutput, new_seg),
4306 if (S_GET_VALUE (symbolP))
4308 if (S_GET_VALUE (symbolP) != (valueT) temp)
4309 as_bad (_("Length of .comm \"%s\" is already %ld. Not changed to %ld."),
4310 S_GET_NAME (symbolP),
4311 (long) S_GET_VALUE (symbolP),
4318 subseg_set (new_seg, 0);
4319 p = frag_more (temp);
4320 new_seg->flags |= SEC_IS_COMMON;
4321 if (! S_IS_DEFINED (symbolP))
4322 S_SET_SEGMENT (symbolP, new_seg);
4324 S_SET_VALUE (symbolP, (valueT) temp);
4326 S_SET_EXTERNAL (symbolP);
4330 subseg_set (current_section, current_subsec);
4333 know (symbol_get_frag (symbolP) == &zero_address_frag);
4335 demand_empty_rest_of_line ();
4338 #endif /* ! OBJ_ELF */
4342 /* Handle the .rdata pseudo-op. This is like the usual one, but it
4343 clears alpha_insn_label and restores auto alignment. */
4346 s_alpha_rdata (ignore)
4347 int ignore ATTRIBUTE_UNUSED;
4351 temp = get_absolute_expression ();
4352 subseg_new (".rdata", 0);
4353 demand_empty_rest_of_line ();
4354 alpha_insn_label = NULL;
4355 alpha_auto_align_on = 1;
4356 alpha_current_align = 0;
4363 /* Handle the .sdata pseudo-op. This is like the usual one, but it
4364 clears alpha_insn_label and restores auto alignment. */
4367 s_alpha_sdata (ignore)
4368 int ignore ATTRIBUTE_UNUSED;
4372 temp = get_absolute_expression ();
4373 subseg_new (".sdata", 0);
4374 demand_empty_rest_of_line ();
4375 alpha_insn_label = NULL;
4376 alpha_auto_align_on = 1;
4377 alpha_current_align = 0;
4382 struct alpha_elf_frame_data
4385 symbolS *func_end_sym;
4386 symbolS *prologue_sym;
4392 offsetT mask_offset;
4393 offsetT fmask_offset;
4395 struct alpha_elf_frame_data *next;
4398 static struct alpha_elf_frame_data *all_frame_data;
4399 static struct alpha_elf_frame_data **plast_frame_data = &all_frame_data;
4400 static struct alpha_elf_frame_data *cur_frame_data;
4402 /* Handle the .section pseudo-op. This is like the usual one, but it
4403 clears alpha_insn_label and restores auto alignment. */
4406 s_alpha_section (ignore)
4407 int ignore ATTRIBUTE_UNUSED;
4409 obj_elf_section (ignore);
4411 alpha_insn_label = NULL;
4412 alpha_auto_align_on = 1;
4413 alpha_current_align = 0;
4418 int dummy ATTRIBUTE_UNUSED;
4420 if (ECOFF_DEBUGGING)
4421 ecoff_directive_ent (0);
4424 char *name, name_end;
4425 name = input_line_pointer;
4426 name_end = get_symbol_end ();
4428 if (! is_name_beginner (*name))
4430 as_warn (_(".ent directive has no name"));
4431 *input_line_pointer = name_end;
4438 as_warn (_("nested .ent directives"));
4440 sym = symbol_find_or_make (name);
4441 symbol_get_bfdsym (sym)->flags |= BSF_FUNCTION;
4443 cur_frame_data = calloc (1, sizeof (*cur_frame_data));
4444 cur_frame_data->func_sym = sym;
4446 /* Provide sensible defaults. */
4447 cur_frame_data->fp_regno = 30; /* sp */
4448 cur_frame_data->ra_regno = 26; /* ra */
4450 *plast_frame_data = cur_frame_data;
4451 plast_frame_data = &cur_frame_data->next;
4453 /* The .ent directive is sometimes followed by a number. Not sure
4454 what it really means, but ignore it. */
4455 *input_line_pointer = name_end;
4457 if (*input_line_pointer == ',')
4459 input_line_pointer++;
4462 if (ISDIGIT (*input_line_pointer) || *input_line_pointer == '-')
4463 (void) get_absolute_expression ();
4465 demand_empty_rest_of_line ();
4471 int dummy ATTRIBUTE_UNUSED;
4473 if (ECOFF_DEBUGGING)
4474 ecoff_directive_end (0);
4477 char *name, name_end;
4478 name = input_line_pointer;
4479 name_end = get_symbol_end ();
4481 if (! is_name_beginner (*name))
4483 as_warn (_(".end directive has no name"));
4484 *input_line_pointer = name_end;
4490 sym = symbol_find (name);
4491 if (!cur_frame_data)
4492 as_warn (_(".end directive without matching .ent"));
4493 else if (sym != cur_frame_data->func_sym)
4494 as_warn (_(".end directive names different symbol than .ent"));
4496 /* Create an expression to calculate the size of the function. */
4499 OBJ_SYMFIELD_TYPE *obj = symbol_get_obj (sym);
4500 expressionS *exp = xmalloc (sizeof (expressionS));
4503 exp->X_op = O_subtract;
4504 exp->X_add_symbol = symbol_temp_new_now ();
4505 exp->X_op_symbol = sym;
4506 exp->X_add_number = 0;
4508 cur_frame_data->func_end_sym = exp->X_add_symbol;
4511 cur_frame_data = NULL;
4513 *input_line_pointer = name_end;
4515 demand_empty_rest_of_line ();
4523 if (ECOFF_DEBUGGING)
4526 ecoff_directive_fmask (0);
4528 ecoff_directive_mask (0);
4535 if (!cur_frame_data)
4538 as_warn (_(".fmask outside of .ent"));
4540 as_warn (_(".mask outside of .ent"));
4541 discard_rest_of_line ();
4545 if (get_absolute_expression_and_terminator (&val) != ',')
4548 as_warn (_("bad .fmask directive"));
4550 as_warn (_("bad .mask directive"));
4551 --input_line_pointer;
4552 discard_rest_of_line ();
4556 offset = get_absolute_expression ();
4557 demand_empty_rest_of_line ();
4561 cur_frame_data->fmask = val;
4562 cur_frame_data->fmask_offset = offset;
4566 cur_frame_data->mask = val;
4567 cur_frame_data->mask_offset = offset;
4573 s_alpha_frame (dummy)
4574 int dummy ATTRIBUTE_UNUSED;
4576 if (ECOFF_DEBUGGING)
4577 ecoff_directive_frame (0);
4582 if (!cur_frame_data)
4584 as_warn (_(".frame outside of .ent"));
4585 discard_rest_of_line ();
4589 cur_frame_data->fp_regno = tc_get_register (1);
4592 if (*input_line_pointer++ != ','
4593 || get_absolute_expression_and_terminator (&val) != ',')
4595 as_warn (_("bad .frame directive"));
4596 --input_line_pointer;
4597 discard_rest_of_line ();
4600 cur_frame_data->frame_size = val;
4602 cur_frame_data->ra_regno = tc_get_register (0);
4604 /* Next comes the "offset of saved $a0 from $sp". In gcc terms
4605 this is current_function_pretend_args_size. There's no place
4606 to put this value, so ignore it. */
4612 s_alpha_prologue (ignore)
4613 int ignore ATTRIBUTE_UNUSED;
4618 arg = get_absolute_expression ();
4619 demand_empty_rest_of_line ();
4621 if (ECOFF_DEBUGGING)
4622 sym = ecoff_get_cur_proc_sym ();
4624 sym = cur_frame_data ? cur_frame_data->func_sym : NULL;
4628 as_bad (_(".prologue directive without a preceding .ent directive"));
4634 case 0: /* No PV required. */
4635 S_SET_OTHER (sym, STO_ALPHA_NOPV
4636 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4638 case 1: /* Std GP load. */
4639 S_SET_OTHER (sym, STO_ALPHA_STD_GPLOAD
4640 | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4642 case 2: /* Non-std use of PV. */
4646 as_bad (_("Invalid argument %d to .prologue."), arg);
4651 cur_frame_data->prologue_sym = symbol_temp_new_now ();
4654 static char *first_file_directive;
4657 s_alpha_file (ignore)
4658 int ignore ATTRIBUTE_UNUSED;
4660 /* Save the first .file directive we see, so that we can change our
4661 minds about whether ecoff debugging should or shouldn't be enabled. */
4662 if (alpha_flag_mdebug < 0 && ! first_file_directive)
4664 char *start = input_line_pointer;
4667 discard_rest_of_line ();
4669 len = input_line_pointer - start;
4670 first_file_directive = xmalloc (len + 1);
4671 memcpy (first_file_directive, start, len);
4672 first_file_directive[len] = '\0';
4674 input_line_pointer = start;
4677 if (ECOFF_DEBUGGING)
4678 ecoff_directive_file (0);
4680 dwarf2_directive_file (0);
4684 s_alpha_loc (ignore)
4685 int ignore ATTRIBUTE_UNUSED;
4687 if (ECOFF_DEBUGGING)
4688 ecoff_directive_loc (0);
4690 dwarf2_directive_loc (0);
4697 /* If we've been undecided about mdebug, make up our minds in favour. */
4698 if (alpha_flag_mdebug < 0)
4700 segT sec = subseg_new (".mdebug", 0);
4701 bfd_set_section_flags (stdoutput, sec, SEC_HAS_CONTENTS | SEC_READONLY);
4702 bfd_set_section_alignment (stdoutput, sec, 3);
4704 ecoff_read_begin_hook ();
4706 if (first_file_directive)
4708 char *save_ilp = input_line_pointer;
4709 input_line_pointer = first_file_directive;
4710 ecoff_directive_file (0);
4711 input_line_pointer = save_ilp;
4712 free (first_file_directive);
4715 alpha_flag_mdebug = 1;
4721 s_alpha_coff_wrapper (which)
4724 static void (* const fns[]) PARAMS ((int)) = {
4725 ecoff_directive_begin,
4726 ecoff_directive_bend,
4727 ecoff_directive_def,
4728 ecoff_directive_dim,
4729 ecoff_directive_endef,
4730 ecoff_directive_scl,
4731 ecoff_directive_tag,
4732 ecoff_directive_val,
4735 assert (which >= 0 && which < (int) (sizeof (fns)/sizeof (*fns)));
4737 if (ECOFF_DEBUGGING)
4741 as_bad (_("ECOFF debugging is disabled."));
4742 ignore_rest_of_line ();
4746 /* Called at the end of assembly. Here we emit unwind info for frames
4747 unless the compiler has done it for us. */
4750 alpha_elf_md_end (void)
4752 struct alpha_elf_frame_data *p;
4755 as_warn (_(".ent directive without matching .end"));
4757 /* If someone has generated the unwind info themselves, great. */
4758 if (bfd_get_section_by_name (stdoutput, ".eh_frame") != NULL)
4761 /* Generate .eh_frame data for the unwind directives specified. */
4762 for (p = all_frame_data; p ; p = p->next)
4763 if (p->prologue_sym)
4765 /* Create a temporary symbol at the same location as our
4766 function symbol. This prevents problems with globals. */
4767 cfi_new_fde (symbol_temp_new (S_GET_SEGMENT (p->func_sym),
4768 S_GET_VALUE (p->func_sym),
4769 symbol_get_frag (p->func_sym)));
4771 cfi_set_return_column (p->ra_regno);
4772 cfi_add_CFA_def_cfa_register (30);
4773 if (p->fp_regno != 30 || p->mask || p->fmask || p->frame_size)
4778 cfi_add_advance_loc (p->prologue_sym);
4780 if (p->fp_regno != 30)
4781 if (p->frame_size != 0)
4782 cfi_add_CFA_def_cfa (p->fp_regno, p->frame_size);
4784 cfi_add_CFA_def_cfa_register (p->fp_regno);
4785 else if (p->frame_size != 0)
4786 cfi_add_CFA_def_cfa_offset (p->frame_size);
4789 offset = p->mask_offset;
4791 /* Recall that $26 is special-cased and stored first. */
4792 if ((mask >> 26) & 1)
4794 cfi_add_CFA_offset (26, offset);
4805 cfi_add_CFA_offset (i, offset);
4810 offset = p->fmask_offset;
4818 cfi_add_CFA_offset (i + 32, offset);
4823 cfi_end_fde (p->func_end_sym);
4828 s_alpha_usepv (int unused ATTRIBUTE_UNUSED)
4830 char *name, name_end;
4831 char *which, which_end;
4835 name = input_line_pointer;
4836 name_end = get_symbol_end ();
4838 if (! is_name_beginner (*name))
4840 as_bad (_(".usepv directive has no name"));
4841 *input_line_pointer = name_end;
4842 ignore_rest_of_line ();
4846 sym = symbol_find_or_make (name);
4847 *input_line_pointer++ = name_end;
4849 if (name_end != ',')
4851 as_bad (_(".usepv directive has no type"));
4852 ignore_rest_of_line ();
4857 which = input_line_pointer;
4858 which_end = get_symbol_end ();
4860 if (strcmp (which, "no") == 0)
4861 other = STO_ALPHA_NOPV;
4862 else if (strcmp (which, "std") == 0)
4863 other = STO_ALPHA_STD_GPLOAD;
4866 as_bad (_("unknown argument for .usepv"));
4870 *input_line_pointer = which_end;
4871 demand_empty_rest_of_line ();
4873 S_SET_OTHER (sym, other | (S_GET_OTHER (sym) & ~STO_ALPHA_STD_GPLOAD));
4875 #endif /* OBJ_ELF */
4877 /* Standard calling conventions leaves the CFA at $30 on entry. */
4880 alpha_cfi_frame_initial_instructions ()
4882 cfi_add_CFA_def_cfa_register (30);
4887 /* Handle the section specific pseudo-op. */
4890 s_alpha_section (secid)
4894 #define EVAX_SECTION_COUNT 5
4895 static char *section_name[EVAX_SECTION_COUNT + 1] =
4896 { "NULL", ".rdata", ".comm", ".link", ".ctors", ".dtors" };
4898 if ((secid <= 0) || (secid > EVAX_SECTION_COUNT))
4900 as_fatal (_("Unknown section directive"));
4901 demand_empty_rest_of_line ();
4904 temp = get_absolute_expression ();
4905 subseg_new (section_name[secid], 0);
4906 demand_empty_rest_of_line ();
4907 alpha_insn_label = NULL;
4908 alpha_auto_align_on = 1;
4909 alpha_current_align = 0;
4912 /* Parse .ent directives. */
4915 s_alpha_ent (ignore)
4916 int ignore ATTRIBUTE_UNUSED;
4919 expressionS symexpr;
4921 alpha_evax_proc.pdsckind = 0;
4922 alpha_evax_proc.framereg = -1;
4923 alpha_evax_proc.framesize = 0;
4924 alpha_evax_proc.rsa_offset = 0;
4925 alpha_evax_proc.ra_save = AXP_REG_RA;
4926 alpha_evax_proc.fp_save = -1;
4927 alpha_evax_proc.imask = 0;
4928 alpha_evax_proc.fmask = 0;
4929 alpha_evax_proc.prologue = 0;
4930 alpha_evax_proc.type = 0;
4932 expression (&symexpr);
4934 if (symexpr.X_op != O_symbol)
4936 as_fatal (_(".ent directive has no symbol"));
4937 demand_empty_rest_of_line ();
4941 symbol = make_expr_symbol (&symexpr);
4942 symbol_get_bfdsym (symbol)->flags |= BSF_FUNCTION;
4943 alpha_evax_proc.symbol = symbol;
4945 demand_empty_rest_of_line ();
4949 /* Parse .frame <framreg>,<framesize>,RA,<rsa_offset> directives. */
4952 s_alpha_frame (ignore)
4953 int ignore ATTRIBUTE_UNUSED;
4957 alpha_evax_proc.framereg = tc_get_register (1);
4960 if (*input_line_pointer++ != ','
4961 || get_absolute_expression_and_terminator (&val) != ',')
4963 as_warn (_("Bad .frame directive 1./2. param"));
4964 --input_line_pointer;
4965 demand_empty_rest_of_line ();
4969 alpha_evax_proc.framesize = val;
4971 (void) tc_get_register (1);
4973 if (*input_line_pointer++ != ',')
4975 as_warn (_("Bad .frame directive 3./4. param"));
4976 --input_line_pointer;
4977 demand_empty_rest_of_line ();
4980 alpha_evax_proc.rsa_offset = get_absolute_expression ();
4986 s_alpha_pdesc (ignore)
4987 int ignore ATTRIBUTE_UNUSED;
4996 segment_info_type *seginfo = seg_info (alpha_link_section);
4998 if (now_seg != alpha_link_section)
5000 as_bad (_(".pdesc directive not in link (.link) section"));
5001 demand_empty_rest_of_line ();
5005 if ((alpha_evax_proc.symbol == 0)
5006 || (!S_IS_DEFINED (alpha_evax_proc.symbol)))
5008 as_fatal (_(".pdesc has no matching .ent"));
5009 demand_empty_rest_of_line ();
5013 *symbol_get_obj (alpha_evax_proc.symbol) =
5014 (valueT) seginfo->literal_pool_size;
5017 if (exp.X_op != O_symbol)
5019 as_warn (_(".pdesc directive has no entry symbol"));
5020 demand_empty_rest_of_line ();
5024 entry_sym = make_expr_symbol (&exp);
5025 /* Save bfd symbol of proc desc in function symbol. */
5026 symbol_get_bfdsym (alpha_evax_proc.symbol)->udata.p
5027 = symbol_get_bfdsym (entry_sym);
5030 if (*input_line_pointer++ != ',')
5032 as_warn (_("No comma after .pdesc <entryname>"));
5033 demand_empty_rest_of_line ();
5038 name = input_line_pointer;
5039 name_end = get_symbol_end ();
5041 if (strncmp (name, "stack", 5) == 0)
5043 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_STACK;
5045 else if (strncmp (name, "reg", 3) == 0)
5047 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_FP_REGISTER;
5049 else if (strncmp (name, "null", 4) == 0)
5051 alpha_evax_proc.pdsckind = PDSC_S_K_KIND_NULL;
5055 as_fatal (_("unknown procedure kind"));
5056 demand_empty_rest_of_line ();
5060 *input_line_pointer = name_end;
5061 demand_empty_rest_of_line ();
5063 #ifdef md_flush_pending_output
5064 md_flush_pending_output ();
5067 frag_align (3, 0, 0);
5069 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5071 seginfo->literal_pool_size += 16;
5073 *p = alpha_evax_proc.pdsckind
5074 | ((alpha_evax_proc.framereg == 29) ? PDSC_S_M_BASE_REG_IS_FP : 0);
5075 *(p + 1) = PDSC_S_M_NATIVE | PDSC_S_M_NO_JACKET;
5077 switch (alpha_evax_proc.pdsckind)
5079 case PDSC_S_K_KIND_NULL:
5083 case PDSC_S_K_KIND_FP_REGISTER:
5084 *(p + 2) = alpha_evax_proc.fp_save;
5085 *(p + 3) = alpha_evax_proc.ra_save;
5087 case PDSC_S_K_KIND_FP_STACK:
5088 md_number_to_chars (p + 2, (valueT) alpha_evax_proc.rsa_offset, 2);
5090 default: /* impossible */
5095 *(p + 5) = alpha_evax_proc.type & 0x0f;
5097 /* Signature offset. */
5098 md_number_to_chars (p + 6, (valueT) 0, 2);
5100 fix_new_exp (frag_now, p - frag_now->fr_literal+8, 8, &exp, 0, BFD_RELOC_64);
5102 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_NULL)
5105 /* Add dummy fix to make add_to_link_pool work. */
5107 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5109 seginfo->literal_pool_size += 8;
5111 /* pdesc+16: Size. */
5112 md_number_to_chars (p, (valueT) alpha_evax_proc.framesize, 4);
5114 md_number_to_chars (p + 4, (valueT) 0, 2);
5117 md_number_to_chars (p + 6, alpha_evax_proc.prologue, 2);
5119 if (alpha_evax_proc.pdsckind == PDSC_S_K_KIND_FP_REGISTER)
5122 /* Add dummy fix to make add_to_link_pool work. */
5124 fixp = fix_new (frag_now, p - frag_now->fr_literal, 8, 0, 0, 0, 0);
5126 seginfo->literal_pool_size += 8;
5128 /* pdesc+24: register masks. */
5130 md_number_to_chars (p, alpha_evax_proc.imask, 4);
5131 md_number_to_chars (p + 4, alpha_evax_proc.fmask, 4);
5136 /* Support for crash debug on vms. */
5139 s_alpha_name (ignore)
5140 int ignore ATTRIBUTE_UNUSED;
5144 segment_info_type *seginfo = seg_info (alpha_link_section);
5146 if (now_seg != alpha_link_section)
5148 as_bad (_(".name directive not in link (.link) section"));
5149 demand_empty_rest_of_line ();
5154 if (exp.X_op != O_symbol)
5156 as_warn (_(".name directive has no symbol"));
5157 demand_empty_rest_of_line ();
5161 demand_empty_rest_of_line ();
5163 #ifdef md_flush_pending_output
5164 md_flush_pending_output ();
5167 frag_align (3, 0, 0);
5169 seginfo->literal_pool_size += 8;
5171 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0, BFD_RELOC_64);
5177 s_alpha_linkage (ignore)
5178 int ignore ATTRIBUTE_UNUSED;
5183 #ifdef md_flush_pending_output
5184 md_flush_pending_output ();
5188 if (exp.X_op != O_symbol)
5190 as_fatal (_("No symbol after .linkage"));
5194 p = frag_more (LKP_S_K_SIZE);
5195 memset (p, 0, LKP_S_K_SIZE);
5196 fix_new_exp (frag_now, p - frag_now->fr_literal, LKP_S_K_SIZE, &exp, 0,\
5197 BFD_RELOC_ALPHA_LINKAGE);
5199 demand_empty_rest_of_line ();
5205 s_alpha_code_address (ignore)
5206 int ignore ATTRIBUTE_UNUSED;
5211 #ifdef md_flush_pending_output
5212 md_flush_pending_output ();
5216 if (exp.X_op != O_symbol)
5218 as_fatal (_("No symbol after .code_address"));
5224 fix_new_exp (frag_now, p - frag_now->fr_literal, 8, &exp, 0,\
5225 BFD_RELOC_ALPHA_CODEADDR);
5227 demand_empty_rest_of_line ();
5233 s_alpha_fp_save (ignore)
5234 int ignore ATTRIBUTE_UNUSED;
5237 alpha_evax_proc.fp_save = tc_get_register (1);
5239 demand_empty_rest_of_line ();
5244 s_alpha_mask (ignore)
5245 int ignore ATTRIBUTE_UNUSED;
5249 if (get_absolute_expression_and_terminator (&val) != ',')
5251 as_warn (_("Bad .mask directive"));
5252 --input_line_pointer;
5256 alpha_evax_proc.imask = val;
5257 (void) get_absolute_expression ();
5259 demand_empty_rest_of_line ();
5265 s_alpha_fmask (ignore)
5266 int ignore ATTRIBUTE_UNUSED;
5270 if (get_absolute_expression_and_terminator (&val) != ',')
5272 as_warn (_("Bad .fmask directive"));
5273 --input_line_pointer;
5277 alpha_evax_proc.fmask = val;
5278 (void) get_absolute_expression ();
5280 demand_empty_rest_of_line ();
5286 s_alpha_end (ignore)
5287 int ignore ATTRIBUTE_UNUSED;
5291 c = get_symbol_end ();
5292 *input_line_pointer = c;
5293 demand_empty_rest_of_line ();
5294 alpha_evax_proc.symbol = 0;
5300 s_alpha_file (ignore)
5301 int ignore ATTRIBUTE_UNUSED;
5305 static char case_hack[32];
5307 sprintf (case_hack, "<CASE:%01d%01d>",
5308 alpha_flag_hash_long_names, alpha_flag_show_after_trunc);
5310 s = symbol_find_or_make (case_hack);
5311 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5313 get_absolute_expression ();
5314 s = symbol_find_or_make (demand_copy_string (&length));
5315 symbol_get_bfdsym (s)->flags |= BSF_FILE;
5316 demand_empty_rest_of_line ();
5320 #endif /* OBJ_EVAX */
5322 /* Handle the .gprel32 pseudo op. */
5325 s_alpha_gprel32 (ignore)
5326 int ignore ATTRIBUTE_UNUSED;
5338 e.X_add_symbol = section_symbol (absolute_section);
5351 e.X_add_symbol = section_symbol (absolute_section);
5354 e.X_op = O_subtract;
5355 e.X_op_symbol = alpha_gp_symbol;
5363 if (alpha_auto_align_on && alpha_current_align < 2)
5364 alpha_align (2, (char *) NULL, alpha_insn_label, 0);
5365 if (alpha_current_align > 2)
5366 alpha_current_align = 2;
5367 alpha_insn_label = NULL;
5371 fix_new_exp (frag_now, p - frag_now->fr_literal, 4,
5372 &e, 0, BFD_RELOC_GPREL32);
5375 /* Handle floating point allocation pseudo-ops. This is like the
5376 generic vresion, but it makes sure the current label, if any, is
5377 correctly aligned. */
5380 s_alpha_float_cons (type)
5407 if (alpha_auto_align_on && alpha_current_align < log_size)
5408 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5409 if (alpha_current_align > log_size)
5410 alpha_current_align = log_size;
5411 alpha_insn_label = NULL;
5416 /* Handle the .proc pseudo op. We don't really do much with it except
5420 s_alpha_proc (is_static)
5421 int is_static ATTRIBUTE_UNUSED;
5429 /* Takes ".proc name,nargs" */
5431 name = input_line_pointer;
5432 c = get_symbol_end ();
5433 p = input_line_pointer;
5434 symbolP = symbol_find_or_make (name);
5437 if (*input_line_pointer != ',')
5440 as_warn (_("Expected comma after name \"%s\""), name);
5443 ignore_rest_of_line ();
5447 input_line_pointer++;
5448 temp = get_absolute_expression ();
5450 /* *symbol_get_obj (symbolP) = (signed char) temp; */
5451 as_warn (_("unhandled: .proc %s,%d"), name, temp);
5452 demand_empty_rest_of_line ();
5455 /* Handle the .set pseudo op. This is used to turn on and off most of
5456 the assembler features. */
5460 int x ATTRIBUTE_UNUSED;
5466 name = input_line_pointer;
5467 ch = get_symbol_end ();
5470 if (s[0] == 'n' && s[1] == 'o')
5475 if (!strcmp ("reorder", s))
5477 else if (!strcmp ("at", s))
5478 alpha_noat_on = !yesno;
5479 else if (!strcmp ("macro", s))
5480 alpha_macros_on = yesno;
5481 else if (!strcmp ("move", s))
5483 else if (!strcmp ("volatile", s))
5486 as_warn (_("Tried to .set unrecognized mode `%s'"), name);
5488 *input_line_pointer = ch;
5489 demand_empty_rest_of_line ();
5492 /* Handle the .base pseudo op. This changes the assembler's notion of
5493 the $gp register. */
5496 s_alpha_base (ignore)
5497 int ignore ATTRIBUTE_UNUSED;
5500 if (first_32bit_quadrant)
5502 /* not fatal, but it might not work in the end */
5503 as_warn (_("File overrides no-base-register option."));
5504 first_32bit_quadrant = 0;
5509 if (*input_line_pointer == '$')
5511 input_line_pointer++;
5512 if (*input_line_pointer == 'r')
5513 input_line_pointer++;
5516 alpha_gp_register = get_absolute_expression ();
5517 if (alpha_gp_register < 0 || alpha_gp_register > 31)
5519 alpha_gp_register = AXP_REG_GP;
5520 as_warn (_("Bad base register, using $%d."), alpha_gp_register);
5523 demand_empty_rest_of_line ();
5526 /* Handle the .align pseudo-op. This aligns to a power of two. It
5527 also adjusts any current instruction label. We treat this the same
5528 way the MIPS port does: .align 0 turns off auto alignment. */
5531 s_alpha_align (ignore)
5532 int ignore ATTRIBUTE_UNUSED;
5536 long max_alignment = 15;
5538 align = get_absolute_expression ();
5539 if (align > max_alignment)
5541 align = max_alignment;
5542 as_bad (_("Alignment too large: %d. assumed"), align);
5546 as_warn (_("Alignment negative: 0 assumed"));
5550 if (*input_line_pointer == ',')
5552 input_line_pointer++;
5553 fill = get_absolute_expression ();
5561 alpha_auto_align_on = 1;
5562 alpha_align (align, pfill, alpha_insn_label, 1);
5566 alpha_auto_align_on = 0;
5569 demand_empty_rest_of_line ();
5572 /* Hook the normal string processor to reset known alignment. */
5575 s_alpha_stringer (terminate)
5578 alpha_current_align = 0;
5579 alpha_insn_label = NULL;
5580 stringer (terminate);
5583 /* Hook the normal space processing to reset known alignment. */
5586 s_alpha_space (ignore)
5589 alpha_current_align = 0;
5590 alpha_insn_label = NULL;
5594 /* Hook into cons for auto-alignment. */
5597 alpha_cons_align (size)
5603 while ((size >>= 1) != 0)
5606 if (alpha_auto_align_on && alpha_current_align < log_size)
5607 alpha_align (log_size, (char *) NULL, alpha_insn_label, 0);
5608 if (alpha_current_align > log_size)
5609 alpha_current_align = log_size;
5610 alpha_insn_label = NULL;
5613 /* Here come the .uword, .ulong, and .uquad explicitly unaligned
5614 pseudos. We just turn off auto-alignment and call down to cons. */
5617 s_alpha_ucons (bytes)
5620 int hold = alpha_auto_align_on;
5621 alpha_auto_align_on = 0;
5623 alpha_auto_align_on = hold;
5626 /* Switch the working cpu type. */
5629 s_alpha_arch (ignored)
5630 int ignored ATTRIBUTE_UNUSED;
5633 const struct cpu_type *p;
5636 name = input_line_pointer;
5637 ch = get_symbol_end ();
5639 for (p = cpu_types; p->name; ++p)
5640 if (strcmp (name, p->name) == 0)
5642 alpha_target_name = p->name, alpha_target = p->flags;
5645 as_warn ("Unknown CPU identifier `%s'", name);
5648 *input_line_pointer = ch;
5649 demand_empty_rest_of_line ();
5653 /* print token expression with alpha specific extension. */
5656 alpha_print_token (f, exp)
5658 const expressionS *exp;
5668 expressionS nexp = *exp;
5669 nexp.X_op = O_register;
5670 print_expr (f, &nexp);
5675 print_expr (f, exp);
5682 /* The target specific pseudo-ops which we support. */
5684 const pseudo_typeS md_pseudo_table[] = {
5686 {"comm", s_alpha_comm, 0}, /* osf1 compiler does this */
5687 {"rdata", s_alpha_rdata, 0},
5689 {"text", s_alpha_text, 0},
5690 {"data", s_alpha_data, 0},
5692 {"sdata", s_alpha_sdata, 0},
5695 {"section", s_alpha_section, 0},
5696 {"section.s", s_alpha_section, 0},
5697 {"sect", s_alpha_section, 0},
5698 {"sect.s", s_alpha_section, 0},
5701 { "pdesc", s_alpha_pdesc, 0},
5702 { "name", s_alpha_name, 0},
5703 { "linkage", s_alpha_linkage, 0},
5704 { "code_address", s_alpha_code_address, 0},
5705 { "ent", s_alpha_ent, 0},
5706 { "frame", s_alpha_frame, 0},
5707 { "fp_save", s_alpha_fp_save, 0},
5708 { "mask", s_alpha_mask, 0},
5709 { "fmask", s_alpha_fmask, 0},
5710 { "end", s_alpha_end, 0},
5711 { "file", s_alpha_file, 0},
5712 { "rdata", s_alpha_section, 1},
5713 { "comm", s_alpha_comm, 0},
5714 { "link", s_alpha_section, 3},
5715 { "ctors", s_alpha_section, 4},
5716 { "dtors", s_alpha_section, 5},
5719 /* Frame related pseudos. */
5720 {"ent", s_alpha_ent, 0},
5721 {"end", s_alpha_end, 0},
5722 {"mask", s_alpha_mask, 0},
5723 {"fmask", s_alpha_mask, 1},
5724 {"frame", s_alpha_frame, 0},
5725 {"prologue", s_alpha_prologue, 0},
5726 {"file", s_alpha_file, 5},
5727 {"loc", s_alpha_loc, 9},
5728 {"stabs", s_alpha_stab, 's'},
5729 {"stabn", s_alpha_stab, 'n'},
5730 {"usepv", s_alpha_usepv, 0},
5731 /* COFF debugging related pseudos. */
5732 {"begin", s_alpha_coff_wrapper, 0},
5733 {"bend", s_alpha_coff_wrapper, 1},
5734 {"def", s_alpha_coff_wrapper, 2},
5735 {"dim", s_alpha_coff_wrapper, 3},
5736 {"endef", s_alpha_coff_wrapper, 4},
5737 {"scl", s_alpha_coff_wrapper, 5},
5738 {"tag", s_alpha_coff_wrapper, 6},
5739 {"val", s_alpha_coff_wrapper, 7},
5741 {"prologue", s_ignore, 0},
5743 {"gprel32", s_alpha_gprel32, 0},
5744 {"t_floating", s_alpha_float_cons, 'd'},
5745 {"s_floating", s_alpha_float_cons, 'f'},
5746 {"f_floating", s_alpha_float_cons, 'F'},
5747 {"g_floating", s_alpha_float_cons, 'G'},
5748 {"d_floating", s_alpha_float_cons, 'D'},
5750 {"proc", s_alpha_proc, 0},
5751 {"aproc", s_alpha_proc, 1},
5752 {"set", s_alpha_set, 0},
5753 {"reguse", s_ignore, 0},
5754 {"livereg", s_ignore, 0},
5755 {"base", s_alpha_base, 0}, /*??*/
5756 {"option", s_ignore, 0},
5757 {"aent", s_ignore, 0},
5758 {"ugen", s_ignore, 0},
5759 {"eflag", s_ignore, 0},
5761 {"align", s_alpha_align, 0},
5762 {"double", s_alpha_float_cons, 'd'},
5763 {"float", s_alpha_float_cons, 'f'},
5764 {"single", s_alpha_float_cons, 'f'},
5765 {"ascii", s_alpha_stringer, 0},
5766 {"asciz", s_alpha_stringer, 1},
5767 {"string", s_alpha_stringer, 1},
5768 {"space", s_alpha_space, 0},
5769 {"skip", s_alpha_space, 0},
5770 {"zero", s_alpha_space, 0},
5772 /* Unaligned data pseudos. */
5773 {"uword", s_alpha_ucons, 2},
5774 {"ulong", s_alpha_ucons, 4},
5775 {"uquad", s_alpha_ucons, 8},
5778 /* Dwarf wants these versions of unaligned. */
5779 {"2byte", s_alpha_ucons, 2},
5780 {"4byte", s_alpha_ucons, 4},
5781 {"8byte", s_alpha_ucons, 8},
5784 /* We don't do any optimizing, so we can safely ignore these. */
5785 {"noalias", s_ignore, 0},
5786 {"alias", s_ignore, 0},
5788 {"arch", s_alpha_arch, 0},
5793 /* Build a BFD section with its flags set appropriately for the .lita,
5794 .lit8, or .lit4 sections. */
5797 create_literal_section (name, secp, symp)
5802 segT current_section = now_seg;
5803 int current_subsec = now_subseg;
5806 *secp = new_sec = subseg_new (name, 0);
5807 subseg_set (current_section, current_subsec);
5808 bfd_set_section_alignment (stdoutput, new_sec, 4);
5809 bfd_set_section_flags (stdoutput, new_sec,
5810 SEC_RELOC | SEC_ALLOC | SEC_LOAD | SEC_READONLY
5813 S_CLEAR_EXTERNAL (*symp = section_symbol (new_sec));
5818 /* @@@ GP selection voodoo. All of this seems overly complicated and
5819 unnecessary; which is the primary reason it's for ECOFF only. */
5820 static inline void maybe_set_gp PARAMS ((asection *));
5829 vma = bfd_get_section_vma (foo, sec);
5830 if (vma && vma < alpha_gp_value)
5831 alpha_gp_value = vma;
5837 assert (alpha_gp_value == 0);
5839 /* Get minus-one in whatever width... */
5843 /* Select the smallest VMA of these existing sections. */
5844 maybe_set_gp (alpha_lita_section);
5846 /* These were disabled before -- should we use them? */
5847 maybe_set_gp (sdata);
5848 maybe_set_gp (lit8_sec);
5849 maybe_set_gp (lit4_sec);
5852 /* @@ Will a simple 0x8000 work here? If not, why not? */
5853 #define GP_ADJUSTMENT (0x8000 - 0x10)
5855 alpha_gp_value += GP_ADJUSTMENT;
5857 S_SET_VALUE (alpha_gp_symbol, alpha_gp_value);
5860 printf (_("Chose GP value of %lx\n"), alpha_gp_value);
5863 #endif /* OBJ_ECOFF */
5866 /* Map 's' to SHF_ALPHA_GPREL. */
5869 alpha_elf_section_letter (letter, ptr_msg)
5874 return SHF_ALPHA_GPREL;
5876 *ptr_msg = _("Bad .section directive: want a,s,w,x,M,S,G,T in string");
5880 /* Map SHF_ALPHA_GPREL to SEC_SMALL_DATA. */
5883 alpha_elf_section_flags (flags, attr, type)
5885 int attr, type ATTRIBUTE_UNUSED;
5887 if (attr & SHF_ALPHA_GPREL)
5888 flags |= SEC_SMALL_DATA;
5891 #endif /* OBJ_ELF */
5893 /* Called internally to handle all alignment needs. This takes care
5894 of eliding calls to frag_align if'n the cached current alignment
5895 says we've already got it, as well as taking care of the auto-align
5896 feature wrt labels. */
5899 alpha_align (n, pfill, label, force)
5903 int force ATTRIBUTE_UNUSED;
5905 if (alpha_current_align >= n)
5910 if (subseg_text_p (now_seg))
5911 frag_align_code (n, 0);
5913 frag_align (n, 0, 0);
5916 frag_align (n, *pfill, 0);
5918 alpha_current_align = n;
5920 if (label != NULL && S_GET_SEGMENT (label) == now_seg)
5922 symbol_set_frag (label, frag_now);
5923 S_SET_VALUE (label, (valueT) frag_now_fix ());
5926 record_alignment (now_seg, n);
5928 /* ??? If alpha_flag_relax && force && elf, record the requested alignment
5929 in a reloc for the linker to see. */
5932 /* This is called from HANDLE_ALIGN in write.c. Fill in the contents
5933 of an rs_align_code fragment. */
5936 alpha_handle_align (fragp)
5939 static char const unop[4] = { 0x00, 0x00, 0xfe, 0x2f };
5940 static char const nopunop[8] = {
5941 0x1f, 0x04, 0xff, 0x47,
5942 0x00, 0x00, 0xfe, 0x2f
5948 if (fragp->fr_type != rs_align_code)
5951 bytes = fragp->fr_next->fr_address - fragp->fr_address - fragp->fr_fix;
5952 p = fragp->fr_literal + fragp->fr_fix;
5965 memcpy (p, unop, 4);
5971 memcpy (p, nopunop, 8);
5973 fragp->fr_fix += fix;
5977 /* The Alpha has support for some VAX floating point types, as well as for
5978 IEEE floating point. We consider IEEE to be the primary floating point
5979 format, and sneak in the VAX floating point support here. */
5980 #define md_atof vax_md_atof
5981 #include "config/atof-vax.c"