1 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
3 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
6 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
8 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
9 * doc/c-i386.texi: Add -march=bdver4 option.
11 2013-09-20 Alan Modra <amodra@gmail.com>
13 * configure: Regenerate.
15 2013-09-18 Tristan Gingold <gingold@adacore.com>
17 * NEWS: Add marker for 2.24.
19 2013-09-18 Nick Clifton <nickc@redhat.com>
21 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
22 (move_data): New variable.
23 (md_parse_option): Parse -md.
24 (msp430_section): New function. Catch references to the .bss or
25 .data sections and generate a special symbol for use by the libcrt
27 (md_pseudo_table): Intercept .section directives.
29 (md_show_usage): Likewise.
30 (msp430_operands): Generate a warning message if a NOP is inserted
31 into the instruction stream.
32 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
34 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
36 * config/tc-mips.c (mips_elf_final_processing): Set
37 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
39 2013-09-16 Will Newton <will.newton@linaro.org>
41 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
42 disallowing element size 64 with interleave other than 1.
44 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
46 * config/tc-mips.c (match_insn): Set error when $31 is used for
49 2013-09-04 Tristan Gingold <gingold@adacore.com>
51 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
54 2013-09-04 Roland McGrath <mcgrathr@google.com>
57 * config/tc-arm.c (T16_32_TAB): Add _udf.
58 (do_t_udf): New function.
61 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
63 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
64 assembler errors at correct position.
66 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
69 * config/tc-ia64.c: Fix typos.
70 * config/tc-sparc.c: Likewise.
71 * config/tc-z80.c: Likewise.
72 * doc/c-i386.texi: Likewise.
73 * doc/c-m32r.texi: Likewise.
75 2013-08-23 Will Newton <will.newton@linaro.org>
77 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
78 for pre-indexed addressing modes.
80 2013-08-21 Alan Modra <amodra@gmail.com>
82 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
83 range check label number for use with fb_low_counter array.
85 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
87 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
88 (mips_parse_argument_token, validate_micromips_insn, md_begin)
89 (check_regno, match_float_constant, check_completed_insn, append_insn)
90 (match_insn, match_mips16_insn, match_insns, macro_start)
91 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
92 (mips16_ip, mips_set_option_string, md_parse_option)
93 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
94 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
95 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
96 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
97 Start error messages with a lower-case letter. Do not end error
98 messages with a period. Wrap long messages to 80 character-lines.
99 Use "cannot" instead of "can't" and "can not".
101 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
103 * config/tc-mips.c (imm_expr): Expand comment.
104 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
107 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
109 * config/tc-mips.c (imm2_expr): Delete.
110 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
112 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
114 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
115 (macro): Remove M_DEXT and M_DINS handling.
117 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
119 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
120 lax_max with lax_match.
121 (match_int_operand): Update accordingly. Don't report an error
122 for !lax_match-only cases.
123 (match_insn): Replace more_alts with lax_match and use it to
124 initialize the mips_arg_info field. Add a complete_p parameter.
125 Handle implicit VU0 suffixes here.
126 (match_invalid_for_isa, match_insns, match_mips16_insns): New
128 (mips_ip, mips16_ip): Use them.
130 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
132 * config/tc-mips.c (match_expression): Report uses of registers here.
133 Add a "must be an immediate expression" error. Handle elided offsets
135 (match_int_operand): ...here.
137 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
139 * config/tc-mips.c (mips_arg_info): Remove soft_match.
140 (match_out_of_range, match_not_constant): New functions.
141 (match_const_int): Remove fallback parameter and check for soft_match.
142 Use match_not_constant.
143 (match_mapped_int_operand, match_addiusp_operand)
144 (match_perf_reg_operand, match_save_restore_list_operand)
145 (match_mdmx_imm_reg_operand): Update accordingly. Use
146 match_out_of_range and set_insn_error* instead of as_bad.
147 (match_int_operand): Likewise. Use match_not_constant in the
148 !allows_nonconst case.
149 (match_float_constant): Report invalid float constants.
150 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
151 match_float_constant to check for invalid constants. Fail the
152 match if match_const_int or match_float_constant return false.
153 (mips_ip): Update accordingly.
154 (mips16_ip): Likewise. Undo null termination of instruction name
155 once lookup is complete.
157 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
159 * config/tc-mips.c (mips_insn_error_format): New enum.
160 (mips_insn_error): New struct.
161 (insn_error): Change to a mips_insn_error.
162 (clear_insn_error, set_insn_error_format, set_insn_error)
163 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
165 (mips_parse_argument_token, md_assemble, match_insn)
166 (match_mips16_insn): Use them instead of manipulating insn_error
168 (mips_ip, mips16_ip): Likewise. Simplify control flow.
170 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
172 * config/tc-mips.c (normalize_constant_expr): Move further up file.
173 (normalize_address_expr): Likewise.
174 (match_insn, match_mips16_insn): New functions, split out from...
175 (mips_ip, mips16_ip): ...here.
177 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
179 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
181 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
182 for optional operands.
184 2013-08-16 Alan Modra <amodra@gmail.com>
186 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
189 2013-08-16 Alan Modra <amodra@gmail.com>
191 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
193 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
195 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
196 argument as alignment.
198 2013-08-09 Nick Clifton <nickc@redhat.com>
200 * config/tc-rl78.c (elf_flags): New variable.
201 (enum options): Add OPTION_G10.
202 (md_longopts): Add mg10.
203 (md_parse_option): Parse -mg10.
204 (rl78_elf_final_processing): New function.
205 * config/tc-rl78.c (tc_final_processing): Define.
206 * doc/c-rl78.texi: Document -mg10 option.
208 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
210 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
211 suffixes to be elided too.
212 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
213 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
216 2013-08-05 John Tytgat <john@bass-software.com>
218 * po/POTFILES.in: Regenerate.
220 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
221 Konrad Eisele <konrad@gaisler.com>
223 * config/tc-sparc.c (sparc_arch_types): Add leon.
224 (sparc_arch): Move sparc4 around and add leon.
225 (sparc_target_format): Document -Aleon.
226 * doc/c-sparc.texi: Likewise.
228 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
230 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
232 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
233 Richard Sandiford <rdsandiford@googlemail.com>
235 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
236 (RWARN): Bump to 0x8000000.
237 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
238 (RTYPE_R5900_ACC): New register types.
239 (RTYPE_MASK): Include them.
240 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
242 (reg_names): Include them.
243 (mips_parse_register_1): New function, split out from...
244 (mips_parse_register): ...here. Add a channels_ptr parameter.
245 Look for VU0 channel suffixes when nonnull.
246 (reg_lookup): Update the call to mips_parse_register.
247 (mips_parse_vu0_channels): New function.
248 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
249 (mips_operand_token): Add a "channels" field to the union.
250 Extend the comment above "ch" to OT_DOUBLE_CHAR.
251 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
252 (mips_parse_argument_token): Handle channel suffixes here too.
253 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
254 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
256 (md_begin): Register $vfN and $vfI registers.
257 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
258 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
259 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
260 (match_vu0_suffix_operand): New function.
261 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
262 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
263 (mips_lookup_insn): New function.
264 (mips_ip): Use it. Allow "+K" operands to be elided at the end
265 of an instruction. Handle '#' sequences.
267 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
269 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
270 values and use it instead of sreg, treg, xreg, etc.
272 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
274 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
275 and mips_int_operand_max.
276 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
278 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
279 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
280 instead of mips16_immed_operand.
282 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
284 * config/tc-mips.c (mips16_macro): Don't use move_register.
285 (mips16_ip): Allow macros to use 'p'.
287 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
289 * config/tc-mips.c (MAX_OPERANDS): New macro.
290 (mips_operand_array): New structure.
291 (mips_operands, mips16_operands, micromips_operands): New arrays.
292 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
293 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
294 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
295 (micromips_to_32_reg_q_map): Delete.
296 (insn_operands, insn_opno, insn_extract_operand): New functions.
297 (validate_mips_insn): Take a mips_operand_array as argument and
298 use it to build up a list of operands. Extend to handle INSN_MACRO
300 (validate_mips16_insn): New function.
301 (validate_micromips_insn): Take a mips_operand_array as argument.
303 (md_begin): Initialize mips_operands, mips16_operands and
304 micromips_operands. Call validate_mips_insn and
305 validate_micromips_insn for macro instructions too.
306 Call validate_mips16_insn for MIPS16 instructions.
307 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
309 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
310 them. Handle INSN_UDI.
311 (get_append_method): Use gpr_read_mask.
313 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
315 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
316 flags for MIPS16 and non-MIPS16 instructions.
317 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
318 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
319 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
320 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
321 and non-MIPS16 instructions. Fix formatting.
323 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
325 * config/tc-mips.c (reg_needs_delay): Move later in file.
327 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
329 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
330 Alexander Ivchenko <alexander.ivchenko@intel.com>
331 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
332 Sergey Lega <sergey.s.lega@intel.com>
333 Anna Tikhonova <anna.tikhonova@intel.com>
334 Ilya Tocar <ilya.tocar@intel.com>
335 Andrey Turetskiy <andrey.turetskiy@intel.com>
336 Ilya Verbin <ilya.verbin@intel.com>
337 Kirill Yukhin <kirill.yukhin@intel.com>
338 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
340 * config/tc-i386-intel.c (O_zmmword_ptr): New.
341 (i386_types): Add zmmword.
342 (i386_intel_simplify_register): Allow regzmm.
343 (i386_intel_simplify): Handle zmmwords.
344 (i386_intel_operand): Handle RC/SAE, vector operations and
346 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
347 (struct RC_Operation): New.
348 (struct Mask_Operation): New.
349 (struct Broadcast_Operation): New.
350 (vex_prefix): Size of bytes increased to 4 to support EVEX
352 (enum i386_error): Add new error codes: unsupported_broadcast,
353 broadcast_not_on_src_operand, broadcast_needed,
354 unsupported_masking, mask_not_on_destination, no_default_mask,
355 unsupported_rc_sae, rc_sae_operand_not_last_imm,
356 invalid_register_operand, try_vector_disp8.
357 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
358 rounding, broadcast, memshift.
359 (struct RC_name): New.
360 (RC_NamesTable): New.
363 (extra_symbol_chars): Add '{'.
364 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
365 (i386_operand_type): Add regzmm, regmask and vec_disp8.
366 (match_mem_size): Handle zmmwords.
367 (operand_type_match): Handle zmm-registers.
368 (mode_from_disp_size): Handle vec_disp8.
369 (fits_in_vec_disp8): New.
370 (md_begin): Handle {} properly.
371 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
372 (build_vex_prefix): Handle vrex.
373 (build_evex_prefix): New.
374 (process_immext): Adjust to properly handle EVEX.
375 (md_assemble): Add EVEX encoding support.
376 (swap_2_operands): Correctly handle operands with masking,
377 broadcasting or RC/SAE.
378 (check_VecOperands): Support EVEX features.
379 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
380 (match_template): Support regzmm and handle new error codes.
381 (process_suffix): Handle zmmwords and zmm-registers.
382 (check_byte_reg): Extend to zmm-registers.
383 (process_operands): Extend to zmm-registers.
384 (build_modrm_byte): Handle EVEX.
385 (output_insn): Adjust to properly handle EVEX case.
386 (disp_size): Handle vec_disp8.
387 (output_disp): Support compressed disp8*N evex feature.
388 (output_imm): Handle RC/SAE immediates properly.
389 (check_VecOperations): New.
390 (i386_immediate): Handle EVEX features.
391 (i386_index_check): Handle zmmwords and zmm-registers.
392 (RC_SAE_immediate): New.
393 (i386_att_operand): Handle EVEX features.
394 (parse_real_register): Add a check for ZMM/Mask registers.
395 (OPTION_MEVEXLIG): New.
396 (OPTION_MEVEXWIG): New.
397 (md_longopts): Add mevexlig and mevexwig.
398 (md_parse_option): Handle mevexlig and mevexwig options.
399 (md_show_usage): Add description for mevexlig and mevexwig.
400 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
401 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
403 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
405 * config/tc-i386.c (cpu_arch): Add .sha.
406 * doc/c-i386.texi: Document sha/.sha.
408 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
409 Kirill Yukhin <kirill.yukhin@intel.com>
410 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
412 * config/tc-i386.c (BND_PREFIX): New.
413 (struct _i386_insn): Add new field bnd_prefix.
414 (add_bnd_prefix): New.
416 (i386_operand_type): Add regbnd.
417 (md_assemble): Handle BND prefixes.
418 (parse_insn): Likewise.
419 (output_branch): Likewise.
420 (output_jump): Likewise.
421 (build_modrm_byte): Handle regbnd.
422 (OPTION_MADD_BND_PREFIX): New.
423 (md_longopts): Add entry for 'madd-bnd-prefix'.
424 (md_parse_option): Handle madd-bnd-prefix option.
425 (md_show_usage): Add description for madd-bnd-prefix
427 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
429 2013-07-24 Tristan Gingold <gingold@adacore.com>
431 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
434 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
436 * config/tc-s390.c (s390_machine): Don't force the .machine
437 argument to lower case.
439 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
441 * config/tc-arm.c (s_arm_arch_extension): Improve error message
442 for invalid extension.
444 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
446 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
447 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
448 (aarch64_abi): New variable.
449 (ilp32_p): Change to be a macro.
450 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
451 (struct aarch64_option_abi_value_table): New struct.
452 (aarch64_abis): New table.
453 (aarch64_parse_abi): New function.
454 (aarch64_long_opts): Add entry for -mabi=.
455 * doc/as.texinfo (Target AArch64 options): Document -mabi.
456 * doc/c-aarch64.texi: Likewise.
458 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
460 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
463 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
465 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
467 * config/rx-parse.y: (rx_check_float_support): Add function to
468 check floating point operation support for target RX100 and
470 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
471 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
472 RX200, RX600, and RX610
474 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
476 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
478 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
480 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
481 * doc/c-avr.texi: Likewise.
483 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
485 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
486 error with older GCCs.
487 (mips16_macro_build): Dereference args.
489 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
491 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
492 New functions, split out from...
493 (reg_lookup): ...here. Remove itbl support.
494 (reglist_lookup): Delete.
495 (mips_operand_token_type): New enum.
496 (mips_operand_token): New structure.
497 (mips_operand_tokens): New variable.
498 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
499 (mips_parse_arguments): New functions.
500 (md_begin): Initialize mips_operand_tokens.
501 (mips_arg_info): Add a token field. Remove optional_reg field.
502 (match_char, match_expression): New functions.
503 (match_const_int): Use match_expression. Remove "s" argument
504 and return a boolean result. Remove O_register handling.
505 (match_regno, match_reg, match_reg_range): New functions.
506 (match_int_operand, match_mapped_int_operand, match_msb_operand)
507 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
508 (match_addiusp_operand, match_clo_clz_dest_operand)
509 (match_lwm_swm_list_operand, match_entry_exit_operand)
510 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
511 (match_tied_reg_operand): Remove "s" argument and return a boolean
512 result. Match tokens rather than text. Update calls to
513 match_const_int. Rely on match_regno to call check_regno.
514 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
515 "arg" argument. Return a boolean result.
516 (parse_float_constant): Replace with...
517 (match_float_constant): ...this new function.
518 (match_operand): Remove "s" argument and return a boolean result.
519 Update calls to subfunctions.
520 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
521 rather than string-parsing routines. Update handling of optional
522 registers for token scheme.
524 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
526 * config/tc-mips.c (parse_float_constant): Split out from...
529 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
531 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
534 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
536 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
537 (match_entry_exit_operand): New function.
538 (match_save_restore_list_operand): Likewise.
539 (match_operand): Use them.
540 (check_absolute_expr): Delete.
541 (mips16_ip): Rewrite main parsing loop to use mips_operands.
543 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
545 * config/tc-mips.c: Enable functions commented out in previous patch.
546 (SKIP_SPACE_TABS): Move further up file.
547 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
548 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
549 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
550 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
551 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
552 (micromips_imm_b_map, micromips_imm_c_map): Delete.
553 (mips_lookup_reg_pair): Delete.
554 (macro): Use report_bad_range and report_bad_field.
555 (mips_immed, expr_const_in_range): Delete.
556 (mips_ip): Rewrite main parsing loop to use new functions.
558 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
560 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
561 Change return type to bfd_boolean.
562 (report_bad_range, report_bad_field): New functions.
563 (mips_arg_info): New structure.
564 (match_const_int, convert_reg_type, check_regno, match_int_operand)
565 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
566 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
567 (match_addiusp_operand, match_clo_clz_dest_operand)
568 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
569 (match_pc_operand, match_tied_reg_operand, match_operand)
570 (check_completed_insn): New functions, commented out for now.
572 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
574 * config/tc-mips.c (insn_insert_operand): New function.
575 (macro_build, mips16_macro_build): Put null character check
576 in the for loop and convert continues to breaks. Use operand
577 structures to handle constant operands.
579 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
581 * config/tc-mips.c (validate_mips_insn): Move further up file.
582 Add insn_bits and decode_operand arguments. Use the mips_operand
583 fields to work out which bits an operand occupies. Detect double
585 (validate_micromips_insn): Move further up file. Call into
588 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
590 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
592 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
594 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
596 (macro): Update accordingly.
598 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
600 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
602 (md_assemble): Remove imm_reloc handling.
603 (mips_ip): Update commentary. Use offset_expr and offset_reloc
604 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
605 Use a temporary array rather than imm_reloc when parsing
606 constant expressions. Remove imm_reloc initialization.
607 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
608 for the relaxable field. Use a relax_char variable to track the
609 type of this field. Remove imm_reloc initialization.
611 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
613 * config/tc-mips.c (mips16_ip): Handle "I".
615 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
617 * config/tc-mips.c (mips_flag_nan2008): New variable.
618 (options): Add OPTION_NAN enum value.
619 (md_longopts): Handle it.
620 (md_parse_option): Likewise.
621 (s_nan): New function.
622 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
623 (md_show_usage): Add -mnan.
625 * doc/as.texinfo (Overview): Add -mnan.
626 * doc/c-mips.texi (MIPS Opts): Document -mnan.
627 (MIPS NaN Encodings): New node. Document .nan directive.
628 (MIPS-Dependent): List the new node.
630 2013-07-09 Tristan Gingold <gingold@adacore.com>
632 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
634 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
636 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
637 for 'A' and assume that the constant has been elided if the result
640 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
642 * config/tc-mips.c (gprel16_reloc_p): New function.
643 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
645 (offset_high_part, small_offset_p): New functions.
646 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
647 register load and store macros, handle the 16-bit offset case first.
648 If a 16-bit offset is not suitable for the instruction we're
649 generating, load it into the temporary register using
650 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
651 M_L_DAB code once the address has been constructed. For double load
652 and store macros, again handle the 16-bit offset case first.
653 If the second register cannot be accessed from the same high
654 part as the first, load it into AT using ADDRESS_ADDI_INSN.
655 Fix the handling of LD in cases where the first register is the
656 same as the base. Also handle the case where the offset is
657 not 16 bits and the second register cannot be accessed from the
658 same high part as the first. For unaligned loads and stores,
659 fuse the offbits == 12 and old "ab" handling. Apply this handling
660 whenever the second offset needs a different high part from the first.
661 Construct the offset using ADDRESS_ADDI_INSN where possible,
662 for offbits == 16 as well as offbits == 12. Use offset_reloc
663 when constructing the individual loads and stores.
664 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
665 and offset_reloc before matching against a particular opcode.
666 Handle elided 'A' constants. Allow 'A' constants to use
667 relocation operators.
669 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
671 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
672 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
673 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
675 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
677 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
678 Require the msb to be <= 31 for "+s". Check that the size is <= 31
679 for both "+s" and "+S".
681 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
683 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
684 (mips_ip, mips16_ip): Handle "+i".
686 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
688 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
689 (micromips_to_32_reg_h_map): Rename to...
690 (micromips_to_32_reg_h_map1): ...this.
691 (micromips_to_32_reg_i_map): Rename to...
692 (micromips_to_32_reg_h_map2): ...this.
693 (mips_lookup_reg_pair): New function.
694 (gpr_write_mask, macro): Adjust after above renaming.
695 (validate_micromips_insn): Remove "mi" handling.
696 (mips_ip): Likewise. Parse both registers in a pair for "mh".
698 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
700 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
701 (mips_ip): Remove "+D" and "+T" handling.
703 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
705 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
708 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
710 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
712 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
714 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
715 (aarch64_force_relocation): Likewise.
717 2013-07-02 Alan Modra <amodra@gmail.com>
719 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
721 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
723 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
724 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
725 Replace @sc{mips16} with literal `MIPS16'.
726 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
728 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
730 * config/tc-aarch64.c (reloc_table): Replace
731 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
732 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
733 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
734 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
735 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
736 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
737 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
738 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
739 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
740 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
741 (aarch64_force_relocation): Likewise.
743 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
745 * config/tc-aarch64.c (ilp32_p): New static variable.
746 (elf64_aarch64_target_format): Return the target according to the
748 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
749 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
750 (aarch64_dwarf2_addr_size): New function.
751 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
752 (DWARF2_ADDR_SIZE): New define.
754 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
756 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
758 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
760 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
762 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
764 * config/tc-mips.c (mips_set_options): Add insn32 member.
765 (mips_opts): Initialize it.
766 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
767 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
768 (md_longopts): Add "minsn32" and "mno-insn32" options.
769 (is_size_valid): Handle insn32 mode.
770 (md_assemble): Pass instruction string down to macro.
771 (brk_fmt): Add second dimension and insn32 mode initializers.
772 (mfhl_fmt): Likewise.
773 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
774 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
775 (macro_build_jalr, move_register): Handle insn32 mode.
776 (macro_build_branch_rs): Likewise.
777 (macro): Handle insn32 mode.
778 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
779 (mips_ip): Handle insn32 mode.
780 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
781 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
782 (mips_handle_align): Handle insn32 mode.
783 (md_show_usage): Add -minsn32 and -mno-insn32.
785 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
787 (-minsn32, -mno-insn32): New options.
788 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
790 (MIPS assembly options): New node. Document .set insn32 and
792 (MIPS-Dependent): List the new node.
794 2013-06-25 Nick Clifton <nickc@redhat.com>
796 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
797 the PC in indirect addressing on 430xv2 parts.
798 (msp430_operands): Add version test to hardware bug encoding
801 2013-06-24 Roland McGrath <mcgrathr@google.com>
803 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
804 so it skips whitespace before it.
805 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
807 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
808 (arm_reg_parse_multi): Skip whitespace first.
809 (parse_reg_list): Likewise.
810 (parse_vfp_reg_list): Likewise.
811 (s_arm_unwind_save_mmxwcg): Likewise.
813 2013-06-24 Nick Clifton <nickc@redhat.com>
816 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
818 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
820 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
822 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
824 * config/tc-mips.c: Assert that offsetT and valueT are at least
826 (GPR_SMIN, GPR_SMAX): New macros.
827 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
829 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
831 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
832 conditions. Remove any code deselected by them.
833 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
835 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
837 * NEWS: Note removal of ECOFF support.
838 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
839 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
840 (MULTI_CFILES): Remove config/e-mipsecoff.c.
841 * Makefile.in: Regenerate.
842 * configure.in: Remove MIPS ECOFF references.
843 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
845 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
846 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
847 (mips-*-*): ...this single case.
848 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
849 MIPS emulations to be e-mipself*.
850 * configure: Regenerate.
851 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
852 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
853 (mips-*-sysv*): Remove coff and ecoff cases.
854 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
855 * ecoff.c: Remove reference to MIPS ECOFF.
856 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
857 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
858 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
859 (mips_hi_fixup): Tweak comment.
860 (append_insn): Require a howto.
861 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
863 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
865 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
866 Use "CPU" instead of "cpu".
867 * doc/c-mips.texi: Likewise.
868 (MIPS Opts): Rename to MIPS Options.
869 (MIPS option stack): Rename to MIPS Option Stack.
870 (MIPS ASE instruction generation overrides): Rename to
871 MIPS ASE Instruction Generation Overrides (for now).
872 (MIPS floating-point): Rename to MIPS Floating-Point.
874 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
876 * doc/c-mips.texi (MIPS Macros): New section.
877 (MIPS Object): Replace with...
878 (MIPS Small Data): ...this new section.
880 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
882 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
883 Capitalize name. Use @kindex instead of @cindex for .set entries.
885 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
887 * doc/c-mips.texi (MIPS Stabs): Remove section.
889 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
891 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
892 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
893 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
894 (ISA_SUPPORTS_VIRT64_ASE): Delete.
895 (mips_ase): New structure.
896 (mips_ases): New table.
897 (FP64_ASES): New macro.
898 (mips_ase_groups): New array.
899 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
900 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
902 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
903 (md_parse_option): Use mips_ases and mips_set_ase instead of
904 separate case statements for each ASE option.
905 (mips_after_parse_args): Use FP64_ASES. Use
906 mips_check_isa_supports_ases to check the ASEs against
908 (s_mipsset): Use mips_ases and mips_set_ase instead of
909 separate if statements for each ASE option. Use
910 mips_check_isa_supports_ases, even when a non-ASE option
913 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
915 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
917 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
919 * config/tc-mips.c (md_shortopts, options, md_longopts)
920 (md_longopts_size): Move earlier in file.
922 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
924 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
925 with a single "ase" bitmask.
926 (mips_opts): Update accordingly.
927 (file_ase, file_ase_explicit): New variables.
928 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
929 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
930 (ISA_HAS_ROR): Adjust for mips_set_options change.
931 (is_opcode_valid): Take the base ase mask directly from mips_opts.
932 (mips_ip): Adjust for mips_set_options change.
933 (md_parse_option): Likewise. Update file_ase_explicit.
934 (mips_after_parse_args): Adjust for mips_set_options change.
935 Use bitmask operations to select the default ASEs. Set file_ase
936 rather than individual per-ASE variables.
937 (s_mipsset): Adjust for mips_set_options change.
938 (mips_elf_final_processing): Test file_ase rather than
939 file_ase_mdmx. Remove commented-out code.
941 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
943 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
944 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
945 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
946 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
947 (mips_after_parse_args): Use the new "ase" field to choose
949 (mips_cpu_info_table): Move ASEs from the "flags" field to the
952 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
954 * config/tc-arm.c (symbol_preemptible): New function.
955 (relax_branch): Use it.
957 2013-06-17 Catherine Moore <clm@codesourcery.com>
958 Maciej W. Rozycki <macro@codesourcery.com>
959 Chao-Ying Fu <fu@mips.com>
961 * config/tc-mips.c (mips_set_options): Add ase_eva.
962 (mips_set_options mips_opts): Add ase_eva.
963 (file_ase_eva): Declare.
964 (ISA_SUPPORTS_EVA_ASE): Define.
965 (IS_SEXT_9BIT_NUM): Define.
966 (MIPS_CPU_ASE_EVA): Define.
967 (is_opcode_valid): Add support for ase_eva.
968 (macro_build): Likewise.
970 (validate_mips_insn): Likewise.
971 (validate_micromips_insn): Likewise.
973 (options): Add OPTION_EVA and OPTION_NO_EVA.
974 (md_longopts): Add -meva and -mno-eva.
975 (md_parse_option): Process new options.
976 (mips_after_parse_args): Check for valid EVA combinations.
977 (s_mipsset): Likewise.
979 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
981 * dwarf2dbg.h (dwarf2_move_insn): Declare.
982 * dwarf2dbg.c (line_subseg): Add pmove_tail.
983 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
984 (dwarf2_gen_line_info_1): Update call accordingly.
985 (dwarf2_move_insn): New function.
986 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
988 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
992 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
995 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
996 (dwarf2_gen_line_info_1): Delete.
997 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
998 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
999 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1000 (dwarf2_directive_loc): Push previous .locs instead of generating
1003 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1005 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1006 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1008 2013-06-13 Nick Clifton <nickc@redhat.com>
1011 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1012 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1013 function. Generates an error if the adjusted offset is out of a
1016 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1018 * config/tc-nios2.c (md_apply_fix): Mask constant
1019 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1021 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1023 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1024 MIPS-3D instructions either.
1025 (md_convert_frag): Update the COPx branch mask accordingly.
1027 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1029 * doc/as.texinfo (Overview): Add --relax-branch and
1031 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1034 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1036 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1039 2013-06-08 Catherine Moore <clm@codesourcery.com>
1041 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1042 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1043 (append_insn): Change INSN_xxxx to ASE_xxxx.
1045 2013-06-01 George Thomas <george.thomas@atmel.com>
1047 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1050 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1052 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1055 2013-05-31 Paul Brook <paul@codesourcery.com>
1057 * config/tc-mips.c (s_ehword): New.
1059 2013-05-30 Paul Brook <paul@codesourcery.com>
1061 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1063 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1065 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1066 convert relocs who have no relocatable field either. Rephrase
1067 the conditional so that the PC-relative check is only applied
1070 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1072 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1075 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1077 * config/tc-aarch64.c (reloc_table): Update to use
1078 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1079 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1080 (md_apply_fix): Likewise.
1081 (aarch64_force_relocation): Likewise.
1083 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1085 * config/tc-arm.c (it_fsm_post_encode): Improve
1086 warning messages about deprecated IT block formats.
1088 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1090 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1091 inside fx_done condition.
1093 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1095 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1097 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1099 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1100 and clean up warning when using PRINT_OPCODE_TABLE.
1102 2013-05-20 Alan Modra <amodra@gmail.com>
1104 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1105 and data fixups performing shift/high adjust/sign extension on
1106 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1107 when writing data fixups rather than recalculating size.
1109 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1111 * doc/c-msp430.texi: Fix typo.
1113 2013-05-16 Tristan Gingold <gingold@adacore.com>
1115 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1116 are also TOC symbols.
1118 2013-05-16 Nick Clifton <nickc@redhat.com>
1120 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1121 Add -mcpu command to specify core type.
1122 * doc/c-msp430.texi: Update documentation.
1124 2013-05-09 Andrew Pinski <apinski@cavium.com>
1126 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1127 (mips_opts): Update for the new field.
1128 (file_ase_virt): New variable.
1129 (ISA_SUPPORTS_VIRT_ASE): New macro.
1130 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1131 (MIPS_CPU_ASE_VIRT): New define.
1132 (is_opcode_valid): Handle ase_virt.
1133 (macro_build): Handle "+J".
1134 (validate_mips_insn): Likewise.
1135 (mips_ip): Likewise.
1136 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1137 (md_longopts): Add mvirt and mnovirt
1138 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1139 (mips_after_parse_args): Handle ase_virt field.
1140 (s_mipsset): Handle "virt" and "novirt".
1141 (mips_elf_final_processing): Add a comment about virt ASE might need
1143 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1144 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1145 Document ".set virt" and ".set novirt".
1147 2013-05-09 Alan Modra <amodra@gmail.com>
1149 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1150 control of operand flag bits.
1152 2013-05-07 Alan Modra <amodra@gmail.com>
1154 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1155 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1156 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1157 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1158 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1159 Shift and sign-extend fieldval for use by some VLE reloc
1160 operand->insert functions.
1162 2013-05-06 Paul Brook <paul@codesourcery.com>
1163 Catherine Moore <clm@codesourcery.com>
1165 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1166 (limited_pcrel_reloc_p): Likewise.
1167 (md_apply_fix): Likewise.
1168 (tc_gen_reloc): Likewise.
1170 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1172 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1173 (mips_fix_adjustable): Adjust pc-relative check to use
1176 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1178 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1179 (s_mips_stab): Do not restrict to stabn only.
1181 2013-05-02 Nick Clifton <nickc@redhat.com>
1183 * config/tc-msp430.c: Add support for the MSP430X architecture.
1184 Add code to insert a NOP instruction after any instruction that
1185 might change the interrupt state.
1186 Add support for the LARGE memory model.
1187 Add code to initialise the .MSP430.attributes section.
1188 * config/tc-msp430.h: Add support for the MSP430X architecture.
1189 * doc/c-msp430.texi: Document the new -mL and -mN command line
1191 * NEWS: Mention support for the MSP430X architecture.
1193 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1195 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1196 alpha*-*-linux*ecoff*.
1198 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1200 * config/tc-mips.c (mips_ip): Add sizelo.
1201 For "+C", "+G", and "+H", set sizelo and compare against it.
1203 2013-04-29 Nick Clifton <nickc@redhat.com>
1205 * as.c (Options): Add -gdwarf-sections.
1206 (parse_args): Likewise.
1207 * as.h (flag_dwarf_sections): Declare.
1208 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1209 (process_entries): When -gdwarf-sections is enabled generate
1210 fragmentary .debug_line sections.
1211 (out_debug_line): Set the section for the .debug_line section end
1213 * doc/as.texinfo: Document -gdwarf-sections.
1214 * NEWS: Mention -gdwarf-sections.
1216 2013-04-26 Christian Groessler <chris@groessler.org>
1218 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1219 according to the target parameter. Don't call s_segm since s_segm
1220 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1222 (md_begin): Call s_segm according to target parameter from command
1225 2013-04-25 Alan Modra <amodra@gmail.com>
1227 * configure.in: Allow little-endian linux.
1228 * configure: Regenerate.
1230 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1232 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1233 "fstatus" control register to "eccinj".
1235 2013-04-19 Kai Tietz <ktietz@redhat.com>
1237 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1239 2013-04-15 Julian Brown <julian@codesourcery.com>
1241 * expr.c (add_to_result, subtract_from_result): Make global.
1242 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1243 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1244 subtract_from_result to handle extra bit of precision for .sleb128
1247 2013-04-10 Julian Brown <julian@codesourcery.com>
1249 * read.c (convert_to_bignum): Add sign parameter. Use it
1250 instead of X_unsigned to determine sign of resulting bignum.
1251 (emit_expr): Pass extra argument to convert_to_bignum.
1252 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1253 X_extrabit to convert_to_bignum.
1254 (parse_bitfield_cons): Set X_extrabit.
1255 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1256 Initialise X_extrabit field as appropriate.
1257 (add_to_result): New.
1258 (subtract_from_result): New.
1260 * expr.h (expressionS): Add X_extrabit field.
1262 2013-04-10 Jan Beulich <jbeulich@suse.com>
1264 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1265 register being PC when is_t or writeback, and use distinct
1266 diagnostic for the latter case.
1268 2013-04-10 Jan Beulich <jbeulich@suse.com>
1270 * gas/config/tc-arm.c (parse_operands): Re-write
1271 po_barrier_or_imm().
1272 (do_barrier): Remove bogus constraint().
1273 (do_t_barrier): Remove.
1275 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1277 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1278 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1280 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1282 2013-04-09 Jan Beulich <jbeulich@suse.com>
1284 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1285 Use local variable Rt in more places.
1286 (do_vmsr): Accept all control registers.
1288 2013-04-09 Jan Beulich <jbeulich@suse.com>
1290 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1291 if there was none specified for moves between scalar and core
1294 2013-04-09 Jan Beulich <jbeulich@suse.com>
1296 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1297 NEON_ALL_LANES case.
1299 2013-04-08 Jan Beulich <jbeulich@suse.com>
1301 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1304 2013-04-08 Jan Beulich <jbeulich@suse.com>
1306 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1309 2013-04-03 Alan Modra <amodra@gmail.com>
1311 * doc/as.texinfo: Add support to generate man options for h8300.
1312 * doc/c-h8300.texi: Likewise.
1314 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1316 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1319 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1322 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1324 2013-03-26 Nick Clifton <nickc@redhat.com>
1327 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1328 start of the file each time.
1331 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1334 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1336 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1339 2013-03-21 Will Newton <will.newton@linaro.org>
1341 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1342 pc-relative str instructions in Thumb mode.
1344 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1346 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1347 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1349 * config/tc-h8300.h: Remove duplicated defines.
1351 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1354 * tc-avr.c (mcu_has_3_byte_pc): New function.
1355 (tc_cfi_frame_initial_instructions): Call it to find return
1358 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1361 * config/tc-tic6x.c (tic6x_try_encode): Handle
1362 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1363 encode register pair numbers when required.
1365 2013-03-15 Will Newton <will.newton@linaro.org>
1367 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1368 in vstr in Thumb mode for pre-ARMv7 cores.
1370 2013-03-14 Andreas Schwab <schwab@suse.de>
1372 * doc/c-arc.texi (ARC Directives): Revert last change and use
1373 @itemize instead of @table.
1374 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1376 2013-03-14 Nick Clifton <nickc@redhat.com>
1379 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1380 NULL message, instead just check ARM_CPU_IS_ANY directly.
1382 2013-03-14 Nick Clifton <nickc@redhat.com>
1385 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1387 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1388 to the @item directives.
1389 (ARM-Neon-Alignment): Move to correct place in the document.
1390 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1392 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1395 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1397 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1398 case. Add default BAD_CASE to switch.
1400 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1402 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1403 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1405 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1407 * config/tc-arm.c (crc_ext_armv8): New feature set.
1408 (UNPRED_REG): New macro.
1409 (do_crc32_1): New function.
1410 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1411 do_crc32ch, do_crc32cw): Likewise.
1413 (insns): Add entries for crc32 mnemonics.
1414 (arm_extensions): Add entry for crc.
1416 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1418 * write.h (struct fix): Add fx_dot_frag field.
1419 (dot_frag): Declare.
1420 * write.c (dot_frag): New variable.
1421 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1422 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1423 * expr.c (expr): Save value of frag_now in dot_frag when setting
1425 * read.c (emit_expr): Likewise. Delete comments.
1427 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1429 * config/tc-i386.c (flag_code_names): Removed.
1430 (i386_index_check): Rewrote.
1432 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1434 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1436 (aarch64_double_precision_fmovable): New function.
1437 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1438 function; handle hexadecimal representation of IEEE754 encoding.
1439 (parse_operands): Update the call to parse_aarch64_imm_float.
1441 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1443 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1444 (check_hle): Updated.
1445 (md_assemble): Likewise.
1446 (parse_insn): Likewise.
1448 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1450 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1451 (md_assemble): Check if REP prefix is OK.
1452 (parse_insn): Remove expecting_string_instruction. Set
1455 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1457 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1459 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1461 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1462 for system registers.
1464 2013-02-27 DJ Delorie <dj@redhat.com>
1466 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1467 (rl78_op): Handle %code().
1468 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1469 (tc_gen_reloc): Likwise; convert to a computed reloc.
1470 (md_apply_fix): Likewise.
1472 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1474 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1476 2013-02-25 Terry Guo <terry.guo@arm.com>
1478 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1479 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1480 list of accepted CPUs.
1482 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1485 * config/tc-i386.c (cpu_arch): Add ".smap".
1487 * doc/c-i386.texi: Document smap.
1489 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1491 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1492 mips_assembling_insn appropriately.
1493 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1495 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1497 * config/tc-mips.c (append_insn): Correct indentation, remove
1500 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1502 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1504 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1506 * configure.tgt: Add nios2-*-rtems*.
1508 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1510 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1513 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1515 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1516 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1518 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1520 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1523 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1524 Andrew Jenner <andrew@codesourcery.com>
1526 Based on patches from Altera Corporation.
1528 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1529 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1530 * Makefile.in: Regenerated.
1531 * configure.tgt: Add case for nios2*-linux*.
1532 * config/obj-elf.c: Conditionally include elf/nios2.h.
1533 * config/tc-nios2.c: New file.
1534 * config/tc-nios2.h: New file.
1535 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1536 * doc/Makefile.in: Regenerated.
1537 * doc/all.texi: Set NIOSII.
1538 * doc/as.texinfo (Overview): Add Nios II options.
1539 (Machine Dependencies): Include c-nios2.texi.
1540 * doc/c-nios2.texi: New file.
1541 * NEWS: Note Altera Nios II support.
1543 2013-02-06 Alan Modra <amodra@gmail.com>
1546 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1547 Don't skip fixups with fx_subsy non-NULL.
1548 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1549 with fx_subsy non-NULL.
1551 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1553 * doc/c-metag.texi: Add "@c man" markers.
1555 2013-02-04 Alan Modra <amodra@gmail.com>
1557 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1559 (TC_ADJUST_RELOC_COUNT): Delete.
1560 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1562 2013-02-04 Alan Modra <amodra@gmail.com>
1564 * po/POTFILES.in: Regenerate.
1566 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1568 * config/tc-metag.c: Make SWAP instruction less permissive with
1571 2013-01-29 DJ Delorie <dj@redhat.com>
1573 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1574 relocs in .word/.etc statements.
1576 2013-01-29 Roland McGrath <mcgrathr@google.com>
1578 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1579 immediate value for 8-bit offset" error so it shows line info.
1581 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1583 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1586 2013-01-24 Nick Clifton <nickc@redhat.com>
1588 * config/tc-v850.c: Add support for e3v5 architecture.
1589 * doc/c-v850.texi: Mention new support.
1591 2013-01-23 Nick Clifton <nickc@redhat.com>
1594 * config/tc-avr.c: Include dwarf2dbg.h.
1596 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1598 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1599 (tc_i386_fix_adjustable): Likewise.
1600 (lex_got): Likewise.
1601 (tc_gen_reloc): Likewise.
1603 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1605 * config/tc-aarch64.c (output_operand_error_record): Change to output
1606 the out-of-range error message as value-expected message if there is
1607 only one single value in the expected range.
1608 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1609 LSL #0 as a programmer-friendly feature.
1611 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1613 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1614 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1615 BFD_RELOC_64_SIZE relocations.
1616 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1618 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1619 relocations against local symbols.
1621 2013-01-16 Alan Modra <amodra@gmail.com>
1623 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1624 finding some sort of toc syntax error, and break to avoid
1625 compiler uninit warning.
1627 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1630 * config/tc-i386.c (lex_got): Increment length by 1 if the
1631 relocation token is removed.
1633 2013-01-15 Nick Clifton <nickc@redhat.com>
1635 * config/tc-v850.c (md_assemble): Allow signed values for
1638 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1640 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1643 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1645 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1646 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1647 * config/tc-ppc.c (md_show_usage): Likewise.
1648 (ppc_handle_align): Handle power8's group ending nop.
1650 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1652 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1653 that the assember exits after the opcodes have been printed.
1655 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1657 * app.c: Remove trailing white spaces.
1661 * dw2gencfi.c: Likewise.
1662 * dwarf2dbg.h: Likewise.
1663 * ecoff.c: Likewise.
1664 * input-file.c: Likewise.
1665 * itbl-lex.h: Likewise.
1666 * output-file.c: Likewise.
1669 * subsegs.c: Likewise.
1670 * symbols.c: Likewise.
1671 * write.c: Likewise.
1672 * config/tc-i386.c: Likewise.
1673 * doc/Makefile.am: Likewise.
1674 * doc/Makefile.in: Likewise.
1675 * doc/c-aarch64.texi: Likewise.
1676 * doc/c-alpha.texi: Likewise.
1677 * doc/c-arc.texi: Likewise.
1678 * doc/c-arm.texi: Likewise.
1679 * doc/c-avr.texi: Likewise.
1680 * doc/c-bfin.texi: Likewise.
1681 * doc/c-cr16.texi: Likewise.
1682 * doc/c-d10v.texi: Likewise.
1683 * doc/c-d30v.texi: Likewise.
1684 * doc/c-h8300.texi: Likewise.
1685 * doc/c-hppa.texi: Likewise.
1686 * doc/c-i370.texi: Likewise.
1687 * doc/c-i386.texi: Likewise.
1688 * doc/c-i860.texi: Likewise.
1689 * doc/c-m32c.texi: Likewise.
1690 * doc/c-m32r.texi: Likewise.
1691 * doc/c-m68hc11.texi: Likewise.
1692 * doc/c-m68k.texi: Likewise.
1693 * doc/c-microblaze.texi: Likewise.
1694 * doc/c-mips.texi: Likewise.
1695 * doc/c-msp430.texi: Likewise.
1696 * doc/c-mt.texi: Likewise.
1697 * doc/c-s390.texi: Likewise.
1698 * doc/c-score.texi: Likewise.
1699 * doc/c-sh.texi: Likewise.
1700 * doc/c-sh64.texi: Likewise.
1701 * doc/c-tic54x.texi: Likewise.
1702 * doc/c-tic6x.texi: Likewise.
1703 * doc/c-v850.texi: Likewise.
1704 * doc/c-xc16x.texi: Likewise.
1705 * doc/c-xgate.texi: Likewise.
1706 * doc/c-xtensa.texi: Likewise.
1707 * doc/c-z80.texi: Likewise.
1708 * doc/internals.texi: Likewise.
1710 2013-01-10 Roland McGrath <mcgrathr@google.com>
1712 * hash.c (hash_new_sized): Make it global.
1713 * hash.h: Declare it.
1714 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1717 2013-01-10 Will Newton <will.newton@imgtec.com>
1719 * Makefile.am: Add Meta.
1720 * Makefile.in: Regenerate.
1721 * config/tc-metag.c: New file.
1722 * config/tc-metag.h: New file.
1723 * configure.tgt: Add Meta.
1724 * doc/Makefile.am: Add Meta.
1725 * doc/Makefile.in: Regenerate.
1726 * doc/all.texi: Add Meta.
1727 * doc/as.texiinfo: Document Meta options.
1728 * doc/c-metag.texi: New file.
1730 2013-01-09 Steve Ellcey <sellcey@mips.com>
1732 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1734 * config/tc-mips.c (internalError): Remove, replace with abort.
1736 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1738 * config/tc-aarch64.c (parse_operands): Change to compare the result
1739 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1741 2013-01-07 Nick Clifton <nickc@redhat.com>
1744 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1745 anticipated character.
1746 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1747 here as it is no longer needed.
1749 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1751 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1752 * doc/c-score.texi (SCORE-Opts): Likewise.
1753 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1755 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1757 * config/tc-mips.c: Add support for MIPS r5900.
1758 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1760 (can_swap_branch_p, get_append_method): Detect some conditional
1761 short loops to fix a bug on the r5900 by NOP in the branch delay
1763 (M_MUL): Support 3 operands in multu on r5900.
1764 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1765 (s_mipsset): Force 32 bit floating point on r5900.
1766 (mips_ip): Check parameter range of instructions mfps and mtps on
1768 * configure.in: Detect CPU type when target string contains r5900
1769 (e.g. mips64r5900el-linux-gnu).
1771 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1773 * as.c (parse_args): Update copyright year to 2013.
1775 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1777 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1780 2013-01-02 Nick Clifton <nickc@redhat.com>
1783 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1786 For older changes see ChangeLog-2012
1788 Copyright (C) 2013 Free Software Foundation, Inc.
1790 Copying and distribution of this file, with or without modification,
1791 are permitted in any medium without royalty provided the copyright
1792 notice and this notice are preserved.
1798 version-control: never