1 2013-12-10 Roland McGrath <mcgrathr@google.com>
3 * Makefile.am (install-exec-bindir): Prefix libtool invocation
4 with $(INSTALL_PROGRAM_ENV).
5 (install-exec-tooldir): Likewise.
6 * Makefile.in: Regenerate.
8 2013-12-07 Mike Frysinger <vapier@gentoo.org>
10 * config/bfin-aux.h: Remove +x file mode.
11 * config/tc-epiphany.c: Likewise.
12 * config/tc-epiphany.h: Likewise.
14 2013-12-03 Tristan Gingold <gingold@adacore.com>
16 * config/tc-i386-intel.c (i386_intel_simplify): Avoid arithmetic
19 2013-11-19 Yufeng Zhang <yufeng.zhang@arm.com>
23 2013-11-19 Nick Clifton <nickc@redhat.com>
25 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
26 for deprecated system registers when parsing pstate fields.
28 2013-11-19 Nick Clifton <nickc@redhat.com>
30 * config/tc-aarch64.c (parse_sys_reg): Do not issue error messages
31 for deprecated system registers when parsing pstate fields.
33 2013-11-19 Catherine Moore <clm@codesourcery.com>
35 * config/tc-mips.c (mips_fix_pmc_rm7000): Declare.
36 (options): Add OPTION_FIX_PMC_RM7000 and OPTION_NO_FIX_PMC_RM7000.
37 (md_longopts): Add mfix-pmc-rm7000 and mno-fix-pmc-rm7000.
39 (INSN_DMULTU): Define.
40 (insns_between): Detect PMC RM7000 errata.
41 (md_parse_option): Supprt OPTION_FIX_PMC_RM7000 and
42 OPTION_NO_FIX_PMC_RM7000.
43 * doc/as.texinfo: Document new options.
44 * doc/c-mips.texi: Likewise.
46 2013-11-19 Alexey Makhalov <makhaloff@gmail.com>
49 * app.c (do_scrub_chars): Only insert a newline character if
50 end-of-file has been reached.
52 2013-11-18 H.J. Lu <hongjiu.lu@intel.com>
54 * config/tc-i386.c (lex_got): Add a dummy "int bnd_prefix"
57 2013-11-18 Renlin Li <Renlin.Li@arm.com>
59 * config/tc-arm.c (arm_archs): New armv7ve architecture option.
60 (arm_cpus): Replace ARM_ARCH_V7A_IDIV_MP_SEC_VIRT with
61 ARM_ARCH_V7VE for cortex-a7, cortex-a12 and cortex-a15.
62 (cpu_arch_ver): Likewise.
63 * doc/c-arm.texi: Document armv7ve.
65 2013-11-18 Zhenqiang Chen <zhenqiang.chen@linaro.org>
67 * config/tc-aarch64.c (parse_sys_reg): Support
68 S2_<op1>_<Cn>_<Cm>_<op2>.
70 2013-11-18 Yufeng Zhang <yufeng.zhang@arm.com>
74 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
76 * config/tc-aarch64.c (set_other_error): New function.
77 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
78 the variable to which it points with 'o'.
79 (parse_operands): Update; check for write to read-only system
80 registers or read from write-only ones.
82 2013-11-17 H.J. Lu <hongjiu.lu@intel.com>
84 * config/tc-i386.c (reloc): Add an argument, bnd_prefix, to
85 indicate if instruction has the BND prefix. Return
86 BFD_RELOC_X86_64_PC32_BND instead of BFD_RELOC_32_PCREL if
87 bnd_prefix isn't zero.
88 (output_branch): Pass BFD_RELOC_X86_64_PC32_BND to frag_var
90 (output_jump): Update reloc call.
91 (output_interseg_jump): Likewise.
92 (output_disp): Likewise.
93 (output_imm): Likewise.
94 (x86_cons_fix_new): Likewise.
95 (lex_got): Add an argument, bnd_prefix, to indicate if
96 instruction has the BND prefix. Use BFD_RELOC_X86_64_PLT32_BND
98 (x86_cons): Update lex_got call.
99 (i386_immediate): Likewise.
100 (i386_displacement): Likewise.
101 (md_apply_fix): Handle BFD_RELOC_X86_64_PC32_BND and
102 BFD_RELOC_X86_64_PLT32_BND.
103 (tc_gen_reloc): Likewise.
104 * config/tc-i386-intel.c (i386_operator): Update lex_got call.
106 2013-11-15 Yufeng Zhang <yufeng.zhang@arm.com>
108 * config/tc-aarch64.c (set_other_error): New function.
109 (parse_sys_reg): Add new parameter 'sys_reg' and if non-NULL set
110 the variable to which it points with 'o'.
111 (parse_operands): Update; check for write to read-only system
112 registers or read from write-only ones.
114 2013-11-15 Michael Zolotukhin <michael.v.zolotukhin@gmail.com>
116 * config/tc-i386.c (check_VecOperands): Reorder checks.
118 2013-11-11 Catherine Moore <clm@codesourcery.com>
120 * config/mips/tc-mips.c (convert_reg_type): Use
121 INSN_LOAD_MEMORY instead of INSN_LOAD_MEMORY_DELAY.
122 (reg_needs_delay): Likewise.
123 (insns_between): Likewise.
125 2013-11-08 Jan-Benedict Glaw <jbglaw@lug-owl.de
127 * config/tc-ppc.c (ppc_elf_localentry): Add cast.
129 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
131 * config/tc-aarch64.c (parse_sys_reg): Update to use aarch64_sys_reg;
132 call aarch64_sys_reg_deprecated_p and warn about the deprecated
135 2013-11-05 Yufeng Zhang <yufeng.zhang@arm.com>
137 * config/tc-aarch64.c (parse_operands): Handle AARCH64_OPND_COND1.
139 2013-11-05 Will Newton <will.newton@linaro.org>
142 * config/tc-aarch64.c (parse_operands): Avoid trying to
143 parse a vector register as an immediate.
145 2013-11-04 Jan Beulich <jbeulich@suse.com>
147 * config/tc-i386.c (check_long_reg): Correct comment indentation.
148 (check_qword_reg): Correct comment and its indentation.
149 (check_word_reg): Extend comment and correct its indentation. Also
150 check for 64-bit register.
152 2013-10-30 Ulrich Weigand <uweigand@de.ibm.com>
154 * config/tc-ppc.c (md_pseudo_table): Add .localentry.
155 (ppc_elf_localentry): New function.
156 (ppc_force_relocation): Force relocs on all branches to localenty
158 (ppc_fix_adjustable): Don't reduce such symbols to section+offset.
160 2013-10-30 Alan Modra <amodra@gmail.com>
162 * config/tc-ppc.c: Include elf/ppc64.h.
163 (ppc_abiversion): New variable.
164 (md_pseudo_table): Add .abiversion.
165 (ppc_elf_abiversion, ppc_elf_end): New functions.
166 * config/tc-ppc.h (md_end): Define.
168 2013-10-30 Alan Modra <amodra@gmail.com>
170 * config/tc-ppc.c (SEX16): Don't mask.
171 (REPORT_OVERFLOW_HI): Define as zero.
172 (ppc_elf_suffix): Support @high, @higha, @dtprel@high, @dtprel@higha,
173 @tprel@high, and @tprel@higha modifiers.
174 (md_assemble): Ignore X_unsigned when applying 16-bit insn fields.
175 Add (disabled) code to check @h and @ha reloc overflow for powerpc64.
177 (md_apply_fix): Similarly.
179 2013-10-18 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
181 * config/tc-mips.c (fpr_read_mask): Test MSA registers.
182 (fpr_write_mask): Test MSA registers.
183 (can_swap_branch_p): Check fpr write followed by fpr read.
185 2013-10-18 Nick Clifton <nickc@redhat.com>
187 * config/tc-tic6x.c (tic6x_parse_operand): Revert previous delta.
189 2013-10-14 Richard Sandiford <rdsandiford@googlemail.com>
190 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
192 * config/tc-mips.c (options): Add OPTION_MSA and OPTION_NO_MSA.
193 (md_longopts): Add mmsa and mno-msa.
194 (mips_ases): Add msa.
195 (RTYPE_MASK): Update.
196 (RTYPE_MSA): New define.
197 (OT_REG_ELEMENT): Replace with...
198 (OT_INTEGER_INDEX, OT_REG_INDEX): ...these new operand types.
199 (mips_operand_token): Replace reg_element with index.
200 (mips_parse_argument_token): Treat vector indices as separate tokens.
201 Handle register indices.
202 (md_begin): Add MSA register names.
203 (operand_reg_mask): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
204 (convert_reg_type): Handle cases for OP_REG_MSA and OP_REG_MSA_CTRL.
205 (match_mdmx_imm_reg_operand): Update accordingly.
206 (match_imm_index_operand): New function.
207 (match_reg_index_operand): New function.
208 (match_operand): Handle cases for OP_IMM_INDEX and OP_REG_INDEX.
209 (md_convert_frag): Convert bz.b/h/w/d, bnz.b/h/w/d, bz.v bnz.v.
210 (md_show_usage): Print -mmsa and -mno-msa.
211 * doc/as.texinfo: Document -mmsa and -mno-msa.
212 * doc/c-mips.texi: Document -mmsa and -mno-msa.
213 Document .set msa and .set nomsa.
215 2013-10-14 Nick Clifton <nickc@redhat.com>
217 * read.c (add_include_dir): Use xrealloc.
218 * config/tc-score.c (do_macro_bcmp): Initialise inst_main.
219 * config/tc-tic6x.c (tic6x_parse_operand): Initialise second_reg.
221 2013-10-13 Sandra Loosemore <sandra@codesourcery.com>
223 * config/tc-nios2.c (nios2_consume_arg): Make the "ba" warning
224 also test/refer to "sstatus". Reformat the warning message.
226 2013-10-10 Sean Keys <skeys@ipdatasys.com>
228 * tc-xgate.c (xgate_find_match): Refactor opcode matching.
230 2013-10-10 Jan Beulich <jbeulich@suse.com>
232 * tc-i386-intel.c (i386_intel_simplify_register): Suppress base/index
233 swapping for bndmk, bndldx, and bndstx.
235 2013-10-09 Nick Clifton <nickc@redhat.com>
238 * config/tc-epiphany.c (md_convert_frag): Add missing break
242 * config/tc-mn10200.c (md_convert_frag): Add missing break
245 2013-10-08 Jan Beulich <jbeulich@suse.com>
247 * tc-i386.c (check_word_reg): Remove misplaced "else".
248 (check_long_reg): Restore symmetry with check_word_reg.
250 2013-10-08 Jan Beulich <jbeulich@suse.com>
252 * gas/config/tc-arm.c (do_t_push_pop): Honor inst.size_req. Simplify
255 2013-10-08 Nick Clifton <nickc@redhat.com>
257 * config/tc-msp430.c (msp430_operands): Accept "<foo>.a" as an alias
258 for "<foo>a". Issue error messages for unrecognised or corrrupt
261 2013-10-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
263 * config/tc-arm.c (do_t_mvn_tst): Use narrow form for tst when
266 2013-09-30 Saravanan Ekanathan <saravanan.ekanathan@amd.com>
268 * config/tc-i386.c (cpu_arch): Add CPU_BDVER4_FLAGS.
269 * doc/c-i386.texi: Add -march=bdver4 option.
271 2013-09-20 Alan Modra <amodra@gmail.com>
273 * configure: Regenerate.
275 2013-09-18 Tristan Gingold <gingold@adacore.com>
277 * NEWS: Add marker for 2.24.
279 2013-09-18 Nick Clifton <nickc@redhat.com>
281 * config/tc-msp430.c (OPTION_MOVE_DATA): Define.
282 (move_data): New variable.
283 (md_parse_option): Parse -md.
284 (msp430_section): New function. Catch references to the .bss or
285 .data sections and generate a special symbol for use by the libcrt
287 (md_pseudo_table): Intercept .section directives.
288 (md_longopt): Add -md
289 (md_show_usage): Likewise.
290 (msp430_operands): Generate a warning message if a NOP is inserted
291 into the instruction stream.
292 * doc/c-msp430.texi (node MSP430 Options): Document -md option.
294 2013-09-17 Doug Gilmore <Doug.Gilmore@imgtec.com>
296 * config/tc-mips.c (mips_elf_final_processing): Set
297 EF_MIPS_FP64 for -mgp32 -mfp64, removing old FIXME.
299 2013-09-16 Will Newton <will.newton@linaro.org>
301 * config/tc-arm.c (do_neon_ld_st_interleave): Add constraint
302 disallowing element size 64 with interleave other than 1.
304 2013-09-12 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
306 * config/tc-mips.c (match_insn): Set error when $31 is used for
309 2013-09-04 Tristan Gingold <gingold@adacore.com>
311 * config/tc-ppc.c (md_apply_fix): Handle defined after use toc
314 2013-09-04 Roland McGrath <mcgrathr@google.com>
317 * config/tc-arm.c (T16_32_TAB): Add _udf.
318 (do_t_udf): New function.
321 2013-08-23 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
323 * config/rx-parse.y: Rearrange the components of a bison grammar to issue
324 assembler errors at correct position.
326 2013-08-23 Yuri Chornoivan <yurchor@ukr.net>
329 * config/tc-ia64.c: Fix typos.
330 * config/tc-sparc.c: Likewise.
331 * config/tc-z80.c: Likewise.
332 * doc/c-i386.texi: Likewise.
333 * doc/c-m32r.texi: Likewise.
335 2013-08-23 Will Newton <will.newton@linaro.org>
337 * config/tc-arm.c: (do_neon_ldx_stx): Add extra constraints
338 for pre-indexed addressing modes.
340 2013-08-21 Alan Modra <amodra@gmail.com>
342 * symbols.c (fb_label_instance_inc, fb_label_instance): Properly
343 range check label number for use with fb_low_counter array.
345 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
347 * config/tc-mips.c (mips_check_isa_supports_ase, reg_lookup)
348 (mips_parse_argument_token, validate_micromips_insn, md_begin)
349 (check_regno, match_float_constant, check_completed_insn, append_insn)
350 (match_insn, match_mips16_insn, match_insns, macro_start)
351 (macro_build_ldst_constoffset, load_register, macro, mips_ip)
352 (mips16_ip, mips_set_option_string, md_parse_option)
353 (mips_after_parse_args, mips_after_parse_args, md_pcrel_from)
354 (md_apply_fix, s_align, s_option, s_mipsset, s_tls_rel_directive)
355 (s_gpword, s_gpdword, s_ehword, s_nan, tc_gen_reloc, md_convert_frag)
356 (s_mips_end, s_mips_ent, s_mips_frame, s_mips_mask, mips_parse_cpu):
357 Start error messages with a lower-case letter. Do not end error
358 messages with a period. Wrap long messages to 80 character-lines.
359 Use "cannot" instead of "can't" and "can not".
361 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
363 * config/tc-mips.c (imm_expr): Expand comment.
364 (set_at, macro, mips16_macro): Expect imm_expr to be O_constant
367 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
369 * config/tc-mips.c (imm2_expr): Delete.
370 (md_assemble, match_insn, imm2_expr.X_op, mips_ip): Update accordingly.
372 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
374 * config/tc-mips.c (report_bad_range, report_bad_field): Delete.
375 (macro): Remove M_DEXT and M_DINS handling.
377 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
379 * config/tc-mips.c (mips_arg_info): Replace allow_nonconst and
380 lax_max with lax_match.
381 (match_int_operand): Update accordingly. Don't report an error
382 for !lax_match-only cases.
383 (match_insn): Replace more_alts with lax_match and use it to
384 initialize the mips_arg_info field. Add a complete_p parameter.
385 Handle implicit VU0 suffixes here.
386 (match_invalid_for_isa, match_insns, match_mips16_insns): New
388 (mips_ip, mips16_ip): Use them.
390 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
392 * config/tc-mips.c (match_expression): Report uses of registers here.
393 Add a "must be an immediate expression" error. Handle elided offsets
395 (match_int_operand): ...here.
397 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
399 * config/tc-mips.c (mips_arg_info): Remove soft_match.
400 (match_out_of_range, match_not_constant): New functions.
401 (match_const_int): Remove fallback parameter and check for soft_match.
402 Use match_not_constant.
403 (match_mapped_int_operand, match_addiusp_operand)
404 (match_perf_reg_operand, match_save_restore_list_operand)
405 (match_mdmx_imm_reg_operand): Update accordingly. Use
406 match_out_of_range and set_insn_error* instead of as_bad.
407 (match_int_operand): Likewise. Use match_not_constant in the
408 !allows_nonconst case.
409 (match_float_constant): Report invalid float constants.
410 (match_insn, match_mips16_insn): Remove soft_match code. Rely on
411 match_float_constant to check for invalid constants. Fail the
412 match if match_const_int or match_float_constant return false.
413 (mips_ip): Update accordingly.
414 (mips16_ip): Likewise. Undo null termination of instruction name
415 once lookup is complete.
417 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
419 * config/tc-mips.c (mips_insn_error_format): New enum.
420 (mips_insn_error): New struct.
421 (insn_error): Change to a mips_insn_error.
422 (clear_insn_error, set_insn_error_format, set_insn_error)
423 (set_insn_error_i, set_insn_error_ss, report_insn_error): New
425 (mips_parse_argument_token, md_assemble, match_insn)
426 (match_mips16_insn): Use them instead of manipulating insn_error
428 (mips_ip, mips16_ip): Likewise. Simplify control flow.
430 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
432 * config/tc-mips.c (normalize_constant_expr): Move further up file.
433 (normalize_address_expr): Likewise.
434 (match_insn, match_mips16_insn): New functions, split out from...
435 (mips_ip, mips16_ip): ...here.
437 2013-08-19 Richard Sandiford <rdsandiford@googlemail.com>
439 * config/tc-mips.c (operand_reg_mask, match_operand): Handle
441 (mips_ip, mips16_ip): Use mips_optional_operand_p to check
442 for optional operands.
444 2013-08-16 Alan Modra <amodra@gmail.com>
446 * config/tc-ppc.c (ppc_elf_cons): Allow @l and other reloc
449 2013-08-16 Alan Modra <amodra@gmail.com>
451 * config/tc-ppc.c (ppc_elf_lcomm): Use subsection 1.
453 2013-08-14 David Edelsohn <dje.gcc@gmail.com>
455 * config/tc-ppc.c (ppc_comm): Accept optional fourth .lcomm
456 argument as alignment.
458 2013-08-09 Nick Clifton <nickc@redhat.com>
460 * config/tc-rl78.c (elf_flags): New variable.
461 (enum options): Add OPTION_G10.
462 (md_longopts): Add mg10.
463 (md_parse_option): Parse -mg10.
464 (rl78_elf_final_processing): New function.
465 * config/tc-rl78.c (tc_final_processing): Define.
466 * doc/c-rl78.texi: Document -mg10 option.
468 2013-08-06 Jürgen Urban <JuergenUrban@gmx.de>
470 * config/tc-mips.c (match_vu0_suffix_operand): Allow single-channel
471 suffixes to be elided too.
472 (mips_lookup_insn): Don't reject INSN2_VU0_CHANNEL_SUFFIX here.
473 (mips_ip): Assume .xyzw if no VU0 suffix is specified. Allow +N
476 2013-08-05 John Tytgat <john@bass-software.com>
478 * po/POTFILES.in: Regenerate.
480 2013-08-05 Eric Botcazou <ebotcazou@adacore.com>
481 Konrad Eisele <konrad@gaisler.com>
483 * config/tc-sparc.c (sparc_arch_types): Add leon.
484 (sparc_arch): Move sparc4 around and add leon.
485 (sparc_target_format): Document -Aleon.
486 * doc/c-sparc.texi: Likewise.
488 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
490 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
492 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
493 Richard Sandiford <rdsandiford@googlemail.com>
495 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
496 (RWARN): Bump to 0x8000000.
497 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
498 (RTYPE_R5900_ACC): New register types.
499 (RTYPE_MASK): Include them.
500 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
502 (reg_names): Include them.
503 (mips_parse_register_1): New function, split out from...
504 (mips_parse_register): ...here. Add a channels_ptr parameter.
505 Look for VU0 channel suffixes when nonnull.
506 (reg_lookup): Update the call to mips_parse_register.
507 (mips_parse_vu0_channels): New function.
508 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
509 (mips_operand_token): Add a "channels" field to the union.
510 Extend the comment above "ch" to OT_DOUBLE_CHAR.
511 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
512 (mips_parse_argument_token): Handle channel suffixes here too.
513 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
514 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
516 (md_begin): Register $vfN and $vfI registers.
517 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
518 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
519 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
520 (match_vu0_suffix_operand): New function.
521 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
522 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
523 (mips_lookup_insn): New function.
524 (mips_ip): Use it. Allow "+K" operands to be elided at the end
525 of an instruction. Handle '#' sequences.
527 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
529 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
530 values and use it instead of sreg, treg, xreg, etc.
532 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
534 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
535 and mips_int_operand_max.
536 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
538 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
539 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
540 instead of mips16_immed_operand.
542 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
544 * config/tc-mips.c (mips16_macro): Don't use move_register.
545 (mips16_ip): Allow macros to use 'p'.
547 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
549 * config/tc-mips.c (MAX_OPERANDS): New macro.
550 (mips_operand_array): New structure.
551 (mips_operands, mips16_operands, micromips_operands): New arrays.
552 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
553 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
554 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
555 (micromips_to_32_reg_q_map): Delete.
556 (insn_operands, insn_opno, insn_extract_operand): New functions.
557 (validate_mips_insn): Take a mips_operand_array as argument and
558 use it to build up a list of operands. Extend to handle INSN_MACRO
560 (validate_mips16_insn): New function.
561 (validate_micromips_insn): Take a mips_operand_array as argument.
563 (md_begin): Initialize mips_operands, mips16_operands and
564 micromips_operands. Call validate_mips_insn and
565 validate_micromips_insn for macro instructions too.
566 Call validate_mips16_insn for MIPS16 instructions.
567 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
569 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
570 them. Handle INSN_UDI.
571 (get_append_method): Use gpr_read_mask.
573 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
575 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
576 flags for MIPS16 and non-MIPS16 instructions.
577 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
578 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
579 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
580 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
581 and non-MIPS16 instructions. Fix formatting.
583 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
585 * config/tc-mips.c (reg_needs_delay): Move later in file.
587 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
589 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
590 Alexander Ivchenko <alexander.ivchenko@intel.com>
591 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
592 Sergey Lega <sergey.s.lega@intel.com>
593 Anna Tikhonova <anna.tikhonova@intel.com>
594 Ilya Tocar <ilya.tocar@intel.com>
595 Andrey Turetskiy <andrey.turetskiy@intel.com>
596 Ilya Verbin <ilya.verbin@intel.com>
597 Kirill Yukhin <kirill.yukhin@intel.com>
598 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
600 * config/tc-i386-intel.c (O_zmmword_ptr): New.
601 (i386_types): Add zmmword.
602 (i386_intel_simplify_register): Allow regzmm.
603 (i386_intel_simplify): Handle zmmwords.
604 (i386_intel_operand): Handle RC/SAE, vector operations and
606 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
607 (struct RC_Operation): New.
608 (struct Mask_Operation): New.
609 (struct Broadcast_Operation): New.
610 (vex_prefix): Size of bytes increased to 4 to support EVEX
612 (enum i386_error): Add new error codes: unsupported_broadcast,
613 broadcast_not_on_src_operand, broadcast_needed,
614 unsupported_masking, mask_not_on_destination, no_default_mask,
615 unsupported_rc_sae, rc_sae_operand_not_last_imm,
616 invalid_register_operand, try_vector_disp8.
617 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
618 rounding, broadcast, memshift.
619 (struct RC_name): New.
620 (RC_NamesTable): New.
623 (extra_symbol_chars): Add '{'.
624 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
625 (i386_operand_type): Add regzmm, regmask and vec_disp8.
626 (match_mem_size): Handle zmmwords.
627 (operand_type_match): Handle zmm-registers.
628 (mode_from_disp_size): Handle vec_disp8.
629 (fits_in_vec_disp8): New.
630 (md_begin): Handle {} properly.
631 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
632 (build_vex_prefix): Handle vrex.
633 (build_evex_prefix): New.
634 (process_immext): Adjust to properly handle EVEX.
635 (md_assemble): Add EVEX encoding support.
636 (swap_2_operands): Correctly handle operands with masking,
637 broadcasting or RC/SAE.
638 (check_VecOperands): Support EVEX features.
639 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
640 (match_template): Support regzmm and handle new error codes.
641 (process_suffix): Handle zmmwords and zmm-registers.
642 (check_byte_reg): Extend to zmm-registers.
643 (process_operands): Extend to zmm-registers.
644 (build_modrm_byte): Handle EVEX.
645 (output_insn): Adjust to properly handle EVEX case.
646 (disp_size): Handle vec_disp8.
647 (output_disp): Support compressed disp8*N evex feature.
648 (output_imm): Handle RC/SAE immediates properly.
649 (check_VecOperations): New.
650 (i386_immediate): Handle EVEX features.
651 (i386_index_check): Handle zmmwords and zmm-registers.
652 (RC_SAE_immediate): New.
653 (i386_att_operand): Handle EVEX features.
654 (parse_real_register): Add a check for ZMM/Mask registers.
655 (OPTION_MEVEXLIG): New.
656 (OPTION_MEVEXWIG): New.
657 (md_longopts): Add mevexlig and mevexwig.
658 (md_parse_option): Handle mevexlig and mevexwig options.
659 (md_show_usage): Add description for mevexlig and mevexwig.
660 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
661 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
663 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
665 * config/tc-i386.c (cpu_arch): Add .sha.
666 * doc/c-i386.texi: Document sha/.sha.
668 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
669 Kirill Yukhin <kirill.yukhin@intel.com>
670 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
672 * config/tc-i386.c (BND_PREFIX): New.
673 (struct _i386_insn): Add new field bnd_prefix.
674 (add_bnd_prefix): New.
676 (i386_operand_type): Add regbnd.
677 (md_assemble): Handle BND prefixes.
678 (parse_insn): Likewise.
679 (output_branch): Likewise.
680 (output_jump): Likewise.
681 (build_modrm_byte): Handle regbnd.
682 (OPTION_MADD_BND_PREFIX): New.
683 (md_longopts): Add entry for 'madd-bnd-prefix'.
684 (md_parse_option): Handle madd-bnd-prefix option.
685 (md_show_usage): Add description for madd-bnd-prefix
687 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
689 2013-07-24 Tristan Gingold <gingold@adacore.com>
691 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
694 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
696 * config/tc-s390.c (s390_machine): Don't force the .machine
697 argument to lower case.
699 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
701 * config/tc-arm.c (s_arm_arch_extension): Improve error message
702 for invalid extension.
704 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
706 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
707 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
708 (aarch64_abi): New variable.
709 (ilp32_p): Change to be a macro.
710 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
711 (struct aarch64_option_abi_value_table): New struct.
712 (aarch64_abis): New table.
713 (aarch64_parse_abi): New function.
714 (aarch64_long_opts): Add entry for -mabi=.
715 * doc/as.texinfo (Target AArch64 options): Document -mabi.
716 * doc/c-aarch64.texi: Likewise.
718 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
720 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
723 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
725 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
727 * config/rx-parse.y: (rx_check_float_support): Add function to
728 check floating point operation support for target RX100 and
730 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
731 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
732 RX200, RX600, and RX610
734 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
736 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
738 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
740 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
741 * doc/c-avr.texi: Likewise.
743 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
745 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
746 error with older GCCs.
747 (mips16_macro_build): Dereference args.
749 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
751 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
752 New functions, split out from...
753 (reg_lookup): ...here. Remove itbl support.
754 (reglist_lookup): Delete.
755 (mips_operand_token_type): New enum.
756 (mips_operand_token): New structure.
757 (mips_operand_tokens): New variable.
758 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
759 (mips_parse_arguments): New functions.
760 (md_begin): Initialize mips_operand_tokens.
761 (mips_arg_info): Add a token field. Remove optional_reg field.
762 (match_char, match_expression): New functions.
763 (match_const_int): Use match_expression. Remove "s" argument
764 and return a boolean result. Remove O_register handling.
765 (match_regno, match_reg, match_reg_range): New functions.
766 (match_int_operand, match_mapped_int_operand, match_msb_operand)
767 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
768 (match_addiusp_operand, match_clo_clz_dest_operand)
769 (match_lwm_swm_list_operand, match_entry_exit_operand)
770 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
771 (match_tied_reg_operand): Remove "s" argument and return a boolean
772 result. Match tokens rather than text. Update calls to
773 match_const_int. Rely on match_regno to call check_regno.
774 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
775 "arg" argument. Return a boolean result.
776 (parse_float_constant): Replace with...
777 (match_float_constant): ...this new function.
778 (match_operand): Remove "s" argument and return a boolean result.
779 Update calls to subfunctions.
780 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
781 rather than string-parsing routines. Update handling of optional
782 registers for token scheme.
784 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
786 * config/tc-mips.c (parse_float_constant): Split out from...
789 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
791 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
794 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
796 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
797 (match_entry_exit_operand): New function.
798 (match_save_restore_list_operand): Likewise.
799 (match_operand): Use them.
800 (check_absolute_expr): Delete.
801 (mips16_ip): Rewrite main parsing loop to use mips_operands.
803 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
805 * config/tc-mips.c: Enable functions commented out in previous patch.
806 (SKIP_SPACE_TABS): Move further up file.
807 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
808 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
809 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
810 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
811 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
812 (micromips_imm_b_map, micromips_imm_c_map): Delete.
813 (mips_lookup_reg_pair): Delete.
814 (macro): Use report_bad_range and report_bad_field.
815 (mips_immed, expr_const_in_range): Delete.
816 (mips_ip): Rewrite main parsing loop to use new functions.
818 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
820 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
821 Change return type to bfd_boolean.
822 (report_bad_range, report_bad_field): New functions.
823 (mips_arg_info): New structure.
824 (match_const_int, convert_reg_type, check_regno, match_int_operand)
825 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
826 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
827 (match_addiusp_operand, match_clo_clz_dest_operand)
828 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
829 (match_pc_operand, match_tied_reg_operand, match_operand)
830 (check_completed_insn): New functions, commented out for now.
832 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
834 * config/tc-mips.c (insn_insert_operand): New function.
835 (macro_build, mips16_macro_build): Put null character check
836 in the for loop and convert continues to breaks. Use operand
837 structures to handle constant operands.
839 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
841 * config/tc-mips.c (validate_mips_insn): Move further up file.
842 Add insn_bits and decode_operand arguments. Use the mips_operand
843 fields to work out which bits an operand occupies. Detect double
845 (validate_micromips_insn): Move further up file. Call into
848 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
850 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
852 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
854 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
856 (macro): Update accordingly.
858 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
860 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
862 (md_assemble): Remove imm_reloc handling.
863 (mips_ip): Update commentary. Use offset_expr and offset_reloc
864 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
865 Use a temporary array rather than imm_reloc when parsing
866 constant expressions. Remove imm_reloc initialization.
867 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
868 for the relaxable field. Use a relax_char variable to track the
869 type of this field. Remove imm_reloc initialization.
871 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
873 * config/tc-mips.c (mips16_ip): Handle "I".
875 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
877 * config/tc-mips.c (mips_flag_nan2008): New variable.
878 (options): Add OPTION_NAN enum value.
879 (md_longopts): Handle it.
880 (md_parse_option): Likewise.
881 (s_nan): New function.
882 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
883 (md_show_usage): Add -mnan.
885 * doc/as.texinfo (Overview): Add -mnan.
886 * doc/c-mips.texi (MIPS Opts): Document -mnan.
887 (MIPS NaN Encodings): New node. Document .nan directive.
888 (MIPS-Dependent): List the new node.
890 2013-07-09 Tristan Gingold <gingold@adacore.com>
892 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
894 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
896 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
897 for 'A' and assume that the constant has been elided if the result
900 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
902 * config/tc-mips.c (gprel16_reloc_p): New function.
903 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
905 (offset_high_part, small_offset_p): New functions.
906 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
907 register load and store macros, handle the 16-bit offset case first.
908 If a 16-bit offset is not suitable for the instruction we're
909 generating, load it into the temporary register using
910 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
911 M_L_DAB code once the address has been constructed. For double load
912 and store macros, again handle the 16-bit offset case first.
913 If the second register cannot be accessed from the same high
914 part as the first, load it into AT using ADDRESS_ADDI_INSN.
915 Fix the handling of LD in cases where the first register is the
916 same as the base. Also handle the case where the offset is
917 not 16 bits and the second register cannot be accessed from the
918 same high part as the first. For unaligned loads and stores,
919 fuse the offbits == 12 and old "ab" handling. Apply this handling
920 whenever the second offset needs a different high part from the first.
921 Construct the offset using ADDRESS_ADDI_INSN where possible,
922 for offbits == 16 as well as offbits == 12. Use offset_reloc
923 when constructing the individual loads and stores.
924 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
925 and offset_reloc before matching against a particular opcode.
926 Handle elided 'A' constants. Allow 'A' constants to use
927 relocation operators.
929 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
931 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
932 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
933 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
935 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
937 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
938 Require the msb to be <= 31 for "+s". Check that the size is <= 31
939 for both "+s" and "+S".
941 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
943 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
944 (mips_ip, mips16_ip): Handle "+i".
946 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
948 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
949 (micromips_to_32_reg_h_map): Rename to...
950 (micromips_to_32_reg_h_map1): ...this.
951 (micromips_to_32_reg_i_map): Rename to...
952 (micromips_to_32_reg_h_map2): ...this.
953 (mips_lookup_reg_pair): New function.
954 (gpr_write_mask, macro): Adjust after above renaming.
955 (validate_micromips_insn): Remove "mi" handling.
956 (mips_ip): Likewise. Parse both registers in a pair for "mh".
958 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
960 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
961 (mips_ip): Remove "+D" and "+T" handling.
963 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
965 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
968 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
970 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
972 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
974 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
975 (aarch64_force_relocation): Likewise.
977 2013-07-02 Alan Modra <amodra@gmail.com>
979 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
981 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
983 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
984 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
985 Replace @sc{mips16} with literal `MIPS16'.
986 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
988 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
990 * config/tc-aarch64.c (reloc_table): Replace
991 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
992 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
993 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
994 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
995 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
996 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
997 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
998 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
999 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
1000 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
1001 (aarch64_force_relocation): Likewise.
1003 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
1005 * config/tc-aarch64.c (ilp32_p): New static variable.
1006 (elf64_aarch64_target_format): Return the target according to the
1008 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
1009 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
1010 (aarch64_dwarf2_addr_size): New function.
1011 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
1012 (DWARF2_ADDR_SIZE): New define.
1014 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1016 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
1018 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
1020 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
1022 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
1024 * config/tc-mips.c (mips_set_options): Add insn32 member.
1025 (mips_opts): Initialize it.
1026 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
1027 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
1028 (md_longopts): Add "minsn32" and "mno-insn32" options.
1029 (is_size_valid): Handle insn32 mode.
1030 (md_assemble): Pass instruction string down to macro.
1031 (brk_fmt): Add second dimension and insn32 mode initializers.
1032 (mfhl_fmt): Likewise.
1033 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
1034 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
1035 (macro_build_jalr, move_register): Handle insn32 mode.
1036 (macro_build_branch_rs): Likewise.
1037 (macro): Handle insn32 mode.
1038 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
1039 (mips_ip): Handle insn32 mode.
1040 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
1041 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
1042 (mips_handle_align): Handle insn32 mode.
1043 (md_show_usage): Add -minsn32 and -mno-insn32.
1045 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
1046 -mno-insn32 options.
1047 (-minsn32, -mno-insn32): New options.
1048 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
1050 (MIPS assembly options): New node. Document .set insn32 and
1052 (MIPS-Dependent): List the new node.
1054 2013-06-25 Nick Clifton <nickc@redhat.com>
1056 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
1057 the PC in indirect addressing on 430xv2 parts.
1058 (msp430_operands): Add version test to hardware bug encoding
1061 2013-06-24 Roland McGrath <mcgrathr@google.com>
1063 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
1064 so it skips whitespace before it.
1065 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
1067 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
1068 (arm_reg_parse_multi): Skip whitespace first.
1069 (parse_reg_list): Likewise.
1070 (parse_vfp_reg_list): Likewise.
1071 (s_arm_unwind_save_mmxwcg): Likewise.
1073 2013-06-24 Nick Clifton <nickc@redhat.com>
1076 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
1078 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1080 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
1082 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
1084 * config/tc-mips.c: Assert that offsetT and valueT are at least
1086 (GPR_SMIN, GPR_SMAX): New macros.
1087 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
1089 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1091 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
1092 conditions. Remove any code deselected by them.
1093 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
1095 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1097 * NEWS: Note removal of ECOFF support.
1098 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
1099 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
1100 (MULTI_CFILES): Remove config/e-mipsecoff.c.
1101 * Makefile.in: Regenerate.
1102 * configure.in: Remove MIPS ECOFF references.
1103 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
1105 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
1106 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
1107 (mips-*-*): ...this single case.
1108 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
1109 MIPS emulations to be e-mipself*.
1110 * configure: Regenerate.
1111 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
1112 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
1113 (mips-*-sysv*): Remove coff and ecoff cases.
1114 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
1115 * ecoff.c: Remove reference to MIPS ECOFF.
1116 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
1117 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
1118 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
1119 (mips_hi_fixup): Tweak comment.
1120 (append_insn): Require a howto.
1121 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
1123 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1125 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
1126 Use "CPU" instead of "cpu".
1127 * doc/c-mips.texi: Likewise.
1128 (MIPS Opts): Rename to MIPS Options.
1129 (MIPS option stack): Rename to MIPS Option Stack.
1130 (MIPS ASE instruction generation overrides): Rename to
1131 MIPS ASE Instruction Generation Overrides (for now).
1132 (MIPS floating-point): Rename to MIPS Floating-Point.
1134 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1136 * doc/c-mips.texi (MIPS Macros): New section.
1137 (MIPS Object): Replace with...
1138 (MIPS Small Data): ...this new section.
1140 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1142 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
1143 Capitalize name. Use @kindex instead of @cindex for .set entries.
1145 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
1147 * doc/c-mips.texi (MIPS Stabs): Remove section.
1149 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
1151 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
1152 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
1153 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
1154 (ISA_SUPPORTS_VIRT64_ASE): Delete.
1155 (mips_ase): New structure.
1156 (mips_ases): New table.
1157 (FP64_ASES): New macro.
1158 (mips_ase_groups): New array.
1159 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
1160 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
1162 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
1163 (md_parse_option): Use mips_ases and mips_set_ase instead of
1164 separate case statements for each ASE option.
1165 (mips_after_parse_args): Use FP64_ASES. Use
1166 mips_check_isa_supports_ases to check the ASEs against
1168 (s_mipsset): Use mips_ases and mips_set_ase instead of
1169 separate if statements for each ASE option. Use
1170 mips_check_isa_supports_ases, even when a non-ASE option
1173 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
1175 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
1177 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1179 * config/tc-mips.c (md_shortopts, options, md_longopts)
1180 (md_longopts_size): Move earlier in file.
1182 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1184 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
1185 with a single "ase" bitmask.
1186 (mips_opts): Update accordingly.
1187 (file_ase, file_ase_explicit): New variables.
1188 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
1189 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
1190 (ISA_HAS_ROR): Adjust for mips_set_options change.
1191 (is_opcode_valid): Take the base ase mask directly from mips_opts.
1192 (mips_ip): Adjust for mips_set_options change.
1193 (md_parse_option): Likewise. Update file_ase_explicit.
1194 (mips_after_parse_args): Adjust for mips_set_options change.
1195 Use bitmask operations to select the default ASEs. Set file_ase
1196 rather than individual per-ASE variables.
1197 (s_mipsset): Adjust for mips_set_options change.
1198 (mips_elf_final_processing): Test file_ase rather than
1199 file_ase_mdmx. Remove commented-out code.
1201 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
1203 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
1204 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
1205 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
1206 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
1207 (mips_after_parse_args): Use the new "ase" field to choose
1209 (mips_cpu_info_table): Move ASEs from the "flags" field to the
1212 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
1214 * config/tc-arm.c (symbol_preemptible): New function.
1215 (relax_branch): Use it.
1217 2013-06-17 Catherine Moore <clm@codesourcery.com>
1218 Maciej W. Rozycki <macro@codesourcery.com>
1219 Chao-Ying Fu <fu@mips.com>
1221 * config/tc-mips.c (mips_set_options): Add ase_eva.
1222 (mips_set_options mips_opts): Add ase_eva.
1223 (file_ase_eva): Declare.
1224 (ISA_SUPPORTS_EVA_ASE): Define.
1225 (IS_SEXT_9BIT_NUM): Define.
1226 (MIPS_CPU_ASE_EVA): Define.
1227 (is_opcode_valid): Add support for ase_eva.
1228 (macro_build): Likewise.
1230 (validate_mips_insn): Likewise.
1231 (validate_micromips_insn): Likewise.
1232 (mips_ip): Likewise.
1233 (options): Add OPTION_EVA and OPTION_NO_EVA.
1234 (md_longopts): Add -meva and -mno-eva.
1235 (md_parse_option): Process new options.
1236 (mips_after_parse_args): Check for valid EVA combinations.
1237 (s_mipsset): Likewise.
1239 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1241 * dwarf2dbg.h (dwarf2_move_insn): Declare.
1242 * dwarf2dbg.c (line_subseg): Add pmove_tail.
1243 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
1244 (dwarf2_gen_line_info_1): Update call accordingly.
1245 (dwarf2_move_insn): New function.
1246 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
1248 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
1252 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
1255 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
1256 (dwarf2_gen_line_info_1): Delete.
1257 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
1258 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
1259 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
1260 (dwarf2_directive_loc): Push previous .locs instead of generating
1263 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1265 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
1266 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
1268 2013-06-13 Nick Clifton <nickc@redhat.com>
1271 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
1272 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
1273 function. Generates an error if the adjusted offset is out of a
1276 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
1278 * config/tc-nios2.c (md_apply_fix): Mask constant
1279 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
1281 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
1283 * config/tc-mips.c (append_insn): Don't do branch relaxation for
1284 MIPS-3D instructions either.
1285 (md_convert_frag): Update the COPx branch mask accordingly.
1287 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
1289 * doc/as.texinfo (Overview): Add --relax-branch and
1291 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
1294 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
1296 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
1299 2013-06-08 Catherine Moore <clm@codesourcery.com>
1301 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
1302 (is_opcode_valid_16): Pass ase value to opcode_is_member.
1303 (append_insn): Change INSN_xxxx to ASE_xxxx.
1305 2013-06-01 George Thomas <george.thomas@atmel.com>
1307 * gas/config/tc-avr.c: Change ISA for devices with USB support to
1310 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
1312 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
1315 2013-05-31 Paul Brook <paul@codesourcery.com>
1317 * config/tc-mips.c (s_ehword): New.
1319 2013-05-30 Paul Brook <paul@codesourcery.com>
1321 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
1323 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
1325 * write.c (resolve_reloc_expr_symbols): On REL targets don't
1326 convert relocs who have no relocatable field either. Rephrase
1327 the conditional so that the PC-relative check is only applied
1330 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1332 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
1335 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
1337 * config/tc-aarch64.c (reloc_table): Update to use
1338 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
1339 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
1340 (md_apply_fix): Likewise.
1341 (aarch64_force_relocation): Likewise.
1343 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1345 * config/tc-arm.c (it_fsm_post_encode): Improve
1346 warning messages about deprecated IT block formats.
1348 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
1350 * config/tc-aarch64.c (md_apply_fix): Move value range checking
1351 inside fx_done condition.
1353 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
1355 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
1357 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
1359 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
1360 and clean up warning when using PRINT_OPCODE_TABLE.
1362 2013-05-20 Alan Modra <amodra@gmail.com>
1364 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
1365 and data fixups performing shift/high adjust/sign extension on
1366 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
1367 when writing data fixups rather than recalculating size.
1369 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
1371 * doc/c-msp430.texi: Fix typo.
1373 2013-05-16 Tristan Gingold <gingold@adacore.com>
1375 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
1376 are also TOC symbols.
1378 2013-05-16 Nick Clifton <nickc@redhat.com>
1380 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
1381 Add -mcpu command to specify core type.
1382 * doc/c-msp430.texi: Update documentation.
1384 2013-05-09 Andrew Pinski <apinski@cavium.com>
1386 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
1387 (mips_opts): Update for the new field.
1388 (file_ase_virt): New variable.
1389 (ISA_SUPPORTS_VIRT_ASE): New macro.
1390 (ISA_SUPPORTS_VIRT64_ASE): New macro.
1391 (MIPS_CPU_ASE_VIRT): New define.
1392 (is_opcode_valid): Handle ase_virt.
1393 (macro_build): Handle "+J".
1394 (validate_mips_insn): Likewise.
1395 (mips_ip): Likewise.
1396 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
1397 (md_longopts): Add mvirt and mnovirt
1398 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
1399 (mips_after_parse_args): Handle ase_virt field.
1400 (s_mipsset): Handle "virt" and "novirt".
1401 (mips_elf_final_processing): Add a comment about virt ASE might need
1403 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
1404 * doc/c-mips.texi: Document -mvirt and -mno-virt.
1405 Document ".set virt" and ".set novirt".
1407 2013-05-09 Alan Modra <amodra@gmail.com>
1409 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
1410 control of operand flag bits.
1412 2013-05-07 Alan Modra <amodra@gmail.com>
1414 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
1415 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
1416 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
1417 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
1418 (md_apply_fix): Set fx_no_overflow for assorted relocations.
1419 Shift and sign-extend fieldval for use by some VLE reloc
1420 operand->insert functions.
1422 2013-05-06 Paul Brook <paul@codesourcery.com>
1423 Catherine Moore <clm@codesourcery.com>
1425 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
1426 (limited_pcrel_reloc_p): Likewise.
1427 (md_apply_fix): Likewise.
1428 (tc_gen_reloc): Likewise.
1430 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
1432 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
1433 (mips_fix_adjustable): Adjust pc-relative check to use
1436 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
1438 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
1439 (s_mips_stab): Do not restrict to stabn only.
1441 2013-05-02 Nick Clifton <nickc@redhat.com>
1443 * config/tc-msp430.c: Add support for the MSP430X architecture.
1444 Add code to insert a NOP instruction after any instruction that
1445 might change the interrupt state.
1446 Add support for the LARGE memory model.
1447 Add code to initialise the .MSP430.attributes section.
1448 * config/tc-msp430.h: Add support for the MSP430X architecture.
1449 * doc/c-msp430.texi: Document the new -mL and -mN command line
1451 * NEWS: Mention support for the MSP430X architecture.
1453 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
1455 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
1456 alpha*-*-linux*ecoff*.
1458 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
1460 * config/tc-mips.c (mips_ip): Add sizelo.
1461 For "+C", "+G", and "+H", set sizelo and compare against it.
1463 2013-04-29 Nick Clifton <nickc@redhat.com>
1465 * as.c (Options): Add -gdwarf-sections.
1466 (parse_args): Likewise.
1467 * as.h (flag_dwarf_sections): Declare.
1468 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
1469 (process_entries): When -gdwarf-sections is enabled generate
1470 fragmentary .debug_line sections.
1471 (out_debug_line): Set the section for the .debug_line section end
1473 * doc/as.texinfo: Document -gdwarf-sections.
1474 * NEWS: Mention -gdwarf-sections.
1476 2013-04-26 Christian Groessler <chris@groessler.org>
1478 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
1479 according to the target parameter. Don't call s_segm since s_segm
1480 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
1482 (md_begin): Call s_segm according to target parameter from command
1485 2013-04-25 Alan Modra <amodra@gmail.com>
1487 * configure.in: Allow little-endian linux.
1488 * configure: Regenerate.
1490 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1492 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1493 "fstatus" control register to "eccinj".
1495 2013-04-19 Kai Tietz <ktietz@redhat.com>
1497 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1499 2013-04-15 Julian Brown <julian@codesourcery.com>
1501 * expr.c (add_to_result, subtract_from_result): Make global.
1502 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1503 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1504 subtract_from_result to handle extra bit of precision for .sleb128
1507 2013-04-10 Julian Brown <julian@codesourcery.com>
1509 * read.c (convert_to_bignum): Add sign parameter. Use it
1510 instead of X_unsigned to determine sign of resulting bignum.
1511 (emit_expr): Pass extra argument to convert_to_bignum.
1512 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1513 X_extrabit to convert_to_bignum.
1514 (parse_bitfield_cons): Set X_extrabit.
1515 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1516 Initialise X_extrabit field as appropriate.
1517 (add_to_result): New.
1518 (subtract_from_result): New.
1520 * expr.h (expressionS): Add X_extrabit field.
1522 2013-04-10 Jan Beulich <jbeulich@suse.com>
1524 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1525 register being PC when is_t or writeback, and use distinct
1526 diagnostic for the latter case.
1528 2013-04-10 Jan Beulich <jbeulich@suse.com>
1530 * gas/config/tc-arm.c (parse_operands): Re-write
1531 po_barrier_or_imm().
1532 (do_barrier): Remove bogus constraint().
1533 (do_t_barrier): Remove.
1535 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1537 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1538 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1540 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1542 2013-04-09 Jan Beulich <jbeulich@suse.com>
1544 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1545 Use local variable Rt in more places.
1546 (do_vmsr): Accept all control registers.
1548 2013-04-09 Jan Beulich <jbeulich@suse.com>
1550 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1551 if there was none specified for moves between scalar and core
1554 2013-04-09 Jan Beulich <jbeulich@suse.com>
1556 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1557 NEON_ALL_LANES case.
1559 2013-04-08 Jan Beulich <jbeulich@suse.com>
1561 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1564 2013-04-08 Jan Beulich <jbeulich@suse.com>
1566 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1569 2013-04-03 Alan Modra <amodra@gmail.com>
1571 * doc/as.texinfo: Add support to generate man options for h8300.
1572 * doc/c-h8300.texi: Likewise.
1574 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1576 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1579 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1582 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1584 2013-03-26 Nick Clifton <nickc@redhat.com>
1587 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1588 start of the file each time.
1591 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1594 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1596 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1599 2013-03-21 Will Newton <will.newton@linaro.org>
1601 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1602 pc-relative str instructions in Thumb mode.
1604 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1606 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1607 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1609 * config/tc-h8300.h: Remove duplicated defines.
1611 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1614 * tc-avr.c (mcu_has_3_byte_pc): New function.
1615 (tc_cfi_frame_initial_instructions): Call it to find return
1618 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1621 * config/tc-tic6x.c (tic6x_try_encode): Handle
1622 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1623 encode register pair numbers when required.
1625 2013-03-15 Will Newton <will.newton@linaro.org>
1627 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1628 in vstr in Thumb mode for pre-ARMv7 cores.
1630 2013-03-14 Andreas Schwab <schwab@suse.de>
1632 * doc/c-arc.texi (ARC Directives): Revert last change and use
1633 @itemize instead of @table.
1634 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1636 2013-03-14 Nick Clifton <nickc@redhat.com>
1639 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1640 NULL message, instead just check ARM_CPU_IS_ANY directly.
1642 2013-03-14 Nick Clifton <nickc@redhat.com>
1645 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1647 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1648 to the @item directives.
1649 (ARM-Neon-Alignment): Move to correct place in the document.
1650 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1652 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1655 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1657 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1658 case. Add default BAD_CASE to switch.
1660 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1662 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1663 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1665 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1667 * config/tc-arm.c (crc_ext_armv8): New feature set.
1668 (UNPRED_REG): New macro.
1669 (do_crc32_1): New function.
1670 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1671 do_crc32ch, do_crc32cw): Likewise.
1673 (insns): Add entries for crc32 mnemonics.
1674 (arm_extensions): Add entry for crc.
1676 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1678 * write.h (struct fix): Add fx_dot_frag field.
1679 (dot_frag): Declare.
1680 * write.c (dot_frag): New variable.
1681 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1682 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1683 * expr.c (expr): Save value of frag_now in dot_frag when setting
1685 * read.c (emit_expr): Likewise. Delete comments.
1687 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1689 * config/tc-i386.c (flag_code_names): Removed.
1690 (i386_index_check): Rewrote.
1692 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1694 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1696 (aarch64_double_precision_fmovable): New function.
1697 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1698 function; handle hexadecimal representation of IEEE754 encoding.
1699 (parse_operands): Update the call to parse_aarch64_imm_float.
1701 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1703 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1704 (check_hle): Updated.
1705 (md_assemble): Likewise.
1706 (parse_insn): Likewise.
1708 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1710 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1711 (md_assemble): Check if REP prefix is OK.
1712 (parse_insn): Remove expecting_string_instruction. Set
1715 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1717 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1719 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1721 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1722 for system registers.
1724 2013-02-27 DJ Delorie <dj@redhat.com>
1726 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1727 (rl78_op): Handle %code().
1728 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1729 (tc_gen_reloc): Likwise; convert to a computed reloc.
1730 (md_apply_fix): Likewise.
1732 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1734 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1736 2013-02-25 Terry Guo <terry.guo@arm.com>
1738 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1739 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1740 list of accepted CPUs.
1742 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1745 * config/tc-i386.c (cpu_arch): Add ".smap".
1747 * doc/c-i386.texi: Document smap.
1749 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1751 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1752 mips_assembling_insn appropriately.
1753 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1755 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1757 * config/tc-mips.c (append_insn): Correct indentation, remove
1760 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1762 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1764 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1766 * configure.tgt: Add nios2-*-rtems*.
1768 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1770 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1773 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1775 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1776 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1778 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1780 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1783 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1784 Andrew Jenner <andrew@codesourcery.com>
1786 Based on patches from Altera Corporation.
1788 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1789 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1790 * Makefile.in: Regenerated.
1791 * configure.tgt: Add case for nios2*-linux*.
1792 * config/obj-elf.c: Conditionally include elf/nios2.h.
1793 * config/tc-nios2.c: New file.
1794 * config/tc-nios2.h: New file.
1795 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1796 * doc/Makefile.in: Regenerated.
1797 * doc/all.texi: Set NIOSII.
1798 * doc/as.texinfo (Overview): Add Nios II options.
1799 (Machine Dependencies): Include c-nios2.texi.
1800 * doc/c-nios2.texi: New file.
1801 * NEWS: Note Altera Nios II support.
1803 2013-02-06 Alan Modra <amodra@gmail.com>
1806 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1807 Don't skip fixups with fx_subsy non-NULL.
1808 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1809 with fx_subsy non-NULL.
1811 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1813 * doc/c-metag.texi: Add "@c man" markers.
1815 2013-02-04 Alan Modra <amodra@gmail.com>
1817 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1819 (TC_ADJUST_RELOC_COUNT): Delete.
1820 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1822 2013-02-04 Alan Modra <amodra@gmail.com>
1824 * po/POTFILES.in: Regenerate.
1826 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1828 * config/tc-metag.c: Make SWAP instruction less permissive with
1831 2013-01-29 DJ Delorie <dj@redhat.com>
1833 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1834 relocs in .word/.etc statements.
1836 2013-01-29 Roland McGrath <mcgrathr@google.com>
1838 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1839 immediate value for 8-bit offset" error so it shows line info.
1841 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1843 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1846 2013-01-24 Nick Clifton <nickc@redhat.com>
1848 * config/tc-v850.c: Add support for e3v5 architecture.
1849 * doc/c-v850.texi: Mention new support.
1851 2013-01-23 Nick Clifton <nickc@redhat.com>
1854 * config/tc-avr.c: Include dwarf2dbg.h.
1856 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1858 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1859 (tc_i386_fix_adjustable): Likewise.
1860 (lex_got): Likewise.
1861 (tc_gen_reloc): Likewise.
1863 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1865 * config/tc-aarch64.c (output_operand_error_record): Change to output
1866 the out-of-range error message as value-expected message if there is
1867 only one single value in the expected range.
1868 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1869 LSL #0 as a programmer-friendly feature.
1871 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1873 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1874 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1875 BFD_RELOC_64_SIZE relocations.
1876 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1878 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1879 relocations against local symbols.
1881 2013-01-16 Alan Modra <amodra@gmail.com>
1883 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1884 finding some sort of toc syntax error, and break to avoid
1885 compiler uninit warning.
1887 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1890 * config/tc-i386.c (lex_got): Increment length by 1 if the
1891 relocation token is removed.
1893 2013-01-15 Nick Clifton <nickc@redhat.com>
1895 * config/tc-v850.c (md_assemble): Allow signed values for
1898 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1900 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1903 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1905 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1906 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1907 * config/tc-ppc.c (md_show_usage): Likewise.
1908 (ppc_handle_align): Handle power8's group ending nop.
1910 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1912 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1913 that the assember exits after the opcodes have been printed.
1915 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1917 * app.c: Remove trailing white spaces.
1921 * dw2gencfi.c: Likewise.
1922 * dwarf2dbg.h: Likewise.
1923 * ecoff.c: Likewise.
1924 * input-file.c: Likewise.
1925 * itbl-lex.h: Likewise.
1926 * output-file.c: Likewise.
1929 * subsegs.c: Likewise.
1930 * symbols.c: Likewise.
1931 * write.c: Likewise.
1932 * config/tc-i386.c: Likewise.
1933 * doc/Makefile.am: Likewise.
1934 * doc/Makefile.in: Likewise.
1935 * doc/c-aarch64.texi: Likewise.
1936 * doc/c-alpha.texi: Likewise.
1937 * doc/c-arc.texi: Likewise.
1938 * doc/c-arm.texi: Likewise.
1939 * doc/c-avr.texi: Likewise.
1940 * doc/c-bfin.texi: Likewise.
1941 * doc/c-cr16.texi: Likewise.
1942 * doc/c-d10v.texi: Likewise.
1943 * doc/c-d30v.texi: Likewise.
1944 * doc/c-h8300.texi: Likewise.
1945 * doc/c-hppa.texi: Likewise.
1946 * doc/c-i370.texi: Likewise.
1947 * doc/c-i386.texi: Likewise.
1948 * doc/c-i860.texi: Likewise.
1949 * doc/c-m32c.texi: Likewise.
1950 * doc/c-m32r.texi: Likewise.
1951 * doc/c-m68hc11.texi: Likewise.
1952 * doc/c-m68k.texi: Likewise.
1953 * doc/c-microblaze.texi: Likewise.
1954 * doc/c-mips.texi: Likewise.
1955 * doc/c-msp430.texi: Likewise.
1956 * doc/c-mt.texi: Likewise.
1957 * doc/c-s390.texi: Likewise.
1958 * doc/c-score.texi: Likewise.
1959 * doc/c-sh.texi: Likewise.
1960 * doc/c-sh64.texi: Likewise.
1961 * doc/c-tic54x.texi: Likewise.
1962 * doc/c-tic6x.texi: Likewise.
1963 * doc/c-v850.texi: Likewise.
1964 * doc/c-xc16x.texi: Likewise.
1965 * doc/c-xgate.texi: Likewise.
1966 * doc/c-xtensa.texi: Likewise.
1967 * doc/c-z80.texi: Likewise.
1968 * doc/internals.texi: Likewise.
1970 2013-01-10 Roland McGrath <mcgrathr@google.com>
1972 * hash.c (hash_new_sized): Make it global.
1973 * hash.h: Declare it.
1974 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1977 2013-01-10 Will Newton <will.newton@imgtec.com>
1979 * Makefile.am: Add Meta.
1980 * Makefile.in: Regenerate.
1981 * config/tc-metag.c: New file.
1982 * config/tc-metag.h: New file.
1983 * configure.tgt: Add Meta.
1984 * doc/Makefile.am: Add Meta.
1985 * doc/Makefile.in: Regenerate.
1986 * doc/all.texi: Add Meta.
1987 * doc/as.texiinfo: Document Meta options.
1988 * doc/c-metag.texi: New file.
1990 2013-01-09 Steve Ellcey <sellcey@mips.com>
1992 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1994 * config/tc-mips.c (internalError): Remove, replace with abort.
1996 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1998 * config/tc-aarch64.c (parse_operands): Change to compare the result
1999 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
2001 2013-01-07 Nick Clifton <nickc@redhat.com>
2004 * config/tc-arm.c (skip_past_char): Skip whitespace before the
2005 anticipated character.
2006 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
2007 here as it is no longer needed.
2009 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
2011 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
2012 * doc/c-score.texi (SCORE-Opts): Likewise.
2013 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
2015 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
2017 * config/tc-mips.c: Add support for MIPS r5900.
2018 Add M_LQ_AB and M_SQ_AB to support large values for instructions
2020 (can_swap_branch_p, get_append_method): Detect some conditional
2021 short loops to fix a bug on the r5900 by NOP in the branch delay
2023 (M_MUL): Support 3 operands in multu on r5900.
2024 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
2025 (s_mipsset): Force 32 bit floating point on r5900.
2026 (mips_ip): Check parameter range of instructions mfps and mtps on
2028 * configure.in: Detect CPU type when target string contains r5900
2029 (e.g. mips64r5900el-linux-gnu).
2031 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
2033 * as.c (parse_args): Update copyright year to 2013.
2035 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
2037 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
2040 2013-01-02 Nick Clifton <nickc@redhat.com>
2043 * config/tc-arm.c (parse_address_main): Skip whitespace before a
2046 For older changes see ChangeLog-2012
2048 Copyright (C) 2013 Free Software Foundation, Inc.
2050 Copying and distribution of this file, with or without modification,
2051 are permitted in any medium without royalty provided the copyright
2052 notice and this notice are preserved.
2058 version-control: never
projects / platform / upstream / binutils.git / blob