1 2013-08-05 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (mips_lookup_insn): Make length and opend signed.
5 2013-08-04 Jürgen Urban <JuergenUrban@gmx.de>
6 Richard Sandiford <rdsandiford@googlemail.com>
8 * config/tc-mips.c (MAX_OPERANDS): Bump to 6.
9 (RWARN): Bump to 0x8000000.
10 (RTYPE_VI, RTYPE_VF, RTYPE_R5900_I, RTYPE_R5900_Q, RTYPE_R5900_R)
11 (RTYPE_R5900_ACC): New register types.
12 (RTYPE_MASK): Include them.
13 (R5900_I_NAMES, R5900_Q_NAMES, R5900_R_NAMES, R5900_ACC_NAMES): New
15 (reg_names): Include them.
16 (mips_parse_register_1): New function, split out from...
17 (mips_parse_register): ...here. Add a channels_ptr parameter.
18 Look for VU0 channel suffixes when nonnull.
19 (reg_lookup): Update the call to mips_parse_register.
20 (mips_parse_vu0_channels): New function.
21 (OT_CHANNELS, OT_DOUBLE_CHAR): New mips_operand_token_types.
22 (mips_operand_token): Add a "channels" field to the union.
23 Extend the comment above "ch" to OT_DOUBLE_CHAR.
24 (mips_parse_base_start): Match -- and ++. Handle channel suffixes.
25 (mips_parse_argument_token): Handle channel suffixes here too.
26 (validate_mips_insn): Handle INSN2_VU0_CHANNEL_SUFFIX.
27 Ignore OP_VU0_MATCH_SUFFIX when calculating the used bits.
29 (md_begin): Register $vfN and $vfI registers.
30 (operand_reg_mask): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
31 (convert_reg_type): Handle OP_REG_VI, OP_REG_VF, OP_REG_R5900_I,
32 OP_REG_R5900_Q, OP_REG_R5900_R and OP_REG_R5900_ACC.
33 (match_vu0_suffix_operand): New function.
34 (match_operand): Handle OP_VU0_SUFFIX and OP_VU0_MATCH_SUFFIX.
35 (macro): Use "+7" rather than "E" for LDQ2 and STQ2.
36 (mips_lookup_insn): New function.
37 (mips_ip): Use it. Allow "+K" operands to be elided at the end
38 of an instruction. Handle '#' sequences.
40 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
42 * config/tc-mips.c (macro, mips16_macro): Create an array of operand
43 values and use it instead of sreg, treg, xreg, etc.
45 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
47 * config/tc-mips.c (match_int_operand): Use mips_int_operand_min
48 and mips_int_operand_max.
49 (mips16_immed_operand, mips16_immed_operands, MIPS16_NUM_IMMED):
51 (mips16_immed_operand, mips16_immed_in_range_p): New functions.
52 (mips16_immed, mips16_extended_frag): Use them. Use mips_int_operand
53 instead of mips16_immed_operand.
55 2013-08-03 Richard Sandiford <rdsandiford@googlemail.com>
57 * config/tc-mips.c (mips16_macro): Don't use move_register.
58 (mips16_ip): Allow macros to use 'p'.
60 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
62 * config/tc-mips.c (MAX_OPERANDS): New macro.
63 (mips_operand_array): New structure.
64 (mips_operands, mips16_operands, micromips_operands): New arrays.
65 (micromips_to_32_reg_b_map, micromips_to_32_reg_c_map)
66 (micromips_to_32_reg_e_map, micromips_to_32_reg_f_map)
67 (micromips_to_32_reg_g_map, micromips_to_32_reg_l_map)
68 (micromips_to_32_reg_q_map): Delete.
69 (insn_operands, insn_opno, insn_extract_operand): New functions.
70 (validate_mips_insn): Take a mips_operand_array as argument and
71 use it to build up a list of operands. Extend to handle INSN_MACRO
73 (validate_mips16_insn): New function.
74 (validate_micromips_insn): Take a mips_operand_array as argument.
76 (md_begin): Initialize mips_operands, mips16_operands and
77 micromips_operands. Call validate_mips_insn and
78 validate_micromips_insn for macro instructions too.
79 Call validate_mips16_insn for MIPS16 instructions.
80 (insn_read_mask, insn_write_mask, operand_reg_mask, insn_reg_mask):
82 (gpr_read_mask, gpr_write_mask, fpr_read_mask, fpr_write_mask): Use
83 them. Handle INSN_UDI.
84 (get_append_method): Use gpr_read_mask.
86 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
88 * config/tc-mips.c (compact_branch_p, uncond_branch_p): Use the same
89 flags for MIPS16 and non-MIPS16 instructions.
90 (gpr_mod_mask): Move the INSN2_MOD_SP case outside the micromips block.
91 (gpr_read_mask): Use INSN2_READ_GPR_31 for MIPS16 instructions too.
92 (gpr_write_mask): Remove MIPS16_INSN_WRITE_SP handling.
93 (can_swap_branch_p, get_append_method): Use the same flags for MIPS16
94 and non-MIPS16 instructions. Fix formatting.
96 2013-08-01 Richard Sandiford <rdsandiford@googlemail.com>
98 * config/tc-mips.c (reg_needs_delay): Move later in file.
100 (insns_between): Use gpr_read_mask instead of EXTRACT_OPERAND.
102 2013-07-26 Sergey Guriev <sergey.s.guriev@intel.com>
103 Alexander Ivchenko <alexander.ivchenko@intel.com>
104 Maxim Kuznetsov <maxim.kuznetsov@intel.com>
105 Sergey Lega <sergey.s.lega@intel.com>
106 Anna Tikhonova <anna.tikhonova@intel.com>
107 Ilya Tocar <ilya.tocar@intel.com>
108 Andrey Turetskiy <andrey.turetskiy@intel.com>
109 Ilya Verbin <ilya.verbin@intel.com>
110 Kirill Yukhin <kirill.yukhin@intel.com>
111 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
113 * config/tc-i386-intel.c (O_zmmword_ptr): New.
114 (i386_types): Add zmmword.
115 (i386_intel_simplify_register): Allow regzmm.
116 (i386_intel_simplify): Handle zmmwords.
117 (i386_intel_operand): Handle RC/SAE, vector operations and
119 * config/tc-i386.c (ZMMWORD_MNEM_SUFFIX): New.
120 (struct RC_Operation): New.
121 (struct Mask_Operation): New.
122 (struct Broadcast_Operation): New.
123 (vex_prefix): Size of bytes increased to 4 to support EVEX
125 (enum i386_error): Add new error codes: unsupported_broadcast,
126 broadcast_not_on_src_operand, broadcast_needed,
127 unsupported_masking, mask_not_on_destination, no_default_mask,
128 unsupported_rc_sae, rc_sae_operand_not_last_imm,
129 invalid_register_operand, try_vector_disp8.
130 (struct _i386_insn): Add new fields vrex, need_vrex, mask,
131 rounding, broadcast, memshift.
132 (struct RC_name): New.
133 (RC_NamesTable): New.
136 (extra_symbol_chars): Add '{'.
137 (cpu_arch): Add AVX512F, AVX512CD, AVX512ER and AVX512PF.
138 (i386_operand_type): Add regzmm, regmask and vec_disp8.
139 (match_mem_size): Handle zmmwords.
140 (operand_type_match): Handle zmm-registers.
141 (mode_from_disp_size): Handle vec_disp8.
142 (fits_in_vec_disp8): New.
143 (md_begin): Handle {} properly.
144 (type_names): Add "rZMM", "Mask reg" and "Vector d8".
145 (build_vex_prefix): Handle vrex.
146 (build_evex_prefix): New.
147 (process_immext): Adjust to properly handle EVEX.
148 (md_assemble): Add EVEX encoding support.
149 (swap_2_operands): Correctly handle operands with masking,
150 broadcasting or RC/SAE.
151 (check_VecOperands): Support EVEX features.
152 (VEX_check_operands): Properly handle 16 upper [xyz]mm registers.
153 (match_template): Support regzmm and handle new error codes.
154 (process_suffix): Handle zmmwords and zmm-registers.
155 (check_byte_reg): Extend to zmm-registers.
156 (process_operands): Extend to zmm-registers.
157 (build_modrm_byte): Handle EVEX.
158 (output_insn): Adjust to properly handle EVEX case.
159 (disp_size): Handle vec_disp8.
160 (output_disp): Support compressed disp8*N evex feature.
161 (output_imm): Handle RC/SAE immediates properly.
162 (check_VecOperations): New.
163 (i386_immediate): Handle EVEX features.
164 (i386_index_check): Handle zmmwords and zmm-registers.
165 (RC_SAE_immediate): New.
166 (i386_att_operand): Handle EVEX features.
167 (parse_real_register): Add a check for ZMM/Mask registers.
168 (OPTION_MEVEXLIG): New.
169 (OPTION_MEVEXWIG): New.
170 (md_longopts): Add mevexlig and mevexwig.
171 (md_parse_option): Handle mevexlig and mevexwig options.
172 (md_show_usage): Add description for mevexlig and mevexwig.
173 * doc/c-i386.texi: Document avx512f/.avx512f, avx512cd/.avx512cd,
174 avx512er/.avx512er, avx512pf/.avx512pf, mevexlig and mevexwig.
176 2013-07-25 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
178 * config/tc-i386.c (cpu_arch): Add .sha.
179 * doc/c-i386.texi: Document sha/.sha.
181 2013-07-24 Anna Tikhonova <anna.tikhonova@intel.com>
182 Kirill Yukhin <kirill.yukhin@intel.com>
183 Michael Zolotukhin <michael.v.zolotukhin@intel.com>
185 * config/tc-i386.c (BND_PREFIX): New.
186 (struct _i386_insn): Add new field bnd_prefix.
187 (add_bnd_prefix): New.
189 (i386_operand_type): Add regbnd.
190 (md_assemble): Handle BND prefixes.
191 (parse_insn): Likewise.
192 (output_branch): Likewise.
193 (output_jump): Likewise.
194 (build_modrm_byte): Handle regbnd.
195 (OPTION_MADD_BND_PREFIX): New.
196 (md_longopts): Add entry for 'madd-bnd-prefix'.
197 (md_parse_option): Handle madd-bnd-prefix option.
198 (md_show_usage): Add description for madd-bnd-prefix
200 * doc/c-i386.texi: Document mpx/.mpx and -madd-bnd-prefix.
202 2013-07-24 Tristan Gingold <gingold@adacore.com>
204 * config/tc-ppc.c (md_apply_fix): Adjust BFD_RELOC_PPC_B16 on
207 2013-07-24 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
209 * config/tc-s390.c (s390_machine): Don't force the .machine
210 argument to lower case.
212 2013-07-22 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
214 * config/tc-arm.c (s_arm_arch_extension): Improve error message
215 for invalid extension.
217 2013-07-19 Yufeng Zhang <yufeng.zhang@arm.com>
219 * config/tc-aarch64.c (enum aarch64_abi_type): New enumeration tag.
220 (AARCH64_ABI_LP64, AARCH64_ABI_ILP32): New enumerators.
221 (aarch64_abi): New variable.
222 (ilp32_p): Change to be a macro.
223 (aarch64_opts): Remove the support for option -milp32 and -mlp64.
224 (struct aarch64_option_abi_value_table): New struct.
225 (aarch64_abis): New table.
226 (aarch64_parse_abi): New function.
227 (aarch64_long_opts): Add entry for -mabi=.
228 * doc/as.texinfo (Target AArch64 options): Document -mabi.
229 * doc/c-aarch64.texi: Likewise.
231 2013-07-18 Jim Thomas <thomas@cfht.hawaii.edu>
233 * config/tc-i386-intel.c (i386_intel_operand): Fixed signed vs
236 2013-07-18 Sandeep Kumar Singh <Sandeep.Singh2@kpitcummins.com>
238 * config/rx-defs.h: Add macros for RX100, RX200, RX600, and
240 * config/rx-parse.y: (rx_check_float_support): Add function to
241 check floating point operation support for target RX100 and
243 * config/tc-rx.c: Add CPU options RX100, RX200, RX600, and RX610.
244 * doc/c-rx.texi: Add -mcpu option to recognize macros for RX100,
245 RX200, RX600, and RX610
247 2013-07-18 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
249 * config/tc-avr.c (md_show_usage): Add avrxmega2 to help text
251 2013-07-18 Vishnu K.S <vishnu.k_s@atmel.com>
253 * config/tc-avr.c: Make ata6289's ISA to AVR_ISA_AVR4.
254 * doc/c-avr.texi: Likewise.
256 2013-07-15 Richard Sandiford <rdsandiford@googlemail.com>
258 * config/tc-mips.c (match_save_restore_list_operand): Avoid -Wformat
259 error with older GCCs.
260 (mips16_macro_build): Dereference args.
262 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
264 * config/tc-mips.c (mips_prefer_vec_regno, mips_parse_register):
265 New functions, split out from...
266 (reg_lookup): ...here. Remove itbl support.
267 (reglist_lookup): Delete.
268 (mips_operand_token_type): New enum.
269 (mips_operand_token): New structure.
270 (mips_operand_tokens): New variable.
271 (mips_add_token, mips_parse_base_start, mips_parse_argument_token)
272 (mips_parse_arguments): New functions.
273 (md_begin): Initialize mips_operand_tokens.
274 (mips_arg_info): Add a token field. Remove optional_reg field.
275 (match_char, match_expression): New functions.
276 (match_const_int): Use match_expression. Remove "s" argument
277 and return a boolean result. Remove O_register handling.
278 (match_regno, match_reg, match_reg_range): New functions.
279 (match_int_operand, match_mapped_int_operand, match_msb_operand)
280 (match_reg_operand, match_reg_pair_operand, match_perf_reg_operand)
281 (match_addiusp_operand, match_clo_clz_dest_operand)
282 (match_lwm_swm_list_operand, match_entry_exit_operand)
283 (match_save_restore_list_operand, match_mdmx_imm_reg_operand)
284 (match_tied_reg_operand): Remove "s" argument and return a boolean
285 result. Match tokens rather than text. Update calls to
286 match_const_int. Rely on match_regno to call check_regno.
287 (match_pcrel_operand, match_pc_operand): Replace "s" argument with
288 "arg" argument. Return a boolean result.
289 (parse_float_constant): Replace with...
290 (match_float_constant): ...this new function.
291 (match_operand): Remove "s" argument and return a boolean result.
292 Update calls to subfunctions.
293 (mips_ip, mips16_ip): Call mips_parse_arguments. Use match routines
294 rather than string-parsing routines. Update handling of optional
295 registers for token scheme.
297 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
299 * config/tc-mips.c (parse_float_constant): Split out from...
302 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
304 * config/tc-mips.c (INSERT_BITS, INSERT_OPERAND, MIPS16_INSERT_OPERAND):
307 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
309 * config/tc-mips.c (mips32_to_16_reg_map): Delete.
310 (match_entry_exit_operand): New function.
311 (match_save_restore_list_operand): Likewise.
312 (match_operand): Use them.
313 (check_absolute_expr): Delete.
314 (mips16_ip): Rewrite main parsing loop to use mips_operands.
316 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
318 * config/tc-mips.c: Enable functions commented out in previous patch.
319 (SKIP_SPACE_TABS): Move further up file.
320 (mips32_to_micromips_reg_b_map, mips32_to_micromips_reg_c_map)
321 (mips32_to_micromips_reg_d_map, mips32_to_micromips_reg_e_map)
322 (ips32_to_micromips_reg_f_map, mips32_to_micromips_reg_g_map)
323 (mips32_to_micromips_reg_l_map, mips32_to_micromips_reg_m_map)
324 (mips32_to_micromips_reg_q_map, mips32_to_micromips_reg_n_map)
325 (micromips_imm_b_map, micromips_imm_c_map): Delete.
326 (mips_lookup_reg_pair): Delete.
327 (macro): Use report_bad_range and report_bad_field.
328 (mips_immed, expr_const_in_range): Delete.
329 (mips_ip): Rewrite main parsing loop to use new functions.
331 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
333 * config/tc-mips.c (mips_oddfpreg_ok): Move further up file.
334 Change return type to bfd_boolean.
335 (report_bad_range, report_bad_field): New functions.
336 (mips_arg_info): New structure.
337 (match_const_int, convert_reg_type, check_regno, match_int_operand)
338 (match_mapped_int_operand, match_msb_operand, match_reg_operand)
339 (match_reg_pair_operand, match_pcrel_operand, match_perf_reg_operand)
340 (match_addiusp_operand, match_clo_clz_dest_operand)
341 (match_lwm_swm_list_operand, match_mdmx_imm_reg_operand)
342 (match_pc_operand, match_tied_reg_operand, match_operand)
343 (check_completed_insn): New functions, commented out for now.
345 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
347 * config/tc-mips.c (insn_insert_operand): New function.
348 (macro_build, mips16_macro_build): Put null character check
349 in the for loop and convert continues to breaks. Use operand
350 structures to handle constant operands.
352 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
354 * config/tc-mips.c (validate_mips_insn): Move further up file.
355 Add insn_bits and decode_operand arguments. Use the mips_operand
356 fields to work out which bits an operand occupies. Detect double
358 (validate_micromips_insn): Move further up file. Call into
361 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
363 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
365 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
367 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
369 (macro): Update accordingly.
371 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
373 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
375 (md_assemble): Remove imm_reloc handling.
376 (mips_ip): Update commentary. Use offset_expr and offset_reloc
377 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
378 Use a temporary array rather than imm_reloc when parsing
379 constant expressions. Remove imm_reloc initialization.
380 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
381 for the relaxable field. Use a relax_char variable to track the
382 type of this field. Remove imm_reloc initialization.
384 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
386 * config/tc-mips.c (mips16_ip): Handle "I".
388 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
390 * config/tc-mips.c (mips_flag_nan2008): New variable.
391 (options): Add OPTION_NAN enum value.
392 (md_longopts): Handle it.
393 (md_parse_option): Likewise.
394 (s_nan): New function.
395 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
396 (md_show_usage): Add -mnan.
398 * doc/as.texinfo (Overview): Add -mnan.
399 * doc/c-mips.texi (MIPS Opts): Document -mnan.
400 (MIPS NaN Encodings): New node. Document .nan directive.
401 (MIPS-Dependent): List the new node.
403 2013-07-09 Tristan Gingold <gingold@adacore.com>
405 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
407 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
409 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
410 for 'A' and assume that the constant has been elided if the result
413 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
415 * config/tc-mips.c (gprel16_reloc_p): New function.
416 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
418 (offset_high_part, small_offset_p): New functions.
419 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
420 register load and store macros, handle the 16-bit offset case first.
421 If a 16-bit offset is not suitable for the instruction we're
422 generating, load it into the temporary register using
423 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
424 M_L_DAB code once the address has been constructed. For double load
425 and store macros, again handle the 16-bit offset case first.
426 If the second register cannot be accessed from the same high
427 part as the first, load it into AT using ADDRESS_ADDI_INSN.
428 Fix the handling of LD in cases where the first register is the
429 same as the base. Also handle the case where the offset is
430 not 16 bits and the second register cannot be accessed from the
431 same high part as the first. For unaligned loads and stores,
432 fuse the offbits == 12 and old "ab" handling. Apply this handling
433 whenever the second offset needs a different high part from the first.
434 Construct the offset using ADDRESS_ADDI_INSN where possible,
435 for offbits == 16 as well as offbits == 12. Use offset_reloc
436 when constructing the individual loads and stores.
437 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
438 and offset_reloc before matching against a particular opcode.
439 Handle elided 'A' constants. Allow 'A' constants to use
440 relocation operators.
442 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
444 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
445 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
446 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
448 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
450 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
451 Require the msb to be <= 31 for "+s". Check that the size is <= 31
452 for both "+s" and "+S".
454 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
456 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
457 (mips_ip, mips16_ip): Handle "+i".
459 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
461 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
462 (micromips_to_32_reg_h_map): Rename to...
463 (micromips_to_32_reg_h_map1): ...this.
464 (micromips_to_32_reg_i_map): Rename to...
465 (micromips_to_32_reg_h_map2): ...this.
466 (mips_lookup_reg_pair): New function.
467 (gpr_write_mask, macro): Adjust after above renaming.
468 (validate_micromips_insn): Remove "mi" handling.
469 (mips_ip): Likewise. Parse both registers in a pair for "mh".
471 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
473 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
474 (mips_ip): Remove "+D" and "+T" handling.
476 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
478 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
481 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
483 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
485 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
487 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
488 (aarch64_force_relocation): Likewise.
490 2013-07-02 Alan Modra <amodra@gmail.com>
492 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
494 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
496 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
497 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
498 Replace @sc{mips16} with literal `MIPS16'.
499 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
501 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
503 * config/tc-aarch64.c (reloc_table): Replace
504 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
505 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
506 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
507 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
508 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
509 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
510 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
511 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
512 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
513 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
514 (aarch64_force_relocation): Likewise.
516 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
518 * config/tc-aarch64.c (ilp32_p): New static variable.
519 (elf64_aarch64_target_format): Return the target according to the
521 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
522 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
523 (aarch64_dwarf2_addr_size): New function.
524 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
525 (DWARF2_ADDR_SIZE): New define.
527 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
529 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
531 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
533 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
535 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
537 * config/tc-mips.c (mips_set_options): Add insn32 member.
538 (mips_opts): Initialize it.
539 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
540 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
541 (md_longopts): Add "minsn32" and "mno-insn32" options.
542 (is_size_valid): Handle insn32 mode.
543 (md_assemble): Pass instruction string down to macro.
544 (brk_fmt): Add second dimension and insn32 mode initializers.
545 (mfhl_fmt): Likewise.
546 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
547 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
548 (macro_build_jalr, move_register): Handle insn32 mode.
549 (macro_build_branch_rs): Likewise.
550 (macro): Handle insn32 mode.
551 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
552 (mips_ip): Handle insn32 mode.
553 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
554 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
555 (mips_handle_align): Handle insn32 mode.
556 (md_show_usage): Add -minsn32 and -mno-insn32.
558 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
560 (-minsn32, -mno-insn32): New options.
561 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
563 (MIPS assembly options): New node. Document .set insn32 and
565 (MIPS-Dependent): List the new node.
567 2013-06-25 Nick Clifton <nickc@redhat.com>
569 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
570 the PC in indirect addressing on 430xv2 parts.
571 (msp430_operands): Add version test to hardware bug encoding
574 2013-06-24 Roland McGrath <mcgrathr@google.com>
576 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
577 so it skips whitespace before it.
578 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
580 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
581 (arm_reg_parse_multi): Skip whitespace first.
582 (parse_reg_list): Likewise.
583 (parse_vfp_reg_list): Likewise.
584 (s_arm_unwind_save_mmxwcg): Likewise.
586 2013-06-24 Nick Clifton <nickc@redhat.com>
589 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
591 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
593 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
595 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
597 * config/tc-mips.c: Assert that offsetT and valueT are at least
599 (GPR_SMIN, GPR_SMAX): New macros.
600 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
602 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
604 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
605 conditions. Remove any code deselected by them.
606 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
608 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
610 * NEWS: Note removal of ECOFF support.
611 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
612 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
613 (MULTI_CFILES): Remove config/e-mipsecoff.c.
614 * Makefile.in: Regenerate.
615 * configure.in: Remove MIPS ECOFF references.
616 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
618 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
619 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
620 (mips-*-*): ...this single case.
621 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
622 MIPS emulations to be e-mipself*.
623 * configure: Regenerate.
624 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
625 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
626 (mips-*-sysv*): Remove coff and ecoff cases.
627 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
628 * ecoff.c: Remove reference to MIPS ECOFF.
629 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
630 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
631 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
632 (mips_hi_fixup): Tweak comment.
633 (append_insn): Require a howto.
634 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
636 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
638 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
639 Use "CPU" instead of "cpu".
640 * doc/c-mips.texi: Likewise.
641 (MIPS Opts): Rename to MIPS Options.
642 (MIPS option stack): Rename to MIPS Option Stack.
643 (MIPS ASE instruction generation overrides): Rename to
644 MIPS ASE Instruction Generation Overrides (for now).
645 (MIPS floating-point): Rename to MIPS Floating-Point.
647 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
649 * doc/c-mips.texi (MIPS Macros): New section.
650 (MIPS Object): Replace with...
651 (MIPS Small Data): ...this new section.
653 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
655 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
656 Capitalize name. Use @kindex instead of @cindex for .set entries.
658 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
660 * doc/c-mips.texi (MIPS Stabs): Remove section.
662 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
664 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
665 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
666 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
667 (ISA_SUPPORTS_VIRT64_ASE): Delete.
668 (mips_ase): New structure.
669 (mips_ases): New table.
670 (FP64_ASES): New macro.
671 (mips_ase_groups): New array.
672 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
673 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
675 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
676 (md_parse_option): Use mips_ases and mips_set_ase instead of
677 separate case statements for each ASE option.
678 (mips_after_parse_args): Use FP64_ASES. Use
679 mips_check_isa_supports_ases to check the ASEs against
681 (s_mipsset): Use mips_ases and mips_set_ase instead of
682 separate if statements for each ASE option. Use
683 mips_check_isa_supports_ases, even when a non-ASE option
686 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
688 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
690 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
692 * config/tc-mips.c (md_shortopts, options, md_longopts)
693 (md_longopts_size): Move earlier in file.
695 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
697 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
698 with a single "ase" bitmask.
699 (mips_opts): Update accordingly.
700 (file_ase, file_ase_explicit): New variables.
701 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
702 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
703 (ISA_HAS_ROR): Adjust for mips_set_options change.
704 (is_opcode_valid): Take the base ase mask directly from mips_opts.
705 (mips_ip): Adjust for mips_set_options change.
706 (md_parse_option): Likewise. Update file_ase_explicit.
707 (mips_after_parse_args): Adjust for mips_set_options change.
708 Use bitmask operations to select the default ASEs. Set file_ase
709 rather than individual per-ASE variables.
710 (s_mipsset): Adjust for mips_set_options change.
711 (mips_elf_final_processing): Test file_ase rather than
712 file_ase_mdmx. Remove commented-out code.
714 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
716 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
717 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
718 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
719 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
720 (mips_after_parse_args): Use the new "ase" field to choose
722 (mips_cpu_info_table): Move ASEs from the "flags" field to the
725 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
727 * config/tc-arm.c (symbol_preemptible): New function.
728 (relax_branch): Use it.
730 2013-06-17 Catherine Moore <clm@codesourcery.com>
731 Maciej W. Rozycki <macro@codesourcery.com>
732 Chao-Ying Fu <fu@mips.com>
734 * config/tc-mips.c (mips_set_options): Add ase_eva.
735 (mips_set_options mips_opts): Add ase_eva.
736 (file_ase_eva): Declare.
737 (ISA_SUPPORTS_EVA_ASE): Define.
738 (IS_SEXT_9BIT_NUM): Define.
739 (MIPS_CPU_ASE_EVA): Define.
740 (is_opcode_valid): Add support for ase_eva.
741 (macro_build): Likewise.
743 (validate_mips_insn): Likewise.
744 (validate_micromips_insn): Likewise.
746 (options): Add OPTION_EVA and OPTION_NO_EVA.
747 (md_longopts): Add -meva and -mno-eva.
748 (md_parse_option): Process new options.
749 (mips_after_parse_args): Check for valid EVA combinations.
750 (s_mipsset): Likewise.
752 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
754 * dwarf2dbg.h (dwarf2_move_insn): Declare.
755 * dwarf2dbg.c (line_subseg): Add pmove_tail.
756 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
757 (dwarf2_gen_line_info_1): Update call accordingly.
758 (dwarf2_move_insn): New function.
759 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
761 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
765 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
768 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
769 (dwarf2_gen_line_info_1): Delete.
770 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
771 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
772 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
773 (dwarf2_directive_loc): Push previous .locs instead of generating
776 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
778 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
779 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
781 2013-06-13 Nick Clifton <nickc@redhat.com>
784 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
785 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
786 function. Generates an error if the adjusted offset is out of a
789 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
791 * config/tc-nios2.c (md_apply_fix): Mask constant
792 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
794 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
796 * config/tc-mips.c (append_insn): Don't do branch relaxation for
797 MIPS-3D instructions either.
798 (md_convert_frag): Update the COPx branch mask accordingly.
800 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
802 * doc/as.texinfo (Overview): Add --relax-branch and
804 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
807 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
809 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
812 2013-06-08 Catherine Moore <clm@codesourcery.com>
814 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
815 (is_opcode_valid_16): Pass ase value to opcode_is_member.
816 (append_insn): Change INSN_xxxx to ASE_xxxx.
818 2013-06-01 George Thomas <george.thomas@atmel.com>
820 * gas/config/tc-avr.c: Change ISA for devices with USB support to
823 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
825 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
828 2013-05-31 Paul Brook <paul@codesourcery.com>
831 * config/tc-mips.c (s_ehword): New.
833 2013-05-30 Paul Brook <paul@codesourcery.com>
835 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
837 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
839 * write.c (resolve_reloc_expr_symbols): On REL targets don't
840 convert relocs who have no relocatable field either. Rephrase
841 the conditional so that the PC-relative check is only applied
844 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
846 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
849 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
851 * config/tc-aarch64.c (reloc_table): Update to use
852 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
853 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
854 (md_apply_fix): Likewise.
855 (aarch64_force_relocation): Likewise.
857 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
859 * config/tc-arm.c (it_fsm_post_encode): Improve
860 warning messages about deprecated IT block formats.
862 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
864 * config/tc-aarch64.c (md_apply_fix): Move value range checking
865 inside fx_done condition.
867 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
869 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
871 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
873 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
874 and clean up warning when using PRINT_OPCODE_TABLE.
876 2013-05-20 Alan Modra <amodra@gmail.com>
878 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
879 and data fixups performing shift/high adjust/sign extension on
880 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
881 when writing data fixups rather than recalculating size.
883 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
885 * doc/c-msp430.texi: Fix typo.
887 2013-05-16 Tristan Gingold <gingold@adacore.com>
889 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
890 are also TOC symbols.
892 2013-05-16 Nick Clifton <nickc@redhat.com>
894 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
895 Add -mcpu command to specify core type.
896 * doc/c-msp430.texi: Update documentation.
898 2013-05-09 Andrew Pinski <apinski@cavium.com>
900 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
901 (mips_opts): Update for the new field.
902 (file_ase_virt): New variable.
903 (ISA_SUPPORTS_VIRT_ASE): New macro.
904 (ISA_SUPPORTS_VIRT64_ASE): New macro.
905 (MIPS_CPU_ASE_VIRT): New define.
906 (is_opcode_valid): Handle ase_virt.
907 (macro_build): Handle "+J".
908 (validate_mips_insn): Likewise.
910 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
911 (md_longopts): Add mvirt and mnovirt
912 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
913 (mips_after_parse_args): Handle ase_virt field.
914 (s_mipsset): Handle "virt" and "novirt".
915 (mips_elf_final_processing): Add a comment about virt ASE might need
917 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
918 * doc/c-mips.texi: Document -mvirt and -mno-virt.
919 Document ".set virt" and ".set novirt".
921 2013-05-09 Alan Modra <amodra@gmail.com>
923 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
924 control of operand flag bits.
926 2013-05-07 Alan Modra <amodra@gmail.com>
928 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
929 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
930 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
931 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
932 (md_apply_fix): Set fx_no_overflow for assorted relocations.
933 Shift and sign-extend fieldval for use by some VLE reloc
934 operand->insert functions.
936 2013-05-06 Paul Brook <paul@codesourcery.com>
937 Catherine Moore <clm@codesourcery.com>
939 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
940 (limited_pcrel_reloc_p): Likewise.
941 (md_apply_fix): Likewise.
942 (tc_gen_reloc): Likewise.
944 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
946 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
947 (mips_fix_adjustable): Adjust pc-relative check to use
950 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
952 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
953 (s_mips_stab): Do not restrict to stabn only.
955 2013-05-02 Nick Clifton <nickc@redhat.com>
957 * config/tc-msp430.c: Add support for the MSP430X architecture.
958 Add code to insert a NOP instruction after any instruction that
959 might change the interrupt state.
960 Add support for the LARGE memory model.
961 Add code to initialise the .MSP430.attributes section.
962 * config/tc-msp430.h: Add support for the MSP430X architecture.
963 * doc/c-msp430.texi: Document the new -mL and -mN command line
965 * NEWS: Mention support for the MSP430X architecture.
967 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
969 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
970 alpha*-*-linux*ecoff*.
972 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
974 * config/tc-mips.c (mips_ip): Add sizelo.
975 For "+C", "+G", and "+H", set sizelo and compare against it.
977 2013-04-29 Nick Clifton <nickc@redhat.com>
979 * as.c (Options): Add -gdwarf-sections.
980 (parse_args): Likewise.
981 * as.h (flag_dwarf_sections): Declare.
982 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
983 (process_entries): When -gdwarf-sections is enabled generate
984 fragmentary .debug_line sections.
985 (out_debug_line): Set the section for the .debug_line section end
987 * doc/as.texinfo: Document -gdwarf-sections.
988 * NEWS: Mention -gdwarf-sections.
990 2013-04-26 Christian Groessler <chris@groessler.org>
992 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
993 according to the target parameter. Don't call s_segm since s_segm
994 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
996 (md_begin): Call s_segm according to target parameter from command
999 2013-04-25 Alan Modra <amodra@gmail.com>
1001 * configure.in: Allow little-endian linux.
1002 * configure: Regenerate.
1004 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
1006 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
1007 "fstatus" control register to "eccinj".
1009 2013-04-19 Kai Tietz <ktietz@redhat.com>
1011 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
1013 2013-04-15 Julian Brown <julian@codesourcery.com>
1015 * expr.c (add_to_result, subtract_from_result): Make global.
1016 * expr.h (add_to_result, subtract_from_result): Add prototypes.
1017 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
1018 subtract_from_result to handle extra bit of precision for .sleb128
1021 2013-04-10 Julian Brown <julian@codesourcery.com>
1023 * read.c (convert_to_bignum): Add sign parameter. Use it
1024 instead of X_unsigned to determine sign of resulting bignum.
1025 (emit_expr): Pass extra argument to convert_to_bignum.
1026 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
1027 X_extrabit to convert_to_bignum.
1028 (parse_bitfield_cons): Set X_extrabit.
1029 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
1030 Initialise X_extrabit field as appropriate.
1031 (add_to_result): New.
1032 (subtract_from_result): New.
1034 * expr.h (expressionS): Add X_extrabit field.
1036 2013-04-10 Jan Beulich <jbeulich@suse.com>
1038 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
1039 register being PC when is_t or writeback, and use distinct
1040 diagnostic for the latter case.
1042 2013-04-10 Jan Beulich <jbeulich@suse.com>
1044 * gas/config/tc-arm.c (parse_operands): Re-write
1045 po_barrier_or_imm().
1046 (do_barrier): Remove bogus constraint().
1047 (do_t_barrier): Remove.
1049 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
1051 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
1052 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
1054 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
1056 2013-04-09 Jan Beulich <jbeulich@suse.com>
1058 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
1059 Use local variable Rt in more places.
1060 (do_vmsr): Accept all control registers.
1062 2013-04-09 Jan Beulich <jbeulich@suse.com>
1064 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
1065 if there was none specified for moves between scalar and core
1068 2013-04-09 Jan Beulich <jbeulich@suse.com>
1070 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
1071 NEON_ALL_LANES case.
1073 2013-04-08 Jan Beulich <jbeulich@suse.com>
1075 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
1078 2013-04-08 Jan Beulich <jbeulich@suse.com>
1080 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
1083 2013-04-03 Alan Modra <amodra@gmail.com>
1085 * doc/as.texinfo: Add support to generate man options for h8300.
1086 * doc/c-h8300.texi: Likewise.
1088 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
1090 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
1093 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
1096 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
1098 2013-03-26 Nick Clifton <nickc@redhat.com>
1101 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
1102 start of the file each time.
1105 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
1108 2013-03-26 Douglas B Rupp <rupp@gnat.com>
1110 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
1113 2013-03-21 Will Newton <will.newton@linaro.org>
1115 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
1116 pc-relative str instructions in Thumb mode.
1118 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
1120 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
1121 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
1123 * config/tc-h8300.h: Remove duplicated defines.
1125 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
1128 * tc-avr.c (mcu_has_3_byte_pc): New function.
1129 (tc_cfi_frame_initial_instructions): Call it to find return
1132 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
1135 * config/tc-tic6x.c (tic6x_try_encode): Handle
1136 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
1137 encode register pair numbers when required.
1139 2013-03-15 Will Newton <will.newton@linaro.org>
1141 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
1142 in vstr in Thumb mode for pre-ARMv7 cores.
1144 2013-03-14 Andreas Schwab <schwab@suse.de>
1146 * doc/c-arc.texi (ARC Directives): Revert last change and use
1147 @itemize instead of @table.
1148 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
1150 2013-03-14 Nick Clifton <nickc@redhat.com>
1153 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
1154 NULL message, instead just check ARM_CPU_IS_ANY directly.
1156 2013-03-14 Nick Clifton <nickc@redhat.com>
1159 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
1161 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
1162 to the @item directives.
1163 (ARM-Neon-Alignment): Move to correct place in the document.
1164 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
1166 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
1169 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
1171 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
1172 case. Add default BAD_CASE to switch.
1174 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
1176 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
1177 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
1179 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1181 * config/tc-arm.c (crc_ext_armv8): New feature set.
1182 (UNPRED_REG): New macro.
1183 (do_crc32_1): New function.
1184 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
1185 do_crc32ch, do_crc32cw): Likewise.
1187 (insns): Add entries for crc32 mnemonics.
1188 (arm_extensions): Add entry for crc.
1190 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
1192 * write.h (struct fix): Add fx_dot_frag field.
1193 (dot_frag): Declare.
1194 * write.c (dot_frag): New variable.
1195 (fix_new_internal): Set fx_dot_frag field with dot_frag.
1196 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
1197 * expr.c (expr): Save value of frag_now in dot_frag when setting
1199 * read.c (emit_expr): Likewise. Delete comments.
1201 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
1203 * config/tc-i386.c (flag_code_names): Removed.
1204 (i386_index_check): Rewrote.
1206 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
1208 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
1210 (aarch64_double_precision_fmovable): New function.
1211 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
1212 function; handle hexadecimal representation of IEEE754 encoding.
1213 (parse_operands): Update the call to parse_aarch64_imm_float.
1215 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1217 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
1218 (check_hle): Updated.
1219 (md_assemble): Likewise.
1220 (parse_insn): Likewise.
1222 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
1224 * config/tc-i386.c (_i386_insn): Add rep_prefix.
1225 (md_assemble): Check if REP prefix is OK.
1226 (parse_insn): Remove expecting_string_instruction. Set
1229 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1231 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
1233 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
1235 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
1236 for system registers.
1238 2013-02-27 DJ Delorie <dj@redhat.com>
1240 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
1241 (rl78_op): Handle %code().
1242 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
1243 (tc_gen_reloc): Likwise; convert to a computed reloc.
1244 (md_apply_fix): Likewise.
1246 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
1248 * config/rl78-parse.y: Fix encoding of DIVWU insn.
1250 2013-02-25 Terry Guo <terry.guo@arm.com>
1252 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
1253 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
1254 list of accepted CPUs.
1256 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
1259 * config/tc-i386.c (cpu_arch): Add ".smap".
1261 * doc/c-i386.texi: Document smap.
1263 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1265 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
1266 mips_assembling_insn appropriately.
1267 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
1269 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
1271 * config/tc-mips.c (append_insn): Correct indentation, remove
1274 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1276 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
1278 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
1280 * configure.tgt: Add nios2-*-rtems*.
1282 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
1284 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
1287 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
1289 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
1290 (macro): Use it. Assert that trunc.w.s is not used for r5900.
1292 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
1294 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
1297 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
1298 Andrew Jenner <andrew@codesourcery.com>
1300 Based on patches from Altera Corporation.
1302 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
1303 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
1304 * Makefile.in: Regenerated.
1305 * configure.tgt: Add case for nios2*-linux*.
1306 * config/obj-elf.c: Conditionally include elf/nios2.h.
1307 * config/tc-nios2.c: New file.
1308 * config/tc-nios2.h: New file.
1309 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
1310 * doc/Makefile.in: Regenerated.
1311 * doc/all.texi: Set NIOSII.
1312 * doc/as.texinfo (Overview): Add Nios II options.
1313 (Machine Dependencies): Include c-nios2.texi.
1314 * doc/c-nios2.texi: New file.
1315 * NEWS: Note Altera Nios II support.
1317 2013-02-06 Alan Modra <amodra@gmail.com>
1320 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
1321 Don't skip fixups with fx_subsy non-NULL.
1322 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
1323 with fx_subsy non-NULL.
1325 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
1327 * doc/c-metag.texi: Add "@c man" markers.
1329 2013-02-04 Alan Modra <amodra@gmail.com>
1331 * write.c (fixup_segment): Return void. Delete seg_reloc_count
1333 (TC_ADJUST_RELOC_COUNT): Delete.
1334 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
1336 2013-02-04 Alan Modra <amodra@gmail.com>
1338 * po/POTFILES.in: Regenerate.
1340 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
1342 * config/tc-metag.c: Make SWAP instruction less permissive with
1345 2013-01-29 DJ Delorie <dj@redhat.com>
1347 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
1348 relocs in .word/.etc statements.
1350 2013-01-29 Roland McGrath <mcgrathr@google.com>
1352 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1353 immediate value for 8-bit offset" error so it shows line info.
1355 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1357 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1360 2013-01-24 Nick Clifton <nickc@redhat.com>
1362 * config/tc-v850.c: Add support for e3v5 architecture.
1363 * doc/c-v850.texi: Mention new support.
1365 2013-01-23 Nick Clifton <nickc@redhat.com>
1368 * config/tc-avr.c: Include dwarf2dbg.h.
1370 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1372 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1373 (tc_i386_fix_adjustable): Likewise.
1374 (lex_got): Likewise.
1375 (tc_gen_reloc): Likewise.
1377 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1379 * config/tc-aarch64.c (output_operand_error_record): Change to output
1380 the out-of-range error message as value-expected message if there is
1381 only one single value in the expected range.
1382 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1383 LSL #0 as a programmer-friendly feature.
1385 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1387 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1388 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1389 BFD_RELOC_64_SIZE relocations.
1390 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1392 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1393 relocations against local symbols.
1395 2013-01-16 Alan Modra <amodra@gmail.com>
1397 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1398 finding some sort of toc syntax error, and break to avoid
1399 compiler uninit warning.
1401 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1404 * config/tc-i386.c (lex_got): Increment length by 1 if the
1405 relocation token is removed.
1407 2013-01-15 Nick Clifton <nickc@redhat.com>
1409 * config/tc-v850.c (md_assemble): Allow signed values for
1412 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1414 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1417 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1419 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1420 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1421 * config/tc-ppc.c (md_show_usage): Likewise.
1422 (ppc_handle_align): Handle power8's group ending nop.
1424 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1426 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1427 that the assember exits after the opcodes have been printed.
1429 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1431 * app.c: Remove trailing white spaces.
1435 * dw2gencfi.c: Likewise.
1436 * dwarf2dbg.h: Likewise.
1437 * ecoff.c: Likewise.
1438 * input-file.c: Likewise.
1439 * itbl-lex.h: Likewise.
1440 * output-file.c: Likewise.
1443 * subsegs.c: Likewise.
1444 * symbols.c: Likewise.
1445 * write.c: Likewise.
1446 * config/tc-i386.c: Likewise.
1447 * doc/Makefile.am: Likewise.
1448 * doc/Makefile.in: Likewise.
1449 * doc/c-aarch64.texi: Likewise.
1450 * doc/c-alpha.texi: Likewise.
1451 * doc/c-arc.texi: Likewise.
1452 * doc/c-arm.texi: Likewise.
1453 * doc/c-avr.texi: Likewise.
1454 * doc/c-bfin.texi: Likewise.
1455 * doc/c-cr16.texi: Likewise.
1456 * doc/c-d10v.texi: Likewise.
1457 * doc/c-d30v.texi: Likewise.
1458 * doc/c-h8300.texi: Likewise.
1459 * doc/c-hppa.texi: Likewise.
1460 * doc/c-i370.texi: Likewise.
1461 * doc/c-i386.texi: Likewise.
1462 * doc/c-i860.texi: Likewise.
1463 * doc/c-m32c.texi: Likewise.
1464 * doc/c-m32r.texi: Likewise.
1465 * doc/c-m68hc11.texi: Likewise.
1466 * doc/c-m68k.texi: Likewise.
1467 * doc/c-microblaze.texi: Likewise.
1468 * doc/c-mips.texi: Likewise.
1469 * doc/c-msp430.texi: Likewise.
1470 * doc/c-mt.texi: Likewise.
1471 * doc/c-s390.texi: Likewise.
1472 * doc/c-score.texi: Likewise.
1473 * doc/c-sh.texi: Likewise.
1474 * doc/c-sh64.texi: Likewise.
1475 * doc/c-tic54x.texi: Likewise.
1476 * doc/c-tic6x.texi: Likewise.
1477 * doc/c-v850.texi: Likewise.
1478 * doc/c-xc16x.texi: Likewise.
1479 * doc/c-xgate.texi: Likewise.
1480 * doc/c-xtensa.texi: Likewise.
1481 * doc/c-z80.texi: Likewise.
1482 * doc/internals.texi: Likewise.
1484 2013-01-10 Roland McGrath <mcgrathr@google.com>
1486 * hash.c (hash_new_sized): Make it global.
1487 * hash.h: Declare it.
1488 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1491 2013-01-10 Will Newton <will.newton@imgtec.com>
1493 * Makefile.am: Add Meta.
1494 * Makefile.in: Regenerate.
1495 * config/tc-metag.c: New file.
1496 * config/tc-metag.h: New file.
1497 * configure.tgt: Add Meta.
1498 * doc/Makefile.am: Add Meta.
1499 * doc/Makefile.in: Regenerate.
1500 * doc/all.texi: Add Meta.
1501 * doc/as.texiinfo: Document Meta options.
1502 * doc/c-metag.texi: New file.
1504 2013-01-09 Steve Ellcey <sellcey@mips.com>
1506 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1508 * config/tc-mips.c (internalError): Remove, replace with abort.
1510 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1512 * config/tc-aarch64.c (parse_operands): Change to compare the result
1513 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1515 2013-01-07 Nick Clifton <nickc@redhat.com>
1518 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1519 anticipated character.
1520 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1521 here as it is no longer needed.
1523 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1525 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1526 * doc/c-score.texi (SCORE-Opts): Likewise.
1527 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1529 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1531 * config/tc-mips.c: Add support for MIPS r5900.
1532 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1534 (can_swap_branch_p, get_append_method): Detect some conditional
1535 short loops to fix a bug on the r5900 by NOP in the branch delay
1537 (M_MUL): Support 3 operands in multu on r5900.
1538 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1539 (s_mipsset): Force 32 bit floating point on r5900.
1540 (mips_ip): Check parameter range of instructions mfps and mtps on
1542 * configure.in: Detect CPU type when target string contains r5900
1543 (e.g. mips64r5900el-linux-gnu).
1545 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1547 * as.c (parse_args): Update copyright year to 2013.
1549 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1551 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1554 2013-01-02 Nick Clifton <nickc@redhat.com>
1557 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1560 For older changes see ChangeLog-2012
1562 Copyright (C) 2013 Free Software Foundation, Inc.
1564 Copying and distribution of this file, with or without modification,
1565 are permitted in any medium without royalty provided the copyright
1566 notice and this notice are preserved.
1572 version-control: never