1 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
3 * config/tc-mips.c (validate_mips_insn): Move further up file.
4 Add insn_bits and decode_operand arguments. Use the mips_operand
5 fields to work out which bits an operand occupies. Detect double
7 (validate_micromips_insn): Move further up file. Call into
10 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
12 * config/tc-mips.c (mips16_macro_build): Remove 'Y' case.
14 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
16 * config/tc-mips.c (macro_build): Take an int for "C", "k", "\\"
18 (macro): Update accordingly.
20 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
22 * config/tc-mips.c (imm_expr, imm2_expr, offset_expr): Tweak commentary.
24 (md_assemble): Remove imm_reloc handling.
25 (mips_ip): Update commentary. Use offset_expr and offset_reloc
26 rather than imm_expr and imm_reloc for 'i', 'j' and 'u'.
27 Use a temporary array rather than imm_reloc when parsing
28 constant expressions. Remove imm_reloc initialization.
29 (mips16_ip): Update commentary. Use offset_expr and offset_reloc
30 for the relaxable field. Use a relax_char variable to track the
31 type of this field. Remove imm_reloc initialization.
33 2013-07-14 Richard Sandiford <rdsandiford@googlemail.com>
35 * config/tc-mips.c (mips16_ip): Handle "I".
37 2013-07-12 Maciej W. Rozycki <macro@codesourcery.com>
39 * config/tc-mips.c (mips_flag_nan2008): New variable.
40 (options): Add OPTION_NAN enum value.
41 (md_longopts): Handle it.
42 (md_parse_option): Likewise.
43 (s_nan): New function.
44 (mips_elf_final_processing): Handle EF_MIPS_NAN2008.
45 (md_show_usage): Add -mnan.
47 * doc/as.texinfo (Overview): Add -mnan.
48 * doc/c-mips.texi (MIPS Opts): Document -mnan.
49 (MIPS NaN Encodings): New node. Document .nan directive.
50 (MIPS-Dependent): List the new node.
52 2013-07-09 Tristan Gingold <gingold@adacore.com>
54 * configure.com: Define HAVE_SYS_TYPES_H and HAVE_UNISTD_H
56 2013-07-08 Richard Sandiford <rdsandiford@googlemail.com>
58 * config/tc-mips.c (mips_ip): Unconditionally parse an expression
59 for 'A' and assume that the constant has been elided if the result
62 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
64 * config/tc-mips.c (gprel16_reloc_p): New function.
65 (macro_read_relocs): Assume BFD_RELOC_LO16 if all relocs are
67 (offset_high_part, small_offset_p): New functions.
68 (nacro): Use them. Remove *_OB and *_DOB cases. For single-
69 register load and store macros, handle the 16-bit offset case first.
70 If a 16-bit offset is not suitable for the instruction we're
71 generating, load it into the temporary register using
72 ADDRESS_ADDI_INSN. Make the M_LI_DD code fall through into the
73 M_L_DAB code once the address has been constructed. For double load
74 and store macros, again handle the 16-bit offset case first.
75 If the second register cannot be accessed from the same high
76 part as the first, load it into AT using ADDRESS_ADDI_INSN.
77 Fix the handling of LD in cases where the first register is the
78 same as the base. Also handle the case where the offset is
79 not 16 bits and the second register cannot be accessed from the
80 same high part as the first. For unaligned loads and stores,
81 fuse the offbits == 12 and old "ab" handling. Apply this handling
82 whenever the second offset needs a different high part from the first.
83 Construct the offset using ADDRESS_ADDI_INSN where possible,
84 for offbits == 16 as well as offbits == 12. Use offset_reloc
85 when constructing the individual loads and stores.
86 (mips_ip): Set up imm_expr, imm2_expr, offset_expr, imm_reloc
87 and offset_reloc before matching against a particular opcode.
88 Handle elided 'A' constants. Allow 'A' constants to use
91 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
93 * config/tc-mips.c (validate_mips_insn): Remove "[" and "]" handling.
94 (mips_ip): Likewise. Do not set is_mdmx for INSN_5400 instructions.
95 Check constraints on the VR5400 RZU.OB, SLL.OB and SRL.OB instructions.
97 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
99 * config/tc-mips.c (mips_ip): Preserve the real bit number for "+p".
100 Require the msb to be <= 31 for "+s". Check that the size is <= 31
101 for both "+s" and "+S".
103 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
105 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn):
106 (mips_ip, mips16_ip): Handle "+i".
108 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
110 * config/tc-mips.c (mips32_to_micromips_reg_h_map): Delete.
111 (micromips_to_32_reg_h_map): Rename to...
112 (micromips_to_32_reg_h_map1): ...this.
113 (micromips_to_32_reg_i_map): Rename to...
114 (micromips_to_32_reg_h_map2): ...this.
115 (mips_lookup_reg_pair): New function.
116 (gpr_write_mask, macro): Adjust after above renaming.
117 (validate_micromips_insn): Remove "mi" handling.
118 (mips_ip): Likewise. Parse both registers in a pair for "mh".
120 2013-07-07 Richard Sandiford <rdsandiford@googlemail.com>
122 * config/tc-mips.c (validate_mips_insn, validate_micromips_insn)
123 (mips_ip): Remove "+D" and "+T" handling.
125 2013-07-05 Andreas Krebbel <Andreas.Krebbel@de.ibm.com>
127 * config/tc-s390.c (md_gather_operands, md_apply_fix): Support new
130 2013-07-03 Marcus Shawcroft <marcus.shawcroft@arm.com>
132 * config/tc-aarch64.c (reloc_table): Merge got_prel19 into got.
134 2013-07-02 Marcus Shawcroft <marcus.shawcroft@arm.com>
136 * config/tc-aarch64.c (md_apply_fix): Reorder case values.
137 (aarch64_force_relocation): Likewise.
139 2013-07-02 Alan Modra <amodra@gmail.com>
141 * config/tc-ppc.c (ppc_elf_adjust_symtab): Don't make .TOC. weak.
143 2013-06-26 Maciej W. Rozycki <macro@codesourcery.com>
145 * doc/as.texinfo (Overview): Remove @samp from MIPS ISA names.
146 * doc/c-mips.texi (MIPS Options): Remove @sc from MIPS ISA names.
147 Replace @sc{mips16} with literal `MIPS16'.
148 (MIPS ISA): Replace @sc{mips3} with literal `MIPS III'.
150 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
152 * config/tc-aarch64.c (reloc_table): Replace
153 BFD_RELOC_AARCH64_LD64_GOT_LO12_NC with
154 BFD_RELOC_AARCH64_LD_GOT_LO12_NC; likewise to
155 BFD_RELOC_AARCH64_TLSDESC_LD64_LO12_NC and
156 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC.
157 (md_apply_fix): Handle BFD_RELOC_AARCH64_LD_GOT_LO12_NC,
158 BFD_RELOC_AARCH64_LD32_GOT_LO12_NC,
159 BFD_RELOC_AARCH64_TLSDESC_LD_LO12_NC,
160 BFD_RELOC_AARCH64_TLSDESC_LD32_LO12_NC,
161 BFD_RELOC_AARCH64_TLSIE_LD_GOTTPREL_LO12_NC and
162 BFD_RELOC_AARCH64_TLSIE_LD32_GOTTPREL_LO12_NC.
163 (aarch64_force_relocation): Likewise.
165 2013-06-26 Yufeng Zhang <yufeng.zhang@arm.com>
167 * config/tc-aarch64.c (ilp32_p): New static variable.
168 (elf64_aarch64_target_format): Return the target according to the
170 (md_begin): Determine 'mach' according to the value of 'ilp32_p'.
171 (aarch64_opts): Add support for options '-milp32' and '-mlp64'.
172 (aarch64_dwarf2_addr_size): New function.
173 * config/tc-aarch64.h (aarch64_dwarf2_addr_size): New declaration.
174 (DWARF2_ADDR_SIZE): New define.
176 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
178 * doc/c-mips.texi: Use ISA instead of @sc{isa}.
180 2013-06-26 Richard Sandiford <rdsandiford@googlemail.com>
182 * config/tc-mips.c (validate_mips_insn): Use STYPE rather than SHAMT.
184 2013-06-25 Maciej W. Rozycki <macro@codesourcery.com>
186 * config/tc-mips.c (mips_set_options): Add insn32 member.
187 (mips_opts): Initialize it.
188 (NOP_INSN, NOP_INSN_SIZE): Handle insn32 mode.
189 (options): Add OPTION_INSN32 and OPTION_NO_INSN32 enum values.
190 (md_longopts): Add "minsn32" and "mno-insn32" options.
191 (is_size_valid): Handle insn32 mode.
192 (md_assemble): Pass instruction string down to macro.
193 (brk_fmt): Add second dimension and insn32 mode initializers.
194 (mfhl_fmt): Likewise.
195 (BRK_FMT, MFHL_FMT): Handle insn32 mode.
196 (macro_build) <'c'>: Handle microMIPS 32-bit BREAK encoding.
197 (macro_build_jalr, move_register): Handle insn32 mode.
198 (macro_build_branch_rs): Likewise.
199 (macro): Handle insn32 mode.
200 <M_JRADDIUSP>, <M_JRC>, <M_MOVEP>: New cases.
201 (mips_ip): Handle insn32 mode.
202 (md_parse_option): Handle OPTION_INSN32 and OPTION_NO_INSN32.
203 (s_mipsset): Handle "insn32" and "noinsn32" pseudo-ops.
204 (mips_handle_align): Handle insn32 mode.
205 (md_show_usage): Add -minsn32 and -mno-insn32.
207 * doc/as.texinfo (Target MIPS options): Add -minsn32 and
209 (-minsn32, -mno-insn32): New options.
210 * doc/c-mips.texi (MIPS Opts): Add -minsn32 and -mno-insn32
212 (MIPS assembly options): New node. Document .set insn32 and
214 (MIPS-Dependent): List the new node.
216 2013-06-25 Nick Clifton <nickc@redhat.com>
218 * config/tc-msp430.c (msp430_srcoperand): Do not allow the use of
219 the PC in indirect addressing on 430xv2 parts.
220 (msp430_operands): Add version test to hardware bug encoding
223 2013-06-24 Roland McGrath <mcgrathr@google.com>
225 * config/tc-arm.c (parse_reg_list): Use skip_past_char for '}',
226 so it skips whitespace before it.
227 (s_arm_unwind_save_mmxwr, s_arm_unwind_save_mmxwcg): Likewise.
229 * config/tc-arm.c (arm_symbol_chars): Include '{' and '}'.
230 (arm_reg_parse_multi): Skip whitespace first.
231 (parse_reg_list): Likewise.
232 (parse_vfp_reg_list): Likewise.
233 (s_arm_unwind_save_mmxwcg): Likewise.
235 2013-06-24 Nick Clifton <nickc@redhat.com>
238 * config/tc-arm.c (do_t_smc): Mark as ending an IT block.
240 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
242 * config/tc-mips.c (mips_ip): Fix swapped bit numbers in comments.
244 2013-06-23 Richard Sandiford <rdsandiford@googlemail.com>
246 * config/tc-mips.c: Assert that offsetT and valueT are at least
248 (GPR_SMIN, GPR_SMAX): New macros.
249 (macro, mips_ip): Remove code for 4-byte valueT and offsetT.
251 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
253 * config/tc-mips.c: Remove OBJ_ELF, OBJ_MAYBE_ELF and IS_ELF
254 conditions. Remove any code deselected by them.
255 (s_mips_frame, s_mips_mask): Handle ECOFF_DEBUGGING case first.
257 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
259 * NEWS: Note removal of ECOFF support.
260 * doc/as.texinfo (--emulation): Update for the removal of MIPS ECOFF.
261 * Makefile.am (TARG_ENV_HFILES): Remove config/te-lnews.h.
262 (MULTI_CFILES): Remove config/e-mipsecoff.c.
263 * Makefile.in: Regenerate.
264 * configure.in: Remove MIPS ECOFF references.
265 (mips-sony-bsd*, mips-*-bsd*, mips-*-lnews*-ecoff, mips-*-*-ecoff):
267 (mips-*-irix5*-*, mips*-*-linux*-*, mips*-*-freebsd*)
268 (mips*-*-kfreebsd*-gnu, mips-*-*-elf): Fold into...
269 (mips-*-*): ...this single case.
270 (mipsbecoff, mipslecoff, mipsecoff): Remove emulations. Expect
271 MIPS emulations to be e-mipself*.
272 * configure: Regenerate.
273 * configure.tgt (mips-sony-bsd*, mips-*-ultrix*, mips-*-osf*)
274 (mips-*-ecoff*, mips-*-pe*, mips-*-irix*, ips-*-lnews*, mips-*-riscos*)
275 (mips-*-sysv*): Remove coff and ecoff cases.
276 * as.c (mipsbecoff, mipslecoff, mipsecoff): Remove.
277 * ecoff.c: Remove reference to MIPS ECOFF.
278 * config/e-mipsecoff.c, config/te-lnews.h: Delete files.
279 * config/tc-mips.c (ECOFF_LITTLE_FORMAT): Delete.
280 (RDATA_SECTION_NAME, mips_target_form): Remove COFF and ECOFF cases.
281 (mips_hi_fixup): Tweak comment.
282 (append_insn): Require a howto.
283 (mips_after_parse_args): Remove OBJ_MAYBE_ECOFF code.
285 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
287 * doc/as.texinfo: Use MIPS rather than @sc{mips} throughout.
288 Use "CPU" instead of "cpu".
289 * doc/c-mips.texi: Likewise.
290 (MIPS Opts): Rename to MIPS Options.
291 (MIPS option stack): Rename to MIPS Option Stack.
292 (MIPS ASE instruction generation overrides): Rename to
293 MIPS ASE Instruction Generation Overrides (for now).
294 (MIPS floating-point): Rename to MIPS Floating-Point.
296 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
298 * doc/c-mips.texi (MIPS Macros): New section.
299 (MIPS Object): Replace with...
300 (MIPS Small Data): ...this new section.
302 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
304 * doc/c-mips.texi (MIPS symbol sizes): Move section further up file.
305 Capitalize name. Use @kindex instead of @cindex for .set entries.
307 2013-06-22 Richard Sandiford <rdsandiford@googlemail.com>
309 * doc/c-mips.texi (MIPS Stabs): Remove section.
311 2013-06-20 Richard Sandiford <rdsandiford@googlemail.com>
313 * config/tc-mips.c (ISA_SUPPORTS_SMARTMIPS, ISA_SUPPORTS_DSP_ASE)
314 (ISA_SUPPORTS_DSP64_ASE, ISA_SUPPORTS_DSPR2_ASE, ISA_SUPPORTS_EVA_ASE)
315 (ISA_SUPPORTS_MT_ASE, ISA_SUPPORTS_MCU_ASE, ISA_SUPPORTS_VIRT_ASE)
316 (ISA_SUPPORTS_VIRT64_ASE): Delete.
317 (mips_ase): New structure.
318 (mips_ases): New table.
319 (FP64_ASES): New macro.
320 (mips_ase_groups): New array.
321 (mips_isa_rev, mips_ase_mask, mips_check_isa_supports_ase)
322 (mips_check_isa_supports_ases, mips_set_ase, mips_lookup_ase): New
324 (is_opcode_valid): Use mips_ases to get the 64-bit ASE flags.
325 (md_parse_option): Use mips_ases and mips_set_ase instead of
326 separate case statements for each ASE option.
327 (mips_after_parse_args): Use FP64_ASES. Use
328 mips_check_isa_supports_ases to check the ASEs against
330 (s_mipsset): Use mips_ases and mips_set_ase instead of
331 separate if statements for each ASE option. Use
332 mips_check_isa_supports_ases, even when a non-ASE option
335 2013-06-19 Greta Yorsh <Greta.Yorsh@arm.com>
337 * config/tc-arm.c (arm_cpus): Add support for Cortex-A12.
339 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
341 * config/tc-mips.c (md_shortopts, options, md_longopts)
342 (md_longopts_size): Move earlier in file.
344 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
346 * config/tc-mips.c (mips_set_options): Replace separate "ase_*" fields
347 with a single "ase" bitmask.
348 (mips_opts): Update accordingly.
349 (file_ase, file_ase_explicit): New variables.
350 (file_ase_mips3d, file_ase_mdmx, file_ase_smartmips, file_ase_dsp)
351 (file_ase_dspr2, file_ase_eva, file_ase_mt, file_ase_virt): Delete.
352 (ISA_HAS_ROR): Adjust for mips_set_options change.
353 (is_opcode_valid): Take the base ase mask directly from mips_opts.
354 (mips_ip): Adjust for mips_set_options change.
355 (md_parse_option): Likewise. Update file_ase_explicit.
356 (mips_after_parse_args): Adjust for mips_set_options change.
357 Use bitmask operations to select the default ASEs. Set file_ase
358 rather than individual per-ASE variables.
359 (s_mipsset): Adjust for mips_set_options change.
360 (mips_elf_final_processing): Test file_ase rather than
361 file_ase_mdmx. Remove commented-out code.
363 2013-06-18 Richard Sandiford <rdsandiford@googlemail.com>
365 * config/tc-mips.c (mips_cpu_info): Add an "ase" field.
366 (MIPS_CPU_ASE_SMARTMIPS, MIPS_CPU_ASE_DSP, MIPS_CPU_ASE_MT)
367 (MIPS_CPU_ASE_MIPS3D, MIPS_CPU_ASE_MDMX, MIPS_CPU_ASE_DSPR2)
368 (MIPS_CPU_ASE_MCU, MIPS_CPU_ASE_VIRT, MIPS_CPU_ASE_EVA): Delete.
369 (mips_after_parse_args): Use the new "ase" field to choose
371 (mips_cpu_info_table): Move ASEs from the "flags" field to the
374 2013-06-18 Richard Earnshaw <rearnsha@arm.com>
376 * config/tc-arm.c (symbol_preemptible): New function.
377 (relax_branch): Use it.
379 2013-06-17 Catherine Moore <clm@codesourcery.com>
380 Maciej W. Rozycki <macro@codesourcery.com>
381 Chao-Ying Fu <fu@mips.com>
383 * config/tc-mips.c (mips_set_options): Add ase_eva.
384 (mips_set_options mips_opts): Add ase_eva.
385 (file_ase_eva): Declare.
386 (ISA_SUPPORTS_EVA_ASE): Define.
387 (IS_SEXT_9BIT_NUM): Define.
388 (MIPS_CPU_ASE_EVA): Define.
389 (is_opcode_valid): Add support for ase_eva.
390 (macro_build): Likewise.
392 (validate_mips_insn): Likewise.
393 (validate_micromips_insn): Likewise.
395 (options): Add OPTION_EVA and OPTION_NO_EVA.
396 (md_longopts): Add -meva and -mno-eva.
397 (md_parse_option): Process new options.
398 (mips_after_parse_args): Check for valid EVA combinations.
399 (s_mipsset): Likewise.
401 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
403 * dwarf2dbg.h (dwarf2_move_insn): Declare.
404 * dwarf2dbg.c (line_subseg): Add pmove_tail.
405 (get_line_subseg): Add create_p argument. Initialize pmove_tail.
406 (dwarf2_gen_line_info_1): Update call accordingly.
407 (dwarf2_move_insn): New function.
408 * config/tc-mips.c (append_insn): Use dwarf2_move_insn.
410 2013-06-14 Richard Sandiford <rsandifo@linux.vnet.ibm.com>
414 2011-09-05 Richard Sandiford <rdsandiford@googlemail.com>
417 * dwarf2dbg.c (pending_lines, pending_lines_tail): New variables.
418 (dwarf2_gen_line_info_1): Delete.
419 (dwarf2_push_line, dwarf2_flush_pending_lines): New functions.
420 (dwarf2_gen_line_info, dwarf2_emit_label): Use them.
421 (dwarf2_consume_line_info): Call dwarf2_flush_pending_lines.
422 (dwarf2_directive_loc): Push previous .locs instead of generating
425 2013-06-13 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
427 * config/tc-mips.c (ISA_SUPPORTS_VIRT_ASE): Support micromips.
428 (ISA_SUPPORTS_VIRT64_ASE): Support 64-bit micromips.
430 2013-06-13 Nick Clifton <nickc@redhat.com>
433 * config/tc-m68k.h (TC_CHECK_ADJUSTED_BROKEN_DOT_WORD): Define.
434 * config/tc-m68k.c (tc_m68k_check_adjusted_broken_word): New
435 function. Generates an error if the adjusted offset is out of a
438 2013-06-12 Sandra Loosemore <sandra@codesourcery.com>
440 * config/tc-nios2.c (md_apply_fix): Mask constant
441 BFD_RELOC_NIOS2_HIADJ16 value to 16 bits.
443 2013-06-10 Maciej W. Rozycki <macro@codesourcery.com>
445 * config/tc-mips.c (append_insn): Don't do branch relaxation for
446 MIPS-3D instructions either.
447 (md_convert_frag): Update the COPx branch mask accordingly.
449 * config/tc-mips.c (md_show_usage): Document --[no-]relax-branch
451 * doc/as.texinfo (Overview): Add --relax-branch and
453 * doc/c-mips.texi (MIPS Opts): Document --relax-branch and
456 2013-06-09 Sandra Loosemore <sandra@codesourcery.com>
458 * config/tc-nios2.c (nios2_parse_args): Allow trap argument to
461 2013-06-08 Catherine Moore <clm@codesourcery.com>
463 * config/tc-mips.c (is_opcode_valid): Build ASE mask.
464 (is_opcode_valid_16): Pass ase value to opcode_is_member.
465 (append_insn): Change INSN_xxxx to ASE_xxxx.
467 2013-06-01 George Thomas <george.thomas@atmel.com>
469 * gas/config/tc-avr.c: Change ISA for devices with USB support to
472 2013-05-31 H.J. Lu <hongjiu.lu@intel.com>
474 * config/tc-i386.c (md_begin): Don't align text/data/bss sections
477 2013-05-31 Paul Brook <paul@codesourcery.com>
480 * config/tc-mips.c (s_ehword): New.
482 2013-05-30 Paul Brook <paul@codesourcery.com>
484 * config/tc-mips.c (md_apply_fix): Support BFD_RELOC_MIPS_EH.
486 2013-05-29 Maciej W. Rozycki <macro@codesourcery.com>
488 * write.c (resolve_reloc_expr_symbols): On REL targets don't
489 convert relocs who have no relocatable field either. Rephrase
490 the conditional so that the PC-relative check is only applied
493 2013-05-28 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
495 * config/tc-mips.c (macro) <ld>: Don't use $zero for address
498 2013-05-28 Yufeng Zhang <yufeng.zhang@arm.com>
500 * config/tc-aarch64.c (reloc_table): Update to use
501 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE21 instead of
502 BFD_RELOC_AARCH64_TLSDESC_ADR_PAGE.
503 (md_apply_fix): Likewise.
504 (aarch64_force_relocation): Likewise.
506 2013-05-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
508 * config/tc-arm.c (it_fsm_post_encode): Improve
509 warning messages about deprecated IT block formats.
511 2013-05-28 Marcus Shawcroft <marcus.shawcroft@arm.com>
513 * config/tc-aarch64.c (md_apply_fix): Move value range checking
514 inside fx_done condition.
516 2013-05-22 Jürgen Urban <JuergenUrban@gmx.de>
518 * config/tc-mips.c (macro): Handle M_LQC2_AB and M_SQC2_AB.
520 2013-05-20 Peter Bergner <bergner@vnet.ibm.com>
522 * config/tc-ppc.c (ppc_setup_opcodes): Use new_seg to fix error
523 and clean up warning when using PRINT_OPCODE_TABLE.
525 2013-05-20 Alan Modra <amodra@gmail.com>
527 * config/tc-ppc.c (md_apply_fix): Hoist code common to insn
528 and data fixups performing shift/high adjust/sign extension on
529 fieldval. Sink fx_pcrel handling and checks. Use fixP->fx_size
530 when writing data fixups rather than recalculating size.
532 2013-05-16 Jan-Benedict Glaw <jbglaw@lug-owl.de>
534 * doc/c-msp430.texi: Fix typo.
536 2013-05-16 Tristan Gingold <gingold@adacore.com>
538 * config/tc-ppc.c (ppc_is_toc_sym): Symbols of class XMC_TC
539 are also TOC symbols.
541 2013-05-16 Nick Clifton <nickc@redhat.com>
543 * config/tc-msp430.c: Make -mmcu recognise more part numbers.
544 Add -mcpu command to specify core type.
545 * doc/c-msp430.texi: Update documentation.
547 2013-05-09 Andrew Pinski <apinski@cavium.com>
549 * config/tc-mips.c (struct mips_set_options): New ase_virt field.
550 (mips_opts): Update for the new field.
551 (file_ase_virt): New variable.
552 (ISA_SUPPORTS_VIRT_ASE): New macro.
553 (ISA_SUPPORTS_VIRT64_ASE): New macro.
554 (MIPS_CPU_ASE_VIRT): New define.
555 (is_opcode_valid): Handle ase_virt.
556 (macro_build): Handle "+J".
557 (validate_mips_insn): Likewise.
559 (enum options): Add OPTION_VIRT and OPTION_NO_VIRT.
560 (md_longopts): Add mvirt and mnovirt
561 (md_parse_option): Handle OPTION_VIRT and OPTION_NO_VIRT.
562 (mips_after_parse_args): Handle ase_virt field.
563 (s_mipsset): Handle "virt" and "novirt".
564 (mips_elf_final_processing): Add a comment about virt ASE might need
566 (md_show_usage): Print out the usage of -mvirt and mno-virt options.
567 * doc/c-mips.texi: Document -mvirt and -mno-virt.
568 Document ".set virt" and ".set novirt".
570 2013-05-09 Alan Modra <amodra@gmail.com>
572 * config/tc-ppc.c (md_apply_fix): Sign extend fieldval under
573 control of operand flag bits.
575 2013-05-07 Alan Modra <amodra@gmail.com>
577 * config/tc-ppc.c (PPC_VLE_SPLIT16A): Delete unused macro.
578 (PPC_VLE_SPLIT16D, PPC_VLE_LO16A, PPC_VLE_LO16D): Likewise.
579 (PPC_VLE_HI16A, PPC_VLE_HI16D): Likewise.
580 (PPC_VLE_HA16A, PPC_VLE_HA16D): Likewise.
581 (md_apply_fix): Set fx_no_overflow for assorted relocations.
582 Shift and sign-extend fieldval for use by some VLE reloc
583 operand->insert functions.
585 2013-05-06 Paul Brook <paul@codesourcery.com>
586 Catherine Moore <clm@codesourcery.com>
588 * config/tc-mips.c (md_pcrel_from): Handle BFD_RELOC_32_PCREL.
589 (limited_pcrel_reloc_p): Likewise.
590 (md_apply_fix): Likewise.
591 (tc_gen_reloc): Likewise.
593 2013-05-06 Richard Sandiford <rdsandiford@googlemail.com>
595 * config/tc-mips.c (limited_pcrel_reloc_p): New function.
596 (mips_fix_adjustable): Adjust pc-relative check to use
599 2013-05-02 Richard Sandiford <rdsandiford@googlemail.com>
601 * config/tc-mips.c (mips_pseudo_table): Add stabd and stabs entries.
602 (s_mips_stab): Do not restrict to stabn only.
604 2013-05-02 Nick Clifton <nickc@redhat.com>
606 * config/tc-msp430.c: Add support for the MSP430X architecture.
607 Add code to insert a NOP instruction after any instruction that
608 might change the interrupt state.
609 Add support for the LARGE memory model.
610 Add code to initialise the .MSP430.attributes section.
611 * config/tc-msp430.h: Add support for the MSP430X architecture.
612 * doc/c-msp430.texi: Document the new -mL and -mN command line
614 * NEWS: Mention support for the MSP430X architecture.
616 2013-05-01 Maciej W. Rozycki <macro@codesourcery.com>
618 * configure.tgt: Replace alpha*-*-linuxecoff* pattern with
619 alpha*-*-linux*ecoff*.
621 2013-04-30 Chao-ying Fu <Chao-ying.Fu@imgtec.com>
623 * config/tc-mips.c (mips_ip): Add sizelo.
624 For "+C", "+G", and "+H", set sizelo and compare against it.
626 2013-04-29 Nick Clifton <nickc@redhat.com>
628 * as.c (Options): Add -gdwarf-sections.
629 (parse_args): Likewise.
630 * as.h (flag_dwarf_sections): Declare.
631 * dwarf2dbg.c (emit_fixed_inc_line_addr): Skip section changes.
632 (process_entries): When -gdwarf-sections is enabled generate
633 fragmentary .debug_line sections.
634 (out_debug_line): Set the section for the .debug_line section end
636 * doc/as.texinfo: Document -gdwarf-sections.
637 * NEWS: Mention -gdwarf-sections.
639 2013-04-26 Christian Groessler <chris@groessler.org>
641 * config/tc-z8k.c (md_parse_option): Set z8k_target_from_cmdline
642 according to the target parameter. Don't call s_segm since s_segm
643 calls bfd_set_arch_mach using stdoutput, but stdoutput isn't
645 (md_begin): Call s_segm according to target parameter from command
648 2013-04-25 Alan Modra <amodra@gmail.com>
650 * configure.in: Allow little-endian linux.
651 * configure: Regenerate.
653 2013-04-24 Sandra Loosemore <sandra@codesourcery.com>
655 * config/tc-nios2.c (nios2_control_register_arg_p): Rename
656 "fstatus" control register to "eccinj".
658 2013-04-19 Kai Tietz <ktietz@redhat.com>
660 * configure.tgt (i386-*-cygwin): Handle x86_64 cygwin.
662 2013-04-15 Julian Brown <julian@codesourcery.com>
664 * expr.c (add_to_result, subtract_from_result): Make global.
665 * expr.h (add_to_result, subtract_from_result): Add prototypes.
666 * config/tc-sh.c (sh_optimize_expr): Use add_to_result,
667 subtract_from_result to handle extra bit of precision for .sleb128
670 2013-04-10 Julian Brown <julian@codesourcery.com>
672 * read.c (convert_to_bignum): Add sign parameter. Use it
673 instead of X_unsigned to determine sign of resulting bignum.
674 (emit_expr): Pass extra argument to convert_to_bignum.
675 (emit_leb128_expr): Use X_extrabit instead of X_unsigned. Pass
676 X_extrabit to convert_to_bignum.
677 (parse_bitfield_cons): Set X_extrabit.
678 * expr.c (make_expr_symbol, expr_build_uconstant, operand):
679 Initialise X_extrabit field as appropriate.
680 (add_to_result): New.
681 (subtract_from_result): New.
683 * expr.h (expressionS): Add X_extrabit field.
685 2013-04-10 Jan Beulich <jbeulich@suse.com>
687 * gas/config/tc-arm.c (encode_arm_addr_mode_3): Only reject base
688 register being PC when is_t or writeback, and use distinct
689 diagnostic for the latter case.
691 2013-04-10 Jan Beulich <jbeulich@suse.com>
693 * gas/config/tc-arm.c (parse_operands): Re-write
695 (do_barrier): Remove bogus constraint().
696 (do_t_barrier): Remove.
698 2013-04-09 Joerg Wunsch <joerg.wunsch@atmel.com>
700 * gas/config/tc-avr.c (mcu_types): Add ATmega64RFR2,
701 ATmega644RFR2, ATmega128RFR2, ATmega1284RFR2, ATmega256RFR2,
703 * gas/doc/c-avr.texi (-mmcu documentation): Likewise.
705 2013-04-09 Jan Beulich <jbeulich@suse.com>
707 * gas/config/tc-arm.c (do_vmrs): Accept all control registers.
708 Use local variable Rt in more places.
709 (do_vmsr): Accept all control registers.
711 2013-04-09 Jan Beulich <jbeulich@suse.com>
713 * gas/config/tc-arm.c (do_neon_mov): Fake an instruction suffix
714 if there was none specified for moves between scalar and core
717 2013-04-09 Jan Beulich <jbeulich@suse.com>
719 * gas/config/tc-arm.c (do_neon_ldx_stx): Reject VSTn in the
722 2013-04-08 Jan Beulich <jbeulich@suse.com>
724 * gas/config/tc-arm.c (do_neon_ldr_str): Correct disgnostics for
727 2013-04-08 Jan Beulich <jbeulich@suse.com>
729 * gas/config/tc-arm.c (reg_names): Convert duplicate SP_fiq
732 2013-04-03 Alan Modra <amodra@gmail.com>
734 * doc/as.texinfo: Add support to generate man options for h8300.
735 * doc/c-h8300.texi: Likewise.
737 2013-03-28 Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
739 * config/tc-arm.c (arm_cpus): Add support for Cortex-A53 and
742 2013-03-27 Alexis Deruelle <alexis.deruelle@gmail.com>
745 * config/tc-tic6x.c (tic6x_try_encode): Add use of bitfields array.
747 2013-03-26 Nick Clifton <nickc@redhat.com>
750 * listing.c (rebuffer_line): Rewrite to avoid seeking back to the
751 start of the file each time.
754 * config/tc-sparc.h (ELF_TARGET_FORMAT): Set to elf32-sparc for
757 2013-03-26 Douglas B Rupp <rupp@gnat.com>
759 * config/tc-ia64.c (emit_one_bundle): Move last_slot adjustment
762 2013-03-21 Will Newton <will.newton@linaro.org>
764 * config/tc-arm.c (encode_thumb32_addr_mode): Emit an error for all
765 pc-relative str instructions in Thumb mode.
767 2013-03-21 Michael Schewe <michael.schewe@gmx.net>
769 * config/tc-h8300.c (do_a_fix_imm): Add relaxation of mov
770 @(disp:32,ERx) to mov @(disp:16,ERx) insns by new reloc
772 * config/tc-h8300.h: Remove duplicated defines.
774 2013-03-21 Senthil Kumar Selvaraj <senthil_kumar.selvaraj@atmel.com>
777 * tc-avr.c (mcu_has_3_byte_pc): New function.
778 (tc_cfi_frame_initial_instructions): Call it to find return
781 2013-03-20 Alexis Deruelle <alexis.deruelle@gmail.com>
784 * config/tc-tic6x.c (tic6x_try_encode): Handle
785 tic6x_coding_dreg_(msb|lsb) field coding types and use it to
786 encode register pair numbers when required.
788 2013-03-15 Will Newton <will.newton@linaro.org>
790 * config/tc-arm.c (do_neon_ldr_str): Fix error check for PC register
791 in vstr in Thumb mode for pre-ARMv7 cores.
793 2013-03-14 Andreas Schwab <schwab@suse.de>
795 * doc/c-arc.texi (ARC Directives): Revert last change and use
796 @itemize instead of @table.
797 * doc/c-arm.texi (ARM-Instruction-Set): Likewise.
799 2013-03-14 Nick Clifton <nickc@redhat.com>
802 * config/tc-arm.c (do_co_reg): Do not call check_obsolete with a
803 NULL message, instead just check ARM_CPU_IS_ANY directly.
805 2013-03-14 Nick Clifton <nickc@redhat.com>
808 * doc/c-arc.texi (ARC Directives): Use @code instead of @bullet
810 * doc/c-arm.texi (ARM-Instruction-Set): Likewise. Also add text
811 to the @item directives.
812 (ARM-Neon-Alignment): Move to correct place in the document.
813 * doc/c-cr16.texi (CR16 Operand Qualifiers): Fix up table
815 * doc/c-tic54x.texi (TIC54X-Subsyms): Correct use of
818 2013-03-12 Sebastian Huber <sebastian.huber@embedded-brains.de>
820 * config/tc-nios2.c (nios2_consume_arg): Delete 'k' case. Add 'o'
821 case. Add default BAD_CASE to switch.
823 2013-03-11 Sebastian Huber <sebastian.huber@embedded-brains.de>
825 * config/tc-nios2.c (nios2_assemble_args_ds): New function.
826 (nios2_arg_info_structs): Add "d,s" and "d,s,E" entries.
828 2013-03-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
830 * config/tc-arm.c (crc_ext_armv8): New feature set.
831 (UNPRED_REG): New macro.
832 (do_crc32_1): New function.
833 (do_crc32b, do_crc32h, do_crc32w, do_crc32cb,
834 do_crc32ch, do_crc32cw): Likewise.
836 (insns): Add entries for crc32 mnemonics.
837 (arm_extensions): Add entry for crc.
839 2013-03-08 Chung-Lin Tang <cltang@codesourcery.com>
841 * write.h (struct fix): Add fx_dot_frag field.
843 * write.c (dot_frag): New variable.
844 (fix_new_internal): Set fx_dot_frag field with dot_frag.
845 (fixup_segment): Base calculation of fx_offset with fx_dot_frag.
846 * expr.c (expr): Save value of frag_now in dot_frag when setting
848 * read.c (emit_expr): Likewise. Delete comments.
850 2013-03-07 H.J. Lu <hongjiu.lu@intel.com>
852 * config/tc-i386.c (flag_code_names): Removed.
853 (i386_index_check): Rewrote.
855 2013-03-05 Yufeng Zhang <yufeng.zhang@arm.com>
857 * config/tc-aarch64.c (aarch64_imm_float_p): Rename 'e' to 'pattern';
859 (aarch64_double_precision_fmovable): New function.
860 (parse_aarch64_imm_float): Add parameter 'dp_p'; call the new
861 function; handle hexadecimal representation of IEEE754 encoding.
862 (parse_operands): Update the call to parse_aarch64_imm_float.
864 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
866 * config/tc-i386.c (_i386_insn): Replace have_hle with hle_prefix.
867 (check_hle): Updated.
868 (md_assemble): Likewise.
869 (parse_insn): Likewise.
871 2013-02-28 H.J. Lu <hongjiu.lu@intel.com>
873 * config/tc-i386.c (_i386_insn): Add rep_prefix.
874 (md_assemble): Check if REP prefix is OK.
875 (parse_insn): Remove expecting_string_instruction. Set
878 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
880 * config/tc-aarch64.c (aarch64_features): Add the 'crc' option.
882 2013-02-28 Yufeng Zhang <yufeng.zhang@arm.com>
884 * config/tc-aarch64.c (parse_sys_reg): Allow the full range of CRn
885 for system registers.
887 2013-02-27 DJ Delorie <dj@redhat.com>
889 * config/tc-rl78.c (reloc_function): Add %code -> BFD_RELOC_RL78_CODE.
890 (rl78_op): Handle %code().
891 (rl78_cons_fix_new): Likewise, but ignore for 20-bit operands.
892 (tc_gen_reloc): Likwise; convert to a computed reloc.
893 (md_apply_fix): Likewise.
895 2013-02-25 Kaushik Phatak <Kaushik.Phatak@kpitcummins.com>
897 * config/rl78-parse.y: Fix encoding of DIVWU insn.
899 2013-02-25 Terry Guo <terry.guo@arm.com>
901 * config/tc-arm.c (arm_cpus): Add cortex-r7 entry.
902 * doc/c-arm.texi: Add cortex-r7 and missing cortex-r5 to
903 list of accepted CPUs.
905 2013-02-19 H.J. Lu <hongjiu.lu@intel.com>
908 * config/tc-i386.c (cpu_arch): Add ".smap".
910 * doc/c-i386.texi: Document smap.
912 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
914 * config/tc-mips.c (s_cpload): Call mips_mark_labels and set
915 mips_assembling_insn appropriately.
916 (s_cpsetup, s_cprestore, s_cpreturn, s_cpadd): Likewise.
918 2013-02-18 Maciej W. Rozycki <macro@codesourcery.com>
920 * config/tc-mips.c (append_insn): Correct indentation, remove
923 2013-02-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
925 * config/tc-arm.c (do_neon_mov): Break on NS_NULL.
927 2013-02-15 Sebastian Huber <sebastian.huber@embedded-brains.de>
929 * configure.tgt: Add nios2-*-rtems*.
931 2013-02-14 Yufeng Zhang <yufeng.zhang@arm.com>
933 * config/tc-aarch64.c (md_begin): Change to check if 'name' is
936 2013-02-09 Jürgen Urban <JuergenUrban@gmx.de>
938 * config/tc-mips.c (CPU_HAS_LDC1_SDC1): New macro.
939 (macro): Use it. Assert that trunc.w.s is not used for r5900.
941 2013-02-08 Yi-Hsiu, Hsu <ahsu@marvell.com>
943 * gas/config/tc-arm.c (arm_cpus): Add support for mcpu=marvell-pj4
946 2013-02-06 Sandra Loosemore <sandra@codesourcery.com>
947 Andrew Jenner <andrew@codesourcery.com>
949 Based on patches from Altera Corporation.
951 * Makefile.am (TARGET_CPU_CFILES): Add config/tc-nios2.c.
952 (TARGET_CPU_HFILES): Add config/tc-nios2.h.
953 * Makefile.in: Regenerated.
954 * configure.tgt: Add case for nios2*-linux*.
955 * config/obj-elf.c: Conditionally include elf/nios2.h.
956 * config/tc-nios2.c: New file.
957 * config/tc-nios2.h: New file.
958 * doc/Makefile.am (CPU_DOCS): Add c-nios2.texi.
959 * doc/Makefile.in: Regenerated.
960 * doc/all.texi: Set NIOSII.
961 * doc/as.texinfo (Overview): Add Nios II options.
962 (Machine Dependencies): Include c-nios2.texi.
963 * doc/c-nios2.texi: New file.
964 * NEWS: Note Altera Nios II support.
966 2013-02-06 Alan Modra <amodra@gmail.com>
969 * config/tc-avr.h (TC_VALIDATE_FIX): Mark symbol used by reloc.
970 Don't skip fixups with fx_subsy non-NULL.
971 * config/tc-avr.c (tc_gen_reloc): Don't specially handle fixups
972 with fx_subsy non-NULL.
974 2013-02-04 H.J. Lu <hongjiu.lu@intel.com>
976 * doc/c-metag.texi: Add "@c man" markers.
978 2013-02-04 Alan Modra <amodra@gmail.com>
980 * write.c (fixup_segment): Return void. Delete seg_reloc_count
982 (TC_ADJUST_RELOC_COUNT): Delete.
983 * config/tc-i960.h (TC_ADJUST_RELOC_COUNT): Delete.
985 2013-02-04 Alan Modra <amodra@gmail.com>
987 * po/POTFILES.in: Regenerate.
989 2013-01-30 Markos Chandras <markos.chandras@imgtec.com>
991 * config/tc-metag.c: Make SWAP instruction less permissive with
994 2013-01-29 DJ Delorie <dj@redhat.com>
996 * config/tc-rl78.c (rl78_cons_fix_new): Handle user-specified
997 relocs in .word/.etc statements.
999 2013-01-29 Roland McGrath <mcgrathr@google.com>
1001 * config/tc-arm.c (md_apply_fix): Use as_bad_where for "bad
1002 immediate value for 8-bit offset" error so it shows line info.
1004 2013-01-24 Joseph Myers <joseph@codesourcery.com>
1006 * config/tc-ppc.c (md_assemble): Do not generate APUinfo sections
1009 2013-01-24 Nick Clifton <nickc@redhat.com>
1011 * config/tc-v850.c: Add support for e3v5 architecture.
1012 * doc/c-v850.texi: Mention new support.
1014 2013-01-23 Nick Clifton <nickc@redhat.com>
1017 * config/tc-avr.c: Include dwarf2dbg.h.
1019 2013-01-18 H.J. Lu <hongjiu.lu@intel.com>
1021 * config/tc-i386.c (reloc): Support size relocation only for ELF.
1022 (tc_i386_fix_adjustable): Likewise.
1023 (lex_got): Likewise.
1024 (tc_gen_reloc): Likewise.
1026 2013-01-17 Yufeng Zhang <yufeng.zhang@arm.com>
1028 * config/tc-aarch64.c (output_operand_error_record): Change to output
1029 the out-of-range error message as value-expected message if there is
1030 only one single value in the expected range.
1031 (programmer_friendly_fixup): Remove the handling of 8-bit MOVI with
1032 LSL #0 as a programmer-friendly feature.
1034 2013-01-16 H.J. Lu <hongjiu.lu@intel.com>
1036 * config/tc-i386.c (reloc): Support BFD_RELOC_SIZE32.
1037 (tc_i386_fix_adjustable): Keep symbol for BFD_RELOC_32_SIZE and
1038 BFD_RELOC_64_SIZE relocations.
1039 (lex_got): Support "symbol@SIZE" and don't create GOT symbol
1041 (tc_gen_reloc): Resolve BFD_RELOC_SIZE32 and BFD_RELOC_SIZE64
1042 relocations against local symbols.
1044 2013-01-16 Alan Modra <amodra@gmail.com>
1046 * config/tc-ppc.c (md_assemble <TE_PE>): Ignore line after
1047 finding some sort of toc syntax error, and break to avoid
1048 compiler uninit warning.
1050 2013-01-15 H.J. Lu <hongjiu.lu@intel.com>
1053 * config/tc-i386.c (lex_got): Increment length by 1 if the
1054 relocation token is removed.
1056 2013-01-15 Nick Clifton <nickc@redhat.com>
1058 * config/tc-v850.c (md_assemble): Allow signed values for
1061 2013-01-11 Sean Keys <skeys@ipdatasys.com>
1063 * config/tc-xgate.c (md_begin): Fix mistake made when going from
1066 2013-01-10 Peter Bergner <bergner@vnet.ibm.com>
1068 * doc/as.texinfo (Target PowerPC): Document -mpower8 and -mhtm.
1069 * doc/c-ppc.texi (PowerPC-Opts): Likewise.
1070 * config/tc-ppc.c (md_show_usage): Likewise.
1071 (ppc_handle_align): Handle power8's group ending nop.
1073 2013-01-10 Sean Keys <skeys@ipdatasys.com>
1075 * config/tc-xgate.c (md_begin): Fix the printing of opcodes so
1076 that the assember exits after the opcodes have been printed.
1078 2013-01-10 H.J. Lu <hongjiu.lu@intel.com>
1080 * app.c: Remove trailing white spaces.
1084 * dw2gencfi.c: Likewise.
1085 * dwarf2dbg.h: Likewise.
1086 * ecoff.c: Likewise.
1087 * input-file.c: Likewise.
1088 * itbl-lex.h: Likewise.
1089 * output-file.c: Likewise.
1092 * subsegs.c: Likewise.
1093 * symbols.c: Likewise.
1094 * write.c: Likewise.
1095 * config/tc-i386.c: Likewise.
1096 * doc/Makefile.am: Likewise.
1097 * doc/Makefile.in: Likewise.
1098 * doc/c-aarch64.texi: Likewise.
1099 * doc/c-alpha.texi: Likewise.
1100 * doc/c-arc.texi: Likewise.
1101 * doc/c-arm.texi: Likewise.
1102 * doc/c-avr.texi: Likewise.
1103 * doc/c-bfin.texi: Likewise.
1104 * doc/c-cr16.texi: Likewise.
1105 * doc/c-d10v.texi: Likewise.
1106 * doc/c-d30v.texi: Likewise.
1107 * doc/c-h8300.texi: Likewise.
1108 * doc/c-hppa.texi: Likewise.
1109 * doc/c-i370.texi: Likewise.
1110 * doc/c-i386.texi: Likewise.
1111 * doc/c-i860.texi: Likewise.
1112 * doc/c-m32c.texi: Likewise.
1113 * doc/c-m32r.texi: Likewise.
1114 * doc/c-m68hc11.texi: Likewise.
1115 * doc/c-m68k.texi: Likewise.
1116 * doc/c-microblaze.texi: Likewise.
1117 * doc/c-mips.texi: Likewise.
1118 * doc/c-msp430.texi: Likewise.
1119 * doc/c-mt.texi: Likewise.
1120 * doc/c-s390.texi: Likewise.
1121 * doc/c-score.texi: Likewise.
1122 * doc/c-sh.texi: Likewise.
1123 * doc/c-sh64.texi: Likewise.
1124 * doc/c-tic54x.texi: Likewise.
1125 * doc/c-tic6x.texi: Likewise.
1126 * doc/c-v850.texi: Likewise.
1127 * doc/c-xc16x.texi: Likewise.
1128 * doc/c-xgate.texi: Likewise.
1129 * doc/c-xtensa.texi: Likewise.
1130 * doc/c-z80.texi: Likewise.
1131 * doc/internals.texi: Likewise.
1133 2013-01-10 Roland McGrath <mcgrathr@google.com>
1135 * hash.c (hash_new_sized): Make it global.
1136 * hash.h: Declare it.
1137 * macro.c (define_macro): Use hash_new_sized instead of hash_new,
1140 2013-01-10 Will Newton <will.newton@imgtec.com>
1142 * Makefile.am: Add Meta.
1143 * Makefile.in: Regenerate.
1144 * config/tc-metag.c: New file.
1145 * config/tc-metag.h: New file.
1146 * configure.tgt: Add Meta.
1147 * doc/Makefile.am: Add Meta.
1148 * doc/Makefile.in: Regenerate.
1149 * doc/all.texi: Add Meta.
1150 * doc/as.texiinfo: Document Meta options.
1151 * doc/c-metag.texi: New file.
1153 2013-01-09 Steve Ellcey <sellcey@mips.com>
1155 * config/tc-i386.c (md_begin): Remove 'internal Error' from as_fatal
1157 * config/tc-mips.c (internalError): Remove, replace with abort.
1159 2013-01-08 Yufeng Zhang <yufeng.zhang@arm.com>
1161 * config/tc-aarch64.c (parse_operands): Change to compare the result
1162 of function call 'parse_sys_reg' with 'PARSE_FAIL' instead of 'FALSE'.
1164 2013-01-07 Nick Clifton <nickc@redhat.com>
1167 * config/tc-arm.c (skip_past_char): Skip whitespace before the
1168 anticipated character.
1169 * config/tc-arm.c (parse_address_main): Delete skip of whitespace
1170 here as it is no longer needed.
1172 2013-01-06 Andreas Schwab <schwab@linux-m68k.org>
1174 * doc/c-mips.texi (MIPS Opts): Fix use of @itemx.
1175 * doc/c-score.texi (SCORE-Opts): Likewise.
1176 * doc/c-tic54x.texi (TIC54X-Directives): Likewise.
1178 2013-01-04 Juergen Urban <JuergenUrban@gmx.de>
1180 * config/tc-mips.c: Add support for MIPS r5900.
1181 Add M_LQ_AB and M_SQ_AB to support large values for instructions
1183 (can_swap_branch_p, get_append_method): Detect some conditional
1184 short loops to fix a bug on the r5900 by NOP in the branch delay
1186 (M_MUL): Support 3 operands in multu on r5900.
1187 (M_TRUNCWS): Support trunc.w.s on r5900 in MIPS ISA I.
1188 (s_mipsset): Force 32 bit floating point on r5900.
1189 (mips_ip): Check parameter range of instructions mfps and mtps on
1191 * configure.in: Detect CPU type when target string contains r5900
1192 (e.g. mips64r5900el-linux-gnu).
1194 2013-01-02 H.J. Lu <hongjiu.lu@intel.com>
1196 * as.c (parse_args): Update copyright year to 2013.
1198 2013-01-02 Yufeng Zhang <yufeng.zhang@arm.com>
1200 * config/tc-aarch64.c (aarch64_cpus): Add entries for "cortex-a53"
1203 2013-01-02 Nick Clifton <nickc@redhat.com>
1206 * config/tc-arm.c (parse_address_main): Skip whitespace before a
1209 For older changes see ChangeLog-2012
1211 Copyright (C) 2013 Free Software Foundation, Inc.
1213 Copying and distribution of this file, with or without modification,
1214 are permitted in any medium without royalty provided the copyright
1215 notice and this notice are preserved.
1221 version-control: never